1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37e126ba97SEli Cohen #include "mlx5_ib.h" 38e126ba97SEli Cohen #include "user.h" 39e126ba97SEli Cohen 40e126ba97SEli Cohen /* not supported currently */ 41e126ba97SEli Cohen static int wq_signature; 42e126ba97SEli Cohen 43e126ba97SEli Cohen enum { 44e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 45e126ba97SEli Cohen }; 46e126ba97SEli Cohen 47e126ba97SEli Cohen enum { 48e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 49e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 50e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 52e126ba97SEli Cohen }; 53e126ba97SEli Cohen 54e126ba97SEli Cohen enum { 55e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 56e126ba97SEli Cohen MLX5_IB_CACHE_LINE_SIZE = 64, 57e126ba97SEli Cohen }; 58e126ba97SEli Cohen 59e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 60e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 61f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 62e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 63e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 64e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 66e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 67e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 68e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 69e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 708a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 71e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 72e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 73e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 74e126ba97SEli Cohen }; 75e126ba97SEli Cohen 76f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 77f0313965SErez Shitrit u8 rsvd0[16]; 78f0313965SErez Shitrit }; 79e126ba97SEli Cohen 80e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 81e126ba97SEli Cohen { 82e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 83e126ba97SEli Cohen } 84e126ba97SEli Cohen 85e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 86e126ba97SEli Cohen { 87e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 88e126ba97SEli Cohen } 89e126ba97SEli Cohen 90e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 91e126ba97SEli Cohen { 92e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 93e126ba97SEli Cohen } 94e126ba97SEli Cohen 95e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 96e126ba97SEli Cohen { 97e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 98e126ba97SEli Cohen } 99e126ba97SEli Cohen 100e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 101e126ba97SEli Cohen { 102e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 103e126ba97SEli Cohen } 104e126ba97SEli Cohen 105c1395a2aSHaggai Eran /** 106c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 107c1395a2aSHaggai Eran * 108c1395a2aSHaggai Eran * @qp: QP to copy from. 109c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 110c1395a2aSHaggai Eran * otherwise. 111c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 112c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 113c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 114c1395a2aSHaggai Eran * element in the queue. 115c1395a2aSHaggai Eran * @buffer: destination buffer. 116c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 117c1395a2aSHaggai Eran * 118c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 119c1395a2aSHaggai Eran * 120c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 121c1395a2aSHaggai Eran */ 122c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 12319098df2Smajd@mellanox.com void *buffer, u32 length, 12419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 125c1395a2aSHaggai Eran { 126c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 127c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 128c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 129c1395a2aSHaggai Eran size_t offset; 130c1395a2aSHaggai Eran size_t wq_end; 13119098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 132c1395a2aSHaggai Eran u32 first_copy_length; 133c1395a2aSHaggai Eran int wqe_length; 134c1395a2aSHaggai Eran int ret; 135c1395a2aSHaggai Eran 136c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 137c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 138c1395a2aSHaggai Eran qp->ibqp.qp_type); 139c1395a2aSHaggai Eran return -EINVAL; 140c1395a2aSHaggai Eran } 141c1395a2aSHaggai Eran 142c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 143c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 144c1395a2aSHaggai Eran 145c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 146c1395a2aSHaggai Eran return -EINVAL; 147c1395a2aSHaggai Eran 148c1395a2aSHaggai Eran if (offset > umem->length || 149c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 150c1395a2aSHaggai Eran return -EINVAL; 151c1395a2aSHaggai Eran 152c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 153c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 154c1395a2aSHaggai Eran if (ret) 155c1395a2aSHaggai Eran return ret; 156c1395a2aSHaggai Eran 157c1395a2aSHaggai Eran if (send) { 158c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 159c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 160c1395a2aSHaggai Eran 161c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 162c1395a2aSHaggai Eran } else { 163c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 164c1395a2aSHaggai Eran } 165c1395a2aSHaggai Eran 166c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 167c1395a2aSHaggai Eran return first_copy_length; 168c1395a2aSHaggai Eran 169c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 170c1395a2aSHaggai Eran wqe_length - first_copy_length); 171c1395a2aSHaggai Eran if (ret) 172c1395a2aSHaggai Eran return ret; 173c1395a2aSHaggai Eran 174c1395a2aSHaggai Eran return wqe_length; 175c1395a2aSHaggai Eran } 176c1395a2aSHaggai Eran 177e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 178e126ba97SEli Cohen { 179e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 180e126ba97SEli Cohen struct ib_event event; 181e126ba97SEli Cohen 18219098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 18319098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 18419098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 18519098df2Smajd@mellanox.com } 186e126ba97SEli Cohen 187e126ba97SEli Cohen if (ibqp->event_handler) { 188e126ba97SEli Cohen event.device = ibqp->device; 189e126ba97SEli Cohen event.element.qp = ibqp; 190e126ba97SEli Cohen switch (type) { 191e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 192e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 193e126ba97SEli Cohen break; 194e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 195e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 196e126ba97SEli Cohen break; 197e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 198e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 199e126ba97SEli Cohen break; 200e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 201e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 202e126ba97SEli Cohen break; 203e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 204e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 205e126ba97SEli Cohen break; 206e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 207e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 208e126ba97SEli Cohen break; 209e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 210e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 211e126ba97SEli Cohen break; 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 213e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen default: 216e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 217e126ba97SEli Cohen return; 218e126ba97SEli Cohen } 219e126ba97SEli Cohen 220e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 221e126ba97SEli Cohen } 222e126ba97SEli Cohen } 223e126ba97SEli Cohen 224e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 225e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 226e126ba97SEli Cohen { 227e126ba97SEli Cohen int wqe_size; 228e126ba97SEli Cohen int wq_size; 229e126ba97SEli Cohen 230e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 231938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 232e126ba97SEli Cohen return -EINVAL; 233e126ba97SEli Cohen 234e126ba97SEli Cohen if (!has_rq) { 235e126ba97SEli Cohen qp->rq.max_gs = 0; 236e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 237e126ba97SEli Cohen qp->rq.wqe_shift = 0; 238e126ba97SEli Cohen } else { 239e126ba97SEli Cohen if (ucmd) { 240e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 241e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 242e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 243e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 244e126ba97SEli Cohen } else { 245e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 246e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 247e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 248e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 249e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 250e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 251938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 252e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 253e126ba97SEli Cohen wqe_size, 254938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 255938fe83cSSaeed Mahameed max_wqe_sz_rq)); 256e126ba97SEli Cohen return -EINVAL; 257e126ba97SEli Cohen } 258e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 259e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 260e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 261e126ba97SEli Cohen } 262e126ba97SEli Cohen } 263e126ba97SEli Cohen 264e126ba97SEli Cohen return 0; 265e126ba97SEli Cohen } 266e126ba97SEli Cohen 267f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 268e126ba97SEli Cohen { 269618af384SAndi Shyti int size = 0; 270e126ba97SEli Cohen 271f0313965SErez Shitrit switch (attr->qp_type) { 272e126ba97SEli Cohen case IB_QPT_XRC_INI: 273b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 274e126ba97SEli Cohen /* fall through */ 275e126ba97SEli Cohen case IB_QPT_RC: 276e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 27775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 27875c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 27975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 28075c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 281e126ba97SEli Cohen break; 282e126ba97SEli Cohen 283b125a54bSEli Cohen case IB_QPT_XRC_TGT: 284b125a54bSEli Cohen return 0; 285b125a54bSEli Cohen 286e126ba97SEli Cohen case IB_QPT_UC: 287b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 28875c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 2899e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 29075c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 291e126ba97SEli Cohen break; 292e126ba97SEli Cohen 293e126ba97SEli Cohen case IB_QPT_UD: 294f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 295f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 296f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 297f0313965SErez Shitrit /* fall through */ 298e126ba97SEli Cohen case IB_QPT_SMI: 299d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 300b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 301e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 302e126ba97SEli Cohen break; 303e126ba97SEli Cohen 304e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 305b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 306e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 307e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 308e126ba97SEli Cohen break; 309e126ba97SEli Cohen 310e126ba97SEli Cohen default: 311e126ba97SEli Cohen return -EINVAL; 312e126ba97SEli Cohen } 313e126ba97SEli Cohen 314e126ba97SEli Cohen return size; 315e126ba97SEli Cohen } 316e126ba97SEli Cohen 317e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 318e126ba97SEli Cohen { 319e126ba97SEli Cohen int inl_size = 0; 320e126ba97SEli Cohen int size; 321e126ba97SEli Cohen 322f0313965SErez Shitrit size = sq_overhead(attr); 323e126ba97SEli Cohen if (size < 0) 324e126ba97SEli Cohen return size; 325e126ba97SEli Cohen 326e126ba97SEli Cohen if (attr->cap.max_inline_data) { 327e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 328e126ba97SEli Cohen attr->cap.max_inline_data; 329e126ba97SEli Cohen } 330e126ba97SEli Cohen 331e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 332e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 333e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 334e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 335e1e66cc2SSagi Grimberg else 336e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 337e126ba97SEli Cohen } 338e126ba97SEli Cohen 339e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 340e126ba97SEli Cohen struct mlx5_ib_qp *qp) 341e126ba97SEli Cohen { 342e126ba97SEli Cohen int wqe_size; 343e126ba97SEli Cohen int wq_size; 344e126ba97SEli Cohen 345e126ba97SEli Cohen if (!attr->cap.max_send_wr) 346e126ba97SEli Cohen return 0; 347e126ba97SEli Cohen 348e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 349e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 350e126ba97SEli Cohen if (wqe_size < 0) 351e126ba97SEli Cohen return wqe_size; 352e126ba97SEli Cohen 353938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 354b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 355938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 356e126ba97SEli Cohen return -EINVAL; 357e126ba97SEli Cohen } 358e126ba97SEli Cohen 359f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 360e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 361e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 362e126ba97SEli Cohen 363e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 364e1e66cc2SSagi Grimberg qp->signature_en = true; 365e1e66cc2SSagi Grimberg 366e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 367e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 368938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 369b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe count(%d) exceeds limits(%d)\n", 370938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 371938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 372b125a54bSEli Cohen return -ENOMEM; 373b125a54bSEli Cohen } 374e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 375e126ba97SEli Cohen qp->sq.max_gs = attr->cap.max_send_sge; 376b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 377b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 378e126ba97SEli Cohen 379e126ba97SEli Cohen return wq_size; 380e126ba97SEli Cohen } 381e126ba97SEli Cohen 382e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 383e126ba97SEli Cohen struct mlx5_ib_qp *qp, 38419098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 3850fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 3860fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 387e126ba97SEli Cohen { 388e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 389e126ba97SEli Cohen 390938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 391e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 392938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 393e126ba97SEli Cohen return -EINVAL; 394e126ba97SEli Cohen } 395e126ba97SEli Cohen 396e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 397e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 398e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 399e126ba97SEli Cohen return -EINVAL; 400e126ba97SEli Cohen } 401e126ba97SEli Cohen 402e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 403e126ba97SEli Cohen 404938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 405e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 406938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 407938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 408e126ba97SEli Cohen return -EINVAL; 409e126ba97SEli Cohen } 410e126ba97SEli Cohen 4110fb2ed66Smajd@mellanox.com if (attr->qp_type == IB_QPT_RAW_PACKET) { 4120fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4130fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4140fb2ed66Smajd@mellanox.com } else { 41519098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 416e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4170fb2ed66Smajd@mellanox.com } 418e126ba97SEli Cohen 419e126ba97SEli Cohen return 0; 420e126ba97SEli Cohen } 421e126ba97SEli Cohen 422e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 423e126ba97SEli Cohen { 424e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 425e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 426e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 427e126ba97SEli Cohen !attr->cap.max_recv_wr) 428e126ba97SEli Cohen return 0; 429e126ba97SEli Cohen 430e126ba97SEli Cohen return 1; 431e126ba97SEli Cohen } 432e126ba97SEli Cohen 433c1be5232SEli Cohen static int first_med_uuar(void) 434c1be5232SEli Cohen { 435c1be5232SEli Cohen return 1; 436c1be5232SEli Cohen } 437c1be5232SEli Cohen 438c1be5232SEli Cohen static int next_uuar(int n) 439c1be5232SEli Cohen { 440c1be5232SEli Cohen n++; 441c1be5232SEli Cohen 442c1be5232SEli Cohen while (((n % 4) & 2)) 443c1be5232SEli Cohen n++; 444c1be5232SEli Cohen 445c1be5232SEli Cohen return n; 446c1be5232SEli Cohen } 447c1be5232SEli Cohen 448c1be5232SEli Cohen static int num_med_uuar(struct mlx5_uuar_info *uuari) 449c1be5232SEli Cohen { 450c1be5232SEli Cohen int n; 451c1be5232SEli Cohen 452c1be5232SEli Cohen n = uuari->num_uars * MLX5_NON_FP_BF_REGS_PER_PAGE - 453c1be5232SEli Cohen uuari->num_low_latency_uuars - 1; 454c1be5232SEli Cohen 455c1be5232SEli Cohen return n >= 0 ? n : 0; 456c1be5232SEli Cohen } 457c1be5232SEli Cohen 458c1be5232SEli Cohen static int max_uuari(struct mlx5_uuar_info *uuari) 459c1be5232SEli Cohen { 460c1be5232SEli Cohen return uuari->num_uars * 4; 461c1be5232SEli Cohen } 462c1be5232SEli Cohen 463c1be5232SEli Cohen static int first_hi_uuar(struct mlx5_uuar_info *uuari) 464c1be5232SEli Cohen { 465c1be5232SEli Cohen int med; 466c1be5232SEli Cohen int i; 467c1be5232SEli Cohen int t; 468c1be5232SEli Cohen 469c1be5232SEli Cohen med = num_med_uuar(uuari); 470c1be5232SEli Cohen for (t = 0, i = first_med_uuar();; i = next_uuar(i)) { 471c1be5232SEli Cohen t++; 472c1be5232SEli Cohen if (t == med) 473c1be5232SEli Cohen return next_uuar(i); 474c1be5232SEli Cohen } 475c1be5232SEli Cohen 476c1be5232SEli Cohen return 0; 477c1be5232SEli Cohen } 478c1be5232SEli Cohen 479e126ba97SEli Cohen static int alloc_high_class_uuar(struct mlx5_uuar_info *uuari) 480e126ba97SEli Cohen { 481e126ba97SEli Cohen int i; 482e126ba97SEli Cohen 483c1be5232SEli Cohen for (i = first_hi_uuar(uuari); i < max_uuari(uuari); i = next_uuar(i)) { 484e126ba97SEli Cohen if (!test_bit(i, uuari->bitmap)) { 485e126ba97SEli Cohen set_bit(i, uuari->bitmap); 486e126ba97SEli Cohen uuari->count[i]++; 487e126ba97SEli Cohen return i; 488e126ba97SEli Cohen } 489e126ba97SEli Cohen } 490e126ba97SEli Cohen 491e126ba97SEli Cohen return -ENOMEM; 492e126ba97SEli Cohen } 493e126ba97SEli Cohen 494e126ba97SEli Cohen static int alloc_med_class_uuar(struct mlx5_uuar_info *uuari) 495e126ba97SEli Cohen { 496c1be5232SEli Cohen int minidx = first_med_uuar(); 497e126ba97SEli Cohen int i; 498e126ba97SEli Cohen 499c1be5232SEli Cohen for (i = first_med_uuar(); i < first_hi_uuar(uuari); i = next_uuar(i)) { 500e126ba97SEli Cohen if (uuari->count[i] < uuari->count[minidx]) 501e126ba97SEli Cohen minidx = i; 502e126ba97SEli Cohen } 503e126ba97SEli Cohen 504e126ba97SEli Cohen uuari->count[minidx]++; 505e126ba97SEli Cohen return minidx; 506e126ba97SEli Cohen } 507e126ba97SEli Cohen 508e126ba97SEli Cohen static int alloc_uuar(struct mlx5_uuar_info *uuari, 509e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 510e126ba97SEli Cohen { 511e126ba97SEli Cohen int uuarn = -EINVAL; 512e126ba97SEli Cohen 513e126ba97SEli Cohen mutex_lock(&uuari->lock); 514e126ba97SEli Cohen switch (lat) { 515e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 516e126ba97SEli Cohen uuarn = 0; 517e126ba97SEli Cohen uuari->count[uuarn]++; 518e126ba97SEli Cohen break; 519e126ba97SEli Cohen 520e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 52178c0f98cSEli Cohen if (uuari->ver < 2) 52278c0f98cSEli Cohen uuarn = -ENOMEM; 52378c0f98cSEli Cohen else 524e126ba97SEli Cohen uuarn = alloc_med_class_uuar(uuari); 525e126ba97SEli Cohen break; 526e126ba97SEli Cohen 527e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 52878c0f98cSEli Cohen if (uuari->ver < 2) 52978c0f98cSEli Cohen uuarn = -ENOMEM; 53078c0f98cSEli Cohen else 531e126ba97SEli Cohen uuarn = alloc_high_class_uuar(uuari); 532e126ba97SEli Cohen break; 533e126ba97SEli Cohen 534e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_FAST_PATH: 535e126ba97SEli Cohen uuarn = 2; 536e126ba97SEli Cohen break; 537e126ba97SEli Cohen } 538e126ba97SEli Cohen mutex_unlock(&uuari->lock); 539e126ba97SEli Cohen 540e126ba97SEli Cohen return uuarn; 541e126ba97SEli Cohen } 542e126ba97SEli Cohen 543e126ba97SEli Cohen static void free_med_class_uuar(struct mlx5_uuar_info *uuari, int uuarn) 544e126ba97SEli Cohen { 545e126ba97SEli Cohen clear_bit(uuarn, uuari->bitmap); 546e126ba97SEli Cohen --uuari->count[uuarn]; 547e126ba97SEli Cohen } 548e126ba97SEli Cohen 549e126ba97SEli Cohen static void free_high_class_uuar(struct mlx5_uuar_info *uuari, int uuarn) 550e126ba97SEli Cohen { 551e126ba97SEli Cohen clear_bit(uuarn, uuari->bitmap); 552e126ba97SEli Cohen --uuari->count[uuarn]; 553e126ba97SEli Cohen } 554e126ba97SEli Cohen 555e126ba97SEli Cohen static void free_uuar(struct mlx5_uuar_info *uuari, int uuarn) 556e126ba97SEli Cohen { 557e126ba97SEli Cohen int nuuars = uuari->num_uars * MLX5_BF_REGS_PER_PAGE; 558e126ba97SEli Cohen int high_uuar = nuuars - uuari->num_low_latency_uuars; 559e126ba97SEli Cohen 560e126ba97SEli Cohen mutex_lock(&uuari->lock); 561e126ba97SEli Cohen if (uuarn == 0) { 562e126ba97SEli Cohen --uuari->count[uuarn]; 563e126ba97SEli Cohen goto out; 564e126ba97SEli Cohen } 565e126ba97SEli Cohen 566e126ba97SEli Cohen if (uuarn < high_uuar) { 567e126ba97SEli Cohen free_med_class_uuar(uuari, uuarn); 568e126ba97SEli Cohen goto out; 569e126ba97SEli Cohen } 570e126ba97SEli Cohen 571e126ba97SEli Cohen free_high_class_uuar(uuari, uuarn); 572e126ba97SEli Cohen 573e126ba97SEli Cohen out: 574e126ba97SEli Cohen mutex_unlock(&uuari->lock); 575e126ba97SEli Cohen } 576e126ba97SEli Cohen 577e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 578e126ba97SEli Cohen { 579e126ba97SEli Cohen switch (state) { 580e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 581e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 582e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 583e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 584e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 585e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 586e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 587e126ba97SEli Cohen default: return -1; 588e126ba97SEli Cohen } 589e126ba97SEli Cohen } 590e126ba97SEli Cohen 591e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 592e126ba97SEli Cohen { 593e126ba97SEli Cohen switch (type) { 594e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 595e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 596e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 597e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 598e126ba97SEli Cohen case IB_QPT_XRC_INI: 599e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 600e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 601d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 602e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 603e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6040fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 605e126ba97SEli Cohen case IB_QPT_MAX: 606e126ba97SEli Cohen default: return -EINVAL; 607e126ba97SEli Cohen } 608e126ba97SEli Cohen } 609e126ba97SEli Cohen 610e126ba97SEli Cohen static int uuarn_to_uar_index(struct mlx5_uuar_info *uuari, int uuarn) 611e126ba97SEli Cohen { 612e126ba97SEli Cohen return uuari->uars[uuarn / MLX5_BF_REGS_PER_PAGE].index; 613e126ba97SEli Cohen } 614e126ba97SEli Cohen 61519098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 61619098df2Smajd@mellanox.com struct ib_pd *pd, 61719098df2Smajd@mellanox.com unsigned long addr, size_t size, 61819098df2Smajd@mellanox.com struct ib_umem **umem, 61919098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 62019098df2Smajd@mellanox.com u32 *offset) 62119098df2Smajd@mellanox.com { 62219098df2Smajd@mellanox.com int err; 62319098df2Smajd@mellanox.com 62419098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 62519098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 62619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 62719098df2Smajd@mellanox.com return PTR_ERR(*umem); 62819098df2Smajd@mellanox.com } 62919098df2Smajd@mellanox.com 63019098df2Smajd@mellanox.com mlx5_ib_cont_pages(*umem, addr, npages, page_shift, ncont, NULL); 63119098df2Smajd@mellanox.com 63219098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 63319098df2Smajd@mellanox.com if (err) { 63419098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 63519098df2Smajd@mellanox.com goto err_umem; 63619098df2Smajd@mellanox.com } 63719098df2Smajd@mellanox.com 63819098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 63919098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 64019098df2Smajd@mellanox.com 64119098df2Smajd@mellanox.com return 0; 64219098df2Smajd@mellanox.com 64319098df2Smajd@mellanox.com err_umem: 64419098df2Smajd@mellanox.com ib_umem_release(*umem); 64519098df2Smajd@mellanox.com *umem = NULL; 64619098df2Smajd@mellanox.com 64719098df2Smajd@mellanox.com return err; 64819098df2Smajd@mellanox.com } 64919098df2Smajd@mellanox.com 650e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 651e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 6520fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 653e126ba97SEli Cohen struct mlx5_create_qp_mbox_in **in, 65419098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 65519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 656e126ba97SEli Cohen { 657e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 658e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 65919098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 6609e9c47d0SEli Cohen int page_shift = 0; 661e126ba97SEli Cohen int uar_index; 662e126ba97SEli Cohen int npages; 6639e9c47d0SEli Cohen u32 offset = 0; 664e126ba97SEli Cohen int uuarn; 6659e9c47d0SEli Cohen int ncont = 0; 666e126ba97SEli Cohen int err; 667e126ba97SEli Cohen 668e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 669e126ba97SEli Cohen if (err) { 670e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 671e126ba97SEli Cohen return err; 672e126ba97SEli Cohen } 673e126ba97SEli Cohen 674e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 675e126ba97SEli Cohen /* 676e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 677e126ba97SEli Cohen */ 678051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 679051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 680051f2630SLeon Romanovsky uuarn = MLX5_CROSS_CHANNEL_UUAR; 681051f2630SLeon Romanovsky else { 682e126ba97SEli Cohen uuarn = alloc_uuar(&context->uuari, MLX5_IB_LATENCY_CLASS_HIGH); 683e126ba97SEli Cohen if (uuarn < 0) { 684e126ba97SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency UUAR\n"); 685c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 686c1be5232SEli Cohen uuarn = alloc_uuar(&context->uuari, MLX5_IB_LATENCY_CLASS_MEDIUM); 687c1be5232SEli Cohen if (uuarn < 0) { 688c1be5232SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency UUAR\n"); 689e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 690e126ba97SEli Cohen uuarn = alloc_uuar(&context->uuari, MLX5_IB_LATENCY_CLASS_LOW); 691e126ba97SEli Cohen if (uuarn < 0) { 692c1be5232SEli Cohen mlx5_ib_warn(dev, "uuar allocation failed\n"); 693e126ba97SEli Cohen return uuarn; 694e126ba97SEli Cohen } 695e126ba97SEli Cohen } 696c1be5232SEli Cohen } 697051f2630SLeon Romanovsky } 698e126ba97SEli Cohen 699e126ba97SEli Cohen uar_index = uuarn_to_uar_index(&context->uuari, uuarn); 700e126ba97SEli Cohen mlx5_ib_dbg(dev, "uuarn 0x%x, uar_index 0x%x\n", uuarn, uar_index); 701e126ba97SEli Cohen 70248fea837SHaggai Eran qp->rq.offset = 0; 70348fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 70448fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 70548fea837SHaggai Eran 7060fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 707e126ba97SEli Cohen if (err) 708e126ba97SEli Cohen goto err_uuar; 709e126ba97SEli Cohen 71019098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 71119098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 71219098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 71319098df2Smajd@mellanox.com ubuffer->buf_size, 71419098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 71519098df2Smajd@mellanox.com &ncont, &offset); 71619098df2Smajd@mellanox.com if (err) 717e126ba97SEli Cohen goto err_uuar; 7189e9c47d0SEli Cohen } else { 71919098df2Smajd@mellanox.com ubuffer->umem = NULL; 7209e9c47d0SEli Cohen } 721e126ba97SEli Cohen 722e126ba97SEli Cohen *inlen = sizeof(**in) + sizeof(*(*in)->pas) * ncont; 723e126ba97SEli Cohen *in = mlx5_vzalloc(*inlen); 724e126ba97SEli Cohen if (!*in) { 725e126ba97SEli Cohen err = -ENOMEM; 726e126ba97SEli Cohen goto err_umem; 727e126ba97SEli Cohen } 72819098df2Smajd@mellanox.com if (ubuffer->umem) 72919098df2Smajd@mellanox.com mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, 73019098df2Smajd@mellanox.com (*in)->pas, 0); 731e126ba97SEli Cohen (*in)->ctx.log_pg_sz_remote_qpn = 7321b77d2bdSEli Cohen cpu_to_be32((page_shift - MLX5_ADAPTER_PAGE_SHIFT) << 24); 733e126ba97SEli Cohen (*in)->ctx.params2 = cpu_to_be32(offset << 6); 734e126ba97SEli Cohen 735e126ba97SEli Cohen (*in)->ctx.qp_counter_set_usr_page = cpu_to_be32(uar_index); 736e126ba97SEli Cohen resp->uuar_index = uuarn; 737e126ba97SEli Cohen qp->uuarn = uuarn; 738e126ba97SEli Cohen 739e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 740e126ba97SEli Cohen if (err) { 741e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 742e126ba97SEli Cohen goto err_free; 743e126ba97SEli Cohen } 744e126ba97SEli Cohen 745e126ba97SEli Cohen err = ib_copy_to_udata(udata, resp, sizeof(*resp)); 746e126ba97SEli Cohen if (err) { 747e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 748e126ba97SEli Cohen goto err_unmap; 749e126ba97SEli Cohen } 750e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 751e126ba97SEli Cohen 752e126ba97SEli Cohen return 0; 753e126ba97SEli Cohen 754e126ba97SEli Cohen err_unmap: 755e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 756e126ba97SEli Cohen 757e126ba97SEli Cohen err_free: 758479163f4SAl Viro kvfree(*in); 759e126ba97SEli Cohen 760e126ba97SEli Cohen err_umem: 76119098df2Smajd@mellanox.com if (ubuffer->umem) 76219098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 763e126ba97SEli Cohen 764e126ba97SEli Cohen err_uuar: 765e126ba97SEli Cohen free_uuar(&context->uuari, uuarn); 766e126ba97SEli Cohen return err; 767e126ba97SEli Cohen } 768e126ba97SEli Cohen 76919098df2Smajd@mellanox.com static void destroy_qp_user(struct ib_pd *pd, struct mlx5_ib_qp *qp, 77019098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 771e126ba97SEli Cohen { 772e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 773e126ba97SEli Cohen 774e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 775e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 77619098df2Smajd@mellanox.com if (base->ubuffer.umem) 77719098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 778e126ba97SEli Cohen free_uuar(&context->uuari, qp->uuarn); 779e126ba97SEli Cohen } 780e126ba97SEli Cohen 781e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 782e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 783e126ba97SEli Cohen struct mlx5_ib_qp *qp, 78419098df2Smajd@mellanox.com struct mlx5_create_qp_mbox_in **in, int *inlen, 78519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 786e126ba97SEli Cohen { 787e126ba97SEli Cohen enum mlx5_ib_latency_class lc = MLX5_IB_LATENCY_CLASS_LOW; 788e126ba97SEli Cohen struct mlx5_uuar_info *uuari; 789e126ba97SEli Cohen int uar_index; 790e126ba97SEli Cohen int uuarn; 791e126ba97SEli Cohen int err; 792e126ba97SEli Cohen 7939603b61dSJack Morgenstein uuari = &dev->mdev->priv.uuari; 794f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 795f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 796b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 797b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 7981a4c3a3dSEli Cohen return -EINVAL; 799e126ba97SEli Cohen 800e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 801e126ba97SEli Cohen lc = MLX5_IB_LATENCY_CLASS_FAST_PATH; 802e126ba97SEli Cohen 803e126ba97SEli Cohen uuarn = alloc_uuar(uuari, lc); 804e126ba97SEli Cohen if (uuarn < 0) { 805e126ba97SEli Cohen mlx5_ib_dbg(dev, "\n"); 806e126ba97SEli Cohen return -ENOMEM; 807e126ba97SEli Cohen } 808e126ba97SEli Cohen 809e126ba97SEli Cohen qp->bf = &uuari->bfs[uuarn]; 810e126ba97SEli Cohen uar_index = qp->bf->uar->index; 811e126ba97SEli Cohen 812e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 813e126ba97SEli Cohen if (err < 0) { 814e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 815e126ba97SEli Cohen goto err_uuar; 816e126ba97SEli Cohen } 817e126ba97SEli Cohen 818e126ba97SEli Cohen qp->rq.offset = 0; 819e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 82019098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 821e126ba97SEli Cohen 82219098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 823e126ba97SEli Cohen if (err) { 824e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 825e126ba97SEli Cohen goto err_uuar; 826e126ba97SEli Cohen } 827e126ba97SEli Cohen 828e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 829e126ba97SEli Cohen *inlen = sizeof(**in) + sizeof(*(*in)->pas) * qp->buf.npages; 830e126ba97SEli Cohen *in = mlx5_vzalloc(*inlen); 831e126ba97SEli Cohen if (!*in) { 832e126ba97SEli Cohen err = -ENOMEM; 833e126ba97SEli Cohen goto err_buf; 834e126ba97SEli Cohen } 835e126ba97SEli Cohen (*in)->ctx.qp_counter_set_usr_page = cpu_to_be32(uar_index); 8361b77d2bdSEli Cohen (*in)->ctx.log_pg_sz_remote_qpn = 8371b77d2bdSEli Cohen cpu_to_be32((qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT) << 24); 838e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 839e126ba97SEli Cohen (*in)->ctx.params1 |= cpu_to_be32(1 << 11); 840e126ba97SEli Cohen (*in)->ctx.sq_crq_size |= cpu_to_be16(1 << 4); 841e126ba97SEli Cohen 842b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 843b11a4f9cSHaggai Eran (*in)->ctx.deth_sqpn = cpu_to_be32(1); 844b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 845b11a4f9cSHaggai Eran } 846b11a4f9cSHaggai Eran 847e126ba97SEli Cohen mlx5_fill_page_array(&qp->buf, (*in)->pas); 848e126ba97SEli Cohen 8499603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 850e126ba97SEli Cohen if (err) { 851e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 852e126ba97SEli Cohen goto err_free; 853e126ba97SEli Cohen } 854e126ba97SEli Cohen 855e126ba97SEli Cohen qp->sq.wrid = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.wrid), GFP_KERNEL); 856e126ba97SEli Cohen qp->sq.wr_data = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.wr_data), GFP_KERNEL); 857e126ba97SEli Cohen qp->rq.wrid = kmalloc(qp->rq.wqe_cnt * sizeof(*qp->rq.wrid), GFP_KERNEL); 858e126ba97SEli Cohen qp->sq.w_list = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.w_list), GFP_KERNEL); 859e126ba97SEli Cohen qp->sq.wqe_head = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.wqe_head), GFP_KERNEL); 860e126ba97SEli Cohen 861e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 862e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 863e126ba97SEli Cohen err = -ENOMEM; 864e126ba97SEli Cohen goto err_wrid; 865e126ba97SEli Cohen } 866e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 867e126ba97SEli Cohen 868e126ba97SEli Cohen return 0; 869e126ba97SEli Cohen 870e126ba97SEli Cohen err_wrid: 8719603b61dSJack Morgenstein mlx5_db_free(dev->mdev, &qp->db); 872e126ba97SEli Cohen kfree(qp->sq.wqe_head); 873e126ba97SEli Cohen kfree(qp->sq.w_list); 874e126ba97SEli Cohen kfree(qp->sq.wrid); 875e126ba97SEli Cohen kfree(qp->sq.wr_data); 876e126ba97SEli Cohen kfree(qp->rq.wrid); 877e126ba97SEli Cohen 878e126ba97SEli Cohen err_free: 879479163f4SAl Viro kvfree(*in); 880e126ba97SEli Cohen 881e126ba97SEli Cohen err_buf: 8829603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 883e126ba97SEli Cohen 884e126ba97SEli Cohen err_uuar: 8859603b61dSJack Morgenstein free_uuar(&dev->mdev->priv.uuari, uuarn); 886e126ba97SEli Cohen return err; 887e126ba97SEli Cohen } 888e126ba97SEli Cohen 889e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 890e126ba97SEli Cohen { 8919603b61dSJack Morgenstein mlx5_db_free(dev->mdev, &qp->db); 892e126ba97SEli Cohen kfree(qp->sq.wqe_head); 893e126ba97SEli Cohen kfree(qp->sq.w_list); 894e126ba97SEli Cohen kfree(qp->sq.wrid); 895e126ba97SEli Cohen kfree(qp->sq.wr_data); 896e126ba97SEli Cohen kfree(qp->rq.wrid); 8979603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 8989603b61dSJack Morgenstein free_uuar(&dev->mdev->priv.uuari, qp->bf->uuarn); 899e126ba97SEli Cohen } 900e126ba97SEli Cohen 901e126ba97SEli Cohen static __be32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 902e126ba97SEli Cohen { 903e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 904e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 905e126ba97SEli Cohen return cpu_to_be32(MLX5_SRQ_RQ); 906e126ba97SEli Cohen else if (!qp->has_rq) 907e126ba97SEli Cohen return cpu_to_be32(MLX5_ZERO_LEN_RQ); 908e126ba97SEli Cohen else 909e126ba97SEli Cohen return cpu_to_be32(MLX5_NON_ZERO_RQ); 910e126ba97SEli Cohen } 911e126ba97SEli Cohen 912e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 913e126ba97SEli Cohen { 914e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 915e126ba97SEli Cohen return 1; 916e126ba97SEli Cohen 917e126ba97SEli Cohen return 0; 918e126ba97SEli Cohen } 919e126ba97SEli Cohen 9200fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 9210fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 9220fb2ed66Smajd@mellanox.com { 9230fb2ed66Smajd@mellanox.com u32 in[MLX5_ST_SZ_DW(create_tis_in)]; 9240fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 9250fb2ed66Smajd@mellanox.com 9260fb2ed66Smajd@mellanox.com memset(in, 0, sizeof(in)); 9270fb2ed66Smajd@mellanox.com 9280fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 9290fb2ed66Smajd@mellanox.com 9300fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 9310fb2ed66Smajd@mellanox.com } 9320fb2ed66Smajd@mellanox.com 9330fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 9340fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 9350fb2ed66Smajd@mellanox.com { 9360fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 9370fb2ed66Smajd@mellanox.com } 9380fb2ed66Smajd@mellanox.com 9390fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 9400fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 9410fb2ed66Smajd@mellanox.com struct ib_pd *pd) 9420fb2ed66Smajd@mellanox.com { 9430fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 9440fb2ed66Smajd@mellanox.com __be64 *pas; 9450fb2ed66Smajd@mellanox.com void *in; 9460fb2ed66Smajd@mellanox.com void *sqc; 9470fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 9480fb2ed66Smajd@mellanox.com void *wq; 9490fb2ed66Smajd@mellanox.com int inlen; 9500fb2ed66Smajd@mellanox.com int err; 9510fb2ed66Smajd@mellanox.com int page_shift = 0; 9520fb2ed66Smajd@mellanox.com int npages; 9530fb2ed66Smajd@mellanox.com int ncont = 0; 9540fb2ed66Smajd@mellanox.com u32 offset = 0; 9550fb2ed66Smajd@mellanox.com 9560fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 9570fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 9580fb2ed66Smajd@mellanox.com &ncont, &offset); 9590fb2ed66Smajd@mellanox.com if (err) 9600fb2ed66Smajd@mellanox.com return err; 9610fb2ed66Smajd@mellanox.com 9620fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 9630fb2ed66Smajd@mellanox.com in = mlx5_vzalloc(inlen); 9640fb2ed66Smajd@mellanox.com if (!in) { 9650fb2ed66Smajd@mellanox.com err = -ENOMEM; 9660fb2ed66Smajd@mellanox.com goto err_umem; 9670fb2ed66Smajd@mellanox.com } 9680fb2ed66Smajd@mellanox.com 9690fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 9700fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 9710fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 9720fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 9730fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 9740fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 9750fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 9760fb2ed66Smajd@mellanox.com 9770fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 9780fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 9790fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 9800fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 9810fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 9820fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 9830fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 9840fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 9850fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 9860fb2ed66Smajd@mellanox.com 9870fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 9880fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 9890fb2ed66Smajd@mellanox.com 9900fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 9910fb2ed66Smajd@mellanox.com 9920fb2ed66Smajd@mellanox.com kvfree(in); 9930fb2ed66Smajd@mellanox.com 9940fb2ed66Smajd@mellanox.com if (err) 9950fb2ed66Smajd@mellanox.com goto err_umem; 9960fb2ed66Smajd@mellanox.com 9970fb2ed66Smajd@mellanox.com return 0; 9980fb2ed66Smajd@mellanox.com 9990fb2ed66Smajd@mellanox.com err_umem: 10000fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 10010fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 10020fb2ed66Smajd@mellanox.com 10030fb2ed66Smajd@mellanox.com return err; 10040fb2ed66Smajd@mellanox.com } 10050fb2ed66Smajd@mellanox.com 10060fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10070fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10080fb2ed66Smajd@mellanox.com { 10090fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 10100fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 10110fb2ed66Smajd@mellanox.com } 10120fb2ed66Smajd@mellanox.com 10130fb2ed66Smajd@mellanox.com static int get_rq_pas_size(void *qpc) 10140fb2ed66Smajd@mellanox.com { 10150fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 10160fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 10170fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 10180fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 10190fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 10200fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 10210fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 10220fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 10230fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 10240fb2ed66Smajd@mellanox.com 10250fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 10260fb2ed66Smajd@mellanox.com } 10270fb2ed66Smajd@mellanox.com 10280fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 10290fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq, void *qpin) 10300fb2ed66Smajd@mellanox.com { 10310fb2ed66Smajd@mellanox.com __be64 *pas; 10320fb2ed66Smajd@mellanox.com __be64 *qp_pas; 10330fb2ed66Smajd@mellanox.com void *in; 10340fb2ed66Smajd@mellanox.com void *rqc; 10350fb2ed66Smajd@mellanox.com void *wq; 10360fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 10370fb2ed66Smajd@mellanox.com int inlen; 10380fb2ed66Smajd@mellanox.com int err; 10390fb2ed66Smajd@mellanox.com u32 rq_pas_size = get_rq_pas_size(qpc); 10400fb2ed66Smajd@mellanox.com 10410fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 10420fb2ed66Smajd@mellanox.com in = mlx5_vzalloc(inlen); 10430fb2ed66Smajd@mellanox.com if (!in) 10440fb2ed66Smajd@mellanox.com return -ENOMEM; 10450fb2ed66Smajd@mellanox.com 10460fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 10470fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 10480fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 10490fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 10500fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 10510fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 10520fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 10530fb2ed66Smajd@mellanox.com 10540fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 10550fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 10560fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, end_padding_mode, 105701581fb8SMaor Gottlieb MLX5_GET(qpc, qpc, end_padding_mode)); 10580fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 10590fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 10600fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 10610fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 10620fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 10630fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 10640fb2ed66Smajd@mellanox.com 10650fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 10660fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 10670fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 10680fb2ed66Smajd@mellanox.com 10690fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 10700fb2ed66Smajd@mellanox.com 10710fb2ed66Smajd@mellanox.com kvfree(in); 10720fb2ed66Smajd@mellanox.com 10730fb2ed66Smajd@mellanox.com return err; 10740fb2ed66Smajd@mellanox.com } 10750fb2ed66Smajd@mellanox.com 10760fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 10770fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 10780fb2ed66Smajd@mellanox.com { 10790fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 10800fb2ed66Smajd@mellanox.com } 10810fb2ed66Smajd@mellanox.com 10820fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 10830fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq, u32 tdn) 10840fb2ed66Smajd@mellanox.com { 10850fb2ed66Smajd@mellanox.com u32 *in; 10860fb2ed66Smajd@mellanox.com void *tirc; 10870fb2ed66Smajd@mellanox.com int inlen; 10880fb2ed66Smajd@mellanox.com int err; 10890fb2ed66Smajd@mellanox.com 10900fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 10910fb2ed66Smajd@mellanox.com in = mlx5_vzalloc(inlen); 10920fb2ed66Smajd@mellanox.com if (!in) 10930fb2ed66Smajd@mellanox.com return -ENOMEM; 10940fb2ed66Smajd@mellanox.com 10950fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 10960fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 10970fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 10980fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 10990fb2ed66Smajd@mellanox.com 11000fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 11010fb2ed66Smajd@mellanox.com 11020fb2ed66Smajd@mellanox.com kvfree(in); 11030fb2ed66Smajd@mellanox.com 11040fb2ed66Smajd@mellanox.com return err; 11050fb2ed66Smajd@mellanox.com } 11060fb2ed66Smajd@mellanox.com 11070fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 11080fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 11090fb2ed66Smajd@mellanox.com { 11100fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 11110fb2ed66Smajd@mellanox.com } 11120fb2ed66Smajd@mellanox.com 11130fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 11140fb2ed66Smajd@mellanox.com struct mlx5_create_qp_mbox_in *in, 11150fb2ed66Smajd@mellanox.com struct ib_pd *pd) 11160fb2ed66Smajd@mellanox.com { 11170fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 11180fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 11190fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 11200fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 11210fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 11220fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 11230fb2ed66Smajd@mellanox.com int err; 11240fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 11250fb2ed66Smajd@mellanox.com 11260fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 11270fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_tis(dev, sq, tdn); 11280fb2ed66Smajd@mellanox.com if (err) 11290fb2ed66Smajd@mellanox.com return err; 11300fb2ed66Smajd@mellanox.com 11310fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 11320fb2ed66Smajd@mellanox.com if (err) 11330fb2ed66Smajd@mellanox.com goto err_destroy_tis; 11340fb2ed66Smajd@mellanox.com 11350fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 11360fb2ed66Smajd@mellanox.com } 11370fb2ed66Smajd@mellanox.com 11380fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 11390fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_rq(dev, rq, in); 11400fb2ed66Smajd@mellanox.com if (err) 11410fb2ed66Smajd@mellanox.com goto err_destroy_sq; 11420fb2ed66Smajd@mellanox.com 11430fb2ed66Smajd@mellanox.com rq->base.container_mibqp = qp; 11440fb2ed66Smajd@mellanox.com 11450fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_tir(dev, rq, tdn); 11460fb2ed66Smajd@mellanox.com if (err) 11470fb2ed66Smajd@mellanox.com goto err_destroy_rq; 11480fb2ed66Smajd@mellanox.com } 11490fb2ed66Smajd@mellanox.com 11500fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 11510fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 11520fb2ed66Smajd@mellanox.com 11530fb2ed66Smajd@mellanox.com return 0; 11540fb2ed66Smajd@mellanox.com 11550fb2ed66Smajd@mellanox.com err_destroy_rq: 11560fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 11570fb2ed66Smajd@mellanox.com err_destroy_sq: 11580fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 11590fb2ed66Smajd@mellanox.com return err; 11600fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 11610fb2ed66Smajd@mellanox.com err_destroy_tis: 11620fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 11630fb2ed66Smajd@mellanox.com 11640fb2ed66Smajd@mellanox.com return err; 11650fb2ed66Smajd@mellanox.com } 11660fb2ed66Smajd@mellanox.com 11670fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 11680fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 11690fb2ed66Smajd@mellanox.com { 11700fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 11710fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 11720fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 11730fb2ed66Smajd@mellanox.com 11740fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 11750fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 11760fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 11770fb2ed66Smajd@mellanox.com } 11780fb2ed66Smajd@mellanox.com 11790fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 11800fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 11810fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 11820fb2ed66Smajd@mellanox.com } 11830fb2ed66Smajd@mellanox.com } 11840fb2ed66Smajd@mellanox.com 11850fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 11860fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 11870fb2ed66Smajd@mellanox.com { 11880fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 11890fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 11900fb2ed66Smajd@mellanox.com 11910fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 11920fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 11930fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 11940fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 11950fb2ed66Smajd@mellanox.com } 11960fb2ed66Smajd@mellanox.com 1197e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1198e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1199e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1200e126ba97SEli Cohen { 1201e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 1202938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 12030fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base; 1204e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 1205e126ba97SEli Cohen struct mlx5_create_qp_mbox_in *in; 1206e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 1207e126ba97SEli Cohen int inlen = sizeof(*in); 1208e126ba97SEli Cohen int err; 1209cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 1210cfb5e088SHaggai Abramovsky void *qpc; 1211e126ba97SEli Cohen 12120fb2ed66Smajd@mellanox.com base = init_attr->qp_type == IB_QPT_RAW_PACKET ? 12130fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 12140fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 12150fb2ed66Smajd@mellanox.com 12160fb2ed66Smajd@mellanox.com if (init_attr->qp_type != IB_QPT_RAW_PACKET) 12176aec21f6SHaggai Eran mlx5_ib_odp_create_qp(qp); 12186aec21f6SHaggai Eran 1219e126ba97SEli Cohen mutex_init(&qp->mutex); 1220e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1221e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1222e126ba97SEli Cohen 1223f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1224938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1225f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1226f360d88aSEli Cohen return -EINVAL; 1227f360d88aSEli Cohen } else { 1228f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1229f360d88aSEli Cohen } 1230f360d88aSEli Cohen } 1231f360d88aSEli Cohen 1232051f2630SLeon Romanovsky if (init_attr->create_flags & 1233051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1234051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1235051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1236051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1237051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1238051f2630SLeon Romanovsky return -EINVAL; 1239051f2630SLeon Romanovsky } 1240051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1241051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1242051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1243051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1244051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1245051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1246051f2630SLeon Romanovsky } 1247f0313965SErez Shitrit 1248f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1249f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1250f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1251f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1252f0313965SErez Shitrit return -EOPNOTSUPP; 1253f0313965SErez Shitrit } 1254f0313965SErez Shitrit 1255e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1256e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1257e126ba97SEli Cohen 1258e126ba97SEli Cohen if (pd && pd->uobject) { 1259e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1260e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1261e126ba97SEli Cohen return -EFAULT; 1262e126ba97SEli Cohen } 1263e126ba97SEli Cohen 1264cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1265cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1266cfb5e088SHaggai Abramovsky if (err) 1267cfb5e088SHaggai Abramovsky return err; 1268cfb5e088SHaggai Abramovsky 1269e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1270e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1271e126ba97SEli Cohen } else { 1272e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1273e126ba97SEli Cohen } 1274e126ba97SEli Cohen 1275e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1276e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1277e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1278e126ba97SEli Cohen if (err) { 1279e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1280e126ba97SEli Cohen return err; 1281e126ba97SEli Cohen } 1282e126ba97SEli Cohen 1283e126ba97SEli Cohen if (pd) { 1284e126ba97SEli Cohen if (pd->uobject) { 1285938fe83cSSaeed Mahameed __u32 max_wqes = 1286938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1287e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1288e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1289e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1290e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1291e126ba97SEli Cohen return -EINVAL; 1292e126ba97SEli Cohen } 1293938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1294e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1295938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1296e126ba97SEli Cohen return -EINVAL; 1297e126ba97SEli Cohen } 1298b11a4f9cSHaggai Eran if (init_attr->create_flags & 1299b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1300b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1301b11a4f9cSHaggai Eran return -EINVAL; 1302b11a4f9cSHaggai Eran } 13030fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 13040fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1305e126ba97SEli Cohen if (err) 1306e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1307e126ba97SEli Cohen } else { 130819098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 130919098df2Smajd@mellanox.com base); 1310e126ba97SEli Cohen if (err) 1311e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1312e126ba97SEli Cohen } 1313e126ba97SEli Cohen 1314e126ba97SEli Cohen if (err) 1315e126ba97SEli Cohen return err; 1316e126ba97SEli Cohen } else { 1317e126ba97SEli Cohen in = mlx5_vzalloc(sizeof(*in)); 1318e126ba97SEli Cohen if (!in) 1319e126ba97SEli Cohen return -ENOMEM; 1320e126ba97SEli Cohen 1321e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1322e126ba97SEli Cohen } 1323e126ba97SEli Cohen 1324e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1325e126ba97SEli Cohen qp->port = init_attr->port_num; 1326e126ba97SEli Cohen 1327e126ba97SEli Cohen in->ctx.flags = cpu_to_be32(to_mlx5_st(init_attr->qp_type) << 16 | 1328e126ba97SEli Cohen MLX5_QP_PM_MIGRATED << 11); 1329e126ba97SEli Cohen 1330e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 1331e126ba97SEli Cohen in->ctx.flags_pd = cpu_to_be32(to_mpd(pd ? pd : devr->p0)->pdn); 1332e126ba97SEli Cohen else 1333e126ba97SEli Cohen in->ctx.flags_pd = cpu_to_be32(MLX5_QP_LAT_SENSITIVE); 1334e126ba97SEli Cohen 1335e126ba97SEli Cohen if (qp->wq_sig) 1336e126ba97SEli Cohen in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_ENABLE_SIG); 1337e126ba97SEli Cohen 1338f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 1339f360d88aSEli Cohen in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_BLOCK_MCAST); 1340f360d88aSEli Cohen 1341051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 1342051f2630SLeon Romanovsky in->ctx.params2 |= cpu_to_be32(MLX5_QP_BIT_CC_MASTER); 1343051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 1344051f2630SLeon Romanovsky in->ctx.params2 |= cpu_to_be32(MLX5_QP_BIT_CC_SLAVE_SEND); 1345051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 1346051f2630SLeon Romanovsky in->ctx.params2 |= cpu_to_be32(MLX5_QP_BIT_CC_SLAVE_RECV); 1347051f2630SLeon Romanovsky 1348e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1349e126ba97SEli Cohen int rcqe_sz; 1350e126ba97SEli Cohen int scqe_sz; 1351e126ba97SEli Cohen 1352e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1353e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1354e126ba97SEli Cohen 1355e126ba97SEli Cohen if (rcqe_sz == 128) 1356e126ba97SEli Cohen in->ctx.cs_res = MLX5_RES_SCAT_DATA64_CQE; 1357e126ba97SEli Cohen else 1358e126ba97SEli Cohen in->ctx.cs_res = MLX5_RES_SCAT_DATA32_CQE; 1359e126ba97SEli Cohen 1360e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1361e126ba97SEli Cohen if (scqe_sz == 128) 1362e126ba97SEli Cohen in->ctx.cs_req = MLX5_REQ_SCAT_DATA64_CQE; 1363e126ba97SEli Cohen else 1364e126ba97SEli Cohen in->ctx.cs_req = MLX5_REQ_SCAT_DATA32_CQE; 1365e126ba97SEli Cohen } 1366e126ba97SEli Cohen } 1367e126ba97SEli Cohen 1368e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 1369e126ba97SEli Cohen in->ctx.rq_size_stride = (qp->rq.wqe_shift - 4); 1370e126ba97SEli Cohen in->ctx.rq_size_stride |= ilog2(qp->rq.wqe_cnt) << 3; 1371e126ba97SEli Cohen } 1372e126ba97SEli Cohen 1373e126ba97SEli Cohen in->ctx.rq_type_srqn = get_rx_type(qp, init_attr); 1374e126ba97SEli Cohen 1375e126ba97SEli Cohen if (qp->sq.wqe_cnt) 1376e126ba97SEli Cohen in->ctx.sq_crq_size |= cpu_to_be16(ilog2(qp->sq.wqe_cnt) << 11); 1377e126ba97SEli Cohen else 1378e126ba97SEli Cohen in->ctx.sq_crq_size |= cpu_to_be16(0x8000); 1379e126ba97SEli Cohen 1380e126ba97SEli Cohen /* Set default resources */ 1381e126ba97SEli Cohen switch (init_attr->qp_type) { 1382e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1383e126ba97SEli Cohen in->ctx.cqn_recv = cpu_to_be32(to_mcq(devr->c0)->mcq.cqn); 1384e126ba97SEli Cohen in->ctx.cqn_send = cpu_to_be32(to_mcq(devr->c0)->mcq.cqn); 1385e126ba97SEli Cohen in->ctx.rq_type_srqn |= cpu_to_be32(to_msrq(devr->s0)->msrq.srqn); 1386e126ba97SEli Cohen in->ctx.xrcd = cpu_to_be32(to_mxrcd(init_attr->xrcd)->xrcdn); 1387e126ba97SEli Cohen break; 1388e126ba97SEli Cohen case IB_QPT_XRC_INI: 1389e126ba97SEli Cohen in->ctx.cqn_recv = cpu_to_be32(to_mcq(devr->c0)->mcq.cqn); 1390e126ba97SEli Cohen in->ctx.xrcd = cpu_to_be32(to_mxrcd(devr->x1)->xrcdn); 1391e126ba97SEli Cohen in->ctx.rq_type_srqn |= cpu_to_be32(to_msrq(devr->s0)->msrq.srqn); 1392e126ba97SEli Cohen break; 1393e126ba97SEli Cohen default: 1394e126ba97SEli Cohen if (init_attr->srq) { 1395e126ba97SEli Cohen in->ctx.xrcd = cpu_to_be32(to_mxrcd(devr->x0)->xrcdn); 1396e126ba97SEli Cohen in->ctx.rq_type_srqn |= cpu_to_be32(to_msrq(init_attr->srq)->msrq.srqn); 1397e126ba97SEli Cohen } else { 1398e126ba97SEli Cohen in->ctx.xrcd = cpu_to_be32(to_mxrcd(devr->x1)->xrcdn); 13994aa17b28SHaggai Abramonvsky in->ctx.rq_type_srqn |= 14004aa17b28SHaggai Abramonvsky cpu_to_be32(to_msrq(devr->s1)->msrq.srqn); 1401e126ba97SEli Cohen } 1402e126ba97SEli Cohen } 1403e126ba97SEli Cohen 1404e126ba97SEli Cohen if (init_attr->send_cq) 1405e126ba97SEli Cohen in->ctx.cqn_send = cpu_to_be32(to_mcq(init_attr->send_cq)->mcq.cqn); 1406e126ba97SEli Cohen 1407e126ba97SEli Cohen if (init_attr->recv_cq) 1408e126ba97SEli Cohen in->ctx.cqn_recv = cpu_to_be32(to_mcq(init_attr->recv_cq)->mcq.cqn); 1409e126ba97SEli Cohen 1410e126ba97SEli Cohen in->ctx.db_rec_addr = cpu_to_be64(qp->db.dma); 1411e126ba97SEli Cohen 1412cfb5e088SHaggai Abramovsky if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) { 1413cfb5e088SHaggai Abramovsky qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 1414cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 1415cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 1416cfb5e088SHaggai Abramovsky } 1417f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1418f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1419f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1420f0313965SErez Shitrit qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 1421f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1422f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1423f0313965SErez Shitrit } 1424cfb5e088SHaggai Abramovsky 14250fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 14260fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 14270fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 14280fb2ed66Smajd@mellanox.com err = create_raw_packet_qp(dev, qp, in, pd); 14290fb2ed66Smajd@mellanox.com } else { 143019098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 14310fb2ed66Smajd@mellanox.com } 14320fb2ed66Smajd@mellanox.com 1433e126ba97SEli Cohen if (err) { 1434e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1435e126ba97SEli Cohen goto err_create; 1436e126ba97SEli Cohen } 1437e126ba97SEli Cohen 1438479163f4SAl Viro kvfree(in); 1439e126ba97SEli Cohen 144019098df2Smajd@mellanox.com base->container_mibqp = qp; 144119098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1442e126ba97SEli Cohen 1443e126ba97SEli Cohen return 0; 1444e126ba97SEli Cohen 1445e126ba97SEli Cohen err_create: 1446e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 144719098df2Smajd@mellanox.com destroy_qp_user(pd, qp, base); 1448e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1449e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1450e126ba97SEli Cohen 1451479163f4SAl Viro kvfree(in); 1452e126ba97SEli Cohen return err; 1453e126ba97SEli Cohen } 1454e126ba97SEli Cohen 1455e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1456e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1457e126ba97SEli Cohen { 1458e126ba97SEli Cohen if (send_cq) { 1459e126ba97SEli Cohen if (recv_cq) { 1460e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 1461e126ba97SEli Cohen spin_lock_irq(&send_cq->lock); 1462e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1463e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1464e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 1465e126ba97SEli Cohen spin_lock_irq(&send_cq->lock); 1466e126ba97SEli Cohen __acquire(&recv_cq->lock); 1467e126ba97SEli Cohen } else { 1468e126ba97SEli Cohen spin_lock_irq(&recv_cq->lock); 1469e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1470e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1471e126ba97SEli Cohen } 1472e126ba97SEli Cohen } else { 1473e126ba97SEli Cohen spin_lock_irq(&send_cq->lock); 14746a4f139aSEli Cohen __acquire(&recv_cq->lock); 1475e126ba97SEli Cohen } 1476e126ba97SEli Cohen } else if (recv_cq) { 1477e126ba97SEli Cohen spin_lock_irq(&recv_cq->lock); 14786a4f139aSEli Cohen __acquire(&send_cq->lock); 14796a4f139aSEli Cohen } else { 14806a4f139aSEli Cohen __acquire(&send_cq->lock); 14816a4f139aSEli Cohen __acquire(&recv_cq->lock); 1482e126ba97SEli Cohen } 1483e126ba97SEli Cohen } 1484e126ba97SEli Cohen 1485e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1486e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 1487e126ba97SEli Cohen { 1488e126ba97SEli Cohen if (send_cq) { 1489e126ba97SEli Cohen if (recv_cq) { 1490e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 1491e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 1492e126ba97SEli Cohen spin_unlock_irq(&send_cq->lock); 1493e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 1494e126ba97SEli Cohen __release(&recv_cq->lock); 1495e126ba97SEli Cohen spin_unlock_irq(&send_cq->lock); 1496e126ba97SEli Cohen } else { 1497e126ba97SEli Cohen spin_unlock(&send_cq->lock); 1498e126ba97SEli Cohen spin_unlock_irq(&recv_cq->lock); 1499e126ba97SEli Cohen } 1500e126ba97SEli Cohen } else { 15016a4f139aSEli Cohen __release(&recv_cq->lock); 1502e126ba97SEli Cohen spin_unlock_irq(&send_cq->lock); 1503e126ba97SEli Cohen } 1504e126ba97SEli Cohen } else if (recv_cq) { 15056a4f139aSEli Cohen __release(&send_cq->lock); 1506e126ba97SEli Cohen spin_unlock_irq(&recv_cq->lock); 15076a4f139aSEli Cohen } else { 15086a4f139aSEli Cohen __release(&recv_cq->lock); 15096a4f139aSEli Cohen __release(&send_cq->lock); 1510e126ba97SEli Cohen } 1511e126ba97SEli Cohen } 1512e126ba97SEli Cohen 1513e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 1514e126ba97SEli Cohen { 1515e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 1516e126ba97SEli Cohen } 1517e126ba97SEli Cohen 1518e126ba97SEli Cohen static void get_cqs(struct mlx5_ib_qp *qp, 1519e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 1520e126ba97SEli Cohen { 1521e126ba97SEli Cohen switch (qp->ibqp.qp_type) { 1522e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1523e126ba97SEli Cohen *send_cq = NULL; 1524e126ba97SEli Cohen *recv_cq = NULL; 1525e126ba97SEli Cohen break; 1526e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 1527e126ba97SEli Cohen case IB_QPT_XRC_INI: 1528e126ba97SEli Cohen *send_cq = to_mcq(qp->ibqp.send_cq); 1529e126ba97SEli Cohen *recv_cq = NULL; 1530e126ba97SEli Cohen break; 1531e126ba97SEli Cohen 1532e126ba97SEli Cohen case IB_QPT_SMI: 1533d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 1534e126ba97SEli Cohen case IB_QPT_RC: 1535e126ba97SEli Cohen case IB_QPT_UC: 1536e126ba97SEli Cohen case IB_QPT_UD: 1537e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 1538e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 15390fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 1540e126ba97SEli Cohen *send_cq = to_mcq(qp->ibqp.send_cq); 1541e126ba97SEli Cohen *recv_cq = to_mcq(qp->ibqp.recv_cq); 1542e126ba97SEli Cohen break; 1543e126ba97SEli Cohen 1544e126ba97SEli Cohen case IB_QPT_MAX: 1545e126ba97SEli Cohen default: 1546e126ba97SEli Cohen *send_cq = NULL; 1547e126ba97SEli Cohen *recv_cq = NULL; 1548e126ba97SEli Cohen break; 1549e126ba97SEli Cohen } 1550e126ba97SEli Cohen } 1551e126ba97SEli Cohen 1552ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 1553ad5f8e96Smajd@mellanox.com u16 operation); 1554ad5f8e96Smajd@mellanox.com 1555e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1556e126ba97SEli Cohen { 1557e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 155819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 15590fb2ed66Smajd@mellanox.com struct mlx5_modify_qp_mbox_in *in; 1560e126ba97SEli Cohen int err; 1561e126ba97SEli Cohen 15620fb2ed66Smajd@mellanox.com base = qp->ibqp.qp_type == IB_QPT_RAW_PACKET ? 15630fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 15640fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 15650fb2ed66Smajd@mellanox.com 1566e126ba97SEli Cohen in = kzalloc(sizeof(*in), GFP_KERNEL); 1567e126ba97SEli Cohen if (!in) 1568e126ba97SEli Cohen return; 15697bef7ad2SEli Cohen 15706aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 1571ad5f8e96Smajd@mellanox.com if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET) { 15726aec21f6SHaggai Eran mlx5_ib_qp_disable_pagefaults(qp); 1573ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 1574ad5f8e96Smajd@mellanox.com MLX5_CMD_OP_2RST_QP, in, 0, 1575ad5f8e96Smajd@mellanox.com &base->mqp); 1576ad5f8e96Smajd@mellanox.com } else { 1577ad5f8e96Smajd@mellanox.com err = modify_raw_packet_qp(dev, qp, 1578ad5f8e96Smajd@mellanox.com MLX5_CMD_OP_2RST_QP); 1579ad5f8e96Smajd@mellanox.com } 1580ad5f8e96Smajd@mellanox.com if (err) 1581427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 158219098df2Smajd@mellanox.com base->mqp.qpn); 15836aec21f6SHaggai Eran } 1584e126ba97SEli Cohen 1585e126ba97SEli Cohen get_cqs(qp, &send_cq, &recv_cq); 1586e126ba97SEli Cohen 1587e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 1588e126ba97SEli Cohen mlx5_ib_lock_cqs(send_cq, recv_cq); 158919098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 1590e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 1591e126ba97SEli Cohen if (send_cq != recv_cq) 159219098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 159319098df2Smajd@mellanox.com NULL); 1594e126ba97SEli Cohen mlx5_ib_unlock_cqs(send_cq, recv_cq); 1595e126ba97SEli Cohen } 1596e126ba97SEli Cohen 15970fb2ed66Smajd@mellanox.com if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET) { 15980fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 15990fb2ed66Smajd@mellanox.com } else { 160019098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 1601e126ba97SEli Cohen if (err) 16020fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 16030fb2ed66Smajd@mellanox.com base->mqp.qpn); 16040fb2ed66Smajd@mellanox.com } 1605e126ba97SEli Cohen 16060fb2ed66Smajd@mellanox.com kfree(in); 1607e126ba97SEli Cohen 1608e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 1609e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1610e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 161119098df2Smajd@mellanox.com destroy_qp_user(&get_pd(qp)->ibpd, qp, base); 1612e126ba97SEli Cohen } 1613e126ba97SEli Cohen 1614e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 1615e126ba97SEli Cohen { 1616e126ba97SEli Cohen switch (type) { 1617e126ba97SEli Cohen case IB_QPT_SMI: 1618e126ba97SEli Cohen return "IB_QPT_SMI"; 1619e126ba97SEli Cohen case IB_QPT_GSI: 1620e126ba97SEli Cohen return "IB_QPT_GSI"; 1621e126ba97SEli Cohen case IB_QPT_RC: 1622e126ba97SEli Cohen return "IB_QPT_RC"; 1623e126ba97SEli Cohen case IB_QPT_UC: 1624e126ba97SEli Cohen return "IB_QPT_UC"; 1625e126ba97SEli Cohen case IB_QPT_UD: 1626e126ba97SEli Cohen return "IB_QPT_UD"; 1627e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 1628e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 1629e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 1630e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 1631e126ba97SEli Cohen case IB_QPT_XRC_INI: 1632e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 1633e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1634e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 1635e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 1636e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 1637e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 1638e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 1639e126ba97SEli Cohen case IB_QPT_MAX: 1640e126ba97SEli Cohen default: 1641e126ba97SEli Cohen return "Invalid QP type"; 1642e126ba97SEli Cohen } 1643e126ba97SEli Cohen } 1644e126ba97SEli Cohen 1645e126ba97SEli Cohen struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 1646e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1647e126ba97SEli Cohen struct ib_udata *udata) 1648e126ba97SEli Cohen { 1649e126ba97SEli Cohen struct mlx5_ib_dev *dev; 1650e126ba97SEli Cohen struct mlx5_ib_qp *qp; 1651e126ba97SEli Cohen u16 xrcdn = 0; 1652e126ba97SEli Cohen int err; 1653e126ba97SEli Cohen 1654e126ba97SEli Cohen if (pd) { 1655e126ba97SEli Cohen dev = to_mdev(pd->device); 16560fb2ed66Smajd@mellanox.com 16570fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 16580fb2ed66Smajd@mellanox.com if (!pd->uobject) { 16590fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 16600fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 16610fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 16620fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 16630fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 16640fb2ed66Smajd@mellanox.com } 16650fb2ed66Smajd@mellanox.com } 166609f16cf5SMajd Dibbiny } else { 166709f16cf5SMajd Dibbiny /* being cautious here */ 166809f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 166909f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 167009f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 167109f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 167209f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 167309f16cf5SMajd Dibbiny } 167409f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 1675e126ba97SEli Cohen } 1676e126ba97SEli Cohen 1677e126ba97SEli Cohen switch (init_attr->qp_type) { 1678e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1679e126ba97SEli Cohen case IB_QPT_XRC_INI: 1680938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 1681e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 1682e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 1683e126ba97SEli Cohen } 1684e126ba97SEli Cohen init_attr->recv_cq = NULL; 1685e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 1686e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 1687e126ba97SEli Cohen init_attr->send_cq = NULL; 1688e126ba97SEli Cohen } 1689e126ba97SEli Cohen 1690e126ba97SEli Cohen /* fall through */ 16910fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 1692e126ba97SEli Cohen case IB_QPT_RC: 1693e126ba97SEli Cohen case IB_QPT_UC: 1694e126ba97SEli Cohen case IB_QPT_UD: 1695e126ba97SEli Cohen case IB_QPT_SMI: 1696d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 1697e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 1698e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 1699e126ba97SEli Cohen if (!qp) 1700e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 1701e126ba97SEli Cohen 1702e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 1703e126ba97SEli Cohen if (err) { 1704e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 1705e126ba97SEli Cohen kfree(qp); 1706e126ba97SEli Cohen return ERR_PTR(err); 1707e126ba97SEli Cohen } 1708e126ba97SEli Cohen 1709e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 1710e126ba97SEli Cohen qp->ibqp.qp_num = 0; 1711e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 1712e126ba97SEli Cohen qp->ibqp.qp_num = 1; 1713e126ba97SEli Cohen else 171419098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 1715e126ba97SEli Cohen 1716e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 171719098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 171819098df2Smajd@mellanox.com to_mcq(init_attr->recv_cq)->mcq.cqn, 1719e126ba97SEli Cohen to_mcq(init_attr->send_cq)->mcq.cqn); 1720e126ba97SEli Cohen 172119098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 1722e126ba97SEli Cohen 1723e126ba97SEli Cohen break; 1724e126ba97SEli Cohen 1725d16e91daSHaggai Eran case IB_QPT_GSI: 1726d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 1727d16e91daSHaggai Eran 1728e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 1729e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 1730e126ba97SEli Cohen case IB_QPT_MAX: 1731e126ba97SEli Cohen default: 1732e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 1733e126ba97SEli Cohen init_attr->qp_type); 1734e126ba97SEli Cohen /* Don't support raw QPs */ 1735e126ba97SEli Cohen return ERR_PTR(-EINVAL); 1736e126ba97SEli Cohen } 1737e126ba97SEli Cohen 1738e126ba97SEli Cohen return &qp->ibqp; 1739e126ba97SEli Cohen } 1740e126ba97SEli Cohen 1741e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 1742e126ba97SEli Cohen { 1743e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 1744e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 1745e126ba97SEli Cohen 1746d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 1747d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 1748d16e91daSHaggai Eran 1749e126ba97SEli Cohen destroy_qp_common(dev, mqp); 1750e126ba97SEli Cohen 1751e126ba97SEli Cohen kfree(mqp); 1752e126ba97SEli Cohen 1753e126ba97SEli Cohen return 0; 1754e126ba97SEli Cohen } 1755e126ba97SEli Cohen 1756e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 1757e126ba97SEli Cohen int attr_mask) 1758e126ba97SEli Cohen { 1759e126ba97SEli Cohen u32 hw_access_flags = 0; 1760e126ba97SEli Cohen u8 dest_rd_atomic; 1761e126ba97SEli Cohen u32 access_flags; 1762e126ba97SEli Cohen 1763e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 1764e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 1765e126ba97SEli Cohen else 176619098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 1767e126ba97SEli Cohen 1768e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 1769e126ba97SEli Cohen access_flags = attr->qp_access_flags; 1770e126ba97SEli Cohen else 177119098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 1772e126ba97SEli Cohen 1773e126ba97SEli Cohen if (!dest_rd_atomic) 1774e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 1775e126ba97SEli Cohen 1776e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 1777e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 1778e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 1779e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 1780e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 1781e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 1782e126ba97SEli Cohen 1783e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 1784e126ba97SEli Cohen } 1785e126ba97SEli Cohen 1786e126ba97SEli Cohen enum { 1787e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 1788e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 1789e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 1790e126ba97SEli Cohen }; 1791e126ba97SEli Cohen 1792e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 1793e126ba97SEli Cohen { 1794e126ba97SEli Cohen if (rate == IB_RATE_PORT_CURRENT) { 1795e126ba97SEli Cohen return 0; 1796e126ba97SEli Cohen } else if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) { 1797e126ba97SEli Cohen return -EINVAL; 1798e126ba97SEli Cohen } else { 1799e126ba97SEli Cohen while (rate != IB_RATE_2_5_GBPS && 1800e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 1801938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 1802e126ba97SEli Cohen --rate; 1803e126ba97SEli Cohen } 1804e126ba97SEli Cohen 1805e126ba97SEli Cohen return rate + MLX5_STAT_RATE_OFFSET; 1806e126ba97SEli Cohen } 1807e126ba97SEli Cohen 180875850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 180975850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 181075850d0bSmajd@mellanox.com { 181175850d0bSmajd@mellanox.com void *in; 181275850d0bSmajd@mellanox.com void *tisc; 181375850d0bSmajd@mellanox.com int inlen; 181475850d0bSmajd@mellanox.com int err; 181575850d0bSmajd@mellanox.com 181675850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 181775850d0bSmajd@mellanox.com in = mlx5_vzalloc(inlen); 181875850d0bSmajd@mellanox.com if (!in) 181975850d0bSmajd@mellanox.com return -ENOMEM; 182075850d0bSmajd@mellanox.com 182175850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 182275850d0bSmajd@mellanox.com 182375850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 182475850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 182575850d0bSmajd@mellanox.com 182675850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 182775850d0bSmajd@mellanox.com 182875850d0bSmajd@mellanox.com kvfree(in); 182975850d0bSmajd@mellanox.com 183075850d0bSmajd@mellanox.com return err; 183175850d0bSmajd@mellanox.com } 183275850d0bSmajd@mellanox.com 183375850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 183475850d0bSmajd@mellanox.com const struct ib_ah_attr *ah, 1835e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 1836e126ba97SEli Cohen u32 path_flags, const struct ib_qp_attr *attr) 1837e126ba97SEli Cohen { 18382811ba51SAchiad Shochat enum rdma_link_layer ll = rdma_port_get_link_layer(&dev->ib_dev, port); 1839e126ba97SEli Cohen int err; 1840e126ba97SEli Cohen 1841e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 1842e126ba97SEli Cohen path->pkey_index = attr->pkey_index; 1843e126ba97SEli Cohen 1844e126ba97SEli Cohen if (ah->ah_flags & IB_AH_GRH) { 1845938fe83cSSaeed Mahameed if (ah->grh.sgid_index >= 1846938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 1847f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 1848938fe83cSSaeed Mahameed ah->grh.sgid_index, 1849938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 1850f83b4263SEli Cohen return -EINVAL; 1851f83b4263SEli Cohen } 18522811ba51SAchiad Shochat } 18532811ba51SAchiad Shochat 18542811ba51SAchiad Shochat if (ll == IB_LINK_LAYER_ETHERNET) { 18552811ba51SAchiad Shochat if (!(ah->ah_flags & IB_AH_GRH)) 18562811ba51SAchiad Shochat return -EINVAL; 18572811ba51SAchiad Shochat memcpy(path->rmac, ah->dmac, sizeof(ah->dmac)); 18582811ba51SAchiad Shochat path->udp_sport = mlx5_get_roce_udp_sport(dev, port, 18592811ba51SAchiad Shochat ah->grh.sgid_index); 18602811ba51SAchiad Shochat path->dci_cfi_prio_sl = (ah->sl & 0x7) << 4; 18612811ba51SAchiad Shochat } else { 18622811ba51SAchiad Shochat path->fl = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 18632811ba51SAchiad Shochat path->free_ar = (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x80 : 18642811ba51SAchiad Shochat 0; 18652811ba51SAchiad Shochat path->rlid = cpu_to_be16(ah->dlid); 18662811ba51SAchiad Shochat path->grh_mlid = ah->src_path_bits & 0x7f; 18672811ba51SAchiad Shochat if (ah->ah_flags & IB_AH_GRH) 1868e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 18692811ba51SAchiad Shochat path->dci_cfi_prio_sl = ah->sl & 0xf; 18702811ba51SAchiad Shochat } 18712811ba51SAchiad Shochat 18722811ba51SAchiad Shochat if (ah->ah_flags & IB_AH_GRH) { 1873e126ba97SEli Cohen path->mgid_index = ah->grh.sgid_index; 1874e126ba97SEli Cohen path->hop_limit = ah->grh.hop_limit; 1875e126ba97SEli Cohen path->tclass_flowlabel = 1876e126ba97SEli Cohen cpu_to_be32((ah->grh.traffic_class << 20) | 1877e126ba97SEli Cohen (ah->grh.flow_label)); 1878e126ba97SEli Cohen memcpy(path->rgid, ah->grh.dgid.raw, 16); 1879e126ba97SEli Cohen } 1880e126ba97SEli Cohen 1881e126ba97SEli Cohen err = ib_rate_to_mlx5(dev, ah->static_rate); 1882e126ba97SEli Cohen if (err < 0) 1883e126ba97SEli Cohen return err; 1884e126ba97SEli Cohen path->static_rate = err; 1885e126ba97SEli Cohen path->port = port; 1886e126ba97SEli Cohen 1887e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 1888e126ba97SEli Cohen path->ackto_lt = attr->timeout << 3; 1889e126ba97SEli Cohen 189075850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 189175850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 189275850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 189375850d0bSmajd@mellanox.com ah->sl & 0xf); 189475850d0bSmajd@mellanox.com 1895e126ba97SEli Cohen return 0; 1896e126ba97SEli Cohen } 1897e126ba97SEli Cohen 1898e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 1899e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 1900e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 1901e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 1902e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 1903e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 1904e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 1905e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 1906e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 1907e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 1908e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 1909e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 1910e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 1911e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 1912e126ba97SEli Cohen }, 1913e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 1914e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 1915e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 1916e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 1917e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 1918e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 1919e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 1920e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 1921e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 1922e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 1923e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 1924e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 1925e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 1926a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 1927a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 1928a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 1929a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 1930a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 1931e126ba97SEli Cohen }, 1932e126ba97SEli Cohen }, 1933e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 1934e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 1935e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 1936e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 1937e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 1938e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 1939e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 1940e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 1941e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 1942e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 1943e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 1944e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 1945e126ba97SEli Cohen }, 1946e126ba97SEli Cohen }, 1947e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 1948e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 1949e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 1950e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 1951e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 1952e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 1953c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 1954c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 1955e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 1956c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 1957c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 1958e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 1959e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 1960e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 1961e126ba97SEli Cohen }, 1962e126ba97SEli Cohen }, 1963e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 1964e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 1965e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 1966e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 196775959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 1968a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 1969a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 1970a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 1971a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 1972e126ba97SEli Cohen }, 1973e126ba97SEli Cohen }, 1974e126ba97SEli Cohen }; 1975e126ba97SEli Cohen 1976e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 1977e126ba97SEli Cohen { 1978e126ba97SEli Cohen switch (ib_mask) { 1979e126ba97SEli Cohen case IB_QP_STATE: 1980e126ba97SEli Cohen return 0; 1981e126ba97SEli Cohen case IB_QP_CUR_STATE: 1982e126ba97SEli Cohen return 0; 1983e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 1984e126ba97SEli Cohen return 0; 1985e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 1986e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 1987e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 1988e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 1989e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 1990e126ba97SEli Cohen case IB_QP_PORT: 1991e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 1992e126ba97SEli Cohen case IB_QP_QKEY: 1993e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 1994e126ba97SEli Cohen case IB_QP_AV: 1995e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 1996e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 1997e126ba97SEli Cohen case IB_QP_PATH_MTU: 1998e126ba97SEli Cohen return 0; 1999e126ba97SEli Cohen case IB_QP_TIMEOUT: 2000e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2001e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2002e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2003e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2004e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2005e126ba97SEli Cohen case IB_QP_RQ_PSN: 2006e126ba97SEli Cohen return 0; 2007e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2008e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2009e126ba97SEli Cohen case IB_QP_ALT_PATH: 2010e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2011e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2012e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2013e126ba97SEli Cohen case IB_QP_SQ_PSN: 2014e126ba97SEli Cohen return 0; 2015e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2016e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2017e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2018e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2019e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2020e126ba97SEli Cohen case IB_QP_CAP: 2021e126ba97SEli Cohen return 0; 2022e126ba97SEli Cohen case IB_QP_DEST_QPN: 2023e126ba97SEli Cohen return 0; 2024e126ba97SEli Cohen } 2025e126ba97SEli Cohen return 0; 2026e126ba97SEli Cohen } 2027e126ba97SEli Cohen 2028e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2029e126ba97SEli Cohen { 2030e126ba97SEli Cohen int result = 0; 2031e126ba97SEli Cohen int i; 2032e126ba97SEli Cohen 2033e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2034e126ba97SEli Cohen if ((1 << i) & ib_mask) 2035e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2036e126ba97SEli Cohen } 2037e126ba97SEli Cohen 2038e126ba97SEli Cohen return result; 2039e126ba97SEli Cohen } 2040e126ba97SEli Cohen 2041ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_rq(struct mlx5_core_dev *dev, 2042ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq, int new_state) 2043ad5f8e96Smajd@mellanox.com { 2044ad5f8e96Smajd@mellanox.com void *in; 2045ad5f8e96Smajd@mellanox.com void *rqc; 2046ad5f8e96Smajd@mellanox.com int inlen; 2047ad5f8e96Smajd@mellanox.com int err; 2048ad5f8e96Smajd@mellanox.com 2049ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 2050ad5f8e96Smajd@mellanox.com in = mlx5_vzalloc(inlen); 2051ad5f8e96Smajd@mellanox.com if (!in) 2052ad5f8e96Smajd@mellanox.com return -ENOMEM; 2053ad5f8e96Smajd@mellanox.com 2054ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2055ad5f8e96Smajd@mellanox.com 2056ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2057ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2058ad5f8e96Smajd@mellanox.com 2059ad5f8e96Smajd@mellanox.com err = mlx5_core_modify_rq(dev, rq->base.mqp.qpn, in, inlen); 2060ad5f8e96Smajd@mellanox.com if (err) 2061ad5f8e96Smajd@mellanox.com goto out; 2062ad5f8e96Smajd@mellanox.com 2063ad5f8e96Smajd@mellanox.com rq->state = new_state; 2064ad5f8e96Smajd@mellanox.com 2065ad5f8e96Smajd@mellanox.com out: 2066ad5f8e96Smajd@mellanox.com kvfree(in); 2067ad5f8e96Smajd@mellanox.com return err; 2068ad5f8e96Smajd@mellanox.com } 2069ad5f8e96Smajd@mellanox.com 2070ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 2071ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq, int new_state) 2072ad5f8e96Smajd@mellanox.com { 2073ad5f8e96Smajd@mellanox.com void *in; 2074ad5f8e96Smajd@mellanox.com void *sqc; 2075ad5f8e96Smajd@mellanox.com int inlen; 2076ad5f8e96Smajd@mellanox.com int err; 2077ad5f8e96Smajd@mellanox.com 2078ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 2079ad5f8e96Smajd@mellanox.com in = mlx5_vzalloc(inlen); 2080ad5f8e96Smajd@mellanox.com if (!in) 2081ad5f8e96Smajd@mellanox.com return -ENOMEM; 2082ad5f8e96Smajd@mellanox.com 2083ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2084ad5f8e96Smajd@mellanox.com 2085ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2086ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2087ad5f8e96Smajd@mellanox.com 2088ad5f8e96Smajd@mellanox.com err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 2089ad5f8e96Smajd@mellanox.com if (err) 2090ad5f8e96Smajd@mellanox.com goto out; 2091ad5f8e96Smajd@mellanox.com 2092ad5f8e96Smajd@mellanox.com sq->state = new_state; 2093ad5f8e96Smajd@mellanox.com 2094ad5f8e96Smajd@mellanox.com out: 2095ad5f8e96Smajd@mellanox.com kvfree(in); 2096ad5f8e96Smajd@mellanox.com return err; 2097ad5f8e96Smajd@mellanox.com } 2098ad5f8e96Smajd@mellanox.com 2099ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 2100ad5f8e96Smajd@mellanox.com u16 operation) 2101ad5f8e96Smajd@mellanox.com { 2102ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2103ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2104ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 2105ad5f8e96Smajd@mellanox.com int rq_state; 2106ad5f8e96Smajd@mellanox.com int sq_state; 2107ad5f8e96Smajd@mellanox.com int err; 2108ad5f8e96Smajd@mellanox.com 2109ad5f8e96Smajd@mellanox.com switch (operation) { 2110ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2111ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2112ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2113ad5f8e96Smajd@mellanox.com break; 2114ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2115ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2116ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2117ad5f8e96Smajd@mellanox.com break; 2118ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2119ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2120ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2121ad5f8e96Smajd@mellanox.com break; 2122ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_INIT2INIT_QP: 2123ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_INIT2RTR_QP: 2124ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2125ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 2126ad5f8e96Smajd@mellanox.com /* Nothing to do here... */ 2127ad5f8e96Smajd@mellanox.com return 0; 2128ad5f8e96Smajd@mellanox.com default: 2129ad5f8e96Smajd@mellanox.com WARN_ON(1); 2130ad5f8e96Smajd@mellanox.com return -EINVAL; 2131ad5f8e96Smajd@mellanox.com } 2132ad5f8e96Smajd@mellanox.com 2133ad5f8e96Smajd@mellanox.com if (qp->rq.wqe_cnt) { 2134ad5f8e96Smajd@mellanox.com err = modify_raw_packet_qp_rq(dev->mdev, rq, rq_state); 2135ad5f8e96Smajd@mellanox.com if (err) 2136ad5f8e96Smajd@mellanox.com return err; 2137ad5f8e96Smajd@mellanox.com } 2138ad5f8e96Smajd@mellanox.com 2139ad5f8e96Smajd@mellanox.com if (qp->sq.wqe_cnt) 2140ad5f8e96Smajd@mellanox.com return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state); 2141ad5f8e96Smajd@mellanox.com 2142ad5f8e96Smajd@mellanox.com return 0; 2143ad5f8e96Smajd@mellanox.com } 2144ad5f8e96Smajd@mellanox.com 2145e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2146e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 2147e126ba97SEli Cohen enum ib_qp_state cur_state, enum ib_qp_state new_state) 2148e126ba97SEli Cohen { 2149427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2150427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2151427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2152427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2153427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2154427c1e7bSmajd@mellanox.com }, 2155427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2156427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2157427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2158427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2159427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2160427c1e7bSmajd@mellanox.com }, 2161427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2162427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2163427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2164427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2165427c1e7bSmajd@mellanox.com }, 2166427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2167427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2168427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2169427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2170427c1e7bSmajd@mellanox.com }, 2171427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2172427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2173427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2174427c1e7bSmajd@mellanox.com }, 2175427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2176427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2177427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2178427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2179427c1e7bSmajd@mellanox.com }, 2180427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2181427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2182427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2183427c1e7bSmajd@mellanox.com } 2184427c1e7bSmajd@mellanox.com }; 2185427c1e7bSmajd@mellanox.com 2186e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2187e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 218819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2189e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2190e126ba97SEli Cohen struct mlx5_qp_context *context; 2191e126ba97SEli Cohen struct mlx5_modify_qp_mbox_in *in; 2192e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2193e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2194e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2195e126ba97SEli Cohen int sqd_event; 2196e126ba97SEli Cohen int mlx5_st; 2197e126ba97SEli Cohen int err; 2198427c1e7bSmajd@mellanox.com u16 op; 2199e126ba97SEli Cohen 2200e126ba97SEli Cohen in = kzalloc(sizeof(*in), GFP_KERNEL); 2201e126ba97SEli Cohen if (!in) 2202e126ba97SEli Cohen return -ENOMEM; 2203e126ba97SEli Cohen 2204e126ba97SEli Cohen context = &in->ctx; 2205e126ba97SEli Cohen err = to_mlx5_st(ibqp->qp_type); 2206158abf86SHaggai Eran if (err < 0) { 2207158abf86SHaggai Eran mlx5_ib_dbg(dev, "unsupported qp type %d\n", ibqp->qp_type); 2208e126ba97SEli Cohen goto out; 2209158abf86SHaggai Eran } 2210e126ba97SEli Cohen 2211e126ba97SEli Cohen context->flags = cpu_to_be32(err << 16); 2212e126ba97SEli Cohen 2213e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 2214e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2215e126ba97SEli Cohen } else { 2216e126ba97SEli Cohen switch (attr->path_mig_state) { 2217e126ba97SEli Cohen case IB_MIG_MIGRATED: 2218e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2219e126ba97SEli Cohen break; 2220e126ba97SEli Cohen case IB_MIG_REARM: 2221e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 2222e126ba97SEli Cohen break; 2223e126ba97SEli Cohen case IB_MIG_ARMED: 2224e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 2225e126ba97SEli Cohen break; 2226e126ba97SEli Cohen } 2227e126ba97SEli Cohen } 2228e126ba97SEli Cohen 2229d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 2230e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 2231e126ba97SEli Cohen } else if (ibqp->qp_type == IB_QPT_UD || 2232e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 2233e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 2234e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 2235e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 2236e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 2237e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 2238e126ba97SEli Cohen err = -EINVAL; 2239e126ba97SEli Cohen goto out; 2240e126ba97SEli Cohen } 2241938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 2242938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 2243e126ba97SEli Cohen } 2244e126ba97SEli Cohen 2245e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 2246e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 2247e126ba97SEli Cohen 2248e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2249e126ba97SEli Cohen context->pri_path.pkey_index = attr->pkey_index; 2250e126ba97SEli Cohen 2251e126ba97SEli Cohen /* todo implement counter_index functionality */ 2252e126ba97SEli Cohen 2253e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 2254e126ba97SEli Cohen context->pri_path.port = qp->port; 2255e126ba97SEli Cohen 2256e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 2257e126ba97SEli Cohen context->pri_path.port = attr->port_num; 2258e126ba97SEli Cohen 2259e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 226075850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 2261e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 2262e126ba97SEli Cohen attr_mask, 0, attr); 2263e126ba97SEli Cohen if (err) 2264e126ba97SEli Cohen goto out; 2265e126ba97SEli Cohen } 2266e126ba97SEli Cohen 2267e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2268e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 2269e126ba97SEli Cohen 2270e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 227175850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 227275850d0bSmajd@mellanox.com &context->alt_path, 2273e126ba97SEli Cohen attr->alt_port_num, attr_mask, 0, attr); 2274e126ba97SEli Cohen if (err) 2275e126ba97SEli Cohen goto out; 2276e126ba97SEli Cohen } 2277e126ba97SEli Cohen 2278e126ba97SEli Cohen pd = get_pd(qp); 2279e126ba97SEli Cohen get_cqs(qp, &send_cq, &recv_cq); 2280e126ba97SEli Cohen 2281e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 2282e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 2283e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 2284e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 2285e126ba97SEli Cohen 2286e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 2287e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 2288e126ba97SEli Cohen 2289e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 2290e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 2291e126ba97SEli Cohen 2292e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 2293e126ba97SEli Cohen if (attr->max_rd_atomic) 2294e126ba97SEli Cohen context->params1 |= 2295e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 2296e126ba97SEli Cohen } 2297e126ba97SEli Cohen 2298e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 2299e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 2300e126ba97SEli Cohen 2301e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 2302e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 2303e126ba97SEli Cohen context->params2 |= 2304e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 2305e126ba97SEli Cohen } 2306e126ba97SEli Cohen 2307e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 2308e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 2309e126ba97SEli Cohen 2310e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 2311e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 2312e126ba97SEli Cohen 2313e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 2314e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 2315e126ba97SEli Cohen 2316e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 2317e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 2318e126ba97SEli Cohen 2319e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 2320e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 2321e126ba97SEli Cohen 2322e126ba97SEli Cohen if (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD && 2323e126ba97SEli Cohen attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY && attr->en_sqd_async_notify) 2324e126ba97SEli Cohen sqd_event = 1; 2325e126ba97SEli Cohen else 2326e126ba97SEli Cohen sqd_event = 0; 2327e126ba97SEli Cohen 2328e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 2329e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 2330e126ba97SEli Cohen 2331b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 2332b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 2333e126ba97SEli Cohen 2334e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 2335e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 2336e126ba97SEli Cohen mlx5_st = to_mlx5_st(ibqp->qp_type); 233707c9113fSEli Cohen if (mlx5_st < 0) 2338e126ba97SEli Cohen goto out; 2339e126ba97SEli Cohen 23406aec21f6SHaggai Eran /* If moving to a reset or error state, we must disable page faults on 23416aec21f6SHaggai Eran * this QP and flush all current page faults. Otherwise a stale page 23426aec21f6SHaggai Eran * fault may attempt to work on this QP after it is reset and moved 23436aec21f6SHaggai Eran * again to RTS, and may cause the driver and the device to get out of 23446aec21f6SHaggai Eran * sync. */ 23456aec21f6SHaggai Eran if (cur_state != IB_QPS_RESET && cur_state != IB_QPS_ERR && 2346ad5f8e96Smajd@mellanox.com (new_state == IB_QPS_RESET || new_state == IB_QPS_ERR) && 2347ad5f8e96Smajd@mellanox.com (qp->ibqp.qp_type != IB_QPT_RAW_PACKET)) 23486aec21f6SHaggai Eran mlx5_ib_qp_disable_pagefaults(qp); 23496aec21f6SHaggai Eran 2350427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 2351427c1e7bSmajd@mellanox.com !optab[mlx5_cur][mlx5_new]) 2352427c1e7bSmajd@mellanox.com goto out; 2353427c1e7bSmajd@mellanox.com 2354427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 2355e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 2356e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 2357e126ba97SEli Cohen in->optparam = cpu_to_be32(optpar); 2358ad5f8e96Smajd@mellanox.com 2359ad5f8e96Smajd@mellanox.com if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET) 2360ad5f8e96Smajd@mellanox.com err = modify_raw_packet_qp(dev, qp, op); 2361ad5f8e96Smajd@mellanox.com else 2362427c1e7bSmajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, op, in, sqd_event, 236319098df2Smajd@mellanox.com &base->mqp); 2364e126ba97SEli Cohen if (err) 2365e126ba97SEli Cohen goto out; 2366e126ba97SEli Cohen 2367ad5f8e96Smajd@mellanox.com if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT && 2368ad5f8e96Smajd@mellanox.com (qp->ibqp.qp_type != IB_QPT_RAW_PACKET)) 23696aec21f6SHaggai Eran mlx5_ib_qp_enable_pagefaults(qp); 23706aec21f6SHaggai Eran 2371e126ba97SEli Cohen qp->state = new_state; 2372e126ba97SEli Cohen 2373e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 237419098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 2375e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 237619098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 2377e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 2378e126ba97SEli Cohen qp->port = attr->port_num; 2379e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 238019098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 2381e126ba97SEli Cohen 2382e126ba97SEli Cohen /* 2383e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 2384e126ba97SEli Cohen * entries and reinitialize the QP. 2385e126ba97SEli Cohen */ 2386e126ba97SEli Cohen if (new_state == IB_QPS_RESET && !ibqp->uobject) { 238719098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2388e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 2389e126ba97SEli Cohen if (send_cq != recv_cq) 239019098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 2391e126ba97SEli Cohen 2392e126ba97SEli Cohen qp->rq.head = 0; 2393e126ba97SEli Cohen qp->rq.tail = 0; 2394e126ba97SEli Cohen qp->sq.head = 0; 2395e126ba97SEli Cohen qp->sq.tail = 0; 2396e126ba97SEli Cohen qp->sq.cur_post = 0; 2397e126ba97SEli Cohen qp->sq.last_poll = 0; 2398e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 2399e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 2400e126ba97SEli Cohen } 2401e126ba97SEli Cohen 2402e126ba97SEli Cohen out: 2403e126ba97SEli Cohen kfree(in); 2404e126ba97SEli Cohen return err; 2405e126ba97SEli Cohen } 2406e126ba97SEli Cohen 2407e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 2408e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 2409e126ba97SEli Cohen { 2410e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2411e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 2412d16e91daSHaggai Eran enum ib_qp_type qp_type; 2413e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 2414e126ba97SEli Cohen int err = -EINVAL; 2415e126ba97SEli Cohen int port; 24162811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 2417e126ba97SEli Cohen 2418d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 2419d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 2420d16e91daSHaggai Eran 2421d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 2422d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 2423d16e91daSHaggai Eran 2424e126ba97SEli Cohen mutex_lock(&qp->mutex); 2425e126ba97SEli Cohen 2426e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 2427e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 2428e126ba97SEli Cohen 24292811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 24302811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 24312811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 24322811ba51SAchiad Shochat } 24332811ba51SAchiad Shochat 2434d16e91daSHaggai Eran if (qp_type != MLX5_IB_QPT_REG_UMR && 2435d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 2436158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 2437158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 2438e126ba97SEli Cohen goto out; 2439158abf86SHaggai Eran } 2440e126ba97SEli Cohen 2441e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 2442938fe83cSSaeed Mahameed (attr->port_num == 0 || 2443158abf86SHaggai Eran attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports))) { 2444158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 2445158abf86SHaggai Eran attr->port_num, dev->num_ports); 2446e126ba97SEli Cohen goto out; 2447158abf86SHaggai Eran } 2448e126ba97SEli Cohen 2449e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 2450e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 2451938fe83cSSaeed Mahameed if (attr->pkey_index >= 2452158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 2453158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 2454158abf86SHaggai Eran attr->pkey_index); 2455e126ba97SEli Cohen goto out; 2456e126ba97SEli Cohen } 2457158abf86SHaggai Eran } 2458e126ba97SEli Cohen 2459e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 2460938fe83cSSaeed Mahameed attr->max_rd_atomic > 2461158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 2462158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 2463158abf86SHaggai Eran attr->max_rd_atomic); 2464e126ba97SEli Cohen goto out; 2465158abf86SHaggai Eran } 2466e126ba97SEli Cohen 2467e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 2468938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 2469158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 2470158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 2471158abf86SHaggai Eran attr->max_dest_rd_atomic); 2472e126ba97SEli Cohen goto out; 2473158abf86SHaggai Eran } 2474e126ba97SEli Cohen 2475e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 2476e126ba97SEli Cohen err = 0; 2477e126ba97SEli Cohen goto out; 2478e126ba97SEli Cohen } 2479e126ba97SEli Cohen 2480e126ba97SEli Cohen err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); 2481e126ba97SEli Cohen 2482e126ba97SEli Cohen out: 2483e126ba97SEli Cohen mutex_unlock(&qp->mutex); 2484e126ba97SEli Cohen return err; 2485e126ba97SEli Cohen } 2486e126ba97SEli Cohen 2487e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 2488e126ba97SEli Cohen { 2489e126ba97SEli Cohen struct mlx5_ib_cq *cq; 2490e126ba97SEli Cohen unsigned cur; 2491e126ba97SEli Cohen 2492e126ba97SEli Cohen cur = wq->head - wq->tail; 2493e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 2494e126ba97SEli Cohen return 0; 2495e126ba97SEli Cohen 2496e126ba97SEli Cohen cq = to_mcq(ib_cq); 2497e126ba97SEli Cohen spin_lock(&cq->lock); 2498e126ba97SEli Cohen cur = wq->head - wq->tail; 2499e126ba97SEli Cohen spin_unlock(&cq->lock); 2500e126ba97SEli Cohen 2501e126ba97SEli Cohen return cur + nreq >= wq->max_post; 2502e126ba97SEli Cohen } 2503e126ba97SEli Cohen 2504e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 2505e126ba97SEli Cohen u64 remote_addr, u32 rkey) 2506e126ba97SEli Cohen { 2507e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 2508e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 2509e126ba97SEli Cohen rseg->reserved = 0; 2510e126ba97SEli Cohen } 2511e126ba97SEli Cohen 2512f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 2513f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 2514f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 2515f0313965SErez Shitrit { 2516f0313965SErez Shitrit void *seg = eseg; 2517f0313965SErez Shitrit 2518f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 2519f0313965SErez Shitrit 2520f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 2521f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 2522f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 2523f0313965SErez Shitrit 2524f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 2525f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 2526f0313965SErez Shitrit 2527f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 2528f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 2529f0313965SErez Shitrit int size_of_inl_hdr_start = sizeof(eseg->inline_hdr_start); 2530f0313965SErez Shitrit u64 left, leftlen, copysz; 2531f0313965SErez Shitrit void *pdata = ud_wr->header; 2532f0313965SErez Shitrit 2533f0313965SErez Shitrit left = ud_wr->hlen; 2534f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 2535f0313965SErez Shitrit eseg->inline_hdr_sz = cpu_to_be16(left); 2536f0313965SErez Shitrit 2537f0313965SErez Shitrit /* 2538f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 2539f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 2540f0313965SErez Shitrit * rollback and than the copy the left 2541f0313965SErez Shitrit */ 2542f0313965SErez Shitrit leftlen = qend - (void *)eseg->inline_hdr_start; 2543f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 2544f0313965SErez Shitrit 2545f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 2546f0313965SErez Shitrit 2547f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 2548f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 2549f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 2550f0313965SErez Shitrit } 2551f0313965SErez Shitrit 2552f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 2553f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 2554f0313965SErez Shitrit left -= copysz; 2555f0313965SErez Shitrit pdata += copysz; 2556f0313965SErez Shitrit memcpy(seg, pdata, left); 2557f0313965SErez Shitrit seg += ALIGN(left, 16); 2558f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 2559f0313965SErez Shitrit } 2560f0313965SErez Shitrit } 2561f0313965SErez Shitrit 2562f0313965SErez Shitrit return seg; 2563f0313965SErez Shitrit } 2564f0313965SErez Shitrit 2565e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 2566e126ba97SEli Cohen struct ib_send_wr *wr) 2567e126ba97SEli Cohen { 2568e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 2569e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 2570e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 2571e126ba97SEli Cohen } 2572e126ba97SEli Cohen 2573e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 2574e126ba97SEli Cohen { 2575e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 2576e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 2577e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 2578e126ba97SEli Cohen } 2579e126ba97SEli Cohen 2580e126ba97SEli Cohen static __be16 get_klm_octo(int npages) 2581e126ba97SEli Cohen { 2582e126ba97SEli Cohen return cpu_to_be16(ALIGN(npages, 8) / 2); 2583e126ba97SEli Cohen } 2584e126ba97SEli Cohen 2585e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 2586e126ba97SEli Cohen { 2587e126ba97SEli Cohen u64 result; 2588e126ba97SEli Cohen 2589e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 2590e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 2591e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 2592e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 2593e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 2594e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 2595e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 2596e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 2597e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 2598e126ba97SEli Cohen MLX5_MKEY_MASK_A | 2599e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 2600e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 2601e126ba97SEli Cohen 2602e126ba97SEli Cohen return cpu_to_be64(result); 2603e126ba97SEli Cohen } 2604e126ba97SEli Cohen 2605e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 2606e6631814SSagi Grimberg { 2607e6631814SSagi Grimberg u64 result; 2608e6631814SSagi Grimberg 2609e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 2610e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 2611e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 2612d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 2613e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 2614e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 2615e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 2616e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 2617e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 2618e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 2619e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 2620e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 2621e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 2622e6631814SSagi Grimberg 2623e6631814SSagi Grimberg return cpu_to_be64(result); 2624e6631814SSagi Grimberg } 2625e6631814SSagi Grimberg 26268a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 26278a187ee5SSagi Grimberg struct mlx5_ib_mr *mr) 26288a187ee5SSagi Grimberg { 26298a187ee5SSagi Grimberg int ndescs = mr->ndescs; 26308a187ee5SSagi Grimberg 26318a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 26328a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 26338a187ee5SSagi Grimberg umr->klm_octowords = get_klm_octo(ndescs); 26348a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 26358a187ee5SSagi Grimberg } 26368a187ee5SSagi Grimberg 2637dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 2638e126ba97SEli Cohen { 2639e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 2640e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 2641e126ba97SEli Cohen umr->flags = 1 << 7; 2642e126ba97SEli Cohen } 2643e126ba97SEli Cohen 2644968e78ddSHaggai Eran static __be64 get_umr_reg_mr_mask(void) 2645e126ba97SEli Cohen { 2646968e78ddSHaggai Eran u64 result; 2647e126ba97SEli Cohen 2648968e78ddSHaggai Eran result = MLX5_MKEY_MASK_LEN | 2649e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 2650e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 2651e126ba97SEli Cohen MLX5_MKEY_MASK_PD | 2652e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 2653e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 2654746b5583SEli Cohen MLX5_MKEY_MASK_KEY | 2655e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 2656e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 2657e126ba97SEli Cohen MLX5_MKEY_MASK_A | 2658e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 2659968e78ddSHaggai Eran 2660968e78ddSHaggai Eran return cpu_to_be64(result); 2661968e78ddSHaggai Eran } 2662968e78ddSHaggai Eran 2663968e78ddSHaggai Eran static __be64 get_umr_unreg_mr_mask(void) 2664968e78ddSHaggai Eran { 2665968e78ddSHaggai Eran u64 result; 2666968e78ddSHaggai Eran 2667968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 2668968e78ddSHaggai Eran 2669968e78ddSHaggai Eran return cpu_to_be64(result); 2670968e78ddSHaggai Eran } 2671968e78ddSHaggai Eran 2672968e78ddSHaggai Eran static __be64 get_umr_update_mtt_mask(void) 2673968e78ddSHaggai Eran { 2674968e78ddSHaggai Eran u64 result; 2675968e78ddSHaggai Eran 2676968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 2677968e78ddSHaggai Eran 2678968e78ddSHaggai Eran return cpu_to_be64(result); 2679968e78ddSHaggai Eran } 2680968e78ddSHaggai Eran 2681968e78ddSHaggai Eran static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 2682968e78ddSHaggai Eran struct ib_send_wr *wr) 2683968e78ddSHaggai Eran { 2684e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 2685968e78ddSHaggai Eran 2686968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 2687968e78ddSHaggai Eran 2688968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 2689968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 2690968e78ddSHaggai Eran else 2691968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 2692968e78ddSHaggai Eran 2693968e78ddSHaggai Eran if (!(wr->send_flags & MLX5_IB_SEND_UMR_UNREG)) { 2694968e78ddSHaggai Eran umr->klm_octowords = get_klm_octo(umrwr->npages); 2695968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_MTT) { 2696968e78ddSHaggai Eran umr->mkey_mask = get_umr_update_mtt_mask(); 2697968e78ddSHaggai Eran umr->bsf_octowords = get_klm_octo(umrwr->target.offset); 2698968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 2699e126ba97SEli Cohen } else { 2700968e78ddSHaggai Eran umr->mkey_mask = get_umr_reg_mr_mask(); 2701968e78ddSHaggai Eran } 2702968e78ddSHaggai Eran } else { 2703968e78ddSHaggai Eran umr->mkey_mask = get_umr_unreg_mr_mask(); 2704e126ba97SEli Cohen } 2705e126ba97SEli Cohen 2706e126ba97SEli Cohen if (!wr->num_sge) 2707968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 2708e126ba97SEli Cohen } 2709e126ba97SEli Cohen 2710e126ba97SEli Cohen static u8 get_umr_flags(int acc) 2711e126ba97SEli Cohen { 2712e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 2713e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 2714e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 2715e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 27162ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 2717e126ba97SEli Cohen } 2718e126ba97SEli Cohen 27198a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 27208a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 27218a187ee5SSagi Grimberg u32 key, int access) 27228a187ee5SSagi Grimberg { 27238a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 27248a187ee5SSagi Grimberg 27258a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 27268a187ee5SSagi Grimberg seg->flags = get_umr_flags(access) | MLX5_ACCESS_MODE_MTT; 27278a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 27288a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 27298a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 27308a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 27318a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 27328a187ee5SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 27338a187ee5SSagi Grimberg } 27348a187ee5SSagi Grimberg 2735dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 2736e126ba97SEli Cohen { 2737e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 2738968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 2739e126ba97SEli Cohen } 2740e126ba97SEli Cohen 2741e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 2742e126ba97SEli Cohen { 2743e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 2744968e78ddSHaggai Eran 2745e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 2746e126ba97SEli Cohen if (wr->send_flags & MLX5_IB_SEND_UMR_UNREG) { 2747968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 2748e126ba97SEli Cohen return; 2749e126ba97SEli Cohen } 2750e126ba97SEli Cohen 2751968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 2752968e78ddSHaggai Eran if (!(wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_MTT)) { 2753968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 2754968e78ddSHaggai Eran seg->start_addr = cpu_to_be64(umrwr->target.virt_addr); 2755968e78ddSHaggai Eran } 2756968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 2757968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 2758746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 2759968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 2760e126ba97SEli Cohen } 2761e126ba97SEli Cohen 27628a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 27638a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 27648a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 27658a187ee5SSagi Grimberg { 27668a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 27678a187ee5SSagi Grimberg 27688a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 27698a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 27708a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 27718a187ee5SSagi Grimberg } 27728a187ee5SSagi Grimberg 2773e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 2774e126ba97SEli Cohen { 2775e126ba97SEli Cohen switch (wr->opcode) { 2776e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 2777e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 2778e126ba97SEli Cohen return wr->ex.imm_data; 2779e126ba97SEli Cohen 2780e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 2781e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 2782e126ba97SEli Cohen 2783e126ba97SEli Cohen default: 2784e126ba97SEli Cohen return 0; 2785e126ba97SEli Cohen } 2786e126ba97SEli Cohen } 2787e126ba97SEli Cohen 2788e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 2789e126ba97SEli Cohen { 2790e126ba97SEli Cohen u8 *p = wqe; 2791e126ba97SEli Cohen u8 res = 0; 2792e126ba97SEli Cohen int i; 2793e126ba97SEli Cohen 2794e126ba97SEli Cohen for (i = 0; i < size; i++) 2795e126ba97SEli Cohen res ^= p[i]; 2796e126ba97SEli Cohen 2797e126ba97SEli Cohen return ~res; 2798e126ba97SEli Cohen } 2799e126ba97SEli Cohen 2800e126ba97SEli Cohen static u8 wq_sig(void *wqe) 2801e126ba97SEli Cohen { 2802e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 2803e126ba97SEli Cohen } 2804e126ba97SEli Cohen 2805e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 2806e126ba97SEli Cohen void *wqe, int *sz) 2807e126ba97SEli Cohen { 2808e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 2809e126ba97SEli Cohen void *qend = qp->sq.qend; 2810e126ba97SEli Cohen void *addr; 2811e126ba97SEli Cohen int inl = 0; 2812e126ba97SEli Cohen int copy; 2813e126ba97SEli Cohen int len; 2814e126ba97SEli Cohen int i; 2815e126ba97SEli Cohen 2816e126ba97SEli Cohen seg = wqe; 2817e126ba97SEli Cohen wqe += sizeof(*seg); 2818e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 2819e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 2820e126ba97SEli Cohen len = wr->sg_list[i].length; 2821e126ba97SEli Cohen inl += len; 2822e126ba97SEli Cohen 2823e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 2824e126ba97SEli Cohen return -ENOMEM; 2825e126ba97SEli Cohen 2826e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 2827e126ba97SEli Cohen copy = qend - wqe; 2828e126ba97SEli Cohen memcpy(wqe, addr, copy); 2829e126ba97SEli Cohen addr += copy; 2830e126ba97SEli Cohen len -= copy; 2831e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 2832e126ba97SEli Cohen } 2833e126ba97SEli Cohen memcpy(wqe, addr, len); 2834e126ba97SEli Cohen wqe += len; 2835e126ba97SEli Cohen } 2836e126ba97SEli Cohen 2837e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 2838e126ba97SEli Cohen 2839e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 2840e126ba97SEli Cohen 2841e126ba97SEli Cohen return 0; 2842e126ba97SEli Cohen } 2843e126ba97SEli Cohen 2844e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 2845e6631814SSagi Grimberg { 2846e6631814SSagi Grimberg switch (type) { 2847e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 2848e6631814SSagi Grimberg return MLX5_DIF_SIZE; 2849e6631814SSagi Grimberg default: 2850e6631814SSagi Grimberg return 0; 2851e6631814SSagi Grimberg } 2852e6631814SSagi Grimberg } 2853e6631814SSagi Grimberg 2854e6631814SSagi Grimberg static u8 bs_selector(int block_size) 2855e6631814SSagi Grimberg { 2856e6631814SSagi Grimberg switch (block_size) { 2857e6631814SSagi Grimberg case 512: return 0x1; 2858e6631814SSagi Grimberg case 520: return 0x2; 2859e6631814SSagi Grimberg case 4096: return 0x3; 2860e6631814SSagi Grimberg case 4160: return 0x4; 2861e6631814SSagi Grimberg case 1073741824: return 0x5; 2862e6631814SSagi Grimberg default: return 0; 2863e6631814SSagi Grimberg } 2864e6631814SSagi Grimberg } 2865e6631814SSagi Grimberg 286678eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 2867142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 2868e6631814SSagi Grimberg { 2869142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 2870142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 2871142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 2872142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 2873142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 2874142537f4SSagi Grimberg /* repeating block */ 2875142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 2876142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 2877142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 2878e6631814SSagi Grimberg 287978eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 288078eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 2881e6631814SSagi Grimberg 288278eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 288378eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 288478eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 288578eda2bbSSagi Grimberg else 288678eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 2887e6631814SSagi Grimberg } 2888e6631814SSagi Grimberg 288978eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 289078eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 2891e6631814SSagi Grimberg } 2892e6631814SSagi Grimberg 2893e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 2894e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 2895e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 2896e6631814SSagi Grimberg { 2897e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 2898e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 2899e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 2900e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 2901e6631814SSagi Grimberg 2902c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 2903e6631814SSagi Grimberg 2904142537f4SSagi Grimberg /* Basic + Extended + Inline */ 2905142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 2906e6631814SSagi Grimberg /* Input domain check byte mask */ 2907e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 290878eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 290978eda2bbSSagi Grimberg 291078eda2bbSSagi Grimberg /* Memory domain */ 291178eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 291278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 291378eda2bbSSagi Grimberg break; 291478eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 291578eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 291678eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 291778eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 291878eda2bbSSagi Grimberg break; 291978eda2bbSSagi Grimberg default: 292078eda2bbSSagi Grimberg return -EINVAL; 292178eda2bbSSagi Grimberg } 292278eda2bbSSagi Grimberg 292378eda2bbSSagi Grimberg /* Wire domain */ 292478eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 292578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 292678eda2bbSSagi Grimberg break; 292778eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 2928e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 292978eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 2930e6631814SSagi Grimberg /* Same block structure */ 2931142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 2932e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 2933fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 2934c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 2935fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 2936c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 2937fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 2938e6631814SSagi Grimberg } else 2939e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 2940e6631814SSagi Grimberg 2941142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 294278eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 2943e6631814SSagi Grimberg break; 2944e6631814SSagi Grimberg default: 2945e6631814SSagi Grimberg return -EINVAL; 2946e6631814SSagi Grimberg } 2947e6631814SSagi Grimberg 2948e6631814SSagi Grimberg return 0; 2949e6631814SSagi Grimberg } 2950e6631814SSagi Grimberg 2951e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 2952e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 2953e6631814SSagi Grimberg { 2954e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 2955e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 2956e6631814SSagi Grimberg struct mlx5_bsf *bsf; 2957e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 2958e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 2959e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 2960e6631814SSagi Grimberg int ret; 2961e6631814SSagi Grimberg int wqe_size; 2962e6631814SSagi Grimberg 2963e622f2f4SChristoph Hellwig if (!wr->prot || 2964e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 2965e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 2966e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 2967e6631814SSagi Grimberg /** 2968e6631814SSagi Grimberg * Source domain doesn't contain signature information 29695c273b16SSagi Grimberg * or data and protection are interleaved in memory. 2970e6631814SSagi Grimberg * So need construct: 2971e6631814SSagi Grimberg * ------------------ 2972e6631814SSagi Grimberg * | data_klm | 2973e6631814SSagi Grimberg * ------------------ 2974e6631814SSagi Grimberg * | BSF | 2975e6631814SSagi Grimberg * ------------------ 2976e6631814SSagi Grimberg **/ 2977e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 2978e6631814SSagi Grimberg 2979e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 2980e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 2981e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 2982e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 2983e6631814SSagi Grimberg } else { 2984e6631814SSagi Grimberg /** 2985e6631814SSagi Grimberg * Source domain contains signature information 2986e6631814SSagi Grimberg * So need construct a strided block format: 2987e6631814SSagi Grimberg * --------------------------- 2988e6631814SSagi Grimberg * | stride_block_ctrl | 2989e6631814SSagi Grimberg * --------------------------- 2990e6631814SSagi Grimberg * | data_klm | 2991e6631814SSagi Grimberg * --------------------------- 2992e6631814SSagi Grimberg * | prot_klm | 2993e6631814SSagi Grimberg * --------------------------- 2994e6631814SSagi Grimberg * | BSF | 2995e6631814SSagi Grimberg * --------------------------- 2996e6631814SSagi Grimberg **/ 2997e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 2998e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 2999e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 3000e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 3001e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 3002e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 3003e6631814SSagi Grimberg int prot_size; 3004e6631814SSagi Grimberg 3005e6631814SSagi Grimberg sblock_ctrl = *seg; 3006e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 3007e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 3008e6631814SSagi Grimberg 3009e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 3010e6631814SSagi Grimberg if (!prot_size) { 3011e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 3012e6631814SSagi Grimberg return -EINVAL; 3013e6631814SSagi Grimberg } 3014e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 3015e6631814SSagi Grimberg prot_size); 3016e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 3017e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 3018e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 3019e6631814SSagi Grimberg 3020e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 3021e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 3022e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 30235c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 30245c273b16SSagi Grimberg 3025e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 3026e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 3027e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 3028e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 30295c273b16SSagi Grimberg 3030e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 3031e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 3032e6631814SSagi Grimberg } 3033e6631814SSagi Grimberg 3034e6631814SSagi Grimberg *seg += wqe_size; 3035e6631814SSagi Grimberg *size += wqe_size / 16; 3036e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3037e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3038e6631814SSagi Grimberg 3039e6631814SSagi Grimberg bsf = *seg; 3040e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 3041e6631814SSagi Grimberg if (ret) 3042e6631814SSagi Grimberg return -EINVAL; 3043e6631814SSagi Grimberg 3044e6631814SSagi Grimberg *seg += sizeof(*bsf); 3045e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 3046e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3047e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3048e6631814SSagi Grimberg 3049e6631814SSagi Grimberg return 0; 3050e6631814SSagi Grimberg } 3051e6631814SSagi Grimberg 3052e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 3053e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr, u32 nelements, 3054e6631814SSagi Grimberg u32 length, u32 pdn) 3055e6631814SSagi Grimberg { 3056e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 3057e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 3058d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 3059e6631814SSagi Grimberg 3060e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3061e6631814SSagi Grimberg 3062e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 3063e6631814SSagi Grimberg MLX5_ACCESS_MODE_KLM; 3064e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 3065d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 3066e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 3067e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 3068e6631814SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(be16_to_cpu(get_klm_octo(nelements))); 3069e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 3070e6631814SSagi Grimberg } 3071e6631814SSagi Grimberg 3072e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 3073e622f2f4SChristoph Hellwig u32 nelements) 3074e6631814SSagi Grimberg { 3075e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3076e6631814SSagi Grimberg 3077e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 3078e6631814SSagi Grimberg umr->klm_octowords = get_klm_octo(nelements); 3079e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 3080e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 3081e6631814SSagi Grimberg } 3082e6631814SSagi Grimberg 3083e6631814SSagi Grimberg 3084e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 3085e6631814SSagi Grimberg void **seg, int *size) 3086e6631814SSagi Grimberg { 3087e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 3088e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 3089e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 3090e6631814SSagi Grimberg u32 klm_oct_size; 3091e6631814SSagi Grimberg int region_len, ret; 3092e6631814SSagi Grimberg 3093e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 3094e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 3095d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 3096d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 3097e6631814SSagi Grimberg return -EINVAL; 3098e6631814SSagi Grimberg 3099e6631814SSagi Grimberg /* length of the protected region, data + protection */ 3100e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 3101e622f2f4SChristoph Hellwig if (wr->prot && 3102e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 3103e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 3104e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 3105e622f2f4SChristoph Hellwig region_len += wr->prot->length; 3106e6631814SSagi Grimberg 3107e6631814SSagi Grimberg /** 3108e6631814SSagi Grimberg * KLM octoword size - if protection was provided 3109e6631814SSagi Grimberg * then we use strided block format (3 octowords), 3110e6631814SSagi Grimberg * else we use single KLM (1 octoword) 3111e6631814SSagi Grimberg **/ 3112e622f2f4SChristoph Hellwig klm_oct_size = wr->prot ? 3 : 1; 3113e6631814SSagi Grimberg 3114e622f2f4SChristoph Hellwig set_sig_umr_segment(*seg, klm_oct_size); 3115e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 3116e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 3117e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3118e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3119e6631814SSagi Grimberg 3120e6631814SSagi Grimberg set_sig_mkey_segment(*seg, wr, klm_oct_size, region_len, pdn); 3121e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 3122e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 3123e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3124e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3125e6631814SSagi Grimberg 3126e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 3127e6631814SSagi Grimberg if (ret) 3128e6631814SSagi Grimberg return ret; 3129e6631814SSagi Grimberg 3130d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 3131e6631814SSagi Grimberg return 0; 3132e6631814SSagi Grimberg } 3133e6631814SSagi Grimberg 3134e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 3135e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 3136e6631814SSagi Grimberg { 3137e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 3138e6631814SSagi Grimberg 3139e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 3140e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 3141e6631814SSagi Grimberg switch (domain->sig_type) { 314278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 314378eda2bbSSagi Grimberg break; 3144e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3145e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 3146e6631814SSagi Grimberg domain->sig.dif.app_tag); 3147e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 3148e6631814SSagi Grimberg break; 3149e6631814SSagi Grimberg default: 3150e6631814SSagi Grimberg pr_err("Bad signature type given.\n"); 3151e6631814SSagi Grimberg return 1; 3152e6631814SSagi Grimberg } 3153e6631814SSagi Grimberg 315478eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 315578eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 315678eda2bbSSagi Grimberg 3157e6631814SSagi Grimberg return 0; 3158e6631814SSagi Grimberg } 3159e6631814SSagi Grimberg 31608a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 31618a187ee5SSagi Grimberg struct ib_reg_wr *wr, 31628a187ee5SSagi Grimberg void **seg, int *size) 31638a187ee5SSagi Grimberg { 31648a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 31658a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 31668a187ee5SSagi Grimberg 31678a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 31688a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 31698a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 31708a187ee5SSagi Grimberg return -EINVAL; 31718a187ee5SSagi Grimberg } 31728a187ee5SSagi Grimberg 31738a187ee5SSagi Grimberg set_reg_umr_seg(*seg, mr); 31748a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 31758a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 31768a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 31778a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 31788a187ee5SSagi Grimberg 31798a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 31808a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 31818a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 31828a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 31838a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 31848a187ee5SSagi Grimberg 31858a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 31868a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 31878a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 31888a187ee5SSagi Grimberg 31898a187ee5SSagi Grimberg return 0; 31908a187ee5SSagi Grimberg } 31918a187ee5SSagi Grimberg 3192dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 3193e126ba97SEli Cohen { 3194dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 3195e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 3196e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 3197e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 3198e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 3199dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 3200e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 3201e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 3202e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 3203e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 3204e126ba97SEli Cohen } 3205e126ba97SEli Cohen 3206e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 3207e126ba97SEli Cohen { 3208e126ba97SEli Cohen __be32 *p = NULL; 3209e126ba97SEli Cohen int tidx = idx; 3210e126ba97SEli Cohen int i, j; 3211e126ba97SEli Cohen 3212e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 3213e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 3214e126ba97SEli Cohen if ((i & 0xf) == 0) { 3215e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 3216e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 3217e126ba97SEli Cohen p = buf; 3218e126ba97SEli Cohen j = 0; 3219e126ba97SEli Cohen } 3220e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 3221e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 3222e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 3223e126ba97SEli Cohen } 3224e126ba97SEli Cohen } 3225e126ba97SEli Cohen 3226e126ba97SEli Cohen static void mlx5_bf_copy(u64 __iomem *dst, u64 *src, 3227e126ba97SEli Cohen unsigned bytecnt, struct mlx5_ib_qp *qp) 3228e126ba97SEli Cohen { 3229e126ba97SEli Cohen while (bytecnt > 0) { 3230e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3231e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3232e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3233e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3234e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3235e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3236e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3237e126ba97SEli Cohen __iowrite64_copy(dst++, src++, 8); 3238e126ba97SEli Cohen bytecnt -= 64; 3239e126ba97SEli Cohen if (unlikely(src == qp->sq.qend)) 3240e126ba97SEli Cohen src = mlx5_get_send_wqe(qp, 0); 3241e126ba97SEli Cohen } 3242e126ba97SEli Cohen } 3243e126ba97SEli Cohen 3244e126ba97SEli Cohen static u8 get_fence(u8 fence, struct ib_send_wr *wr) 3245e126ba97SEli Cohen { 3246e126ba97SEli Cohen if (unlikely(wr->opcode == IB_WR_LOCAL_INV && 3247e126ba97SEli Cohen wr->send_flags & IB_SEND_FENCE)) 3248e126ba97SEli Cohen return MLX5_FENCE_MODE_STRONG_ORDERING; 3249e126ba97SEli Cohen 3250e126ba97SEli Cohen if (unlikely(fence)) { 3251e126ba97SEli Cohen if (wr->send_flags & IB_SEND_FENCE) 3252e126ba97SEli Cohen return MLX5_FENCE_MODE_SMALL_AND_FENCE; 3253e126ba97SEli Cohen else 3254e126ba97SEli Cohen return fence; 3255e126ba97SEli Cohen 3256e126ba97SEli Cohen } else { 3257e126ba97SEli Cohen return 0; 3258e126ba97SEli Cohen } 3259e126ba97SEli Cohen } 3260e126ba97SEli Cohen 32616e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 32626e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 32636a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 32646e5eadacSSagi Grimberg int *size, int nreq) 32656e5eadacSSagi Grimberg { 32666e5eadacSSagi Grimberg int err = 0; 32676e5eadacSSagi Grimberg 32686e5eadacSSagi Grimberg if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) { 32696e5eadacSSagi Grimberg err = -ENOMEM; 32706e5eadacSSagi Grimberg return err; 32716e5eadacSSagi Grimberg } 32726e5eadacSSagi Grimberg 32736e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 32746e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 32756e5eadacSSagi Grimberg *ctrl = *seg; 32766e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 32776e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 32786e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 32796e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 32806e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 32816e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 32826e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 32836e5eadacSSagi Grimberg 32846e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 32856e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 32866e5eadacSSagi Grimberg 32876e5eadacSSagi Grimberg return err; 32886e5eadacSSagi Grimberg } 32896e5eadacSSagi Grimberg 32906e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 32916e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 32926e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 32936e5eadacSSagi Grimberg int nreq, u8 fence, u8 next_fence, 32946e5eadacSSagi Grimberg u32 mlx5_opcode) 32956e5eadacSSagi Grimberg { 32966e5eadacSSagi Grimberg u8 opmod = 0; 32976e5eadacSSagi Grimberg 32986e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 32996e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 330019098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 33016e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 33026e5eadacSSagi Grimberg qp->fm_cache = next_fence; 33036e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 33046e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 33056e5eadacSSagi Grimberg 33066e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 33076e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 33086e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 33096e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 33106e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 33116e5eadacSSagi Grimberg } 33126e5eadacSSagi Grimberg 33136e5eadacSSagi Grimberg 3314e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 3315e126ba97SEli Cohen struct ib_send_wr **bad_wr) 3316e126ba97SEli Cohen { 3317e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 3318e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3319d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 3320e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 3321e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 3322e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 3323d16e91daSHaggai Eran struct mlx5_bf *bf; 3324e126ba97SEli Cohen int uninitialized_var(size); 3325d16e91daSHaggai Eran void *qend; 3326e126ba97SEli Cohen unsigned long flags; 3327e126ba97SEli Cohen unsigned idx; 3328e126ba97SEli Cohen int err = 0; 3329e126ba97SEli Cohen int inl = 0; 3330e126ba97SEli Cohen int num_sge; 3331e126ba97SEli Cohen void *seg; 3332e126ba97SEli Cohen int nreq; 3333e126ba97SEli Cohen int i; 3334e126ba97SEli Cohen u8 next_fence = 0; 3335e126ba97SEli Cohen u8 fence; 3336e126ba97SEli Cohen 3337d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3338d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 3339d16e91daSHaggai Eran 3340d16e91daSHaggai Eran qp = to_mqp(ibqp); 3341d16e91daSHaggai Eran bf = qp->bf; 3342d16e91daSHaggai Eran qend = qp->sq.qend; 3343d16e91daSHaggai Eran 3344e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 3345e126ba97SEli Cohen 3346e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 3347a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 3348e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 3349e126ba97SEli Cohen err = -EINVAL; 3350e126ba97SEli Cohen *bad_wr = wr; 3351e126ba97SEli Cohen goto out; 3352e126ba97SEli Cohen } 3353e126ba97SEli Cohen 3354e126ba97SEli Cohen fence = qp->fm_cache; 3355e126ba97SEli Cohen num_sge = wr->num_sge; 3356e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 3357e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 3358e126ba97SEli Cohen err = -ENOMEM; 3359e126ba97SEli Cohen *bad_wr = wr; 3360e126ba97SEli Cohen goto out; 3361e126ba97SEli Cohen } 3362e126ba97SEli Cohen 33636e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 33646e5eadacSSagi Grimberg if (err) { 33656e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 33666e5eadacSSagi Grimberg err = -ENOMEM; 33676e5eadacSSagi Grimberg *bad_wr = wr; 33686e5eadacSSagi Grimberg goto out; 33696e5eadacSSagi Grimberg } 3370e126ba97SEli Cohen 3371e126ba97SEli Cohen switch (ibqp->qp_type) { 3372e126ba97SEli Cohen case IB_QPT_XRC_INI: 3373e126ba97SEli Cohen xrc = seg; 3374e126ba97SEli Cohen seg += sizeof(*xrc); 3375e126ba97SEli Cohen size += sizeof(*xrc) / 16; 3376e126ba97SEli Cohen /* fall through */ 3377e126ba97SEli Cohen case IB_QPT_RC: 3378e126ba97SEli Cohen switch (wr->opcode) { 3379e126ba97SEli Cohen case IB_WR_RDMA_READ: 3380e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 3381e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3382e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 3383e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 3384e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 3385e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 3386e126ba97SEli Cohen break; 3387e126ba97SEli Cohen 3388e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 3389e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 3390e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 339181bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 339281bea28fSEli Cohen err = -ENOSYS; 339381bea28fSEli Cohen *bad_wr = wr; 339481bea28fSEli Cohen goto out; 3395e126ba97SEli Cohen 3396e126ba97SEli Cohen case IB_WR_LOCAL_INV: 3397e126ba97SEli Cohen next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 3398e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 3399e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 3400dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 3401e126ba97SEli Cohen num_sge = 0; 3402e126ba97SEli Cohen break; 3403e126ba97SEli Cohen 34048a187ee5SSagi Grimberg case IB_WR_REG_MR: 34058a187ee5SSagi Grimberg next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 34068a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 34078a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 34088a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 34098a187ee5SSagi Grimberg if (err) { 34108a187ee5SSagi Grimberg *bad_wr = wr; 34118a187ee5SSagi Grimberg goto out; 34128a187ee5SSagi Grimberg } 34138a187ee5SSagi Grimberg num_sge = 0; 34148a187ee5SSagi Grimberg break; 34158a187ee5SSagi Grimberg 3416e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 3417e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 3418e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 3419e6631814SSagi Grimberg 3420e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 3421e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 3422e6631814SSagi Grimberg if (err) { 3423e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3424e6631814SSagi Grimberg *bad_wr = wr; 3425e6631814SSagi Grimberg goto out; 3426e6631814SSagi Grimberg } 3427e6631814SSagi Grimberg 3428e6631814SSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, 3429e6631814SSagi Grimberg nreq, get_fence(fence, wr), 3430e6631814SSagi Grimberg next_fence, MLX5_OPCODE_UMR); 3431e6631814SSagi Grimberg /* 3432e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 3433e6631814SSagi Grimberg * on error 3434e6631814SSagi Grimberg */ 3435e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 3436e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 3437e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 3438e6631814SSagi Grimberg &idx, &size, nreq); 3439e6631814SSagi Grimberg if (err) { 3440e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3441e6631814SSagi Grimberg err = -ENOMEM; 3442e6631814SSagi Grimberg *bad_wr = wr; 3443e6631814SSagi Grimberg goto out; 3444e6631814SSagi Grimberg } 3445e6631814SSagi Grimberg 3446e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 3447e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 3448e6631814SSagi Grimberg &size); 3449e6631814SSagi Grimberg if (err) { 3450e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3451e6631814SSagi Grimberg *bad_wr = wr; 3452e6631814SSagi Grimberg goto out; 3453e6631814SSagi Grimberg } 3454e6631814SSagi Grimberg 3455e6631814SSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, 3456e6631814SSagi Grimberg nreq, get_fence(fence, wr), 3457e6631814SSagi Grimberg next_fence, MLX5_OPCODE_SET_PSV); 3458e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 3459e6631814SSagi Grimberg &idx, &size, nreq); 3460e6631814SSagi Grimberg if (err) { 3461e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3462e6631814SSagi Grimberg err = -ENOMEM; 3463e6631814SSagi Grimberg *bad_wr = wr; 3464e6631814SSagi Grimberg goto out; 3465e6631814SSagi Grimberg } 3466e6631814SSagi Grimberg 3467e6631814SSagi Grimberg next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 3468e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 3469e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 3470e6631814SSagi Grimberg &size); 3471e6631814SSagi Grimberg if (err) { 3472e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3473e6631814SSagi Grimberg *bad_wr = wr; 3474e6631814SSagi Grimberg goto out; 3475e6631814SSagi Grimberg } 3476e6631814SSagi Grimberg 3477e6631814SSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, 3478e6631814SSagi Grimberg nreq, get_fence(fence, wr), 3479e6631814SSagi Grimberg next_fence, MLX5_OPCODE_SET_PSV); 3480e6631814SSagi Grimberg num_sge = 0; 3481e6631814SSagi Grimberg goto skip_psv; 3482e6631814SSagi Grimberg 3483e126ba97SEli Cohen default: 3484e126ba97SEli Cohen break; 3485e126ba97SEli Cohen } 3486e126ba97SEli Cohen break; 3487e126ba97SEli Cohen 3488e126ba97SEli Cohen case IB_QPT_UC: 3489e126ba97SEli Cohen switch (wr->opcode) { 3490e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 3491e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3492e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 3493e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 3494e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 3495e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 3496e126ba97SEli Cohen break; 3497e126ba97SEli Cohen 3498e126ba97SEli Cohen default: 3499e126ba97SEli Cohen break; 3500e126ba97SEli Cohen } 3501e126ba97SEli Cohen break; 3502e126ba97SEli Cohen 3503e126ba97SEli Cohen case IB_QPT_SMI: 3504d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 3505e126ba97SEli Cohen set_datagram_seg(seg, wr); 3506e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 3507e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 3508e126ba97SEli Cohen if (unlikely((seg == qend))) 3509e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 3510e126ba97SEli Cohen break; 3511f0313965SErez Shitrit case IB_QPT_UD: 3512f0313965SErez Shitrit set_datagram_seg(seg, wr); 3513f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 3514f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 3515e126ba97SEli Cohen 3516f0313965SErez Shitrit if (unlikely((seg == qend))) 3517f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3518f0313965SErez Shitrit 3519f0313965SErez Shitrit /* handle qp that supports ud offload */ 3520f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 3521f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 3522f0313965SErez Shitrit 3523f0313965SErez Shitrit pad = seg; 3524f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 3525f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 3526f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 3527f0313965SErez Shitrit 3528f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 3529f0313965SErez Shitrit 3530f0313965SErez Shitrit if (unlikely((seg == qend))) 3531f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3532f0313965SErez Shitrit } 3533f0313965SErez Shitrit break; 3534e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 3535e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 3536e126ba97SEli Cohen err = -EINVAL; 3537e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 3538e126ba97SEli Cohen goto out; 3539e126ba97SEli Cohen } 3540e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 3541e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 3542e126ba97SEli Cohen set_reg_umr_segment(seg, wr); 3543e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 3544e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 3545e126ba97SEli Cohen if (unlikely((seg == qend))) 3546e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 3547e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 3548e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 3549e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 3550e126ba97SEli Cohen if (unlikely((seg == qend))) 3551e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 3552e126ba97SEli Cohen break; 3553e126ba97SEli Cohen 3554e126ba97SEli Cohen default: 3555e126ba97SEli Cohen break; 3556e126ba97SEli Cohen } 3557e126ba97SEli Cohen 3558e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 3559e126ba97SEli Cohen int uninitialized_var(sz); 3560e126ba97SEli Cohen 3561e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 3562e126ba97SEli Cohen if (unlikely(err)) { 3563e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 3564e126ba97SEli Cohen *bad_wr = wr; 3565e126ba97SEli Cohen goto out; 3566e126ba97SEli Cohen } 3567e126ba97SEli Cohen inl = 1; 3568e126ba97SEli Cohen size += sz; 3569e126ba97SEli Cohen } else { 3570e126ba97SEli Cohen dpseg = seg; 3571e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 3572e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 3573e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 3574e126ba97SEli Cohen dpseg = seg; 3575e126ba97SEli Cohen } 3576e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 3577e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 3578e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 3579e126ba97SEli Cohen dpseg++; 3580e126ba97SEli Cohen } 3581e126ba97SEli Cohen } 3582e126ba97SEli Cohen } 3583e126ba97SEli Cohen 35846e5eadacSSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 35856e5eadacSSagi Grimberg get_fence(fence, wr), next_fence, 35866e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 3587e6631814SSagi Grimberg skip_psv: 3588e126ba97SEli Cohen if (0) 3589e126ba97SEli Cohen dump_wqe(qp, idx, size); 3590e126ba97SEli Cohen } 3591e126ba97SEli Cohen 3592e126ba97SEli Cohen out: 3593e126ba97SEli Cohen if (likely(nreq)) { 3594e126ba97SEli Cohen qp->sq.head += nreq; 3595e126ba97SEli Cohen 3596e126ba97SEli Cohen /* Make sure that descriptors are written before 3597e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 3598e126ba97SEli Cohen */ 3599e126ba97SEli Cohen wmb(); 3600e126ba97SEli Cohen 3601e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 3602e126ba97SEli Cohen 3603ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 3604ada388f7SEli Cohen * we hit doorbell */ 3605ada388f7SEli Cohen wmb(); 3606ada388f7SEli Cohen 3607e126ba97SEli Cohen if (bf->need_lock) 3608e126ba97SEli Cohen spin_lock(&bf->lock); 36096a4f139aSEli Cohen else 36106a4f139aSEli Cohen __acquire(&bf->lock); 3611e126ba97SEli Cohen 3612e126ba97SEli Cohen /* TBD enable WC */ 3613e126ba97SEli Cohen if (0 && nreq == 1 && bf->uuarn && inl && size > 1 && size <= bf->buf_size / 16) { 3614e126ba97SEli Cohen mlx5_bf_copy(bf->reg + bf->offset, (u64 *)ctrl, ALIGN(size * 16, 64), qp); 3615e126ba97SEli Cohen /* wc_wmb(); */ 3616e126ba97SEli Cohen } else { 3617e126ba97SEli Cohen mlx5_write64((__be32 *)ctrl, bf->regreg + bf->offset, 3618e126ba97SEli Cohen MLX5_GET_DOORBELL_LOCK(&bf->lock32)); 3619e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 3620e126ba97SEli Cohen * and reach the HCA out of order. 3621e126ba97SEli Cohen */ 3622e126ba97SEli Cohen mmiowb(); 3623e126ba97SEli Cohen } 3624e126ba97SEli Cohen bf->offset ^= bf->buf_size; 3625e126ba97SEli Cohen if (bf->need_lock) 3626e126ba97SEli Cohen spin_unlock(&bf->lock); 36276a4f139aSEli Cohen else 36286a4f139aSEli Cohen __release(&bf->lock); 3629e126ba97SEli Cohen } 3630e126ba97SEli Cohen 3631e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 3632e126ba97SEli Cohen 3633e126ba97SEli Cohen return err; 3634e126ba97SEli Cohen } 3635e126ba97SEli Cohen 3636e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 3637e126ba97SEli Cohen { 3638e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 3639e126ba97SEli Cohen } 3640e126ba97SEli Cohen 3641e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 3642e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 3643e126ba97SEli Cohen { 3644e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 3645e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 3646e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 3647e126ba97SEli Cohen unsigned long flags; 3648e126ba97SEli Cohen int err = 0; 3649e126ba97SEli Cohen int nreq; 3650e126ba97SEli Cohen int ind; 3651e126ba97SEli Cohen int i; 3652e126ba97SEli Cohen 3653d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3654d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 3655d16e91daSHaggai Eran 3656e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 3657e126ba97SEli Cohen 3658e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 3659e126ba97SEli Cohen 3660e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 3661e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 3662e126ba97SEli Cohen err = -ENOMEM; 3663e126ba97SEli Cohen *bad_wr = wr; 3664e126ba97SEli Cohen goto out; 3665e126ba97SEli Cohen } 3666e126ba97SEli Cohen 3667e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 3668e126ba97SEli Cohen err = -EINVAL; 3669e126ba97SEli Cohen *bad_wr = wr; 3670e126ba97SEli Cohen goto out; 3671e126ba97SEli Cohen } 3672e126ba97SEli Cohen 3673e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 3674e126ba97SEli Cohen if (qp->wq_sig) 3675e126ba97SEli Cohen scat++; 3676e126ba97SEli Cohen 3677e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 3678e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 3679e126ba97SEli Cohen 3680e126ba97SEli Cohen if (i < qp->rq.max_gs) { 3681e126ba97SEli Cohen scat[i].byte_count = 0; 3682e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 3683e126ba97SEli Cohen scat[i].addr = 0; 3684e126ba97SEli Cohen } 3685e126ba97SEli Cohen 3686e126ba97SEli Cohen if (qp->wq_sig) { 3687e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 3688e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 3689e126ba97SEli Cohen } 3690e126ba97SEli Cohen 3691e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 3692e126ba97SEli Cohen 3693e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 3694e126ba97SEli Cohen } 3695e126ba97SEli Cohen 3696e126ba97SEli Cohen out: 3697e126ba97SEli Cohen if (likely(nreq)) { 3698e126ba97SEli Cohen qp->rq.head += nreq; 3699e126ba97SEli Cohen 3700e126ba97SEli Cohen /* Make sure that descriptors are written before 3701e126ba97SEli Cohen * doorbell record. 3702e126ba97SEli Cohen */ 3703e126ba97SEli Cohen wmb(); 3704e126ba97SEli Cohen 3705e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 3706e126ba97SEli Cohen } 3707e126ba97SEli Cohen 3708e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 3709e126ba97SEli Cohen 3710e126ba97SEli Cohen return err; 3711e126ba97SEli Cohen } 3712e126ba97SEli Cohen 3713e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 3714e126ba97SEli Cohen { 3715e126ba97SEli Cohen switch (mlx5_state) { 3716e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 3717e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 3718e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 3719e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 3720e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 3721e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 3722e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 3723e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 3724e126ba97SEli Cohen default: return -1; 3725e126ba97SEli Cohen } 3726e126ba97SEli Cohen } 3727e126ba97SEli Cohen 3728e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 3729e126ba97SEli Cohen { 3730e126ba97SEli Cohen switch (mlx5_mig_state) { 3731e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 3732e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 3733e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 3734e126ba97SEli Cohen default: return -1; 3735e126ba97SEli Cohen } 3736e126ba97SEli Cohen } 3737e126ba97SEli Cohen 3738e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 3739e126ba97SEli Cohen { 3740e126ba97SEli Cohen int ib_flags = 0; 3741e126ba97SEli Cohen 3742e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 3743e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 3744e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 3745e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 3746e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 3747e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 3748e126ba97SEli Cohen 3749e126ba97SEli Cohen return ib_flags; 3750e126ba97SEli Cohen } 3751e126ba97SEli Cohen 3752e126ba97SEli Cohen static void to_ib_ah_attr(struct mlx5_ib_dev *ibdev, struct ib_ah_attr *ib_ah_attr, 3753e126ba97SEli Cohen struct mlx5_qp_path *path) 3754e126ba97SEli Cohen { 37559603b61dSJack Morgenstein struct mlx5_core_dev *dev = ibdev->mdev; 3756e126ba97SEli Cohen 3757e126ba97SEli Cohen memset(ib_ah_attr, 0, sizeof(*ib_ah_attr)); 3758e126ba97SEli Cohen ib_ah_attr->port_num = path->port; 3759e126ba97SEli Cohen 3760c7a08ac7SEli Cohen if (ib_ah_attr->port_num == 0 || 3761938fe83cSSaeed Mahameed ib_ah_attr->port_num > MLX5_CAP_GEN(dev, num_ports)) 3762e126ba97SEli Cohen return; 3763e126ba97SEli Cohen 37642811ba51SAchiad Shochat ib_ah_attr->sl = path->dci_cfi_prio_sl & 0xf; 3765e126ba97SEli Cohen 3766e126ba97SEli Cohen ib_ah_attr->dlid = be16_to_cpu(path->rlid); 3767e126ba97SEli Cohen ib_ah_attr->src_path_bits = path->grh_mlid & 0x7f; 3768e126ba97SEli Cohen ib_ah_attr->static_rate = path->static_rate ? path->static_rate - 5 : 0; 3769e126ba97SEli Cohen ib_ah_attr->ah_flags = (path->grh_mlid & (1 << 7)) ? IB_AH_GRH : 0; 3770e126ba97SEli Cohen if (ib_ah_attr->ah_flags) { 3771e126ba97SEli Cohen ib_ah_attr->grh.sgid_index = path->mgid_index; 3772e126ba97SEli Cohen ib_ah_attr->grh.hop_limit = path->hop_limit; 3773e126ba97SEli Cohen ib_ah_attr->grh.traffic_class = 3774e126ba97SEli Cohen (be32_to_cpu(path->tclass_flowlabel) >> 20) & 0xff; 3775e126ba97SEli Cohen ib_ah_attr->grh.flow_label = 3776e126ba97SEli Cohen be32_to_cpu(path->tclass_flowlabel) & 0xfffff; 3777e126ba97SEli Cohen memcpy(ib_ah_attr->grh.dgid.raw, 3778e126ba97SEli Cohen path->rgid, sizeof(ib_ah_attr->grh.dgid.raw)); 3779e126ba97SEli Cohen } 3780e126ba97SEli Cohen } 3781e126ba97SEli Cohen 37826d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 37836d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 37846d2f89dfSmajd@mellanox.com u8 *sq_state) 3785e126ba97SEli Cohen { 37866d2f89dfSmajd@mellanox.com void *out; 37876d2f89dfSmajd@mellanox.com void *sqc; 37886d2f89dfSmajd@mellanox.com int inlen; 37896d2f89dfSmajd@mellanox.com int err; 37906d2f89dfSmajd@mellanox.com 37916d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_sq_out); 37926d2f89dfSmajd@mellanox.com out = mlx5_vzalloc(inlen); 37936d2f89dfSmajd@mellanox.com if (!out) 37946d2f89dfSmajd@mellanox.com return -ENOMEM; 37956d2f89dfSmajd@mellanox.com 37966d2f89dfSmajd@mellanox.com err = mlx5_core_query_sq(dev->mdev, sq->base.mqp.qpn, out); 37976d2f89dfSmajd@mellanox.com if (err) 37986d2f89dfSmajd@mellanox.com goto out; 37996d2f89dfSmajd@mellanox.com 38006d2f89dfSmajd@mellanox.com sqc = MLX5_ADDR_OF(query_sq_out, out, sq_context); 38016d2f89dfSmajd@mellanox.com *sq_state = MLX5_GET(sqc, sqc, state); 38026d2f89dfSmajd@mellanox.com sq->state = *sq_state; 38036d2f89dfSmajd@mellanox.com 38046d2f89dfSmajd@mellanox.com out: 38056d2f89dfSmajd@mellanox.com kvfree(out); 38066d2f89dfSmajd@mellanox.com return err; 38076d2f89dfSmajd@mellanox.com } 38086d2f89dfSmajd@mellanox.com 38096d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 38106d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 38116d2f89dfSmajd@mellanox.com u8 *rq_state) 38126d2f89dfSmajd@mellanox.com { 38136d2f89dfSmajd@mellanox.com void *out; 38146d2f89dfSmajd@mellanox.com void *rqc; 38156d2f89dfSmajd@mellanox.com int inlen; 38166d2f89dfSmajd@mellanox.com int err; 38176d2f89dfSmajd@mellanox.com 38186d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 38196d2f89dfSmajd@mellanox.com out = mlx5_vzalloc(inlen); 38206d2f89dfSmajd@mellanox.com if (!out) 38216d2f89dfSmajd@mellanox.com return -ENOMEM; 38226d2f89dfSmajd@mellanox.com 38236d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 38246d2f89dfSmajd@mellanox.com if (err) 38256d2f89dfSmajd@mellanox.com goto out; 38266d2f89dfSmajd@mellanox.com 38276d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 38286d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 38296d2f89dfSmajd@mellanox.com rq->state = *rq_state; 38306d2f89dfSmajd@mellanox.com 38316d2f89dfSmajd@mellanox.com out: 38326d2f89dfSmajd@mellanox.com kvfree(out); 38336d2f89dfSmajd@mellanox.com return err; 38346d2f89dfSmajd@mellanox.com } 38356d2f89dfSmajd@mellanox.com 38366d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 38376d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 38386d2f89dfSmajd@mellanox.com { 38396d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 38406d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 38416d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 38426d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 38436d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 38446d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 38456d2f89dfSmajd@mellanox.com }, 38466d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 38476d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 38486d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 38496d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 38506d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 38516d2f89dfSmajd@mellanox.com }, 38526d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 38536d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 38546d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 38556d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 38566d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 38576d2f89dfSmajd@mellanox.com }, 38586d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 38596d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 38606d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 38616d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 38626d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 38636d2f89dfSmajd@mellanox.com }, 38646d2f89dfSmajd@mellanox.com }; 38656d2f89dfSmajd@mellanox.com 38666d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 38676d2f89dfSmajd@mellanox.com 38686d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 38696d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 38706d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 38716d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 38726d2f89dfSmajd@mellanox.com return -EINVAL; 38736d2f89dfSmajd@mellanox.com } 38746d2f89dfSmajd@mellanox.com 38756d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 38766d2f89dfSmajd@mellanox.com *qp_state = qp->state; 38776d2f89dfSmajd@mellanox.com 38786d2f89dfSmajd@mellanox.com return 0; 38796d2f89dfSmajd@mellanox.com } 38806d2f89dfSmajd@mellanox.com 38816d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 38826d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 38836d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 38846d2f89dfSmajd@mellanox.com { 38856d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 38866d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 38876d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 38886d2f89dfSmajd@mellanox.com int err; 38896d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 38906d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 38916d2f89dfSmajd@mellanox.com 38926d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 38936d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 38946d2f89dfSmajd@mellanox.com if (err) 38956d2f89dfSmajd@mellanox.com return err; 38966d2f89dfSmajd@mellanox.com } 38976d2f89dfSmajd@mellanox.com 38986d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 38996d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 39006d2f89dfSmajd@mellanox.com if (err) 39016d2f89dfSmajd@mellanox.com return err; 39026d2f89dfSmajd@mellanox.com } 39036d2f89dfSmajd@mellanox.com 39046d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 39056d2f89dfSmajd@mellanox.com raw_packet_qp_state); 39066d2f89dfSmajd@mellanox.com } 39076d2f89dfSmajd@mellanox.com 39086d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 39096d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 39106d2f89dfSmajd@mellanox.com { 3911e126ba97SEli Cohen struct mlx5_query_qp_mbox_out *outb; 3912e126ba97SEli Cohen struct mlx5_qp_context *context; 3913e126ba97SEli Cohen int mlx5_state; 3914e126ba97SEli Cohen int err = 0; 3915e126ba97SEli Cohen 3916e126ba97SEli Cohen outb = kzalloc(sizeof(*outb), GFP_KERNEL); 39176d2f89dfSmajd@mellanox.com if (!outb) 39186d2f89dfSmajd@mellanox.com return -ENOMEM; 39196d2f89dfSmajd@mellanox.com 3920e126ba97SEli Cohen context = &outb->ctx; 392119098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 392219098df2Smajd@mellanox.com sizeof(*outb)); 3923e126ba97SEli Cohen if (err) 39246d2f89dfSmajd@mellanox.com goto out; 3925e126ba97SEli Cohen 3926e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 3927e126ba97SEli Cohen 3928e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 3929e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 3930e126ba97SEli Cohen qp_attr->path_mig_state = 3931e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 3932e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 3933e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 3934e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 3935e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 3936e126ba97SEli Cohen qp_attr->qp_access_flags = 3937e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 3938e126ba97SEli Cohen 3939e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 3940e126ba97SEli Cohen to_ib_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 3941e126ba97SEli Cohen to_ib_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 3942e126ba97SEli Cohen qp_attr->alt_pkey_index = context->alt_path.pkey_index & 0x7f; 3943e126ba97SEli Cohen qp_attr->alt_port_num = qp_attr->alt_ah_attr.port_num; 3944e126ba97SEli Cohen } 3945e126ba97SEli Cohen 3946e126ba97SEli Cohen qp_attr->pkey_index = context->pri_path.pkey_index & 0x7f; 3947e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 3948e126ba97SEli Cohen 3949e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 3950e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 3951e126ba97SEli Cohen 3952e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 3953e126ba97SEli Cohen 3954e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 3955e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 3956e126ba97SEli Cohen qp_attr->min_rnr_timer = 3957e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 3958e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 3959e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 3960e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 3961e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 39626d2f89dfSmajd@mellanox.com 39636d2f89dfSmajd@mellanox.com out: 39646d2f89dfSmajd@mellanox.com kfree(outb); 39656d2f89dfSmajd@mellanox.com return err; 39666d2f89dfSmajd@mellanox.com } 39676d2f89dfSmajd@mellanox.com 39686d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 39696d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 39706d2f89dfSmajd@mellanox.com { 39716d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 39726d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 39736d2f89dfSmajd@mellanox.com int err = 0; 39746d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 39756d2f89dfSmajd@mellanox.com 3976d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3977d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 3978d16e91daSHaggai Eran qp_init_attr); 3979d16e91daSHaggai Eran 39806d2f89dfSmajd@mellanox.com #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 39816d2f89dfSmajd@mellanox.com /* 39826d2f89dfSmajd@mellanox.com * Wait for any outstanding page faults, in case the user frees memory 39836d2f89dfSmajd@mellanox.com * based upon this query's result. 39846d2f89dfSmajd@mellanox.com */ 39856d2f89dfSmajd@mellanox.com flush_workqueue(mlx5_ib_page_fault_wq); 39866d2f89dfSmajd@mellanox.com #endif 39876d2f89dfSmajd@mellanox.com 39886d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 39896d2f89dfSmajd@mellanox.com 39906d2f89dfSmajd@mellanox.com if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET) { 39916d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 39926d2f89dfSmajd@mellanox.com if (err) 39936d2f89dfSmajd@mellanox.com goto out; 39946d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 39956d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 39966d2f89dfSmajd@mellanox.com } else { 39976d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 39986d2f89dfSmajd@mellanox.com if (err) 39996d2f89dfSmajd@mellanox.com goto out; 40006d2f89dfSmajd@mellanox.com } 40016d2f89dfSmajd@mellanox.com 40026d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 4003e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 4004e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 4005e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 4006e126ba97SEli Cohen 4007e126ba97SEli Cohen if (!ibqp->uobject) { 4008e126ba97SEli Cohen qp_attr->cap.max_send_wr = qp->sq.wqe_cnt; 4009e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 4010e126ba97SEli Cohen } else { 4011e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 4012e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 4013e126ba97SEli Cohen } 4014e126ba97SEli Cohen 4015e126ba97SEli Cohen /* We don't support inline sends for kernel QPs (yet), and we 4016e126ba97SEli Cohen * don't know what userspace's value should be. 4017e126ba97SEli Cohen */ 4018e126ba97SEli Cohen qp_attr->cap.max_inline_data = 0; 4019e126ba97SEli Cohen 4020e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 4021e126ba97SEli Cohen 4022e126ba97SEli Cohen qp_init_attr->create_flags = 0; 4023e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 4024e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 4025e126ba97SEli Cohen 4026051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 4027051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 4028051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 4029051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 4030051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 4031051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 4032b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 4033b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 4034051f2630SLeon Romanovsky 4035e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 4036e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 4037e126ba97SEli Cohen 4038e126ba97SEli Cohen out: 4039e126ba97SEli Cohen mutex_unlock(&qp->mutex); 4040e126ba97SEli Cohen return err; 4041e126ba97SEli Cohen } 4042e126ba97SEli Cohen 4043e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 4044e126ba97SEli Cohen struct ib_ucontext *context, 4045e126ba97SEli Cohen struct ib_udata *udata) 4046e126ba97SEli Cohen { 4047e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 4048e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 4049e126ba97SEli Cohen int err; 4050e126ba97SEli Cohen 4051938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 4052e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 4053e126ba97SEli Cohen 4054e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 4055e126ba97SEli Cohen if (!xrcd) 4056e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 4057e126ba97SEli Cohen 40589603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 4059e126ba97SEli Cohen if (err) { 4060e126ba97SEli Cohen kfree(xrcd); 4061e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 4062e126ba97SEli Cohen } 4063e126ba97SEli Cohen 4064e126ba97SEli Cohen return &xrcd->ibxrcd; 4065e126ba97SEli Cohen } 4066e126ba97SEli Cohen 4067e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 4068e126ba97SEli Cohen { 4069e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 4070e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 4071e126ba97SEli Cohen int err; 4072e126ba97SEli Cohen 40739603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 4074e126ba97SEli Cohen if (err) { 4075e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 4076e126ba97SEli Cohen return err; 4077e126ba97SEli Cohen } 4078e126ba97SEli Cohen 4079e126ba97SEli Cohen kfree(xrcd); 4080e126ba97SEli Cohen 4081e126ba97SEli Cohen return 0; 4082e126ba97SEli Cohen } 4083