1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 112e126ba97SEli Cohen { 113e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 114e126ba97SEli Cohen } 115e126ba97SEli Cohen 116e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 117e126ba97SEli Cohen { 118e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 119e126ba97SEli Cohen } 120e126ba97SEli Cohen 121e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 122e126ba97SEli Cohen { 123e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 124e126ba97SEli Cohen } 125e126ba97SEli Cohen 126c1395a2aSHaggai Eran /** 127c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 128c1395a2aSHaggai Eran * 129c1395a2aSHaggai Eran * @qp: QP to copy from. 130c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 131c1395a2aSHaggai Eran * otherwise. 132c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 133c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 134c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 135c1395a2aSHaggai Eran * element in the queue. 136c1395a2aSHaggai Eran * @buffer: destination buffer. 137c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 138c1395a2aSHaggai Eran * 139c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 140c1395a2aSHaggai Eran * 141c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 142c1395a2aSHaggai Eran */ 143c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14419098df2Smajd@mellanox.com void *buffer, u32 length, 14519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 146c1395a2aSHaggai Eran { 147c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 148c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 149c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 150c1395a2aSHaggai Eran size_t offset; 151c1395a2aSHaggai Eran size_t wq_end; 15219098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 153c1395a2aSHaggai Eran u32 first_copy_length; 154c1395a2aSHaggai Eran int wqe_length; 155c1395a2aSHaggai Eran int ret; 156c1395a2aSHaggai Eran 157c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 158c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 159c1395a2aSHaggai Eran qp->ibqp.qp_type); 160c1395a2aSHaggai Eran return -EINVAL; 161c1395a2aSHaggai Eran } 162c1395a2aSHaggai Eran 163c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 164c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 165c1395a2aSHaggai Eran 166c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 167c1395a2aSHaggai Eran return -EINVAL; 168c1395a2aSHaggai Eran 169c1395a2aSHaggai Eran if (offset > umem->length || 170c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 171c1395a2aSHaggai Eran return -EINVAL; 172c1395a2aSHaggai Eran 173c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 174c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 175c1395a2aSHaggai Eran if (ret) 176c1395a2aSHaggai Eran return ret; 177c1395a2aSHaggai Eran 178c1395a2aSHaggai Eran if (send) { 179c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 180c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 181c1395a2aSHaggai Eran 182c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 183c1395a2aSHaggai Eran } else { 184c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 185c1395a2aSHaggai Eran } 186c1395a2aSHaggai Eran 187c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 188c1395a2aSHaggai Eran return first_copy_length; 189c1395a2aSHaggai Eran 190c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 191c1395a2aSHaggai Eran wqe_length - first_copy_length); 192c1395a2aSHaggai Eran if (ret) 193c1395a2aSHaggai Eran return ret; 194c1395a2aSHaggai Eran 195c1395a2aSHaggai Eran return wqe_length; 196c1395a2aSHaggai Eran } 197c1395a2aSHaggai Eran 198e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 199e126ba97SEli Cohen { 200e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 201e126ba97SEli Cohen struct ib_event event; 202e126ba97SEli Cohen 20319098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20419098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20519098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20619098df2Smajd@mellanox.com } 207e126ba97SEli Cohen 208e126ba97SEli Cohen if (ibqp->event_handler) { 209e126ba97SEli Cohen event.device = ibqp->device; 210e126ba97SEli Cohen event.element.qp = ibqp; 211e126ba97SEli Cohen switch (type) { 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 213e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 216e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 217e126ba97SEli Cohen break; 218e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 219e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 220e126ba97SEli Cohen break; 221e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 222e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 223e126ba97SEli Cohen break; 224e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 225e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 226e126ba97SEli Cohen break; 227e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 228e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 229e126ba97SEli Cohen break; 230e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 231e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 232e126ba97SEli Cohen break; 233e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 234e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 235e126ba97SEli Cohen break; 236e126ba97SEli Cohen default: 237e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 238e126ba97SEli Cohen return; 239e126ba97SEli Cohen } 240e126ba97SEli Cohen 241e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 242e126ba97SEli Cohen } 243e126ba97SEli Cohen } 244e126ba97SEli Cohen 245e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 246e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 247e126ba97SEli Cohen { 248e126ba97SEli Cohen int wqe_size; 249e126ba97SEli Cohen int wq_size; 250e126ba97SEli Cohen 251e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 252938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 253e126ba97SEli Cohen return -EINVAL; 254e126ba97SEli Cohen 255e126ba97SEli Cohen if (!has_rq) { 256e126ba97SEli Cohen qp->rq.max_gs = 0; 257e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 258e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2590540d814SNoa Osherovich cap->max_recv_wr = 0; 2600540d814SNoa Osherovich cap->max_recv_sge = 0; 261e126ba97SEli Cohen } else { 262e126ba97SEli Cohen if (ucmd) { 263e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 264002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 265002bf228SLeon Romanovsky return -EINVAL; 266e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 267002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 268002bf228SLeon Romanovsky return -EINVAL; 269e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 270e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 271e126ba97SEli Cohen } else { 272e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 273e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 274e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 275e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 276e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 277e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 278938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 279e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 280e126ba97SEli Cohen wqe_size, 281938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 282938fe83cSSaeed Mahameed max_wqe_sz_rq)); 283e126ba97SEli Cohen return -EINVAL; 284e126ba97SEli Cohen } 285e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 286e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 287e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 288e126ba97SEli Cohen } 289e126ba97SEli Cohen } 290e126ba97SEli Cohen 291e126ba97SEli Cohen return 0; 292e126ba97SEli Cohen } 293e126ba97SEli Cohen 294f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 295e126ba97SEli Cohen { 296618af384SAndi Shyti int size = 0; 297e126ba97SEli Cohen 298f0313965SErez Shitrit switch (attr->qp_type) { 299e126ba97SEli Cohen case IB_QPT_XRC_INI: 300b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 301e126ba97SEli Cohen /* fall through */ 302e126ba97SEli Cohen case IB_QPT_RC: 303e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30475c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 30575c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30675c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 307064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 308064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 309064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen 312b125a54bSEli Cohen case IB_QPT_XRC_TGT: 313b125a54bSEli Cohen return 0; 314b125a54bSEli Cohen 315e126ba97SEli Cohen case IB_QPT_UC: 316b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 31775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3189e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31975c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 320e126ba97SEli Cohen break; 321e126ba97SEli Cohen 322e126ba97SEli Cohen case IB_QPT_UD: 323f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 324f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 325f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 326f0313965SErez Shitrit /* fall through */ 327e126ba97SEli Cohen case IB_QPT_SMI: 328d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 329b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 330e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 331e126ba97SEli Cohen break; 332e126ba97SEli Cohen 333e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 334b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 335e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 336e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 337e126ba97SEli Cohen break; 338e126ba97SEli Cohen 339e126ba97SEli Cohen default: 340e126ba97SEli Cohen return -EINVAL; 341e126ba97SEli Cohen } 342e126ba97SEli Cohen 343e126ba97SEli Cohen return size; 344e126ba97SEli Cohen } 345e126ba97SEli Cohen 346e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 347e126ba97SEli Cohen { 348e126ba97SEli Cohen int inl_size = 0; 349e126ba97SEli Cohen int size; 350e126ba97SEli Cohen 351f0313965SErez Shitrit size = sq_overhead(attr); 352e126ba97SEli Cohen if (size < 0) 353e126ba97SEli Cohen return size; 354e126ba97SEli Cohen 355e126ba97SEli Cohen if (attr->cap.max_inline_data) { 356e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 357e126ba97SEli Cohen attr->cap.max_inline_data; 358e126ba97SEli Cohen } 359e126ba97SEli Cohen 360e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 361e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 362e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 363e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 364e1e66cc2SSagi Grimberg else 365e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 366e126ba97SEli Cohen } 367e126ba97SEli Cohen 368288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 369288c01b7SEli Cohen { 370288c01b7SEli Cohen int max_sge; 371288c01b7SEli Cohen 372288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 373288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 376288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 377288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 378288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 379288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 380288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 381288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 382288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 383288c01b7SEli Cohen else 384288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 385288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 386288c01b7SEli Cohen 387288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 388288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 389288c01b7SEli Cohen } 390288c01b7SEli Cohen 391e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 392e126ba97SEli Cohen struct mlx5_ib_qp *qp) 393e126ba97SEli Cohen { 394e126ba97SEli Cohen int wqe_size; 395e126ba97SEli Cohen int wq_size; 396e126ba97SEli Cohen 397e126ba97SEli Cohen if (!attr->cap.max_send_wr) 398e126ba97SEli Cohen return 0; 399e126ba97SEli Cohen 400e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 401e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 402e126ba97SEli Cohen if (wqe_size < 0) 403e126ba97SEli Cohen return wqe_size; 404e126ba97SEli Cohen 405938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 406b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 407938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 408e126ba97SEli Cohen return -EINVAL; 409e126ba97SEli Cohen } 410e126ba97SEli Cohen 411f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 412e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 413e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 414e126ba97SEli Cohen 415e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 416e1e66cc2SSagi Grimberg qp->signature_en = true; 417e1e66cc2SSagi Grimberg 418e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 419e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 420938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4211974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4221974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 423938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 424938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 425b125a54bSEli Cohen return -ENOMEM; 426b125a54bSEli Cohen } 427e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 428288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 429288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 430288c01b7SEli Cohen return -ENOMEM; 431288c01b7SEli Cohen 432288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 433b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 434b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 435e126ba97SEli Cohen 436e126ba97SEli Cohen return wq_size; 437e126ba97SEli Cohen } 438e126ba97SEli Cohen 439e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 440e126ba97SEli Cohen struct mlx5_ib_qp *qp, 44119098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4420fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4430fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 444e126ba97SEli Cohen { 445e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 446e126ba97SEli Cohen 447938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 448e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 449938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 450e126ba97SEli Cohen return -EINVAL; 451e126ba97SEli Cohen } 452e126ba97SEli Cohen 453e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 454e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 455e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 456e126ba97SEli Cohen return -EINVAL; 457e126ba97SEli Cohen } 458e126ba97SEli Cohen 459e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 460e126ba97SEli Cohen 461938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 462e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 463938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 464938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 465e126ba97SEli Cohen return -EINVAL; 466e126ba97SEli Cohen } 467e126ba97SEli Cohen 468c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 469c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4700fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4710fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4720fb2ed66Smajd@mellanox.com } else { 47319098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 474e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4750fb2ed66Smajd@mellanox.com } 476e126ba97SEli Cohen 477e126ba97SEli Cohen return 0; 478e126ba97SEli Cohen } 479e126ba97SEli Cohen 480e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 481e126ba97SEli Cohen { 482e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 483e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 484e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 485e126ba97SEli Cohen !attr->cap.max_recv_wr) 486e126ba97SEli Cohen return 0; 487e126ba97SEli Cohen 488e126ba97SEli Cohen return 1; 489e126ba97SEli Cohen } 490e126ba97SEli Cohen 4910b80c14fSEli Cohen enum { 4920b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4930b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4940b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4950b80c14fSEli Cohen * "odd/even" order 4960b80c14fSEli Cohen */ 4970b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4980b80c14fSEli Cohen }; 4990b80c14fSEli Cohen 500b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 501b037c29aSEli Cohen { 50231a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 503b037c29aSEli Cohen } 504b037c29aSEli Cohen 505b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 506b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 507c1be5232SEli Cohen { 508c1be5232SEli Cohen int n; 509c1be5232SEli Cohen 510b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 511b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 512c1be5232SEli Cohen 513c1be5232SEli Cohen return n >= 0 ? n : 0; 514c1be5232SEli Cohen } 515c1be5232SEli Cohen 51618b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 51718b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 51818b0362eSYishai Hadas { 51918b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 52018b0362eSYishai Hadas } 52118b0362eSYishai Hadas 522b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 523b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 524c1be5232SEli Cohen { 525c1be5232SEli Cohen int med; 526c1be5232SEli Cohen 527b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 528b037c29aSEli Cohen return ++med; 529c1be5232SEli Cohen } 530c1be5232SEli Cohen 531b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 532b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 533e126ba97SEli Cohen { 534e126ba97SEli Cohen int i; 535e126ba97SEli Cohen 536b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 537b037c29aSEli Cohen if (!bfregi->count[i]) { 5382f5ff264SEli Cohen bfregi->count[i]++; 539e126ba97SEli Cohen return i; 540e126ba97SEli Cohen } 541e126ba97SEli Cohen } 542e126ba97SEli Cohen 543e126ba97SEli Cohen return -ENOMEM; 544e126ba97SEli Cohen } 545e126ba97SEli Cohen 546b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 547b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 548e126ba97SEli Cohen { 54918b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 550e126ba97SEli Cohen int i; 551e126ba97SEli Cohen 55218b0362eSYishai Hadas if (minidx < 0) 55318b0362eSYishai Hadas return minidx; 55418b0362eSYishai Hadas 55518b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 5562f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 557e126ba97SEli Cohen minidx = i; 5580b80c14fSEli Cohen if (!bfregi->count[minidx]) 5590b80c14fSEli Cohen break; 560e126ba97SEli Cohen } 561e126ba97SEli Cohen 5622f5ff264SEli Cohen bfregi->count[minidx]++; 563e126ba97SEli Cohen return minidx; 564e126ba97SEli Cohen } 565e126ba97SEli Cohen 566b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 567ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 568e126ba97SEli Cohen { 569ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 570e126ba97SEli Cohen 5712f5ff264SEli Cohen mutex_lock(&bfregi->lock); 572ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 573ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 574ffaf58deSLeon Romanovsky if (bfregn < 0) 575ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 576ffaf58deSLeon Romanovsky } 577ffaf58deSLeon Romanovsky 578ffaf58deSLeon Romanovsky if (bfregn < 0) { 5790b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5802f5ff264SEli Cohen bfregn = 0; 5812f5ff264SEli Cohen bfregi->count[bfregn]++; 582e126ba97SEli Cohen } 5832f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 584e126ba97SEli Cohen 5852f5ff264SEli Cohen return bfregn; 586e126ba97SEli Cohen } 587e126ba97SEli Cohen 5884ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 589e126ba97SEli Cohen { 5902f5ff264SEli Cohen mutex_lock(&bfregi->lock); 591b037c29aSEli Cohen bfregi->count[bfregn]--; 5922f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 593e126ba97SEli Cohen } 594e126ba97SEli Cohen 595e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 596e126ba97SEli Cohen { 597e126ba97SEli Cohen switch (state) { 598e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 599e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 600e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 601e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 602e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 603e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 604e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 605e126ba97SEli Cohen default: return -1; 606e126ba97SEli Cohen } 607e126ba97SEli Cohen } 608e126ba97SEli Cohen 609e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 610e126ba97SEli Cohen { 611e126ba97SEli Cohen switch (type) { 612e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 613e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 614e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 615e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 616e126ba97SEli Cohen case IB_QPT_XRC_INI: 617e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 618e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 619d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 620c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 621e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 622e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6230fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 624e126ba97SEli Cohen case IB_QPT_MAX: 625e126ba97SEli Cohen default: return -EINVAL; 626e126ba97SEli Cohen } 627e126ba97SEli Cohen } 628e126ba97SEli Cohen 62989ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 63089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63189ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 63289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63389ea94a7SMaor Gottlieb 6347c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 63505f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 6361ee47ab3SYishai Hadas bool dyn_bfreg) 637e126ba97SEli Cohen { 63805f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 63905f58cebSLeon Romanovsky u32 index_of_sys_page; 64005f58cebSLeon Romanovsky u32 offset; 641b037c29aSEli Cohen 642b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 643b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 644b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 645b037c29aSEli Cohen 64605f58cebSLeon Romanovsky if (dyn_bfreg) { 64705f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 64805f58cebSLeon Romanovsky 6497c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 6507c043e90SYishai Hadas return -EINVAL; 6517c043e90SYishai Hadas 6521ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6531ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6541ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6551ee47ab3SYishai Hadas return -EINVAL; 6561ee47ab3SYishai Hadas } 6571ee47ab3SYishai Hadas } 658b037c29aSEli Cohen 6591ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 660b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 661e126ba97SEli Cohen } 662e126ba97SEli Cohen 66319098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 66419098df2Smajd@mellanox.com struct ib_pd *pd, 66519098df2Smajd@mellanox.com unsigned long addr, size_t size, 66619098df2Smajd@mellanox.com struct ib_umem **umem, 66719098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66819098df2Smajd@mellanox.com u32 *offset) 66919098df2Smajd@mellanox.com { 67019098df2Smajd@mellanox.com int err; 67119098df2Smajd@mellanox.com 67219098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 67319098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 67419098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 67519098df2Smajd@mellanox.com return PTR_ERR(*umem); 67619098df2Smajd@mellanox.com } 67719098df2Smajd@mellanox.com 678762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67919098df2Smajd@mellanox.com 68019098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 68119098df2Smajd@mellanox.com if (err) { 68219098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 68319098df2Smajd@mellanox.com goto err_umem; 68419098df2Smajd@mellanox.com } 68519098df2Smajd@mellanox.com 68619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68719098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68819098df2Smajd@mellanox.com 68919098df2Smajd@mellanox.com return 0; 69019098df2Smajd@mellanox.com 69119098df2Smajd@mellanox.com err_umem: 69219098df2Smajd@mellanox.com ib_umem_release(*umem); 69319098df2Smajd@mellanox.com *umem = NULL; 69419098df2Smajd@mellanox.com 69519098df2Smajd@mellanox.com return err; 69619098df2Smajd@mellanox.com } 69719098df2Smajd@mellanox.com 698fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 699fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 70079b20a6cSYishai Hadas { 70179b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70279b20a6cSYishai Hadas 703fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 704fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 705fe248c3aSMaor Gottlieb 70679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70779b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70879b20a6cSYishai Hadas if (rwq->umem) 70979b20a6cSYishai Hadas ib_umem_release(rwq->umem); 71079b20a6cSYishai Hadas } 71179b20a6cSYishai Hadas 71279b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 71379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 71479b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 71579b20a6cSYishai Hadas { 71679b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71779b20a6cSYishai Hadas int page_shift = 0; 71879b20a6cSYishai Hadas int npages; 71979b20a6cSYishai Hadas u32 offset = 0; 72079b20a6cSYishai Hadas int ncont = 0; 72179b20a6cSYishai Hadas int err; 72279b20a6cSYishai Hadas 72379b20a6cSYishai Hadas if (!ucmd->buf_addr) 72479b20a6cSYishai Hadas return -EINVAL; 72579b20a6cSYishai Hadas 72679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72779b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72879b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72979b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 73079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 73179b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 73279b20a6cSYishai Hadas return err; 73379b20a6cSYishai Hadas } 73479b20a6cSYishai Hadas 735762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 73679b20a6cSYishai Hadas &ncont, NULL); 73779b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73879b20a6cSYishai Hadas &rwq->rq_page_offset); 73979b20a6cSYishai Hadas if (err) { 74079b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 74179b20a6cSYishai Hadas goto err_umem; 74279b20a6cSYishai Hadas } 74379b20a6cSYishai Hadas 74479b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 74579b20a6cSYishai Hadas rwq->page_shift = page_shift; 74679b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74779b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74879b20a6cSYishai Hadas 74979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 75079b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 75179b20a6cSYishai Hadas npages, page_shift, ncont, offset); 75279b20a6cSYishai Hadas 75379b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 75479b20a6cSYishai Hadas if (err) { 75579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 75679b20a6cSYishai Hadas goto err_umem; 75779b20a6cSYishai Hadas } 75879b20a6cSYishai Hadas 75979b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 76079b20a6cSYishai Hadas return 0; 76179b20a6cSYishai Hadas 76279b20a6cSYishai Hadas err_umem: 76379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 76479b20a6cSYishai Hadas return err; 76579b20a6cSYishai Hadas } 76679b20a6cSYishai Hadas 767b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 768b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 769b037c29aSEli Cohen { 770b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 771b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 772b037c29aSEli Cohen } 773b037c29aSEli Cohen 774e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 775e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7760fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77709a7d9ecSSaeed Mahameed u32 **in, 77819098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 780e126ba97SEli Cohen { 781e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 782e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 78319098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7849e9c47d0SEli Cohen int page_shift = 0; 7851ee47ab3SYishai Hadas int uar_index = 0; 786e126ba97SEli Cohen int npages; 7879e9c47d0SEli Cohen u32 offset = 0; 7882f5ff264SEli Cohen int bfregn; 7899e9c47d0SEli Cohen int ncont = 0; 79009a7d9ecSSaeed Mahameed __be64 *pas; 79109a7d9ecSSaeed Mahameed void *qpc; 792e126ba97SEli Cohen int err; 793e126ba97SEli Cohen 794e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 795e126ba97SEli Cohen if (err) { 796e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 797e126ba97SEli Cohen return err; 798e126ba97SEli Cohen } 799e126ba97SEli Cohen 800e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 8011ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8021ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8031ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8041ee47ab3SYishai Hadas if (uar_index < 0) 8051ee47ab3SYishai Hadas return uar_index; 8061ee47ab3SYishai Hadas 8071ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8081ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 809e126ba97SEli Cohen /* 810e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 811e126ba97SEli Cohen */ 812051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8132f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8141ee47ab3SYishai Hadas } 815051f2630SLeon Romanovsky else { 816ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 817ffaf58deSLeon Romanovsky if (bfregn < 0) 8182f5ff264SEli Cohen return bfregn; 819e126ba97SEli Cohen } 820e126ba97SEli Cohen 8212f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8221ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8231ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8241ee47ab3SYishai Hadas false); 825e126ba97SEli Cohen 82648fea837SHaggai Eran qp->rq.offset = 0; 82748fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 82848fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 82948fea837SHaggai Eran 8300fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 831e126ba97SEli Cohen if (err) 8322f5ff264SEli Cohen goto err_bfreg; 833e126ba97SEli Cohen 83419098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 83519098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 83619098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 83719098df2Smajd@mellanox.com ubuffer->buf_size, 83819098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 83919098df2Smajd@mellanox.com &ncont, &offset); 84019098df2Smajd@mellanox.com if (err) 8412f5ff264SEli Cohen goto err_bfreg; 8429e9c47d0SEli Cohen } else { 84319098df2Smajd@mellanox.com ubuffer->umem = NULL; 8449e9c47d0SEli Cohen } 845e126ba97SEli Cohen 84609a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 84709a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8481b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 849e126ba97SEli Cohen if (!*in) { 850e126ba97SEli Cohen err = -ENOMEM; 851e126ba97SEli Cohen goto err_umem; 852e126ba97SEli Cohen } 853e126ba97SEli Cohen 854991d2198SYishai Hadas MLX5_SET(create_qp_in, *in, uid, to_mpd(pd)->uid); 85509a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 85609a7d9ecSSaeed Mahameed if (ubuffer->umem) 85709a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 85809a7d9ecSSaeed Mahameed 85909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86009a7d9ecSSaeed Mahameed 86109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86309a7d9ecSSaeed Mahameed 86409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8651ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 866b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8671ee47ab3SYishai Hadas else 8681ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8692f5ff264SEli Cohen qp->bfregn = bfregn; 870e126ba97SEli Cohen 871e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 872e126ba97SEli Cohen if (err) { 873e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 874e126ba97SEli Cohen goto err_free; 875e126ba97SEli Cohen } 876e126ba97SEli Cohen 87741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 878e126ba97SEli Cohen if (err) { 879e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 880e126ba97SEli Cohen goto err_unmap; 881e126ba97SEli Cohen } 882e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 883e126ba97SEli Cohen 884e126ba97SEli Cohen return 0; 885e126ba97SEli Cohen 886e126ba97SEli Cohen err_unmap: 887e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 888e126ba97SEli Cohen 889e126ba97SEli Cohen err_free: 890479163f4SAl Viro kvfree(*in); 891e126ba97SEli Cohen 892e126ba97SEli Cohen err_umem: 89319098df2Smajd@mellanox.com if (ubuffer->umem) 89419098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 895e126ba97SEli Cohen 8962f5ff264SEli Cohen err_bfreg: 8971ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8984ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 899e126ba97SEli Cohen return err; 900e126ba97SEli Cohen } 901e126ba97SEli Cohen 902b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 903b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 904e126ba97SEli Cohen { 905e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 906e126ba97SEli Cohen 907e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 908e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 90919098df2Smajd@mellanox.com if (base->ubuffer.umem) 91019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9111ee47ab3SYishai Hadas 9121ee47ab3SYishai Hadas /* 9131ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9141ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9151ee47ab3SYishai Hadas */ 9161ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9174ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 918e126ba97SEli Cohen } 919e126ba97SEli Cohen 920e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 921e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 922e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 92419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 925e126ba97SEli Cohen { 926e126ba97SEli Cohen int uar_index; 92709a7d9ecSSaeed Mahameed void *qpc; 928e126ba97SEli Cohen int err; 929e126ba97SEli Cohen 930f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 931f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 932b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 934b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9351a4c3a3dSEli Cohen return -EINVAL; 936e126ba97SEli Cohen 937e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9385fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9395fe9dec0SEli Cohen else 9405fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 941e126ba97SEli Cohen 942d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 943d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 944d8030b0dSEli Cohen */ 945d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9465fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 947e126ba97SEli Cohen 948e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 949e126ba97SEli Cohen if (err < 0) { 950e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9515fe9dec0SEli Cohen return err; 952e126ba97SEli Cohen } 953e126ba97SEli Cohen 954e126ba97SEli Cohen qp->rq.offset = 0; 955e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 95619098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 957e126ba97SEli Cohen 95819098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 959e126ba97SEli Cohen if (err) { 960e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9615fe9dec0SEli Cohen return err; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 964e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 96509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 96609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9671b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 968e126ba97SEli Cohen if (!*in) { 969e126ba97SEli Cohen err = -ENOMEM; 970e126ba97SEli Cohen goto err_buf; 971e126ba97SEli Cohen } 97209a7d9ecSSaeed Mahameed 97309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 97409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 97509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 97609a7d9ecSSaeed Mahameed 977e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 97809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 97909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 980e126ba97SEli Cohen 981b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 983b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 984b11a4f9cSHaggai Eran } 985b11a4f9cSHaggai Eran 98609a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 98709a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 988e126ba97SEli Cohen 9899603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 990e126ba97SEli Cohen if (err) { 991e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 992e126ba97SEli Cohen goto err_free; 993e126ba97SEli Cohen } 994e126ba97SEli Cohen 995b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 996b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 997b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 998b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 999b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1000b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1001b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1002b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1003b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1004b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1005e126ba97SEli Cohen 1006e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1007e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1008e126ba97SEli Cohen err = -ENOMEM; 1009e126ba97SEli Cohen goto err_wrid; 1010e126ba97SEli Cohen } 1011e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1012e126ba97SEli Cohen 1013e126ba97SEli Cohen return 0; 1014e126ba97SEli Cohen 1015e126ba97SEli Cohen err_wrid: 1016b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1017b5883008SLi Dongyang kvfree(qp->sq.w_list); 1018b5883008SLi Dongyang kvfree(qp->sq.wrid); 1019b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1020b5883008SLi Dongyang kvfree(qp->rq.wrid); 1021f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1022e126ba97SEli Cohen 1023e126ba97SEli Cohen err_free: 1024479163f4SAl Viro kvfree(*in); 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen err_buf: 10279603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1028e126ba97SEli Cohen return err; 1029e126ba97SEli Cohen } 1030e126ba97SEli Cohen 1031e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1032e126ba97SEli Cohen { 1033b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1034b5883008SLi Dongyang kvfree(qp->sq.w_list); 1035b5883008SLi Dongyang kvfree(qp->sq.wrid); 1036b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1037b5883008SLi Dongyang kvfree(qp->rq.wrid); 1038f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10399603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1040e126ba97SEli Cohen } 1041e126ba97SEli Cohen 104209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1043e126ba97SEli Cohen { 1044e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1045c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1046e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 104709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1048e126ba97SEli Cohen else if (!qp->has_rq) 104909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1050e126ba97SEli Cohen else 105109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1052e126ba97SEli Cohen } 1053e126ba97SEli Cohen 1054e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1055e126ba97SEli Cohen { 1056e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1057e126ba97SEli Cohen return 1; 1058e126ba97SEli Cohen 1059e126ba97SEli Cohen return 0; 1060e126ba97SEli Cohen } 1061e126ba97SEli Cohen 10620fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1063c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10641cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 10651cd6dbd3SYishai Hadas struct ib_pd *pd) 10660fb2ed66Smajd@mellanox.com { 1067c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10680fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10690fb2ed66Smajd@mellanox.com 10701cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 10710fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1072c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1073c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1074c2e53b2cSYishai Hadas 10750fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10760fb2ed66Smajd@mellanox.com } 10770fb2ed66Smajd@mellanox.com 10780fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10791cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 10800fb2ed66Smajd@mellanox.com { 10811cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 10820fb2ed66Smajd@mellanox.com } 10830fb2ed66Smajd@mellanox.com 1084b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1085b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1086b96c9ddeSMark Bloch { 1087b96c9ddeSMark Bloch if (sq->flow_rule) 1088b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1089b96c9ddeSMark Bloch } 1090b96c9ddeSMark Bloch 10910fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10920fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10930fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10940fb2ed66Smajd@mellanox.com { 10950fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10960fb2ed66Smajd@mellanox.com __be64 *pas; 10970fb2ed66Smajd@mellanox.com void *in; 10980fb2ed66Smajd@mellanox.com void *sqc; 10990fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11000fb2ed66Smajd@mellanox.com void *wq; 11010fb2ed66Smajd@mellanox.com int inlen; 11020fb2ed66Smajd@mellanox.com int err; 11030fb2ed66Smajd@mellanox.com int page_shift = 0; 11040fb2ed66Smajd@mellanox.com int npages; 11050fb2ed66Smajd@mellanox.com int ncont = 0; 11060fb2ed66Smajd@mellanox.com u32 offset = 0; 11070fb2ed66Smajd@mellanox.com 11080fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11090fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11100fb2ed66Smajd@mellanox.com &ncont, &offset); 11110fb2ed66Smajd@mellanox.com if (err) 11120fb2ed66Smajd@mellanox.com return err; 11130fb2ed66Smajd@mellanox.com 11140fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11151b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11160fb2ed66Smajd@mellanox.com if (!in) { 11170fb2ed66Smajd@mellanox.com err = -ENOMEM; 11180fb2ed66Smajd@mellanox.com goto err_umem; 11190fb2ed66Smajd@mellanox.com } 11200fb2ed66Smajd@mellanox.com 1121c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 11220fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11230fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1124795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1125795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11260fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11270fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11280fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11290fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113196dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113296dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 113396dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11340fb2ed66Smajd@mellanox.com 11350fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11360fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11390fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11420fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11440fb2ed66Smajd@mellanox.com 11450fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11460fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11470fb2ed66Smajd@mellanox.com 11480fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11490fb2ed66Smajd@mellanox.com 11500fb2ed66Smajd@mellanox.com kvfree(in); 11510fb2ed66Smajd@mellanox.com 11520fb2ed66Smajd@mellanox.com if (err) 11530fb2ed66Smajd@mellanox.com goto err_umem; 11540fb2ed66Smajd@mellanox.com 1155b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1156b96c9ddeSMark Bloch if (err) 1157b96c9ddeSMark Bloch goto err_flow; 1158b96c9ddeSMark Bloch 11590fb2ed66Smajd@mellanox.com return 0; 11600fb2ed66Smajd@mellanox.com 1161b96c9ddeSMark Bloch err_flow: 1162b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1163b96c9ddeSMark Bloch 11640fb2ed66Smajd@mellanox.com err_umem: 11650fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11660fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11670fb2ed66Smajd@mellanox.com 11680fb2ed66Smajd@mellanox.com return err; 11690fb2ed66Smajd@mellanox.com } 11700fb2ed66Smajd@mellanox.com 11710fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11720fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11730fb2ed66Smajd@mellanox.com { 1174b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11750fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11760fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11770fb2ed66Smajd@mellanox.com } 11780fb2ed66Smajd@mellanox.com 11792c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11800fb2ed66Smajd@mellanox.com { 11810fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11820fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11830fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11840fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11850fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11860fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11870fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11880fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11890fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11900fb2ed66Smajd@mellanox.com 11910fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11920fb2ed66Smajd@mellanox.com } 11930fb2ed66Smajd@mellanox.com 11940fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11952c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 119634d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 11970fb2ed66Smajd@mellanox.com { 1198358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 11990fb2ed66Smajd@mellanox.com __be64 *pas; 12000fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12010fb2ed66Smajd@mellanox.com void *in; 12020fb2ed66Smajd@mellanox.com void *rqc; 12030fb2ed66Smajd@mellanox.com void *wq; 12040fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12052c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12062c292dbbSBoris Pismenny size_t inlen; 12070fb2ed66Smajd@mellanox.com int err; 12082c292dbbSBoris Pismenny 12092c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12102c292dbbSBoris Pismenny return -EINVAL; 12110fb2ed66Smajd@mellanox.com 12120fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12131b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12140fb2ed66Smajd@mellanox.com if (!in) 12150fb2ed66Smajd@mellanox.com return -ENOMEM; 12160fb2ed66Smajd@mellanox.com 121734d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 12180fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1219e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12200fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12210fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12220fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12230fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12240fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12250fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12260fb2ed66Smajd@mellanox.com 1227358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1228358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1229358e42eaSMajd Dibbiny 12300fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12310fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1232b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1233b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12340fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12350fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12360fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12400fb2ed66Smajd@mellanox.com 12410fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12420fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12430fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12440fb2ed66Smajd@mellanox.com 12450fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12460fb2ed66Smajd@mellanox.com 12470fb2ed66Smajd@mellanox.com kvfree(in); 12480fb2ed66Smajd@mellanox.com 12490fb2ed66Smajd@mellanox.com return err; 12500fb2ed66Smajd@mellanox.com } 12510fb2ed66Smajd@mellanox.com 12520fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12530fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12540fb2ed66Smajd@mellanox.com { 12550fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12560fb2ed66Smajd@mellanox.com } 12570fb2ed66Smajd@mellanox.com 1258f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1259f95ef6cbSMaor Gottlieb { 1260f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1261f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1262f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1263f95ef6cbSMaor Gottlieb } 1264f95ef6cbSMaor Gottlieb 12650042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12660042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1267443c1cf9SYishai Hadas u32 qp_flags_en, 1268443c1cf9SYishai Hadas struct ib_pd *pd) 12690042f9e4SMark Bloch { 12700042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 12710042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 12720042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1273443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 12740042f9e4SMark Bloch } 12750042f9e4SMark Bloch 12760fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1277f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1278443c1cf9SYishai Hadas u32 *qp_flags_en, 1279443c1cf9SYishai Hadas struct ib_pd *pd) 12800fb2ed66Smajd@mellanox.com { 1281175edba8SMark Bloch u8 lb_flag = 0; 12820fb2ed66Smajd@mellanox.com u32 *in; 12830fb2ed66Smajd@mellanox.com void *tirc; 12840fb2ed66Smajd@mellanox.com int inlen; 12850fb2ed66Smajd@mellanox.com int err; 12860fb2ed66Smajd@mellanox.com 12870fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12881b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12890fb2ed66Smajd@mellanox.com if (!in) 12900fb2ed66Smajd@mellanox.com return -ENOMEM; 12910fb2ed66Smajd@mellanox.com 1292443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 12930fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12940fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12950fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12960fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1297175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1298f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 12990fb2ed66Smajd@mellanox.com 1300175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1301175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1302175edba8SMark Bloch 1303175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1304175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1305175edba8SMark Bloch 1306175edba8SMark Bloch if (dev->rep) { 1307175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1308175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1309175edba8SMark Bloch } 1310175edba8SMark Bloch 1311175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1312ec9c2fb8SMark Bloch 13130fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 13140fb2ed66Smajd@mellanox.com 13150042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 13160042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 13170042f9e4SMark Bloch 13180042f9e4SMark Bloch if (err) 1319443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 13200042f9e4SMark Bloch } 13210fb2ed66Smajd@mellanox.com kvfree(in); 13220fb2ed66Smajd@mellanox.com 13230fb2ed66Smajd@mellanox.com return err; 13240fb2ed66Smajd@mellanox.com } 13250fb2ed66Smajd@mellanox.com 13260fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13272c292dbbSBoris Pismenny u32 *in, size_t inlen, 13280fb2ed66Smajd@mellanox.com struct ib_pd *pd) 13290fb2ed66Smajd@mellanox.com { 13300fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13310fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13320fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13330fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13340fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13350fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13360fb2ed66Smajd@mellanox.com int err; 13370fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13380fb2ed66Smajd@mellanox.com 13390fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13401cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 13410fb2ed66Smajd@mellanox.com if (err) 13420fb2ed66Smajd@mellanox.com return err; 13430fb2ed66Smajd@mellanox.com 13440fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13450fb2ed66Smajd@mellanox.com if (err) 13460fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13470fb2ed66Smajd@mellanox.com 13480fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13491d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13500fb2ed66Smajd@mellanox.com } 13510fb2ed66Smajd@mellanox.com 13520fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1353358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1354358e42eaSMajd Dibbiny 1355e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1356e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1357b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1358b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 135934d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 13600fb2ed66Smajd@mellanox.com if (err) 13610fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13620fb2ed66Smajd@mellanox.com 1363443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 13640fb2ed66Smajd@mellanox.com if (err) 13650fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13660fb2ed66Smajd@mellanox.com } 13670fb2ed66Smajd@mellanox.com 13680fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13690fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13700fb2ed66Smajd@mellanox.com 13710fb2ed66Smajd@mellanox.com return 0; 13720fb2ed66Smajd@mellanox.com 13730fb2ed66Smajd@mellanox.com err_destroy_rq: 13740fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13750fb2ed66Smajd@mellanox.com err_destroy_sq: 13760fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 13770fb2ed66Smajd@mellanox.com return err; 13780fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13790fb2ed66Smajd@mellanox.com err_destroy_tis: 13801cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 13810fb2ed66Smajd@mellanox.com 13820fb2ed66Smajd@mellanox.com return err; 13830fb2ed66Smajd@mellanox.com } 13840fb2ed66Smajd@mellanox.com 13850fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 13860fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 13870fb2ed66Smajd@mellanox.com { 13880fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13890fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13900fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13910fb2ed66Smajd@mellanox.com 13920fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1393443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 13940fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13950fb2ed66Smajd@mellanox.com } 13960fb2ed66Smajd@mellanox.com 13970fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13980fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13991cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 14000fb2ed66Smajd@mellanox.com } 14010fb2ed66Smajd@mellanox.com } 14020fb2ed66Smajd@mellanox.com 14030fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 14040fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 14050fb2ed66Smajd@mellanox.com { 14060fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14070fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14080fb2ed66Smajd@mellanox.com 14090fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 14100fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 14110fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 14120fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 14130fb2ed66Smajd@mellanox.com } 14140fb2ed66Smajd@mellanox.com 141528d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 141628d61370SYishai Hadas { 14170042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14180042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14190042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1420443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1421443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 142228d61370SYishai Hadas } 142328d61370SYishai Hadas 142428d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 142528d61370SYishai Hadas struct ib_pd *pd, 142628d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 142728d61370SYishai Hadas struct ib_udata *udata) 142828d61370SYishai Hadas { 142928d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 143028d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 143128d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 143228d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 143328d61370SYishai Hadas int inlen; 143428d61370SYishai Hadas int err; 143528d61370SYishai Hadas u32 *in; 143628d61370SYishai Hadas void *tirc; 143728d61370SYishai Hadas void *hfso; 143828d61370SYishai Hadas u32 selected_fields = 0; 14392d93fc85SMatan Barak u32 outer_l4; 144028d61370SYishai Hadas size_t min_resp_len; 144128d61370SYishai Hadas u32 tdn = mucontext->tdn; 144228d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 144328d61370SYishai Hadas size_t required_cmd_sz; 1444175edba8SMark Bloch u8 lb_flag = 0; 144528d61370SYishai Hadas 144628d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 144728d61370SYishai Hadas return -EOPNOTSUPP; 144828d61370SYishai Hadas 144928d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 145028d61370SYishai Hadas return -EINVAL; 145128d61370SYishai Hadas 14522f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 145328d61370SYishai Hadas if (udata->outlen < min_resp_len) 145428d61370SYishai Hadas return -EINVAL; 145528d61370SYishai Hadas 1456f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 145728d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 145828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 145928d61370SYishai Hadas return -EINVAL; 146028d61370SYishai Hadas } 146128d61370SYishai Hadas 146228d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 146328d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 146428d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 146528d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 146628d61370SYishai Hadas return -EOPNOTSUPP; 146728d61370SYishai Hadas } 146828d61370SYishai Hadas 146928d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 147028d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 147128d61370SYishai Hadas return -EFAULT; 147228d61370SYishai Hadas } 147328d61370SYishai Hadas 147428d61370SYishai Hadas if (ucmd.comp_mask) { 147528d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 147628d61370SYishai Hadas return -EOPNOTSUPP; 147728d61370SYishai Hadas } 147828d61370SYishai Hadas 1479175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1480175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1481175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1482f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1483f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1484f95ef6cbSMaor Gottlieb } 1485f95ef6cbSMaor Gottlieb 1486f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1487f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1488f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 148928d61370SYishai Hadas return -EOPNOTSUPP; 149028d61370SYishai Hadas } 149128d61370SYishai Hadas 1492309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1493309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1494309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1495309fa347SMaor Gottlieb return -EOPNOTSUPP; 1496309fa347SMaor Gottlieb } 1497309fa347SMaor Gottlieb 1498175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1499175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1500175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1501175edba8SMark Bloch } 1502175edba8SMark Bloch 1503175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1504175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1505175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1506175edba8SMark Bloch } 1507175edba8SMark Bloch 150841d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 150928d61370SYishai Hadas if (err) { 151028d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 151128d61370SYishai Hadas return -EINVAL; 151228d61370SYishai Hadas } 151328d61370SYishai Hadas 151428d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 15151b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 151628d61370SYishai Hadas if (!in) 151728d61370SYishai Hadas return -ENOMEM; 151828d61370SYishai Hadas 1519443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 152028d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 152128d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 152228d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 152328d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 152428d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 152528d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 152628d61370SYishai Hadas 152728d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1528f95ef6cbSMaor Gottlieb 1529f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1530f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1531f95ef6cbSMaor Gottlieb 1532175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1533175edba8SMark Bloch 1534309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1535309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1536309fa347SMaor Gottlieb else 1537309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1538309fa347SMaor Gottlieb 153928d61370SYishai Hadas switch (ucmd.rx_hash_function) { 154028d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 154128d61370SYishai Hadas { 154228d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 154328d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 154428d61370SYishai Hadas 154528d61370SYishai Hadas if (len != ucmd.rx_key_len) { 154628d61370SYishai Hadas err = -EINVAL; 154728d61370SYishai Hadas goto err; 154828d61370SYishai Hadas } 154928d61370SYishai Hadas 155028d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 155128d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 155228d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 155328d61370SYishai Hadas break; 155428d61370SYishai Hadas } 155528d61370SYishai Hadas default: 155628d61370SYishai Hadas err = -EOPNOTSUPP; 155728d61370SYishai Hadas goto err; 155828d61370SYishai Hadas } 155928d61370SYishai Hadas 156028d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 156128d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 156228d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 156328d61370SYishai Hadas goto create_tir; 156428d61370SYishai Hadas err = -EINVAL; 156528d61370SYishai Hadas goto err; 156628d61370SYishai Hadas } 156728d61370SYishai Hadas 156828d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 156928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 157028d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 157128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 157228d61370SYishai Hadas err = -EINVAL; 157328d61370SYishai Hadas goto err; 157428d61370SYishai Hadas } 157528d61370SYishai Hadas 157628d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 157728d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 157828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 157928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 158028d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 158128d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 158228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 158328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 158428d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 158528d61370SYishai Hadas 15862d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 15872d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 158828d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 15892d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 15902d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 15912d93fc85SMatan Barak 15922d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 15932d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 159428d61370SYishai Hadas err = -EINVAL; 159528d61370SYishai Hadas goto err; 159628d61370SYishai Hadas } 159728d61370SYishai Hadas 159828d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 159928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 160028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 160128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 160228d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 160328d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 160428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 160528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 160628d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 160728d61370SYishai Hadas 160828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 160928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 161028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 161128d61370SYishai Hadas 161228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 161328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 161428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 161528d61370SYishai Hadas 161628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 161728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 161828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 161928d61370SYishai Hadas 162028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 162128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 162228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 162328d61370SYishai Hadas 16242d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 16252d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 16262d93fc85SMatan Barak 162728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 162828d61370SYishai Hadas 162928d61370SYishai Hadas create_tir: 163028d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 163128d61370SYishai Hadas 16320042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 16330042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 16340042f9e4SMark Bloch 16350042f9e4SMark Bloch if (err) 1636443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1637443c1cf9SYishai Hadas to_mpd(pd)->uid); 16380042f9e4SMark Bloch } 16390042f9e4SMark Bloch 164028d61370SYishai Hadas if (err) 164128d61370SYishai Hadas goto err; 164228d61370SYishai Hadas 164328d61370SYishai Hadas kvfree(in); 164428d61370SYishai Hadas /* qpn is reserved for that QP */ 164528d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1646d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 164728d61370SYishai Hadas return 0; 164828d61370SYishai Hadas 164928d61370SYishai Hadas err: 165028d61370SYishai Hadas kvfree(in); 165128d61370SYishai Hadas return err; 165228d61370SYishai Hadas } 165328d61370SYishai Hadas 1654e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1655e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1656e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1657e126ba97SEli Cohen { 1658e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 165909a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1660938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 16610625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 166289ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 166389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 166489ea94a7SMaor Gottlieb unsigned long flags; 1665cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 166609a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 166709a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1668e7b169f3SNoa Osherovich int mlx5_st; 1669cfb5e088SHaggai Abramovsky void *qpc; 167009a7d9ecSSaeed Mahameed u32 *in; 167109a7d9ecSSaeed Mahameed int err; 1672e126ba97SEli Cohen 1673e126ba97SEli Cohen mutex_init(&qp->mutex); 1674e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1675e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1676e126ba97SEli Cohen 1677e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1678e7b169f3SNoa Osherovich if (mlx5_st < 0) 1679e7b169f3SNoa Osherovich return -EINVAL; 1680e7b169f3SNoa Osherovich 168128d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 168228d61370SYishai Hadas if (!udata) 168328d61370SYishai Hadas return -ENOSYS; 168428d61370SYishai Hadas 168528d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 168628d61370SYishai Hadas return err; 168728d61370SYishai Hadas } 168828d61370SYishai Hadas 1689f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1690938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1691f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1692f360d88aSEli Cohen return -EINVAL; 1693f360d88aSEli Cohen } else { 1694f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1695f360d88aSEli Cohen } 1696f360d88aSEli Cohen } 1697f360d88aSEli Cohen 1698051f2630SLeon Romanovsky if (init_attr->create_flags & 1699051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1700051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1701051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1702051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1703051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1704051f2630SLeon Romanovsky return -EINVAL; 1705051f2630SLeon Romanovsky } 1706051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1707051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1708051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1709051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1710051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1711051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1712051f2630SLeon Romanovsky } 1713f0313965SErez Shitrit 1714f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1715f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1716f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1717f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1718f0313965SErez Shitrit return -EOPNOTSUPP; 1719f0313965SErez Shitrit } 1720f0313965SErez Shitrit 1721358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1722358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1723358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1724358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1725358e42eaSMajd Dibbiny } 1726358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1727358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1728358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1729358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1730358e42eaSMajd Dibbiny } 1731358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1732358e42eaSMajd Dibbiny } 1733358e42eaSMajd Dibbiny 1734e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1735e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1736e126ba97SEli Cohen 1737e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1738e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1739e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1740e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1741e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1742e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1743e4cc4fa7SNoa Osherovich } 1744e4cc4fa7SNoa Osherovich 1745e126ba97SEli Cohen if (pd && pd->uobject) { 1746e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1747e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1748e126ba97SEli Cohen return -EFAULT; 1749e126ba97SEli Cohen } 1750e126ba97SEli Cohen 1751cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1752cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1753cfb5e088SHaggai Abramovsky if (err) 1754cfb5e088SHaggai Abramovsky return err; 1755cfb5e088SHaggai Abramovsky 1756e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1757e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1758f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1759f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1760f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1761f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1762f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1763f95ef6cbSMaor Gottlieb } 1764175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 1765175edba8SMark Bloch } 1766175edba8SMark Bloch 1767175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 1768175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1769175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 1770175edba8SMark Bloch return -EOPNOTSUPP; 1771175edba8SMark Bloch } 1772175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1773175edba8SMark Bloch } 1774175edba8SMark Bloch 1775175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1776175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1777175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 1778175edba8SMark Bloch return -EOPNOTSUPP; 1779175edba8SMark Bloch } 1780175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1781f95ef6cbSMaor Gottlieb } 1782c2e53b2cSYishai Hadas 1783c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1784c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1785c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1786c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1787c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1788c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1789c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1790c2e53b2cSYishai Hadas } 1791c2e53b2cSYishai Hadas 1792c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1793c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1794c2e53b2cSYishai Hadas } 1795e126ba97SEli Cohen } else { 1796e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1797e126ba97SEli Cohen } 1798e126ba97SEli Cohen 1799c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1800c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1801c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1802c2e53b2cSYishai Hadas &qp->trans_qp.base; 1803c2e53b2cSYishai Hadas 1804e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1805e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1806e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1807e126ba97SEli Cohen if (err) { 1808e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1809e126ba97SEli Cohen return err; 1810e126ba97SEli Cohen } 1811e126ba97SEli Cohen 1812e126ba97SEli Cohen if (pd) { 1813e126ba97SEli Cohen if (pd->uobject) { 1814938fe83cSSaeed Mahameed __u32 max_wqes = 1815938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1816e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1817e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1818e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1819e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1820e126ba97SEli Cohen return -EINVAL; 1821e126ba97SEli Cohen } 1822938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1823e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1824938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1825e126ba97SEli Cohen return -EINVAL; 1826e126ba97SEli Cohen } 1827b11a4f9cSHaggai Eran if (init_attr->create_flags & 1828b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1829b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1830b11a4f9cSHaggai Eran return -EINVAL; 1831b11a4f9cSHaggai Eran } 18320fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 18330fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1834e126ba97SEli Cohen if (err) 1835e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1836e126ba97SEli Cohen } else { 183719098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 183819098df2Smajd@mellanox.com base); 1839e126ba97SEli Cohen if (err) 1840e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1841e126ba97SEli Cohen } 1842e126ba97SEli Cohen 1843e126ba97SEli Cohen if (err) 1844e126ba97SEli Cohen return err; 1845e126ba97SEli Cohen } else { 18461b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1847e126ba97SEli Cohen if (!in) 1848e126ba97SEli Cohen return -ENOMEM; 1849e126ba97SEli Cohen 1850e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1851e126ba97SEli Cohen } 1852e126ba97SEli Cohen 1853e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1854e126ba97SEli Cohen qp->port = init_attr->port_num; 1855e126ba97SEli Cohen 185609a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 185709a7d9ecSSaeed Mahameed 1858e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 185909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1860e126ba97SEli Cohen 1861e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 186209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1863e126ba97SEli Cohen else 186409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 186509a7d9ecSSaeed Mahameed 1866e126ba97SEli Cohen 1867e126ba97SEli Cohen if (qp->wq_sig) 186809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1869e126ba97SEli Cohen 1870f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 187109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1872f360d88aSEli Cohen 1873051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 187409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1875051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 187609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1877051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 187809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1879051f2630SLeon Romanovsky 1880e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1881e126ba97SEli Cohen int rcqe_sz; 1882e126ba97SEli Cohen int scqe_sz; 1883e126ba97SEli Cohen 1884e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1885e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1886e126ba97SEli Cohen 1887e126ba97SEli Cohen if (rcqe_sz == 128) 188809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1889e126ba97SEli Cohen else 189009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1891e126ba97SEli Cohen 1892e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1893e126ba97SEli Cohen if (scqe_sz == 128) 189409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1895e126ba97SEli Cohen else 189609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1897e126ba97SEli Cohen } 1898e126ba97SEli Cohen } 1899e126ba97SEli Cohen 1900e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 190109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 190209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1903e126ba97SEli Cohen } 1904e126ba97SEli Cohen 190509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1906e126ba97SEli Cohen 19073fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 190809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 19093fd3307eSArtemy Kovalyov } else { 191009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 19113fd3307eSArtemy Kovalyov if (init_attr->srq && 19123fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 19133fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 19143fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 19153fd3307eSArtemy Kovalyov } 1916e126ba97SEli Cohen 1917e126ba97SEli Cohen /* Set default resources */ 1918e126ba97SEli Cohen switch (init_attr->qp_type) { 1919e126ba97SEli Cohen case IB_QPT_XRC_TGT: 192009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 192109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 192209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 192309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1924e126ba97SEli Cohen break; 1925e126ba97SEli Cohen case IB_QPT_XRC_INI: 192609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 192709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 192809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1929e126ba97SEli Cohen break; 1930e126ba97SEli Cohen default: 1931e126ba97SEli Cohen if (init_attr->srq) { 193209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 193309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1934e126ba97SEli Cohen } else { 193509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 193609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1937e126ba97SEli Cohen } 1938e126ba97SEli Cohen } 1939e126ba97SEli Cohen 1940e126ba97SEli Cohen if (init_attr->send_cq) 194109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1942e126ba97SEli Cohen 1943e126ba97SEli Cohen if (init_attr->recv_cq) 194409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1945e126ba97SEli Cohen 194609a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1947e126ba97SEli Cohen 1948cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 194909a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1950cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 195109a7d9ecSSaeed Mahameed 1952f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1953f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1954f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1955f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1956f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1957f0313965SErez Shitrit } 1958cfb5e088SHaggai Abramovsky 1959b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 1960b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 1961b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 1962b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 1963b1383aa6SNoa Osherovich goto err; 1964b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1965b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 1966b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 1967b1383aa6SNoa Osherovich } else { 1968b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 1969b1383aa6SNoa Osherovich } 1970b1383aa6SNoa Osherovich } 1971b1383aa6SNoa Osherovich 19722c292dbbSBoris Pismenny if (inlen < 0) { 19732c292dbbSBoris Pismenny err = -EINVAL; 19742c292dbbSBoris Pismenny goto err; 19752c292dbbSBoris Pismenny } 19762c292dbbSBoris Pismenny 1977c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 1978c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 19790fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 19800fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 19812c292dbbSBoris Pismenny err = create_raw_packet_qp(dev, qp, in, inlen, pd); 19820fb2ed66Smajd@mellanox.com } else { 198319098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 19840fb2ed66Smajd@mellanox.com } 19850fb2ed66Smajd@mellanox.com 1986e126ba97SEli Cohen if (err) { 1987e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1988e126ba97SEli Cohen goto err_create; 1989e126ba97SEli Cohen } 1990e126ba97SEli Cohen 1991479163f4SAl Viro kvfree(in); 1992e126ba97SEli Cohen 199319098df2Smajd@mellanox.com base->container_mibqp = qp; 199419098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1995e126ba97SEli Cohen 199689ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 199789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 199889ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 199989ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 200089ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 200189ea94a7SMaor Gottlieb * flow 200289ea94a7SMaor Gottlieb */ 200389ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 200489ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 200589ea94a7SMaor Gottlieb */ 200689ea94a7SMaor Gottlieb if (send_cq) 200789ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 200889ea94a7SMaor Gottlieb if (recv_cq) 200989ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 201089ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 201189ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 201289ea94a7SMaor Gottlieb 2013e126ba97SEli Cohen return 0; 2014e126ba97SEli Cohen 2015e126ba97SEli Cohen err_create: 2016e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2017b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 2018e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2019e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2020e126ba97SEli Cohen 2021b1383aa6SNoa Osherovich err: 2022479163f4SAl Viro kvfree(in); 2023e126ba97SEli Cohen return err; 2024e126ba97SEli Cohen } 2025e126ba97SEli Cohen 2026e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2027e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2028e126ba97SEli Cohen { 2029e126ba97SEli Cohen if (send_cq) { 2030e126ba97SEli Cohen if (recv_cq) { 2031e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 203289ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2033e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2034e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2035e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 203689ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2037e126ba97SEli Cohen __acquire(&recv_cq->lock); 2038e126ba97SEli Cohen } else { 203989ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2040e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2041e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2042e126ba97SEli Cohen } 2043e126ba97SEli Cohen } else { 204489ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 20456a4f139aSEli Cohen __acquire(&recv_cq->lock); 2046e126ba97SEli Cohen } 2047e126ba97SEli Cohen } else if (recv_cq) { 204889ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 20496a4f139aSEli Cohen __acquire(&send_cq->lock); 20506a4f139aSEli Cohen } else { 20516a4f139aSEli Cohen __acquire(&send_cq->lock); 20526a4f139aSEli Cohen __acquire(&recv_cq->lock); 2053e126ba97SEli Cohen } 2054e126ba97SEli Cohen } 2055e126ba97SEli Cohen 2056e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2057e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2058e126ba97SEli Cohen { 2059e126ba97SEli Cohen if (send_cq) { 2060e126ba97SEli Cohen if (recv_cq) { 2061e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2062e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 206389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2064e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2065e126ba97SEli Cohen __release(&recv_cq->lock); 206689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2067e126ba97SEli Cohen } else { 2068e126ba97SEli Cohen spin_unlock(&send_cq->lock); 206989ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2070e126ba97SEli Cohen } 2071e126ba97SEli Cohen } else { 20726a4f139aSEli Cohen __release(&recv_cq->lock); 207389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2074e126ba97SEli Cohen } 2075e126ba97SEli Cohen } else if (recv_cq) { 20766a4f139aSEli Cohen __release(&send_cq->lock); 207789ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 20786a4f139aSEli Cohen } else { 20796a4f139aSEli Cohen __release(&recv_cq->lock); 20806a4f139aSEli Cohen __release(&send_cq->lock); 2081e126ba97SEli Cohen } 2082e126ba97SEli Cohen } 2083e126ba97SEli Cohen 2084e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2085e126ba97SEli Cohen { 2086e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2087e126ba97SEli Cohen } 2088e126ba97SEli Cohen 208989ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 209089ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2091e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2092e126ba97SEli Cohen { 209389ea94a7SMaor Gottlieb switch (qp_type) { 2094e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2095e126ba97SEli Cohen *send_cq = NULL; 2096e126ba97SEli Cohen *recv_cq = NULL; 2097e126ba97SEli Cohen break; 2098e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2099e126ba97SEli Cohen case IB_QPT_XRC_INI: 210089ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2101e126ba97SEli Cohen *recv_cq = NULL; 2102e126ba97SEli Cohen break; 2103e126ba97SEli Cohen 2104e126ba97SEli Cohen case IB_QPT_SMI: 2105d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2106e126ba97SEli Cohen case IB_QPT_RC: 2107e126ba97SEli Cohen case IB_QPT_UC: 2108e126ba97SEli Cohen case IB_QPT_UD: 2109e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2110e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 21110fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 211289ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 211389ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2114e126ba97SEli Cohen break; 2115e126ba97SEli Cohen 2116e126ba97SEli Cohen case IB_QPT_MAX: 2117e126ba97SEli Cohen default: 2118e126ba97SEli Cohen *send_cq = NULL; 2119e126ba97SEli Cohen *recv_cq = NULL; 2120e126ba97SEli Cohen break; 2121e126ba97SEli Cohen } 2122e126ba97SEli Cohen } 2123e126ba97SEli Cohen 2124ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 212513eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 212613eab21fSAviv Heller u8 lag_tx_affinity); 2127ad5f8e96Smajd@mellanox.com 2128e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2129e126ba97SEli Cohen { 2130e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2131c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 213289ea94a7SMaor Gottlieb unsigned long flags; 2133e126ba97SEli Cohen int err; 2134e126ba97SEli Cohen 213528d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 213628d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 213728d61370SYishai Hadas return; 213828d61370SYishai Hadas } 213928d61370SYishai Hadas 2140c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2141c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 21420fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 21430fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 21440fb2ed66Smajd@mellanox.com 21456aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2146c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2147c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2148ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 21491a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 21501a412fb1SSaeed Mahameed NULL, &base->mqp); 2151ad5f8e96Smajd@mellanox.com } else { 21520680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 21530680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 21540680efa2SAlex Vesker }; 21550680efa2SAlex Vesker 215613eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2157ad5f8e96Smajd@mellanox.com } 2158ad5f8e96Smajd@mellanox.com if (err) 2159427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 216019098df2Smajd@mellanox.com base->mqp.qpn); 21616aec21f6SHaggai Eran } 2162e126ba97SEli Cohen 216389ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 216489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 216589ea94a7SMaor Gottlieb 216689ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 216789ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 216889ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 216989ea94a7SMaor Gottlieb list_del(&qp->qps_list); 217089ea94a7SMaor Gottlieb if (send_cq) 217189ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 217289ea94a7SMaor Gottlieb 217389ea94a7SMaor Gottlieb if (recv_cq) 217489ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2175e126ba97SEli Cohen 2176e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 217719098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2178e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2179e126ba97SEli Cohen if (send_cq != recv_cq) 218019098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 218119098df2Smajd@mellanox.com NULL); 2182e126ba97SEli Cohen } 218389ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 218489ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2185e126ba97SEli Cohen 2186c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2187c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21880fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 21890fb2ed66Smajd@mellanox.com } else { 219019098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2191e126ba97SEli Cohen if (err) 21920fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 21930fb2ed66Smajd@mellanox.com base->mqp.qpn); 21940fb2ed66Smajd@mellanox.com } 2195e126ba97SEli Cohen 2196e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2197e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2198e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2199b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2200e126ba97SEli Cohen } 2201e126ba97SEli Cohen 2202e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2203e126ba97SEli Cohen { 2204e126ba97SEli Cohen switch (type) { 2205e126ba97SEli Cohen case IB_QPT_SMI: 2206e126ba97SEli Cohen return "IB_QPT_SMI"; 2207e126ba97SEli Cohen case IB_QPT_GSI: 2208e126ba97SEli Cohen return "IB_QPT_GSI"; 2209e126ba97SEli Cohen case IB_QPT_RC: 2210e126ba97SEli Cohen return "IB_QPT_RC"; 2211e126ba97SEli Cohen case IB_QPT_UC: 2212e126ba97SEli Cohen return "IB_QPT_UC"; 2213e126ba97SEli Cohen case IB_QPT_UD: 2214e126ba97SEli Cohen return "IB_QPT_UD"; 2215e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2216e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2217e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2218e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2219e126ba97SEli Cohen case IB_QPT_XRC_INI: 2220e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2221e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2222e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2223e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2224e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2225e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2226e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2227b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2228b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2229e126ba97SEli Cohen case IB_QPT_MAX: 2230e126ba97SEli Cohen default: 2231e126ba97SEli Cohen return "Invalid QP type"; 2232e126ba97SEli Cohen } 2233e126ba97SEli Cohen } 2234e126ba97SEli Cohen 2235b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2236b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2237b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2238b4aaa1f0SMoni Shoua { 2239b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2240b4aaa1f0SMoni Shoua int err = 0; 2241b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2242b4aaa1f0SMoni Shoua void *dctc; 2243b4aaa1f0SMoni Shoua 2244b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2245b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2246b4aaa1f0SMoni Shoua 2247b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2248b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2249b4aaa1f0SMoni Shoua if (err) 2250b4aaa1f0SMoni Shoua return ERR_PTR(err); 2251b4aaa1f0SMoni Shoua 2252b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2253b4aaa1f0SMoni Shoua if (!qp) 2254b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2255b4aaa1f0SMoni Shoua 2256b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2257b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2258b4aaa1f0SMoni Shoua err = -ENOMEM; 2259b4aaa1f0SMoni Shoua goto err_free; 2260b4aaa1f0SMoni Shoua } 2261b4aaa1f0SMoni Shoua 2262a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2263b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2264776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2265b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2266b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2267b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2268b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2269b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2270b4aaa1f0SMoni Shoua 2271b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2272b4aaa1f0SMoni Shoua 2273b4aaa1f0SMoni Shoua return &qp->ibqp; 2274b4aaa1f0SMoni Shoua err_free: 2275b4aaa1f0SMoni Shoua kfree(qp); 2276b4aaa1f0SMoni Shoua return ERR_PTR(err); 2277b4aaa1f0SMoni Shoua } 2278b4aaa1f0SMoni Shoua 2279b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2280e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2281b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2282b4aaa1f0SMoni Shoua struct ib_udata *udata) 2283b4aaa1f0SMoni Shoua { 2284b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2285b4aaa1f0SMoni Shoua int err; 2286b4aaa1f0SMoni Shoua 2287b4aaa1f0SMoni Shoua if (!udata) 2288b4aaa1f0SMoni Shoua return -EINVAL; 2289b4aaa1f0SMoni Shoua 2290b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2291b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2292b4aaa1f0SMoni Shoua return -EINVAL; 2293b4aaa1f0SMoni Shoua } 2294b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2295b4aaa1f0SMoni Shoua if (err) 2296b4aaa1f0SMoni Shoua return err; 2297b4aaa1f0SMoni Shoua 2298b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2299b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2300b4aaa1f0SMoni Shoua } else { 2301b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2302b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2303b4aaa1f0SMoni Shoua } else { 2304b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2305b4aaa1f0SMoni Shoua return -EINVAL; 2306b4aaa1f0SMoni Shoua } 2307b4aaa1f0SMoni Shoua } 2308b4aaa1f0SMoni Shoua 2309b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2310b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2311b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2312b4aaa1f0SMoni Shoua } 2313b4aaa1f0SMoni Shoua 2314b4aaa1f0SMoni Shoua return 0; 2315b4aaa1f0SMoni Shoua } 2316b4aaa1f0SMoni Shoua 2317b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2318b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2319e126ba97SEli Cohen struct ib_udata *udata) 2320e126ba97SEli Cohen { 2321e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2322e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2323e126ba97SEli Cohen u16 xrcdn = 0; 2324e126ba97SEli Cohen int err; 2325b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2326b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2327e126ba97SEli Cohen 2328e126ba97SEli Cohen if (pd) { 2329e126ba97SEli Cohen dev = to_mdev(pd->device); 23300fb2ed66Smajd@mellanox.com 23310fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 23320fb2ed66Smajd@mellanox.com if (!pd->uobject) { 23330fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 23340fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 23350fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 23360fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 23370fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 23380fb2ed66Smajd@mellanox.com } 23390fb2ed66Smajd@mellanox.com } 234009f16cf5SMajd Dibbiny } else { 234109f16cf5SMajd Dibbiny /* being cautious here */ 234209f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 234309f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 234409f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 234509f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 234609f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 234709f16cf5SMajd Dibbiny } 234809f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2349e126ba97SEli Cohen } 2350e126ba97SEli Cohen 2351b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2352b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2353b4aaa1f0SMoni Shoua 2354b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2355b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2356b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2357b4aaa1f0SMoni Shoua if (err) 2358b4aaa1f0SMoni Shoua return ERR_PTR(err); 2359c32a4f29SMoni Shoua 2360c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2361c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2362c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2363c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2364c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2365c32a4f29SMoni Shoua } 2366776a3906SMoni Shoua } else { 2367776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2368c32a4f29SMoni Shoua } 2369b4aaa1f0SMoni Shoua } 2370b4aaa1f0SMoni Shoua 2371e126ba97SEli Cohen switch (init_attr->qp_type) { 2372e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2373e126ba97SEli Cohen case IB_QPT_XRC_INI: 2374938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2375e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2376e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2377e126ba97SEli Cohen } 2378e126ba97SEli Cohen init_attr->recv_cq = NULL; 2379e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2380e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2381e126ba97SEli Cohen init_attr->send_cq = NULL; 2382e126ba97SEli Cohen } 2383e126ba97SEli Cohen 2384e126ba97SEli Cohen /* fall through */ 23850fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2386e126ba97SEli Cohen case IB_QPT_RC: 2387e126ba97SEli Cohen case IB_QPT_UC: 2388e126ba97SEli Cohen case IB_QPT_UD: 2389e126ba97SEli Cohen case IB_QPT_SMI: 2390d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2391e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2392c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2393e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2394e126ba97SEli Cohen if (!qp) 2395e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2396e126ba97SEli Cohen 2397e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2398e126ba97SEli Cohen if (err) { 2399e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2400e126ba97SEli Cohen kfree(qp); 2401e126ba97SEli Cohen return ERR_PTR(err); 2402e126ba97SEli Cohen } 2403e126ba97SEli Cohen 2404e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2405e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2406e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2407e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2408e126ba97SEli Cohen else 240919098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2410e126ba97SEli Cohen 2411e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 241219098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2413a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2414a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2415e126ba97SEli Cohen 241619098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2417e126ba97SEli Cohen 2418e126ba97SEli Cohen break; 2419e126ba97SEli Cohen 2420d16e91daSHaggai Eran case IB_QPT_GSI: 2421d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2422d16e91daSHaggai Eran 2423e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2424e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2425e126ba97SEli Cohen case IB_QPT_MAX: 2426e126ba97SEli Cohen default: 2427e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2428e126ba97SEli Cohen init_attr->qp_type); 2429e126ba97SEli Cohen /* Don't support raw QPs */ 2430e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2431e126ba97SEli Cohen } 2432e126ba97SEli Cohen 2433b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2434b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2435b4aaa1f0SMoni Shoua 2436e126ba97SEli Cohen return &qp->ibqp; 2437e126ba97SEli Cohen } 2438e126ba97SEli Cohen 2439776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2440776a3906SMoni Shoua { 2441776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2442776a3906SMoni Shoua 2443776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2444776a3906SMoni Shoua int err; 2445776a3906SMoni Shoua 2446776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2447776a3906SMoni Shoua if (err) { 2448776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2449776a3906SMoni Shoua return err; 2450776a3906SMoni Shoua } 2451776a3906SMoni Shoua } 2452776a3906SMoni Shoua 2453776a3906SMoni Shoua kfree(mqp->dct.in); 2454776a3906SMoni Shoua kfree(mqp); 2455776a3906SMoni Shoua return 0; 2456776a3906SMoni Shoua } 2457776a3906SMoni Shoua 2458e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2459e126ba97SEli Cohen { 2460e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2461e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2462e126ba97SEli Cohen 2463d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2464d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2465d16e91daSHaggai Eran 2466776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2467776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2468776a3906SMoni Shoua 2469e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2470e126ba97SEli Cohen 2471e126ba97SEli Cohen kfree(mqp); 2472e126ba97SEli Cohen 2473e126ba97SEli Cohen return 0; 2474e126ba97SEli Cohen } 2475e126ba97SEli Cohen 2476e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2477e126ba97SEli Cohen int attr_mask) 2478e126ba97SEli Cohen { 2479e126ba97SEli Cohen u32 hw_access_flags = 0; 2480e126ba97SEli Cohen u8 dest_rd_atomic; 2481e126ba97SEli Cohen u32 access_flags; 2482e126ba97SEli Cohen 2483e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2484e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2485e126ba97SEli Cohen else 248619098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2487e126ba97SEli Cohen 2488e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2489e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2490e126ba97SEli Cohen else 249119098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2492e126ba97SEli Cohen 2493e126ba97SEli Cohen if (!dest_rd_atomic) 2494e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2495e126ba97SEli Cohen 2496e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2497e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2498e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2499e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2500e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2501e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2502e126ba97SEli Cohen 2503e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2504e126ba97SEli Cohen } 2505e126ba97SEli Cohen 2506e126ba97SEli Cohen enum { 2507e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2508e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2509e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2510e126ba97SEli Cohen }; 2511e126ba97SEli Cohen 2512e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2513e126ba97SEli Cohen { 25144f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2515e126ba97SEli Cohen return 0; 25164f32ac2eSDanit Goldberg 25174f32ac2eSDanit Goldberg if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) 2518e126ba97SEli Cohen return -EINVAL; 25194f32ac2eSDanit Goldberg 25204f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2521e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2522938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2523e126ba97SEli Cohen --rate; 2524e126ba97SEli Cohen 25254f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2526e126ba97SEli Cohen } 2527e126ba97SEli Cohen 252875850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 25291cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 25301cd6dbd3SYishai Hadas struct ib_pd *pd) 253175850d0bSmajd@mellanox.com { 253275850d0bSmajd@mellanox.com void *in; 253375850d0bSmajd@mellanox.com void *tisc; 253475850d0bSmajd@mellanox.com int inlen; 253575850d0bSmajd@mellanox.com int err; 253675850d0bSmajd@mellanox.com 253775850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 25381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 253975850d0bSmajd@mellanox.com if (!in) 254075850d0bSmajd@mellanox.com return -ENOMEM; 254175850d0bSmajd@mellanox.com 254275850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 25431cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 254475850d0bSmajd@mellanox.com 254575850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 254675850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 254775850d0bSmajd@mellanox.com 254875850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 254975850d0bSmajd@mellanox.com 255075850d0bSmajd@mellanox.com kvfree(in); 255175850d0bSmajd@mellanox.com 255275850d0bSmajd@mellanox.com return err; 255375850d0bSmajd@mellanox.com } 255475850d0bSmajd@mellanox.com 255513eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 25561cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 25571cd6dbd3SYishai Hadas struct ib_pd *pd) 255813eab21fSAviv Heller { 255913eab21fSAviv Heller void *in; 256013eab21fSAviv Heller void *tisc; 256113eab21fSAviv Heller int inlen; 256213eab21fSAviv Heller int err; 256313eab21fSAviv Heller 256413eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 25651b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 256613eab21fSAviv Heller if (!in) 256713eab21fSAviv Heller return -ENOMEM; 256813eab21fSAviv Heller 256913eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 25701cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 257113eab21fSAviv Heller 257213eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 257313eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 257413eab21fSAviv Heller 257513eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 257613eab21fSAviv Heller 257713eab21fSAviv Heller kvfree(in); 257813eab21fSAviv Heller 257913eab21fSAviv Heller return err; 258013eab21fSAviv Heller } 258113eab21fSAviv Heller 258275850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 258390898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2584e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2585f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2586f879ee8dSAchiad Shochat bool alt) 2587e126ba97SEli Cohen { 2588d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2589e126ba97SEli Cohen int err; 2590ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2591d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2592d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2593e126ba97SEli Cohen 2594e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2595f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2596f879ee8dSAchiad Shochat attr->pkey_index); 2597e126ba97SEli Cohen 2598d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2599d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2600938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2601f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2602d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2603938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2604f83b4263SEli Cohen return -EINVAL; 2605f83b4263SEli Cohen } 26062811ba51SAchiad Shochat } 260744c58487SDasaratharaman Chandramouli 260844c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2609d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 26102811ba51SAchiad Shochat return -EINVAL; 261147ec3866SParav Pandit 261244c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 26132b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 26142b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 26152b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 26162b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 261747ec3866SParav Pandit path->udp_sport = 261847ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2619d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 262047ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2621ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2622d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 26232811ba51SAchiad Shochat } else { 2624d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2625d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2626d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2627d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2628d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2629d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2630e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2631d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 26322811ba51SAchiad Shochat } 26332811ba51SAchiad Shochat 2634d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2635d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2636d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2637e126ba97SEli Cohen path->tclass_flowlabel = 2638d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2639d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2640d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2641e126ba97SEli Cohen } 2642e126ba97SEli Cohen 2643d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2644e126ba97SEli Cohen if (err < 0) 2645e126ba97SEli Cohen return err; 2646e126ba97SEli Cohen path->static_rate = err; 2647e126ba97SEli Cohen path->port = port; 2648e126ba97SEli Cohen 2649e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2650f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2651e126ba97SEli Cohen 265275850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 265375850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 265475850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 26551cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 265675850d0bSmajd@mellanox.com 2657e126ba97SEli Cohen return 0; 2658e126ba97SEli Cohen } 2659e126ba97SEli Cohen 2660e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2661e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2662e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2663e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2664e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2665e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2666e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2667e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2668e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2669e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2670e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2671e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2672e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2673e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2674e126ba97SEli Cohen }, 2675e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2676e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2677e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2678e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2679e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2680e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2681e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2682e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2683e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2684e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2685e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2686e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2687e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2688a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2689a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2690a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2691a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2692a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2693e126ba97SEli Cohen }, 2694e126ba97SEli Cohen }, 2695e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2696e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2697e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2698e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2699e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2700e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2701e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2702e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2703e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2704e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2705e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2706e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2707e126ba97SEli Cohen }, 2708e126ba97SEli Cohen }, 2709e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2710e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2711e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2712e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2713e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2714e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2715c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2716c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2717e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2718c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2719c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2720e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2721e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2722e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2723e126ba97SEli Cohen }, 2724e126ba97SEli Cohen }, 2725e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2726e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2727e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2728e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 272975959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2730a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2731a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2732a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2733a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2734e126ba97SEli Cohen }, 2735e126ba97SEli Cohen }, 2736e126ba97SEli Cohen }; 2737e126ba97SEli Cohen 2738e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2739e126ba97SEli Cohen { 2740e126ba97SEli Cohen switch (ib_mask) { 2741e126ba97SEli Cohen case IB_QP_STATE: 2742e126ba97SEli Cohen return 0; 2743e126ba97SEli Cohen case IB_QP_CUR_STATE: 2744e126ba97SEli Cohen return 0; 2745e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2746e126ba97SEli Cohen return 0; 2747e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2748e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2749e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2750e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2751e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2752e126ba97SEli Cohen case IB_QP_PORT: 2753e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2754e126ba97SEli Cohen case IB_QP_QKEY: 2755e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2756e126ba97SEli Cohen case IB_QP_AV: 2757e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2758e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2759e126ba97SEli Cohen case IB_QP_PATH_MTU: 2760e126ba97SEli Cohen return 0; 2761e126ba97SEli Cohen case IB_QP_TIMEOUT: 2762e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2763e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2764e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2765e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2766e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2767e126ba97SEli Cohen case IB_QP_RQ_PSN: 2768e126ba97SEli Cohen return 0; 2769e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2770e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2771e126ba97SEli Cohen case IB_QP_ALT_PATH: 2772e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2773e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2774e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2775e126ba97SEli Cohen case IB_QP_SQ_PSN: 2776e126ba97SEli Cohen return 0; 2777e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2778e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2779e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2780e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2781e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2782e126ba97SEli Cohen case IB_QP_CAP: 2783e126ba97SEli Cohen return 0; 2784e126ba97SEli Cohen case IB_QP_DEST_QPN: 2785e126ba97SEli Cohen return 0; 2786e126ba97SEli Cohen } 2787e126ba97SEli Cohen return 0; 2788e126ba97SEli Cohen } 2789e126ba97SEli Cohen 2790e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2791e126ba97SEli Cohen { 2792e126ba97SEli Cohen int result = 0; 2793e126ba97SEli Cohen int i; 2794e126ba97SEli Cohen 2795e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2796e126ba97SEli Cohen if ((1 << i) & ib_mask) 2797e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2798e126ba97SEli Cohen } 2799e126ba97SEli Cohen 2800e126ba97SEli Cohen return result; 2801e126ba97SEli Cohen } 2802e126ba97SEli Cohen 280334d57585SYishai Hadas static int modify_raw_packet_qp_rq( 280434d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 280534d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2806ad5f8e96Smajd@mellanox.com { 2807ad5f8e96Smajd@mellanox.com void *in; 2808ad5f8e96Smajd@mellanox.com void *rqc; 2809ad5f8e96Smajd@mellanox.com int inlen; 2810ad5f8e96Smajd@mellanox.com int err; 2811ad5f8e96Smajd@mellanox.com 2812ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 28131b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2814ad5f8e96Smajd@mellanox.com if (!in) 2815ad5f8e96Smajd@mellanox.com return -ENOMEM; 2816ad5f8e96Smajd@mellanox.com 2817ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 281834d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 2819ad5f8e96Smajd@mellanox.com 2820ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2821ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2822ad5f8e96Smajd@mellanox.com 2823eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2824eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2825eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 282623a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2827eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2828eb49ab0cSAlex Vesker } else 2829eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2830eb49ab0cSAlex Vesker dev->ib_dev.name); 2831eb49ab0cSAlex Vesker } 2832eb49ab0cSAlex Vesker 2833eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2834ad5f8e96Smajd@mellanox.com if (err) 2835ad5f8e96Smajd@mellanox.com goto out; 2836ad5f8e96Smajd@mellanox.com 2837ad5f8e96Smajd@mellanox.com rq->state = new_state; 2838ad5f8e96Smajd@mellanox.com 2839ad5f8e96Smajd@mellanox.com out: 2840ad5f8e96Smajd@mellanox.com kvfree(in); 2841ad5f8e96Smajd@mellanox.com return err; 2842ad5f8e96Smajd@mellanox.com } 2843ad5f8e96Smajd@mellanox.com 2844c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 2845c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 2846c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2847ad5f8e96Smajd@mellanox.com { 28487d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 284961147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 285061147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 285161147f39SBodong Wang bool new_rate_added = false; 28527d29f349SBodong Wang u16 rl_index = 0; 2853ad5f8e96Smajd@mellanox.com void *in; 2854ad5f8e96Smajd@mellanox.com void *sqc; 2855ad5f8e96Smajd@mellanox.com int inlen; 2856ad5f8e96Smajd@mellanox.com int err; 2857ad5f8e96Smajd@mellanox.com 2858ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 28591b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2860ad5f8e96Smajd@mellanox.com if (!in) 2861ad5f8e96Smajd@mellanox.com return -ENOMEM; 2862ad5f8e96Smajd@mellanox.com 2863c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 2864ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2865ad5f8e96Smajd@mellanox.com 2866ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2867ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2868ad5f8e96Smajd@mellanox.com 28697d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 28707d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 28717d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 28727d29f349SBodong Wang __func__); 28737d29f349SBodong Wang else 287461147f39SBodong Wang new_rl = raw_qp_param->rl; 28757d29f349SBodong Wang } 2876ad5f8e96Smajd@mellanox.com 287761147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 287861147f39SBodong Wang if (new_rl.rate) { 287961147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 28807d29f349SBodong Wang if (err) { 288161147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 288261147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 288361147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 288461147f39SBodong Wang new_rl.typical_pkt_sz); 288561147f39SBodong Wang 28867d29f349SBodong Wang goto out; 28877d29f349SBodong Wang } 288861147f39SBodong Wang new_rate_added = true; 28897d29f349SBodong Wang } 28907d29f349SBodong Wang 28917d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 289261147f39SBodong Wang /* index 0 means no limit */ 28937d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 28947d29f349SBodong Wang } 28957d29f349SBodong Wang 28967d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 28977d29f349SBodong Wang if (err) { 28987d29f349SBodong Wang /* Remove new rate from table if failed */ 289961147f39SBodong Wang if (new_rate_added) 290061147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 29017d29f349SBodong Wang goto out; 29027d29f349SBodong Wang } 29037d29f349SBodong Wang 29047d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 290561147f39SBodong Wang if ((old_rl.rate && 290661147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 29077d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 290861147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 29097d29f349SBodong Wang 291061147f39SBodong Wang ibqp->rl = new_rl; 2911ad5f8e96Smajd@mellanox.com sq->state = new_state; 2912ad5f8e96Smajd@mellanox.com 2913ad5f8e96Smajd@mellanox.com out: 2914ad5f8e96Smajd@mellanox.com kvfree(in); 2915ad5f8e96Smajd@mellanox.com return err; 2916ad5f8e96Smajd@mellanox.com } 2917ad5f8e96Smajd@mellanox.com 2918ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 291913eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 292013eab21fSAviv Heller u8 tx_affinity) 2921ad5f8e96Smajd@mellanox.com { 2922ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2923ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2924ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 29257d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 29267d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2927ad5f8e96Smajd@mellanox.com int rq_state; 2928ad5f8e96Smajd@mellanox.com int sq_state; 2929ad5f8e96Smajd@mellanox.com int err; 2930ad5f8e96Smajd@mellanox.com 29310680efa2SAlex Vesker switch (raw_qp_param->operation) { 2932ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2933ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2934ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2935ad5f8e96Smajd@mellanox.com break; 2936ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2937ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2938ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2939ad5f8e96Smajd@mellanox.com break; 2940ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2941ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2942ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2943ad5f8e96Smajd@mellanox.com break; 2944ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2945ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 29467d29f349SBodong Wang if (raw_qp_param->set_mask == 29477d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 29487d29f349SBodong Wang modify_rq = 0; 29497d29f349SBodong Wang sq_state = sq->state; 29507d29f349SBodong Wang } else { 29517d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 29527d29f349SBodong Wang } 29537d29f349SBodong Wang break; 29547d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 29557d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2956eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2957eb49ab0cSAlex Vesker return -EINVAL; 2958eb49ab0cSAlex Vesker else 2959ad5f8e96Smajd@mellanox.com return 0; 2960ad5f8e96Smajd@mellanox.com default: 2961ad5f8e96Smajd@mellanox.com WARN_ON(1); 2962ad5f8e96Smajd@mellanox.com return -EINVAL; 2963ad5f8e96Smajd@mellanox.com } 2964ad5f8e96Smajd@mellanox.com 29657d29f349SBodong Wang if (modify_rq) { 296634d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 296734d57585SYishai Hadas qp->ibqp.pd); 2968ad5f8e96Smajd@mellanox.com if (err) 2969ad5f8e96Smajd@mellanox.com return err; 2970ad5f8e96Smajd@mellanox.com } 2971ad5f8e96Smajd@mellanox.com 29727d29f349SBodong Wang if (modify_sq) { 297313eab21fSAviv Heller if (tx_affinity) { 297413eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 29751cd6dbd3SYishai Hadas tx_affinity, 29761cd6dbd3SYishai Hadas qp->ibqp.pd); 297713eab21fSAviv Heller if (err) 297813eab21fSAviv Heller return err; 297913eab21fSAviv Heller } 298013eab21fSAviv Heller 2981c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 2982c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 298313eab21fSAviv Heller } 2984ad5f8e96Smajd@mellanox.com 2985ad5f8e96Smajd@mellanox.com return 0; 2986ad5f8e96Smajd@mellanox.com } 2987ad5f8e96Smajd@mellanox.com 2988c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 2989c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 2990c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 2991c6a21c38SMajd Dibbiny u8 port_num) 2992c6a21c38SMajd Dibbiny { 2993c6a21c38SMajd Dibbiny struct mlx5_ib_ucontext *ucontext = NULL; 2994c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 2995c6a21c38SMajd Dibbiny 2996c6a21c38SMajd Dibbiny if (pd && pd->ibpd.uobject && pd->ibpd.uobject->context) 2997c6a21c38SMajd Dibbiny ucontext = to_mucontext(pd->ibpd.uobject->context); 2998c6a21c38SMajd Dibbiny 2999c6a21c38SMajd Dibbiny if (ucontext) { 3000c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3001c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3002c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3003c6a21c38SMajd Dibbiny 1; 3004c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3005c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3006c6a21c38SMajd Dibbiny } else { 3007c6a21c38SMajd Dibbiny tx_port_affinity = 3008c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 3009c6a21c38SMajd Dibbiny 1, &dev->roce[port_num].tx_port_affinity) % 3010c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3011c6a21c38SMajd Dibbiny 1; 3012c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3013c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3014c6a21c38SMajd Dibbiny } 3015c6a21c38SMajd Dibbiny 3016c6a21c38SMajd Dibbiny return tx_port_affinity; 3017c6a21c38SMajd Dibbiny } 3018c6a21c38SMajd Dibbiny 3019e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3020e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 302161147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 302261147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 3023e126ba97SEli Cohen { 3024427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3025427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3026427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3027427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3028427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3029427c1e7bSmajd@mellanox.com }, 3030427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3031427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3032427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3033427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3034427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3035427c1e7bSmajd@mellanox.com }, 3036427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3037427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3038427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3039427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3040427c1e7bSmajd@mellanox.com }, 3041427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3042427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3043427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3044427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3045427c1e7bSmajd@mellanox.com }, 3046427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3047427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3048427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3049427c1e7bSmajd@mellanox.com }, 3050427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3051427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3052427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3053427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3054427c1e7bSmajd@mellanox.com }, 3055427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3056427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3057427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3058427c1e7bSmajd@mellanox.com } 3059427c1e7bSmajd@mellanox.com }; 3060427c1e7bSmajd@mellanox.com 3061e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3062e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 306319098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3064e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3065e126ba97SEli Cohen struct mlx5_qp_context *context; 3066e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3067eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3068e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3069e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3070e126ba97SEli Cohen int mlx5_st; 3071e126ba97SEli Cohen int err; 3072427c1e7bSmajd@mellanox.com u16 op; 307313eab21fSAviv Heller u8 tx_affinity = 0; 3074e126ba97SEli Cohen 307555de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 307655de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 307755de9a77SLeon Romanovsky if (mlx5_st < 0) 307855de9a77SLeon Romanovsky return -EINVAL; 307955de9a77SLeon Romanovsky 30801a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 30811a412fb1SSaeed Mahameed if (!context) 3082e126ba97SEli Cohen return -ENOMEM; 3083e126ba97SEli Cohen 3084c6a21c38SMajd Dibbiny pd = get_pd(qp); 308555de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3086e126ba97SEli Cohen 3087e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3088e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3089e126ba97SEli Cohen } else { 3090e126ba97SEli Cohen switch (attr->path_mig_state) { 3091e126ba97SEli Cohen case IB_MIG_MIGRATED: 3092e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3093e126ba97SEli Cohen break; 3094e126ba97SEli Cohen case IB_MIG_REARM: 3095e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3096e126ba97SEli Cohen break; 3097e126ba97SEli Cohen case IB_MIG_ARMED: 3098e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3099e126ba97SEli Cohen break; 3100e126ba97SEli Cohen } 3101e126ba97SEli Cohen } 3102e126ba97SEli Cohen 310313eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 310413eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 310513eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 310613eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 310713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 310813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 310913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 311013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 311113eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 31127fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 3113c6a21c38SMajd Dibbiny tx_affinity = get_tx_affinity(dev, pd, base, p); 311413eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 311513eab21fSAviv Heller } 311613eab21fSAviv Heller } 311713eab21fSAviv Heller } 311813eab21fSAviv Heller 3119d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3120e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3121c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3122c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3123e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3124e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3125e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3126e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3127e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3128e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3129e126ba97SEli Cohen err = -EINVAL; 3130e126ba97SEli Cohen goto out; 3131e126ba97SEli Cohen } 3132938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3133938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3134e126ba97SEli Cohen } 3135e126ba97SEli Cohen 3136e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3137e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3138e126ba97SEli Cohen 3139e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3140d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3141e126ba97SEli Cohen 3142e126ba97SEli Cohen /* todo implement counter_index functionality */ 3143e126ba97SEli Cohen 3144e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3145e126ba97SEli Cohen context->pri_path.port = qp->port; 3146e126ba97SEli Cohen 3147e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3148e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3149e126ba97SEli Cohen 3150e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 315175850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3152e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3153f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3154e126ba97SEli Cohen if (err) 3155e126ba97SEli Cohen goto out; 3156e126ba97SEli Cohen } 3157e126ba97SEli Cohen 3158e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3159e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3160e126ba97SEli Cohen 3161e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 316275850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 316375850d0bSmajd@mellanox.com &context->alt_path, 3164f879ee8dSAchiad Shochat attr->alt_port_num, 3165f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3166f879ee8dSAchiad Shochat 0, attr, true); 3167e126ba97SEli Cohen if (err) 3168e126ba97SEli Cohen goto out; 3169e126ba97SEli Cohen } 3170e126ba97SEli Cohen 317189ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 317289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3173e126ba97SEli Cohen 3174e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3175e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3176e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3177e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3178e126ba97SEli Cohen 3179e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3180e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3181e126ba97SEli Cohen 3182e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3183e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3184e126ba97SEli Cohen 3185e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3186e126ba97SEli Cohen if (attr->max_rd_atomic) 3187e126ba97SEli Cohen context->params1 |= 3188e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3189e126ba97SEli Cohen } 3190e126ba97SEli Cohen 3191e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3192e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3193e126ba97SEli Cohen 3194e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3195e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3196e126ba97SEli Cohen context->params2 |= 3197e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3198e126ba97SEli Cohen } 3199e126ba97SEli Cohen 3200e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3201e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3202e126ba97SEli Cohen 3203e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3204e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3205e126ba97SEli Cohen 3206e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3207e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3208e126ba97SEli Cohen 3209e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3210e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3211e126ba97SEli Cohen 3212e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3213e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3214e126ba97SEli Cohen 32150837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 32160837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 32170837e86aSMark Bloch qp->port) - 1; 3218c2e53b2cSYishai Hadas 3219c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3220c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3221c2e53b2cSYishai Hadas port_num = 0; 3222c2e53b2cSYishai Hadas 3223eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 32240837e86aSMark Bloch context->qp_counter_set_usr_page |= 3225e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 32260837e86aSMark Bloch } 32270837e86aSMark Bloch 3228e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3229e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3230e126ba97SEli Cohen 3231b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3232b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3233e126ba97SEli Cohen 3234e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3235e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3236e126ba97SEli Cohen 3237427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 32385d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 32395d414b17SDan Carpenter err = -EINVAL; 3240427c1e7bSmajd@mellanox.com goto out; 32415d414b17SDan Carpenter } 3242427c1e7bSmajd@mellanox.com 3243427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3244e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3245e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3246ad5f8e96Smajd@mellanox.com 3247c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3248c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 32490680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 32500680efa2SAlex Vesker 32510680efa2SAlex Vesker raw_qp_param.operation = op; 3252eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3253e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3254eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3255eb49ab0cSAlex Vesker } 32567d29f349SBodong Wang 32577d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 325861147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 325961147f39SBodong Wang 326061147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 326161147f39SBodong Wang if (attr->rate_limit && 326261147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 326361147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 326461147f39SBodong Wang ucmd->burst_info.max_burst_sz; 326561147f39SBodong Wang } else { 326661147f39SBodong Wang err = -EINVAL; 326761147f39SBodong Wang goto out; 326861147f39SBodong Wang } 326961147f39SBodong Wang } 327061147f39SBodong Wang 327161147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 327261147f39SBodong Wang if (attr->rate_limit && 327361147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 327461147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 327561147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 327661147f39SBodong Wang } else { 327761147f39SBodong Wang err = -EINVAL; 327861147f39SBodong Wang goto out; 327961147f39SBodong Wang } 328061147f39SBodong Wang } 328161147f39SBodong Wang 32827d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 32837d29f349SBodong Wang } 32847d29f349SBodong Wang 328513eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 32860680efa2SAlex Vesker } else { 32871a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 328819098df2Smajd@mellanox.com &base->mqp); 32890680efa2SAlex Vesker } 32900680efa2SAlex Vesker 3291e126ba97SEli Cohen if (err) 3292e126ba97SEli Cohen goto out; 3293e126ba97SEli Cohen 3294e126ba97SEli Cohen qp->state = new_state; 3295e126ba97SEli Cohen 3296e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 329719098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3298e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 329919098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3300e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3301e126ba97SEli Cohen qp->port = attr->port_num; 3302e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 330319098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3304e126ba97SEli Cohen 3305e126ba97SEli Cohen /* 3306e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3307e126ba97SEli Cohen * entries and reinitialize the QP. 3308e126ba97SEli Cohen */ 330975a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 331075a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 331119098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3312e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3313e126ba97SEli Cohen if (send_cq != recv_cq) 331419098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3315e126ba97SEli Cohen 3316e126ba97SEli Cohen qp->rq.head = 0; 3317e126ba97SEli Cohen qp->rq.tail = 0; 3318e126ba97SEli Cohen qp->sq.head = 0; 3319e126ba97SEli Cohen qp->sq.tail = 0; 3320e126ba97SEli Cohen qp->sq.cur_post = 0; 3321e126ba97SEli Cohen qp->sq.last_poll = 0; 3322e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3323e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3324e126ba97SEli Cohen } 3325e126ba97SEli Cohen 3326e126ba97SEli Cohen out: 33271a412fb1SSaeed Mahameed kfree(context); 3328e126ba97SEli Cohen return err; 3329e126ba97SEli Cohen } 3330e126ba97SEli Cohen 3331c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3332c32a4f29SMoni Shoua { 3333c32a4f29SMoni Shoua if ((mask & req) != req) 3334c32a4f29SMoni Shoua return false; 3335c32a4f29SMoni Shoua 3336c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3337c32a4f29SMoni Shoua return false; 3338c32a4f29SMoni Shoua 3339c32a4f29SMoni Shoua return true; 3340c32a4f29SMoni Shoua } 3341c32a4f29SMoni Shoua 3342c32a4f29SMoni Shoua /* check valid transition for driver QP types 3343c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3344c32a4f29SMoni Shoua */ 3345c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3346c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3347c32a4f29SMoni Shoua { 3348c32a4f29SMoni Shoua int req = IB_QP_STATE; 3349c32a4f29SMoni Shoua int opt = 0; 3350c32a4f29SMoni Shoua 335199ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 335299ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 335399ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3354c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3355c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3356c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3357c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3358c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3359c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3360c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3361c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3362c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3363c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3364c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3365c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3366c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3367c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3368c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3369c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3370c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3371c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3372c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3373c32a4f29SMoni Shoua } 3374c32a4f29SMoni Shoua return false; 3375c32a4f29SMoni Shoua } 3376c32a4f29SMoni Shoua 3377776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3378776a3906SMoni Shoua * valid transitions are: 3379776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3380776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3381776a3906SMoni Shoua * mtu, gid_index and hop_limit 3382776a3906SMoni Shoua * Other transitions and attributes are illegal 3383776a3906SMoni Shoua */ 3384776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3385776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3386776a3906SMoni Shoua { 3387776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3388776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3389776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3390776a3906SMoni Shoua int err = 0; 3391776a3906SMoni Shoua int required = IB_QP_STATE; 3392776a3906SMoni Shoua void *dctc; 3393776a3906SMoni Shoua 3394776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3395776a3906SMoni Shoua return -EINVAL; 3396776a3906SMoni Shoua 3397776a3906SMoni Shoua cur_state = qp->state; 3398776a3906SMoni Shoua new_state = attr->qp_state; 3399776a3906SMoni Shoua 3400776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3401776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3402776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3403776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3404776a3906SMoni Shoua return -EINVAL; 3405776a3906SMoni Shoua 3406776a3906SMoni Shoua if (attr->port_num == 0 || 3407776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3408776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3409776a3906SMoni Shoua attr->port_num, dev->num_ports); 3410776a3906SMoni Shoua return -EINVAL; 3411776a3906SMoni Shoua } 3412776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3413776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3414776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3415776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3416776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3417776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3418776a3906SMoni Shoua return -EOPNOTSUPP; 3419776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3420776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3421776a3906SMoni Shoua } 3422776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3423776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3424776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3425776a3906SMoni Shoua 3426776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3427776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3428776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3429776a3906SMoni Shoua sizeof(resp.dctn); 3430776a3906SMoni Shoua 3431776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3432776a3906SMoni Shoua return -EINVAL; 3433776a3906SMoni Shoua resp.response_length = min_resp_len; 3434776a3906SMoni Shoua 3435776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3436776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3437776a3906SMoni Shoua return -EINVAL; 3438776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3439776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3440776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3441776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3442776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3443776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3444776a3906SMoni Shoua 3445776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3446776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3447776a3906SMoni Shoua if (err) 3448776a3906SMoni Shoua return err; 3449776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3450776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3451776a3906SMoni Shoua if (err) { 3452776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3453776a3906SMoni Shoua return err; 3454776a3906SMoni Shoua } 3455776a3906SMoni Shoua } else { 3456776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3457776a3906SMoni Shoua return -EINVAL; 3458776a3906SMoni Shoua } 3459776a3906SMoni Shoua if (err) 3460776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3461776a3906SMoni Shoua else 3462776a3906SMoni Shoua qp->state = new_state; 3463776a3906SMoni Shoua return err; 3464776a3906SMoni Shoua } 3465776a3906SMoni Shoua 3466e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3467e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3468e126ba97SEli Cohen { 3469e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3470e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 347161147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3472d16e91daSHaggai Eran enum ib_qp_type qp_type; 3473e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 347461147f39SBodong Wang size_t required_cmd_sz; 3475e126ba97SEli Cohen int err = -EINVAL; 3476e126ba97SEli Cohen int port; 34772811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 3478e126ba97SEli Cohen 347928d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 348028d61370SYishai Hadas return -ENOSYS; 348128d61370SYishai Hadas 348261147f39SBodong Wang if (udata && udata->inlen) { 348361147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 348461147f39SBodong Wang sizeof(ucmd.reserved); 348561147f39SBodong Wang if (udata->inlen < required_cmd_sz) 348661147f39SBodong Wang return -EINVAL; 348761147f39SBodong Wang 348861147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 348961147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 349061147f39SBodong Wang udata->inlen - sizeof(ucmd))) 349161147f39SBodong Wang return -EOPNOTSUPP; 349261147f39SBodong Wang 349361147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 349461147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 349561147f39SBodong Wang return -EFAULT; 349661147f39SBodong Wang 349761147f39SBodong Wang if (ucmd.comp_mask || 349861147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 349961147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 350061147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 350161147f39SBodong Wang return -EOPNOTSUPP; 350261147f39SBodong Wang } 350361147f39SBodong Wang 3504d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3505d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3506d16e91daSHaggai Eran 3507c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3508c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3509c32a4f29SMoni Shoua else 3510d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3511d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3512d16e91daSHaggai Eran 3513776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3514776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3515c32a4f29SMoni Shoua 3516e126ba97SEli Cohen mutex_lock(&qp->mutex); 3517e126ba97SEli Cohen 3518e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3519e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3520e126ba97SEli Cohen 35212811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 35222811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 35232811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 35242811ba51SAchiad Shochat } 35252811ba51SAchiad Shochat 3526c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3527c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3528c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3529c2e53b2cSYishai Hadas attr_mask); 3530c2e53b2cSYishai Hadas goto out; 3531c2e53b2cSYishai Hadas } 3532c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3533c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3534d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 3535158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3536158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3537e126ba97SEli Cohen goto out; 3538c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3539c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3540c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3541c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3542c32a4f29SMoni Shoua goto out; 3543158abf86SHaggai Eran } 3544e126ba97SEli Cohen 3545e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3546938fe83cSSaeed Mahameed (attr->port_num == 0 || 3547508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3548158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3549158abf86SHaggai Eran attr->port_num, dev->num_ports); 3550e126ba97SEli Cohen goto out; 3551158abf86SHaggai Eran } 3552e126ba97SEli Cohen 3553e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3554e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3555938fe83cSSaeed Mahameed if (attr->pkey_index >= 3556158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3557158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3558158abf86SHaggai Eran attr->pkey_index); 3559e126ba97SEli Cohen goto out; 3560e126ba97SEli Cohen } 3561158abf86SHaggai Eran } 3562e126ba97SEli Cohen 3563e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3564938fe83cSSaeed Mahameed attr->max_rd_atomic > 3565158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3566158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3567158abf86SHaggai Eran attr->max_rd_atomic); 3568e126ba97SEli Cohen goto out; 3569158abf86SHaggai Eran } 3570e126ba97SEli Cohen 3571e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3572938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3573158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3574158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3575158abf86SHaggai Eran attr->max_dest_rd_atomic); 3576e126ba97SEli Cohen goto out; 3577158abf86SHaggai Eran } 3578e126ba97SEli Cohen 3579e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3580e126ba97SEli Cohen err = 0; 3581e126ba97SEli Cohen goto out; 3582e126ba97SEli Cohen } 3583e126ba97SEli Cohen 358461147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 358561147f39SBodong Wang new_state, &ucmd); 3586e126ba97SEli Cohen 3587e126ba97SEli Cohen out: 3588e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3589e126ba97SEli Cohen return err; 3590e126ba97SEli Cohen } 3591e126ba97SEli Cohen 3592e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3593e126ba97SEli Cohen { 3594e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3595e126ba97SEli Cohen unsigned cur; 3596e126ba97SEli Cohen 3597e126ba97SEli Cohen cur = wq->head - wq->tail; 3598e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3599e126ba97SEli Cohen return 0; 3600e126ba97SEli Cohen 3601e126ba97SEli Cohen cq = to_mcq(ib_cq); 3602e126ba97SEli Cohen spin_lock(&cq->lock); 3603e126ba97SEli Cohen cur = wq->head - wq->tail; 3604e126ba97SEli Cohen spin_unlock(&cq->lock); 3605e126ba97SEli Cohen 3606e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3607e126ba97SEli Cohen } 3608e126ba97SEli Cohen 3609e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3610e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3611e126ba97SEli Cohen { 3612e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3613e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3614e126ba97SEli Cohen rseg->reserved = 0; 3615e126ba97SEli Cohen } 3616e126ba97SEli Cohen 3617f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3618f696bf6dSBart Van Assche const struct ib_send_wr *wr, void *qend, 3619f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3620f0313965SErez Shitrit { 3621f0313965SErez Shitrit void *seg = eseg; 3622f0313965SErez Shitrit 3623f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3624f0313965SErez Shitrit 3625f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3626f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3627f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3628f0313965SErez Shitrit 3629f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3630f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3631f0313965SErez Shitrit 3632f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3633f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 36342b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3635f0313965SErez Shitrit u64 left, leftlen, copysz; 3636f0313965SErez Shitrit void *pdata = ud_wr->header; 3637f0313965SErez Shitrit 3638f0313965SErez Shitrit left = ud_wr->hlen; 3639f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 36402b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3641f0313965SErez Shitrit 3642f0313965SErez Shitrit /* 3643f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3644f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3645f0313965SErez Shitrit * rollback and than the copy the left 3646f0313965SErez Shitrit */ 36472b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3648f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3649f0313965SErez Shitrit 3650f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3651f0313965SErez Shitrit 3652f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3653f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3654f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3655f0313965SErez Shitrit } 3656f0313965SErez Shitrit 3657f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3658f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3659f0313965SErez Shitrit left -= copysz; 3660f0313965SErez Shitrit pdata += copysz; 3661f0313965SErez Shitrit memcpy(seg, pdata, left); 3662f0313965SErez Shitrit seg += ALIGN(left, 16); 3663f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3664f0313965SErez Shitrit } 3665f0313965SErez Shitrit } 3666f0313965SErez Shitrit 3667f0313965SErez Shitrit return seg; 3668f0313965SErez Shitrit } 3669f0313965SErez Shitrit 3670e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3671f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3672e126ba97SEli Cohen { 3673e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3674e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3675e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3676e126ba97SEli Cohen } 3677e126ba97SEli Cohen 3678e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3679e126ba97SEli Cohen { 3680e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3681e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3682e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3683e126ba97SEli Cohen } 3684e126ba97SEli Cohen 368531616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3686e126ba97SEli Cohen { 368731616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 368831616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3689e126ba97SEli Cohen } 3690e126ba97SEli Cohen 3691e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3692e126ba97SEli Cohen { 3693e126ba97SEli Cohen u64 result; 3694e126ba97SEli Cohen 3695e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3696e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3697e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3698e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3699e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3700e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3701e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3702e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3703e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3704e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3705e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3706e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3707e126ba97SEli Cohen 3708e126ba97SEli Cohen return cpu_to_be64(result); 3709e126ba97SEli Cohen } 3710e126ba97SEli Cohen 3711e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3712e6631814SSagi Grimberg { 3713e6631814SSagi Grimberg u64 result; 3714e6631814SSagi Grimberg 3715e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3716e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3717e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3718d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3719e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3720e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3721e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3722e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3723e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3724e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3725e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3726e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3727e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3728e6631814SSagi Grimberg 3729e6631814SSagi Grimberg return cpu_to_be64(result); 3730e6631814SSagi Grimberg } 3731e6631814SSagi Grimberg 37328a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 3733064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 37348a187ee5SSagi Grimberg { 373531616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 37368a187ee5SSagi Grimberg 37378a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3738b005d316SSagi Grimberg 37398a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 3740064e5262SIdan Burstein if (umr_inline) 3741064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 374231616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 37438a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 37448a187ee5SSagi Grimberg } 37458a187ee5SSagi Grimberg 3746dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3747e126ba97SEli Cohen { 3748e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3749e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 37502d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3751e126ba97SEli Cohen } 3752e126ba97SEli Cohen 375331616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3754e126ba97SEli Cohen { 3755968e78ddSHaggai Eran u64 result; 3756e126ba97SEli Cohen 375731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3758e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3759968e78ddSHaggai Eran 3760968e78ddSHaggai Eran return cpu_to_be64(result); 3761968e78ddSHaggai Eran } 3762968e78ddSHaggai Eran 376331616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3764968e78ddSHaggai Eran { 3765968e78ddSHaggai Eran u64 result; 3766968e78ddSHaggai Eran 3767968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3768968e78ddSHaggai Eran 3769968e78ddSHaggai Eran return cpu_to_be64(result); 3770968e78ddSHaggai Eran } 3771968e78ddSHaggai Eran 377256e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 377356e11d62SNoa Osherovich { 377456e11d62SNoa Osherovich u64 result; 377556e11d62SNoa Osherovich 377656e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 377756e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 377831616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 377956e11d62SNoa Osherovich 378056e11d62SNoa Osherovich return cpu_to_be64(result); 378156e11d62SNoa Osherovich } 378256e11d62SNoa Osherovich 378331616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 378456e11d62SNoa Osherovich { 378556e11d62SNoa Osherovich u64 result; 378656e11d62SNoa Osherovich 378731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 378831616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 378956e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 379031616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 379131616255SArtemy Kovalyov 379231616255SArtemy Kovalyov if (atomic) 379331616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 379456e11d62SNoa Osherovich 379556e11d62SNoa Osherovich return cpu_to_be64(result); 379656e11d62SNoa Osherovich } 379756e11d62SNoa Osherovich 379856e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 379956e11d62SNoa Osherovich { 380056e11d62SNoa Osherovich u64 result; 380156e11d62SNoa Osherovich 380231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 380356e11d62SNoa Osherovich 380456e11d62SNoa Osherovich return cpu_to_be64(result); 380556e11d62SNoa Osherovich } 380656e11d62SNoa Osherovich 3807c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3808c8d75a98SMajd Dibbiny { 3809c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3810c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3811c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3812c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3813c8d75a98SMajd Dibbiny return -EPERM; 3814c8d75a98SMajd Dibbiny return 0; 3815c8d75a98SMajd Dibbiny } 3816c8d75a98SMajd Dibbiny 3817c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3818c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3819f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 3820968e78ddSHaggai Eran { 3821f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3822968e78ddSHaggai Eran 3823968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3824968e78ddSHaggai Eran 3825968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3826968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3827968e78ddSHaggai Eran else 3828968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3829968e78ddSHaggai Eran 383031616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 383131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 383231616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 383331616255SArtemy Kovalyov 383431616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 383531616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3836968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3837968e78ddSHaggai Eran } 383856e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 383956e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 384031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 384131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 384256e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3843e126ba97SEli Cohen } 384431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 384531616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 384631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 384731616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3848e126ba97SEli Cohen 3849e126ba97SEli Cohen if (!wr->num_sge) 3850968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3851c8d75a98SMajd Dibbiny 3852c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 3853e126ba97SEli Cohen } 3854e126ba97SEli Cohen 3855e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3856e126ba97SEli Cohen { 3857e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3858e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3859e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3860e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 38612ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3862e126ba97SEli Cohen } 3863e126ba97SEli Cohen 38648a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 38658a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 38668a187ee5SSagi Grimberg u32 key, int access) 38678a187ee5SSagi Grimberg { 38688a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 38698a187ee5SSagi Grimberg 38708a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3871b005d316SSagi Grimberg 3872ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3873b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3874ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3875b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3876b005d316SSagi Grimberg ndescs *= 2; 3877b005d316SSagi Grimberg 3878b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 38798a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 38808a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 38818a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 38828a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 38838a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 38848a187ee5SSagi Grimberg } 38858a187ee5SSagi Grimberg 3886dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3887e126ba97SEli Cohen { 3888e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3889968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3890e126ba97SEli Cohen } 3891e126ba97SEli Cohen 3892f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 3893f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3894e126ba97SEli Cohen { 3895f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3896968e78ddSHaggai Eran 3897e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 389831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3899968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3900e126ba97SEli Cohen 3901968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 390256e11d62SNoa Osherovich if (umrwr->pd) 3903968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 390431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 390531616255SArtemy Kovalyov !umrwr->length) 390631616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 390731616255SArtemy Kovalyov 390831616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3909968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3910968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3911746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3912968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3913e126ba97SEli Cohen } 3914e126ba97SEli Cohen 39158a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 39168a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 39178a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 39188a187ee5SSagi Grimberg { 39198a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 39208a187ee5SSagi Grimberg 39218a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 39228a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 39238a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 39248a187ee5SSagi Grimberg } 39258a187ee5SSagi Grimberg 3926064e5262SIdan Burstein static void set_reg_umr_inline_seg(void *seg, struct mlx5_ib_qp *qp, 3927064e5262SIdan Burstein struct mlx5_ib_mr *mr, int mr_list_size) 3928064e5262SIdan Burstein { 3929064e5262SIdan Burstein void *qend = qp->sq.qend; 3930064e5262SIdan Burstein void *addr = mr->descs; 3931064e5262SIdan Burstein int copy; 3932064e5262SIdan Burstein 3933064e5262SIdan Burstein if (unlikely(seg + mr_list_size > qend)) { 3934064e5262SIdan Burstein copy = qend - seg; 3935064e5262SIdan Burstein memcpy(seg, addr, copy); 3936064e5262SIdan Burstein addr += copy; 3937064e5262SIdan Burstein mr_list_size -= copy; 3938064e5262SIdan Burstein seg = mlx5_get_send_wqe(qp, 0); 3939064e5262SIdan Burstein } 3940064e5262SIdan Burstein memcpy(seg, addr, mr_list_size); 3941064e5262SIdan Burstein seg += mr_list_size; 3942064e5262SIdan Burstein } 3943064e5262SIdan Burstein 3944f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 3945e126ba97SEli Cohen { 3946e126ba97SEli Cohen switch (wr->opcode) { 3947e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3948e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3949e126ba97SEli Cohen return wr->ex.imm_data; 3950e126ba97SEli Cohen 3951e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3952e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3953e126ba97SEli Cohen 3954e126ba97SEli Cohen default: 3955e126ba97SEli Cohen return 0; 3956e126ba97SEli Cohen } 3957e126ba97SEli Cohen } 3958e126ba97SEli Cohen 3959e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3960e126ba97SEli Cohen { 3961e126ba97SEli Cohen u8 *p = wqe; 3962e126ba97SEli Cohen u8 res = 0; 3963e126ba97SEli Cohen int i; 3964e126ba97SEli Cohen 3965e126ba97SEli Cohen for (i = 0; i < size; i++) 3966e126ba97SEli Cohen res ^= p[i]; 3967e126ba97SEli Cohen 3968e126ba97SEli Cohen return ~res; 3969e126ba97SEli Cohen } 3970e126ba97SEli Cohen 3971e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3972e126ba97SEli Cohen { 3973e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3974e126ba97SEli Cohen } 3975e126ba97SEli Cohen 3976f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 3977e126ba97SEli Cohen void *wqe, int *sz) 3978e126ba97SEli Cohen { 3979e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3980e126ba97SEli Cohen void *qend = qp->sq.qend; 3981e126ba97SEli Cohen void *addr; 3982e126ba97SEli Cohen int inl = 0; 3983e126ba97SEli Cohen int copy; 3984e126ba97SEli Cohen int len; 3985e126ba97SEli Cohen int i; 3986e126ba97SEli Cohen 3987e126ba97SEli Cohen seg = wqe; 3988e126ba97SEli Cohen wqe += sizeof(*seg); 3989e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3990e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3991e126ba97SEli Cohen len = wr->sg_list[i].length; 3992e126ba97SEli Cohen inl += len; 3993e126ba97SEli Cohen 3994e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3995e126ba97SEli Cohen return -ENOMEM; 3996e126ba97SEli Cohen 3997e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3998e126ba97SEli Cohen copy = qend - wqe; 3999e126ba97SEli Cohen memcpy(wqe, addr, copy); 4000e126ba97SEli Cohen addr += copy; 4001e126ba97SEli Cohen len -= copy; 4002e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 4003e126ba97SEli Cohen } 4004e126ba97SEli Cohen memcpy(wqe, addr, len); 4005e126ba97SEli Cohen wqe += len; 4006e126ba97SEli Cohen } 4007e126ba97SEli Cohen 4008e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4009e126ba97SEli Cohen 4010e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4011e126ba97SEli Cohen 4012e126ba97SEli Cohen return 0; 4013e126ba97SEli Cohen } 4014e126ba97SEli Cohen 4015e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4016e6631814SSagi Grimberg { 4017e6631814SSagi Grimberg switch (type) { 4018e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4019e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4020e6631814SSagi Grimberg default: 4021e6631814SSagi Grimberg return 0; 4022e6631814SSagi Grimberg } 4023e6631814SSagi Grimberg } 4024e6631814SSagi Grimberg 4025e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4026e6631814SSagi Grimberg { 4027e6631814SSagi Grimberg switch (block_size) { 4028e6631814SSagi Grimberg case 512: return 0x1; 4029e6631814SSagi Grimberg case 520: return 0x2; 4030e6631814SSagi Grimberg case 4096: return 0x3; 4031e6631814SSagi Grimberg case 4160: return 0x4; 4032e6631814SSagi Grimberg case 1073741824: return 0x5; 4033e6631814SSagi Grimberg default: return 0; 4034e6631814SSagi Grimberg } 4035e6631814SSagi Grimberg } 4036e6631814SSagi Grimberg 403778eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4038142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4039e6631814SSagi Grimberg { 4040142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4041142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4042142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4043142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4044142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4045142537f4SSagi Grimberg /* repeating block */ 4046142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4047142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4048142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4049e6631814SSagi Grimberg 405078eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 405178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4052e6631814SSagi Grimberg 405378eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 405478eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 405578eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 405678eda2bbSSagi Grimberg else 405778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4058e6631814SSagi Grimberg } 4059e6631814SSagi Grimberg 406078eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 406178eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4062e6631814SSagi Grimberg } 4063e6631814SSagi Grimberg 4064e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4065e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4066e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4067e6631814SSagi Grimberg { 4068e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4069e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4070e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4071e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4072e6631814SSagi Grimberg 4073c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4074e6631814SSagi Grimberg 4075142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4076142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4077e6631814SSagi Grimberg /* Input domain check byte mask */ 4078e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 407978eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 408078eda2bbSSagi Grimberg 408178eda2bbSSagi Grimberg /* Memory domain */ 408278eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 408378eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 408478eda2bbSSagi Grimberg break; 408578eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 408678eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 408778eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 408878eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 408978eda2bbSSagi Grimberg break; 409078eda2bbSSagi Grimberg default: 409178eda2bbSSagi Grimberg return -EINVAL; 409278eda2bbSSagi Grimberg } 409378eda2bbSSagi Grimberg 409478eda2bbSSagi Grimberg /* Wire domain */ 409578eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 409678eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 409778eda2bbSSagi Grimberg break; 409878eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4099e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 410078eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4101e6631814SSagi Grimberg /* Same block structure */ 4102142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4103e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4104fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4105c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4106fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4107c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4108fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4109e6631814SSagi Grimberg } else 4110e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4111e6631814SSagi Grimberg 4112142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 411378eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4114e6631814SSagi Grimberg break; 4115e6631814SSagi Grimberg default: 4116e6631814SSagi Grimberg return -EINVAL; 4117e6631814SSagi Grimberg } 4118e6631814SSagi Grimberg 4119e6631814SSagi Grimberg return 0; 4120e6631814SSagi Grimberg } 4121e6631814SSagi Grimberg 4122f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 4123e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4124e6631814SSagi Grimberg { 4125e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4126e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4127e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4128e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4129e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4130e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4131e6631814SSagi Grimberg int ret; 4132e6631814SSagi Grimberg int wqe_size; 4133e6631814SSagi Grimberg 4134e622f2f4SChristoph Hellwig if (!wr->prot || 4135e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4136e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4137e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4138e6631814SSagi Grimberg /** 4139e6631814SSagi Grimberg * Source domain doesn't contain signature information 41405c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4141e6631814SSagi Grimberg * So need construct: 4142e6631814SSagi Grimberg * ------------------ 4143e6631814SSagi Grimberg * | data_klm | 4144e6631814SSagi Grimberg * ------------------ 4145e6631814SSagi Grimberg * | BSF | 4146e6631814SSagi Grimberg * ------------------ 4147e6631814SSagi Grimberg **/ 4148e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4149e6631814SSagi Grimberg 4150e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4151e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4152e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4153e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4154e6631814SSagi Grimberg } else { 4155e6631814SSagi Grimberg /** 4156e6631814SSagi Grimberg * Source domain contains signature information 4157e6631814SSagi Grimberg * So need construct a strided block format: 4158e6631814SSagi Grimberg * --------------------------- 4159e6631814SSagi Grimberg * | stride_block_ctrl | 4160e6631814SSagi Grimberg * --------------------------- 4161e6631814SSagi Grimberg * | data_klm | 4162e6631814SSagi Grimberg * --------------------------- 4163e6631814SSagi Grimberg * | prot_klm | 4164e6631814SSagi Grimberg * --------------------------- 4165e6631814SSagi Grimberg * | BSF | 4166e6631814SSagi Grimberg * --------------------------- 4167e6631814SSagi Grimberg **/ 4168e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4169e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4170e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4171e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4172e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4173e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4174e6631814SSagi Grimberg int prot_size; 4175e6631814SSagi Grimberg 4176e6631814SSagi Grimberg sblock_ctrl = *seg; 4177e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4178e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4179e6631814SSagi Grimberg 4180e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4181e6631814SSagi Grimberg if (!prot_size) { 4182e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4183e6631814SSagi Grimberg return -EINVAL; 4184e6631814SSagi Grimberg } 4185e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4186e6631814SSagi Grimberg prot_size); 4187e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4188e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4189e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4190e6631814SSagi Grimberg 4191e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4192e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4193e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 41945c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 41955c273b16SSagi Grimberg 4196e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4197e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4198e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4199e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 42005c273b16SSagi Grimberg 4201e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4202e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4203e6631814SSagi Grimberg } 4204e6631814SSagi Grimberg 4205e6631814SSagi Grimberg *seg += wqe_size; 4206e6631814SSagi Grimberg *size += wqe_size / 16; 4207e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4208e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4209e6631814SSagi Grimberg 4210e6631814SSagi Grimberg bsf = *seg; 4211e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4212e6631814SSagi Grimberg if (ret) 4213e6631814SSagi Grimberg return -EINVAL; 4214e6631814SSagi Grimberg 4215e6631814SSagi Grimberg *seg += sizeof(*bsf); 4216e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4217e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4218e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4219e6631814SSagi Grimberg 4220e6631814SSagi Grimberg return 0; 4221e6631814SSagi Grimberg } 4222e6631814SSagi Grimberg 4223e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4224f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4225e6631814SSagi Grimberg u32 length, u32 pdn) 4226e6631814SSagi Grimberg { 4227e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4228e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4229d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4230e6631814SSagi Grimberg 4231e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4232e6631814SSagi Grimberg 4233e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4234ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4235e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4236d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4237e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4238e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 423931616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4240e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4241e6631814SSagi Grimberg } 4242e6631814SSagi Grimberg 4243e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 424431616255SArtemy Kovalyov u32 size) 4245e6631814SSagi Grimberg { 4246e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4247e6631814SSagi Grimberg 4248e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 424931616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4250e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4251e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4252e6631814SSagi Grimberg } 4253e6631814SSagi Grimberg 4254e6631814SSagi Grimberg 4255f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 4256f696bf6dSBart Van Assche struct mlx5_ib_qp *qp, void **seg, int *size) 4257e6631814SSagi Grimberg { 4258f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4259e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4260e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 426131616255SArtemy Kovalyov u32 xlt_size; 4262e6631814SSagi Grimberg int region_len, ret; 4263e6631814SSagi Grimberg 4264e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4265e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4266d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4267d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4268e6631814SSagi Grimberg return -EINVAL; 4269e6631814SSagi Grimberg 4270e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4271e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4272e622f2f4SChristoph Hellwig if (wr->prot && 4273e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4274e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4275e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4276e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4277e6631814SSagi Grimberg 4278e6631814SSagi Grimberg /** 4279e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4280e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4281e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4282e6631814SSagi Grimberg **/ 428331616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4284e6631814SSagi Grimberg 428531616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4286e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4287e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4288e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4289e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4290e6631814SSagi Grimberg 429131616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4292e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4293e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4294e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4295e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4296e6631814SSagi Grimberg 4297e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4298e6631814SSagi Grimberg if (ret) 4299e6631814SSagi Grimberg return ret; 4300e6631814SSagi Grimberg 4301d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4302e6631814SSagi Grimberg return 0; 4303e6631814SSagi Grimberg } 4304e6631814SSagi Grimberg 4305e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4306e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4307e6631814SSagi Grimberg { 4308e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4309e6631814SSagi Grimberg 4310e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4311e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4312e6631814SSagi Grimberg switch (domain->sig_type) { 431378eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 431478eda2bbSSagi Grimberg break; 4315e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4316e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4317e6631814SSagi Grimberg domain->sig.dif.app_tag); 4318e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4319e6631814SSagi Grimberg break; 4320e6631814SSagi Grimberg default: 432112bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 432212bbf1eaSLeon Romanovsky domain->sig_type); 432312bbf1eaSLeon Romanovsky return -EINVAL; 4324e6631814SSagi Grimberg } 4325e6631814SSagi Grimberg 432678eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 432778eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 432878eda2bbSSagi Grimberg 4329e6631814SSagi Grimberg return 0; 4330e6631814SSagi Grimberg } 4331e6631814SSagi Grimberg 43328a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4333f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 43348a187ee5SSagi Grimberg void **seg, int *size) 43358a187ee5SSagi Grimberg { 43368a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 43378a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 4338064e5262SIdan Burstein int mr_list_size = mr->ndescs * mr->desc_size; 4339064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 43408a187ee5SSagi Grimberg 43418a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 43428a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 43438a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 43448a187ee5SSagi Grimberg return -EINVAL; 43458a187ee5SSagi Grimberg } 43468a187ee5SSagi Grimberg 4347064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 43488a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 43498a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 43508a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 43518a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 43528a187ee5SSagi Grimberg 43538a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 43548a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 43558a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 43568a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 43578a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 43588a187ee5SSagi Grimberg 4359064e5262SIdan Burstein if (umr_inline) { 4360064e5262SIdan Burstein set_reg_umr_inline_seg(*seg, qp, mr, mr_list_size); 4361064e5262SIdan Burstein *size += get_xlt_octo(mr_list_size); 4362064e5262SIdan Burstein } else { 43638a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 43648a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 43658a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4366064e5262SIdan Burstein } 43678a187ee5SSagi Grimberg return 0; 43688a187ee5SSagi Grimberg } 43698a187ee5SSagi Grimberg 4370dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4371e126ba97SEli Cohen { 4372dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4373e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4374e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4375e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4376e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4377dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4378e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4379e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4380e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4381e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4382e126ba97SEli Cohen } 4383e126ba97SEli Cohen 4384e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4385e126ba97SEli Cohen { 4386e126ba97SEli Cohen __be32 *p = NULL; 4387e126ba97SEli Cohen int tidx = idx; 4388e126ba97SEli Cohen int i, j; 4389e126ba97SEli Cohen 4390e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4391e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4392e126ba97SEli Cohen if ((i & 0xf) == 0) { 4393e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4394e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4395e126ba97SEli Cohen p = buf; 4396e126ba97SEli Cohen j = 0; 4397e126ba97SEli Cohen } 4398e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4399e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4400e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4401e126ba97SEli Cohen } 4402e126ba97SEli Cohen } 4403e126ba97SEli Cohen 44047bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 44056e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 4406f696bf6dSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 44077bb1fafcSBart Van Assche int *size, int nreq, bool send_signaled, bool solicited) 44086e5eadacSSagi Grimberg { 4409b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4410b2a232d2SLeon Romanovsky return -ENOMEM; 44116e5eadacSSagi Grimberg 44126e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 44136e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 44146e5eadacSSagi Grimberg *ctrl = *seg; 44156e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 44166e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 44176e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 44187bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 44197bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 44206e5eadacSSagi Grimberg 44216e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 44226e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 44236e5eadacSSagi Grimberg 4424b2a232d2SLeon Romanovsky return 0; 44256e5eadacSSagi Grimberg } 44266e5eadacSSagi Grimberg 44277bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 44287bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 44297bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 44307bb1fafcSBart Van Assche int *size, int nreq) 44317bb1fafcSBart Van Assche { 44327bb1fafcSBart Van Assche return __begin_wqe(qp, seg, ctrl, wr, idx, size, nreq, 44337bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 44347bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 44357bb1fafcSBart Van Assche } 44367bb1fafcSBart Van Assche 44376e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 44386e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 44396e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 44406e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 44416e5eadacSSagi Grimberg { 44426e5eadacSSagi Grimberg u8 opmod = 0; 44436e5eadacSSagi Grimberg 44446e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 44456e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 444619098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 44476e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 44486e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 44496e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 44506e5eadacSSagi Grimberg 44516e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 44526e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 44536e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 44546e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 44556e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 44566e5eadacSSagi Grimberg } 44576e5eadacSSagi Grimberg 4458d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4459d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4460e126ba97SEli Cohen { 4461e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4462e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 446389ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4464d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4465e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4466e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4467e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4468d16e91daSHaggai Eran struct mlx5_bf *bf; 4469e126ba97SEli Cohen int uninitialized_var(size); 4470d16e91daSHaggai Eran void *qend; 4471e126ba97SEli Cohen unsigned long flags; 4472e126ba97SEli Cohen unsigned idx; 4473e126ba97SEli Cohen int err = 0; 4474e126ba97SEli Cohen int num_sge; 4475e126ba97SEli Cohen void *seg; 4476e126ba97SEli Cohen int nreq; 4477e126ba97SEli Cohen int i; 4478e126ba97SEli Cohen u8 next_fence = 0; 4479e126ba97SEli Cohen u8 fence; 4480e126ba97SEli Cohen 44816c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 44826c75520fSParav Pandit !drain)) { 44836c75520fSParav Pandit *bad_wr = wr; 44846c75520fSParav Pandit return -EIO; 44856c75520fSParav Pandit } 44866c75520fSParav Pandit 4487d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4488d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4489d16e91daSHaggai Eran 4490d16e91daSHaggai Eran qp = to_mqp(ibqp); 44915fe9dec0SEli Cohen bf = &qp->bf; 4492d16e91daSHaggai Eran qend = qp->sq.qend; 4493d16e91daSHaggai Eran 4494e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4495e126ba97SEli Cohen 4496e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4497a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4498e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4499e126ba97SEli Cohen err = -EINVAL; 4500e126ba97SEli Cohen *bad_wr = wr; 4501e126ba97SEli Cohen goto out; 4502e126ba97SEli Cohen } 4503e126ba97SEli Cohen 4504e126ba97SEli Cohen num_sge = wr->num_sge; 4505e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4506e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 450724be409bSChuck Lever err = -EINVAL; 4508e126ba97SEli Cohen *bad_wr = wr; 4509e126ba97SEli Cohen goto out; 4510e126ba97SEli Cohen } 4511e126ba97SEli Cohen 45126e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 45136e5eadacSSagi Grimberg if (err) { 45146e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 45156e5eadacSSagi Grimberg err = -ENOMEM; 45166e5eadacSSagi Grimberg *bad_wr = wr; 45176e5eadacSSagi Grimberg goto out; 45186e5eadacSSagi Grimberg } 4519e126ba97SEli Cohen 45206e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 45216e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 45226e8484c5SMax Gurtovoy fence = dev->umr_fence; 45236e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 45246e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 45256e8484c5SMax Gurtovoy if (qp->next_fence) 45266e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 45276e8484c5SMax Gurtovoy else 45286e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 45296e8484c5SMax Gurtovoy } else { 45306e8484c5SMax Gurtovoy fence = qp->next_fence; 45316e8484c5SMax Gurtovoy } 45326e8484c5SMax Gurtovoy 4533e126ba97SEli Cohen switch (ibqp->qp_type) { 4534e126ba97SEli Cohen case IB_QPT_XRC_INI: 4535e126ba97SEli Cohen xrc = seg; 4536e126ba97SEli Cohen seg += sizeof(*xrc); 4537e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4538e126ba97SEli Cohen /* fall through */ 4539e126ba97SEli Cohen case IB_QPT_RC: 4540e126ba97SEli Cohen switch (wr->opcode) { 4541e126ba97SEli Cohen case IB_WR_RDMA_READ: 4542e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4543e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4544e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4545e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4546e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4547e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4548e126ba97SEli Cohen break; 4549e126ba97SEli Cohen 4550e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4551e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4552e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 455381bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 455481bea28fSEli Cohen err = -ENOSYS; 455581bea28fSEli Cohen *bad_wr = wr; 455681bea28fSEli Cohen goto out; 4557e126ba97SEli Cohen 4558e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4559e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4560e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4561dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4562e126ba97SEli Cohen num_sge = 0; 4563e126ba97SEli Cohen break; 4564e126ba97SEli Cohen 45658a187ee5SSagi Grimberg case IB_WR_REG_MR: 45668a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 45678a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 45688a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 45698a187ee5SSagi Grimberg if (err) { 45708a187ee5SSagi Grimberg *bad_wr = wr; 45718a187ee5SSagi Grimberg goto out; 45728a187ee5SSagi Grimberg } 45738a187ee5SSagi Grimberg num_sge = 0; 45748a187ee5SSagi Grimberg break; 45758a187ee5SSagi Grimberg 4576e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4577e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4578e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4579e6631814SSagi Grimberg 4580e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4581e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4582e6631814SSagi Grimberg if (err) { 4583e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4584e6631814SSagi Grimberg *bad_wr = wr; 4585e6631814SSagi Grimberg goto out; 4586e6631814SSagi Grimberg } 4587e6631814SSagi Grimberg 45886e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 45896e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4590e6631814SSagi Grimberg /* 4591e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4592e6631814SSagi Grimberg * on error 4593e6631814SSagi Grimberg */ 45947bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 45957bb1fafcSBart Van Assche &size, nreq, false, true); 4596e6631814SSagi Grimberg if (err) { 4597e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4598e6631814SSagi Grimberg err = -ENOMEM; 4599e6631814SSagi Grimberg *bad_wr = wr; 4600e6631814SSagi Grimberg goto out; 4601e6631814SSagi Grimberg } 4602e6631814SSagi Grimberg 4603e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4604e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4605e6631814SSagi Grimberg &size); 4606e6631814SSagi Grimberg if (err) { 4607e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4608e6631814SSagi Grimberg *bad_wr = wr; 4609e6631814SSagi Grimberg goto out; 4610e6631814SSagi Grimberg } 4611e6631814SSagi Grimberg 46126e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 46136e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 46147bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 46157bb1fafcSBart Van Assche &size, nreq, false, true); 4616e6631814SSagi Grimberg if (err) { 4617e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4618e6631814SSagi Grimberg err = -ENOMEM; 4619e6631814SSagi Grimberg *bad_wr = wr; 4620e6631814SSagi Grimberg goto out; 4621e6631814SSagi Grimberg } 4622e6631814SSagi Grimberg 4623e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4624e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4625e6631814SSagi Grimberg &size); 4626e6631814SSagi Grimberg if (err) { 4627e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4628e6631814SSagi Grimberg *bad_wr = wr; 4629e6631814SSagi Grimberg goto out; 4630e6631814SSagi Grimberg } 4631e6631814SSagi Grimberg 46326e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 46336e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 46346e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4635e6631814SSagi Grimberg num_sge = 0; 4636e6631814SSagi Grimberg goto skip_psv; 4637e6631814SSagi Grimberg 4638e126ba97SEli Cohen default: 4639e126ba97SEli Cohen break; 4640e126ba97SEli Cohen } 4641e126ba97SEli Cohen break; 4642e126ba97SEli Cohen 4643e126ba97SEli Cohen case IB_QPT_UC: 4644e126ba97SEli Cohen switch (wr->opcode) { 4645e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4646e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4647e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4648e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4649e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4650e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4651e126ba97SEli Cohen break; 4652e126ba97SEli Cohen 4653e126ba97SEli Cohen default: 4654e126ba97SEli Cohen break; 4655e126ba97SEli Cohen } 4656e126ba97SEli Cohen break; 4657e126ba97SEli Cohen 4658e126ba97SEli Cohen case IB_QPT_SMI: 46591e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 46601e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 46611e0e50b6SMaor Gottlieb err = -EPERM; 46621e0e50b6SMaor Gottlieb *bad_wr = wr; 46631e0e50b6SMaor Gottlieb goto out; 46641e0e50b6SMaor Gottlieb } 4665f6b1ee34SBart Van Assche /* fall through */ 4666d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4667e126ba97SEli Cohen set_datagram_seg(seg, wr); 4668e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4669e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4670e126ba97SEli Cohen if (unlikely((seg == qend))) 4671e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4672e126ba97SEli Cohen break; 4673f0313965SErez Shitrit case IB_QPT_UD: 4674f0313965SErez Shitrit set_datagram_seg(seg, wr); 4675f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4676f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4677e126ba97SEli Cohen 4678f0313965SErez Shitrit if (unlikely((seg == qend))) 4679f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4680f0313965SErez Shitrit 4681f0313965SErez Shitrit /* handle qp that supports ud offload */ 4682f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4683f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4684f0313965SErez Shitrit 4685f0313965SErez Shitrit pad = seg; 4686f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4687f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4688f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4689f0313965SErez Shitrit 4690f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4691f0313965SErez Shitrit 4692f0313965SErez Shitrit if (unlikely((seg == qend))) 4693f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4694f0313965SErez Shitrit } 4695f0313965SErez Shitrit break; 4696e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4697e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4698e126ba97SEli Cohen err = -EINVAL; 4699e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4700e126ba97SEli Cohen goto out; 4701e126ba97SEli Cohen } 4702e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4703e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4704c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4705c8d75a98SMajd Dibbiny if (unlikely(err)) 4706c8d75a98SMajd Dibbiny goto out; 4707e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4708e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4709e126ba97SEli Cohen if (unlikely((seg == qend))) 4710e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4711e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4712e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4713e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4714e126ba97SEli Cohen if (unlikely((seg == qend))) 4715e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4716e126ba97SEli Cohen break; 4717e126ba97SEli Cohen 4718e126ba97SEli Cohen default: 4719e126ba97SEli Cohen break; 4720e126ba97SEli Cohen } 4721e126ba97SEli Cohen 4722e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4723e126ba97SEli Cohen int uninitialized_var(sz); 4724e126ba97SEli Cohen 4725e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4726e126ba97SEli Cohen if (unlikely(err)) { 4727e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4728e126ba97SEli Cohen *bad_wr = wr; 4729e126ba97SEli Cohen goto out; 4730e126ba97SEli Cohen } 4731e126ba97SEli Cohen size += sz; 4732e126ba97SEli Cohen } else { 4733e126ba97SEli Cohen dpseg = seg; 4734e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4735e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4736e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4737e126ba97SEli Cohen dpseg = seg; 4738e126ba97SEli Cohen } 4739e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4740e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4741e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4742e126ba97SEli Cohen dpseg++; 4743e126ba97SEli Cohen } 4744e126ba97SEli Cohen } 4745e126ba97SEli Cohen } 4746e126ba97SEli Cohen 47476e8484c5SMax Gurtovoy qp->next_fence = next_fence; 47486e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 47496e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4750e6631814SSagi Grimberg skip_psv: 4751e126ba97SEli Cohen if (0) 4752e126ba97SEli Cohen dump_wqe(qp, idx, size); 4753e126ba97SEli Cohen } 4754e126ba97SEli Cohen 4755e126ba97SEli Cohen out: 4756e126ba97SEli Cohen if (likely(nreq)) { 4757e126ba97SEli Cohen qp->sq.head += nreq; 4758e126ba97SEli Cohen 4759e126ba97SEli Cohen /* Make sure that descriptors are written before 4760e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4761e126ba97SEli Cohen */ 4762e126ba97SEli Cohen wmb(); 4763e126ba97SEli Cohen 4764e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4765e126ba97SEli Cohen 4766ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4767ada388f7SEli Cohen * we hit doorbell */ 4768ada388f7SEli Cohen wmb(); 4769ada388f7SEli Cohen 47705fe9dec0SEli Cohen /* currently we support only regular doorbells */ 47715fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4772e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4773e126ba97SEli Cohen * and reach the HCA out of order. 4774e126ba97SEli Cohen */ 4775e126ba97SEli Cohen mmiowb(); 4776e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4777e126ba97SEli Cohen } 4778e126ba97SEli Cohen 4779e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4780e126ba97SEli Cohen 4781e126ba97SEli Cohen return err; 4782e126ba97SEli Cohen } 4783e126ba97SEli Cohen 4784d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4785d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 4786d0e84c0aSYishai Hadas { 4787d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 4788d0e84c0aSYishai Hadas } 4789d0e84c0aSYishai Hadas 4790e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4791e126ba97SEli Cohen { 4792e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4793e126ba97SEli Cohen } 4794e126ba97SEli Cohen 4795d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4796d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 4797e126ba97SEli Cohen { 4798e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4799e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4800e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 480189ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 480289ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4803e126ba97SEli Cohen unsigned long flags; 4804e126ba97SEli Cohen int err = 0; 4805e126ba97SEli Cohen int nreq; 4806e126ba97SEli Cohen int ind; 4807e126ba97SEli Cohen int i; 4808e126ba97SEli Cohen 48096c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 48106c75520fSParav Pandit !drain)) { 48116c75520fSParav Pandit *bad_wr = wr; 48126c75520fSParav Pandit return -EIO; 48136c75520fSParav Pandit } 48146c75520fSParav Pandit 4815d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4816d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4817d16e91daSHaggai Eran 4818e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4819e126ba97SEli Cohen 4820e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4821e126ba97SEli Cohen 4822e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4823e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4824e126ba97SEli Cohen err = -ENOMEM; 4825e126ba97SEli Cohen *bad_wr = wr; 4826e126ba97SEli Cohen goto out; 4827e126ba97SEli Cohen } 4828e126ba97SEli Cohen 4829e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4830e126ba97SEli Cohen err = -EINVAL; 4831e126ba97SEli Cohen *bad_wr = wr; 4832e126ba97SEli Cohen goto out; 4833e126ba97SEli Cohen } 4834e126ba97SEli Cohen 4835e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4836e126ba97SEli Cohen if (qp->wq_sig) 4837e126ba97SEli Cohen scat++; 4838e126ba97SEli Cohen 4839e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4840e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4841e126ba97SEli Cohen 4842e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4843e126ba97SEli Cohen scat[i].byte_count = 0; 4844e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4845e126ba97SEli Cohen scat[i].addr = 0; 4846e126ba97SEli Cohen } 4847e126ba97SEli Cohen 4848e126ba97SEli Cohen if (qp->wq_sig) { 4849e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4850e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4851e126ba97SEli Cohen } 4852e126ba97SEli Cohen 4853e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4854e126ba97SEli Cohen 4855e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4856e126ba97SEli Cohen } 4857e126ba97SEli Cohen 4858e126ba97SEli Cohen out: 4859e126ba97SEli Cohen if (likely(nreq)) { 4860e126ba97SEli Cohen qp->rq.head += nreq; 4861e126ba97SEli Cohen 4862e126ba97SEli Cohen /* Make sure that descriptors are written before 4863e126ba97SEli Cohen * doorbell record. 4864e126ba97SEli Cohen */ 4865e126ba97SEli Cohen wmb(); 4866e126ba97SEli Cohen 4867e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4868e126ba97SEli Cohen } 4869e126ba97SEli Cohen 4870e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4871e126ba97SEli Cohen 4872e126ba97SEli Cohen return err; 4873e126ba97SEli Cohen } 4874e126ba97SEli Cohen 4875d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4876d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 4877d0e84c0aSYishai Hadas { 4878d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 4879d0e84c0aSYishai Hadas } 4880d0e84c0aSYishai Hadas 4881e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4882e126ba97SEli Cohen { 4883e126ba97SEli Cohen switch (mlx5_state) { 4884e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4885e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4886e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4887e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4888e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4889e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4890e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4891e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4892e126ba97SEli Cohen default: return -1; 4893e126ba97SEli Cohen } 4894e126ba97SEli Cohen } 4895e126ba97SEli Cohen 4896e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4897e126ba97SEli Cohen { 4898e126ba97SEli Cohen switch (mlx5_mig_state) { 4899e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4900e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4901e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4902e126ba97SEli Cohen default: return -1; 4903e126ba97SEli Cohen } 4904e126ba97SEli Cohen } 4905e126ba97SEli Cohen 4906e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4907e126ba97SEli Cohen { 4908e126ba97SEli Cohen int ib_flags = 0; 4909e126ba97SEli Cohen 4910e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4911e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4912e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4913e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4914e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4915e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4916e126ba97SEli Cohen 4917e126ba97SEli Cohen return ib_flags; 4918e126ba97SEli Cohen } 4919e126ba97SEli Cohen 492038349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4921d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4922e126ba97SEli Cohen struct mlx5_qp_path *path) 4923e126ba97SEli Cohen { 4924e126ba97SEli Cohen 4925d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4926e126ba97SEli Cohen 4927e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 4928e126ba97SEli Cohen return; 4929e126ba97SEli Cohen 4930ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4931ae59c3f0SLeon Romanovsky 4932d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4933d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4934e126ba97SEli Cohen 4935d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4936d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4937d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4938d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4939d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4940d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4941d8966fcdSDasaratharaman Chandramouli 4942d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4943d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4944d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4945d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4946d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4947d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4948e126ba97SEli Cohen } 4949e126ba97SEli Cohen } 4950e126ba97SEli Cohen 49516d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 49526d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 49536d2f89dfSmajd@mellanox.com u8 *sq_state) 4954e126ba97SEli Cohen { 49556d2f89dfSmajd@mellanox.com int err; 49566d2f89dfSmajd@mellanox.com 495728160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 49586d2f89dfSmajd@mellanox.com if (err) 49596d2f89dfSmajd@mellanox.com goto out; 49606d2f89dfSmajd@mellanox.com sq->state = *sq_state; 49616d2f89dfSmajd@mellanox.com 49626d2f89dfSmajd@mellanox.com out: 49636d2f89dfSmajd@mellanox.com return err; 49646d2f89dfSmajd@mellanox.com } 49656d2f89dfSmajd@mellanox.com 49666d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 49676d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 49686d2f89dfSmajd@mellanox.com u8 *rq_state) 49696d2f89dfSmajd@mellanox.com { 49706d2f89dfSmajd@mellanox.com void *out; 49716d2f89dfSmajd@mellanox.com void *rqc; 49726d2f89dfSmajd@mellanox.com int inlen; 49736d2f89dfSmajd@mellanox.com int err; 49746d2f89dfSmajd@mellanox.com 49756d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 49761b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 49776d2f89dfSmajd@mellanox.com if (!out) 49786d2f89dfSmajd@mellanox.com return -ENOMEM; 49796d2f89dfSmajd@mellanox.com 49806d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 49816d2f89dfSmajd@mellanox.com if (err) 49826d2f89dfSmajd@mellanox.com goto out; 49836d2f89dfSmajd@mellanox.com 49846d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 49856d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 49866d2f89dfSmajd@mellanox.com rq->state = *rq_state; 49876d2f89dfSmajd@mellanox.com 49886d2f89dfSmajd@mellanox.com out: 49896d2f89dfSmajd@mellanox.com kvfree(out); 49906d2f89dfSmajd@mellanox.com return err; 49916d2f89dfSmajd@mellanox.com } 49926d2f89dfSmajd@mellanox.com 49936d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 49946d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 49956d2f89dfSmajd@mellanox.com { 49966d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 49976d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 49986d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 49996d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 50006d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 50016d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 50026d2f89dfSmajd@mellanox.com }, 50036d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 50046d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 50056d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 50066d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 50076d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 50086d2f89dfSmajd@mellanox.com }, 50096d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 50106d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 50116d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 50126d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 50136d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 50146d2f89dfSmajd@mellanox.com }, 50156d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 50166d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 50176d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 50186d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 50196d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 50206d2f89dfSmajd@mellanox.com }, 50216d2f89dfSmajd@mellanox.com }; 50226d2f89dfSmajd@mellanox.com 50236d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 50246d2f89dfSmajd@mellanox.com 50256d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 50266d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 50276d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 50286d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 50296d2f89dfSmajd@mellanox.com return -EINVAL; 50306d2f89dfSmajd@mellanox.com } 50316d2f89dfSmajd@mellanox.com 50326d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 50336d2f89dfSmajd@mellanox.com *qp_state = qp->state; 50346d2f89dfSmajd@mellanox.com 50356d2f89dfSmajd@mellanox.com return 0; 50366d2f89dfSmajd@mellanox.com } 50376d2f89dfSmajd@mellanox.com 50386d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 50396d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 50406d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 50416d2f89dfSmajd@mellanox.com { 50426d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 50436d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 50446d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 50456d2f89dfSmajd@mellanox.com int err; 50466d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 50476d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 50486d2f89dfSmajd@mellanox.com 50496d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 50506d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 50516d2f89dfSmajd@mellanox.com if (err) 50526d2f89dfSmajd@mellanox.com return err; 50536d2f89dfSmajd@mellanox.com } 50546d2f89dfSmajd@mellanox.com 50556d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 50566d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 50576d2f89dfSmajd@mellanox.com if (err) 50586d2f89dfSmajd@mellanox.com return err; 50596d2f89dfSmajd@mellanox.com } 50606d2f89dfSmajd@mellanox.com 50616d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 50626d2f89dfSmajd@mellanox.com raw_packet_qp_state); 50636d2f89dfSmajd@mellanox.com } 50646d2f89dfSmajd@mellanox.com 50656d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 50666d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 50676d2f89dfSmajd@mellanox.com { 506809a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5069e126ba97SEli Cohen struct mlx5_qp_context *context; 5070e126ba97SEli Cohen int mlx5_state; 507109a7d9ecSSaeed Mahameed u32 *outb; 5072e126ba97SEli Cohen int err = 0; 5073e126ba97SEli Cohen 507409a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 50756d2f89dfSmajd@mellanox.com if (!outb) 50766d2f89dfSmajd@mellanox.com return -ENOMEM; 50776d2f89dfSmajd@mellanox.com 507819098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 507909a7d9ecSSaeed Mahameed outlen); 5080e126ba97SEli Cohen if (err) 50816d2f89dfSmajd@mellanox.com goto out; 5082e126ba97SEli Cohen 508309a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 508409a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 508509a7d9ecSSaeed Mahameed 5086e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5087e126ba97SEli Cohen 5088e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5089e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5090e126ba97SEli Cohen qp_attr->path_mig_state = 5091e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5092e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5093e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5094e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5095e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5096e126ba97SEli Cohen qp_attr->qp_access_flags = 5097e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5098e126ba97SEli Cohen 5099e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 510038349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 510138349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5102d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5103d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5104d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5105d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5106e126ba97SEli Cohen } 5107e126ba97SEli Cohen 5108d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5109e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5110e126ba97SEli Cohen 5111e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5112e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5113e126ba97SEli Cohen 5114e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5115e126ba97SEli Cohen 5116e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5117e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5118e126ba97SEli Cohen qp_attr->min_rnr_timer = 5119e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5120e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5121e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5122e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5123e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 51246d2f89dfSmajd@mellanox.com 51256d2f89dfSmajd@mellanox.com out: 51266d2f89dfSmajd@mellanox.com kfree(outb); 51276d2f89dfSmajd@mellanox.com return err; 51286d2f89dfSmajd@mellanox.com } 51296d2f89dfSmajd@mellanox.com 5130776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5131776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5132776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5133776a3906SMoni Shoua { 5134776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5135776a3906SMoni Shoua u32 *out; 5136776a3906SMoni Shoua u32 access_flags = 0; 5137776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5138776a3906SMoni Shoua void *dctc; 5139776a3906SMoni Shoua int err; 5140776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5141776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5142776a3906SMoni Shoua IB_QP_PORT | 5143776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5144776a3906SMoni Shoua IB_QP_AV | 5145776a3906SMoni Shoua IB_QP_PATH_MTU | 5146776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5147776a3906SMoni Shoua 5148776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5149776a3906SMoni Shoua return -EINVAL; 5150776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5151776a3906SMoni Shoua return -EINVAL; 5152776a3906SMoni Shoua 5153776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5154776a3906SMoni Shoua if (!out) 5155776a3906SMoni Shoua return -ENOMEM; 5156776a3906SMoni Shoua 5157776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5158776a3906SMoni Shoua if (err) 5159776a3906SMoni Shoua goto out; 5160776a3906SMoni Shoua 5161776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5162776a3906SMoni Shoua 5163776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5164776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5165776a3906SMoni Shoua 5166776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5167776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5168776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5169776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5170776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5171776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5172776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5173776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5174776a3906SMoni Shoua } 5175776a3906SMoni Shoua 5176776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5177776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5178776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5179776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5180776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5181776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5182776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5183776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5184776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5185776a3906SMoni Shoua } 5186776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5187776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5188776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5189776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5190776a3906SMoni Shoua out: 5191776a3906SMoni Shoua kfree(out); 5192776a3906SMoni Shoua return err; 5193776a3906SMoni Shoua } 5194776a3906SMoni Shoua 51956d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 51966d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 51976d2f89dfSmajd@mellanox.com { 51986d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 51996d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 52006d2f89dfSmajd@mellanox.com int err = 0; 52016d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 52026d2f89dfSmajd@mellanox.com 520328d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 520428d61370SYishai Hadas return -ENOSYS; 520528d61370SYishai Hadas 5206d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5207d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5208d16e91daSHaggai Eran qp_init_attr); 5209d16e91daSHaggai Eran 5210c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5211c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5212c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5213c2e53b2cSYishai Hadas 5214776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5215776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5216776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5217776a3906SMoni Shoua 52186d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 52196d2f89dfSmajd@mellanox.com 5220c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5221c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 52226d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 52236d2f89dfSmajd@mellanox.com if (err) 52246d2f89dfSmajd@mellanox.com goto out; 52256d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 52266d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 52276d2f89dfSmajd@mellanox.com } else { 52286d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 52296d2f89dfSmajd@mellanox.com if (err) 52306d2f89dfSmajd@mellanox.com goto out; 52316d2f89dfSmajd@mellanox.com } 52326d2f89dfSmajd@mellanox.com 52336d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5234e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5235e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5236e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5237e126ba97SEli Cohen 5238e126ba97SEli Cohen if (!ibqp->uobject) { 52390540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5240e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 52410540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5242e126ba97SEli Cohen } else { 5243e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5244e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5245e126ba97SEli Cohen } 5246e126ba97SEli Cohen 52470540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 52480540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 52490540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 52500540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 52510540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5252e126ba97SEli Cohen 5253e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5254e126ba97SEli Cohen 5255e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5256e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5257e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5258e126ba97SEli Cohen 5259051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5260051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5261051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5262051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5263051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5264051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5265b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5266b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5267051f2630SLeon Romanovsky 5268e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5269e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5270e126ba97SEli Cohen 5271e126ba97SEli Cohen out: 5272e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5273e126ba97SEli Cohen return err; 5274e126ba97SEli Cohen } 5275e126ba97SEli Cohen 5276e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5277e126ba97SEli Cohen struct ib_ucontext *context, 5278e126ba97SEli Cohen struct ib_udata *udata) 5279e126ba97SEli Cohen { 5280e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5281e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5282e126ba97SEli Cohen int err; 5283d00614c0SYishai Hadas u16 uid; 5284e126ba97SEli Cohen 5285938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5286e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5287e126ba97SEli Cohen 5288e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5289e126ba97SEli Cohen if (!xrcd) 5290e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5291e126ba97SEli Cohen 5292d00614c0SYishai Hadas uid = context ? to_mucontext(context)->devx_uid : 0; 5293d00614c0SYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, uid); 5294e126ba97SEli Cohen if (err) { 5295e126ba97SEli Cohen kfree(xrcd); 5296e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5297e126ba97SEli Cohen } 5298e126ba97SEli Cohen 5299d00614c0SYishai Hadas xrcd->uid = uid; 5300e126ba97SEli Cohen return &xrcd->ibxrcd; 5301e126ba97SEli Cohen } 5302e126ba97SEli Cohen 5303e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5304e126ba97SEli Cohen { 5305e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5306e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5307d00614c0SYishai Hadas u16 uid = to_mxrcd(xrcd)->uid; 5308e126ba97SEli Cohen int err; 5309e126ba97SEli Cohen 5310d00614c0SYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, uid); 5311b081808aSLeon Romanovsky if (err) 5312e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5313e126ba97SEli Cohen 5314e126ba97SEli Cohen kfree(xrcd); 5315e126ba97SEli Cohen return 0; 5316e126ba97SEli Cohen } 531779b20a6cSYishai Hadas 5318350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5319350d0e4cSYishai Hadas { 5320350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5321350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5322350d0e4cSYishai Hadas struct ib_event event; 5323350d0e4cSYishai Hadas 5324350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5325350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5326350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5327350d0e4cSYishai Hadas switch (type) { 5328350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5329350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5330350d0e4cSYishai Hadas break; 5331350d0e4cSYishai Hadas default: 5332350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5333350d0e4cSYishai Hadas return; 5334350d0e4cSYishai Hadas } 5335350d0e4cSYishai Hadas 5336350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5337350d0e4cSYishai Hadas } 5338350d0e4cSYishai Hadas } 5339350d0e4cSYishai Hadas 534003404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 534103404e8aSMaor Gottlieb { 534203404e8aSMaor Gottlieb int err = 0; 534303404e8aSMaor Gottlieb 534403404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 534503404e8aSMaor Gottlieb if (dev->delay_drop.activate) 534603404e8aSMaor Gottlieb goto out; 534703404e8aSMaor Gottlieb 534803404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 534903404e8aSMaor Gottlieb if (err) 535003404e8aSMaor Gottlieb goto out; 535103404e8aSMaor Gottlieb 535203404e8aSMaor Gottlieb dev->delay_drop.activate = true; 535303404e8aSMaor Gottlieb out: 535403404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5355fe248c3aSMaor Gottlieb 5356fe248c3aSMaor Gottlieb if (!err) 5357fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 535803404e8aSMaor Gottlieb return err; 535903404e8aSMaor Gottlieb } 536003404e8aSMaor Gottlieb 536179b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 536279b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 536379b20a6cSYishai Hadas { 536479b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 53654be6da1eSNoa Osherovich int has_net_offloads; 536679b20a6cSYishai Hadas __be64 *rq_pas0; 536779b20a6cSYishai Hadas void *in; 536879b20a6cSYishai Hadas void *rqc; 536979b20a6cSYishai Hadas void *wq; 537079b20a6cSYishai Hadas int inlen; 537179b20a6cSYishai Hadas int err; 537279b20a6cSYishai Hadas 537379b20a6cSYishai Hadas dev = to_mdev(pd->device); 537479b20a6cSYishai Hadas 537579b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 53761b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 537779b20a6cSYishai Hadas if (!in) 537879b20a6cSYishai Hadas return -ENOMEM; 537979b20a6cSYishai Hadas 538034d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 538179b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 538279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 538379b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 538479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 538579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 538679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 538779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 538879b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5389ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5390ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5391ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5392b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5393b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5394b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5395b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5396b1383aa6SNoa Osherovich goto out; 5397b1383aa6SNoa Osherovich } else { 539879b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5399b1383aa6SNoa Osherovich } 5400b1383aa6SNoa Osherovich } 540179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5402ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5403ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5404ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5405ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5406ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5407ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5408ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5409ccc87087SNoa Osherovich } 541079b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 541179b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 541279b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 541379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 541479b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 541579b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 54164be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5417b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 54184be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5419b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5420b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5421b1f74a84SNoa Osherovich goto out; 5422b1f74a84SNoa Osherovich } 5423b1f74a84SNoa Osherovich } else { 5424b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5425b1f74a84SNoa Osherovich } 54264be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 54274be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 54284be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 54294be6da1eSNoa Osherovich err = -EOPNOTSUPP; 54304be6da1eSNoa Osherovich goto out; 54314be6da1eSNoa Osherovich } 54324be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 54334be6da1eSNoa Osherovich } 543403404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 543503404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 543603404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 543703404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 543803404e8aSMaor Gottlieb err = -EOPNOTSUPP; 543903404e8aSMaor Gottlieb goto out; 544003404e8aSMaor Gottlieb } 544103404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 544203404e8aSMaor Gottlieb } 544379b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 544479b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5445350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 544603404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 544703404e8aSMaor Gottlieb err = set_delay_drop(dev); 544803404e8aSMaor Gottlieb if (err) { 544903404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 545003404e8aSMaor Gottlieb err); 545103404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 545203404e8aSMaor Gottlieb } else { 545303404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 545403404e8aSMaor Gottlieb } 545503404e8aSMaor Gottlieb } 5456b1f74a84SNoa Osherovich out: 545779b20a6cSYishai Hadas kvfree(in); 545879b20a6cSYishai Hadas return err; 545979b20a6cSYishai Hadas } 546079b20a6cSYishai Hadas 546179b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 546279b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 546379b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 546479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 546579b20a6cSYishai Hadas { 546679b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 546779b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 546879b20a6cSYishai Hadas return -EINVAL; 546979b20a6cSYishai Hadas 547079b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 547179b20a6cSYishai Hadas return -EINVAL; 547279b20a6cSYishai Hadas 547379b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 547479b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 54750dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 54760dfe4522SLeon Romanovsky return -EINVAL; 54770dfe4522SLeon Romanovsky 547879b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 547979b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 548079b20a6cSYishai Hadas return 0; 548179b20a6cSYishai Hadas } 548279b20a6cSYishai Hadas 548379b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 548479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 548579b20a6cSYishai Hadas struct ib_udata *udata, 548679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 548779b20a6cSYishai Hadas { 548879b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 548979b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 549079b20a6cSYishai Hadas int err; 549179b20a6cSYishai Hadas size_t required_cmd_sz; 549279b20a6cSYishai Hadas 5493ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5494ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 549579b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 549679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 549779b20a6cSYishai Hadas return -EINVAL; 549879b20a6cSYishai Hadas } 549979b20a6cSYishai Hadas 550079b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 550179b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 550279b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 550379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 550479b20a6cSYishai Hadas return -EOPNOTSUPP; 550579b20a6cSYishai Hadas } 550679b20a6cSYishai Hadas 550779b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 550879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 550979b20a6cSYishai Hadas return -EFAULT; 551079b20a6cSYishai Hadas } 551179b20a6cSYishai Hadas 5512ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 551379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 551479b20a6cSYishai Hadas return -EOPNOTSUPP; 5515ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5516ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5517ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 551879b20a6cSYishai Hadas return -EOPNOTSUPP; 551979b20a6cSYishai Hadas } 5520ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5521ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5522ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5523ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5524ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5525ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5526ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5527ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5528ccc87087SNoa Osherovich return -EINVAL; 5529ccc87087SNoa Osherovich } 5530ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5531ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5532ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5533ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5534ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5535ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5536ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5537ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5538ccc87087SNoa Osherovich return -EINVAL; 5539ccc87087SNoa Osherovich } 5540ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5541ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5542ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5543ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5544ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5545ccc87087SNoa Osherovich } 554679b20a6cSYishai Hadas 554779b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 554879b20a6cSYishai Hadas if (err) { 554979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 555079b20a6cSYishai Hadas return err; 555179b20a6cSYishai Hadas } 555279b20a6cSYishai Hadas 555379b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 555479b20a6cSYishai Hadas if (err) { 555579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 555679b20a6cSYishai Hadas if (err) 555779b20a6cSYishai Hadas return err; 555879b20a6cSYishai Hadas } 555979b20a6cSYishai Hadas 556079b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 556179b20a6cSYishai Hadas return 0; 556279b20a6cSYishai Hadas } 556379b20a6cSYishai Hadas 556479b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 556579b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 556679b20a6cSYishai Hadas struct ib_udata *udata) 556779b20a6cSYishai Hadas { 556879b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 556979b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 557079b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 557179b20a6cSYishai Hadas size_t min_resp_len; 557279b20a6cSYishai Hadas int err; 557379b20a6cSYishai Hadas 557479b20a6cSYishai Hadas if (!udata) 557579b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 557679b20a6cSYishai Hadas 557779b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 557879b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 557979b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 558079b20a6cSYishai Hadas 558179b20a6cSYishai Hadas dev = to_mdev(pd->device); 558279b20a6cSYishai Hadas switch (init_attr->wq_type) { 558379b20a6cSYishai Hadas case IB_WQT_RQ: 558479b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 558579b20a6cSYishai Hadas if (!rwq) 558679b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 558779b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 558879b20a6cSYishai Hadas if (err) 558979b20a6cSYishai Hadas goto err; 559079b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 559179b20a6cSYishai Hadas if (err) 559279b20a6cSYishai Hadas goto err_user_rq; 559379b20a6cSYishai Hadas break; 559479b20a6cSYishai Hadas default: 559579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 559679b20a6cSYishai Hadas init_attr->wq_type); 559779b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 559879b20a6cSYishai Hadas } 559979b20a6cSYishai Hadas 5600350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 560179b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 560279b20a6cSYishai Hadas if (udata->outlen) { 560379b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 560479b20a6cSYishai Hadas sizeof(resp.response_length); 560579b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 560679b20a6cSYishai Hadas if (err) 560779b20a6cSYishai Hadas goto err_copy; 560879b20a6cSYishai Hadas } 560979b20a6cSYishai Hadas 5610350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5611350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 561279b20a6cSYishai Hadas return &rwq->ibwq; 561379b20a6cSYishai Hadas 561479b20a6cSYishai Hadas err_copy: 5615350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 561679b20a6cSYishai Hadas err_user_rq: 5617fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 561879b20a6cSYishai Hadas err: 561979b20a6cSYishai Hadas kfree(rwq); 562079b20a6cSYishai Hadas return ERR_PTR(err); 562179b20a6cSYishai Hadas } 562279b20a6cSYishai Hadas 562379b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 562479b20a6cSYishai Hadas { 562579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 562679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 562779b20a6cSYishai Hadas 5628350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5629fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 563079b20a6cSYishai Hadas kfree(rwq); 563179b20a6cSYishai Hadas 563279b20a6cSYishai Hadas return 0; 563379b20a6cSYishai Hadas } 563479b20a6cSYishai Hadas 5635c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5636c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5637c5f90929SYishai Hadas struct ib_udata *udata) 5638c5f90929SYishai Hadas { 5639c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5640c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5641c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5642c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5643c5f90929SYishai Hadas size_t min_resp_len; 5644c5f90929SYishai Hadas int inlen; 5645c5f90929SYishai Hadas int err; 5646c5f90929SYishai Hadas int i; 5647c5f90929SYishai Hadas u32 *in; 5648c5f90929SYishai Hadas void *rqtc; 5649c5f90929SYishai Hadas 5650c5f90929SYishai Hadas if (udata->inlen > 0 && 5651c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5652c5f90929SYishai Hadas udata->inlen)) 5653c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5654c5f90929SYishai Hadas 5655efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5656efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5657efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5658efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5659efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5660efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5661efd7f400SMaor Gottlieb } 5662efd7f400SMaor Gottlieb 5663c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5664c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5665c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5666c5f90929SYishai Hadas 5667c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5668c5f90929SYishai Hadas if (!rwq_ind_tbl) 5669c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5670c5f90929SYishai Hadas 5671c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 56721b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5673c5f90929SYishai Hadas if (!in) { 5674c5f90929SYishai Hadas err = -ENOMEM; 5675c5f90929SYishai Hadas goto err; 5676c5f90929SYishai Hadas } 5677c5f90929SYishai Hadas 5678c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5679c5f90929SYishai Hadas 5680c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5681c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5682c5f90929SYishai Hadas 5683c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5684c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5685c5f90929SYishai Hadas 56865deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 56875deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 56885deba86eSYishai Hadas 5689c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5690c5f90929SYishai Hadas kvfree(in); 5691c5f90929SYishai Hadas 5692c5f90929SYishai Hadas if (err) 5693c5f90929SYishai Hadas goto err; 5694c5f90929SYishai Hadas 5695c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5696c5f90929SYishai Hadas if (udata->outlen) { 5697c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5698c5f90929SYishai Hadas sizeof(resp.response_length); 5699c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5700c5f90929SYishai Hadas if (err) 5701c5f90929SYishai Hadas goto err_copy; 5702c5f90929SYishai Hadas } 5703c5f90929SYishai Hadas 5704c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5705c5f90929SYishai Hadas 5706c5f90929SYishai Hadas err_copy: 57075deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5708c5f90929SYishai Hadas err: 5709c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5710c5f90929SYishai Hadas return ERR_PTR(err); 5711c5f90929SYishai Hadas } 5712c5f90929SYishai Hadas 5713c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5714c5f90929SYishai Hadas { 5715c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5716c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5717c5f90929SYishai Hadas 57185deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5719c5f90929SYishai Hadas 5720c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5721c5f90929SYishai Hadas return 0; 5722c5f90929SYishai Hadas } 5723c5f90929SYishai Hadas 572479b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 572579b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 572679b20a6cSYishai Hadas { 572779b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 572879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 572979b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 573079b20a6cSYishai Hadas size_t required_cmd_sz; 573179b20a6cSYishai Hadas int curr_wq_state; 573279b20a6cSYishai Hadas int wq_state; 573379b20a6cSYishai Hadas int inlen; 573479b20a6cSYishai Hadas int err; 573579b20a6cSYishai Hadas void *rqc; 573679b20a6cSYishai Hadas void *in; 573779b20a6cSYishai Hadas 573879b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 573979b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 574079b20a6cSYishai Hadas return -EINVAL; 574179b20a6cSYishai Hadas 574279b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 574379b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 574479b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 574579b20a6cSYishai Hadas return -EOPNOTSUPP; 574679b20a6cSYishai Hadas 574779b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 574879b20a6cSYishai Hadas return -EFAULT; 574979b20a6cSYishai Hadas 575079b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 575179b20a6cSYishai Hadas return -EOPNOTSUPP; 575279b20a6cSYishai Hadas 575379b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 57541b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 575579b20a6cSYishai Hadas if (!in) 575679b20a6cSYishai Hadas return -ENOMEM; 575779b20a6cSYishai Hadas 575879b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 575979b20a6cSYishai Hadas 576079b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 576179b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 576279b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 576379b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 576479b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 576579b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 576679b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 576779b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 576879b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 576934d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 577079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 577179b20a6cSYishai Hadas 5772b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5773b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5774b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5775b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5776b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5777b1f74a84SNoa Osherovich "supported\n"); 5778b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5779b1f74a84SNoa Osherovich goto out; 5780b1f74a84SNoa Osherovich } 5781b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5782b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5783b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5784b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5785b1f74a84SNoa Osherovich } 5786b1383aa6SNoa Osherovich 5787b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5788b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5789b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5790b1383aa6SNoa Osherovich goto out; 5791b1383aa6SNoa Osherovich } 5792b1f74a84SNoa Osherovich } 5793b1f74a84SNoa Osherovich 579423a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 579523a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 579623a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 579723a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5798e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5799e1f24a79SParav Pandit dev->port->cnts.set_id); 580023a6964eSMajd Dibbiny } else 580123a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 580223a6964eSMajd Dibbiny dev->ib_dev.name); 580323a6964eSMajd Dibbiny } 580423a6964eSMajd Dibbiny 5805350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 580679b20a6cSYishai Hadas if (!err) 580779b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 580879b20a6cSYishai Hadas 5809b1f74a84SNoa Osherovich out: 5810b1f74a84SNoa Osherovich kvfree(in); 581179b20a6cSYishai Hadas return err; 581279b20a6cSYishai Hadas } 5813d0e84c0aSYishai Hadas 5814d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 5815d0e84c0aSYishai Hadas struct ib_cqe cqe; 5816d0e84c0aSYishai Hadas struct completion done; 5817d0e84c0aSYishai Hadas }; 5818d0e84c0aSYishai Hadas 5819d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 5820d0e84c0aSYishai Hadas { 5821d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 5822d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 5823d0e84c0aSYishai Hadas cqe); 5824d0e84c0aSYishai Hadas 5825d0e84c0aSYishai Hadas complete(&cqe->done); 5826d0e84c0aSYishai Hadas } 5827d0e84c0aSYishai Hadas 5828d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 5829d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 5830d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 5831d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 5832d0e84c0aSYishai Hadas { 5833d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5834d0e84c0aSYishai Hadas 5835d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 5836d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 5837d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 5838d0e84c0aSYishai Hadas return; 5839d0e84c0aSYishai Hadas } 5840d0e84c0aSYishai Hadas 5841d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5842d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 5843d0e84c0aSYishai Hadas bool triggered = false; 5844d0e84c0aSYishai Hadas unsigned long flags; 5845d0e84c0aSYishai Hadas 5846d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 5847d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 5848d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 5849d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 5850d0e84c0aSYishai Hadas else 5851d0e84c0aSYishai Hadas triggered = true; 5852d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 5853d0e84c0aSYishai Hadas 5854d0e84c0aSYishai Hadas if (triggered) { 5855d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 5856d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 5857d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 5858d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 5859d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 5860d0e84c0aSYishai Hadas break; 5861d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 5862d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 5863d0e84c0aSYishai Hadas break; 5864d0e84c0aSYishai Hadas default: 5865d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 5866d0e84c0aSYishai Hadas } 5867d0e84c0aSYishai Hadas } 5868d0e84c0aSYishai Hadas 5869d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 5870d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 5871d0e84c0aSYishai Hadas */ 5872d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 5873d0e84c0aSYishai Hadas } 5874d0e84c0aSYishai Hadas 5875d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 5876d0e84c0aSYishai Hadas } 5877d0e84c0aSYishai Hadas 5878d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 5879d0e84c0aSYishai Hadas { 5880d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 5881d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 5882d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 5883d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 5884d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 5885d0e84c0aSYishai Hadas .wr = { 5886d0e84c0aSYishai Hadas .next = NULL, 5887d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 5888d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 5889d0e84c0aSYishai Hadas }, 5890d0e84c0aSYishai Hadas }; 5891d0e84c0aSYishai Hadas int ret; 5892d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 5893d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5894d0e84c0aSYishai Hadas 5895d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 5896d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5897d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 5898d0e84c0aSYishai Hadas return; 5899d0e84c0aSYishai Hadas } 5900d0e84c0aSYishai Hadas 5901d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 5902d0e84c0aSYishai Hadas init_completion(&sdrain.done); 5903d0e84c0aSYishai Hadas 5904d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 5905d0e84c0aSYishai Hadas if (ret) { 5906d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 5907d0e84c0aSYishai Hadas return; 5908d0e84c0aSYishai Hadas } 5909d0e84c0aSYishai Hadas 5910d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 5911d0e84c0aSYishai Hadas } 5912d0e84c0aSYishai Hadas 5913d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 5914d0e84c0aSYishai Hadas { 5915d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 5916d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 5917d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 5918d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 5919d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 5920d0e84c0aSYishai Hadas int ret; 5921d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 5922d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5923d0e84c0aSYishai Hadas 5924d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 5925d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5926d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 5927d0e84c0aSYishai Hadas return; 5928d0e84c0aSYishai Hadas } 5929d0e84c0aSYishai Hadas 5930d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 5931d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 5932d0e84c0aSYishai Hadas init_completion(&rdrain.done); 5933d0e84c0aSYishai Hadas 5934d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 5935d0e84c0aSYishai Hadas if (ret) { 5936d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 5937d0e84c0aSYishai Hadas return; 5938d0e84c0aSYishai Hadas } 5939d0e84c0aSYishai Hadas 5940d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 5941d0e84c0aSYishai Hadas } 5942