1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111c1395a2aSHaggai Eran /** 112fbeb4075SMoni Shoua * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ 113fbeb4075SMoni Shoua * to kernel buffer 114c1395a2aSHaggai Eran * 115fbeb4075SMoni Shoua * @umem: User space memory where the WQ is 116fbeb4075SMoni Shoua * @buffer: buffer to copy to 117fbeb4075SMoni Shoua * @buflen: buffer length 118fbeb4075SMoni Shoua * @wqe_index: index of WQE to copy from 119fbeb4075SMoni Shoua * @wq_offset: offset to start of WQ 120fbeb4075SMoni Shoua * @wq_wqe_cnt: number of WQEs in WQ 121fbeb4075SMoni Shoua * @wq_wqe_shift: log2 of WQE size 122fbeb4075SMoni Shoua * @bcnt: number of bytes to copy 123fbeb4075SMoni Shoua * @bytes_copied: number of bytes to copy (return value) 124c1395a2aSHaggai Eran * 125fbeb4075SMoni Shoua * Copies from start of WQE bcnt or less bytes. 126fbeb4075SMoni Shoua * Does not gurantee to copy the entire WQE. 127c1395a2aSHaggai Eran * 128fbeb4075SMoni Shoua * Return: zero on success, or an error code. 129c1395a2aSHaggai Eran */ 130fbeb4075SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, 131fbeb4075SMoni Shoua void *buffer, 132fbeb4075SMoni Shoua u32 buflen, 133fbeb4075SMoni Shoua int wqe_index, 134fbeb4075SMoni Shoua int wq_offset, 135fbeb4075SMoni Shoua int wq_wqe_cnt, 136fbeb4075SMoni Shoua int wq_wqe_shift, 137fbeb4075SMoni Shoua int bcnt, 138fbeb4075SMoni Shoua size_t *bytes_copied) 139c1395a2aSHaggai Eran { 140fbeb4075SMoni Shoua size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift); 141fbeb4075SMoni Shoua size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift); 142fbeb4075SMoni Shoua size_t copy_length; 143c1395a2aSHaggai Eran int ret; 144c1395a2aSHaggai Eran 145fbeb4075SMoni Shoua /* don't copy more than requested, more than buffer length or 146fbeb4075SMoni Shoua * beyond WQ end 147fbeb4075SMoni Shoua */ 148fbeb4075SMoni Shoua copy_length = min_t(u32, buflen, wq_end - offset); 149fbeb4075SMoni Shoua copy_length = min_t(u32, copy_length, bcnt); 150c1395a2aSHaggai Eran 151fbeb4075SMoni Shoua ret = ib_umem_copy_from(buffer, umem, offset, copy_length); 152c1395a2aSHaggai Eran if (ret) 153c1395a2aSHaggai Eran return ret; 154c1395a2aSHaggai Eran 155fbeb4075SMoni Shoua if (!ret && bytes_copied) 156fbeb4075SMoni Shoua *bytes_copied = copy_length; 157c1395a2aSHaggai Eran 158fbeb4075SMoni Shoua return 0; 159fbeb4075SMoni Shoua } 160fbeb4075SMoni Shoua 161fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, 162fbeb4075SMoni Shoua int wqe_index, 163fbeb4075SMoni Shoua void *buffer, 164fbeb4075SMoni Shoua int buflen, 165fbeb4075SMoni Shoua size_t *bc) 166fbeb4075SMoni Shoua { 167fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 168fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 169fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->sq; 170fbeb4075SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 171fbeb4075SMoni Shoua size_t bytes_copied; 172fbeb4075SMoni Shoua size_t bytes_copied2; 173fbeb4075SMoni Shoua size_t wqe_length; 174fbeb4075SMoni Shoua int ret; 175fbeb4075SMoni Shoua int ds; 176fbeb4075SMoni Shoua 177fbeb4075SMoni Shoua if (buflen < sizeof(*ctrl)) 178fbeb4075SMoni Shoua return -EINVAL; 179fbeb4075SMoni Shoua 180fbeb4075SMoni Shoua /* at first read as much as possible */ 181fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 182fbeb4075SMoni Shoua buffer, 183fbeb4075SMoni Shoua buflen, 184fbeb4075SMoni Shoua wqe_index, 185fbeb4075SMoni Shoua wq->offset, 186fbeb4075SMoni Shoua wq->wqe_cnt, 187fbeb4075SMoni Shoua wq->wqe_shift, 188fbeb4075SMoni Shoua buflen, 189fbeb4075SMoni Shoua &bytes_copied); 190fbeb4075SMoni Shoua if (ret) 191fbeb4075SMoni Shoua return ret; 192fbeb4075SMoni Shoua 193fbeb4075SMoni Shoua /* we need at least control segment size to proceed */ 194fbeb4075SMoni Shoua if (bytes_copied < sizeof(*ctrl)) 195fbeb4075SMoni Shoua return -EINVAL; 196fbeb4075SMoni Shoua 197fbeb4075SMoni Shoua ctrl = buffer; 198fbeb4075SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 199c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 200fbeb4075SMoni Shoua 201fbeb4075SMoni Shoua /* if we copied enough then we are done */ 202fbeb4075SMoni Shoua if (bytes_copied >= wqe_length) { 203fbeb4075SMoni Shoua *bc = bytes_copied; 204fbeb4075SMoni Shoua return 0; 205c1395a2aSHaggai Eran } 206c1395a2aSHaggai Eran 207fbeb4075SMoni Shoua /* otherwise this a wrapped around wqe 208fbeb4075SMoni Shoua * so read the remaining bytes starting 209fbeb4075SMoni Shoua * from wqe_index 0 210fbeb4075SMoni Shoua */ 211fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 212fbeb4075SMoni Shoua buffer + bytes_copied, 213fbeb4075SMoni Shoua buflen - bytes_copied, 214fbeb4075SMoni Shoua 0, 215fbeb4075SMoni Shoua wq->offset, 216fbeb4075SMoni Shoua wq->wqe_cnt, 217fbeb4075SMoni Shoua wq->wqe_shift, 218fbeb4075SMoni Shoua wqe_length - bytes_copied, 219fbeb4075SMoni Shoua &bytes_copied2); 220c1395a2aSHaggai Eran 221c1395a2aSHaggai Eran if (ret) 222c1395a2aSHaggai Eran return ret; 223fbeb4075SMoni Shoua *bc = bytes_copied + bytes_copied2; 224fbeb4075SMoni Shoua return 0; 225fbeb4075SMoni Shoua } 226c1395a2aSHaggai Eran 227fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, 228fbeb4075SMoni Shoua int wqe_index, 229fbeb4075SMoni Shoua void *buffer, 230fbeb4075SMoni Shoua int buflen, 231fbeb4075SMoni Shoua size_t *bc) 232fbeb4075SMoni Shoua { 233fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 234fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 235fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 236fbeb4075SMoni Shoua size_t bytes_copied; 237fbeb4075SMoni Shoua int ret; 238fbeb4075SMoni Shoua 239fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 240fbeb4075SMoni Shoua buffer, 241fbeb4075SMoni Shoua buflen, 242fbeb4075SMoni Shoua wqe_index, 243fbeb4075SMoni Shoua wq->offset, 244fbeb4075SMoni Shoua wq->wqe_cnt, 245fbeb4075SMoni Shoua wq->wqe_shift, 246fbeb4075SMoni Shoua buflen, 247fbeb4075SMoni Shoua &bytes_copied); 248fbeb4075SMoni Shoua 249fbeb4075SMoni Shoua if (ret) 250fbeb4075SMoni Shoua return ret; 251fbeb4075SMoni Shoua *bc = bytes_copied; 252fbeb4075SMoni Shoua return 0; 253fbeb4075SMoni Shoua } 254fbeb4075SMoni Shoua 255fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, 256fbeb4075SMoni Shoua int wqe_index, 257fbeb4075SMoni Shoua void *buffer, 258fbeb4075SMoni Shoua int buflen, 259fbeb4075SMoni Shoua size_t *bc) 260fbeb4075SMoni Shoua { 261fbeb4075SMoni Shoua struct ib_umem *umem = srq->umem; 262fbeb4075SMoni Shoua size_t bytes_copied; 263fbeb4075SMoni Shoua int ret; 264fbeb4075SMoni Shoua 265fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 266fbeb4075SMoni Shoua buffer, 267fbeb4075SMoni Shoua buflen, 268fbeb4075SMoni Shoua wqe_index, 269fbeb4075SMoni Shoua 0, 270fbeb4075SMoni Shoua srq->msrq.max, 271fbeb4075SMoni Shoua srq->msrq.wqe_shift, 272fbeb4075SMoni Shoua buflen, 273fbeb4075SMoni Shoua &bytes_copied); 274fbeb4075SMoni Shoua 275fbeb4075SMoni Shoua if (ret) 276fbeb4075SMoni Shoua return ret; 277fbeb4075SMoni Shoua *bc = bytes_copied; 278fbeb4075SMoni Shoua return 0; 279c1395a2aSHaggai Eran } 280c1395a2aSHaggai Eran 281e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 282e126ba97SEli Cohen { 283e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 284e126ba97SEli Cohen struct ib_event event; 285e126ba97SEli Cohen 28619098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 28719098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 28819098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 28919098df2Smajd@mellanox.com } 290e126ba97SEli Cohen 291e126ba97SEli Cohen if (ibqp->event_handler) { 292e126ba97SEli Cohen event.device = ibqp->device; 293e126ba97SEli Cohen event.element.qp = ibqp; 294e126ba97SEli Cohen switch (type) { 295e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 296e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 297e126ba97SEli Cohen break; 298e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 299e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 300e126ba97SEli Cohen break; 301e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 302e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 303e126ba97SEli Cohen break; 304e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 305e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 306e126ba97SEli Cohen break; 307e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 308e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 309e126ba97SEli Cohen break; 310e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 311e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 312e126ba97SEli Cohen break; 313e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 314e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 315e126ba97SEli Cohen break; 316e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 317e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 318e126ba97SEli Cohen break; 319e126ba97SEli Cohen default: 320e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 321e126ba97SEli Cohen return; 322e126ba97SEli Cohen } 323e126ba97SEli Cohen 324e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 325e126ba97SEli Cohen } 326e126ba97SEli Cohen } 327e126ba97SEli Cohen 328e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 329e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 330e126ba97SEli Cohen { 331e126ba97SEli Cohen int wqe_size; 332e126ba97SEli Cohen int wq_size; 333e126ba97SEli Cohen 334e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 335938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 336e126ba97SEli Cohen return -EINVAL; 337e126ba97SEli Cohen 338e126ba97SEli Cohen if (!has_rq) { 339e126ba97SEli Cohen qp->rq.max_gs = 0; 340e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 341e126ba97SEli Cohen qp->rq.wqe_shift = 0; 3420540d814SNoa Osherovich cap->max_recv_wr = 0; 3430540d814SNoa Osherovich cap->max_recv_sge = 0; 344e126ba97SEli Cohen } else { 345e126ba97SEli Cohen if (ucmd) { 346e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 347002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 348002bf228SLeon Romanovsky return -EINVAL; 349e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 350002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 351002bf228SLeon Romanovsky return -EINVAL; 352e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 353e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 354e126ba97SEli Cohen } else { 355e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 356e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 357e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 358e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 359e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 360e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 361938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 362e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 363e126ba97SEli Cohen wqe_size, 364938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 365938fe83cSSaeed Mahameed max_wqe_sz_rq)); 366e126ba97SEli Cohen return -EINVAL; 367e126ba97SEli Cohen } 368e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 369e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 370e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 371e126ba97SEli Cohen } 372e126ba97SEli Cohen } 373e126ba97SEli Cohen 374e126ba97SEli Cohen return 0; 375e126ba97SEli Cohen } 376e126ba97SEli Cohen 377f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 378e126ba97SEli Cohen { 379618af384SAndi Shyti int size = 0; 380e126ba97SEli Cohen 381f0313965SErez Shitrit switch (attr->qp_type) { 382e126ba97SEli Cohen case IB_QPT_XRC_INI: 383b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 384e126ba97SEli Cohen /* fall through */ 385e126ba97SEli Cohen case IB_QPT_RC: 386e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 38775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 38875c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 38975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 390064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 391064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 392064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 393e126ba97SEli Cohen break; 394e126ba97SEli Cohen 395b125a54bSEli Cohen case IB_QPT_XRC_TGT: 396b125a54bSEli Cohen return 0; 397b125a54bSEli Cohen 398e126ba97SEli Cohen case IB_QPT_UC: 399b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 40075c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 4019e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 40275c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 403e126ba97SEli Cohen break; 404e126ba97SEli Cohen 405e126ba97SEli Cohen case IB_QPT_UD: 406f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 407f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 408f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 409f0313965SErez Shitrit /* fall through */ 410e126ba97SEli Cohen case IB_QPT_SMI: 411d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 412b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 413e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 414e126ba97SEli Cohen break; 415e126ba97SEli Cohen 416e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 417b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 418e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 419e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 420e126ba97SEli Cohen break; 421e126ba97SEli Cohen 422e126ba97SEli Cohen default: 423e126ba97SEli Cohen return -EINVAL; 424e126ba97SEli Cohen } 425e126ba97SEli Cohen 426e126ba97SEli Cohen return size; 427e126ba97SEli Cohen } 428e126ba97SEli Cohen 429e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 430e126ba97SEli Cohen { 431e126ba97SEli Cohen int inl_size = 0; 432e126ba97SEli Cohen int size; 433e126ba97SEli Cohen 434f0313965SErez Shitrit size = sq_overhead(attr); 435e126ba97SEli Cohen if (size < 0) 436e126ba97SEli Cohen return size; 437e126ba97SEli Cohen 438e126ba97SEli Cohen if (attr->cap.max_inline_data) { 439e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 440e126ba97SEli Cohen attr->cap.max_inline_data; 441e126ba97SEli Cohen } 442e126ba97SEli Cohen 443e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 444e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 445e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 446e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 447e1e66cc2SSagi Grimberg else 448e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 449e126ba97SEli Cohen } 450e126ba97SEli Cohen 451288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 452288c01b7SEli Cohen { 453288c01b7SEli Cohen int max_sge; 454288c01b7SEli Cohen 455288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 456288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 457288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 458288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 459288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 460288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 461288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 462288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 463288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 464288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 465288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 466288c01b7SEli Cohen else 467288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 468288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 469288c01b7SEli Cohen 470288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 471288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 472288c01b7SEli Cohen } 473288c01b7SEli Cohen 474e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 475e126ba97SEli Cohen struct mlx5_ib_qp *qp) 476e126ba97SEli Cohen { 477e126ba97SEli Cohen int wqe_size; 478e126ba97SEli Cohen int wq_size; 479e126ba97SEli Cohen 480e126ba97SEli Cohen if (!attr->cap.max_send_wr) 481e126ba97SEli Cohen return 0; 482e126ba97SEli Cohen 483e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 484e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 485e126ba97SEli Cohen if (wqe_size < 0) 486e126ba97SEli Cohen return wqe_size; 487e126ba97SEli Cohen 488938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 489b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 490938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 491e126ba97SEli Cohen return -EINVAL; 492e126ba97SEli Cohen } 493e126ba97SEli Cohen 494f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 495e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 496e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 497e126ba97SEli Cohen 498e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 499e1e66cc2SSagi Grimberg qp->signature_en = true; 500e1e66cc2SSagi Grimberg 501e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 502e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 503938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 5041974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 5051974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 506938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 507938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 508b125a54bSEli Cohen return -ENOMEM; 509b125a54bSEli Cohen } 510e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 511288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 512288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 513288c01b7SEli Cohen return -ENOMEM; 514288c01b7SEli Cohen 515288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 516b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 517b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 518e126ba97SEli Cohen 519e126ba97SEli Cohen return wq_size; 520e126ba97SEli Cohen } 521e126ba97SEli Cohen 522e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 523e126ba97SEli Cohen struct mlx5_ib_qp *qp, 52419098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 5250fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 5260fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 527e126ba97SEli Cohen { 528e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 529e126ba97SEli Cohen 530938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 531e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 532938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 533e126ba97SEli Cohen return -EINVAL; 534e126ba97SEli Cohen } 535e126ba97SEli Cohen 536af8b38edSGal Pressman if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) { 537af8b38edSGal Pressman mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n", 538af8b38edSGal Pressman ucmd->sq_wqe_count); 539e126ba97SEli Cohen return -EINVAL; 540e126ba97SEli Cohen } 541e126ba97SEli Cohen 542e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 543e126ba97SEli Cohen 544938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 545e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 546938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 547938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 548e126ba97SEli Cohen return -EINVAL; 549e126ba97SEli Cohen } 550e126ba97SEli Cohen 551c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 552c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 5530fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 5540fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 5550fb2ed66Smajd@mellanox.com } else { 55619098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 557e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 5580fb2ed66Smajd@mellanox.com } 559e126ba97SEli Cohen 560e126ba97SEli Cohen return 0; 561e126ba97SEli Cohen } 562e126ba97SEli Cohen 563e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 564e126ba97SEli Cohen { 565e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 566e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 567e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 568e126ba97SEli Cohen !attr->cap.max_recv_wr) 569e126ba97SEli Cohen return 0; 570e126ba97SEli Cohen 571e126ba97SEli Cohen return 1; 572e126ba97SEli Cohen } 573e126ba97SEli Cohen 5740b80c14fSEli Cohen enum { 5750b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 5760b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 5770b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 5780b80c14fSEli Cohen * "odd/even" order 5790b80c14fSEli Cohen */ 5800b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 5810b80c14fSEli Cohen }; 5820b80c14fSEli Cohen 583b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 584b037c29aSEli Cohen { 58531a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 586b037c29aSEli Cohen } 587b037c29aSEli Cohen 588b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 589b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 590c1be5232SEli Cohen { 591c1be5232SEli Cohen int n; 592c1be5232SEli Cohen 593b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 594b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 595c1be5232SEli Cohen 596c1be5232SEli Cohen return n >= 0 ? n : 0; 597c1be5232SEli Cohen } 598c1be5232SEli Cohen 59918b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 60018b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 60118b0362eSYishai Hadas { 60218b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 60318b0362eSYishai Hadas } 60418b0362eSYishai Hadas 605b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 606b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 607c1be5232SEli Cohen { 608c1be5232SEli Cohen int med; 609c1be5232SEli Cohen 610b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 611b037c29aSEli Cohen return ++med; 612c1be5232SEli Cohen } 613c1be5232SEli Cohen 614b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 615b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 616e126ba97SEli Cohen { 617e126ba97SEli Cohen int i; 618e126ba97SEli Cohen 619b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 620b037c29aSEli Cohen if (!bfregi->count[i]) { 6212f5ff264SEli Cohen bfregi->count[i]++; 622e126ba97SEli Cohen return i; 623e126ba97SEli Cohen } 624e126ba97SEli Cohen } 625e126ba97SEli Cohen 626e126ba97SEli Cohen return -ENOMEM; 627e126ba97SEli Cohen } 628e126ba97SEli Cohen 629b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 630b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 631e126ba97SEli Cohen { 63218b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 633e126ba97SEli Cohen int i; 634e126ba97SEli Cohen 63518b0362eSYishai Hadas if (minidx < 0) 63618b0362eSYishai Hadas return minidx; 63718b0362eSYishai Hadas 63818b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 6392f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 640e126ba97SEli Cohen minidx = i; 6410b80c14fSEli Cohen if (!bfregi->count[minidx]) 6420b80c14fSEli Cohen break; 643e126ba97SEli Cohen } 644e126ba97SEli Cohen 6452f5ff264SEli Cohen bfregi->count[minidx]++; 646e126ba97SEli Cohen return minidx; 647e126ba97SEli Cohen } 648e126ba97SEli Cohen 649b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 650ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 651e126ba97SEli Cohen { 652ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 653e126ba97SEli Cohen 6542f5ff264SEli Cohen mutex_lock(&bfregi->lock); 655ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 656ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 657ffaf58deSLeon Romanovsky if (bfregn < 0) 658ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 659ffaf58deSLeon Romanovsky } 660ffaf58deSLeon Romanovsky 661ffaf58deSLeon Romanovsky if (bfregn < 0) { 6620b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 6632f5ff264SEli Cohen bfregn = 0; 6642f5ff264SEli Cohen bfregi->count[bfregn]++; 665e126ba97SEli Cohen } 6662f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 667e126ba97SEli Cohen 6682f5ff264SEli Cohen return bfregn; 669e126ba97SEli Cohen } 670e126ba97SEli Cohen 6714ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 672e126ba97SEli Cohen { 6732f5ff264SEli Cohen mutex_lock(&bfregi->lock); 674b037c29aSEli Cohen bfregi->count[bfregn]--; 6752f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 676e126ba97SEli Cohen } 677e126ba97SEli Cohen 678e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 679e126ba97SEli Cohen { 680e126ba97SEli Cohen switch (state) { 681e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 682e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 683e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 684e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 685e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 686e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 687e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 688e126ba97SEli Cohen default: return -1; 689e126ba97SEli Cohen } 690e126ba97SEli Cohen } 691e126ba97SEli Cohen 692e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 693e126ba97SEli Cohen { 694e126ba97SEli Cohen switch (type) { 695e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 696e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 697e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 698e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 699e126ba97SEli Cohen case IB_QPT_XRC_INI: 700e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 701e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 702d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 703c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 704e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 705e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 7060fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 707e126ba97SEli Cohen case IB_QPT_MAX: 708e126ba97SEli Cohen default: return -EINVAL; 709e126ba97SEli Cohen } 710e126ba97SEli Cohen } 711e126ba97SEli Cohen 71289ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 71389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71489ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 71589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71689ea94a7SMaor Gottlieb 7177c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 71805f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 7191ee47ab3SYishai Hadas bool dyn_bfreg) 720e126ba97SEli Cohen { 72105f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 72205f58cebSLeon Romanovsky u32 index_of_sys_page; 72305f58cebSLeon Romanovsky u32 offset; 724b037c29aSEli Cohen 725b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 726b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 727b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 728b037c29aSEli Cohen 72905f58cebSLeon Romanovsky if (dyn_bfreg) { 73005f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 73105f58cebSLeon Romanovsky 7327c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 7337c043e90SYishai Hadas return -EINVAL; 7347c043e90SYishai Hadas 7351ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 7361ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 7371ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 7381ee47ab3SYishai Hadas return -EINVAL; 7391ee47ab3SYishai Hadas } 7401ee47ab3SYishai Hadas } 741b037c29aSEli Cohen 7421ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 743b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 744e126ba97SEli Cohen } 745e126ba97SEli Cohen 746b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata, 74719098df2Smajd@mellanox.com unsigned long addr, size_t size, 748b0ea0fa5SJason Gunthorpe struct ib_umem **umem, int *npages, int *page_shift, 749b0ea0fa5SJason Gunthorpe int *ncont, u32 *offset) 75019098df2Smajd@mellanox.com { 75119098df2Smajd@mellanox.com int err; 75219098df2Smajd@mellanox.com 753b0ea0fa5SJason Gunthorpe *umem = ib_umem_get(udata, addr, size, 0, 0); 75419098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 75519098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 75619098df2Smajd@mellanox.com return PTR_ERR(*umem); 75719098df2Smajd@mellanox.com } 75819098df2Smajd@mellanox.com 759762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 76019098df2Smajd@mellanox.com 76119098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 76219098df2Smajd@mellanox.com if (err) { 76319098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 76419098df2Smajd@mellanox.com goto err_umem; 76519098df2Smajd@mellanox.com } 76619098df2Smajd@mellanox.com 76719098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 76819098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 76919098df2Smajd@mellanox.com 77019098df2Smajd@mellanox.com return 0; 77119098df2Smajd@mellanox.com 77219098df2Smajd@mellanox.com err_umem: 77319098df2Smajd@mellanox.com ib_umem_release(*umem); 77419098df2Smajd@mellanox.com *umem = NULL; 77519098df2Smajd@mellanox.com 77619098df2Smajd@mellanox.com return err; 77719098df2Smajd@mellanox.com } 77819098df2Smajd@mellanox.com 779fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 780fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 78179b20a6cSYishai Hadas { 78279b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 78379b20a6cSYishai Hadas 784fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 785fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 786fe248c3aSMaor Gottlieb 78779b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 78879b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 78979b20a6cSYishai Hadas if (rwq->umem) 79079b20a6cSYishai Hadas ib_umem_release(rwq->umem); 79179b20a6cSYishai Hadas } 79279b20a6cSYishai Hadas 79379b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 794b0ea0fa5SJason Gunthorpe struct ib_udata *udata, struct mlx5_ib_rwq *rwq, 79579b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 79679b20a6cSYishai Hadas { 79789944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 79889944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 79979b20a6cSYishai Hadas int page_shift = 0; 80079b20a6cSYishai Hadas int npages; 80179b20a6cSYishai Hadas u32 offset = 0; 80279b20a6cSYishai Hadas int ncont = 0; 80379b20a6cSYishai Hadas int err; 80479b20a6cSYishai Hadas 80579b20a6cSYishai Hadas if (!ucmd->buf_addr) 80679b20a6cSYishai Hadas return -EINVAL; 80779b20a6cSYishai Hadas 808b0ea0fa5SJason Gunthorpe rwq->umem = ib_umem_get(udata, ucmd->buf_addr, rwq->buf_size, 0, 0); 80979b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 81079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 81179b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 81279b20a6cSYishai Hadas return err; 81379b20a6cSYishai Hadas } 81479b20a6cSYishai Hadas 815762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 81679b20a6cSYishai Hadas &ncont, NULL); 81779b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 81879b20a6cSYishai Hadas &rwq->rq_page_offset); 81979b20a6cSYishai Hadas if (err) { 82079b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 82179b20a6cSYishai Hadas goto err_umem; 82279b20a6cSYishai Hadas } 82379b20a6cSYishai Hadas 82479b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 82579b20a6cSYishai Hadas rwq->page_shift = page_shift; 82679b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 82779b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 82879b20a6cSYishai Hadas 82979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 83079b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 83179b20a6cSYishai Hadas npages, page_shift, ncont, offset); 83279b20a6cSYishai Hadas 83389944450SShamir Rabinovitch err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db); 83479b20a6cSYishai Hadas if (err) { 83579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 83679b20a6cSYishai Hadas goto err_umem; 83779b20a6cSYishai Hadas } 83879b20a6cSYishai Hadas 83979b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 84079b20a6cSYishai Hadas return 0; 84179b20a6cSYishai Hadas 84279b20a6cSYishai Hadas err_umem: 84379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 84479b20a6cSYishai Hadas return err; 84579b20a6cSYishai Hadas } 84679b20a6cSYishai Hadas 847b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 848b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 849b037c29aSEli Cohen { 850b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 851b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 852b037c29aSEli Cohen } 853b037c29aSEli Cohen 854e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 855e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 8560fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 85709a7d9ecSSaeed Mahameed u32 **in, 85819098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 85919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 860e126ba97SEli Cohen { 861e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 862e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 86319098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 8649e9c47d0SEli Cohen int page_shift = 0; 8651ee47ab3SYishai Hadas int uar_index = 0; 866e126ba97SEli Cohen int npages; 8679e9c47d0SEli Cohen u32 offset = 0; 8682f5ff264SEli Cohen int bfregn; 8699e9c47d0SEli Cohen int ncont = 0; 87009a7d9ecSSaeed Mahameed __be64 *pas; 87109a7d9ecSSaeed Mahameed void *qpc; 872e126ba97SEli Cohen int err; 8735aa3771dSYishai Hadas u16 uid; 874e126ba97SEli Cohen 875e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 876e126ba97SEli Cohen if (err) { 877e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 878e126ba97SEli Cohen return err; 879e126ba97SEli Cohen } 880e126ba97SEli Cohen 88189944450SShamir Rabinovitch context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext, 88289944450SShamir Rabinovitch ibucontext); 8831ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8841ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8851ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8861ee47ab3SYishai Hadas if (uar_index < 0) 8871ee47ab3SYishai Hadas return uar_index; 8881ee47ab3SYishai Hadas 8891ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8901ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 891e126ba97SEli Cohen /* 892e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 893e126ba97SEli Cohen */ 894051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8952f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8961ee47ab3SYishai Hadas } 897051f2630SLeon Romanovsky else { 898ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 899ffaf58deSLeon Romanovsky if (bfregn < 0) 9002f5ff264SEli Cohen return bfregn; 901e126ba97SEli Cohen } 902e126ba97SEli Cohen 9032f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 9041ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9051ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 9061ee47ab3SYishai Hadas false); 907e126ba97SEli Cohen 90848fea837SHaggai Eran qp->rq.offset = 0; 90948fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 91048fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 91148fea837SHaggai Eran 9120fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 913e126ba97SEli Cohen if (err) 9142f5ff264SEli Cohen goto err_bfreg; 915e126ba97SEli Cohen 91619098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 91719098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 918b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, 919b0ea0fa5SJason Gunthorpe ubuffer->buf_size, &ubuffer->umem, 920b0ea0fa5SJason Gunthorpe &npages, &page_shift, &ncont, &offset); 92119098df2Smajd@mellanox.com if (err) 9222f5ff264SEli Cohen goto err_bfreg; 9239e9c47d0SEli Cohen } else { 92419098df2Smajd@mellanox.com ubuffer->umem = NULL; 9259e9c47d0SEli Cohen } 926e126ba97SEli Cohen 92709a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 92809a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 9291b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 930e126ba97SEli Cohen if (!*in) { 931e126ba97SEli Cohen err = -ENOMEM; 932e126ba97SEli Cohen goto err_umem; 933e126ba97SEli Cohen } 934e126ba97SEli Cohen 9357422edceSYishai Hadas uid = (attr->qp_type != IB_QPT_XRC_TGT && 9367422edceSYishai Hadas attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 9375aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 93809a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 93909a7d9ecSSaeed Mahameed if (ubuffer->umem) 94009a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 94109a7d9ecSSaeed Mahameed 94209a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 94309a7d9ecSSaeed Mahameed 94409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 94509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 94609a7d9ecSSaeed Mahameed 94709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 9481ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 949b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 9501ee47ab3SYishai Hadas else 9511ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 9522f5ff264SEli Cohen qp->bfregn = bfregn; 953e126ba97SEli Cohen 954b0ea0fa5SJason Gunthorpe err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db); 955e126ba97SEli Cohen if (err) { 956e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 957e126ba97SEli Cohen goto err_free; 958e126ba97SEli Cohen } 959e126ba97SEli Cohen 96041d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 961e126ba97SEli Cohen if (err) { 962e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 963e126ba97SEli Cohen goto err_unmap; 964e126ba97SEli Cohen } 965e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 966e126ba97SEli Cohen 967e126ba97SEli Cohen return 0; 968e126ba97SEli Cohen 969e126ba97SEli Cohen err_unmap: 970e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 971e126ba97SEli Cohen 972e126ba97SEli Cohen err_free: 973479163f4SAl Viro kvfree(*in); 974e126ba97SEli Cohen 975e126ba97SEli Cohen err_umem: 97619098df2Smajd@mellanox.com if (ubuffer->umem) 97719098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 978e126ba97SEli Cohen 9792f5ff264SEli Cohen err_bfreg: 9801ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9814ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 982e126ba97SEli Cohen return err; 983e126ba97SEli Cohen } 984e126ba97SEli Cohen 985b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 986b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 987e126ba97SEli Cohen { 988e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 989e126ba97SEli Cohen 990e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 991e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 99219098df2Smajd@mellanox.com if (base->ubuffer.umem) 99319098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9941ee47ab3SYishai Hadas 9951ee47ab3SYishai Hadas /* 9961ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9971ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9981ee47ab3SYishai Hadas */ 9991ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 10004ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 1001e126ba97SEli Cohen } 1002e126ba97SEli Cohen 100334f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 100434f4c955SGuy Levi * 100534f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 100634f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 100734f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 100834f4c955SGuy Levi * simply should check if it gets to an edge. 100934f4c955SGuy Levi * 101034f4c955SGuy Levi * @sq - SQ buffer. 101134f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 101234f4c955SGuy Levi * 101334f4c955SGuy Levi * Return: 101434f4c955SGuy Levi * The new edge. 101534f4c955SGuy Levi */ 101634f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 101734f4c955SGuy Levi { 101834f4c955SGuy Levi void *fragment_end; 101934f4c955SGuy Levi 102034f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 102134f4c955SGuy Levi (&sq->fbc, 102234f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 102334f4c955SGuy Levi 102434f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 102534f4c955SGuy Levi } 102634f4c955SGuy Levi 1027e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 1028e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1029e126ba97SEli Cohen struct mlx5_ib_qp *qp, 103009a7d9ecSSaeed Mahameed u32 **in, int *inlen, 103119098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 1032e126ba97SEli Cohen { 1033e126ba97SEli Cohen int uar_index; 103409a7d9ecSSaeed Mahameed void *qpc; 1035e126ba97SEli Cohen int err; 1036e126ba97SEli Cohen 1037f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 1038f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 1039b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 104093d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 1041b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 10421a4c3a3dSEli Cohen return -EINVAL; 1043e126ba97SEli Cohen 1044e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 10455fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 10465fe9dec0SEli Cohen else 10475fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 1048e126ba97SEli Cohen 1049d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 1050d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 1051d8030b0dSEli Cohen */ 1052d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 10535fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 1054e126ba97SEli Cohen 1055e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 1056e126ba97SEli Cohen if (err < 0) { 1057e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10585fe9dec0SEli Cohen return err; 1059e126ba97SEli Cohen } 1060e126ba97SEli Cohen 1061e126ba97SEli Cohen qp->rq.offset = 0; 1062e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 106319098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 1064e126ba97SEli Cohen 106534f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 106634f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 1067e126ba97SEli Cohen if (err) { 1068e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10695fe9dec0SEli Cohen return err; 1070e126ba97SEli Cohen } 1071e126ba97SEli Cohen 107234f4c955SGuy Levi if (qp->rq.wqe_cnt) 107334f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 107434f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 107534f4c955SGuy Levi 107634f4c955SGuy Levi if (qp->sq.wqe_cnt) { 107734f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 107834f4c955SGuy Levi MLX5_SEND_WQE_BB; 107934f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 108034f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 108134f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 108234f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 108334f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 108434f4c955SGuy Levi 108534f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 108634f4c955SGuy Levi } 108734f4c955SGuy Levi 108809a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 108909a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 10901b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 1091e126ba97SEli Cohen if (!*in) { 1092e126ba97SEli Cohen err = -ENOMEM; 1093e126ba97SEli Cohen goto err_buf; 1094e126ba97SEli Cohen } 109509a7d9ecSSaeed Mahameed 109609a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 109709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 109809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 109909a7d9ecSSaeed Mahameed 1100e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 110109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 110209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1103e126ba97SEli Cohen 1104b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 110509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1106b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1107b11a4f9cSHaggai Eran } 1108b11a4f9cSHaggai Eran 110934f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 111034f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 111134f4c955SGuy Levi *in, pas)); 1112e126ba97SEli Cohen 11139603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1114e126ba97SEli Cohen if (err) { 1115e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1116e126ba97SEli Cohen goto err_free; 1117e126ba97SEli Cohen } 1118e126ba97SEli Cohen 1119b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1120b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1121b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1122b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1123b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1124b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1125b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1126b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1127b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1128b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1129e126ba97SEli Cohen 1130e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1131e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1132e126ba97SEli Cohen err = -ENOMEM; 1133e126ba97SEli Cohen goto err_wrid; 1134e126ba97SEli Cohen } 1135e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1136e126ba97SEli Cohen 1137e126ba97SEli Cohen return 0; 1138e126ba97SEli Cohen 1139e126ba97SEli Cohen err_wrid: 1140b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1141b5883008SLi Dongyang kvfree(qp->sq.w_list); 1142b5883008SLi Dongyang kvfree(qp->sq.wrid); 1143b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1144b5883008SLi Dongyang kvfree(qp->rq.wrid); 1145f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1146e126ba97SEli Cohen 1147e126ba97SEli Cohen err_free: 1148479163f4SAl Viro kvfree(*in); 1149e126ba97SEli Cohen 1150e126ba97SEli Cohen err_buf: 115134f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1152e126ba97SEli Cohen return err; 1153e126ba97SEli Cohen } 1154e126ba97SEli Cohen 1155e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1156e126ba97SEli Cohen { 1157b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1158b5883008SLi Dongyang kvfree(qp->sq.w_list); 1159b5883008SLi Dongyang kvfree(qp->sq.wrid); 1160b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1161b5883008SLi Dongyang kvfree(qp->rq.wrid); 1162f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 116334f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1164e126ba97SEli Cohen } 1165e126ba97SEli Cohen 116609a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1167e126ba97SEli Cohen { 1168e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1169c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1170e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 117109a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1172e126ba97SEli Cohen else if (!qp->has_rq) 117309a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1174e126ba97SEli Cohen else 117509a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1176e126ba97SEli Cohen } 1177e126ba97SEli Cohen 1178e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1179e126ba97SEli Cohen { 11805d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 11815d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1182e126ba97SEli Cohen return 1; 1183e126ba97SEli Cohen 1184e126ba97SEli Cohen return 0; 1185e126ba97SEli Cohen } 1186e126ba97SEli Cohen 11870fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1188c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 11891cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 11901cd6dbd3SYishai Hadas struct ib_pd *pd) 11910fb2ed66Smajd@mellanox.com { 1192c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 11930fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 11940fb2ed66Smajd@mellanox.com 11951cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 11960fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1197c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1198c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1199c2e53b2cSYishai Hadas 12000fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 12010fb2ed66Smajd@mellanox.com } 12020fb2ed66Smajd@mellanox.com 12030fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 12041cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 12050fb2ed66Smajd@mellanox.com { 12061cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 12070fb2ed66Smajd@mellanox.com } 12080fb2ed66Smajd@mellanox.com 1209b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1210b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1211b96c9ddeSMark Bloch { 1212b96c9ddeSMark Bloch if (sq->flow_rule) 1213b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1214b96c9ddeSMark Bloch } 1215b96c9ddeSMark Bloch 12160fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 1217b0ea0fa5SJason Gunthorpe struct ib_udata *udata, 12180fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 12190fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12200fb2ed66Smajd@mellanox.com { 12210fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 12220fb2ed66Smajd@mellanox.com __be64 *pas; 12230fb2ed66Smajd@mellanox.com void *in; 12240fb2ed66Smajd@mellanox.com void *sqc; 12250fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12260fb2ed66Smajd@mellanox.com void *wq; 12270fb2ed66Smajd@mellanox.com int inlen; 12280fb2ed66Smajd@mellanox.com int err; 12290fb2ed66Smajd@mellanox.com int page_shift = 0; 12300fb2ed66Smajd@mellanox.com int npages; 12310fb2ed66Smajd@mellanox.com int ncont = 0; 12320fb2ed66Smajd@mellanox.com u32 offset = 0; 12330fb2ed66Smajd@mellanox.com 1234b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size, 1235b0ea0fa5SJason Gunthorpe &sq->ubuffer.umem, &npages, &page_shift, &ncont, 1236b0ea0fa5SJason Gunthorpe &offset); 12370fb2ed66Smajd@mellanox.com if (err) 12380fb2ed66Smajd@mellanox.com return err; 12390fb2ed66Smajd@mellanox.com 12400fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 12411b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12420fb2ed66Smajd@mellanox.com if (!in) { 12430fb2ed66Smajd@mellanox.com err = -ENOMEM; 12440fb2ed66Smajd@mellanox.com goto err_umem; 12450fb2ed66Smajd@mellanox.com } 12460fb2ed66Smajd@mellanox.com 1247c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 12480fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 12490fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1250795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1251795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 12520fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 12530fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12540fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 12550fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 12560fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 125796dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 125896dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 125996dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 12600fb2ed66Smajd@mellanox.com 12610fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 12620fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 12630fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 12650fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12660fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 12670fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 12680fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 12690fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 12700fb2ed66Smajd@mellanox.com 12710fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12720fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 12730fb2ed66Smajd@mellanox.com 12740fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 12750fb2ed66Smajd@mellanox.com 12760fb2ed66Smajd@mellanox.com kvfree(in); 12770fb2ed66Smajd@mellanox.com 12780fb2ed66Smajd@mellanox.com if (err) 12790fb2ed66Smajd@mellanox.com goto err_umem; 12800fb2ed66Smajd@mellanox.com 1281b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1282b96c9ddeSMark Bloch if (err) 1283b96c9ddeSMark Bloch goto err_flow; 1284b96c9ddeSMark Bloch 12850fb2ed66Smajd@mellanox.com return 0; 12860fb2ed66Smajd@mellanox.com 1287b96c9ddeSMark Bloch err_flow: 1288b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1289b96c9ddeSMark Bloch 12900fb2ed66Smajd@mellanox.com err_umem: 12910fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 12920fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 12930fb2ed66Smajd@mellanox.com 12940fb2ed66Smajd@mellanox.com return err; 12950fb2ed66Smajd@mellanox.com } 12960fb2ed66Smajd@mellanox.com 12970fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 12980fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 12990fb2ed66Smajd@mellanox.com { 1300b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 13010fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 13020fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13030fb2ed66Smajd@mellanox.com } 13040fb2ed66Smajd@mellanox.com 13052c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 13060fb2ed66Smajd@mellanox.com { 13070fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 13080fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 13090fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 13100fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 13110fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 13120fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 13130fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 13140fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 13150fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 13160fb2ed66Smajd@mellanox.com 13170fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 13180fb2ed66Smajd@mellanox.com } 13190fb2ed66Smajd@mellanox.com 13200fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13212c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 132234d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 13230fb2ed66Smajd@mellanox.com { 1324358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 13250fb2ed66Smajd@mellanox.com __be64 *pas; 13260fb2ed66Smajd@mellanox.com __be64 *qp_pas; 13270fb2ed66Smajd@mellanox.com void *in; 13280fb2ed66Smajd@mellanox.com void *rqc; 13290fb2ed66Smajd@mellanox.com void *wq; 13300fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 13312c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 13322c292dbbSBoris Pismenny size_t inlen; 13330fb2ed66Smajd@mellanox.com int err; 13342c292dbbSBoris Pismenny 13352c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 13362c292dbbSBoris Pismenny return -EINVAL; 13370fb2ed66Smajd@mellanox.com 13380fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 13391b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13400fb2ed66Smajd@mellanox.com if (!in) 13410fb2ed66Smajd@mellanox.com return -ENOMEM; 13420fb2ed66Smajd@mellanox.com 134334d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 13440fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1345e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 13460fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 13470fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 13480fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 13490fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 13500fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 13510fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 13520fb2ed66Smajd@mellanox.com 1353358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1354358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1355358e42eaSMajd Dibbiny 13560fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 13570fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1358b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1359b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 13600fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 13610fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13620fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13630fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 13640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 13650fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 13660fb2ed66Smajd@mellanox.com 13670fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 13680fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 13690fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 13700fb2ed66Smajd@mellanox.com 13710fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 13720fb2ed66Smajd@mellanox.com 13730fb2ed66Smajd@mellanox.com kvfree(in); 13740fb2ed66Smajd@mellanox.com 13750fb2ed66Smajd@mellanox.com return err; 13760fb2ed66Smajd@mellanox.com } 13770fb2ed66Smajd@mellanox.com 13780fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13790fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13800fb2ed66Smajd@mellanox.com { 13810fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 13820fb2ed66Smajd@mellanox.com } 13830fb2ed66Smajd@mellanox.com 1384f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1385f95ef6cbSMaor Gottlieb { 1386f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1387f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1388f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1389f95ef6cbSMaor Gottlieb } 1390f95ef6cbSMaor Gottlieb 13910042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13920042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1393443c1cf9SYishai Hadas u32 qp_flags_en, 1394443c1cf9SYishai Hadas struct ib_pd *pd) 13950042f9e4SMark Bloch { 13960042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 13970042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 13980042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1399443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 14000042f9e4SMark Bloch } 14010042f9e4SMark Bloch 14020fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1403f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1404443c1cf9SYishai Hadas u32 *qp_flags_en, 1405443c1cf9SYishai Hadas struct ib_pd *pd) 14060fb2ed66Smajd@mellanox.com { 1407175edba8SMark Bloch u8 lb_flag = 0; 14080fb2ed66Smajd@mellanox.com u32 *in; 14090fb2ed66Smajd@mellanox.com void *tirc; 14100fb2ed66Smajd@mellanox.com int inlen; 14110fb2ed66Smajd@mellanox.com int err; 14120fb2ed66Smajd@mellanox.com 14130fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14141b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 14150fb2ed66Smajd@mellanox.com if (!in) 14160fb2ed66Smajd@mellanox.com return -ENOMEM; 14170fb2ed66Smajd@mellanox.com 1418443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 14190fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 14200fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 14210fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 14220fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1423175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1424f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 14250fb2ed66Smajd@mellanox.com 1426175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1427175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1428175edba8SMark Bloch 1429175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1430175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1431175edba8SMark Bloch 1432175edba8SMark Bloch if (dev->rep) { 1433175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1434175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1435175edba8SMark Bloch } 1436175edba8SMark Bloch 1437175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1438ec9c2fb8SMark Bloch 14390fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 14400fb2ed66Smajd@mellanox.com 14410042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 14420042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 14430042f9e4SMark Bloch 14440042f9e4SMark Bloch if (err) 1445443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 14460042f9e4SMark Bloch } 14470fb2ed66Smajd@mellanox.com kvfree(in); 14480fb2ed66Smajd@mellanox.com 14490fb2ed66Smajd@mellanox.com return err; 14500fb2ed66Smajd@mellanox.com } 14510fb2ed66Smajd@mellanox.com 14520fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 14532c292dbbSBoris Pismenny u32 *in, size_t inlen, 14547f72052cSYishai Hadas struct ib_pd *pd, 14557f72052cSYishai Hadas struct ib_udata *udata, 14567f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 14570fb2ed66Smajd@mellanox.com { 14580fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14590fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14600fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 146189944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 146289944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 14630fb2ed66Smajd@mellanox.com int err; 14640fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 14657f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 14660fb2ed66Smajd@mellanox.com 14670fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14681cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 14690fb2ed66Smajd@mellanox.com if (err) 14700fb2ed66Smajd@mellanox.com return err; 14710fb2ed66Smajd@mellanox.com 1472b0ea0fa5SJason Gunthorpe err = create_raw_packet_qp_sq(dev, udata, sq, in, pd); 14730fb2ed66Smajd@mellanox.com if (err) 14740fb2ed66Smajd@mellanox.com goto err_destroy_tis; 14750fb2ed66Smajd@mellanox.com 14767f72052cSYishai Hadas if (uid) { 14777f72052cSYishai Hadas resp->tisn = sq->tisn; 14787f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 14797f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 14807f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 14817f72052cSYishai Hadas } 14827f72052cSYishai Hadas 14830fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 14841d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 14850fb2ed66Smajd@mellanox.com } 14860fb2ed66Smajd@mellanox.com 14870fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1488358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1489358e42eaSMajd Dibbiny 1490e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1491e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1492b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1493b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 149434d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 14950fb2ed66Smajd@mellanox.com if (err) 14960fb2ed66Smajd@mellanox.com goto err_destroy_sq; 14970fb2ed66Smajd@mellanox.com 1498443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 14990fb2ed66Smajd@mellanox.com if (err) 15000fb2ed66Smajd@mellanox.com goto err_destroy_rq; 15017f72052cSYishai Hadas 15027f72052cSYishai Hadas if (uid) { 15037f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 15047f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 15057f72052cSYishai Hadas resp->tirn = rq->tirn; 15067f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 15077f72052cSYishai Hadas } 15080fb2ed66Smajd@mellanox.com } 15090fb2ed66Smajd@mellanox.com 15100fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 15110fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 15127f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 15137f72052cSYishai Hadas if (err) 15147f72052cSYishai Hadas goto err_destroy_tir; 15150fb2ed66Smajd@mellanox.com 15160fb2ed66Smajd@mellanox.com return 0; 15170fb2ed66Smajd@mellanox.com 15187f72052cSYishai Hadas err_destroy_tir: 15197f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 15200fb2ed66Smajd@mellanox.com err_destroy_rq: 15210fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15220fb2ed66Smajd@mellanox.com err_destroy_sq: 15230fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 15240fb2ed66Smajd@mellanox.com return err; 15250fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15260fb2ed66Smajd@mellanox.com err_destroy_tis: 15271cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 15280fb2ed66Smajd@mellanox.com 15290fb2ed66Smajd@mellanox.com return err; 15300fb2ed66Smajd@mellanox.com } 15310fb2ed66Smajd@mellanox.com 15320fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 15330fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 15340fb2ed66Smajd@mellanox.com { 15350fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 15360fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15370fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15380fb2ed66Smajd@mellanox.com 15390fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1540443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 15410fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15420fb2ed66Smajd@mellanox.com } 15430fb2ed66Smajd@mellanox.com 15440fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 15450fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15461cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 15470fb2ed66Smajd@mellanox.com } 15480fb2ed66Smajd@mellanox.com } 15490fb2ed66Smajd@mellanox.com 15500fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 15510fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 15520fb2ed66Smajd@mellanox.com { 15530fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15540fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15550fb2ed66Smajd@mellanox.com 15560fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 15570fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 15580fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 15590fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 15600fb2ed66Smajd@mellanox.com } 15610fb2ed66Smajd@mellanox.com 156228d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 156328d61370SYishai Hadas { 15640042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 15650042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 15660042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1567443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1568443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 156928d61370SYishai Hadas } 157028d61370SYishai Hadas 157128d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 157228d61370SYishai Hadas struct ib_pd *pd, 157328d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 157428d61370SYishai Hadas struct ib_udata *udata) 157528d61370SYishai Hadas { 157689944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 157789944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 157828d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 157928d61370SYishai Hadas int inlen; 158028d61370SYishai Hadas int err; 158128d61370SYishai Hadas u32 *in; 158228d61370SYishai Hadas void *tirc; 158328d61370SYishai Hadas void *hfso; 158428d61370SYishai Hadas u32 selected_fields = 0; 15852d93fc85SMatan Barak u32 outer_l4; 158628d61370SYishai Hadas size_t min_resp_len; 158728d61370SYishai Hadas u32 tdn = mucontext->tdn; 158828d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 158928d61370SYishai Hadas size_t required_cmd_sz; 1590175edba8SMark Bloch u8 lb_flag = 0; 159128d61370SYishai Hadas 159228d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 159328d61370SYishai Hadas return -EOPNOTSUPP; 159428d61370SYishai Hadas 159528d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 159628d61370SYishai Hadas return -EINVAL; 159728d61370SYishai Hadas 15982f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 159928d61370SYishai Hadas if (udata->outlen < min_resp_len) 160028d61370SYishai Hadas return -EINVAL; 160128d61370SYishai Hadas 1602f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 160328d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 160428d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 160528d61370SYishai Hadas return -EINVAL; 160628d61370SYishai Hadas } 160728d61370SYishai Hadas 160828d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 160928d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 161028d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 161128d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 161228d61370SYishai Hadas return -EOPNOTSUPP; 161328d61370SYishai Hadas } 161428d61370SYishai Hadas 161528d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 161628d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 161728d61370SYishai Hadas return -EFAULT; 161828d61370SYishai Hadas } 161928d61370SYishai Hadas 162028d61370SYishai Hadas if (ucmd.comp_mask) { 162128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 162228d61370SYishai Hadas return -EOPNOTSUPP; 162328d61370SYishai Hadas } 162428d61370SYishai Hadas 1625175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1626175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1627175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1628f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1629f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1630f95ef6cbSMaor Gottlieb } 1631f95ef6cbSMaor Gottlieb 1632f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1633f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1634f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 163528d61370SYishai Hadas return -EOPNOTSUPP; 163628d61370SYishai Hadas } 163728d61370SYishai Hadas 1638309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1639309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1640309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1641309fa347SMaor Gottlieb return -EOPNOTSUPP; 1642309fa347SMaor Gottlieb } 1643309fa347SMaor Gottlieb 1644175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1645175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1646175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1647175edba8SMark Bloch } 1648175edba8SMark Bloch 1649175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1650175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1651175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1652175edba8SMark Bloch } 1653175edba8SMark Bloch 165441d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 165528d61370SYishai Hadas if (err) { 165628d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 165728d61370SYishai Hadas return -EINVAL; 165828d61370SYishai Hadas } 165928d61370SYishai Hadas 166028d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 16611b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 166228d61370SYishai Hadas if (!in) 166328d61370SYishai Hadas return -ENOMEM; 166428d61370SYishai Hadas 1665443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 166628d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 166728d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 166828d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 166928d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 167028d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 167128d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 167228d61370SYishai Hadas 167328d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1674f95ef6cbSMaor Gottlieb 1675f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1676f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1677f95ef6cbSMaor Gottlieb 1678175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1679175edba8SMark Bloch 1680309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1681309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1682309fa347SMaor Gottlieb else 1683309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1684309fa347SMaor Gottlieb 168528d61370SYishai Hadas switch (ucmd.rx_hash_function) { 168628d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 168728d61370SYishai Hadas { 168828d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 168928d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 169028d61370SYishai Hadas 169128d61370SYishai Hadas if (len != ucmd.rx_key_len) { 169228d61370SYishai Hadas err = -EINVAL; 169328d61370SYishai Hadas goto err; 169428d61370SYishai Hadas } 169528d61370SYishai Hadas 169628d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 169728d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 169828d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 169928d61370SYishai Hadas break; 170028d61370SYishai Hadas } 170128d61370SYishai Hadas default: 170228d61370SYishai Hadas err = -EOPNOTSUPP; 170328d61370SYishai Hadas goto err; 170428d61370SYishai Hadas } 170528d61370SYishai Hadas 170628d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 170728d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 170828d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 170928d61370SYishai Hadas goto create_tir; 171028d61370SYishai Hadas err = -EINVAL; 171128d61370SYishai Hadas goto err; 171228d61370SYishai Hadas } 171328d61370SYishai Hadas 171428d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 171528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 171628d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 171728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 171828d61370SYishai Hadas err = -EINVAL; 171928d61370SYishai Hadas goto err; 172028d61370SYishai Hadas } 172128d61370SYishai Hadas 172228d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 172328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 172428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 172528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 172628d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 172728d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 172828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 172928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 173028d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 173128d61370SYishai Hadas 17322d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17332d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 173428d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 17352d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 17362d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 17372d93fc85SMatan Barak 17382d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 17392d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 174028d61370SYishai Hadas err = -EINVAL; 174128d61370SYishai Hadas goto err; 174228d61370SYishai Hadas } 174328d61370SYishai Hadas 174428d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 174528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 174628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 174728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 174828d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 174928d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 175028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 175128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 175228d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 175328d61370SYishai Hadas 175428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 175528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 175628d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 175728d61370SYishai Hadas 175828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 175928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 176028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 176128d61370SYishai Hadas 176228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 176328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 176428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 176528d61370SYishai Hadas 176628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 176728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 176828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 176928d61370SYishai Hadas 17702d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 17712d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 17722d93fc85SMatan Barak 177328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 177428d61370SYishai Hadas 177528d61370SYishai Hadas create_tir: 177628d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 177728d61370SYishai Hadas 17780042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 17790042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 17800042f9e4SMark Bloch 17810042f9e4SMark Bloch if (err) 1782443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1783443c1cf9SYishai Hadas to_mpd(pd)->uid); 17840042f9e4SMark Bloch } 17850042f9e4SMark Bloch 178628d61370SYishai Hadas if (err) 178728d61370SYishai Hadas goto err; 178828d61370SYishai Hadas 17897f72052cSYishai Hadas if (mucontext->devx_uid) { 17907f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 17917f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 17927f72052cSYishai Hadas } 17937f72052cSYishai Hadas 17947f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 17957f72052cSYishai Hadas if (err) 17967f72052cSYishai Hadas goto err_copy; 17977f72052cSYishai Hadas 179828d61370SYishai Hadas kvfree(in); 179928d61370SYishai Hadas /* qpn is reserved for that QP */ 180028d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1801d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 180228d61370SYishai Hadas return 0; 180328d61370SYishai Hadas 18047f72052cSYishai Hadas err_copy: 18057f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 180628d61370SYishai Hadas err: 180728d61370SYishai Hadas kvfree(in); 180828d61370SYishai Hadas return err; 180928d61370SYishai Hadas } 181028d61370SYishai Hadas 18115d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 18125d6ff1baSYonatan Cohen void *qpc) 18135d6ff1baSYonatan Cohen { 18145d6ff1baSYonatan Cohen int rcqe_sz; 18155d6ff1baSYonatan Cohen 18165d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 18175d6ff1baSYonatan Cohen return; 18185d6ff1baSYonatan Cohen 18195d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 18205d6ff1baSYonatan Cohen 18215d6ff1baSYonatan Cohen if (rcqe_sz == 128) { 18225d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 18235d6ff1baSYonatan Cohen return; 18245d6ff1baSYonatan Cohen } 18255d6ff1baSYonatan Cohen 18265d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCT) 18275d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 18285d6ff1baSYonatan Cohen } 18295d6ff1baSYonatan Cohen 18305d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 18315d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 18326f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 18335d6ff1baSYonatan Cohen void *qpc) 18345d6ff1baSYonatan Cohen { 18355d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 18365d6ff1baSYonatan Cohen int scqe_sz; 18376f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 18385d6ff1baSYonatan Cohen 18395d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 18405d6ff1baSYonatan Cohen return; 18415d6ff1baSYonatan Cohen 18426f4bc0eaSYonatan Cohen if (ucmd) 18436f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 18446f4bc0eaSYonatan Cohen 18456f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 18465d6ff1baSYonatan Cohen return; 18475d6ff1baSYonatan Cohen 18485d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 18495d6ff1baSYonatan Cohen if (scqe_sz == 128) { 18505d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 18515d6ff1baSYonatan Cohen return; 18525d6ff1baSYonatan Cohen } 18535d6ff1baSYonatan Cohen 18545d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 18555d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 18565d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 18575d6ff1baSYonatan Cohen } 18585d6ff1baSYonatan Cohen 1859a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1860a60109dcSYonatan Cohen { 1861a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1862a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1863a60109dcSYonatan Cohen */ 1864a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1865a60109dcSYonatan Cohen int log_max_size; 1866a60109dcSYonatan Cohen 1867a60109dcSYonatan Cohen if (!supported_size_mask) 1868a60109dcSYonatan Cohen return -EOPNOTSUPP; 1869a60109dcSYonatan Cohen 1870a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1871a60109dcSYonatan Cohen 1872a60109dcSYonatan Cohen if (log_max_size > 3) 1873a60109dcSYonatan Cohen return log_max_size; 1874a60109dcSYonatan Cohen 1875a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1876a60109dcSYonatan Cohen } 1877a60109dcSYonatan Cohen 1878a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1879a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1880a60109dcSYonatan Cohen { 1881a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1882a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1883a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1884a60109dcSYonatan Cohen int atomic_size_mask; 1885a60109dcSYonatan Cohen 1886a60109dcSYonatan Cohen if (!atomic) 1887a60109dcSYonatan Cohen return -EOPNOTSUPP; 1888a60109dcSYonatan Cohen 1889a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1890a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1891a60109dcSYonatan Cohen else 1892a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1893a60109dcSYonatan Cohen 1894a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1895a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1896a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1897a60109dcSYonatan Cohen 1898a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1899a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1900a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1901a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1902a60109dcSYonatan Cohen 1903a60109dcSYonatan Cohen return atomic_mode; 1904a60109dcSYonatan Cohen } 1905a60109dcSYonatan Cohen 19062e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 19072e43bb31SYonatan Cohen { 19082e43bb31SYonatan Cohen return (input & ~supported) == 0; 19092e43bb31SYonatan Cohen } 19102e43bb31SYonatan Cohen 1911e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1912e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1913e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1914e126ba97SEli Cohen { 1915e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 191609a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1917938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 19180625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 191989944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 192089944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 192189ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 192289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 192389ea94a7SMaor Gottlieb unsigned long flags; 1924cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 192509a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 192609a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1927e7b169f3SNoa Osherovich int mlx5_st; 1928cfb5e088SHaggai Abramovsky void *qpc; 192909a7d9ecSSaeed Mahameed u32 *in; 193009a7d9ecSSaeed Mahameed int err; 1931e126ba97SEli Cohen 1932e126ba97SEli Cohen mutex_init(&qp->mutex); 1933e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1934e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1935e126ba97SEli Cohen 1936e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1937e7b169f3SNoa Osherovich if (mlx5_st < 0) 1938e7b169f3SNoa Osherovich return -EINVAL; 1939e7b169f3SNoa Osherovich 194028d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 194128d61370SYishai Hadas if (!udata) 194228d61370SYishai Hadas return -ENOSYS; 194328d61370SYishai Hadas 194428d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 194528d61370SYishai Hadas return err; 194628d61370SYishai Hadas } 194728d61370SYishai Hadas 1948f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1949938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1950f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1951f360d88aSEli Cohen return -EINVAL; 1952f360d88aSEli Cohen } else { 1953f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1954f360d88aSEli Cohen } 1955f360d88aSEli Cohen } 1956f360d88aSEli Cohen 1957051f2630SLeon Romanovsky if (init_attr->create_flags & 1958051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1959051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1960051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1961051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1962051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1963051f2630SLeon Romanovsky return -EINVAL; 1964051f2630SLeon Romanovsky } 1965051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1966051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1967051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1968051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1969051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1970051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1971051f2630SLeon Romanovsky } 1972f0313965SErez Shitrit 1973f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1974f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1975f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1976f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1977f0313965SErez Shitrit return -EOPNOTSUPP; 1978f0313965SErez Shitrit } 1979f0313965SErez Shitrit 1980358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1981358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1982358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1983358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1984358e42eaSMajd Dibbiny } 1985358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1986358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1987358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1988358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1989358e42eaSMajd Dibbiny } 1990358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1991358e42eaSMajd Dibbiny } 1992358e42eaSMajd Dibbiny 1993e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1994e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1995e126ba97SEli Cohen 1996e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1997e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1998e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1999e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 2000e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 2001e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 2002e4cc4fa7SNoa Osherovich } 2003e4cc4fa7SNoa Osherovich 2004e00b64f7SShamir Rabinovitch if (udata) { 2005e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 2006e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 2007e126ba97SEli Cohen return -EFAULT; 2008e126ba97SEli Cohen } 2009e126ba97SEli Cohen 20102e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 2011569c6651SDanit Goldberg MLX5_QP_FLAG_ALLOW_SCATTER_CQE | 20128af526e0SMark Bloch MLX5_QP_FLAG_BFREG_INDEX | 20138af526e0SMark Bloch MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE | 20148af526e0SMark Bloch MLX5_QP_FLAG_SCATTER_CQE | 20158af526e0SMark Bloch MLX5_QP_FLAG_SIGNATURE | 20168af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC | 20178af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 20188af526e0SMark Bloch MLX5_QP_FLAG_TUNNEL_OFFLOADS | 20198af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCI | 20208af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCT)) 20212e43bb31SYonatan Cohen return -EINVAL; 20222e43bb31SYonatan Cohen 202389944450SShamir Rabinovitch err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx); 2024cfb5e088SHaggai Abramovsky if (err) 2025cfb5e088SHaggai Abramovsky return err; 2026cfb5e088SHaggai Abramovsky 2027e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 20285d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 2029e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 2030f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 2031f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 2032f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 2033f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 2034f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 2035f95ef6cbSMaor Gottlieb } 2036175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 2037175edba8SMark Bloch } 2038175edba8SMark Bloch 2039175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 2040175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2041175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 2042175edba8SMark Bloch return -EOPNOTSUPP; 2043175edba8SMark Bloch } 2044175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 2045175edba8SMark Bloch } 2046175edba8SMark Bloch 2047175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 2048175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2049175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 2050175edba8SMark Bloch return -EOPNOTSUPP; 2051175edba8SMark Bloch } 2052175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 2053f95ef6cbSMaor Gottlieb } 2054c2e53b2cSYishai Hadas 2055569c6651SDanit Goldberg if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) { 2056569c6651SDanit Goldberg if (init_attr->qp_type != IB_QPT_RC || 2057569c6651SDanit Goldberg !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { 2058569c6651SDanit Goldberg mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n"); 2059569c6651SDanit Goldberg return -EOPNOTSUPP; 2060569c6651SDanit Goldberg } 2061569c6651SDanit Goldberg qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT; 2062569c6651SDanit Goldberg } 2063569c6651SDanit Goldberg 2064c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 2065c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 2066c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 2067c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 2068c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 2069c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 2070c2e53b2cSYishai Hadas return -EOPNOTSUPP; 2071c2e53b2cSYishai Hadas } 2072c2e53b2cSYishai Hadas 2073c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 2074c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 2075c2e53b2cSYishai Hadas } 2076e126ba97SEli Cohen } else { 2077e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 2078e126ba97SEli Cohen } 2079e126ba97SEli Cohen 2080c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 2081c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 2082c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 2083c2e53b2cSYishai Hadas &qp->trans_qp.base; 2084c2e53b2cSYishai Hadas 2085e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 2086e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 2087e00b64f7SShamir Rabinovitch qp, udata ? &ucmd : NULL); 2088e126ba97SEli Cohen if (err) { 2089e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2090e126ba97SEli Cohen return err; 2091e126ba97SEli Cohen } 2092e126ba97SEli Cohen 2093e126ba97SEli Cohen if (pd) { 2094e00b64f7SShamir Rabinovitch if (udata) { 2095938fe83cSSaeed Mahameed __u32 max_wqes = 2096938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 2097e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 2098e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 2099e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 2100e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 2101e126ba97SEli Cohen return -EINVAL; 2102e126ba97SEli Cohen } 2103938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 2104e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 2105938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 2106e126ba97SEli Cohen return -EINVAL; 2107e126ba97SEli Cohen } 2108b11a4f9cSHaggai Eran if (init_attr->create_flags & 2109b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 2110b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 2111b11a4f9cSHaggai Eran return -EINVAL; 2112b11a4f9cSHaggai Eran } 21130fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 21140fb2ed66Smajd@mellanox.com &resp, &inlen, base); 2115e126ba97SEli Cohen if (err) 2116e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2117e126ba97SEli Cohen } else { 211819098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 211919098df2Smajd@mellanox.com base); 2120e126ba97SEli Cohen if (err) 2121e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2122e126ba97SEli Cohen } 2123e126ba97SEli Cohen 2124e126ba97SEli Cohen if (err) 2125e126ba97SEli Cohen return err; 2126e126ba97SEli Cohen } else { 21271b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2128e126ba97SEli Cohen if (!in) 2129e126ba97SEli Cohen return -ENOMEM; 2130e126ba97SEli Cohen 2131e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 2132e126ba97SEli Cohen } 2133e126ba97SEli Cohen 2134e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2135e126ba97SEli Cohen qp->port = init_attr->port_num; 2136e126ba97SEli Cohen 213709a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 213809a7d9ecSSaeed Mahameed 2139e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 214009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2141e126ba97SEli Cohen 2142e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 214309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2144e126ba97SEli Cohen else 214509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 214609a7d9ecSSaeed Mahameed 2147e126ba97SEli Cohen 2148e126ba97SEli Cohen if (qp->wq_sig) 214909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2150e126ba97SEli Cohen 2151f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 215209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2153f360d88aSEli Cohen 2154051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 215509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2156051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 215709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2158051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 215909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2160569c6651SDanit Goldberg if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT) 2161569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 2162e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 21635d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 21646f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 2165e00b64f7SShamir Rabinovitch udata ? &ucmd : NULL, 21666f4bc0eaSYonatan Cohen qpc); 2167e126ba97SEli Cohen } 2168e126ba97SEli Cohen 2169e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 217009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 217109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2172e126ba97SEli Cohen } 2173e126ba97SEli Cohen 217409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2175e126ba97SEli Cohen 21763fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 217709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 21783fd3307eSArtemy Kovalyov } else { 217909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 21803fd3307eSArtemy Kovalyov if (init_attr->srq && 21813fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 21823fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 21833fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 21843fd3307eSArtemy Kovalyov } 2185e126ba97SEli Cohen 2186e126ba97SEli Cohen /* Set default resources */ 2187e126ba97SEli Cohen switch (init_attr->qp_type) { 2188e126ba97SEli Cohen case IB_QPT_XRC_TGT: 218909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 219009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 219109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 219209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2193e126ba97SEli Cohen break; 2194e126ba97SEli Cohen case IB_QPT_XRC_INI: 219509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 219609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 219709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2198e126ba97SEli Cohen break; 2199e126ba97SEli Cohen default: 2200e126ba97SEli Cohen if (init_attr->srq) { 220109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 220209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2203e126ba97SEli Cohen } else { 220409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 220509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2206e126ba97SEli Cohen } 2207e126ba97SEli Cohen } 2208e126ba97SEli Cohen 2209e126ba97SEli Cohen if (init_attr->send_cq) 221009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2211e126ba97SEli Cohen 2212e126ba97SEli Cohen if (init_attr->recv_cq) 221309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2214e126ba97SEli Cohen 221509a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2216e126ba97SEli Cohen 2217cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 221809a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2219cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 222009a7d9ecSSaeed Mahameed 2221f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2222f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2223f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2224f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2225f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2226f0313965SErez Shitrit } 2227cfb5e088SHaggai Abramovsky 2228b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2229b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2230b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2231b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2232b1383aa6SNoa Osherovich goto err; 2233b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2234b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2235b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2236b1383aa6SNoa Osherovich } else { 2237b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2238b1383aa6SNoa Osherovich } 2239b1383aa6SNoa Osherovich } 2240b1383aa6SNoa Osherovich 22412c292dbbSBoris Pismenny if (inlen < 0) { 22422c292dbbSBoris Pismenny err = -EINVAL; 22432c292dbbSBoris Pismenny goto err; 22442c292dbbSBoris Pismenny } 22452c292dbbSBoris Pismenny 2246c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2247c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 22480fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 22490fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 22507f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 22517f72052cSYishai Hadas &resp); 22520fb2ed66Smajd@mellanox.com } else { 225319098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 22540fb2ed66Smajd@mellanox.com } 22550fb2ed66Smajd@mellanox.com 2256e126ba97SEli Cohen if (err) { 2257e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2258e126ba97SEli Cohen goto err_create; 2259e126ba97SEli Cohen } 2260e126ba97SEli Cohen 2261479163f4SAl Viro kvfree(in); 2262e126ba97SEli Cohen 226319098df2Smajd@mellanox.com base->container_mibqp = qp; 226419098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2265e126ba97SEli Cohen 226689ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 226789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 226889ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 226989ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 227089ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 227189ea94a7SMaor Gottlieb * flow 227289ea94a7SMaor Gottlieb */ 227389ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 227489ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 227589ea94a7SMaor Gottlieb */ 227689ea94a7SMaor Gottlieb if (send_cq) 227789ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 227889ea94a7SMaor Gottlieb if (recv_cq) 227989ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 228089ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 228189ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 228289ea94a7SMaor Gottlieb 2283e126ba97SEli Cohen return 0; 2284e126ba97SEli Cohen 2285e126ba97SEli Cohen err_create: 2286e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2287b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 2288e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2289e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2290e126ba97SEli Cohen 2291b1383aa6SNoa Osherovich err: 2292479163f4SAl Viro kvfree(in); 2293e126ba97SEli Cohen return err; 2294e126ba97SEli Cohen } 2295e126ba97SEli Cohen 2296e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2297e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2298e126ba97SEli Cohen { 2299e126ba97SEli Cohen if (send_cq) { 2300e126ba97SEli Cohen if (recv_cq) { 2301e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 230289ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2303e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2304e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2305e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 230689ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2307e126ba97SEli Cohen __acquire(&recv_cq->lock); 2308e126ba97SEli Cohen } else { 230989ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2310e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2311e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2312e126ba97SEli Cohen } 2313e126ba97SEli Cohen } else { 231489ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 23156a4f139aSEli Cohen __acquire(&recv_cq->lock); 2316e126ba97SEli Cohen } 2317e126ba97SEli Cohen } else if (recv_cq) { 231889ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 23196a4f139aSEli Cohen __acquire(&send_cq->lock); 23206a4f139aSEli Cohen } else { 23216a4f139aSEli Cohen __acquire(&send_cq->lock); 23226a4f139aSEli Cohen __acquire(&recv_cq->lock); 2323e126ba97SEli Cohen } 2324e126ba97SEli Cohen } 2325e126ba97SEli Cohen 2326e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2327e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2328e126ba97SEli Cohen { 2329e126ba97SEli Cohen if (send_cq) { 2330e126ba97SEli Cohen if (recv_cq) { 2331e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2332e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 233389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2334e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2335e126ba97SEli Cohen __release(&recv_cq->lock); 233689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2337e126ba97SEli Cohen } else { 2338e126ba97SEli Cohen spin_unlock(&send_cq->lock); 233989ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2340e126ba97SEli Cohen } 2341e126ba97SEli Cohen } else { 23426a4f139aSEli Cohen __release(&recv_cq->lock); 234389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2344e126ba97SEli Cohen } 2345e126ba97SEli Cohen } else if (recv_cq) { 23466a4f139aSEli Cohen __release(&send_cq->lock); 234789ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 23486a4f139aSEli Cohen } else { 23496a4f139aSEli Cohen __release(&recv_cq->lock); 23506a4f139aSEli Cohen __release(&send_cq->lock); 2351e126ba97SEli Cohen } 2352e126ba97SEli Cohen } 2353e126ba97SEli Cohen 2354e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2355e126ba97SEli Cohen { 2356e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2357e126ba97SEli Cohen } 2358e126ba97SEli Cohen 235989ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 236089ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2361e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2362e126ba97SEli Cohen { 236389ea94a7SMaor Gottlieb switch (qp_type) { 2364e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2365e126ba97SEli Cohen *send_cq = NULL; 2366e126ba97SEli Cohen *recv_cq = NULL; 2367e126ba97SEli Cohen break; 2368e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2369e126ba97SEli Cohen case IB_QPT_XRC_INI: 237089ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2371e126ba97SEli Cohen *recv_cq = NULL; 2372e126ba97SEli Cohen break; 2373e126ba97SEli Cohen 2374e126ba97SEli Cohen case IB_QPT_SMI: 2375d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2376e126ba97SEli Cohen case IB_QPT_RC: 2377e126ba97SEli Cohen case IB_QPT_UC: 2378e126ba97SEli Cohen case IB_QPT_UD: 2379e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2380e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 23810fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 238289ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 238389ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2384e126ba97SEli Cohen break; 2385e126ba97SEli Cohen 2386e126ba97SEli Cohen case IB_QPT_MAX: 2387e126ba97SEli Cohen default: 2388e126ba97SEli Cohen *send_cq = NULL; 2389e126ba97SEli Cohen *recv_cq = NULL; 2390e126ba97SEli Cohen break; 2391e126ba97SEli Cohen } 2392e126ba97SEli Cohen } 2393e126ba97SEli Cohen 2394ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 239513eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 239613eab21fSAviv Heller u8 lag_tx_affinity); 2397ad5f8e96Smajd@mellanox.com 2398e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2399e126ba97SEli Cohen { 2400e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2401c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 240289ea94a7SMaor Gottlieb unsigned long flags; 2403e126ba97SEli Cohen int err; 2404e126ba97SEli Cohen 240528d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 240628d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 240728d61370SYishai Hadas return; 240828d61370SYishai Hadas } 240928d61370SYishai Hadas 2410c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2411c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 24120fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 24130fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 24140fb2ed66Smajd@mellanox.com 24156aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2416c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2417c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2418ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 24191a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 24201a412fb1SSaeed Mahameed NULL, &base->mqp); 2421ad5f8e96Smajd@mellanox.com } else { 24220680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 24230680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 24240680efa2SAlex Vesker }; 24250680efa2SAlex Vesker 242613eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2427ad5f8e96Smajd@mellanox.com } 2428ad5f8e96Smajd@mellanox.com if (err) 2429427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 243019098df2Smajd@mellanox.com base->mqp.qpn); 24316aec21f6SHaggai Eran } 2432e126ba97SEli Cohen 243389ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 243489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 243589ea94a7SMaor Gottlieb 243689ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 243789ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 243889ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 243989ea94a7SMaor Gottlieb list_del(&qp->qps_list); 244089ea94a7SMaor Gottlieb if (send_cq) 244189ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 244289ea94a7SMaor Gottlieb 244389ea94a7SMaor Gottlieb if (recv_cq) 244489ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2445e126ba97SEli Cohen 2446e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 244719098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2448e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2449e126ba97SEli Cohen if (send_cq != recv_cq) 245019098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 245119098df2Smajd@mellanox.com NULL); 2452e126ba97SEli Cohen } 245389ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 245489ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2455e126ba97SEli Cohen 2456c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2457c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 24580fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 24590fb2ed66Smajd@mellanox.com } else { 246019098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2461e126ba97SEli Cohen if (err) 24620fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 24630fb2ed66Smajd@mellanox.com base->mqp.qpn); 24640fb2ed66Smajd@mellanox.com } 2465e126ba97SEli Cohen 2466e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2467e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2468e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2469b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2470e126ba97SEli Cohen } 2471e126ba97SEli Cohen 2472e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2473e126ba97SEli Cohen { 2474e126ba97SEli Cohen switch (type) { 2475e126ba97SEli Cohen case IB_QPT_SMI: 2476e126ba97SEli Cohen return "IB_QPT_SMI"; 2477e126ba97SEli Cohen case IB_QPT_GSI: 2478e126ba97SEli Cohen return "IB_QPT_GSI"; 2479e126ba97SEli Cohen case IB_QPT_RC: 2480e126ba97SEli Cohen return "IB_QPT_RC"; 2481e126ba97SEli Cohen case IB_QPT_UC: 2482e126ba97SEli Cohen return "IB_QPT_UC"; 2483e126ba97SEli Cohen case IB_QPT_UD: 2484e126ba97SEli Cohen return "IB_QPT_UD"; 2485e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2486e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2487e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2488e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2489e126ba97SEli Cohen case IB_QPT_XRC_INI: 2490e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2491e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2492e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2493e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2494e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2495e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2496e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2497b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2498b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2499e126ba97SEli Cohen case IB_QPT_MAX: 2500e126ba97SEli Cohen default: 2501e126ba97SEli Cohen return "Invalid QP type"; 2502e126ba97SEli Cohen } 2503e126ba97SEli Cohen } 2504e126ba97SEli Cohen 2505b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2506b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 250789944450SShamir Rabinovitch struct mlx5_ib_create_qp *ucmd, 250889944450SShamir Rabinovitch struct ib_udata *udata) 2509b4aaa1f0SMoni Shoua { 251089944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 251189944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2512b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2513b4aaa1f0SMoni Shoua int err = 0; 2514b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2515b4aaa1f0SMoni Shoua void *dctc; 2516b4aaa1f0SMoni Shoua 2517b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2518b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2519b4aaa1f0SMoni Shoua 252089944450SShamir Rabinovitch err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx); 2521b4aaa1f0SMoni Shoua if (err) 2522b4aaa1f0SMoni Shoua return ERR_PTR(err); 2523b4aaa1f0SMoni Shoua 2524b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2525b4aaa1f0SMoni Shoua if (!qp) 2526b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2527b4aaa1f0SMoni Shoua 2528b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2529b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2530b4aaa1f0SMoni Shoua err = -ENOMEM; 2531b4aaa1f0SMoni Shoua goto err_free; 2532b4aaa1f0SMoni Shoua } 2533b4aaa1f0SMoni Shoua 2534a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2535b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2536776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2537b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2538b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2539b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2540b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2541b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2542b4aaa1f0SMoni Shoua 25435d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 25445d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 25455d6ff1baSYonatan Cohen 2546b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2547b4aaa1f0SMoni Shoua 2548b4aaa1f0SMoni Shoua return &qp->ibqp; 2549b4aaa1f0SMoni Shoua err_free: 2550b4aaa1f0SMoni Shoua kfree(qp); 2551b4aaa1f0SMoni Shoua return ERR_PTR(err); 2552b4aaa1f0SMoni Shoua } 2553b4aaa1f0SMoni Shoua 2554b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2555e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2556b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2557b4aaa1f0SMoni Shoua struct ib_udata *udata) 2558b4aaa1f0SMoni Shoua { 2559b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2560b4aaa1f0SMoni Shoua int err; 2561b4aaa1f0SMoni Shoua 2562b4aaa1f0SMoni Shoua if (!udata) 2563b4aaa1f0SMoni Shoua return -EINVAL; 2564b4aaa1f0SMoni Shoua 2565b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2566b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2567b4aaa1f0SMoni Shoua return -EINVAL; 2568b4aaa1f0SMoni Shoua } 2569b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2570b4aaa1f0SMoni Shoua if (err) 2571b4aaa1f0SMoni Shoua return err; 2572b4aaa1f0SMoni Shoua 2573b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2574b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2575b4aaa1f0SMoni Shoua } else { 2576b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2577b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2578b4aaa1f0SMoni Shoua } else { 2579b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2580b4aaa1f0SMoni Shoua return -EINVAL; 2581b4aaa1f0SMoni Shoua } 2582b4aaa1f0SMoni Shoua } 2583b4aaa1f0SMoni Shoua 2584b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2585b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2586b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2587b4aaa1f0SMoni Shoua } 2588b4aaa1f0SMoni Shoua 2589b4aaa1f0SMoni Shoua return 0; 2590b4aaa1f0SMoni Shoua } 2591b4aaa1f0SMoni Shoua 2592b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2593b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2594e126ba97SEli Cohen struct ib_udata *udata) 2595e126ba97SEli Cohen { 2596e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2597e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2598e126ba97SEli Cohen u16 xrcdn = 0; 2599e126ba97SEli Cohen int err; 2600b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2601b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 260289944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 260389944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2604e126ba97SEli Cohen 2605e126ba97SEli Cohen if (pd) { 2606e126ba97SEli Cohen dev = to_mdev(pd->device); 26070fb2ed66Smajd@mellanox.com 26080fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 260989944450SShamir Rabinovitch if (!ucontext) { 26100fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 26110fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 261289944450SShamir Rabinovitch } else if (!ucontext->cqe_version) { 26130fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 26140fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 26150fb2ed66Smajd@mellanox.com } 26160fb2ed66Smajd@mellanox.com } 261709f16cf5SMajd Dibbiny } else { 261809f16cf5SMajd Dibbiny /* being cautious here */ 261909f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 262009f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 262109f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 262209f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 262309f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 262409f16cf5SMajd Dibbiny } 262509f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2626e126ba97SEli Cohen } 2627e126ba97SEli Cohen 2628b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2629b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2630b4aaa1f0SMoni Shoua 2631b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2632b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2633b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2634b4aaa1f0SMoni Shoua if (err) 2635b4aaa1f0SMoni Shoua return ERR_PTR(err); 2636c32a4f29SMoni Shoua 2637c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2638c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2639c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2640c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2641c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2642c32a4f29SMoni Shoua } 2643776a3906SMoni Shoua } else { 264489944450SShamir Rabinovitch return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata); 2645c32a4f29SMoni Shoua } 2646b4aaa1f0SMoni Shoua } 2647b4aaa1f0SMoni Shoua 2648e126ba97SEli Cohen switch (init_attr->qp_type) { 2649e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2650e126ba97SEli Cohen case IB_QPT_XRC_INI: 2651938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2652e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2653e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2654e126ba97SEli Cohen } 2655e126ba97SEli Cohen init_attr->recv_cq = NULL; 2656e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2657e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2658e126ba97SEli Cohen init_attr->send_cq = NULL; 2659e126ba97SEli Cohen } 2660e126ba97SEli Cohen 2661e126ba97SEli Cohen /* fall through */ 26620fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2663e126ba97SEli Cohen case IB_QPT_RC: 2664e126ba97SEli Cohen case IB_QPT_UC: 2665e126ba97SEli Cohen case IB_QPT_UD: 2666e126ba97SEli Cohen case IB_QPT_SMI: 2667d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2668e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2669c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2670e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2671e126ba97SEli Cohen if (!qp) 2672e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2673e126ba97SEli Cohen 2674e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2675e126ba97SEli Cohen if (err) { 2676e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2677e126ba97SEli Cohen kfree(qp); 2678e126ba97SEli Cohen return ERR_PTR(err); 2679e126ba97SEli Cohen } 2680e126ba97SEli Cohen 2681e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2682e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2683e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2684e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2685e126ba97SEli Cohen else 268619098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2687e126ba97SEli Cohen 2688e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 268919098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2690a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2691a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2692e126ba97SEli Cohen 269319098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2694e126ba97SEli Cohen 2695e126ba97SEli Cohen break; 2696e126ba97SEli Cohen 2697d16e91daSHaggai Eran case IB_QPT_GSI: 2698d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2699d16e91daSHaggai Eran 2700e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2701e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2702e126ba97SEli Cohen case IB_QPT_MAX: 2703e126ba97SEli Cohen default: 2704e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2705e126ba97SEli Cohen init_attr->qp_type); 2706e126ba97SEli Cohen /* Don't support raw QPs */ 2707e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2708e126ba97SEli Cohen } 2709e126ba97SEli Cohen 2710b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2711b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2712b4aaa1f0SMoni Shoua 2713e126ba97SEli Cohen return &qp->ibqp; 2714e126ba97SEli Cohen } 2715e126ba97SEli Cohen 2716776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2717776a3906SMoni Shoua { 2718776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2719776a3906SMoni Shoua 2720776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2721776a3906SMoni Shoua int err; 2722776a3906SMoni Shoua 2723776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2724776a3906SMoni Shoua if (err) { 2725776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2726776a3906SMoni Shoua return err; 2727776a3906SMoni Shoua } 2728776a3906SMoni Shoua } 2729776a3906SMoni Shoua 2730776a3906SMoni Shoua kfree(mqp->dct.in); 2731776a3906SMoni Shoua kfree(mqp); 2732776a3906SMoni Shoua return 0; 2733776a3906SMoni Shoua } 2734776a3906SMoni Shoua 2735e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2736e126ba97SEli Cohen { 2737e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2738e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2739e126ba97SEli Cohen 2740d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2741d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2742d16e91daSHaggai Eran 2743776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2744776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2745776a3906SMoni Shoua 2746e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2747e126ba97SEli Cohen 2748e126ba97SEli Cohen kfree(mqp); 2749e126ba97SEli Cohen 2750e126ba97SEli Cohen return 0; 2751e126ba97SEli Cohen } 2752e126ba97SEli Cohen 2753a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2754a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2755bf3b4f06SBart Van Assche int attr_mask, __be32 *hw_access_flags_be) 2756e126ba97SEli Cohen { 2757e126ba97SEli Cohen u8 dest_rd_atomic; 2758bf3b4f06SBart Van Assche u32 access_flags, hw_access_flags = 0; 2759e126ba97SEli Cohen 2760a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2761a60109dcSYonatan Cohen 2762e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2763e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2764e126ba97SEli Cohen else 276519098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2766e126ba97SEli Cohen 2767e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2768e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2769e126ba97SEli Cohen else 277019098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2771e126ba97SEli Cohen 2772e126ba97SEli Cohen if (!dest_rd_atomic) 2773e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2774e126ba97SEli Cohen 2775e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2776bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RRE; 277713f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 2778a60109dcSYonatan Cohen int atomic_mode; 2779e126ba97SEli Cohen 2780a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2781a60109dcSYonatan Cohen if (atomic_mode < 0) 2782a60109dcSYonatan Cohen return -EOPNOTSUPP; 2783a60109dcSYonatan Cohen 2784bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RAE; 2785bf3b4f06SBart Van Assche hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2786a60109dcSYonatan Cohen } 2787a60109dcSYonatan Cohen 2788a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2789bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RWE; 2790a60109dcSYonatan Cohen 2791bf3b4f06SBart Van Assche *hw_access_flags_be = cpu_to_be32(hw_access_flags); 2792a60109dcSYonatan Cohen 2793a60109dcSYonatan Cohen return 0; 2794e126ba97SEli Cohen } 2795e126ba97SEli Cohen 2796e126ba97SEli Cohen enum { 2797e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2798e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2799e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2800e126ba97SEli Cohen }; 2801e126ba97SEli Cohen 2802e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2803e126ba97SEli Cohen { 28044f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2805e126ba97SEli Cohen return 0; 28064f32ac2eSDanit Goldberg 2807a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 2808e126ba97SEli Cohen return -EINVAL; 28094f32ac2eSDanit Goldberg 28104f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2811e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2812938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2813e126ba97SEli Cohen --rate; 2814e126ba97SEli Cohen 28154f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2816e126ba97SEli Cohen } 2817e126ba97SEli Cohen 281875850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 28191cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 28201cd6dbd3SYishai Hadas struct ib_pd *pd) 282175850d0bSmajd@mellanox.com { 282275850d0bSmajd@mellanox.com void *in; 282375850d0bSmajd@mellanox.com void *tisc; 282475850d0bSmajd@mellanox.com int inlen; 282575850d0bSmajd@mellanox.com int err; 282675850d0bSmajd@mellanox.com 282775850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28281b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 282975850d0bSmajd@mellanox.com if (!in) 283075850d0bSmajd@mellanox.com return -ENOMEM; 283175850d0bSmajd@mellanox.com 283275850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 28331cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 283475850d0bSmajd@mellanox.com 283575850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 283675850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 283775850d0bSmajd@mellanox.com 283875850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 283975850d0bSmajd@mellanox.com 284075850d0bSmajd@mellanox.com kvfree(in); 284175850d0bSmajd@mellanox.com 284275850d0bSmajd@mellanox.com return err; 284375850d0bSmajd@mellanox.com } 284475850d0bSmajd@mellanox.com 284513eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 28461cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 28471cd6dbd3SYishai Hadas struct ib_pd *pd) 284813eab21fSAviv Heller { 284913eab21fSAviv Heller void *in; 285013eab21fSAviv Heller void *tisc; 285113eab21fSAviv Heller int inlen; 285213eab21fSAviv Heller int err; 285313eab21fSAviv Heller 285413eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28551b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 285613eab21fSAviv Heller if (!in) 285713eab21fSAviv Heller return -ENOMEM; 285813eab21fSAviv Heller 285913eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 28601cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 286113eab21fSAviv Heller 286213eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 286313eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 286413eab21fSAviv Heller 286513eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 286613eab21fSAviv Heller 286713eab21fSAviv Heller kvfree(in); 286813eab21fSAviv Heller 286913eab21fSAviv Heller return err; 287013eab21fSAviv Heller } 287113eab21fSAviv Heller 287275850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 287390898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2874e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2875f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2876f879ee8dSAchiad Shochat bool alt) 2877e126ba97SEli Cohen { 2878d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2879e126ba97SEli Cohen int err; 2880ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2881d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2882d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2883e126ba97SEli Cohen 2884e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2885f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2886f879ee8dSAchiad Shochat attr->pkey_index); 2887e126ba97SEli Cohen 2888d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2889d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2890938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2891f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2892d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2893938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2894f83b4263SEli Cohen return -EINVAL; 2895f83b4263SEli Cohen } 28962811ba51SAchiad Shochat } 289744c58487SDasaratharaman Chandramouli 289844c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2899d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 29002811ba51SAchiad Shochat return -EINVAL; 290147ec3866SParav Pandit 290244c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 29032b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 29042b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 29052b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 29062b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 290747ec3866SParav Pandit path->udp_sport = 290847ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2909d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 291047ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2911ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2912d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 29132811ba51SAchiad Shochat } else { 2914d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2915d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2916d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2917d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2918d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2919d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2920e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2921d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 29222811ba51SAchiad Shochat } 29232811ba51SAchiad Shochat 2924d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2925d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2926d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2927e126ba97SEli Cohen path->tclass_flowlabel = 2928d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2929d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2930d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2931e126ba97SEli Cohen } 2932e126ba97SEli Cohen 2933d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2934e126ba97SEli Cohen if (err < 0) 2935e126ba97SEli Cohen return err; 2936e126ba97SEli Cohen path->static_rate = err; 2937e126ba97SEli Cohen path->port = port; 2938e126ba97SEli Cohen 2939e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2940f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2941e126ba97SEli Cohen 294275850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 294375850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 294475850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 29451cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 294675850d0bSmajd@mellanox.com 2947e126ba97SEli Cohen return 0; 2948e126ba97SEli Cohen } 2949e126ba97SEli Cohen 2950e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2951e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2952e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2953e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2954e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2955e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2956e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2957e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2958e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2959e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2960e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2961e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2962e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2963e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2964e126ba97SEli Cohen }, 2965e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2966e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2967e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2968e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2969e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2970e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2971e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2972e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2973e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2974e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2975e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2976e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2977e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2978a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2979a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2980a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2981a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2982a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2983e126ba97SEli Cohen }, 2984e126ba97SEli Cohen }, 2985e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2986e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2987e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2988e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2989e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2990e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2991e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2992e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2993e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2994e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2995e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2996e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2997e126ba97SEli Cohen }, 2998e126ba97SEli Cohen }, 2999e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3000e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3001e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3002e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3003e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3004e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 3005c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3006c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3007e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3008c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3009c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3010e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 3011e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 3012e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 3013e126ba97SEli Cohen }, 3014e126ba97SEli Cohen }, 3015e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 3016e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3017e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3018e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 301975959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 3020a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 3021a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3022a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3023a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 3024e126ba97SEli Cohen }, 3025e126ba97SEli Cohen }, 3026e126ba97SEli Cohen }; 3027e126ba97SEli Cohen 3028e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 3029e126ba97SEli Cohen { 3030e126ba97SEli Cohen switch (ib_mask) { 3031e126ba97SEli Cohen case IB_QP_STATE: 3032e126ba97SEli Cohen return 0; 3033e126ba97SEli Cohen case IB_QP_CUR_STATE: 3034e126ba97SEli Cohen return 0; 3035e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 3036e126ba97SEli Cohen return 0; 3037e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 3038e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 3039e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 3040e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 3041e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 3042e126ba97SEli Cohen case IB_QP_PORT: 3043e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 3044e126ba97SEli Cohen case IB_QP_QKEY: 3045e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 3046e126ba97SEli Cohen case IB_QP_AV: 3047e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 3048e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 3049e126ba97SEli Cohen case IB_QP_PATH_MTU: 3050e126ba97SEli Cohen return 0; 3051e126ba97SEli Cohen case IB_QP_TIMEOUT: 3052e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 3053e126ba97SEli Cohen case IB_QP_RETRY_CNT: 3054e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 3055e126ba97SEli Cohen case IB_QP_RNR_RETRY: 3056e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 3057e126ba97SEli Cohen case IB_QP_RQ_PSN: 3058e126ba97SEli Cohen return 0; 3059e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 3060e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 3061e126ba97SEli Cohen case IB_QP_ALT_PATH: 3062e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 3063e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 3064e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 3065e126ba97SEli Cohen case IB_QP_SQ_PSN: 3066e126ba97SEli Cohen return 0; 3067e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 3068e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 3069e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 3070e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 3071e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 3072e126ba97SEli Cohen case IB_QP_CAP: 3073e126ba97SEli Cohen return 0; 3074e126ba97SEli Cohen case IB_QP_DEST_QPN: 3075e126ba97SEli Cohen return 0; 3076e126ba97SEli Cohen } 3077e126ba97SEli Cohen return 0; 3078e126ba97SEli Cohen } 3079e126ba97SEli Cohen 3080e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 3081e126ba97SEli Cohen { 3082e126ba97SEli Cohen int result = 0; 3083e126ba97SEli Cohen int i; 3084e126ba97SEli Cohen 3085e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 3086e126ba97SEli Cohen if ((1 << i) & ib_mask) 3087e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 3088e126ba97SEli Cohen } 3089e126ba97SEli Cohen 3090e126ba97SEli Cohen return result; 3091e126ba97SEli Cohen } 3092e126ba97SEli Cohen 309334d57585SYishai Hadas static int modify_raw_packet_qp_rq( 309434d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 309534d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3096ad5f8e96Smajd@mellanox.com { 3097ad5f8e96Smajd@mellanox.com void *in; 3098ad5f8e96Smajd@mellanox.com void *rqc; 3099ad5f8e96Smajd@mellanox.com int inlen; 3100ad5f8e96Smajd@mellanox.com int err; 3101ad5f8e96Smajd@mellanox.com 3102ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 31031b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3104ad5f8e96Smajd@mellanox.com if (!in) 3105ad5f8e96Smajd@mellanox.com return -ENOMEM; 3106ad5f8e96Smajd@mellanox.com 3107ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 310834d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3109ad5f8e96Smajd@mellanox.com 3110ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3111ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3112ad5f8e96Smajd@mellanox.com 3113eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3114eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3115eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 311623a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3117eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3118eb49ab0cSAlex Vesker } else 31195a738b5dSJason Gunthorpe dev_info_once( 31205a738b5dSJason Gunthorpe &dev->ib_dev.dev, 31215a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3122eb49ab0cSAlex Vesker } 3123eb49ab0cSAlex Vesker 3124eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 3125ad5f8e96Smajd@mellanox.com if (err) 3126ad5f8e96Smajd@mellanox.com goto out; 3127ad5f8e96Smajd@mellanox.com 3128ad5f8e96Smajd@mellanox.com rq->state = new_state; 3129ad5f8e96Smajd@mellanox.com 3130ad5f8e96Smajd@mellanox.com out: 3131ad5f8e96Smajd@mellanox.com kvfree(in); 3132ad5f8e96Smajd@mellanox.com return err; 3133ad5f8e96Smajd@mellanox.com } 3134ad5f8e96Smajd@mellanox.com 3135c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3136c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3137c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3138ad5f8e96Smajd@mellanox.com { 31397d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 314061147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 314161147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 314261147f39SBodong Wang bool new_rate_added = false; 31437d29f349SBodong Wang u16 rl_index = 0; 3144ad5f8e96Smajd@mellanox.com void *in; 3145ad5f8e96Smajd@mellanox.com void *sqc; 3146ad5f8e96Smajd@mellanox.com int inlen; 3147ad5f8e96Smajd@mellanox.com int err; 3148ad5f8e96Smajd@mellanox.com 3149ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 31501b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3151ad5f8e96Smajd@mellanox.com if (!in) 3152ad5f8e96Smajd@mellanox.com return -ENOMEM; 3153ad5f8e96Smajd@mellanox.com 3154c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3155ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3156ad5f8e96Smajd@mellanox.com 3157ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3158ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3159ad5f8e96Smajd@mellanox.com 31607d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 31617d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 31627d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 31637d29f349SBodong Wang __func__); 31647d29f349SBodong Wang else 316561147f39SBodong Wang new_rl = raw_qp_param->rl; 31667d29f349SBodong Wang } 3167ad5f8e96Smajd@mellanox.com 316861147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 316961147f39SBodong Wang if (new_rl.rate) { 317061147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 31717d29f349SBodong Wang if (err) { 317261147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 317361147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 317461147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 317561147f39SBodong Wang new_rl.typical_pkt_sz); 317661147f39SBodong Wang 31777d29f349SBodong Wang goto out; 31787d29f349SBodong Wang } 317961147f39SBodong Wang new_rate_added = true; 31807d29f349SBodong Wang } 31817d29f349SBodong Wang 31827d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 318361147f39SBodong Wang /* index 0 means no limit */ 31847d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 31857d29f349SBodong Wang } 31867d29f349SBodong Wang 31877d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 31887d29f349SBodong Wang if (err) { 31897d29f349SBodong Wang /* Remove new rate from table if failed */ 319061147f39SBodong Wang if (new_rate_added) 319161147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 31927d29f349SBodong Wang goto out; 31937d29f349SBodong Wang } 31947d29f349SBodong Wang 31957d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 319661147f39SBodong Wang if ((old_rl.rate && 319761147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 31987d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 319961147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 32007d29f349SBodong Wang 320161147f39SBodong Wang ibqp->rl = new_rl; 3202ad5f8e96Smajd@mellanox.com sq->state = new_state; 3203ad5f8e96Smajd@mellanox.com 3204ad5f8e96Smajd@mellanox.com out: 3205ad5f8e96Smajd@mellanox.com kvfree(in); 3206ad5f8e96Smajd@mellanox.com return err; 3207ad5f8e96Smajd@mellanox.com } 3208ad5f8e96Smajd@mellanox.com 3209ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 321013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 321113eab21fSAviv Heller u8 tx_affinity) 3212ad5f8e96Smajd@mellanox.com { 3213ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3214ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3215ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 32167d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 32177d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3218ad5f8e96Smajd@mellanox.com int rq_state; 3219ad5f8e96Smajd@mellanox.com int sq_state; 3220ad5f8e96Smajd@mellanox.com int err; 3221ad5f8e96Smajd@mellanox.com 32220680efa2SAlex Vesker switch (raw_qp_param->operation) { 3223ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3224ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3225ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3226ad5f8e96Smajd@mellanox.com break; 3227ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3228ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3229ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3230ad5f8e96Smajd@mellanox.com break; 3231ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3232ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3233ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3234ad5f8e96Smajd@mellanox.com break; 3235ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3236ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 32377d29f349SBodong Wang if (raw_qp_param->set_mask == 32387d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 32397d29f349SBodong Wang modify_rq = 0; 32407d29f349SBodong Wang sq_state = sq->state; 32417d29f349SBodong Wang } else { 32427d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 32437d29f349SBodong Wang } 32447d29f349SBodong Wang break; 32457d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 32467d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3247eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3248eb49ab0cSAlex Vesker return -EINVAL; 3249eb49ab0cSAlex Vesker else 3250ad5f8e96Smajd@mellanox.com return 0; 3251ad5f8e96Smajd@mellanox.com default: 3252ad5f8e96Smajd@mellanox.com WARN_ON(1); 3253ad5f8e96Smajd@mellanox.com return -EINVAL; 3254ad5f8e96Smajd@mellanox.com } 3255ad5f8e96Smajd@mellanox.com 32567d29f349SBodong Wang if (modify_rq) { 325734d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 325834d57585SYishai Hadas qp->ibqp.pd); 3259ad5f8e96Smajd@mellanox.com if (err) 3260ad5f8e96Smajd@mellanox.com return err; 3261ad5f8e96Smajd@mellanox.com } 3262ad5f8e96Smajd@mellanox.com 32637d29f349SBodong Wang if (modify_sq) { 326413eab21fSAviv Heller if (tx_affinity) { 326513eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 32661cd6dbd3SYishai Hadas tx_affinity, 32671cd6dbd3SYishai Hadas qp->ibqp.pd); 326813eab21fSAviv Heller if (err) 326913eab21fSAviv Heller return err; 327013eab21fSAviv Heller } 327113eab21fSAviv Heller 3272c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3273c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 327413eab21fSAviv Heller } 3275ad5f8e96Smajd@mellanox.com 3276ad5f8e96Smajd@mellanox.com return 0; 3277ad5f8e96Smajd@mellanox.com } 3278ad5f8e96Smajd@mellanox.com 3279c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3280c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3281c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 328289944450SShamir Rabinovitch u8 port_num, struct ib_udata *udata) 3283c6a21c38SMajd Dibbiny { 328489944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 328589944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 3286c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3287c6a21c38SMajd Dibbiny 3288c6a21c38SMajd Dibbiny if (ucontext) { 3289c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3290c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3291c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3292c6a21c38SMajd Dibbiny 1; 3293c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3294c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3295c6a21c38SMajd Dibbiny } else { 3296c6a21c38SMajd Dibbiny tx_port_affinity = 3297c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 3298c6a21c38SMajd Dibbiny 1, &dev->roce[port_num].tx_port_affinity) % 3299c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3300c6a21c38SMajd Dibbiny 1; 3301c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3302c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3303c6a21c38SMajd Dibbiny } 3304c6a21c38SMajd Dibbiny 3305c6a21c38SMajd Dibbiny return tx_port_affinity; 3306c6a21c38SMajd Dibbiny } 3307c6a21c38SMajd Dibbiny 3308e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3309e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 331089944450SShamir Rabinovitch enum ib_qp_state cur_state, 331189944450SShamir Rabinovitch enum ib_qp_state new_state, 331289944450SShamir Rabinovitch const struct mlx5_ib_modify_qp *ucmd, 331389944450SShamir Rabinovitch struct ib_udata *udata) 3314e126ba97SEli Cohen { 3315427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3316427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3317427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3318427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3319427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3320427c1e7bSmajd@mellanox.com }, 3321427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3322427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3323427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3324427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3325427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3326427c1e7bSmajd@mellanox.com }, 3327427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3328427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3329427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3330427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3331427c1e7bSmajd@mellanox.com }, 3332427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3333427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3334427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3335427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3336427c1e7bSmajd@mellanox.com }, 3337427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3338427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3339427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3340427c1e7bSmajd@mellanox.com }, 3341427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3342427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3343427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3344427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3345427c1e7bSmajd@mellanox.com }, 3346427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3347427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3348427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3349427c1e7bSmajd@mellanox.com } 3350427c1e7bSmajd@mellanox.com }; 3351427c1e7bSmajd@mellanox.com 3352e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3353e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 335419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3355e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3356e126ba97SEli Cohen struct mlx5_qp_context *context; 3357e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3358eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3359e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3360e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3361e126ba97SEli Cohen int mlx5_st; 3362e126ba97SEli Cohen int err; 3363427c1e7bSmajd@mellanox.com u16 op; 336413eab21fSAviv Heller u8 tx_affinity = 0; 3365e126ba97SEli Cohen 336655de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 336755de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 336855de9a77SLeon Romanovsky if (mlx5_st < 0) 336955de9a77SLeon Romanovsky return -EINVAL; 337055de9a77SLeon Romanovsky 33711a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 33721a412fb1SSaeed Mahameed if (!context) 3373e126ba97SEli Cohen return -ENOMEM; 3374e126ba97SEli Cohen 3375c6a21c38SMajd Dibbiny pd = get_pd(qp); 337655de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3377e126ba97SEli Cohen 3378e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3379e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3380e126ba97SEli Cohen } else { 3381e126ba97SEli Cohen switch (attr->path_mig_state) { 3382e126ba97SEli Cohen case IB_MIG_MIGRATED: 3383e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3384e126ba97SEli Cohen break; 3385e126ba97SEli Cohen case IB_MIG_REARM: 3386e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3387e126ba97SEli Cohen break; 3388e126ba97SEli Cohen case IB_MIG_ARMED: 3389e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3390e126ba97SEli Cohen break; 3391e126ba97SEli Cohen } 3392e126ba97SEli Cohen } 3393e126ba97SEli Cohen 339413eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 339513eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 339613eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 339713eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 339813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 339913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 340013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 340113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 34027c34ec19SAviv Heller if (dev->lag_active) { 34037fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 340489944450SShamir Rabinovitch tx_affinity = get_tx_affinity(dev, pd, base, p, 340589944450SShamir Rabinovitch udata); 340613eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 340713eab21fSAviv Heller } 340813eab21fSAviv Heller } 340913eab21fSAviv Heller } 341013eab21fSAviv Heller 3411d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3412e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3413c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3414c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3415e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3416e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3417e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3418e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3419e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3420e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3421e126ba97SEli Cohen err = -EINVAL; 3422e126ba97SEli Cohen goto out; 3423e126ba97SEli Cohen } 3424938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3425938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3426e126ba97SEli Cohen } 3427e126ba97SEli Cohen 3428e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3429e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3430e126ba97SEli Cohen 3431e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3432d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3433e126ba97SEli Cohen 3434e126ba97SEli Cohen /* todo implement counter_index functionality */ 3435e126ba97SEli Cohen 3436e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3437e126ba97SEli Cohen context->pri_path.port = qp->port; 3438e126ba97SEli Cohen 3439e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3440e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3441e126ba97SEli Cohen 3442e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 344375850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3444e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3445f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3446e126ba97SEli Cohen if (err) 3447e126ba97SEli Cohen goto out; 3448e126ba97SEli Cohen } 3449e126ba97SEli Cohen 3450e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3451e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3452e126ba97SEli Cohen 3453e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 345475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 345575850d0bSmajd@mellanox.com &context->alt_path, 3456f879ee8dSAchiad Shochat attr->alt_port_num, 3457f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3458f879ee8dSAchiad Shochat 0, attr, true); 3459e126ba97SEli Cohen if (err) 3460e126ba97SEli Cohen goto out; 3461e126ba97SEli Cohen } 3462e126ba97SEli Cohen 346389ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 346489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3465e126ba97SEli Cohen 3466e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3467e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3468e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3469e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3470e126ba97SEli Cohen 3471e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3472e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3473e126ba97SEli Cohen 3474e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3475e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3476e126ba97SEli Cohen 3477e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3478e126ba97SEli Cohen if (attr->max_rd_atomic) 3479e126ba97SEli Cohen context->params1 |= 3480e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3481e126ba97SEli Cohen } 3482e126ba97SEli Cohen 3483e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3484e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3485e126ba97SEli Cohen 3486e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3487e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3488e126ba97SEli Cohen context->params2 |= 3489e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3490e126ba97SEli Cohen } 3491e126ba97SEli Cohen 3492a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3493bf3b4f06SBart Van Assche __be32 access_flags; 3494a60109dcSYonatan Cohen 3495a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3496a60109dcSYonatan Cohen if (err) 3497a60109dcSYonatan Cohen goto out; 3498a60109dcSYonatan Cohen 3499a60109dcSYonatan Cohen context->params2 |= access_flags; 3500a60109dcSYonatan Cohen } 3501e126ba97SEli Cohen 3502e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3503e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3504e126ba97SEli Cohen 3505e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3506e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3507e126ba97SEli Cohen 3508e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3509e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3510e126ba97SEli Cohen 3511e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3512e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3513e126ba97SEli Cohen 35140837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 35150837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 35160837e86aSMark Bloch qp->port) - 1; 3517c2e53b2cSYishai Hadas 3518c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3519c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3520c2e53b2cSYishai Hadas port_num = 0; 3521c2e53b2cSYishai Hadas 3522eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 35230837e86aSMark Bloch context->qp_counter_set_usr_page |= 3524e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 35250837e86aSMark Bloch } 35260837e86aSMark Bloch 3527e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3528e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3529e126ba97SEli Cohen 3530b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3531b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3532e126ba97SEli Cohen 3533e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3534e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3535e126ba97SEli Cohen 3536427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 35375d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 35385d414b17SDan Carpenter err = -EINVAL; 3539427c1e7bSmajd@mellanox.com goto out; 35405d414b17SDan Carpenter } 3541427c1e7bSmajd@mellanox.com 3542427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3543e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3544e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3545ad5f8e96Smajd@mellanox.com 3546c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3547c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 35480680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 35490680efa2SAlex Vesker 35500680efa2SAlex Vesker raw_qp_param.operation = op; 3551eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3552e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3553eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3554eb49ab0cSAlex Vesker } 35557d29f349SBodong Wang 35567d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 355761147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 355861147f39SBodong Wang 355961147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 356061147f39SBodong Wang if (attr->rate_limit && 356161147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 356261147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 356361147f39SBodong Wang ucmd->burst_info.max_burst_sz; 356461147f39SBodong Wang } else { 356561147f39SBodong Wang err = -EINVAL; 356661147f39SBodong Wang goto out; 356761147f39SBodong Wang } 356861147f39SBodong Wang } 356961147f39SBodong Wang 357061147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 357161147f39SBodong Wang if (attr->rate_limit && 357261147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 357361147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 357461147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 357561147f39SBodong Wang } else { 357661147f39SBodong Wang err = -EINVAL; 357761147f39SBodong Wang goto out; 357861147f39SBodong Wang } 357961147f39SBodong Wang } 358061147f39SBodong Wang 35817d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 35827d29f349SBodong Wang } 35837d29f349SBodong Wang 358413eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 35850680efa2SAlex Vesker } else { 35861a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 358719098df2Smajd@mellanox.com &base->mqp); 35880680efa2SAlex Vesker } 35890680efa2SAlex Vesker 3590e126ba97SEli Cohen if (err) 3591e126ba97SEli Cohen goto out; 3592e126ba97SEli Cohen 3593e126ba97SEli Cohen qp->state = new_state; 3594e126ba97SEli Cohen 3595e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 359619098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3597e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 359819098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3599e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3600e126ba97SEli Cohen qp->port = attr->port_num; 3601e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 360219098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3603e126ba97SEli Cohen 3604e126ba97SEli Cohen /* 3605e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3606e126ba97SEli Cohen * entries and reinitialize the QP. 3607e126ba97SEli Cohen */ 360875a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 360975a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 361019098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3611e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3612e126ba97SEli Cohen if (send_cq != recv_cq) 361319098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3614e126ba97SEli Cohen 3615e126ba97SEli Cohen qp->rq.head = 0; 3616e126ba97SEli Cohen qp->rq.tail = 0; 3617e126ba97SEli Cohen qp->sq.head = 0; 3618e126ba97SEli Cohen qp->sq.tail = 0; 3619e126ba97SEli Cohen qp->sq.cur_post = 0; 362034f4c955SGuy Levi if (qp->sq.wqe_cnt) 362134f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3622e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3623e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3624e126ba97SEli Cohen } 3625e126ba97SEli Cohen 3626e126ba97SEli Cohen out: 36271a412fb1SSaeed Mahameed kfree(context); 3628e126ba97SEli Cohen return err; 3629e126ba97SEli Cohen } 3630e126ba97SEli Cohen 3631c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3632c32a4f29SMoni Shoua { 3633c32a4f29SMoni Shoua if ((mask & req) != req) 3634c32a4f29SMoni Shoua return false; 3635c32a4f29SMoni Shoua 3636c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3637c32a4f29SMoni Shoua return false; 3638c32a4f29SMoni Shoua 3639c32a4f29SMoni Shoua return true; 3640c32a4f29SMoni Shoua } 3641c32a4f29SMoni Shoua 3642c32a4f29SMoni Shoua /* check valid transition for driver QP types 3643c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3644c32a4f29SMoni Shoua */ 3645c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3646c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3647c32a4f29SMoni Shoua { 3648c32a4f29SMoni Shoua int req = IB_QP_STATE; 3649c32a4f29SMoni Shoua int opt = 0; 3650c32a4f29SMoni Shoua 365199ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 365299ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 365399ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3654c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3655c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3656c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3657c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3658c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3659c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3660c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 36615ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3662c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3663c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3664c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3665c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3666c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3667c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3668c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3669c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3670c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3671c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3672c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3673c32a4f29SMoni Shoua } 3674c32a4f29SMoni Shoua return false; 3675c32a4f29SMoni Shoua } 3676c32a4f29SMoni Shoua 3677776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3678776a3906SMoni Shoua * valid transitions are: 3679776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3680776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3681776a3906SMoni Shoua * mtu, gid_index and hop_limit 3682776a3906SMoni Shoua * Other transitions and attributes are illegal 3683776a3906SMoni Shoua */ 3684776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3685776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3686776a3906SMoni Shoua { 3687776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3688776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3689776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3690776a3906SMoni Shoua int err = 0; 3691776a3906SMoni Shoua int required = IB_QP_STATE; 3692776a3906SMoni Shoua void *dctc; 3693776a3906SMoni Shoua 3694776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3695776a3906SMoni Shoua return -EINVAL; 3696776a3906SMoni Shoua 3697776a3906SMoni Shoua cur_state = qp->state; 3698776a3906SMoni Shoua new_state = attr->qp_state; 3699776a3906SMoni Shoua 3700776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3701776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3702776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3703776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3704776a3906SMoni Shoua return -EINVAL; 3705776a3906SMoni Shoua 3706776a3906SMoni Shoua if (attr->port_num == 0 || 3707776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3708776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3709776a3906SMoni Shoua attr->port_num, dev->num_ports); 3710776a3906SMoni Shoua return -EINVAL; 3711776a3906SMoni Shoua } 3712776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3713776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3714776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3715776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3716776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3717a60109dcSYonatan Cohen int atomic_mode; 3718a60109dcSYonatan Cohen 3719a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3720a60109dcSYonatan Cohen if (atomic_mode < 0) 3721776a3906SMoni Shoua return -EOPNOTSUPP; 3722a60109dcSYonatan Cohen 3723a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3724776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3725776a3906SMoni Shoua } 3726776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3727776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3728776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3729776a3906SMoni Shoua 3730776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3731776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3732c5ae1954SYishai Hadas u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; 3733776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3734776a3906SMoni Shoua sizeof(resp.dctn); 3735776a3906SMoni Shoua 3736776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3737776a3906SMoni Shoua return -EINVAL; 3738776a3906SMoni Shoua resp.response_length = min_resp_len; 3739776a3906SMoni Shoua 3740776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3741776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3742776a3906SMoni Shoua return -EINVAL; 3743776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3744776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3745776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3746776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3747776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3748776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3749776a3906SMoni Shoua 3750776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3751c5ae1954SYishai Hadas MLX5_ST_SZ_BYTES(create_dct_in), out, 3752c5ae1954SYishai Hadas sizeof(out)); 3753776a3906SMoni Shoua if (err) 3754776a3906SMoni Shoua return err; 3755776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3756776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3757776a3906SMoni Shoua if (err) { 3758776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3759776a3906SMoni Shoua return err; 3760776a3906SMoni Shoua } 3761776a3906SMoni Shoua } else { 3762776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3763776a3906SMoni Shoua return -EINVAL; 3764776a3906SMoni Shoua } 3765776a3906SMoni Shoua if (err) 3766776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3767776a3906SMoni Shoua else 3768776a3906SMoni Shoua qp->state = new_state; 3769776a3906SMoni Shoua return err; 3770776a3906SMoni Shoua } 3771776a3906SMoni Shoua 3772e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3773e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3774e126ba97SEli Cohen { 3775e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3776e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 377761147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3778d16e91daSHaggai Eran enum ib_qp_type qp_type; 3779e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 378061147f39SBodong Wang size_t required_cmd_sz; 3781e126ba97SEli Cohen int err = -EINVAL; 3782e126ba97SEli Cohen int port; 3783e126ba97SEli Cohen 378428d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 378528d61370SYishai Hadas return -ENOSYS; 378628d61370SYishai Hadas 378761147f39SBodong Wang if (udata && udata->inlen) { 378861147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 378961147f39SBodong Wang sizeof(ucmd.reserved); 379061147f39SBodong Wang if (udata->inlen < required_cmd_sz) 379161147f39SBodong Wang return -EINVAL; 379261147f39SBodong Wang 379361147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 379461147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 379561147f39SBodong Wang udata->inlen - sizeof(ucmd))) 379661147f39SBodong Wang return -EOPNOTSUPP; 379761147f39SBodong Wang 379861147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 379961147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 380061147f39SBodong Wang return -EFAULT; 380161147f39SBodong Wang 380261147f39SBodong Wang if (ucmd.comp_mask || 380361147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 380461147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 380561147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 380661147f39SBodong Wang return -EOPNOTSUPP; 380761147f39SBodong Wang } 380861147f39SBodong Wang 3809d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3810d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3811d16e91daSHaggai Eran 3812c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3813c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3814c32a4f29SMoni Shoua else 3815d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3816d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3817d16e91daSHaggai Eran 3818776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3819776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3820c32a4f29SMoni Shoua 3821e126ba97SEli Cohen mutex_lock(&qp->mutex); 3822e126ba97SEli Cohen 3823e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3824e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3825e126ba97SEli Cohen 38262811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 38272811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 38282811ba51SAchiad Shochat } 38292811ba51SAchiad Shochat 3830c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3831c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3832c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3833c2e53b2cSYishai Hadas attr_mask); 3834c2e53b2cSYishai Hadas goto out; 3835c2e53b2cSYishai Hadas } 3836c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3837c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3838d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3839d31131bbSKamal Heib attr_mask)) { 3840158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3841158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3842e126ba97SEli Cohen goto out; 3843c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3844c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3845c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3846c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3847c32a4f29SMoni Shoua goto out; 3848158abf86SHaggai Eran } 3849e126ba97SEli Cohen 3850e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3851938fe83cSSaeed Mahameed (attr->port_num == 0 || 3852508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3853158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3854158abf86SHaggai Eran attr->port_num, dev->num_ports); 3855e126ba97SEli Cohen goto out; 3856158abf86SHaggai Eran } 3857e126ba97SEli Cohen 3858e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3859e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3860938fe83cSSaeed Mahameed if (attr->pkey_index >= 3861158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3862158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3863158abf86SHaggai Eran attr->pkey_index); 3864e126ba97SEli Cohen goto out; 3865e126ba97SEli Cohen } 3866158abf86SHaggai Eran } 3867e126ba97SEli Cohen 3868e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3869938fe83cSSaeed Mahameed attr->max_rd_atomic > 3870158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3871158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3872158abf86SHaggai Eran attr->max_rd_atomic); 3873e126ba97SEli Cohen goto out; 3874158abf86SHaggai Eran } 3875e126ba97SEli Cohen 3876e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3877938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3878158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3879158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3880158abf86SHaggai Eran attr->max_dest_rd_atomic); 3881e126ba97SEli Cohen goto out; 3882158abf86SHaggai Eran } 3883e126ba97SEli Cohen 3884e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3885e126ba97SEli Cohen err = 0; 3886e126ba97SEli Cohen goto out; 3887e126ba97SEli Cohen } 3888e126ba97SEli Cohen 388961147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 389089944450SShamir Rabinovitch new_state, &ucmd, udata); 3891e126ba97SEli Cohen 3892e126ba97SEli Cohen out: 3893e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3894e126ba97SEli Cohen return err; 3895e126ba97SEli Cohen } 3896e126ba97SEli Cohen 389734f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 389834f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 389934f4c955SGuy Levi { 390034f4c955SGuy Levi u32 idx; 390134f4c955SGuy Levi 390234f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 390334f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 390434f4c955SGuy Levi 390534f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 390634f4c955SGuy Levi } 390734f4c955SGuy Levi 390834f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 390934f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 391034f4c955SGuy Levi * @sq - SQ buffer. 391134f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 391234f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 391334f4c955SGuy Levi * @cur_edge: Updated current edge. 391434f4c955SGuy Levi */ 391534f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 391634f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 391734f4c955SGuy Levi { 391834f4c955SGuy Levi if (likely(*seg != *cur_edge)) 391934f4c955SGuy Levi return; 392034f4c955SGuy Levi 392134f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 392234f4c955SGuy Levi } 392334f4c955SGuy Levi 392434f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 392534f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 392634f4c955SGuy Levi * @sq - SQ buffer. 392734f4c955SGuy Levi * @cur_edge: Updated current edge. 392834f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 392934f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 393034f4c955SGuy Levi * @src: Pointer to copy from. 393134f4c955SGuy Levi * @n: Number of bytes to copy. 393234f4c955SGuy Levi */ 393334f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 393434f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 393534f4c955SGuy Levi size_t n) 393634f4c955SGuy Levi { 393734f4c955SGuy Levi while (likely(n)) { 393834f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 393934f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 394034f4c955SGuy Levi size_t stride; 394134f4c955SGuy Levi 394234f4c955SGuy Levi memcpy(*seg, src, copysz); 394334f4c955SGuy Levi 394434f4c955SGuy Levi n -= copysz; 394534f4c955SGuy Levi src += copysz; 394634f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 394734f4c955SGuy Levi *seg += stride; 394834f4c955SGuy Levi *wqe_sz += stride >> 4; 394934f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 395034f4c955SGuy Levi } 395134f4c955SGuy Levi } 395234f4c955SGuy Levi 3953e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3954e126ba97SEli Cohen { 3955e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3956e126ba97SEli Cohen unsigned cur; 3957e126ba97SEli Cohen 3958e126ba97SEli Cohen cur = wq->head - wq->tail; 3959e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3960e126ba97SEli Cohen return 0; 3961e126ba97SEli Cohen 3962e126ba97SEli Cohen cq = to_mcq(ib_cq); 3963e126ba97SEli Cohen spin_lock(&cq->lock); 3964e126ba97SEli Cohen cur = wq->head - wq->tail; 3965e126ba97SEli Cohen spin_unlock(&cq->lock); 3966e126ba97SEli Cohen 3967e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3968e126ba97SEli Cohen } 3969e126ba97SEli Cohen 3970e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3971e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3972e126ba97SEli Cohen { 3973e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3974e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3975e126ba97SEli Cohen rseg->reserved = 0; 3976e126ba97SEli Cohen } 3977e126ba97SEli Cohen 397834f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 397934f4c955SGuy Levi void **seg, int *size, void **cur_edge) 3980f0313965SErez Shitrit { 398134f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 3982f0313965SErez Shitrit 3983f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3984f0313965SErez Shitrit 3985f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3986f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3987f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3988f0313965SErez Shitrit 3989f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3990f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 399134f4c955SGuy Levi size_t left, copysz; 3992f0313965SErez Shitrit void *pdata = ud_wr->header; 399334f4c955SGuy Levi size_t stride; 3994f0313965SErez Shitrit 3995f0313965SErez Shitrit left = ud_wr->hlen; 3996f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 39972b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3998f0313965SErez Shitrit 399934f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 400034f4c955SGuy Levi * first copy up to the current edge and then, if needed, 400134f4c955SGuy Levi * fall-through to memcpy_send_wqe. 4002f0313965SErez Shitrit */ 400334f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 400434f4c955SGuy Levi left); 400534f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 400634f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 400734f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 400834f4c955SGuy Levi *size += stride / 16; 400934f4c955SGuy Levi *seg += stride; 4010f0313965SErez Shitrit 401134f4c955SGuy Levi if (copysz < left) { 401234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4013f0313965SErez Shitrit left -= copysz; 4014f0313965SErez Shitrit pdata += copysz; 401534f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 401634f4c955SGuy Levi left); 4017f0313965SErez Shitrit } 4018f0313965SErez Shitrit 401934f4c955SGuy Levi return; 402034f4c955SGuy Levi } 402134f4c955SGuy Levi 402234f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 402334f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 4024f0313965SErez Shitrit } 4025f0313965SErez Shitrit 4026e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 4027f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4028e126ba97SEli Cohen { 4029e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 4030e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 4031e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 4032e126ba97SEli Cohen } 4033e126ba97SEli Cohen 4034e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 4035e126ba97SEli Cohen { 4036e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 4037e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 4038e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 4039e126ba97SEli Cohen } 4040e126ba97SEli Cohen 404131616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 4042e126ba97SEli Cohen { 404331616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 404431616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 4045e126ba97SEli Cohen } 4046e126ba97SEli Cohen 4047e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 4048e126ba97SEli Cohen { 4049e126ba97SEli Cohen u64 result; 4050e126ba97SEli Cohen 4051e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 4052e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 4053e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 4054e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 4055e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 4056e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 4057e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 4058e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 4059e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 4060e126ba97SEli Cohen MLX5_MKEY_MASK_A | 4061e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 4062e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4063e126ba97SEli Cohen 4064e126ba97SEli Cohen return cpu_to_be64(result); 4065e126ba97SEli Cohen } 4066e126ba97SEli Cohen 4067e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 4068e6631814SSagi Grimberg { 4069e6631814SSagi Grimberg u64 result; 4070e6631814SSagi Grimberg 4071e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 4072e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 4073e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 4074d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 4075e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 4076e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 4077e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 4078e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 4079e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 4080e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 4081e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 4082e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 4083e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 4084e6631814SSagi Grimberg 4085e6631814SSagi Grimberg return cpu_to_be64(result); 4086e6631814SSagi Grimberg } 4087e6631814SSagi Grimberg 40888a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 4089064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 40908a187ee5SSagi Grimberg { 409131616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 40928a187ee5SSagi Grimberg 40938a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4094b005d316SSagi Grimberg 40958a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 4096064e5262SIdan Burstein if (umr_inline) 4097064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 409831616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 40998a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 41008a187ee5SSagi Grimberg } 41018a187ee5SSagi Grimberg 4102dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4103e126ba97SEli Cohen { 4104e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4105e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 41062d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4107e126ba97SEli Cohen } 4108e126ba97SEli Cohen 410931616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4110e126ba97SEli Cohen { 4111968e78ddSHaggai Eran u64 result; 4112e126ba97SEli Cohen 411331616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4114e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4115968e78ddSHaggai Eran 4116968e78ddSHaggai Eran return cpu_to_be64(result); 4117968e78ddSHaggai Eran } 4118968e78ddSHaggai Eran 411931616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4120968e78ddSHaggai Eran { 4121968e78ddSHaggai Eran u64 result; 4122968e78ddSHaggai Eran 4123968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4124968e78ddSHaggai Eran 4125968e78ddSHaggai Eran return cpu_to_be64(result); 4126968e78ddSHaggai Eran } 4127968e78ddSHaggai Eran 412856e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 412956e11d62SNoa Osherovich { 413056e11d62SNoa Osherovich u64 result; 413156e11d62SNoa Osherovich 413256e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 413356e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 413431616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 413556e11d62SNoa Osherovich 413656e11d62SNoa Osherovich return cpu_to_be64(result); 413756e11d62SNoa Osherovich } 413856e11d62SNoa Osherovich 413931616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 414056e11d62SNoa Osherovich { 414156e11d62SNoa Osherovich u64 result; 414256e11d62SNoa Osherovich 414331616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 414431616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 414556e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 414631616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 414731616255SArtemy Kovalyov 414831616255SArtemy Kovalyov if (atomic) 414931616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 415056e11d62SNoa Osherovich 415156e11d62SNoa Osherovich return cpu_to_be64(result); 415256e11d62SNoa Osherovich } 415356e11d62SNoa Osherovich 415456e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 415556e11d62SNoa Osherovich { 415656e11d62SNoa Osherovich u64 result; 415756e11d62SNoa Osherovich 415831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 415956e11d62SNoa Osherovich 416056e11d62SNoa Osherovich return cpu_to_be64(result); 416156e11d62SNoa Osherovich } 416256e11d62SNoa Osherovich 4163c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4164c8d75a98SMajd Dibbiny { 4165c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4166c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4167c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4168c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4169c8d75a98SMajd Dibbiny return -EPERM; 4170c8d75a98SMajd Dibbiny return 0; 4171c8d75a98SMajd Dibbiny } 4172c8d75a98SMajd Dibbiny 4173c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4174c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4175f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4176968e78ddSHaggai Eran { 4177f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4178968e78ddSHaggai Eran 4179968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4180968e78ddSHaggai Eran 4181968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 4182968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 4183968e78ddSHaggai Eran else 4184968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 4185968e78ddSHaggai Eran 418631616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 418731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 418831616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 418931616255SArtemy Kovalyov 419031616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 419131616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4192968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4193968e78ddSHaggai Eran } 419456e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 419556e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 419631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 419731616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 419856e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4199e126ba97SEli Cohen } 420031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 420131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 420231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 420331616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4204e126ba97SEli Cohen 4205e126ba97SEli Cohen if (!wr->num_sge) 4206968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4207c8d75a98SMajd Dibbiny 4208c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4209e126ba97SEli Cohen } 4210e126ba97SEli Cohen 4211e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4212e126ba97SEli Cohen { 4213e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4214e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4215e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4216e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 42172ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4218e126ba97SEli Cohen } 4219e126ba97SEli Cohen 42208a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 42218a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 42228a187ee5SSagi Grimberg u32 key, int access) 42238a187ee5SSagi Grimberg { 42248a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 42258a187ee5SSagi Grimberg 42268a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4227b005d316SSagi Grimberg 4228ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4229b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4230ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4231b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4232b005d316SSagi Grimberg ndescs *= 2; 4233b005d316SSagi Grimberg 4234b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 42358a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 42368a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 42378a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 42388a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 42398a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 42408a187ee5SSagi Grimberg } 42418a187ee5SSagi Grimberg 4242dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4243e126ba97SEli Cohen { 4244e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4245968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4246e126ba97SEli Cohen } 4247e126ba97SEli Cohen 4248f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4249f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4250e126ba97SEli Cohen { 4251f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4252968e78ddSHaggai Eran 4253e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 425431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4255968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4256e126ba97SEli Cohen 4257968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 425856e11d62SNoa Osherovich if (umrwr->pd) 4259968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 426031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 426131616255SArtemy Kovalyov !umrwr->length) 426231616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 426331616255SArtemy Kovalyov 426431616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4265968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4266968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4267746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4268968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4269e126ba97SEli Cohen } 4270e126ba97SEli Cohen 42718a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 42728a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 42738a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 42748a187ee5SSagi Grimberg { 42758a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 42768a187ee5SSagi Grimberg 42778a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 42788a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 42798a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 42808a187ee5SSagi Grimberg } 42818a187ee5SSagi Grimberg 4282f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4283e126ba97SEli Cohen { 4284e126ba97SEli Cohen switch (wr->opcode) { 4285e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4286e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4287e126ba97SEli Cohen return wr->ex.imm_data; 4288e126ba97SEli Cohen 4289e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4290e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4291e126ba97SEli Cohen 4292e126ba97SEli Cohen default: 4293e126ba97SEli Cohen return 0; 4294e126ba97SEli Cohen } 4295e126ba97SEli Cohen } 4296e126ba97SEli Cohen 4297e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4298e126ba97SEli Cohen { 4299e126ba97SEli Cohen u8 *p = wqe; 4300e126ba97SEli Cohen u8 res = 0; 4301e126ba97SEli Cohen int i; 4302e126ba97SEli Cohen 4303e126ba97SEli Cohen for (i = 0; i < size; i++) 4304e126ba97SEli Cohen res ^= p[i]; 4305e126ba97SEli Cohen 4306e126ba97SEli Cohen return ~res; 4307e126ba97SEli Cohen } 4308e126ba97SEli Cohen 4309e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4310e126ba97SEli Cohen { 4311e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4312e126ba97SEli Cohen } 4313e126ba97SEli Cohen 4314f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 431534f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4316e126ba97SEli Cohen { 4317e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 431834f4c955SGuy Levi size_t offset; 4319e126ba97SEli Cohen int inl = 0; 4320e126ba97SEli Cohen int i; 4321e126ba97SEli Cohen 432234f4c955SGuy Levi seg = *wqe; 432334f4c955SGuy Levi *wqe += sizeof(*seg); 432434f4c955SGuy Levi offset = sizeof(*seg); 432534f4c955SGuy Levi 4326e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 432734f4c955SGuy Levi size_t len = wr->sg_list[i].length; 432834f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 432934f4c955SGuy Levi 4330e126ba97SEli Cohen inl += len; 4331e126ba97SEli Cohen 4332e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4333e126ba97SEli Cohen return -ENOMEM; 4334e126ba97SEli Cohen 433534f4c955SGuy Levi while (likely(len)) { 433634f4c955SGuy Levi size_t leftlen; 433734f4c955SGuy Levi size_t copysz; 433834f4c955SGuy Levi 433934f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 434034f4c955SGuy Levi *wqe_sz + (offset >> 4), 434134f4c955SGuy Levi cur_edge); 434234f4c955SGuy Levi 434334f4c955SGuy Levi leftlen = *cur_edge - *wqe; 434434f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 434534f4c955SGuy Levi 434634f4c955SGuy Levi memcpy(*wqe, addr, copysz); 434734f4c955SGuy Levi len -= copysz; 434834f4c955SGuy Levi addr += copysz; 434934f4c955SGuy Levi *wqe += copysz; 435034f4c955SGuy Levi offset += copysz; 4351e126ba97SEli Cohen } 4352e126ba97SEli Cohen } 4353e126ba97SEli Cohen 4354e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4355e126ba97SEli Cohen 435634f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4357e126ba97SEli Cohen 4358e126ba97SEli Cohen return 0; 4359e126ba97SEli Cohen } 4360e126ba97SEli Cohen 4361e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4362e6631814SSagi Grimberg { 4363e6631814SSagi Grimberg switch (type) { 4364e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4365e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4366e6631814SSagi Grimberg default: 4367e6631814SSagi Grimberg return 0; 4368e6631814SSagi Grimberg } 4369e6631814SSagi Grimberg } 4370e6631814SSagi Grimberg 4371e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4372e6631814SSagi Grimberg { 4373e6631814SSagi Grimberg switch (block_size) { 4374e6631814SSagi Grimberg case 512: return 0x1; 4375e6631814SSagi Grimberg case 520: return 0x2; 4376e6631814SSagi Grimberg case 4096: return 0x3; 4377e6631814SSagi Grimberg case 4160: return 0x4; 4378e6631814SSagi Grimberg case 1073741824: return 0x5; 4379e6631814SSagi Grimberg default: return 0; 4380e6631814SSagi Grimberg } 4381e6631814SSagi Grimberg } 4382e6631814SSagi Grimberg 438378eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4384142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4385e6631814SSagi Grimberg { 4386142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4387142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4388142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4389142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4390142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4391142537f4SSagi Grimberg /* repeating block */ 4392142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4393142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4394142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4395e6631814SSagi Grimberg 439678eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 439778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4398e6631814SSagi Grimberg 439978eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 440078eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 440178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 440278eda2bbSSagi Grimberg else 440378eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4404e6631814SSagi Grimberg } 4405e6631814SSagi Grimberg 440678eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 440778eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4408e6631814SSagi Grimberg } 4409e6631814SSagi Grimberg 4410e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4411e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4412e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4413e6631814SSagi Grimberg { 4414e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4415e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4416e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4417e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4418e6631814SSagi Grimberg 4419c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4420e6631814SSagi Grimberg 4421142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4422142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4423e6631814SSagi Grimberg /* Input domain check byte mask */ 4424e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 442578eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 442678eda2bbSSagi Grimberg 442778eda2bbSSagi Grimberg /* Memory domain */ 442878eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 442978eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 443078eda2bbSSagi Grimberg break; 443178eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 443278eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 443378eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 443478eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 443578eda2bbSSagi Grimberg break; 443678eda2bbSSagi Grimberg default: 443778eda2bbSSagi Grimberg return -EINVAL; 443878eda2bbSSagi Grimberg } 443978eda2bbSSagi Grimberg 444078eda2bbSSagi Grimberg /* Wire domain */ 444178eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 444278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 444378eda2bbSSagi Grimberg break; 444478eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4445e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 444678eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4447e6631814SSagi Grimberg /* Same block structure */ 4448142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4449e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4450fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4451c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4452fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4453c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4454fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4455e6631814SSagi Grimberg } else 4456e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4457e6631814SSagi Grimberg 4458142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 445978eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4460e6631814SSagi Grimberg break; 4461e6631814SSagi Grimberg default: 4462e6631814SSagi Grimberg return -EINVAL; 4463e6631814SSagi Grimberg } 4464e6631814SSagi Grimberg 4465e6631814SSagi Grimberg return 0; 4466e6631814SSagi Grimberg } 4467e6631814SSagi Grimberg 4468f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 446934f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, 447034f4c955SGuy Levi int *size, void **cur_edge) 4471e6631814SSagi Grimberg { 4472e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4473e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4474e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4475e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4476e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4477e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4478e6631814SSagi Grimberg int ret; 4479e6631814SSagi Grimberg int wqe_size; 4480e6631814SSagi Grimberg 4481e622f2f4SChristoph Hellwig if (!wr->prot || 4482e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4483e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4484e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4485e6631814SSagi Grimberg /** 4486e6631814SSagi Grimberg * Source domain doesn't contain signature information 44875c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4488e6631814SSagi Grimberg * So need construct: 4489e6631814SSagi Grimberg * ------------------ 4490e6631814SSagi Grimberg * | data_klm | 4491e6631814SSagi Grimberg * ------------------ 4492e6631814SSagi Grimberg * | BSF | 4493e6631814SSagi Grimberg * ------------------ 4494e6631814SSagi Grimberg **/ 4495e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4496e6631814SSagi Grimberg 4497e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4498e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4499e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4500e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4501e6631814SSagi Grimberg } else { 4502e6631814SSagi Grimberg /** 4503e6631814SSagi Grimberg * Source domain contains signature information 4504e6631814SSagi Grimberg * So need construct a strided block format: 4505e6631814SSagi Grimberg * --------------------------- 4506e6631814SSagi Grimberg * | stride_block_ctrl | 4507e6631814SSagi Grimberg * --------------------------- 4508e6631814SSagi Grimberg * | data_klm | 4509e6631814SSagi Grimberg * --------------------------- 4510e6631814SSagi Grimberg * | prot_klm | 4511e6631814SSagi Grimberg * --------------------------- 4512e6631814SSagi Grimberg * | BSF | 4513e6631814SSagi Grimberg * --------------------------- 4514e6631814SSagi Grimberg **/ 4515e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4516e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4517e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4518e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4519e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4520e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4521e6631814SSagi Grimberg int prot_size; 4522e6631814SSagi Grimberg 4523e6631814SSagi Grimberg sblock_ctrl = *seg; 4524e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4525e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4526e6631814SSagi Grimberg 4527e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4528e6631814SSagi Grimberg if (!prot_size) { 4529e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4530e6631814SSagi Grimberg return -EINVAL; 4531e6631814SSagi Grimberg } 4532e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4533e6631814SSagi Grimberg prot_size); 4534e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4535e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4536e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4537e6631814SSagi Grimberg 4538e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4539e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4540e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 45415c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 45425c273b16SSagi Grimberg 4543e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4544e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4545e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4546e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 45475c273b16SSagi Grimberg 4548e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4549e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4550e6631814SSagi Grimberg } 4551e6631814SSagi Grimberg 4552e6631814SSagi Grimberg *seg += wqe_size; 4553e6631814SSagi Grimberg *size += wqe_size / 16; 455434f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4555e6631814SSagi Grimberg 4556e6631814SSagi Grimberg bsf = *seg; 4557e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4558e6631814SSagi Grimberg if (ret) 4559e6631814SSagi Grimberg return -EINVAL; 4560e6631814SSagi Grimberg 4561e6631814SSagi Grimberg *seg += sizeof(*bsf); 4562e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 456334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4564e6631814SSagi Grimberg 4565e6631814SSagi Grimberg return 0; 4566e6631814SSagi Grimberg } 4567e6631814SSagi Grimberg 4568e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4569f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4570e6631814SSagi Grimberg u32 length, u32 pdn) 4571e6631814SSagi Grimberg { 4572e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4573e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4574d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4575e6631814SSagi Grimberg 4576e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4577e6631814SSagi Grimberg 4578e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4579ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4580e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4581d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4582e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4583e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 458431616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4585e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4586e6631814SSagi Grimberg } 4587e6631814SSagi Grimberg 4588e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 458931616255SArtemy Kovalyov u32 size) 4590e6631814SSagi Grimberg { 4591e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4592e6631814SSagi Grimberg 4593e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 459431616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4595e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4596e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4597e6631814SSagi Grimberg } 4598e6631814SSagi Grimberg 4599e6631814SSagi Grimberg 4600f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 460134f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, int *size, 460234f4c955SGuy Levi void **cur_edge) 4603e6631814SSagi Grimberg { 4604f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4605e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4606e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 460731616255SArtemy Kovalyov u32 xlt_size; 4608e6631814SSagi Grimberg int region_len, ret; 4609e6631814SSagi Grimberg 4610e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4611e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4612d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4613d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4614e6631814SSagi Grimberg return -EINVAL; 4615e6631814SSagi Grimberg 4616e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4617e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4618e622f2f4SChristoph Hellwig if (wr->prot && 4619e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4620e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4621e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4622e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4623e6631814SSagi Grimberg 4624e6631814SSagi Grimberg /** 4625e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4626e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4627e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4628e6631814SSagi Grimberg **/ 462931616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4630e6631814SSagi Grimberg 463131616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4632e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4633e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 463434f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4635e6631814SSagi Grimberg 463631616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4637e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4638e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 463934f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4640e6631814SSagi Grimberg 464134f4c955SGuy Levi ret = set_sig_data_segment(wr, qp, seg, size, cur_edge); 4642e6631814SSagi Grimberg if (ret) 4643e6631814SSagi Grimberg return ret; 4644e6631814SSagi Grimberg 4645d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4646e6631814SSagi Grimberg return 0; 4647e6631814SSagi Grimberg } 4648e6631814SSagi Grimberg 4649e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4650e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4651e6631814SSagi Grimberg { 4652e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4653e6631814SSagi Grimberg 4654e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4655e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4656e6631814SSagi Grimberg switch (domain->sig_type) { 465778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 465878eda2bbSSagi Grimberg break; 4659e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4660e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4661e6631814SSagi Grimberg domain->sig.dif.app_tag); 4662e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4663e6631814SSagi Grimberg break; 4664e6631814SSagi Grimberg default: 466512bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 466612bbf1eaSLeon Romanovsky domain->sig_type); 466712bbf1eaSLeon Romanovsky return -EINVAL; 4668e6631814SSagi Grimberg } 4669e6631814SSagi Grimberg 467078eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 467178eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 467278eda2bbSSagi Grimberg 4673e6631814SSagi Grimberg return 0; 4674e6631814SSagi Grimberg } 4675e6631814SSagi Grimberg 46768a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4677f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 467834f4c955SGuy Levi void **seg, int *size, void **cur_edge) 46798a187ee5SSagi Grimberg { 46808a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 46818a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 468234f4c955SGuy Levi size_t mr_list_size = mr->ndescs * mr->desc_size; 4683064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 46848a187ee5SSagi Grimberg 46858a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 46868a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 46878a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 46888a187ee5SSagi Grimberg return -EINVAL; 46898a187ee5SSagi Grimberg } 46908a187ee5SSagi Grimberg 4691064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 46928a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 46938a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 469434f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 46958a187ee5SSagi Grimberg 46968a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 46978a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 46988a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 469934f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47008a187ee5SSagi Grimberg 4701064e5262SIdan Burstein if (umr_inline) { 470234f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 470334f4c955SGuy Levi mr_list_size); 470434f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 4705064e5262SIdan Burstein } else { 47068a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 47078a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 47088a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4709064e5262SIdan Burstein } 47108a187ee5SSagi Grimberg return 0; 47118a187ee5SSagi Grimberg } 47128a187ee5SSagi Grimberg 471334f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 471434f4c955SGuy Levi void **cur_edge) 4715e126ba97SEli Cohen { 4716dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4717e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4718e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 471934f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4720dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4721e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4722e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 472334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4724e126ba97SEli Cohen } 4725e126ba97SEli Cohen 472634f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 4727e126ba97SEli Cohen { 4728e126ba97SEli Cohen __be32 *p = NULL; 472934f4c955SGuy Levi u32 tidx = idx; 4730e126ba97SEli Cohen int i, j; 4731e126ba97SEli Cohen 473234f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 4733e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4734e126ba97SEli Cohen if ((i & 0xf) == 0) { 4735e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 473634f4c955SGuy Levi p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, tidx); 473734f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 4738e126ba97SEli Cohen j = 0; 4739e126ba97SEli Cohen } 4740e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4741e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4742e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4743e126ba97SEli Cohen } 4744e126ba97SEli Cohen } 4745e126ba97SEli Cohen 47467bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 47476e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 474834f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 474934f4c955SGuy Levi int *size, void **cur_edge, int nreq, 475034f4c955SGuy Levi bool send_signaled, bool solicited) 47516e5eadacSSagi Grimberg { 4752b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4753b2a232d2SLeon Romanovsky return -ENOMEM; 47546e5eadacSSagi Grimberg 47556e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 475634f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 47576e5eadacSSagi Grimberg *ctrl = *seg; 47586e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 47596e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 47606e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 47617bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 47627bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 47636e5eadacSSagi Grimberg 47646e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 47656e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 476634f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 47676e5eadacSSagi Grimberg 4768b2a232d2SLeon Romanovsky return 0; 47696e5eadacSSagi Grimberg } 47706e5eadacSSagi Grimberg 47717bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 47727bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 47737bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 477434f4c955SGuy Levi int *size, void **cur_edge, int nreq) 47757bb1fafcSBart Van Assche { 477634f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 47777bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 47787bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 47797bb1fafcSBart Van Assche } 47807bb1fafcSBart Van Assche 47816e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 47826e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 478334f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 478434f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 478534f4c955SGuy Levi u32 mlx5_opcode) 47866e5eadacSSagi Grimberg { 47876e5eadacSSagi Grimberg u8 opmod = 0; 47886e5eadacSSagi Grimberg 47896e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 47906e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 479119098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 47926e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 47936e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 47946e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 47956e5eadacSSagi Grimberg 47966e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 47976e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 47986e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 47996e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 48006e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 480134f4c955SGuy Levi 480234f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 480334f4c955SGuy Levi * construction, into SQ's cache. 480434f4c955SGuy Levi */ 480534f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 480634f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 480734f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 480834f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 480934f4c955SGuy Levi cur_edge; 48106e5eadacSSagi Grimberg } 48116e5eadacSSagi Grimberg 4812d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4813d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4814e126ba97SEli Cohen { 4815e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4816e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 481789ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4818d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4819e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4820e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4821d16e91daSHaggai Eran struct mlx5_bf *bf; 482234f4c955SGuy Levi void *cur_edge; 4823e126ba97SEli Cohen int uninitialized_var(size); 4824e126ba97SEli Cohen unsigned long flags; 4825e126ba97SEli Cohen unsigned idx; 4826e126ba97SEli Cohen int err = 0; 4827e126ba97SEli Cohen int num_sge; 4828e126ba97SEli Cohen void *seg; 4829e126ba97SEli Cohen int nreq; 4830e126ba97SEli Cohen int i; 4831e126ba97SEli Cohen u8 next_fence = 0; 4832e126ba97SEli Cohen u8 fence; 4833e126ba97SEli Cohen 48346c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 48356c75520fSParav Pandit !drain)) { 48366c75520fSParav Pandit *bad_wr = wr; 48376c75520fSParav Pandit return -EIO; 48386c75520fSParav Pandit } 48396c75520fSParav Pandit 4840d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4841d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4842d16e91daSHaggai Eran 4843d16e91daSHaggai Eran qp = to_mqp(ibqp); 48445fe9dec0SEli Cohen bf = &qp->bf; 4845d16e91daSHaggai Eran 4846e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4847e126ba97SEli Cohen 4848e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4849a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4850e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4851e126ba97SEli Cohen err = -EINVAL; 4852e126ba97SEli Cohen *bad_wr = wr; 4853e126ba97SEli Cohen goto out; 4854e126ba97SEli Cohen } 4855e126ba97SEli Cohen 4856e126ba97SEli Cohen num_sge = wr->num_sge; 4857e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4858e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 485924be409bSChuck Lever err = -EINVAL; 4860e126ba97SEli Cohen *bad_wr = wr; 4861e126ba97SEli Cohen goto out; 4862e126ba97SEli Cohen } 4863e126ba97SEli Cohen 486434f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 486534f4c955SGuy Levi nreq); 48666e5eadacSSagi Grimberg if (err) { 48676e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 48686e5eadacSSagi Grimberg err = -ENOMEM; 48696e5eadacSSagi Grimberg *bad_wr = wr; 48706e5eadacSSagi Grimberg goto out; 48716e5eadacSSagi Grimberg } 4872e126ba97SEli Cohen 4873074fca3aSMajd Dibbiny if (wr->opcode == IB_WR_REG_MR) { 48746e8484c5SMax Gurtovoy fence = dev->umr_fence; 48756e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4876074fca3aSMajd Dibbiny } else { 4877074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 48786e8484c5SMax Gurtovoy if (qp->next_fence) 48796e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 48806e8484c5SMax Gurtovoy else 48816e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 48826e8484c5SMax Gurtovoy } else { 48836e8484c5SMax Gurtovoy fence = qp->next_fence; 48846e8484c5SMax Gurtovoy } 4885074fca3aSMajd Dibbiny } 48866e8484c5SMax Gurtovoy 4887e126ba97SEli Cohen switch (ibqp->qp_type) { 4888e126ba97SEli Cohen case IB_QPT_XRC_INI: 4889e126ba97SEli Cohen xrc = seg; 4890e126ba97SEli Cohen seg += sizeof(*xrc); 4891e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4892e126ba97SEli Cohen /* fall through */ 4893e126ba97SEli Cohen case IB_QPT_RC: 4894e126ba97SEli Cohen switch (wr->opcode) { 4895e126ba97SEli Cohen case IB_WR_RDMA_READ: 4896e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4897e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4898e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4899e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4900e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4901e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4902e126ba97SEli Cohen break; 4903e126ba97SEli Cohen 4904e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4905e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4906e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 490781bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 490881bea28fSEli Cohen err = -ENOSYS; 490981bea28fSEli Cohen *bad_wr = wr; 491081bea28fSEli Cohen goto out; 4911e126ba97SEli Cohen 4912e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4913e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4914e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 491534f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 4916e126ba97SEli Cohen num_sge = 0; 4917e126ba97SEli Cohen break; 4918e126ba97SEli Cohen 49198a187ee5SSagi Grimberg case IB_WR_REG_MR: 49208a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 49218a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 492234f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 492334f4c955SGuy Levi &cur_edge); 49248a187ee5SSagi Grimberg if (err) { 49258a187ee5SSagi Grimberg *bad_wr = wr; 49268a187ee5SSagi Grimberg goto out; 49278a187ee5SSagi Grimberg } 49288a187ee5SSagi Grimberg num_sge = 0; 49298a187ee5SSagi Grimberg break; 49308a187ee5SSagi Grimberg 4931e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4932e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4933e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4934e6631814SSagi Grimberg 4935e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 493634f4c955SGuy Levi err = set_sig_umr_wr(wr, qp, &seg, &size, 493734f4c955SGuy Levi &cur_edge); 4938e6631814SSagi Grimberg if (err) { 4939e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4940e6631814SSagi Grimberg *bad_wr = wr; 4941e6631814SSagi Grimberg goto out; 4942e6631814SSagi Grimberg } 4943e6631814SSagi Grimberg 494434f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 494534f4c955SGuy Levi wr->wr_id, nreq, fence, 494634f4c955SGuy Levi MLX5_OPCODE_UMR); 4947e6631814SSagi Grimberg /* 4948e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4949e6631814SSagi Grimberg * on error 4950e6631814SSagi Grimberg */ 49517bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 495234f4c955SGuy Levi &size, &cur_edge, nreq, false, 495334f4c955SGuy Levi true); 4954e6631814SSagi Grimberg if (err) { 4955e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4956e6631814SSagi Grimberg err = -ENOMEM; 4957e6631814SSagi Grimberg *bad_wr = wr; 4958e6631814SSagi Grimberg goto out; 4959e6631814SSagi Grimberg } 4960e6631814SSagi Grimberg 4961e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4962e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4963e6631814SSagi Grimberg &size); 4964e6631814SSagi Grimberg if (err) { 4965e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4966e6631814SSagi Grimberg *bad_wr = wr; 4967e6631814SSagi Grimberg goto out; 4968e6631814SSagi Grimberg } 4969e6631814SSagi Grimberg 497034f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 497134f4c955SGuy Levi wr->wr_id, nreq, fence, 497234f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 49737bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 497434f4c955SGuy Levi &size, &cur_edge, nreq, false, 497534f4c955SGuy Levi true); 4976e6631814SSagi Grimberg if (err) { 4977e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4978e6631814SSagi Grimberg err = -ENOMEM; 4979e6631814SSagi Grimberg *bad_wr = wr; 4980e6631814SSagi Grimberg goto out; 4981e6631814SSagi Grimberg } 4982e6631814SSagi Grimberg 4983e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4984e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4985e6631814SSagi Grimberg &size); 4986e6631814SSagi Grimberg if (err) { 4987e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4988e6631814SSagi Grimberg *bad_wr = wr; 4989e6631814SSagi Grimberg goto out; 4990e6631814SSagi Grimberg } 4991e6631814SSagi Grimberg 499234f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 499334f4c955SGuy Levi wr->wr_id, nreq, fence, 499434f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 49956e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4996e6631814SSagi Grimberg num_sge = 0; 4997e6631814SSagi Grimberg goto skip_psv; 4998e6631814SSagi Grimberg 4999e126ba97SEli Cohen default: 5000e126ba97SEli Cohen break; 5001e126ba97SEli Cohen } 5002e126ba97SEli Cohen break; 5003e126ba97SEli Cohen 5004e126ba97SEli Cohen case IB_QPT_UC: 5005e126ba97SEli Cohen switch (wr->opcode) { 5006e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5007e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5008e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5009e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5010e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5011e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5012e126ba97SEli Cohen break; 5013e126ba97SEli Cohen 5014e126ba97SEli Cohen default: 5015e126ba97SEli Cohen break; 5016e126ba97SEli Cohen } 5017e126ba97SEli Cohen break; 5018e126ba97SEli Cohen 5019e126ba97SEli Cohen case IB_QPT_SMI: 50201e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 50211e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 50221e0e50b6SMaor Gottlieb err = -EPERM; 50231e0e50b6SMaor Gottlieb *bad_wr = wr; 50241e0e50b6SMaor Gottlieb goto out; 50251e0e50b6SMaor Gottlieb } 5026f6b1ee34SBart Van Assche /* fall through */ 5027d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 5028e126ba97SEli Cohen set_datagram_seg(seg, wr); 5029e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 5030e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 503134f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 503234f4c955SGuy Levi 5033e126ba97SEli Cohen break; 5034f0313965SErez Shitrit case IB_QPT_UD: 5035f0313965SErez Shitrit set_datagram_seg(seg, wr); 5036f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 5037f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 503834f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5039f0313965SErez Shitrit 5040f0313965SErez Shitrit /* handle qp that supports ud offload */ 5041f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 5042f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 5043f0313965SErez Shitrit 5044f0313965SErez Shitrit pad = seg; 5045f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 5046f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 5047f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 504834f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 504934f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 505034f4c955SGuy Levi &cur_edge); 5051f0313965SErez Shitrit } 5052f0313965SErez Shitrit break; 5053e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 5054e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 5055e126ba97SEli Cohen err = -EINVAL; 5056e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 5057e126ba97SEli Cohen goto out; 5058e126ba97SEli Cohen } 5059e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 5060e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 5061c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 5062c8d75a98SMajd Dibbiny if (unlikely(err)) 5063c8d75a98SMajd Dibbiny goto out; 5064e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5065e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 506634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5067e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 5068e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 5069e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 507034f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5071e126ba97SEli Cohen break; 5072e126ba97SEli Cohen 5073e126ba97SEli Cohen default: 5074e126ba97SEli Cohen break; 5075e126ba97SEli Cohen } 5076e126ba97SEli Cohen 5077e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 507834f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 5079e126ba97SEli Cohen if (unlikely(err)) { 5080e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5081e126ba97SEli Cohen *bad_wr = wr; 5082e126ba97SEli Cohen goto out; 5083e126ba97SEli Cohen } 5084e126ba97SEli Cohen } else { 5085e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 508634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 508734f4c955SGuy Levi &cur_edge); 5088e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 508934f4c955SGuy Levi set_data_ptr_seg 509034f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 509134f4c955SGuy Levi wr->sg_list + i); 5092e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 509334f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 5094e126ba97SEli Cohen } 5095e126ba97SEli Cohen } 5096e126ba97SEli Cohen } 5097e126ba97SEli Cohen 50986e8484c5SMax Gurtovoy qp->next_fence = next_fence; 509934f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 510034f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 5101e6631814SSagi Grimberg skip_psv: 5102e126ba97SEli Cohen if (0) 5103e126ba97SEli Cohen dump_wqe(qp, idx, size); 5104e126ba97SEli Cohen } 5105e126ba97SEli Cohen 5106e126ba97SEli Cohen out: 5107e126ba97SEli Cohen if (likely(nreq)) { 5108e126ba97SEli Cohen qp->sq.head += nreq; 5109e126ba97SEli Cohen 5110e126ba97SEli Cohen /* Make sure that descriptors are written before 5111e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5112e126ba97SEli Cohen */ 5113e126ba97SEli Cohen wmb(); 5114e126ba97SEli Cohen 5115e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5116e126ba97SEli Cohen 5117ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5118ada388f7SEli Cohen * we hit doorbell */ 5119ada388f7SEli Cohen wmb(); 5120ada388f7SEli Cohen 51215fe9dec0SEli Cohen /* currently we support only regular doorbells */ 51225fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 5123e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5124e126ba97SEli Cohen * and reach the HCA out of order. 5125e126ba97SEli Cohen */ 5126e126ba97SEli Cohen mmiowb(); 5127e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5128e126ba97SEli Cohen } 5129e126ba97SEli Cohen 5130e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5131e126ba97SEli Cohen 5132e126ba97SEli Cohen return err; 5133e126ba97SEli Cohen } 5134e126ba97SEli Cohen 5135d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5136d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5137d0e84c0aSYishai Hadas { 5138d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5139d0e84c0aSYishai Hadas } 5140d0e84c0aSYishai Hadas 5141e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5142e126ba97SEli Cohen { 5143e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5144e126ba97SEli Cohen } 5145e126ba97SEli Cohen 5146d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5147d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5148e126ba97SEli Cohen { 5149e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5150e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5151e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 515289ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 515389ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5154e126ba97SEli Cohen unsigned long flags; 5155e126ba97SEli Cohen int err = 0; 5156e126ba97SEli Cohen int nreq; 5157e126ba97SEli Cohen int ind; 5158e126ba97SEli Cohen int i; 5159e126ba97SEli Cohen 51606c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 51616c75520fSParav Pandit !drain)) { 51626c75520fSParav Pandit *bad_wr = wr; 51636c75520fSParav Pandit return -EIO; 51646c75520fSParav Pandit } 51656c75520fSParav Pandit 5166d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5167d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5168d16e91daSHaggai Eran 5169e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5170e126ba97SEli Cohen 5171e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5172e126ba97SEli Cohen 5173e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5174e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5175e126ba97SEli Cohen err = -ENOMEM; 5176e126ba97SEli Cohen *bad_wr = wr; 5177e126ba97SEli Cohen goto out; 5178e126ba97SEli Cohen } 5179e126ba97SEli Cohen 5180e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5181e126ba97SEli Cohen err = -EINVAL; 5182e126ba97SEli Cohen *bad_wr = wr; 5183e126ba97SEli Cohen goto out; 5184e126ba97SEli Cohen } 5185e126ba97SEli Cohen 518634f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5187e126ba97SEli Cohen if (qp->wq_sig) 5188e126ba97SEli Cohen scat++; 5189e126ba97SEli Cohen 5190e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5191e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5192e126ba97SEli Cohen 5193e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5194e126ba97SEli Cohen scat[i].byte_count = 0; 5195e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5196e126ba97SEli Cohen scat[i].addr = 0; 5197e126ba97SEli Cohen } 5198e126ba97SEli Cohen 5199e126ba97SEli Cohen if (qp->wq_sig) { 5200e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5201e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5202e126ba97SEli Cohen } 5203e126ba97SEli Cohen 5204e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5205e126ba97SEli Cohen 5206e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5207e126ba97SEli Cohen } 5208e126ba97SEli Cohen 5209e126ba97SEli Cohen out: 5210e126ba97SEli Cohen if (likely(nreq)) { 5211e126ba97SEli Cohen qp->rq.head += nreq; 5212e126ba97SEli Cohen 5213e126ba97SEli Cohen /* Make sure that descriptors are written before 5214e126ba97SEli Cohen * doorbell record. 5215e126ba97SEli Cohen */ 5216e126ba97SEli Cohen wmb(); 5217e126ba97SEli Cohen 5218e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5219e126ba97SEli Cohen } 5220e126ba97SEli Cohen 5221e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5222e126ba97SEli Cohen 5223e126ba97SEli Cohen return err; 5224e126ba97SEli Cohen } 5225e126ba97SEli Cohen 5226d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5227d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5228d0e84c0aSYishai Hadas { 5229d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5230d0e84c0aSYishai Hadas } 5231d0e84c0aSYishai Hadas 5232e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5233e126ba97SEli Cohen { 5234e126ba97SEli Cohen switch (mlx5_state) { 5235e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5236e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5237e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5238e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5239e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5240e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5241e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5242e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5243e126ba97SEli Cohen default: return -1; 5244e126ba97SEli Cohen } 5245e126ba97SEli Cohen } 5246e126ba97SEli Cohen 5247e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5248e126ba97SEli Cohen { 5249e126ba97SEli Cohen switch (mlx5_mig_state) { 5250e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5251e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5252e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5253e126ba97SEli Cohen default: return -1; 5254e126ba97SEli Cohen } 5255e126ba97SEli Cohen } 5256e126ba97SEli Cohen 5257e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5258e126ba97SEli Cohen { 5259e126ba97SEli Cohen int ib_flags = 0; 5260e126ba97SEli Cohen 5261e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5262e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5263e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5264e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5265e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5266e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5267e126ba97SEli Cohen 5268e126ba97SEli Cohen return ib_flags; 5269e126ba97SEli Cohen } 5270e126ba97SEli Cohen 527138349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5272d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5273e126ba97SEli Cohen struct mlx5_qp_path *path) 5274e126ba97SEli Cohen { 5275e126ba97SEli Cohen 5276d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5277e126ba97SEli Cohen 5278e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5279e126ba97SEli Cohen return; 5280e126ba97SEli Cohen 5281ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5282ae59c3f0SLeon Romanovsky 5283d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5284d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5285e126ba97SEli Cohen 5286d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5287d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5288d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5289d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5290d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5291d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5292d8966fcdSDasaratharaman Chandramouli 5293d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5294d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5295d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5296d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5297d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5298d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5299e126ba97SEli Cohen } 5300e126ba97SEli Cohen } 5301e126ba97SEli Cohen 53026d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 53036d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 53046d2f89dfSmajd@mellanox.com u8 *sq_state) 5305e126ba97SEli Cohen { 53066d2f89dfSmajd@mellanox.com int err; 53076d2f89dfSmajd@mellanox.com 530828160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 53096d2f89dfSmajd@mellanox.com if (err) 53106d2f89dfSmajd@mellanox.com goto out; 53116d2f89dfSmajd@mellanox.com sq->state = *sq_state; 53126d2f89dfSmajd@mellanox.com 53136d2f89dfSmajd@mellanox.com out: 53146d2f89dfSmajd@mellanox.com return err; 53156d2f89dfSmajd@mellanox.com } 53166d2f89dfSmajd@mellanox.com 53176d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 53186d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 53196d2f89dfSmajd@mellanox.com u8 *rq_state) 53206d2f89dfSmajd@mellanox.com { 53216d2f89dfSmajd@mellanox.com void *out; 53226d2f89dfSmajd@mellanox.com void *rqc; 53236d2f89dfSmajd@mellanox.com int inlen; 53246d2f89dfSmajd@mellanox.com int err; 53256d2f89dfSmajd@mellanox.com 53266d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 53271b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 53286d2f89dfSmajd@mellanox.com if (!out) 53296d2f89dfSmajd@mellanox.com return -ENOMEM; 53306d2f89dfSmajd@mellanox.com 53316d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 53326d2f89dfSmajd@mellanox.com if (err) 53336d2f89dfSmajd@mellanox.com goto out; 53346d2f89dfSmajd@mellanox.com 53356d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 53366d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 53376d2f89dfSmajd@mellanox.com rq->state = *rq_state; 53386d2f89dfSmajd@mellanox.com 53396d2f89dfSmajd@mellanox.com out: 53406d2f89dfSmajd@mellanox.com kvfree(out); 53416d2f89dfSmajd@mellanox.com return err; 53426d2f89dfSmajd@mellanox.com } 53436d2f89dfSmajd@mellanox.com 53446d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 53456d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 53466d2f89dfSmajd@mellanox.com { 53476d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 53486d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 53496d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 53506d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 53516d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 53526d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 53536d2f89dfSmajd@mellanox.com }, 53546d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 53556d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 53566d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 53576d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 53586d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 53596d2f89dfSmajd@mellanox.com }, 53606d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 53616d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 53626d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 53636d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 53646d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 53656d2f89dfSmajd@mellanox.com }, 53666d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 53676d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 53686d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 53696d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 53706d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 53716d2f89dfSmajd@mellanox.com }, 53726d2f89dfSmajd@mellanox.com }; 53736d2f89dfSmajd@mellanox.com 53746d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 53756d2f89dfSmajd@mellanox.com 53766d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 53776d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 53786d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 53796d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 53806d2f89dfSmajd@mellanox.com return -EINVAL; 53816d2f89dfSmajd@mellanox.com } 53826d2f89dfSmajd@mellanox.com 53836d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 53846d2f89dfSmajd@mellanox.com *qp_state = qp->state; 53856d2f89dfSmajd@mellanox.com 53866d2f89dfSmajd@mellanox.com return 0; 53876d2f89dfSmajd@mellanox.com } 53886d2f89dfSmajd@mellanox.com 53896d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 53906d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 53916d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 53926d2f89dfSmajd@mellanox.com { 53936d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 53946d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 53956d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 53966d2f89dfSmajd@mellanox.com int err; 53976d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 53986d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 53996d2f89dfSmajd@mellanox.com 54006d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 54016d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 54026d2f89dfSmajd@mellanox.com if (err) 54036d2f89dfSmajd@mellanox.com return err; 54046d2f89dfSmajd@mellanox.com } 54056d2f89dfSmajd@mellanox.com 54066d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 54076d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 54086d2f89dfSmajd@mellanox.com if (err) 54096d2f89dfSmajd@mellanox.com return err; 54106d2f89dfSmajd@mellanox.com } 54116d2f89dfSmajd@mellanox.com 54126d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 54136d2f89dfSmajd@mellanox.com raw_packet_qp_state); 54146d2f89dfSmajd@mellanox.com } 54156d2f89dfSmajd@mellanox.com 54166d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 54176d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 54186d2f89dfSmajd@mellanox.com { 541909a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5420e126ba97SEli Cohen struct mlx5_qp_context *context; 5421e126ba97SEli Cohen int mlx5_state; 542209a7d9ecSSaeed Mahameed u32 *outb; 5423e126ba97SEli Cohen int err = 0; 5424e126ba97SEli Cohen 542509a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 54266d2f89dfSmajd@mellanox.com if (!outb) 54276d2f89dfSmajd@mellanox.com return -ENOMEM; 54286d2f89dfSmajd@mellanox.com 542919098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 543009a7d9ecSSaeed Mahameed outlen); 5431e126ba97SEli Cohen if (err) 54326d2f89dfSmajd@mellanox.com goto out; 5433e126ba97SEli Cohen 543409a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 543509a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 543609a7d9ecSSaeed Mahameed 5437e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5438e126ba97SEli Cohen 5439e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5440e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5441e126ba97SEli Cohen qp_attr->path_mig_state = 5442e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5443e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5444e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5445e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5446e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5447e126ba97SEli Cohen qp_attr->qp_access_flags = 5448e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5449e126ba97SEli Cohen 5450e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 545138349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 545238349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5453d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5454d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5455d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5456d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5457e126ba97SEli Cohen } 5458e126ba97SEli Cohen 5459d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5460e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5461e126ba97SEli Cohen 5462e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5463e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5464e126ba97SEli Cohen 5465e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5466e126ba97SEli Cohen 5467e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5468e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5469e126ba97SEli Cohen qp_attr->min_rnr_timer = 5470e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5471e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5472e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5473e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5474e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 54756d2f89dfSmajd@mellanox.com 54766d2f89dfSmajd@mellanox.com out: 54776d2f89dfSmajd@mellanox.com kfree(outb); 54786d2f89dfSmajd@mellanox.com return err; 54796d2f89dfSmajd@mellanox.com } 54806d2f89dfSmajd@mellanox.com 5481776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5482776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5483776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5484776a3906SMoni Shoua { 5485776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5486776a3906SMoni Shoua u32 *out; 5487776a3906SMoni Shoua u32 access_flags = 0; 5488776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5489776a3906SMoni Shoua void *dctc; 5490776a3906SMoni Shoua int err; 5491776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5492776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5493776a3906SMoni Shoua IB_QP_PORT | 5494776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5495776a3906SMoni Shoua IB_QP_AV | 5496776a3906SMoni Shoua IB_QP_PATH_MTU | 5497776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5498776a3906SMoni Shoua 5499776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5500776a3906SMoni Shoua return -EINVAL; 5501776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5502776a3906SMoni Shoua return -EINVAL; 5503776a3906SMoni Shoua 5504776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5505776a3906SMoni Shoua if (!out) 5506776a3906SMoni Shoua return -ENOMEM; 5507776a3906SMoni Shoua 5508776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5509776a3906SMoni Shoua if (err) 5510776a3906SMoni Shoua goto out; 5511776a3906SMoni Shoua 5512776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5513776a3906SMoni Shoua 5514776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5515776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5516776a3906SMoni Shoua 5517776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5518776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5519776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5520776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5521776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5522776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5523776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5524776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5525776a3906SMoni Shoua } 5526776a3906SMoni Shoua 5527776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5528776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5529776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5530776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5531776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5532776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5533776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5534776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5535776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5536776a3906SMoni Shoua } 5537776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5538776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5539776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5540776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5541776a3906SMoni Shoua out: 5542776a3906SMoni Shoua kfree(out); 5543776a3906SMoni Shoua return err; 5544776a3906SMoni Shoua } 5545776a3906SMoni Shoua 55466d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 55476d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 55486d2f89dfSmajd@mellanox.com { 55496d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 55506d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 55516d2f89dfSmajd@mellanox.com int err = 0; 55526d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 55536d2f89dfSmajd@mellanox.com 555428d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 555528d61370SYishai Hadas return -ENOSYS; 555628d61370SYishai Hadas 5557d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5558d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5559d16e91daSHaggai Eran qp_init_attr); 5560d16e91daSHaggai Eran 5561c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5562c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5563c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5564c2e53b2cSYishai Hadas 5565776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5566776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5567776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5568776a3906SMoni Shoua 55696d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 55706d2f89dfSmajd@mellanox.com 5571c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5572c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 55736d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 55746d2f89dfSmajd@mellanox.com if (err) 55756d2f89dfSmajd@mellanox.com goto out; 55766d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 55776d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 55786d2f89dfSmajd@mellanox.com } else { 55796d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 55806d2f89dfSmajd@mellanox.com if (err) 55816d2f89dfSmajd@mellanox.com goto out; 55826d2f89dfSmajd@mellanox.com } 55836d2f89dfSmajd@mellanox.com 55846d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5585e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5586e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5587e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5588e126ba97SEli Cohen 5589e126ba97SEli Cohen if (!ibqp->uobject) { 55900540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5591e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 55920540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5593e126ba97SEli Cohen } else { 5594e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5595e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5596e126ba97SEli Cohen } 5597e126ba97SEli Cohen 55980540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 55990540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 56000540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 56010540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 56020540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5603e126ba97SEli Cohen 5604e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5605e126ba97SEli Cohen 5606e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5607e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5608e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5609e126ba97SEli Cohen 5610051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5611051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5612051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5613051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5614051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5615051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5616b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5617b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5618051f2630SLeon Romanovsky 5619e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5620e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5621e126ba97SEli Cohen 5622e126ba97SEli Cohen out: 5623e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5624e126ba97SEli Cohen return err; 5625e126ba97SEli Cohen } 5626e126ba97SEli Cohen 5627e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5628e126ba97SEli Cohen struct ib_ucontext *context, 5629e126ba97SEli Cohen struct ib_udata *udata) 5630e126ba97SEli Cohen { 5631e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5632e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5633e126ba97SEli Cohen int err; 5634e126ba97SEli Cohen 5635938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5636e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5637e126ba97SEli Cohen 5638e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5639e126ba97SEli Cohen if (!xrcd) 5640e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5641e126ba97SEli Cohen 56425aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 5643e126ba97SEli Cohen if (err) { 5644e126ba97SEli Cohen kfree(xrcd); 5645e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5646e126ba97SEli Cohen } 5647e126ba97SEli Cohen 5648e126ba97SEli Cohen return &xrcd->ibxrcd; 5649e126ba97SEli Cohen } 5650e126ba97SEli Cohen 5651e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5652e126ba97SEli Cohen { 5653e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5654e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5655e126ba97SEli Cohen int err; 5656e126ba97SEli Cohen 56575aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 5658b081808aSLeon Romanovsky if (err) 5659e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5660e126ba97SEli Cohen 5661e126ba97SEli Cohen kfree(xrcd); 5662e126ba97SEli Cohen return 0; 5663e126ba97SEli Cohen } 566479b20a6cSYishai Hadas 5665350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5666350d0e4cSYishai Hadas { 5667350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5668350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5669350d0e4cSYishai Hadas struct ib_event event; 5670350d0e4cSYishai Hadas 5671350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5672350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5673350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5674350d0e4cSYishai Hadas switch (type) { 5675350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5676350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5677350d0e4cSYishai Hadas break; 5678350d0e4cSYishai Hadas default: 5679350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5680350d0e4cSYishai Hadas return; 5681350d0e4cSYishai Hadas } 5682350d0e4cSYishai Hadas 5683350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5684350d0e4cSYishai Hadas } 5685350d0e4cSYishai Hadas } 5686350d0e4cSYishai Hadas 568703404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 568803404e8aSMaor Gottlieb { 568903404e8aSMaor Gottlieb int err = 0; 569003404e8aSMaor Gottlieb 569103404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 569203404e8aSMaor Gottlieb if (dev->delay_drop.activate) 569303404e8aSMaor Gottlieb goto out; 569403404e8aSMaor Gottlieb 569503404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 569603404e8aSMaor Gottlieb if (err) 569703404e8aSMaor Gottlieb goto out; 569803404e8aSMaor Gottlieb 569903404e8aSMaor Gottlieb dev->delay_drop.activate = true; 570003404e8aSMaor Gottlieb out: 570103404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5702fe248c3aSMaor Gottlieb 5703fe248c3aSMaor Gottlieb if (!err) 5704fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 570503404e8aSMaor Gottlieb return err; 570603404e8aSMaor Gottlieb } 570703404e8aSMaor Gottlieb 570879b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 570979b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 571079b20a6cSYishai Hadas { 571179b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 57124be6da1eSNoa Osherovich int has_net_offloads; 571379b20a6cSYishai Hadas __be64 *rq_pas0; 571479b20a6cSYishai Hadas void *in; 571579b20a6cSYishai Hadas void *rqc; 571679b20a6cSYishai Hadas void *wq; 571779b20a6cSYishai Hadas int inlen; 571879b20a6cSYishai Hadas int err; 571979b20a6cSYishai Hadas 572079b20a6cSYishai Hadas dev = to_mdev(pd->device); 572179b20a6cSYishai Hadas 572279b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 57231b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 572479b20a6cSYishai Hadas if (!in) 572579b20a6cSYishai Hadas return -ENOMEM; 572679b20a6cSYishai Hadas 572734d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 572879b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 572979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 573079b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 573179b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 573279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 573379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 573479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 573579b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5736ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5737ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5738ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5739b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5740b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5741b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5742b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5743b1383aa6SNoa Osherovich goto out; 5744b1383aa6SNoa Osherovich } else { 574579b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5746b1383aa6SNoa Osherovich } 5747b1383aa6SNoa Osherovich } 574879b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5749ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5750ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5751ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5752ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5753ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5754ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5755ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5756ccc87087SNoa Osherovich } 575779b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 575879b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 575979b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 576079b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 576179b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 576279b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 57634be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5764b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 57654be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5766b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5767b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5768b1f74a84SNoa Osherovich goto out; 5769b1f74a84SNoa Osherovich } 5770b1f74a84SNoa Osherovich } else { 5771b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5772b1f74a84SNoa Osherovich } 57734be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 57744be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 57754be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 57764be6da1eSNoa Osherovich err = -EOPNOTSUPP; 57774be6da1eSNoa Osherovich goto out; 57784be6da1eSNoa Osherovich } 57794be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 57804be6da1eSNoa Osherovich } 578103404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 578203404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 578303404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 578403404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 578503404e8aSMaor Gottlieb err = -EOPNOTSUPP; 578603404e8aSMaor Gottlieb goto out; 578703404e8aSMaor Gottlieb } 578803404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 578903404e8aSMaor Gottlieb } 579079b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 579179b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5792350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 579303404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 579403404e8aSMaor Gottlieb err = set_delay_drop(dev); 579503404e8aSMaor Gottlieb if (err) { 579603404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 579703404e8aSMaor Gottlieb err); 579803404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 579903404e8aSMaor Gottlieb } else { 580003404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 580103404e8aSMaor Gottlieb } 580203404e8aSMaor Gottlieb } 5803b1f74a84SNoa Osherovich out: 580479b20a6cSYishai Hadas kvfree(in); 580579b20a6cSYishai Hadas return err; 580679b20a6cSYishai Hadas } 580779b20a6cSYishai Hadas 580879b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 580979b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 581079b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 581179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 581279b20a6cSYishai Hadas { 581379b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 581479b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 581579b20a6cSYishai Hadas return -EINVAL; 581679b20a6cSYishai Hadas 581779b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 581879b20a6cSYishai Hadas return -EINVAL; 581979b20a6cSYishai Hadas 582079b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 582179b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 58220dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 58230dfe4522SLeon Romanovsky return -EINVAL; 58240dfe4522SLeon Romanovsky 582579b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 582679b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 582779b20a6cSYishai Hadas return 0; 582879b20a6cSYishai Hadas } 582979b20a6cSYishai Hadas 583079b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 583179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 583279b20a6cSYishai Hadas struct ib_udata *udata, 583379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 583479b20a6cSYishai Hadas { 583579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 583679b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 583779b20a6cSYishai Hadas int err; 583879b20a6cSYishai Hadas size_t required_cmd_sz; 583979b20a6cSYishai Hadas 5840ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5841ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 584279b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 584379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 584479b20a6cSYishai Hadas return -EINVAL; 584579b20a6cSYishai Hadas } 584679b20a6cSYishai Hadas 584779b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 584879b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 584979b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 585079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 585179b20a6cSYishai Hadas return -EOPNOTSUPP; 585279b20a6cSYishai Hadas } 585379b20a6cSYishai Hadas 585479b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 585579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 585679b20a6cSYishai Hadas return -EFAULT; 585779b20a6cSYishai Hadas } 585879b20a6cSYishai Hadas 5859ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 586079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 586179b20a6cSYishai Hadas return -EOPNOTSUPP; 5862ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5863ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5864ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 586579b20a6cSYishai Hadas return -EOPNOTSUPP; 586679b20a6cSYishai Hadas } 5867ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5868ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5869ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5870ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5871ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5872ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5873ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5874ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5875ccc87087SNoa Osherovich return -EINVAL; 5876ccc87087SNoa Osherovich } 5877ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5878ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5879ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5880ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5881ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5882ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5883ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5884ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5885ccc87087SNoa Osherovich return -EINVAL; 5886ccc87087SNoa Osherovich } 5887ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5888ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5889ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5890ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5891ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5892ccc87087SNoa Osherovich } 589379b20a6cSYishai Hadas 589479b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 589579b20a6cSYishai Hadas if (err) { 589679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 589779b20a6cSYishai Hadas return err; 589879b20a6cSYishai Hadas } 589979b20a6cSYishai Hadas 5900b0ea0fa5SJason Gunthorpe err = create_user_rq(dev, pd, udata, rwq, &ucmd); 590179b20a6cSYishai Hadas if (err) { 590279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 590379b20a6cSYishai Hadas return err; 590479b20a6cSYishai Hadas } 590579b20a6cSYishai Hadas 590679b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 590779b20a6cSYishai Hadas return 0; 590879b20a6cSYishai Hadas } 590979b20a6cSYishai Hadas 591079b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 591179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 591279b20a6cSYishai Hadas struct ib_udata *udata) 591379b20a6cSYishai Hadas { 591479b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 591579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 591679b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 591779b20a6cSYishai Hadas size_t min_resp_len; 591879b20a6cSYishai Hadas int err; 591979b20a6cSYishai Hadas 592079b20a6cSYishai Hadas if (!udata) 592179b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 592279b20a6cSYishai Hadas 592379b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 592479b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 592579b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 592679b20a6cSYishai Hadas 592779b20a6cSYishai Hadas dev = to_mdev(pd->device); 592879b20a6cSYishai Hadas switch (init_attr->wq_type) { 592979b20a6cSYishai Hadas case IB_WQT_RQ: 593079b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 593179b20a6cSYishai Hadas if (!rwq) 593279b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 593379b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 593479b20a6cSYishai Hadas if (err) 593579b20a6cSYishai Hadas goto err; 593679b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 593779b20a6cSYishai Hadas if (err) 593879b20a6cSYishai Hadas goto err_user_rq; 593979b20a6cSYishai Hadas break; 594079b20a6cSYishai Hadas default: 594179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 594279b20a6cSYishai Hadas init_attr->wq_type); 594379b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 594479b20a6cSYishai Hadas } 594579b20a6cSYishai Hadas 5946350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 594779b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 594879b20a6cSYishai Hadas if (udata->outlen) { 594979b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 595079b20a6cSYishai Hadas sizeof(resp.response_length); 595179b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 595279b20a6cSYishai Hadas if (err) 595379b20a6cSYishai Hadas goto err_copy; 595479b20a6cSYishai Hadas } 595579b20a6cSYishai Hadas 5956350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5957350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 595879b20a6cSYishai Hadas return &rwq->ibwq; 595979b20a6cSYishai Hadas 596079b20a6cSYishai Hadas err_copy: 5961350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 596279b20a6cSYishai Hadas err_user_rq: 5963fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 596479b20a6cSYishai Hadas err: 596579b20a6cSYishai Hadas kfree(rwq); 596679b20a6cSYishai Hadas return ERR_PTR(err); 596779b20a6cSYishai Hadas } 596879b20a6cSYishai Hadas 596979b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 597079b20a6cSYishai Hadas { 597179b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 597279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 597379b20a6cSYishai Hadas 5974350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5975fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 597679b20a6cSYishai Hadas kfree(rwq); 597779b20a6cSYishai Hadas 597879b20a6cSYishai Hadas return 0; 597979b20a6cSYishai Hadas } 598079b20a6cSYishai Hadas 5981c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5982c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5983c5f90929SYishai Hadas struct ib_udata *udata) 5984c5f90929SYishai Hadas { 5985c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5986c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5987c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5988c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5989c5f90929SYishai Hadas size_t min_resp_len; 5990c5f90929SYishai Hadas int inlen; 5991c5f90929SYishai Hadas int err; 5992c5f90929SYishai Hadas int i; 5993c5f90929SYishai Hadas u32 *in; 5994c5f90929SYishai Hadas void *rqtc; 5995c5f90929SYishai Hadas 5996c5f90929SYishai Hadas if (udata->inlen > 0 && 5997c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5998c5f90929SYishai Hadas udata->inlen)) 5999c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 6000c5f90929SYishai Hadas 6001efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 6002efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 6003efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 6004efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 6005efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 6006efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 6007efd7f400SMaor Gottlieb } 6008efd7f400SMaor Gottlieb 6009c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 6010c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 6011c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 6012c5f90929SYishai Hadas 6013c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 6014c5f90929SYishai Hadas if (!rwq_ind_tbl) 6015c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 6016c5f90929SYishai Hadas 6017c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 60181b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 6019c5f90929SYishai Hadas if (!in) { 6020c5f90929SYishai Hadas err = -ENOMEM; 6021c5f90929SYishai Hadas goto err; 6022c5f90929SYishai Hadas } 6023c5f90929SYishai Hadas 6024c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 6025c5f90929SYishai Hadas 6026c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 6027c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 6028c5f90929SYishai Hadas 6029c5f90929SYishai Hadas for (i = 0; i < sz; i++) 6030c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 6031c5f90929SYishai Hadas 60325deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 60335deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 60345deba86eSYishai Hadas 6035c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 6036c5f90929SYishai Hadas kvfree(in); 6037c5f90929SYishai Hadas 6038c5f90929SYishai Hadas if (err) 6039c5f90929SYishai Hadas goto err; 6040c5f90929SYishai Hadas 6041c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 6042c5f90929SYishai Hadas if (udata->outlen) { 6043c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 6044c5f90929SYishai Hadas sizeof(resp.response_length); 6045c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 6046c5f90929SYishai Hadas if (err) 6047c5f90929SYishai Hadas goto err_copy; 6048c5f90929SYishai Hadas } 6049c5f90929SYishai Hadas 6050c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 6051c5f90929SYishai Hadas 6052c5f90929SYishai Hadas err_copy: 60535deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6054c5f90929SYishai Hadas err: 6055c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6056c5f90929SYishai Hadas return ERR_PTR(err); 6057c5f90929SYishai Hadas } 6058c5f90929SYishai Hadas 6059c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 6060c5f90929SYishai Hadas { 6061c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 6062c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 6063c5f90929SYishai Hadas 60645deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6065c5f90929SYishai Hadas 6066c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6067c5f90929SYishai Hadas return 0; 6068c5f90929SYishai Hadas } 6069c5f90929SYishai Hadas 607079b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 607179b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 607279b20a6cSYishai Hadas { 607379b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 607479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 607579b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 607679b20a6cSYishai Hadas size_t required_cmd_sz; 607779b20a6cSYishai Hadas int curr_wq_state; 607879b20a6cSYishai Hadas int wq_state; 607979b20a6cSYishai Hadas int inlen; 608079b20a6cSYishai Hadas int err; 608179b20a6cSYishai Hadas void *rqc; 608279b20a6cSYishai Hadas void *in; 608379b20a6cSYishai Hadas 608479b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 608579b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 608679b20a6cSYishai Hadas return -EINVAL; 608779b20a6cSYishai Hadas 608879b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 608979b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 609079b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 609179b20a6cSYishai Hadas return -EOPNOTSUPP; 609279b20a6cSYishai Hadas 609379b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 609479b20a6cSYishai Hadas return -EFAULT; 609579b20a6cSYishai Hadas 609679b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 609779b20a6cSYishai Hadas return -EOPNOTSUPP; 609879b20a6cSYishai Hadas 609979b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 61001b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 610179b20a6cSYishai Hadas if (!in) 610279b20a6cSYishai Hadas return -ENOMEM; 610379b20a6cSYishai Hadas 610479b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 610579b20a6cSYishai Hadas 610679b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 610779b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 610879b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 610979b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 611079b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 611179b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 611279b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 611379b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 611479b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 611534d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 611679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 611779b20a6cSYishai Hadas 6118b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6119b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6120b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6121b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6122b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6123b1f74a84SNoa Osherovich "supported\n"); 6124b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6125b1f74a84SNoa Osherovich goto out; 6126b1f74a84SNoa Osherovich } 6127b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6128b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6129b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6130b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6131b1f74a84SNoa Osherovich } 6132b1383aa6SNoa Osherovich 6133b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6134b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6135b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6136b1383aa6SNoa Osherovich goto out; 6137b1383aa6SNoa Osherovich } 6138b1f74a84SNoa Osherovich } 6139b1f74a84SNoa Osherovich 614023a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 614123a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 614223a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 614323a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 6144e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 6145e1f24a79SParav Pandit dev->port->cnts.set_id); 614623a6964eSMajd Dibbiny } else 61475a738b5dSJason Gunthorpe dev_info_once( 61485a738b5dSJason Gunthorpe &dev->ib_dev.dev, 61495a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 615023a6964eSMajd Dibbiny } 615123a6964eSMajd Dibbiny 6152350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 615379b20a6cSYishai Hadas if (!err) 615479b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 615579b20a6cSYishai Hadas 6156b1f74a84SNoa Osherovich out: 6157b1f74a84SNoa Osherovich kvfree(in); 615879b20a6cSYishai Hadas return err; 615979b20a6cSYishai Hadas } 6160d0e84c0aSYishai Hadas 6161d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6162d0e84c0aSYishai Hadas struct ib_cqe cqe; 6163d0e84c0aSYishai Hadas struct completion done; 6164d0e84c0aSYishai Hadas }; 6165d0e84c0aSYishai Hadas 6166d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6167d0e84c0aSYishai Hadas { 6168d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6169d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6170d0e84c0aSYishai Hadas cqe); 6171d0e84c0aSYishai Hadas 6172d0e84c0aSYishai Hadas complete(&cqe->done); 6173d0e84c0aSYishai Hadas } 6174d0e84c0aSYishai Hadas 6175d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6176d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6177d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6178d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6179d0e84c0aSYishai Hadas { 6180d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6181d0e84c0aSYishai Hadas 6182d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6183d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6184d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6185d0e84c0aSYishai Hadas return; 6186d0e84c0aSYishai Hadas } 6187d0e84c0aSYishai Hadas 6188d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6189d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6190d0e84c0aSYishai Hadas bool triggered = false; 6191d0e84c0aSYishai Hadas unsigned long flags; 6192d0e84c0aSYishai Hadas 6193d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6194d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6195d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6196d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6197d0e84c0aSYishai Hadas else 6198d0e84c0aSYishai Hadas triggered = true; 6199d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6200d0e84c0aSYishai Hadas 6201d0e84c0aSYishai Hadas if (triggered) { 6202d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6203d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6204d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6205d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6206d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6207d0e84c0aSYishai Hadas break; 6208d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6209d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6210d0e84c0aSYishai Hadas break; 6211d0e84c0aSYishai Hadas default: 6212d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6213d0e84c0aSYishai Hadas } 6214d0e84c0aSYishai Hadas } 6215d0e84c0aSYishai Hadas 6216d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6217d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6218d0e84c0aSYishai Hadas */ 6219d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 6220d0e84c0aSYishai Hadas } 6221d0e84c0aSYishai Hadas 6222d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6223d0e84c0aSYishai Hadas } 6224d0e84c0aSYishai Hadas 6225d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6226d0e84c0aSYishai Hadas { 6227d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6228d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6229d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6230d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6231d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6232d0e84c0aSYishai Hadas .wr = { 6233d0e84c0aSYishai Hadas .next = NULL, 6234d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6235d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6236d0e84c0aSYishai Hadas }, 6237d0e84c0aSYishai Hadas }; 6238d0e84c0aSYishai Hadas int ret; 6239d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6240d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6241d0e84c0aSYishai Hadas 6242d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6243d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6244d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6245d0e84c0aSYishai Hadas return; 6246d0e84c0aSYishai Hadas } 6247d0e84c0aSYishai Hadas 6248d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6249d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6250d0e84c0aSYishai Hadas 6251d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6252d0e84c0aSYishai Hadas if (ret) { 6253d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6254d0e84c0aSYishai Hadas return; 6255d0e84c0aSYishai Hadas } 6256d0e84c0aSYishai Hadas 6257d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6258d0e84c0aSYishai Hadas } 6259d0e84c0aSYishai Hadas 6260d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6261d0e84c0aSYishai Hadas { 6262d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6263d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6264d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6265d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6266d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6267d0e84c0aSYishai Hadas int ret; 6268d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6269d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6270d0e84c0aSYishai Hadas 6271d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6272d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6273d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6274d0e84c0aSYishai Hadas return; 6275d0e84c0aSYishai Hadas } 6276d0e84c0aSYishai Hadas 6277d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6278d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6279d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6280d0e84c0aSYishai Hadas 6281d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6282d0e84c0aSYishai Hadas if (ret) { 6283d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6284d0e84c0aSYishai Hadas return; 6285d0e84c0aSYishai Hadas } 6286d0e84c0aSYishai Hadas 6287d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6288d0e84c0aSYishai Hadas } 6289