1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111c1395a2aSHaggai Eran /** 112fbeb4075SMoni Shoua * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ 113fbeb4075SMoni Shoua * to kernel buffer 114c1395a2aSHaggai Eran * 115fbeb4075SMoni Shoua * @umem: User space memory where the WQ is 116fbeb4075SMoni Shoua * @buffer: buffer to copy to 117fbeb4075SMoni Shoua * @buflen: buffer length 118fbeb4075SMoni Shoua * @wqe_index: index of WQE to copy from 119fbeb4075SMoni Shoua * @wq_offset: offset to start of WQ 120fbeb4075SMoni Shoua * @wq_wqe_cnt: number of WQEs in WQ 121fbeb4075SMoni Shoua * @wq_wqe_shift: log2 of WQE size 122fbeb4075SMoni Shoua * @bcnt: number of bytes to copy 123fbeb4075SMoni Shoua * @bytes_copied: number of bytes to copy (return value) 124c1395a2aSHaggai Eran * 125fbeb4075SMoni Shoua * Copies from start of WQE bcnt or less bytes. 126fbeb4075SMoni Shoua * Does not gurantee to copy the entire WQE. 127c1395a2aSHaggai Eran * 128fbeb4075SMoni Shoua * Return: zero on success, or an error code. 129c1395a2aSHaggai Eran */ 130fbeb4075SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, 131fbeb4075SMoni Shoua void *buffer, 132fbeb4075SMoni Shoua u32 buflen, 133fbeb4075SMoni Shoua int wqe_index, 134fbeb4075SMoni Shoua int wq_offset, 135fbeb4075SMoni Shoua int wq_wqe_cnt, 136fbeb4075SMoni Shoua int wq_wqe_shift, 137fbeb4075SMoni Shoua int bcnt, 138fbeb4075SMoni Shoua size_t *bytes_copied) 139c1395a2aSHaggai Eran { 140fbeb4075SMoni Shoua size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift); 141fbeb4075SMoni Shoua size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift); 142fbeb4075SMoni Shoua size_t copy_length; 143c1395a2aSHaggai Eran int ret; 144c1395a2aSHaggai Eran 145fbeb4075SMoni Shoua /* don't copy more than requested, more than buffer length or 146fbeb4075SMoni Shoua * beyond WQ end 147fbeb4075SMoni Shoua */ 148fbeb4075SMoni Shoua copy_length = min_t(u32, buflen, wq_end - offset); 149fbeb4075SMoni Shoua copy_length = min_t(u32, copy_length, bcnt); 150c1395a2aSHaggai Eran 151fbeb4075SMoni Shoua ret = ib_umem_copy_from(buffer, umem, offset, copy_length); 152c1395a2aSHaggai Eran if (ret) 153c1395a2aSHaggai Eran return ret; 154c1395a2aSHaggai Eran 155fbeb4075SMoni Shoua if (!ret && bytes_copied) 156fbeb4075SMoni Shoua *bytes_copied = copy_length; 157c1395a2aSHaggai Eran 158fbeb4075SMoni Shoua return 0; 159fbeb4075SMoni Shoua } 160fbeb4075SMoni Shoua 161fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, 162fbeb4075SMoni Shoua int wqe_index, 163fbeb4075SMoni Shoua void *buffer, 164fbeb4075SMoni Shoua int buflen, 165fbeb4075SMoni Shoua size_t *bc) 166fbeb4075SMoni Shoua { 167fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 168fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 169fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->sq; 170fbeb4075SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 171fbeb4075SMoni Shoua size_t bytes_copied; 172fbeb4075SMoni Shoua size_t bytes_copied2; 173fbeb4075SMoni Shoua size_t wqe_length; 174fbeb4075SMoni Shoua int ret; 175fbeb4075SMoni Shoua int ds; 176fbeb4075SMoni Shoua 177fbeb4075SMoni Shoua if (buflen < sizeof(*ctrl)) 178fbeb4075SMoni Shoua return -EINVAL; 179fbeb4075SMoni Shoua 180fbeb4075SMoni Shoua /* at first read as much as possible */ 181fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 182fbeb4075SMoni Shoua buffer, 183fbeb4075SMoni Shoua buflen, 184fbeb4075SMoni Shoua wqe_index, 185fbeb4075SMoni Shoua wq->offset, 186fbeb4075SMoni Shoua wq->wqe_cnt, 187fbeb4075SMoni Shoua wq->wqe_shift, 188fbeb4075SMoni Shoua buflen, 189fbeb4075SMoni Shoua &bytes_copied); 190fbeb4075SMoni Shoua if (ret) 191fbeb4075SMoni Shoua return ret; 192fbeb4075SMoni Shoua 193fbeb4075SMoni Shoua /* we need at least control segment size to proceed */ 194fbeb4075SMoni Shoua if (bytes_copied < sizeof(*ctrl)) 195fbeb4075SMoni Shoua return -EINVAL; 196fbeb4075SMoni Shoua 197fbeb4075SMoni Shoua ctrl = buffer; 198fbeb4075SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 199c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 200fbeb4075SMoni Shoua 201fbeb4075SMoni Shoua /* if we copied enough then we are done */ 202fbeb4075SMoni Shoua if (bytes_copied >= wqe_length) { 203fbeb4075SMoni Shoua *bc = bytes_copied; 204fbeb4075SMoni Shoua return 0; 205c1395a2aSHaggai Eran } 206c1395a2aSHaggai Eran 207fbeb4075SMoni Shoua /* otherwise this a wrapped around wqe 208fbeb4075SMoni Shoua * so read the remaining bytes starting 209fbeb4075SMoni Shoua * from wqe_index 0 210fbeb4075SMoni Shoua */ 211fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 212fbeb4075SMoni Shoua buffer + bytes_copied, 213fbeb4075SMoni Shoua buflen - bytes_copied, 214fbeb4075SMoni Shoua 0, 215fbeb4075SMoni Shoua wq->offset, 216fbeb4075SMoni Shoua wq->wqe_cnt, 217fbeb4075SMoni Shoua wq->wqe_shift, 218fbeb4075SMoni Shoua wqe_length - bytes_copied, 219fbeb4075SMoni Shoua &bytes_copied2); 220c1395a2aSHaggai Eran 221c1395a2aSHaggai Eran if (ret) 222c1395a2aSHaggai Eran return ret; 223fbeb4075SMoni Shoua *bc = bytes_copied + bytes_copied2; 224fbeb4075SMoni Shoua return 0; 225fbeb4075SMoni Shoua } 226c1395a2aSHaggai Eran 227fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, 228fbeb4075SMoni Shoua int wqe_index, 229fbeb4075SMoni Shoua void *buffer, 230fbeb4075SMoni Shoua int buflen, 231fbeb4075SMoni Shoua size_t *bc) 232fbeb4075SMoni Shoua { 233fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 234fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 235fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 236fbeb4075SMoni Shoua size_t bytes_copied; 237fbeb4075SMoni Shoua int ret; 238fbeb4075SMoni Shoua 239fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 240fbeb4075SMoni Shoua buffer, 241fbeb4075SMoni Shoua buflen, 242fbeb4075SMoni Shoua wqe_index, 243fbeb4075SMoni Shoua wq->offset, 244fbeb4075SMoni Shoua wq->wqe_cnt, 245fbeb4075SMoni Shoua wq->wqe_shift, 246fbeb4075SMoni Shoua buflen, 247fbeb4075SMoni Shoua &bytes_copied); 248fbeb4075SMoni Shoua 249fbeb4075SMoni Shoua if (ret) 250fbeb4075SMoni Shoua return ret; 251fbeb4075SMoni Shoua *bc = bytes_copied; 252fbeb4075SMoni Shoua return 0; 253fbeb4075SMoni Shoua } 254fbeb4075SMoni Shoua 255fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, 256fbeb4075SMoni Shoua int wqe_index, 257fbeb4075SMoni Shoua void *buffer, 258fbeb4075SMoni Shoua int buflen, 259fbeb4075SMoni Shoua size_t *bc) 260fbeb4075SMoni Shoua { 261fbeb4075SMoni Shoua struct ib_umem *umem = srq->umem; 262fbeb4075SMoni Shoua size_t bytes_copied; 263fbeb4075SMoni Shoua int ret; 264fbeb4075SMoni Shoua 265fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 266fbeb4075SMoni Shoua buffer, 267fbeb4075SMoni Shoua buflen, 268fbeb4075SMoni Shoua wqe_index, 269fbeb4075SMoni Shoua 0, 270fbeb4075SMoni Shoua srq->msrq.max, 271fbeb4075SMoni Shoua srq->msrq.wqe_shift, 272fbeb4075SMoni Shoua buflen, 273fbeb4075SMoni Shoua &bytes_copied); 274fbeb4075SMoni Shoua 275fbeb4075SMoni Shoua if (ret) 276fbeb4075SMoni Shoua return ret; 277fbeb4075SMoni Shoua *bc = bytes_copied; 278fbeb4075SMoni Shoua return 0; 279c1395a2aSHaggai Eran } 280c1395a2aSHaggai Eran 281e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 282e126ba97SEli Cohen { 283e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 284e126ba97SEli Cohen struct ib_event event; 285e126ba97SEli Cohen 28619098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 28719098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 28819098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 28919098df2Smajd@mellanox.com } 290e126ba97SEli Cohen 291e126ba97SEli Cohen if (ibqp->event_handler) { 292e126ba97SEli Cohen event.device = ibqp->device; 293e126ba97SEli Cohen event.element.qp = ibqp; 294e126ba97SEli Cohen switch (type) { 295e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 296e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 297e126ba97SEli Cohen break; 298e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 299e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 300e126ba97SEli Cohen break; 301e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 302e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 303e126ba97SEli Cohen break; 304e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 305e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 306e126ba97SEli Cohen break; 307e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 308e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 309e126ba97SEli Cohen break; 310e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 311e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 312e126ba97SEli Cohen break; 313e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 314e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 315e126ba97SEli Cohen break; 316e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 317e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 318e126ba97SEli Cohen break; 319e126ba97SEli Cohen default: 320e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 321e126ba97SEli Cohen return; 322e126ba97SEli Cohen } 323e126ba97SEli Cohen 324e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 325e126ba97SEli Cohen } 326e126ba97SEli Cohen } 327e126ba97SEli Cohen 328e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 329e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 330e126ba97SEli Cohen { 331e126ba97SEli Cohen int wqe_size; 332e126ba97SEli Cohen int wq_size; 333e126ba97SEli Cohen 334e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 335938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 336e126ba97SEli Cohen return -EINVAL; 337e126ba97SEli Cohen 338e126ba97SEli Cohen if (!has_rq) { 339e126ba97SEli Cohen qp->rq.max_gs = 0; 340e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 341e126ba97SEli Cohen qp->rq.wqe_shift = 0; 3420540d814SNoa Osherovich cap->max_recv_wr = 0; 3430540d814SNoa Osherovich cap->max_recv_sge = 0; 344e126ba97SEli Cohen } else { 345e126ba97SEli Cohen if (ucmd) { 346e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 347002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 348002bf228SLeon Romanovsky return -EINVAL; 349e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 350002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 351002bf228SLeon Romanovsky return -EINVAL; 352e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 353e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 354e126ba97SEli Cohen } else { 355e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 356e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 357e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 358e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 359e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 360e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 361938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 362e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 363e126ba97SEli Cohen wqe_size, 364938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 365938fe83cSSaeed Mahameed max_wqe_sz_rq)); 366e126ba97SEli Cohen return -EINVAL; 367e126ba97SEli Cohen } 368e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 369e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 370e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 371e126ba97SEli Cohen } 372e126ba97SEli Cohen } 373e126ba97SEli Cohen 374e126ba97SEli Cohen return 0; 375e126ba97SEli Cohen } 376e126ba97SEli Cohen 377f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 378e126ba97SEli Cohen { 379618af384SAndi Shyti int size = 0; 380e126ba97SEli Cohen 381f0313965SErez Shitrit switch (attr->qp_type) { 382e126ba97SEli Cohen case IB_QPT_XRC_INI: 383b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 384e126ba97SEli Cohen /* fall through */ 385e126ba97SEli Cohen case IB_QPT_RC: 386e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 38775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 38875c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 38975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 390064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 391064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 392064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 393e126ba97SEli Cohen break; 394e126ba97SEli Cohen 395b125a54bSEli Cohen case IB_QPT_XRC_TGT: 396b125a54bSEli Cohen return 0; 397b125a54bSEli Cohen 398e126ba97SEli Cohen case IB_QPT_UC: 399b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 40075c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 4019e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 40275c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 403e126ba97SEli Cohen break; 404e126ba97SEli Cohen 405e126ba97SEli Cohen case IB_QPT_UD: 406f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 407f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 408f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 409f0313965SErez Shitrit /* fall through */ 410e126ba97SEli Cohen case IB_QPT_SMI: 411d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 412b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 413e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 414e126ba97SEli Cohen break; 415e126ba97SEli Cohen 416e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 417b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 418e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 419e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 420e126ba97SEli Cohen break; 421e126ba97SEli Cohen 422e126ba97SEli Cohen default: 423e126ba97SEli Cohen return -EINVAL; 424e126ba97SEli Cohen } 425e126ba97SEli Cohen 426e126ba97SEli Cohen return size; 427e126ba97SEli Cohen } 428e126ba97SEli Cohen 429e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 430e126ba97SEli Cohen { 431e126ba97SEli Cohen int inl_size = 0; 432e126ba97SEli Cohen int size; 433e126ba97SEli Cohen 434f0313965SErez Shitrit size = sq_overhead(attr); 435e126ba97SEli Cohen if (size < 0) 436e126ba97SEli Cohen return size; 437e126ba97SEli Cohen 438e126ba97SEli Cohen if (attr->cap.max_inline_data) { 439e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 440e126ba97SEli Cohen attr->cap.max_inline_data; 441e126ba97SEli Cohen } 442e126ba97SEli Cohen 443e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 444e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 445e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 446e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 447e1e66cc2SSagi Grimberg else 448e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 449e126ba97SEli Cohen } 450e126ba97SEli Cohen 451288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 452288c01b7SEli Cohen { 453288c01b7SEli Cohen int max_sge; 454288c01b7SEli Cohen 455288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 456288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 457288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 458288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 459288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 460288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 461288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 462288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 463288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 464288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 465288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 466288c01b7SEli Cohen else 467288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 468288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 469288c01b7SEli Cohen 470288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 471288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 472288c01b7SEli Cohen } 473288c01b7SEli Cohen 474e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 475e126ba97SEli Cohen struct mlx5_ib_qp *qp) 476e126ba97SEli Cohen { 477e126ba97SEli Cohen int wqe_size; 478e126ba97SEli Cohen int wq_size; 479e126ba97SEli Cohen 480e126ba97SEli Cohen if (!attr->cap.max_send_wr) 481e126ba97SEli Cohen return 0; 482e126ba97SEli Cohen 483e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 484e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 485e126ba97SEli Cohen if (wqe_size < 0) 486e126ba97SEli Cohen return wqe_size; 487e126ba97SEli Cohen 488938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 489b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 490938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 491e126ba97SEli Cohen return -EINVAL; 492e126ba97SEli Cohen } 493e126ba97SEli Cohen 494f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 495e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 496e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 497e126ba97SEli Cohen 498e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 499e1e66cc2SSagi Grimberg qp->signature_en = true; 500e1e66cc2SSagi Grimberg 501e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 502e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 503938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 5041974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 5051974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 506938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 507938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 508b125a54bSEli Cohen return -ENOMEM; 509b125a54bSEli Cohen } 510e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 511288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 512288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 513288c01b7SEli Cohen return -ENOMEM; 514288c01b7SEli Cohen 515288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 516b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 517b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 518e126ba97SEli Cohen 519e126ba97SEli Cohen return wq_size; 520e126ba97SEli Cohen } 521e126ba97SEli Cohen 522e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 523e126ba97SEli Cohen struct mlx5_ib_qp *qp, 52419098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 5250fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 5260fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 527e126ba97SEli Cohen { 528e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 529e126ba97SEli Cohen 530938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 531e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 532938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 533e126ba97SEli Cohen return -EINVAL; 534e126ba97SEli Cohen } 535e126ba97SEli Cohen 536af8b38edSGal Pressman if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) { 537af8b38edSGal Pressman mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n", 538af8b38edSGal Pressman ucmd->sq_wqe_count); 539e126ba97SEli Cohen return -EINVAL; 540e126ba97SEli Cohen } 541e126ba97SEli Cohen 542e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 543e126ba97SEli Cohen 544938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 545e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 546938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 547938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 548e126ba97SEli Cohen return -EINVAL; 549e126ba97SEli Cohen } 550e126ba97SEli Cohen 551c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 552c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 5530fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 5540fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 5550fb2ed66Smajd@mellanox.com } else { 55619098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 557e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 5580fb2ed66Smajd@mellanox.com } 559e126ba97SEli Cohen 560e126ba97SEli Cohen return 0; 561e126ba97SEli Cohen } 562e126ba97SEli Cohen 563e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 564e126ba97SEli Cohen { 565e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 566e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 567e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 568e126ba97SEli Cohen !attr->cap.max_recv_wr) 569e126ba97SEli Cohen return 0; 570e126ba97SEli Cohen 571e126ba97SEli Cohen return 1; 572e126ba97SEli Cohen } 573e126ba97SEli Cohen 5740b80c14fSEli Cohen enum { 5750b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 5760b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 5770b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 5780b80c14fSEli Cohen * "odd/even" order 5790b80c14fSEli Cohen */ 5800b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 5810b80c14fSEli Cohen }; 5820b80c14fSEli Cohen 583b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 584b037c29aSEli Cohen { 58531a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 586b037c29aSEli Cohen } 587b037c29aSEli Cohen 588b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 589b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 590c1be5232SEli Cohen { 591c1be5232SEli Cohen int n; 592c1be5232SEli Cohen 593b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 594b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 595c1be5232SEli Cohen 596c1be5232SEli Cohen return n >= 0 ? n : 0; 597c1be5232SEli Cohen } 598c1be5232SEli Cohen 59918b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 60018b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 60118b0362eSYishai Hadas { 60218b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 60318b0362eSYishai Hadas } 60418b0362eSYishai Hadas 605b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 606b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 607c1be5232SEli Cohen { 608c1be5232SEli Cohen int med; 609c1be5232SEli Cohen 610b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 611b037c29aSEli Cohen return ++med; 612c1be5232SEli Cohen } 613c1be5232SEli Cohen 614b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 615b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 616e126ba97SEli Cohen { 617e126ba97SEli Cohen int i; 618e126ba97SEli Cohen 619b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 620b037c29aSEli Cohen if (!bfregi->count[i]) { 6212f5ff264SEli Cohen bfregi->count[i]++; 622e126ba97SEli Cohen return i; 623e126ba97SEli Cohen } 624e126ba97SEli Cohen } 625e126ba97SEli Cohen 626e126ba97SEli Cohen return -ENOMEM; 627e126ba97SEli Cohen } 628e126ba97SEli Cohen 629b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 630b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 631e126ba97SEli Cohen { 63218b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 633e126ba97SEli Cohen int i; 634e126ba97SEli Cohen 63518b0362eSYishai Hadas if (minidx < 0) 63618b0362eSYishai Hadas return minidx; 63718b0362eSYishai Hadas 63818b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 6392f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 640e126ba97SEli Cohen minidx = i; 6410b80c14fSEli Cohen if (!bfregi->count[minidx]) 6420b80c14fSEli Cohen break; 643e126ba97SEli Cohen } 644e126ba97SEli Cohen 6452f5ff264SEli Cohen bfregi->count[minidx]++; 646e126ba97SEli Cohen return minidx; 647e126ba97SEli Cohen } 648e126ba97SEli Cohen 649b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 650ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 651e126ba97SEli Cohen { 652ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 653e126ba97SEli Cohen 6542f5ff264SEli Cohen mutex_lock(&bfregi->lock); 655ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 656ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 657ffaf58deSLeon Romanovsky if (bfregn < 0) 658ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 659ffaf58deSLeon Romanovsky } 660ffaf58deSLeon Romanovsky 661ffaf58deSLeon Romanovsky if (bfregn < 0) { 6620b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 6632f5ff264SEli Cohen bfregn = 0; 6642f5ff264SEli Cohen bfregi->count[bfregn]++; 665e126ba97SEli Cohen } 6662f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 667e126ba97SEli Cohen 6682f5ff264SEli Cohen return bfregn; 669e126ba97SEli Cohen } 670e126ba97SEli Cohen 6714ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 672e126ba97SEli Cohen { 6732f5ff264SEli Cohen mutex_lock(&bfregi->lock); 674b037c29aSEli Cohen bfregi->count[bfregn]--; 6752f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 676e126ba97SEli Cohen } 677e126ba97SEli Cohen 678e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 679e126ba97SEli Cohen { 680e126ba97SEli Cohen switch (state) { 681e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 682e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 683e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 684e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 685e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 686e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 687e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 688e126ba97SEli Cohen default: return -1; 689e126ba97SEli Cohen } 690e126ba97SEli Cohen } 691e126ba97SEli Cohen 692e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 693e126ba97SEli Cohen { 694e126ba97SEli Cohen switch (type) { 695e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 696e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 697e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 698e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 699e126ba97SEli Cohen case IB_QPT_XRC_INI: 700e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 701e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 702d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 703c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 704e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 705e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 7060fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 707e126ba97SEli Cohen case IB_QPT_MAX: 708e126ba97SEli Cohen default: return -EINVAL; 709e126ba97SEli Cohen } 710e126ba97SEli Cohen } 711e126ba97SEli Cohen 71289ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 71389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71489ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 71589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71689ea94a7SMaor Gottlieb 7177c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 71805f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 7191ee47ab3SYishai Hadas bool dyn_bfreg) 720e126ba97SEli Cohen { 72105f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 72205f58cebSLeon Romanovsky u32 index_of_sys_page; 72305f58cebSLeon Romanovsky u32 offset; 724b037c29aSEli Cohen 725b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 726b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 727b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 728b037c29aSEli Cohen 72905f58cebSLeon Romanovsky if (dyn_bfreg) { 73005f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 73105f58cebSLeon Romanovsky 7327c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 7337c043e90SYishai Hadas return -EINVAL; 7347c043e90SYishai Hadas 7351ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 7361ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 7371ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 7381ee47ab3SYishai Hadas return -EINVAL; 7391ee47ab3SYishai Hadas } 7401ee47ab3SYishai Hadas } 741b037c29aSEli Cohen 7421ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 743b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 744e126ba97SEli Cohen } 745e126ba97SEli Cohen 746b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata, 74719098df2Smajd@mellanox.com unsigned long addr, size_t size, 748b0ea0fa5SJason Gunthorpe struct ib_umem **umem, int *npages, int *page_shift, 749b0ea0fa5SJason Gunthorpe int *ncont, u32 *offset) 75019098df2Smajd@mellanox.com { 75119098df2Smajd@mellanox.com int err; 75219098df2Smajd@mellanox.com 753b0ea0fa5SJason Gunthorpe *umem = ib_umem_get(udata, addr, size, 0, 0); 75419098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 75519098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 75619098df2Smajd@mellanox.com return PTR_ERR(*umem); 75719098df2Smajd@mellanox.com } 75819098df2Smajd@mellanox.com 759762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 76019098df2Smajd@mellanox.com 76119098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 76219098df2Smajd@mellanox.com if (err) { 76319098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 76419098df2Smajd@mellanox.com goto err_umem; 76519098df2Smajd@mellanox.com } 76619098df2Smajd@mellanox.com 76719098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 76819098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 76919098df2Smajd@mellanox.com 77019098df2Smajd@mellanox.com return 0; 77119098df2Smajd@mellanox.com 77219098df2Smajd@mellanox.com err_umem: 77319098df2Smajd@mellanox.com ib_umem_release(*umem); 77419098df2Smajd@mellanox.com *umem = NULL; 77519098df2Smajd@mellanox.com 77619098df2Smajd@mellanox.com return err; 77719098df2Smajd@mellanox.com } 77819098df2Smajd@mellanox.com 779fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 780bdeacabdSShamir Rabinovitch struct mlx5_ib_rwq *rwq, struct ib_udata *udata) 78179b20a6cSYishai Hadas { 782bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 783bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 784bdeacabdSShamir Rabinovitch udata, 785bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 786bdeacabdSShamir Rabinovitch ibucontext); 78779b20a6cSYishai Hadas 788fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 789fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 790fe248c3aSMaor Gottlieb 79179b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 79279b20a6cSYishai Hadas if (rwq->umem) 79379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 79479b20a6cSYishai Hadas } 79579b20a6cSYishai Hadas 79679b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 797b0ea0fa5SJason Gunthorpe struct ib_udata *udata, struct mlx5_ib_rwq *rwq, 79879b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 79979b20a6cSYishai Hadas { 80089944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 80189944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 80279b20a6cSYishai Hadas int page_shift = 0; 80379b20a6cSYishai Hadas int npages; 80479b20a6cSYishai Hadas u32 offset = 0; 80579b20a6cSYishai Hadas int ncont = 0; 80679b20a6cSYishai Hadas int err; 80779b20a6cSYishai Hadas 80879b20a6cSYishai Hadas if (!ucmd->buf_addr) 80979b20a6cSYishai Hadas return -EINVAL; 81079b20a6cSYishai Hadas 811b0ea0fa5SJason Gunthorpe rwq->umem = ib_umem_get(udata, ucmd->buf_addr, rwq->buf_size, 0, 0); 81279b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 81379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 81479b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 81579b20a6cSYishai Hadas return err; 81679b20a6cSYishai Hadas } 81779b20a6cSYishai Hadas 818762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 81979b20a6cSYishai Hadas &ncont, NULL); 82079b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 82179b20a6cSYishai Hadas &rwq->rq_page_offset); 82279b20a6cSYishai Hadas if (err) { 82379b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 82479b20a6cSYishai Hadas goto err_umem; 82579b20a6cSYishai Hadas } 82679b20a6cSYishai Hadas 82779b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 82879b20a6cSYishai Hadas rwq->page_shift = page_shift; 82979b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 83079b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 83179b20a6cSYishai Hadas 83279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 83379b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 83479b20a6cSYishai Hadas npages, page_shift, ncont, offset); 83579b20a6cSYishai Hadas 83689944450SShamir Rabinovitch err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db); 83779b20a6cSYishai Hadas if (err) { 83879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 83979b20a6cSYishai Hadas goto err_umem; 84079b20a6cSYishai Hadas } 84179b20a6cSYishai Hadas 84279b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 84379b20a6cSYishai Hadas return 0; 84479b20a6cSYishai Hadas 84579b20a6cSYishai Hadas err_umem: 84679b20a6cSYishai Hadas ib_umem_release(rwq->umem); 84779b20a6cSYishai Hadas return err; 84879b20a6cSYishai Hadas } 84979b20a6cSYishai Hadas 850b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 851b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 852b037c29aSEli Cohen { 853b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 854b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 855b037c29aSEli Cohen } 856b037c29aSEli Cohen 857e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 858e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 8590fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 86009a7d9ecSSaeed Mahameed u32 **in, 86119098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 86219098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 863e126ba97SEli Cohen { 864e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 865e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 86619098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 8679e9c47d0SEli Cohen int page_shift = 0; 8681ee47ab3SYishai Hadas int uar_index = 0; 869e126ba97SEli Cohen int npages; 8709e9c47d0SEli Cohen u32 offset = 0; 8712f5ff264SEli Cohen int bfregn; 8729e9c47d0SEli Cohen int ncont = 0; 87309a7d9ecSSaeed Mahameed __be64 *pas; 87409a7d9ecSSaeed Mahameed void *qpc; 875e126ba97SEli Cohen int err; 8765aa3771dSYishai Hadas u16 uid; 877e126ba97SEli Cohen 878e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 879e126ba97SEli Cohen if (err) { 880e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 881e126ba97SEli Cohen return err; 882e126ba97SEli Cohen } 883e126ba97SEli Cohen 88489944450SShamir Rabinovitch context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext, 88589944450SShamir Rabinovitch ibucontext); 8861ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8871ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8881ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8891ee47ab3SYishai Hadas if (uar_index < 0) 8901ee47ab3SYishai Hadas return uar_index; 8911ee47ab3SYishai Hadas 8921ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8931ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 894e126ba97SEli Cohen /* 895e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 896e126ba97SEli Cohen */ 897051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8982f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8991ee47ab3SYishai Hadas } 900051f2630SLeon Romanovsky else { 901ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 902ffaf58deSLeon Romanovsky if (bfregn < 0) 9032f5ff264SEli Cohen return bfregn; 904e126ba97SEli Cohen } 905e126ba97SEli Cohen 9062f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 9071ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9081ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 9091ee47ab3SYishai Hadas false); 910e126ba97SEli Cohen 91148fea837SHaggai Eran qp->rq.offset = 0; 91248fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 91348fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 91448fea837SHaggai Eran 9150fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 916e126ba97SEli Cohen if (err) 9172f5ff264SEli Cohen goto err_bfreg; 918e126ba97SEli Cohen 91919098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 92019098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 921b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, 922b0ea0fa5SJason Gunthorpe ubuffer->buf_size, &ubuffer->umem, 923b0ea0fa5SJason Gunthorpe &npages, &page_shift, &ncont, &offset); 92419098df2Smajd@mellanox.com if (err) 9252f5ff264SEli Cohen goto err_bfreg; 9269e9c47d0SEli Cohen } else { 92719098df2Smajd@mellanox.com ubuffer->umem = NULL; 9289e9c47d0SEli Cohen } 929e126ba97SEli Cohen 93009a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 93109a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 9321b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 933e126ba97SEli Cohen if (!*in) { 934e126ba97SEli Cohen err = -ENOMEM; 935e126ba97SEli Cohen goto err_umem; 936e126ba97SEli Cohen } 937e126ba97SEli Cohen 9387422edceSYishai Hadas uid = (attr->qp_type != IB_QPT_XRC_TGT && 9397422edceSYishai Hadas attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 9405aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 94109a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 94209a7d9ecSSaeed Mahameed if (ubuffer->umem) 94309a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 94409a7d9ecSSaeed Mahameed 94509a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 94609a7d9ecSSaeed Mahameed 94709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 94809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 94909a7d9ecSSaeed Mahameed 95009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 9511ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 952b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 9531ee47ab3SYishai Hadas else 9541ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 9552f5ff264SEli Cohen qp->bfregn = bfregn; 956e126ba97SEli Cohen 957b0ea0fa5SJason Gunthorpe err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db); 958e126ba97SEli Cohen if (err) { 959e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 960e126ba97SEli Cohen goto err_free; 961e126ba97SEli Cohen } 962e126ba97SEli Cohen 96341d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 964e126ba97SEli Cohen if (err) { 965e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 966e126ba97SEli Cohen goto err_unmap; 967e126ba97SEli Cohen } 968e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 969e126ba97SEli Cohen 970e126ba97SEli Cohen return 0; 971e126ba97SEli Cohen 972e126ba97SEli Cohen err_unmap: 973e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 974e126ba97SEli Cohen 975e126ba97SEli Cohen err_free: 976479163f4SAl Viro kvfree(*in); 977e126ba97SEli Cohen 978e126ba97SEli Cohen err_umem: 97919098df2Smajd@mellanox.com if (ubuffer->umem) 98019098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 981e126ba97SEli Cohen 9822f5ff264SEli Cohen err_bfreg: 9831ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9844ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 985e126ba97SEli Cohen return err; 986e126ba97SEli Cohen } 987e126ba97SEli Cohen 988b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 989bdeacabdSShamir Rabinovitch struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base, 990bdeacabdSShamir Rabinovitch struct ib_udata *udata) 991e126ba97SEli Cohen { 992bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 993bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 994bdeacabdSShamir Rabinovitch udata, 995bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 996bdeacabdSShamir Rabinovitch ibucontext); 997e126ba97SEli Cohen 998e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 99919098df2Smajd@mellanox.com if (base->ubuffer.umem) 100019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 10011ee47ab3SYishai Hadas 10021ee47ab3SYishai Hadas /* 10031ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 10041ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 10051ee47ab3SYishai Hadas */ 10061ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 10074ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 1008e126ba97SEli Cohen } 1009e126ba97SEli Cohen 101034f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 101134f4c955SGuy Levi * 101234f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 101334f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 101434f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 101534f4c955SGuy Levi * simply should check if it gets to an edge. 101634f4c955SGuy Levi * 101734f4c955SGuy Levi * @sq - SQ buffer. 101834f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 101934f4c955SGuy Levi * 102034f4c955SGuy Levi * Return: 102134f4c955SGuy Levi * The new edge. 102234f4c955SGuy Levi */ 102334f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 102434f4c955SGuy Levi { 102534f4c955SGuy Levi void *fragment_end; 102634f4c955SGuy Levi 102734f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 102834f4c955SGuy Levi (&sq->fbc, 102934f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 103034f4c955SGuy Levi 103134f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 103234f4c955SGuy Levi } 103334f4c955SGuy Levi 1034e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 1035e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1036e126ba97SEli Cohen struct mlx5_ib_qp *qp, 103709a7d9ecSSaeed Mahameed u32 **in, int *inlen, 103819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 1039e126ba97SEli Cohen { 1040e126ba97SEli Cohen int uar_index; 104109a7d9ecSSaeed Mahameed void *qpc; 1042e126ba97SEli Cohen int err; 1043e126ba97SEli Cohen 1044f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 1045f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 1046b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 104793d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 1048b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 10491a4c3a3dSEli Cohen return -EINVAL; 1050e126ba97SEli Cohen 1051e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 10525fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 10535fe9dec0SEli Cohen else 10545fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 1055e126ba97SEli Cohen 1056d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 1057d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 1058d8030b0dSEli Cohen */ 1059d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 10605fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 1061e126ba97SEli Cohen 1062e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 1063e126ba97SEli Cohen if (err < 0) { 1064e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10655fe9dec0SEli Cohen return err; 1066e126ba97SEli Cohen } 1067e126ba97SEli Cohen 1068e126ba97SEli Cohen qp->rq.offset = 0; 1069e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 107019098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 1071e126ba97SEli Cohen 107234f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 107334f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 1074e126ba97SEli Cohen if (err) { 1075e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10765fe9dec0SEli Cohen return err; 1077e126ba97SEli Cohen } 1078e126ba97SEli Cohen 107934f4c955SGuy Levi if (qp->rq.wqe_cnt) 108034f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 108134f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 108234f4c955SGuy Levi 108334f4c955SGuy Levi if (qp->sq.wqe_cnt) { 108434f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 108534f4c955SGuy Levi MLX5_SEND_WQE_BB; 108634f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 108734f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 108834f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 108934f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 109034f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 109134f4c955SGuy Levi 109234f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 109334f4c955SGuy Levi } 109434f4c955SGuy Levi 109509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 109609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 10971b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 1098e126ba97SEli Cohen if (!*in) { 1099e126ba97SEli Cohen err = -ENOMEM; 1100e126ba97SEli Cohen goto err_buf; 1101e126ba97SEli Cohen } 110209a7d9ecSSaeed Mahameed 110309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 110409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 110509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 110609a7d9ecSSaeed Mahameed 1107e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 110809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 110909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1110e126ba97SEli Cohen 1111b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 111209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1113b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1114b11a4f9cSHaggai Eran } 1115b11a4f9cSHaggai Eran 111634f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 111734f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 111834f4c955SGuy Levi *in, pas)); 1119e126ba97SEli Cohen 11209603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1121e126ba97SEli Cohen if (err) { 1122e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1123e126ba97SEli Cohen goto err_free; 1124e126ba97SEli Cohen } 1125e126ba97SEli Cohen 1126b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1127b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1128b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1129b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1130b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1131b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1132b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1133b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1134b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1135b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1136e126ba97SEli Cohen 1137e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1138e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1139e126ba97SEli Cohen err = -ENOMEM; 1140e126ba97SEli Cohen goto err_wrid; 1141e126ba97SEli Cohen } 1142e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1143e126ba97SEli Cohen 1144e126ba97SEli Cohen return 0; 1145e126ba97SEli Cohen 1146e126ba97SEli Cohen err_wrid: 1147b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1148b5883008SLi Dongyang kvfree(qp->sq.w_list); 1149b5883008SLi Dongyang kvfree(qp->sq.wrid); 1150b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1151b5883008SLi Dongyang kvfree(qp->rq.wrid); 1152f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1153e126ba97SEli Cohen 1154e126ba97SEli Cohen err_free: 1155479163f4SAl Viro kvfree(*in); 1156e126ba97SEli Cohen 1157e126ba97SEli Cohen err_buf: 115834f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1159e126ba97SEli Cohen return err; 1160e126ba97SEli Cohen } 1161e126ba97SEli Cohen 1162e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1163e126ba97SEli Cohen { 1164b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1165b5883008SLi Dongyang kvfree(qp->sq.w_list); 1166b5883008SLi Dongyang kvfree(qp->sq.wrid); 1167b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1168b5883008SLi Dongyang kvfree(qp->rq.wrid); 1169f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 117034f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1171e126ba97SEli Cohen } 1172e126ba97SEli Cohen 117309a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1174e126ba97SEli Cohen { 1175e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1176c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1177e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 117809a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1179e126ba97SEli Cohen else if (!qp->has_rq) 118009a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1181e126ba97SEli Cohen else 118209a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1183e126ba97SEli Cohen } 1184e126ba97SEli Cohen 1185e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1186e126ba97SEli Cohen { 11875d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 11885d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1189e126ba97SEli Cohen return 1; 1190e126ba97SEli Cohen 1191e126ba97SEli Cohen return 0; 1192e126ba97SEli Cohen } 1193e126ba97SEli Cohen 11940fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1195c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 11961cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 11971cd6dbd3SYishai Hadas struct ib_pd *pd) 11980fb2ed66Smajd@mellanox.com { 1199c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 12000fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 12010fb2ed66Smajd@mellanox.com 12021cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 12030fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1204c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1205c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1206c2e53b2cSYishai Hadas 12070fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 12080fb2ed66Smajd@mellanox.com } 12090fb2ed66Smajd@mellanox.com 12100fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 12111cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 12120fb2ed66Smajd@mellanox.com { 12131cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 12140fb2ed66Smajd@mellanox.com } 12150fb2ed66Smajd@mellanox.com 1216b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1217b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1218b96c9ddeSMark Bloch { 1219b96c9ddeSMark Bloch if (sq->flow_rule) 1220b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1221b96c9ddeSMark Bloch } 1222b96c9ddeSMark Bloch 12230fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 1224b0ea0fa5SJason Gunthorpe struct ib_udata *udata, 12250fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 12260fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12270fb2ed66Smajd@mellanox.com { 12280fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 12290fb2ed66Smajd@mellanox.com __be64 *pas; 12300fb2ed66Smajd@mellanox.com void *in; 12310fb2ed66Smajd@mellanox.com void *sqc; 12320fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12330fb2ed66Smajd@mellanox.com void *wq; 12340fb2ed66Smajd@mellanox.com int inlen; 12350fb2ed66Smajd@mellanox.com int err; 12360fb2ed66Smajd@mellanox.com int page_shift = 0; 12370fb2ed66Smajd@mellanox.com int npages; 12380fb2ed66Smajd@mellanox.com int ncont = 0; 12390fb2ed66Smajd@mellanox.com u32 offset = 0; 12400fb2ed66Smajd@mellanox.com 1241b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size, 1242b0ea0fa5SJason Gunthorpe &sq->ubuffer.umem, &npages, &page_shift, &ncont, 1243b0ea0fa5SJason Gunthorpe &offset); 12440fb2ed66Smajd@mellanox.com if (err) 12450fb2ed66Smajd@mellanox.com return err; 12460fb2ed66Smajd@mellanox.com 12470fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 12481b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12490fb2ed66Smajd@mellanox.com if (!in) { 12500fb2ed66Smajd@mellanox.com err = -ENOMEM; 12510fb2ed66Smajd@mellanox.com goto err_umem; 12520fb2ed66Smajd@mellanox.com } 12530fb2ed66Smajd@mellanox.com 1254c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 12550fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 12560fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1257795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1258795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 12590fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 12600fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12610fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 12620fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 12630fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 126496dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 126596dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 126696dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 12670fb2ed66Smajd@mellanox.com 12680fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 12690fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 12700fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12710fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 12720fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12730fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 12740fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 12750fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 12760fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 12770fb2ed66Smajd@mellanox.com 12780fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12790fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 12800fb2ed66Smajd@mellanox.com 12810fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 12820fb2ed66Smajd@mellanox.com 12830fb2ed66Smajd@mellanox.com kvfree(in); 12840fb2ed66Smajd@mellanox.com 12850fb2ed66Smajd@mellanox.com if (err) 12860fb2ed66Smajd@mellanox.com goto err_umem; 12870fb2ed66Smajd@mellanox.com 1288b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1289b96c9ddeSMark Bloch if (err) 1290b96c9ddeSMark Bloch goto err_flow; 1291b96c9ddeSMark Bloch 12920fb2ed66Smajd@mellanox.com return 0; 12930fb2ed66Smajd@mellanox.com 1294b96c9ddeSMark Bloch err_flow: 1295b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1296b96c9ddeSMark Bloch 12970fb2ed66Smajd@mellanox.com err_umem: 12980fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 12990fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 13000fb2ed66Smajd@mellanox.com 13010fb2ed66Smajd@mellanox.com return err; 13020fb2ed66Smajd@mellanox.com } 13030fb2ed66Smajd@mellanox.com 13040fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 13050fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 13060fb2ed66Smajd@mellanox.com { 1307b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 13080fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 13090fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13100fb2ed66Smajd@mellanox.com } 13110fb2ed66Smajd@mellanox.com 13122c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 13130fb2ed66Smajd@mellanox.com { 13140fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 13150fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 13160fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 13170fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 13180fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 13190fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 13200fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 13210fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 13220fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 13230fb2ed66Smajd@mellanox.com 13240fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 13250fb2ed66Smajd@mellanox.com } 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13282c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 132934d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 13300fb2ed66Smajd@mellanox.com { 1331358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 13320fb2ed66Smajd@mellanox.com __be64 *pas; 13330fb2ed66Smajd@mellanox.com __be64 *qp_pas; 13340fb2ed66Smajd@mellanox.com void *in; 13350fb2ed66Smajd@mellanox.com void *rqc; 13360fb2ed66Smajd@mellanox.com void *wq; 13370fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 13382c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 13392c292dbbSBoris Pismenny size_t inlen; 13400fb2ed66Smajd@mellanox.com int err; 13412c292dbbSBoris Pismenny 13422c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 13432c292dbbSBoris Pismenny return -EINVAL; 13440fb2ed66Smajd@mellanox.com 13450fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 13461b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13470fb2ed66Smajd@mellanox.com if (!in) 13480fb2ed66Smajd@mellanox.com return -ENOMEM; 13490fb2ed66Smajd@mellanox.com 135034d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 13510fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1352e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 13530fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 13540fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 13550fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 13560fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 13570fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 13580fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 13590fb2ed66Smajd@mellanox.com 1360358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1361358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1362358e42eaSMajd Dibbiny 13630fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 13640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1365b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1366b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 13670fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 13680fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13690fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13700fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 13710fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 13720fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 13730fb2ed66Smajd@mellanox.com 13740fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 13750fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 13760fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 13770fb2ed66Smajd@mellanox.com 13780fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 13790fb2ed66Smajd@mellanox.com 13800fb2ed66Smajd@mellanox.com kvfree(in); 13810fb2ed66Smajd@mellanox.com 13820fb2ed66Smajd@mellanox.com return err; 13830fb2ed66Smajd@mellanox.com } 13840fb2ed66Smajd@mellanox.com 13850fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13860fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13870fb2ed66Smajd@mellanox.com { 13880fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 13890fb2ed66Smajd@mellanox.com } 13900fb2ed66Smajd@mellanox.com 1391f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1392f95ef6cbSMaor Gottlieb { 1393f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1394f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1395f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1396f95ef6cbSMaor Gottlieb } 1397f95ef6cbSMaor Gottlieb 13980042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13990042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1400443c1cf9SYishai Hadas u32 qp_flags_en, 1401443c1cf9SYishai Hadas struct ib_pd *pd) 14020042f9e4SMark Bloch { 14030042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14040042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14050042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1406443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 14070042f9e4SMark Bloch } 14080042f9e4SMark Bloch 14090fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1410f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1411443c1cf9SYishai Hadas u32 *qp_flags_en, 1412443c1cf9SYishai Hadas struct ib_pd *pd) 14130fb2ed66Smajd@mellanox.com { 1414175edba8SMark Bloch u8 lb_flag = 0; 14150fb2ed66Smajd@mellanox.com u32 *in; 14160fb2ed66Smajd@mellanox.com void *tirc; 14170fb2ed66Smajd@mellanox.com int inlen; 14180fb2ed66Smajd@mellanox.com int err; 14190fb2ed66Smajd@mellanox.com 14200fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14211b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 14220fb2ed66Smajd@mellanox.com if (!in) 14230fb2ed66Smajd@mellanox.com return -ENOMEM; 14240fb2ed66Smajd@mellanox.com 1425443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 14260fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 14270fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 14280fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 14290fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1430175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1431f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 14320fb2ed66Smajd@mellanox.com 1433175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1434175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1435175edba8SMark Bloch 1436175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1437175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1438175edba8SMark Bloch 1439175edba8SMark Bloch if (dev->rep) { 1440175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1441175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1442175edba8SMark Bloch } 1443175edba8SMark Bloch 1444175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1445ec9c2fb8SMark Bloch 14460fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 14470fb2ed66Smajd@mellanox.com 14480042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 14490042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 14500042f9e4SMark Bloch 14510042f9e4SMark Bloch if (err) 1452443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 14530042f9e4SMark Bloch } 14540fb2ed66Smajd@mellanox.com kvfree(in); 14550fb2ed66Smajd@mellanox.com 14560fb2ed66Smajd@mellanox.com return err; 14570fb2ed66Smajd@mellanox.com } 14580fb2ed66Smajd@mellanox.com 14590fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 14602c292dbbSBoris Pismenny u32 *in, size_t inlen, 14617f72052cSYishai Hadas struct ib_pd *pd, 14627f72052cSYishai Hadas struct ib_udata *udata, 14637f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 14640fb2ed66Smajd@mellanox.com { 14650fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14660fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14670fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 146889944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 146989944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 14700fb2ed66Smajd@mellanox.com int err; 14710fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 14727f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 14730fb2ed66Smajd@mellanox.com 14740fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14751cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 14760fb2ed66Smajd@mellanox.com if (err) 14770fb2ed66Smajd@mellanox.com return err; 14780fb2ed66Smajd@mellanox.com 1479b0ea0fa5SJason Gunthorpe err = create_raw_packet_qp_sq(dev, udata, sq, in, pd); 14800fb2ed66Smajd@mellanox.com if (err) 14810fb2ed66Smajd@mellanox.com goto err_destroy_tis; 14820fb2ed66Smajd@mellanox.com 14837f72052cSYishai Hadas if (uid) { 14847f72052cSYishai Hadas resp->tisn = sq->tisn; 14857f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 14867f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 14877f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 14887f72052cSYishai Hadas } 14897f72052cSYishai Hadas 14900fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 14911d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 14920fb2ed66Smajd@mellanox.com } 14930fb2ed66Smajd@mellanox.com 14940fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1495358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1496358e42eaSMajd Dibbiny 1497e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1498e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1499b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1500b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 150134d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 15020fb2ed66Smajd@mellanox.com if (err) 15030fb2ed66Smajd@mellanox.com goto err_destroy_sq; 15040fb2ed66Smajd@mellanox.com 1505443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 15060fb2ed66Smajd@mellanox.com if (err) 15070fb2ed66Smajd@mellanox.com goto err_destroy_rq; 15087f72052cSYishai Hadas 15097f72052cSYishai Hadas if (uid) { 15107f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 15117f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 15127f72052cSYishai Hadas resp->tirn = rq->tirn; 15137f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 15147f72052cSYishai Hadas } 15150fb2ed66Smajd@mellanox.com } 15160fb2ed66Smajd@mellanox.com 15170fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 15180fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 15197f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 15207f72052cSYishai Hadas if (err) 15217f72052cSYishai Hadas goto err_destroy_tir; 15220fb2ed66Smajd@mellanox.com 15230fb2ed66Smajd@mellanox.com return 0; 15240fb2ed66Smajd@mellanox.com 15257f72052cSYishai Hadas err_destroy_tir: 15267f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 15270fb2ed66Smajd@mellanox.com err_destroy_rq: 15280fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15290fb2ed66Smajd@mellanox.com err_destroy_sq: 15300fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 15310fb2ed66Smajd@mellanox.com return err; 15320fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15330fb2ed66Smajd@mellanox.com err_destroy_tis: 15341cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 15350fb2ed66Smajd@mellanox.com 15360fb2ed66Smajd@mellanox.com return err; 15370fb2ed66Smajd@mellanox.com } 15380fb2ed66Smajd@mellanox.com 15390fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 15400fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 15410fb2ed66Smajd@mellanox.com { 15420fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 15430fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15440fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15450fb2ed66Smajd@mellanox.com 15460fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1547443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 15480fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15490fb2ed66Smajd@mellanox.com } 15500fb2ed66Smajd@mellanox.com 15510fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 15520fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15531cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 15540fb2ed66Smajd@mellanox.com } 15550fb2ed66Smajd@mellanox.com } 15560fb2ed66Smajd@mellanox.com 15570fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 15580fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 15590fb2ed66Smajd@mellanox.com { 15600fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15610fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15620fb2ed66Smajd@mellanox.com 15630fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 15640fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 15650fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 15660fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 15670fb2ed66Smajd@mellanox.com } 15680fb2ed66Smajd@mellanox.com 156928d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 157028d61370SYishai Hadas { 15710042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 15720042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 15730042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1574443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1575443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 157628d61370SYishai Hadas } 157728d61370SYishai Hadas 157828d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 157928d61370SYishai Hadas struct ib_pd *pd, 158028d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 158128d61370SYishai Hadas struct ib_udata *udata) 158228d61370SYishai Hadas { 158389944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 158489944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 158528d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 158628d61370SYishai Hadas int inlen; 158728d61370SYishai Hadas int err; 158828d61370SYishai Hadas u32 *in; 158928d61370SYishai Hadas void *tirc; 159028d61370SYishai Hadas void *hfso; 159128d61370SYishai Hadas u32 selected_fields = 0; 15922d93fc85SMatan Barak u32 outer_l4; 159328d61370SYishai Hadas size_t min_resp_len; 159428d61370SYishai Hadas u32 tdn = mucontext->tdn; 159528d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 159628d61370SYishai Hadas size_t required_cmd_sz; 1597175edba8SMark Bloch u8 lb_flag = 0; 159828d61370SYishai Hadas 159928d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 160028d61370SYishai Hadas return -EOPNOTSUPP; 160128d61370SYishai Hadas 160228d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 160328d61370SYishai Hadas return -EINVAL; 160428d61370SYishai Hadas 16052f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 160628d61370SYishai Hadas if (udata->outlen < min_resp_len) 160728d61370SYishai Hadas return -EINVAL; 160828d61370SYishai Hadas 1609f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 161028d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 161128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 161228d61370SYishai Hadas return -EINVAL; 161328d61370SYishai Hadas } 161428d61370SYishai Hadas 161528d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 161628d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 161728d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 161828d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 161928d61370SYishai Hadas return -EOPNOTSUPP; 162028d61370SYishai Hadas } 162128d61370SYishai Hadas 162228d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 162328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 162428d61370SYishai Hadas return -EFAULT; 162528d61370SYishai Hadas } 162628d61370SYishai Hadas 162728d61370SYishai Hadas if (ucmd.comp_mask) { 162828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 162928d61370SYishai Hadas return -EOPNOTSUPP; 163028d61370SYishai Hadas } 163128d61370SYishai Hadas 1632175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1633175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1634175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1635f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1636f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1637f95ef6cbSMaor Gottlieb } 1638f95ef6cbSMaor Gottlieb 1639f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1640f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1641f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 164228d61370SYishai Hadas return -EOPNOTSUPP; 164328d61370SYishai Hadas } 164428d61370SYishai Hadas 1645309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1646309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1647309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1648309fa347SMaor Gottlieb return -EOPNOTSUPP; 1649309fa347SMaor Gottlieb } 1650309fa347SMaor Gottlieb 1651175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1652175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1653175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1654175edba8SMark Bloch } 1655175edba8SMark Bloch 1656175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1657175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1658175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1659175edba8SMark Bloch } 1660175edba8SMark Bloch 166141d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 166228d61370SYishai Hadas if (err) { 166328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 166428d61370SYishai Hadas return -EINVAL; 166528d61370SYishai Hadas } 166628d61370SYishai Hadas 166728d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 16681b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 166928d61370SYishai Hadas if (!in) 167028d61370SYishai Hadas return -ENOMEM; 167128d61370SYishai Hadas 1672443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 167328d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 167428d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 167528d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 167628d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 167728d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 167828d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 167928d61370SYishai Hadas 168028d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1681f95ef6cbSMaor Gottlieb 1682f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1683f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1684f95ef6cbSMaor Gottlieb 1685175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1686175edba8SMark Bloch 1687309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1688309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1689309fa347SMaor Gottlieb else 1690309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1691309fa347SMaor Gottlieb 169228d61370SYishai Hadas switch (ucmd.rx_hash_function) { 169328d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 169428d61370SYishai Hadas { 169528d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 169628d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 169728d61370SYishai Hadas 169828d61370SYishai Hadas if (len != ucmd.rx_key_len) { 169928d61370SYishai Hadas err = -EINVAL; 170028d61370SYishai Hadas goto err; 170128d61370SYishai Hadas } 170228d61370SYishai Hadas 170328d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 170428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 170528d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 170628d61370SYishai Hadas break; 170728d61370SYishai Hadas } 170828d61370SYishai Hadas default: 170928d61370SYishai Hadas err = -EOPNOTSUPP; 171028d61370SYishai Hadas goto err; 171128d61370SYishai Hadas } 171228d61370SYishai Hadas 171328d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 171428d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 171528d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 171628d61370SYishai Hadas goto create_tir; 171728d61370SYishai Hadas err = -EINVAL; 171828d61370SYishai Hadas goto err; 171928d61370SYishai Hadas } 172028d61370SYishai Hadas 172128d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 172228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 172328d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 172428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 172528d61370SYishai Hadas err = -EINVAL; 172628d61370SYishai Hadas goto err; 172728d61370SYishai Hadas } 172828d61370SYishai Hadas 172928d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 173028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 173128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 173228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 173328d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 173428d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 173528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 173628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 173728d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 173828d61370SYishai Hadas 17392d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17402d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 174128d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 17422d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 17432d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 17442d93fc85SMatan Barak 17452d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 17462d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 174728d61370SYishai Hadas err = -EINVAL; 174828d61370SYishai Hadas goto err; 174928d61370SYishai Hadas } 175028d61370SYishai Hadas 175128d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 175228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 175328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 175428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 175528d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 175628d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 175728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 175828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 175928d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 176028d61370SYishai Hadas 176128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 176228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 176328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 176428d61370SYishai Hadas 176528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 176628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 176728d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 176828d61370SYishai Hadas 176928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 177028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 177128d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 177228d61370SYishai Hadas 177328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 177428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 177528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 177628d61370SYishai Hadas 17772d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 17782d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 17792d93fc85SMatan Barak 178028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 178128d61370SYishai Hadas 178228d61370SYishai Hadas create_tir: 178328d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 178428d61370SYishai Hadas 17850042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 17860042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 17870042f9e4SMark Bloch 17880042f9e4SMark Bloch if (err) 1789443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1790443c1cf9SYishai Hadas to_mpd(pd)->uid); 17910042f9e4SMark Bloch } 17920042f9e4SMark Bloch 179328d61370SYishai Hadas if (err) 179428d61370SYishai Hadas goto err; 179528d61370SYishai Hadas 17967f72052cSYishai Hadas if (mucontext->devx_uid) { 17977f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 17987f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 17997f72052cSYishai Hadas } 18007f72052cSYishai Hadas 18017f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 18027f72052cSYishai Hadas if (err) 18037f72052cSYishai Hadas goto err_copy; 18047f72052cSYishai Hadas 180528d61370SYishai Hadas kvfree(in); 180628d61370SYishai Hadas /* qpn is reserved for that QP */ 180728d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1808d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 180928d61370SYishai Hadas return 0; 181028d61370SYishai Hadas 18117f72052cSYishai Hadas err_copy: 18127f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 181328d61370SYishai Hadas err: 181428d61370SYishai Hadas kvfree(in); 181528d61370SYishai Hadas return err; 181628d61370SYishai Hadas } 181728d61370SYishai Hadas 18185d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 18195d6ff1baSYonatan Cohen void *qpc) 18205d6ff1baSYonatan Cohen { 18215d6ff1baSYonatan Cohen int rcqe_sz; 18225d6ff1baSYonatan Cohen 18235d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 18245d6ff1baSYonatan Cohen return; 18255d6ff1baSYonatan Cohen 18265d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 18275d6ff1baSYonatan Cohen 18285d6ff1baSYonatan Cohen if (rcqe_sz == 128) { 18295d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 18305d6ff1baSYonatan Cohen return; 18315d6ff1baSYonatan Cohen } 18325d6ff1baSYonatan Cohen 18335d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCT) 18345d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 18355d6ff1baSYonatan Cohen } 18365d6ff1baSYonatan Cohen 18375d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 18385d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 18396f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 18405d6ff1baSYonatan Cohen void *qpc) 18415d6ff1baSYonatan Cohen { 18425d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 18435d6ff1baSYonatan Cohen int scqe_sz; 18446f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 18455d6ff1baSYonatan Cohen 18465d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 18475d6ff1baSYonatan Cohen return; 18485d6ff1baSYonatan Cohen 18496f4bc0eaSYonatan Cohen if (ucmd) 18506f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 18516f4bc0eaSYonatan Cohen 18526f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 18535d6ff1baSYonatan Cohen return; 18545d6ff1baSYonatan Cohen 18555d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 18565d6ff1baSYonatan Cohen if (scqe_sz == 128) { 18575d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 18585d6ff1baSYonatan Cohen return; 18595d6ff1baSYonatan Cohen } 18605d6ff1baSYonatan Cohen 18615d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 18625d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 18635d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 18645d6ff1baSYonatan Cohen } 18655d6ff1baSYonatan Cohen 1866a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1867a60109dcSYonatan Cohen { 1868a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1869a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1870a60109dcSYonatan Cohen */ 1871a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1872a60109dcSYonatan Cohen int log_max_size; 1873a60109dcSYonatan Cohen 1874a60109dcSYonatan Cohen if (!supported_size_mask) 1875a60109dcSYonatan Cohen return -EOPNOTSUPP; 1876a60109dcSYonatan Cohen 1877a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1878a60109dcSYonatan Cohen 1879a60109dcSYonatan Cohen if (log_max_size > 3) 1880a60109dcSYonatan Cohen return log_max_size; 1881a60109dcSYonatan Cohen 1882a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1883a60109dcSYonatan Cohen } 1884a60109dcSYonatan Cohen 1885a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1886a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1887a60109dcSYonatan Cohen { 1888a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1889a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1890a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1891a60109dcSYonatan Cohen int atomic_size_mask; 1892a60109dcSYonatan Cohen 1893a60109dcSYonatan Cohen if (!atomic) 1894a60109dcSYonatan Cohen return -EOPNOTSUPP; 1895a60109dcSYonatan Cohen 1896a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1897a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1898a60109dcSYonatan Cohen else 1899a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1900a60109dcSYonatan Cohen 1901a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1902a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1903a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1904a60109dcSYonatan Cohen 1905a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1906a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1907a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1908a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1909a60109dcSYonatan Cohen 1910a60109dcSYonatan Cohen return atomic_mode; 1911a60109dcSYonatan Cohen } 1912a60109dcSYonatan Cohen 19132e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 19142e43bb31SYonatan Cohen { 19152e43bb31SYonatan Cohen return (input & ~supported) == 0; 19162e43bb31SYonatan Cohen } 19172e43bb31SYonatan Cohen 1918e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1919e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1920e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1921e126ba97SEli Cohen { 1922e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 192309a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1924938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 19250625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 192689944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 192789944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 192889ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 192989ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 193089ea94a7SMaor Gottlieb unsigned long flags; 1931cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 193209a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 193309a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1934e7b169f3SNoa Osherovich int mlx5_st; 1935cfb5e088SHaggai Abramovsky void *qpc; 193609a7d9ecSSaeed Mahameed u32 *in; 193709a7d9ecSSaeed Mahameed int err; 1938e126ba97SEli Cohen 1939e126ba97SEli Cohen mutex_init(&qp->mutex); 1940e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1941e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1942e126ba97SEli Cohen 1943e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1944e7b169f3SNoa Osherovich if (mlx5_st < 0) 1945e7b169f3SNoa Osherovich return -EINVAL; 1946e7b169f3SNoa Osherovich 194728d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 194828d61370SYishai Hadas if (!udata) 194928d61370SYishai Hadas return -ENOSYS; 195028d61370SYishai Hadas 195128d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 195228d61370SYishai Hadas return err; 195328d61370SYishai Hadas } 195428d61370SYishai Hadas 1955f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1956938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1957f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1958f360d88aSEli Cohen return -EINVAL; 1959f360d88aSEli Cohen } else { 1960f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1961f360d88aSEli Cohen } 1962f360d88aSEli Cohen } 1963f360d88aSEli Cohen 1964051f2630SLeon Romanovsky if (init_attr->create_flags & 1965051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1966051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1967051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1968051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1969051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1970051f2630SLeon Romanovsky return -EINVAL; 1971051f2630SLeon Romanovsky } 1972051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1973051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1974051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1975051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1976051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1977051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1978051f2630SLeon Romanovsky } 1979f0313965SErez Shitrit 1980f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1981f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1982f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1983f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1984f0313965SErez Shitrit return -EOPNOTSUPP; 1985f0313965SErez Shitrit } 1986f0313965SErez Shitrit 1987358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1988358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1989358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1990358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1991358e42eaSMajd Dibbiny } 1992358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1993358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1994358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1995358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1996358e42eaSMajd Dibbiny } 1997358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1998358e42eaSMajd Dibbiny } 1999358e42eaSMajd Dibbiny 2000e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 2001e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 2002e126ba97SEli Cohen 2003e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 2004e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 2005e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 2006e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 2007e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 2008e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 2009e4cc4fa7SNoa Osherovich } 2010e4cc4fa7SNoa Osherovich 2011e00b64f7SShamir Rabinovitch if (udata) { 2012e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 2013e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 2014e126ba97SEli Cohen return -EFAULT; 2015e126ba97SEli Cohen } 2016e126ba97SEli Cohen 20172e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 2018569c6651SDanit Goldberg MLX5_QP_FLAG_ALLOW_SCATTER_CQE | 20198af526e0SMark Bloch MLX5_QP_FLAG_BFREG_INDEX | 20208af526e0SMark Bloch MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE | 20218af526e0SMark Bloch MLX5_QP_FLAG_SCATTER_CQE | 20228af526e0SMark Bloch MLX5_QP_FLAG_SIGNATURE | 20238af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC | 20248af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 20258af526e0SMark Bloch MLX5_QP_FLAG_TUNNEL_OFFLOADS | 20268af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCI | 20278af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCT)) 20282e43bb31SYonatan Cohen return -EINVAL; 20292e43bb31SYonatan Cohen 203089944450SShamir Rabinovitch err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx); 2031cfb5e088SHaggai Abramovsky if (err) 2032cfb5e088SHaggai Abramovsky return err; 2033cfb5e088SHaggai Abramovsky 2034e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 20355d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 2036e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 2037f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 2038f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 2039f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 2040f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 2041f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 2042f95ef6cbSMaor Gottlieb } 2043175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 2044175edba8SMark Bloch } 2045175edba8SMark Bloch 2046175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 2047175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2048175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 2049175edba8SMark Bloch return -EOPNOTSUPP; 2050175edba8SMark Bloch } 2051175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 2052175edba8SMark Bloch } 2053175edba8SMark Bloch 2054175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 2055175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2056175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 2057175edba8SMark Bloch return -EOPNOTSUPP; 2058175edba8SMark Bloch } 2059175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 2060f95ef6cbSMaor Gottlieb } 2061c2e53b2cSYishai Hadas 2062569c6651SDanit Goldberg if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) { 2063569c6651SDanit Goldberg if (init_attr->qp_type != IB_QPT_RC || 2064569c6651SDanit Goldberg !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { 2065569c6651SDanit Goldberg mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n"); 2066569c6651SDanit Goldberg return -EOPNOTSUPP; 2067569c6651SDanit Goldberg } 2068569c6651SDanit Goldberg qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT; 2069569c6651SDanit Goldberg } 2070569c6651SDanit Goldberg 2071c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 2072c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 2073c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 2074c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 2075c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 2076c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 2077c2e53b2cSYishai Hadas return -EOPNOTSUPP; 2078c2e53b2cSYishai Hadas } 2079c2e53b2cSYishai Hadas 2080c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 2081c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 2082c2e53b2cSYishai Hadas } 2083e126ba97SEli Cohen } else { 2084e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 2085e126ba97SEli Cohen } 2086e126ba97SEli Cohen 2087c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 2088c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 2089c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 2090c2e53b2cSYishai Hadas &qp->trans_qp.base; 2091c2e53b2cSYishai Hadas 2092e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 2093e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 2094e00b64f7SShamir Rabinovitch qp, udata ? &ucmd : NULL); 2095e126ba97SEli Cohen if (err) { 2096e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2097e126ba97SEli Cohen return err; 2098e126ba97SEli Cohen } 2099e126ba97SEli Cohen 2100e126ba97SEli Cohen if (pd) { 2101e00b64f7SShamir Rabinovitch if (udata) { 2102938fe83cSSaeed Mahameed __u32 max_wqes = 2103938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 2104e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 2105e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 2106e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 2107e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 2108e126ba97SEli Cohen return -EINVAL; 2109e126ba97SEli Cohen } 2110938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 2111e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 2112938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 2113e126ba97SEli Cohen return -EINVAL; 2114e126ba97SEli Cohen } 2115b11a4f9cSHaggai Eran if (init_attr->create_flags & 2116b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 2117b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 2118b11a4f9cSHaggai Eran return -EINVAL; 2119b11a4f9cSHaggai Eran } 21200fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 21210fb2ed66Smajd@mellanox.com &resp, &inlen, base); 2122e126ba97SEli Cohen if (err) 2123e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2124e126ba97SEli Cohen } else { 212519098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 212619098df2Smajd@mellanox.com base); 2127e126ba97SEli Cohen if (err) 2128e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2129e126ba97SEli Cohen } 2130e126ba97SEli Cohen 2131e126ba97SEli Cohen if (err) 2132e126ba97SEli Cohen return err; 2133e126ba97SEli Cohen } else { 21341b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2135e126ba97SEli Cohen if (!in) 2136e126ba97SEli Cohen return -ENOMEM; 2137e126ba97SEli Cohen 2138e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 2139e126ba97SEli Cohen } 2140e126ba97SEli Cohen 2141e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2142e126ba97SEli Cohen qp->port = init_attr->port_num; 2143e126ba97SEli Cohen 214409a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 214509a7d9ecSSaeed Mahameed 2146e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 214709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2148e126ba97SEli Cohen 2149e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 215009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2151e126ba97SEli Cohen else 215209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 215309a7d9ecSSaeed Mahameed 2154e126ba97SEli Cohen 2155e126ba97SEli Cohen if (qp->wq_sig) 215609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2157e126ba97SEli Cohen 2158f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 215909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2160f360d88aSEli Cohen 2161051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 216209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2163051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 216409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2165051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 216609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2167569c6651SDanit Goldberg if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT) 2168569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 2169e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 21705d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 21716f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 2172e00b64f7SShamir Rabinovitch udata ? &ucmd : NULL, 21736f4bc0eaSYonatan Cohen qpc); 2174e126ba97SEli Cohen } 2175e126ba97SEli Cohen 2176e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 217709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 217809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2179e126ba97SEli Cohen } 2180e126ba97SEli Cohen 218109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2182e126ba97SEli Cohen 21833fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 218409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 21853fd3307eSArtemy Kovalyov } else { 218609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 21873fd3307eSArtemy Kovalyov if (init_attr->srq && 21883fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 21893fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 21903fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 21913fd3307eSArtemy Kovalyov } 2192e126ba97SEli Cohen 2193e126ba97SEli Cohen /* Set default resources */ 2194e126ba97SEli Cohen switch (init_attr->qp_type) { 2195e126ba97SEli Cohen case IB_QPT_XRC_TGT: 219609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 219709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 219809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 219909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2200e126ba97SEli Cohen break; 2201e126ba97SEli Cohen case IB_QPT_XRC_INI: 220209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 220309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 220409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2205e126ba97SEli Cohen break; 2206e126ba97SEli Cohen default: 2207e126ba97SEli Cohen if (init_attr->srq) { 220809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 220909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2210e126ba97SEli Cohen } else { 221109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 221209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2213e126ba97SEli Cohen } 2214e126ba97SEli Cohen } 2215e126ba97SEli Cohen 2216e126ba97SEli Cohen if (init_attr->send_cq) 221709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2218e126ba97SEli Cohen 2219e126ba97SEli Cohen if (init_attr->recv_cq) 222009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2221e126ba97SEli Cohen 222209a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2223e126ba97SEli Cohen 2224cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 222509a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2226cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 222709a7d9ecSSaeed Mahameed 2228f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2229f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2230f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2231f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2232f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2233f0313965SErez Shitrit } 2234cfb5e088SHaggai Abramovsky 2235b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2236b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2237b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2238b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2239b1383aa6SNoa Osherovich goto err; 2240b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2241b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2242b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2243b1383aa6SNoa Osherovich } else { 2244b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2245b1383aa6SNoa Osherovich } 2246b1383aa6SNoa Osherovich } 2247b1383aa6SNoa Osherovich 22482c292dbbSBoris Pismenny if (inlen < 0) { 22492c292dbbSBoris Pismenny err = -EINVAL; 22502c292dbbSBoris Pismenny goto err; 22512c292dbbSBoris Pismenny } 22522c292dbbSBoris Pismenny 2253c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2254c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 22550fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 22560fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 22577f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 22587f72052cSYishai Hadas &resp); 22590fb2ed66Smajd@mellanox.com } else { 226019098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 22610fb2ed66Smajd@mellanox.com } 22620fb2ed66Smajd@mellanox.com 2263e126ba97SEli Cohen if (err) { 2264e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2265e126ba97SEli Cohen goto err_create; 2266e126ba97SEli Cohen } 2267e126ba97SEli Cohen 2268479163f4SAl Viro kvfree(in); 2269e126ba97SEli Cohen 227019098df2Smajd@mellanox.com base->container_mibqp = qp; 227119098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2272e126ba97SEli Cohen 227389ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 227489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 227589ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 227689ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 227789ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 227889ea94a7SMaor Gottlieb * flow 227989ea94a7SMaor Gottlieb */ 228089ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 228189ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 228289ea94a7SMaor Gottlieb */ 228389ea94a7SMaor Gottlieb if (send_cq) 228489ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 228589ea94a7SMaor Gottlieb if (recv_cq) 228689ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 228789ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 228889ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 228989ea94a7SMaor Gottlieb 2290e126ba97SEli Cohen return 0; 2291e126ba97SEli Cohen 2292e126ba97SEli Cohen err_create: 2293e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2294bdeacabdSShamir Rabinovitch destroy_qp_user(dev, pd, qp, base, udata); 2295e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2296e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2297e126ba97SEli Cohen 2298b1383aa6SNoa Osherovich err: 2299479163f4SAl Viro kvfree(in); 2300e126ba97SEli Cohen return err; 2301e126ba97SEli Cohen } 2302e126ba97SEli Cohen 2303e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2304e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2305e126ba97SEli Cohen { 2306e126ba97SEli Cohen if (send_cq) { 2307e126ba97SEli Cohen if (recv_cq) { 2308e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 230989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2310e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2311e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2312e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 231389ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2314e126ba97SEli Cohen __acquire(&recv_cq->lock); 2315e126ba97SEli Cohen } else { 231689ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2317e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2318e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2319e126ba97SEli Cohen } 2320e126ba97SEli Cohen } else { 232189ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 23226a4f139aSEli Cohen __acquire(&recv_cq->lock); 2323e126ba97SEli Cohen } 2324e126ba97SEli Cohen } else if (recv_cq) { 232589ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 23266a4f139aSEli Cohen __acquire(&send_cq->lock); 23276a4f139aSEli Cohen } else { 23286a4f139aSEli Cohen __acquire(&send_cq->lock); 23296a4f139aSEli Cohen __acquire(&recv_cq->lock); 2330e126ba97SEli Cohen } 2331e126ba97SEli Cohen } 2332e126ba97SEli Cohen 2333e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2334e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2335e126ba97SEli Cohen { 2336e126ba97SEli Cohen if (send_cq) { 2337e126ba97SEli Cohen if (recv_cq) { 2338e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2339e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 234089ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2341e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2342e126ba97SEli Cohen __release(&recv_cq->lock); 234389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2344e126ba97SEli Cohen } else { 2345e126ba97SEli Cohen spin_unlock(&send_cq->lock); 234689ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2347e126ba97SEli Cohen } 2348e126ba97SEli Cohen } else { 23496a4f139aSEli Cohen __release(&recv_cq->lock); 235089ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2351e126ba97SEli Cohen } 2352e126ba97SEli Cohen } else if (recv_cq) { 23536a4f139aSEli Cohen __release(&send_cq->lock); 235489ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 23556a4f139aSEli Cohen } else { 23566a4f139aSEli Cohen __release(&recv_cq->lock); 23576a4f139aSEli Cohen __release(&send_cq->lock); 2358e126ba97SEli Cohen } 2359e126ba97SEli Cohen } 2360e126ba97SEli Cohen 2361e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2362e126ba97SEli Cohen { 2363e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2364e126ba97SEli Cohen } 2365e126ba97SEli Cohen 236689ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 236789ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2368e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2369e126ba97SEli Cohen { 237089ea94a7SMaor Gottlieb switch (qp_type) { 2371e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2372e126ba97SEli Cohen *send_cq = NULL; 2373e126ba97SEli Cohen *recv_cq = NULL; 2374e126ba97SEli Cohen break; 2375e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2376e126ba97SEli Cohen case IB_QPT_XRC_INI: 237789ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2378e126ba97SEli Cohen *recv_cq = NULL; 2379e126ba97SEli Cohen break; 2380e126ba97SEli Cohen 2381e126ba97SEli Cohen case IB_QPT_SMI: 2382d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2383e126ba97SEli Cohen case IB_QPT_RC: 2384e126ba97SEli Cohen case IB_QPT_UC: 2385e126ba97SEli Cohen case IB_QPT_UD: 2386e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2387e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 23880fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 238989ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 239089ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2391e126ba97SEli Cohen break; 2392e126ba97SEli Cohen 2393e126ba97SEli Cohen case IB_QPT_MAX: 2394e126ba97SEli Cohen default: 2395e126ba97SEli Cohen *send_cq = NULL; 2396e126ba97SEli Cohen *recv_cq = NULL; 2397e126ba97SEli Cohen break; 2398e126ba97SEli Cohen } 2399e126ba97SEli Cohen } 2400e126ba97SEli Cohen 2401ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 240213eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 240313eab21fSAviv Heller u8 lag_tx_affinity); 2404ad5f8e96Smajd@mellanox.com 2405bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 2406bdeacabdSShamir Rabinovitch struct ib_udata *udata) 2407e126ba97SEli Cohen { 2408e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2409c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 241089ea94a7SMaor Gottlieb unsigned long flags; 2411e126ba97SEli Cohen int err; 2412e126ba97SEli Cohen 241328d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 241428d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 241528d61370SYishai Hadas return; 241628d61370SYishai Hadas } 241728d61370SYishai Hadas 2418c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2419c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 24200fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 24210fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 24220fb2ed66Smajd@mellanox.com 24236aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2424c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2425c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2426ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 24271a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 24281a412fb1SSaeed Mahameed NULL, &base->mqp); 2429ad5f8e96Smajd@mellanox.com } else { 24300680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 24310680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 24320680efa2SAlex Vesker }; 24330680efa2SAlex Vesker 243413eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2435ad5f8e96Smajd@mellanox.com } 2436ad5f8e96Smajd@mellanox.com if (err) 2437427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 243819098df2Smajd@mellanox.com base->mqp.qpn); 24396aec21f6SHaggai Eran } 2440e126ba97SEli Cohen 244189ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 244289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 244389ea94a7SMaor Gottlieb 244489ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 244589ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 244689ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 244789ea94a7SMaor Gottlieb list_del(&qp->qps_list); 244889ea94a7SMaor Gottlieb if (send_cq) 244989ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 245089ea94a7SMaor Gottlieb 245189ea94a7SMaor Gottlieb if (recv_cq) 245289ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2453e126ba97SEli Cohen 2454e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 245519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2456e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2457e126ba97SEli Cohen if (send_cq != recv_cq) 245819098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 245919098df2Smajd@mellanox.com NULL); 2460e126ba97SEli Cohen } 246189ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 246289ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2463e126ba97SEli Cohen 2464c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2465c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 24660fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 24670fb2ed66Smajd@mellanox.com } else { 246819098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2469e126ba97SEli Cohen if (err) 24700fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 24710fb2ed66Smajd@mellanox.com base->mqp.qpn); 24720fb2ed66Smajd@mellanox.com } 2473e126ba97SEli Cohen 2474e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2475e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2476e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2477bdeacabdSShamir Rabinovitch destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata); 2478e126ba97SEli Cohen } 2479e126ba97SEli Cohen 2480e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2481e126ba97SEli Cohen { 2482e126ba97SEli Cohen switch (type) { 2483e126ba97SEli Cohen case IB_QPT_SMI: 2484e126ba97SEli Cohen return "IB_QPT_SMI"; 2485e126ba97SEli Cohen case IB_QPT_GSI: 2486e126ba97SEli Cohen return "IB_QPT_GSI"; 2487e126ba97SEli Cohen case IB_QPT_RC: 2488e126ba97SEli Cohen return "IB_QPT_RC"; 2489e126ba97SEli Cohen case IB_QPT_UC: 2490e126ba97SEli Cohen return "IB_QPT_UC"; 2491e126ba97SEli Cohen case IB_QPT_UD: 2492e126ba97SEli Cohen return "IB_QPT_UD"; 2493e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2494e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2495e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2496e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2497e126ba97SEli Cohen case IB_QPT_XRC_INI: 2498e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2499e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2500e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2501e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2502e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2503e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2504e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2505b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2506b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2507e126ba97SEli Cohen case IB_QPT_MAX: 2508e126ba97SEli Cohen default: 2509e126ba97SEli Cohen return "Invalid QP type"; 2510e126ba97SEli Cohen } 2511e126ba97SEli Cohen } 2512e126ba97SEli Cohen 2513b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2514b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 251589944450SShamir Rabinovitch struct mlx5_ib_create_qp *ucmd, 251689944450SShamir Rabinovitch struct ib_udata *udata) 2517b4aaa1f0SMoni Shoua { 251889944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 251989944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2520b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2521b4aaa1f0SMoni Shoua int err = 0; 2522b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2523b4aaa1f0SMoni Shoua void *dctc; 2524b4aaa1f0SMoni Shoua 2525b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2526b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2527b4aaa1f0SMoni Shoua 252889944450SShamir Rabinovitch err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx); 2529b4aaa1f0SMoni Shoua if (err) 2530b4aaa1f0SMoni Shoua return ERR_PTR(err); 2531b4aaa1f0SMoni Shoua 2532b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2533b4aaa1f0SMoni Shoua if (!qp) 2534b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2535b4aaa1f0SMoni Shoua 2536b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2537b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2538b4aaa1f0SMoni Shoua err = -ENOMEM; 2539b4aaa1f0SMoni Shoua goto err_free; 2540b4aaa1f0SMoni Shoua } 2541b4aaa1f0SMoni Shoua 2542a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2543b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2544776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2545b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2546b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2547b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2548b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2549b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2550b4aaa1f0SMoni Shoua 25515d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 25525d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 25535d6ff1baSYonatan Cohen 2554b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2555b4aaa1f0SMoni Shoua 2556b4aaa1f0SMoni Shoua return &qp->ibqp; 2557b4aaa1f0SMoni Shoua err_free: 2558b4aaa1f0SMoni Shoua kfree(qp); 2559b4aaa1f0SMoni Shoua return ERR_PTR(err); 2560b4aaa1f0SMoni Shoua } 2561b4aaa1f0SMoni Shoua 2562b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2563e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2564b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2565b4aaa1f0SMoni Shoua struct ib_udata *udata) 2566b4aaa1f0SMoni Shoua { 2567b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2568b4aaa1f0SMoni Shoua int err; 2569b4aaa1f0SMoni Shoua 2570b4aaa1f0SMoni Shoua if (!udata) 2571b4aaa1f0SMoni Shoua return -EINVAL; 2572b4aaa1f0SMoni Shoua 2573b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2574b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2575b4aaa1f0SMoni Shoua return -EINVAL; 2576b4aaa1f0SMoni Shoua } 2577b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2578b4aaa1f0SMoni Shoua if (err) 2579b4aaa1f0SMoni Shoua return err; 2580b4aaa1f0SMoni Shoua 2581b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2582b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2583b4aaa1f0SMoni Shoua } else { 2584b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2585b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2586b4aaa1f0SMoni Shoua } else { 2587b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2588b4aaa1f0SMoni Shoua return -EINVAL; 2589b4aaa1f0SMoni Shoua } 2590b4aaa1f0SMoni Shoua } 2591b4aaa1f0SMoni Shoua 2592b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2593b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2594b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2595b4aaa1f0SMoni Shoua } 2596b4aaa1f0SMoni Shoua 2597b4aaa1f0SMoni Shoua return 0; 2598b4aaa1f0SMoni Shoua } 2599b4aaa1f0SMoni Shoua 2600b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2601b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2602e126ba97SEli Cohen struct ib_udata *udata) 2603e126ba97SEli Cohen { 2604e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2605e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2606e126ba97SEli Cohen u16 xrcdn = 0; 2607e126ba97SEli Cohen int err; 2608b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2609b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 261089944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 261189944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2612e126ba97SEli Cohen 2613e126ba97SEli Cohen if (pd) { 2614e126ba97SEli Cohen dev = to_mdev(pd->device); 26150fb2ed66Smajd@mellanox.com 26160fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 261789944450SShamir Rabinovitch if (!ucontext) { 26180fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 26190fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 262089944450SShamir Rabinovitch } else if (!ucontext->cqe_version) { 26210fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 26220fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 26230fb2ed66Smajd@mellanox.com } 26240fb2ed66Smajd@mellanox.com } 262509f16cf5SMajd Dibbiny } else { 262609f16cf5SMajd Dibbiny /* being cautious here */ 262709f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 262809f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 262909f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 263009f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 263109f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 263209f16cf5SMajd Dibbiny } 263309f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2634e126ba97SEli Cohen } 2635e126ba97SEli Cohen 2636b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2637b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2638b4aaa1f0SMoni Shoua 2639b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2640b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2641b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2642b4aaa1f0SMoni Shoua if (err) 2643b4aaa1f0SMoni Shoua return ERR_PTR(err); 2644c32a4f29SMoni Shoua 2645c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2646c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2647c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2648c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2649c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2650c32a4f29SMoni Shoua } 2651776a3906SMoni Shoua } else { 265289944450SShamir Rabinovitch return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata); 2653c32a4f29SMoni Shoua } 2654b4aaa1f0SMoni Shoua } 2655b4aaa1f0SMoni Shoua 2656e126ba97SEli Cohen switch (init_attr->qp_type) { 2657e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2658e126ba97SEli Cohen case IB_QPT_XRC_INI: 2659938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2660e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2661e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2662e126ba97SEli Cohen } 2663e126ba97SEli Cohen init_attr->recv_cq = NULL; 2664e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2665e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2666e126ba97SEli Cohen init_attr->send_cq = NULL; 2667e126ba97SEli Cohen } 2668e126ba97SEli Cohen 2669e126ba97SEli Cohen /* fall through */ 26700fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2671e126ba97SEli Cohen case IB_QPT_RC: 2672e126ba97SEli Cohen case IB_QPT_UC: 2673e126ba97SEli Cohen case IB_QPT_UD: 2674e126ba97SEli Cohen case IB_QPT_SMI: 2675d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2676e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2677c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2678e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2679e126ba97SEli Cohen if (!qp) 2680e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2681e126ba97SEli Cohen 2682e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2683e126ba97SEli Cohen if (err) { 2684e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2685e126ba97SEli Cohen kfree(qp); 2686e126ba97SEli Cohen return ERR_PTR(err); 2687e126ba97SEli Cohen } 2688e126ba97SEli Cohen 2689e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2690e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2691e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2692e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2693e126ba97SEli Cohen else 269419098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2695e126ba97SEli Cohen 2696e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 269719098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2698a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2699a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2700e126ba97SEli Cohen 270119098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2702e126ba97SEli Cohen 2703e126ba97SEli Cohen break; 2704e126ba97SEli Cohen 2705d16e91daSHaggai Eran case IB_QPT_GSI: 2706d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2707d16e91daSHaggai Eran 2708e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2709e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2710e126ba97SEli Cohen case IB_QPT_MAX: 2711e126ba97SEli Cohen default: 2712e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2713e126ba97SEli Cohen init_attr->qp_type); 2714e126ba97SEli Cohen /* Don't support raw QPs */ 2715e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2716e126ba97SEli Cohen } 2717e126ba97SEli Cohen 2718b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2719b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2720b4aaa1f0SMoni Shoua 2721e126ba97SEli Cohen return &qp->ibqp; 2722e126ba97SEli Cohen } 2723e126ba97SEli Cohen 2724776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2725776a3906SMoni Shoua { 2726776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2727776a3906SMoni Shoua 2728776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2729776a3906SMoni Shoua int err; 2730776a3906SMoni Shoua 2731776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2732776a3906SMoni Shoua if (err) { 2733776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2734776a3906SMoni Shoua return err; 2735776a3906SMoni Shoua } 2736776a3906SMoni Shoua } 2737776a3906SMoni Shoua 2738776a3906SMoni Shoua kfree(mqp->dct.in); 2739776a3906SMoni Shoua kfree(mqp); 2740776a3906SMoni Shoua return 0; 2741776a3906SMoni Shoua } 2742776a3906SMoni Shoua 2743c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata) 2744e126ba97SEli Cohen { 2745e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2746e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2747e126ba97SEli Cohen 2748d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2749d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2750d16e91daSHaggai Eran 2751776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2752776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2753776a3906SMoni Shoua 2754bdeacabdSShamir Rabinovitch destroy_qp_common(dev, mqp, udata); 2755e126ba97SEli Cohen 2756e126ba97SEli Cohen kfree(mqp); 2757e126ba97SEli Cohen 2758e126ba97SEli Cohen return 0; 2759e126ba97SEli Cohen } 2760e126ba97SEli Cohen 2761a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2762a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2763bf3b4f06SBart Van Assche int attr_mask, __be32 *hw_access_flags_be) 2764e126ba97SEli Cohen { 2765e126ba97SEli Cohen u8 dest_rd_atomic; 2766bf3b4f06SBart Van Assche u32 access_flags, hw_access_flags = 0; 2767e126ba97SEli Cohen 2768a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2769a60109dcSYonatan Cohen 2770e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2771e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2772e126ba97SEli Cohen else 277319098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2774e126ba97SEli Cohen 2775e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2776e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2777e126ba97SEli Cohen else 277819098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2779e126ba97SEli Cohen 2780e126ba97SEli Cohen if (!dest_rd_atomic) 2781e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2782e126ba97SEli Cohen 2783e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2784bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RRE; 278513f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 2786a60109dcSYonatan Cohen int atomic_mode; 2787e126ba97SEli Cohen 2788a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2789a60109dcSYonatan Cohen if (atomic_mode < 0) 2790a60109dcSYonatan Cohen return -EOPNOTSUPP; 2791a60109dcSYonatan Cohen 2792bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RAE; 2793bf3b4f06SBart Van Assche hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2794a60109dcSYonatan Cohen } 2795a60109dcSYonatan Cohen 2796a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2797bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RWE; 2798a60109dcSYonatan Cohen 2799bf3b4f06SBart Van Assche *hw_access_flags_be = cpu_to_be32(hw_access_flags); 2800a60109dcSYonatan Cohen 2801a60109dcSYonatan Cohen return 0; 2802e126ba97SEli Cohen } 2803e126ba97SEli Cohen 2804e126ba97SEli Cohen enum { 2805e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2806e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2807e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2808e126ba97SEli Cohen }; 2809e126ba97SEli Cohen 2810e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2811e126ba97SEli Cohen { 28124f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2813e126ba97SEli Cohen return 0; 28144f32ac2eSDanit Goldberg 2815a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 2816e126ba97SEli Cohen return -EINVAL; 28174f32ac2eSDanit Goldberg 28184f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2819e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2820938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2821e126ba97SEli Cohen --rate; 2822e126ba97SEli Cohen 28234f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2824e126ba97SEli Cohen } 2825e126ba97SEli Cohen 282675850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 28271cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 28281cd6dbd3SYishai Hadas struct ib_pd *pd) 282975850d0bSmajd@mellanox.com { 283075850d0bSmajd@mellanox.com void *in; 283175850d0bSmajd@mellanox.com void *tisc; 283275850d0bSmajd@mellanox.com int inlen; 283375850d0bSmajd@mellanox.com int err; 283475850d0bSmajd@mellanox.com 283575850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28361b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 283775850d0bSmajd@mellanox.com if (!in) 283875850d0bSmajd@mellanox.com return -ENOMEM; 283975850d0bSmajd@mellanox.com 284075850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 28411cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 284275850d0bSmajd@mellanox.com 284375850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 284475850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 284575850d0bSmajd@mellanox.com 284675850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 284775850d0bSmajd@mellanox.com 284875850d0bSmajd@mellanox.com kvfree(in); 284975850d0bSmajd@mellanox.com 285075850d0bSmajd@mellanox.com return err; 285175850d0bSmajd@mellanox.com } 285275850d0bSmajd@mellanox.com 285313eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 28541cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 28551cd6dbd3SYishai Hadas struct ib_pd *pd) 285613eab21fSAviv Heller { 285713eab21fSAviv Heller void *in; 285813eab21fSAviv Heller void *tisc; 285913eab21fSAviv Heller int inlen; 286013eab21fSAviv Heller int err; 286113eab21fSAviv Heller 286213eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28631b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 286413eab21fSAviv Heller if (!in) 286513eab21fSAviv Heller return -ENOMEM; 286613eab21fSAviv Heller 286713eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 28681cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 286913eab21fSAviv Heller 287013eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 287113eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 287213eab21fSAviv Heller 287313eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 287413eab21fSAviv Heller 287513eab21fSAviv Heller kvfree(in); 287613eab21fSAviv Heller 287713eab21fSAviv Heller return err; 287813eab21fSAviv Heller } 287913eab21fSAviv Heller 288075850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 288190898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2882e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2883f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2884f879ee8dSAchiad Shochat bool alt) 2885e126ba97SEli Cohen { 2886d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2887e126ba97SEli Cohen int err; 2888ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2889d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2890d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2891e126ba97SEli Cohen 2892e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2893f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2894f879ee8dSAchiad Shochat attr->pkey_index); 2895e126ba97SEli Cohen 2896d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2897d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2898938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2899f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2900d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2901938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2902f83b4263SEli Cohen return -EINVAL; 2903f83b4263SEli Cohen } 29042811ba51SAchiad Shochat } 290544c58487SDasaratharaman Chandramouli 290644c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2907d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 29082811ba51SAchiad Shochat return -EINVAL; 290947ec3866SParav Pandit 291044c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 29112b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 29122b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 29132b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 29142b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 291547ec3866SParav Pandit path->udp_sport = 291647ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2917d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 291847ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2919ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2920d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 29212811ba51SAchiad Shochat } else { 2922d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2923d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2924d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2925d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2926d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2927d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2928e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2929d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 29302811ba51SAchiad Shochat } 29312811ba51SAchiad Shochat 2932d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2933d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2934d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2935e126ba97SEli Cohen path->tclass_flowlabel = 2936d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2937d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2938d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2939e126ba97SEli Cohen } 2940e126ba97SEli Cohen 2941d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2942e126ba97SEli Cohen if (err < 0) 2943e126ba97SEli Cohen return err; 2944e126ba97SEli Cohen path->static_rate = err; 2945e126ba97SEli Cohen path->port = port; 2946e126ba97SEli Cohen 2947e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2948f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2949e126ba97SEli Cohen 295075850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 295175850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 295275850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 29531cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 295475850d0bSmajd@mellanox.com 2955e126ba97SEli Cohen return 0; 2956e126ba97SEli Cohen } 2957e126ba97SEli Cohen 2958e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2959e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2960e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2961e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2962e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2963e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2964e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2965e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2966e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2967e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2968e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2969e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2970e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2971e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2972e126ba97SEli Cohen }, 2973e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2974e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2975e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2976e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2977e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2978e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2979e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2980e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2981e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2982e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2983e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2984e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2985e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2986a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2987a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2988a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2989a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2990a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2991e126ba97SEli Cohen }, 2992e126ba97SEli Cohen }, 2993e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2994e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2995e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2996e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2997e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2998e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2999e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3000e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 3001e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3002e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3003e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 3004e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3005e126ba97SEli Cohen }, 3006e126ba97SEli Cohen }, 3007e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3008e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3009e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3010e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3011e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3012e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 3013c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3014c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3015e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3016c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3017c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3018e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 3019e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 3020e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 3021e126ba97SEli Cohen }, 3022e126ba97SEli Cohen }, 3023e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 3024e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3025e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3026e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 302775959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 3028a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 3029a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3030a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3031a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 3032e126ba97SEli Cohen }, 3033e126ba97SEli Cohen }, 3034e126ba97SEli Cohen }; 3035e126ba97SEli Cohen 3036e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 3037e126ba97SEli Cohen { 3038e126ba97SEli Cohen switch (ib_mask) { 3039e126ba97SEli Cohen case IB_QP_STATE: 3040e126ba97SEli Cohen return 0; 3041e126ba97SEli Cohen case IB_QP_CUR_STATE: 3042e126ba97SEli Cohen return 0; 3043e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 3044e126ba97SEli Cohen return 0; 3045e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 3046e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 3047e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 3048e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 3049e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 3050e126ba97SEli Cohen case IB_QP_PORT: 3051e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 3052e126ba97SEli Cohen case IB_QP_QKEY: 3053e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 3054e126ba97SEli Cohen case IB_QP_AV: 3055e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 3056e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 3057e126ba97SEli Cohen case IB_QP_PATH_MTU: 3058e126ba97SEli Cohen return 0; 3059e126ba97SEli Cohen case IB_QP_TIMEOUT: 3060e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 3061e126ba97SEli Cohen case IB_QP_RETRY_CNT: 3062e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 3063e126ba97SEli Cohen case IB_QP_RNR_RETRY: 3064e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 3065e126ba97SEli Cohen case IB_QP_RQ_PSN: 3066e126ba97SEli Cohen return 0; 3067e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 3068e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 3069e126ba97SEli Cohen case IB_QP_ALT_PATH: 3070e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 3071e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 3072e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 3073e126ba97SEli Cohen case IB_QP_SQ_PSN: 3074e126ba97SEli Cohen return 0; 3075e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 3076e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 3077e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 3078e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 3079e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 3080e126ba97SEli Cohen case IB_QP_CAP: 3081e126ba97SEli Cohen return 0; 3082e126ba97SEli Cohen case IB_QP_DEST_QPN: 3083e126ba97SEli Cohen return 0; 3084e126ba97SEli Cohen } 3085e126ba97SEli Cohen return 0; 3086e126ba97SEli Cohen } 3087e126ba97SEli Cohen 3088e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 3089e126ba97SEli Cohen { 3090e126ba97SEli Cohen int result = 0; 3091e126ba97SEli Cohen int i; 3092e126ba97SEli Cohen 3093e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 3094e126ba97SEli Cohen if ((1 << i) & ib_mask) 3095e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 3096e126ba97SEli Cohen } 3097e126ba97SEli Cohen 3098e126ba97SEli Cohen return result; 3099e126ba97SEli Cohen } 3100e126ba97SEli Cohen 310134d57585SYishai Hadas static int modify_raw_packet_qp_rq( 310234d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 310334d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3104ad5f8e96Smajd@mellanox.com { 3105ad5f8e96Smajd@mellanox.com void *in; 3106ad5f8e96Smajd@mellanox.com void *rqc; 3107ad5f8e96Smajd@mellanox.com int inlen; 3108ad5f8e96Smajd@mellanox.com int err; 3109ad5f8e96Smajd@mellanox.com 3110ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 31111b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3112ad5f8e96Smajd@mellanox.com if (!in) 3113ad5f8e96Smajd@mellanox.com return -ENOMEM; 3114ad5f8e96Smajd@mellanox.com 3115ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 311634d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3117ad5f8e96Smajd@mellanox.com 3118ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3119ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3120ad5f8e96Smajd@mellanox.com 3121eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3122eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3123eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 312423a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3125eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3126eb49ab0cSAlex Vesker } else 31275a738b5dSJason Gunthorpe dev_info_once( 31285a738b5dSJason Gunthorpe &dev->ib_dev.dev, 31295a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3130eb49ab0cSAlex Vesker } 3131eb49ab0cSAlex Vesker 3132eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 3133ad5f8e96Smajd@mellanox.com if (err) 3134ad5f8e96Smajd@mellanox.com goto out; 3135ad5f8e96Smajd@mellanox.com 3136ad5f8e96Smajd@mellanox.com rq->state = new_state; 3137ad5f8e96Smajd@mellanox.com 3138ad5f8e96Smajd@mellanox.com out: 3139ad5f8e96Smajd@mellanox.com kvfree(in); 3140ad5f8e96Smajd@mellanox.com return err; 3141ad5f8e96Smajd@mellanox.com } 3142ad5f8e96Smajd@mellanox.com 3143c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3144c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3145c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3146ad5f8e96Smajd@mellanox.com { 31477d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 314861147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 314961147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 315061147f39SBodong Wang bool new_rate_added = false; 31517d29f349SBodong Wang u16 rl_index = 0; 3152ad5f8e96Smajd@mellanox.com void *in; 3153ad5f8e96Smajd@mellanox.com void *sqc; 3154ad5f8e96Smajd@mellanox.com int inlen; 3155ad5f8e96Smajd@mellanox.com int err; 3156ad5f8e96Smajd@mellanox.com 3157ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 31581b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3159ad5f8e96Smajd@mellanox.com if (!in) 3160ad5f8e96Smajd@mellanox.com return -ENOMEM; 3161ad5f8e96Smajd@mellanox.com 3162c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3163ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3164ad5f8e96Smajd@mellanox.com 3165ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3166ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3167ad5f8e96Smajd@mellanox.com 31687d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 31697d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 31707d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 31717d29f349SBodong Wang __func__); 31727d29f349SBodong Wang else 317361147f39SBodong Wang new_rl = raw_qp_param->rl; 31747d29f349SBodong Wang } 3175ad5f8e96Smajd@mellanox.com 317661147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 317761147f39SBodong Wang if (new_rl.rate) { 317861147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 31797d29f349SBodong Wang if (err) { 318061147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 318161147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 318261147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 318361147f39SBodong Wang new_rl.typical_pkt_sz); 318461147f39SBodong Wang 31857d29f349SBodong Wang goto out; 31867d29f349SBodong Wang } 318761147f39SBodong Wang new_rate_added = true; 31887d29f349SBodong Wang } 31897d29f349SBodong Wang 31907d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 319161147f39SBodong Wang /* index 0 means no limit */ 31927d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 31937d29f349SBodong Wang } 31947d29f349SBodong Wang 31957d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 31967d29f349SBodong Wang if (err) { 31977d29f349SBodong Wang /* Remove new rate from table if failed */ 319861147f39SBodong Wang if (new_rate_added) 319961147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 32007d29f349SBodong Wang goto out; 32017d29f349SBodong Wang } 32027d29f349SBodong Wang 32037d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 320461147f39SBodong Wang if ((old_rl.rate && 320561147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 32067d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 320761147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 32087d29f349SBodong Wang 320961147f39SBodong Wang ibqp->rl = new_rl; 3210ad5f8e96Smajd@mellanox.com sq->state = new_state; 3211ad5f8e96Smajd@mellanox.com 3212ad5f8e96Smajd@mellanox.com out: 3213ad5f8e96Smajd@mellanox.com kvfree(in); 3214ad5f8e96Smajd@mellanox.com return err; 3215ad5f8e96Smajd@mellanox.com } 3216ad5f8e96Smajd@mellanox.com 3217ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 321813eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 321913eab21fSAviv Heller u8 tx_affinity) 3220ad5f8e96Smajd@mellanox.com { 3221ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3222ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3223ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 32247d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 32257d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3226ad5f8e96Smajd@mellanox.com int rq_state; 3227ad5f8e96Smajd@mellanox.com int sq_state; 3228ad5f8e96Smajd@mellanox.com int err; 3229ad5f8e96Smajd@mellanox.com 32300680efa2SAlex Vesker switch (raw_qp_param->operation) { 3231ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3232ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3233ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3234ad5f8e96Smajd@mellanox.com break; 3235ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3236ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3237ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3238ad5f8e96Smajd@mellanox.com break; 3239ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3240ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3241ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3242ad5f8e96Smajd@mellanox.com break; 3243ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3244ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 32457d29f349SBodong Wang if (raw_qp_param->set_mask == 32467d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 32477d29f349SBodong Wang modify_rq = 0; 32487d29f349SBodong Wang sq_state = sq->state; 32497d29f349SBodong Wang } else { 32507d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 32517d29f349SBodong Wang } 32527d29f349SBodong Wang break; 32537d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 32547d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3255eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3256eb49ab0cSAlex Vesker return -EINVAL; 3257eb49ab0cSAlex Vesker else 3258ad5f8e96Smajd@mellanox.com return 0; 3259ad5f8e96Smajd@mellanox.com default: 3260ad5f8e96Smajd@mellanox.com WARN_ON(1); 3261ad5f8e96Smajd@mellanox.com return -EINVAL; 3262ad5f8e96Smajd@mellanox.com } 3263ad5f8e96Smajd@mellanox.com 32647d29f349SBodong Wang if (modify_rq) { 326534d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 326634d57585SYishai Hadas qp->ibqp.pd); 3267ad5f8e96Smajd@mellanox.com if (err) 3268ad5f8e96Smajd@mellanox.com return err; 3269ad5f8e96Smajd@mellanox.com } 3270ad5f8e96Smajd@mellanox.com 32717d29f349SBodong Wang if (modify_sq) { 327213eab21fSAviv Heller if (tx_affinity) { 327313eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 32741cd6dbd3SYishai Hadas tx_affinity, 32751cd6dbd3SYishai Hadas qp->ibqp.pd); 327613eab21fSAviv Heller if (err) 327713eab21fSAviv Heller return err; 327813eab21fSAviv Heller } 327913eab21fSAviv Heller 3280c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3281c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 328213eab21fSAviv Heller } 3283ad5f8e96Smajd@mellanox.com 3284ad5f8e96Smajd@mellanox.com return 0; 3285ad5f8e96Smajd@mellanox.com } 3286ad5f8e96Smajd@mellanox.com 3287c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3288c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3289c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 329089944450SShamir Rabinovitch u8 port_num, struct ib_udata *udata) 3291c6a21c38SMajd Dibbiny { 329289944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 329389944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 3294c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3295c6a21c38SMajd Dibbiny 3296c6a21c38SMajd Dibbiny if (ucontext) { 3297c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3298c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3299c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3300c6a21c38SMajd Dibbiny 1; 3301c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3302c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3303c6a21c38SMajd Dibbiny } else { 3304c6a21c38SMajd Dibbiny tx_port_affinity = 3305c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 330695579e78SMark Bloch 1, &dev->port[port_num].roce.tx_port_affinity) % 3307c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3308c6a21c38SMajd Dibbiny 1; 3309c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3310c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3311c6a21c38SMajd Dibbiny } 3312c6a21c38SMajd Dibbiny 3313c6a21c38SMajd Dibbiny return tx_port_affinity; 3314c6a21c38SMajd Dibbiny } 3315c6a21c38SMajd Dibbiny 3316e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3317e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 331889944450SShamir Rabinovitch enum ib_qp_state cur_state, 331989944450SShamir Rabinovitch enum ib_qp_state new_state, 332089944450SShamir Rabinovitch const struct mlx5_ib_modify_qp *ucmd, 332189944450SShamir Rabinovitch struct ib_udata *udata) 3322e126ba97SEli Cohen { 3323427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3324427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3325427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3326427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3327427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3328427c1e7bSmajd@mellanox.com }, 3329427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3330427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3331427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3332427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3333427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3334427c1e7bSmajd@mellanox.com }, 3335427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3336427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3337427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3338427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3339427c1e7bSmajd@mellanox.com }, 3340427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3341427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3342427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3343427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3344427c1e7bSmajd@mellanox.com }, 3345427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3346427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3347427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3348427c1e7bSmajd@mellanox.com }, 3349427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3350427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3351427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3352427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3353427c1e7bSmajd@mellanox.com }, 3354427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3355427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3356427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3357427c1e7bSmajd@mellanox.com } 3358427c1e7bSmajd@mellanox.com }; 3359427c1e7bSmajd@mellanox.com 3360e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3361e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 336219098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3363e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3364e126ba97SEli Cohen struct mlx5_qp_context *context; 3365e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3366eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3367e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3368e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3369e126ba97SEli Cohen int mlx5_st; 3370e126ba97SEli Cohen int err; 3371427c1e7bSmajd@mellanox.com u16 op; 337213eab21fSAviv Heller u8 tx_affinity = 0; 3373e126ba97SEli Cohen 337455de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 337555de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 337655de9a77SLeon Romanovsky if (mlx5_st < 0) 337755de9a77SLeon Romanovsky return -EINVAL; 337855de9a77SLeon Romanovsky 33791a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 33801a412fb1SSaeed Mahameed if (!context) 3381e126ba97SEli Cohen return -ENOMEM; 3382e126ba97SEli Cohen 3383c6a21c38SMajd Dibbiny pd = get_pd(qp); 338455de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3385e126ba97SEli Cohen 3386e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3387e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3388e126ba97SEli Cohen } else { 3389e126ba97SEli Cohen switch (attr->path_mig_state) { 3390e126ba97SEli Cohen case IB_MIG_MIGRATED: 3391e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3392e126ba97SEli Cohen break; 3393e126ba97SEli Cohen case IB_MIG_REARM: 3394e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3395e126ba97SEli Cohen break; 3396e126ba97SEli Cohen case IB_MIG_ARMED: 3397e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3398e126ba97SEli Cohen break; 3399e126ba97SEli Cohen } 3400e126ba97SEli Cohen } 3401e126ba97SEli Cohen 340213eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 340313eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 340413eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 340513eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 340613eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 340713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 340813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 340913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 34107c34ec19SAviv Heller if (dev->lag_active) { 341195579e78SMark Bloch u8 p = mlx5_core_native_port_num(dev->mdev) - 1; 341289944450SShamir Rabinovitch tx_affinity = get_tx_affinity(dev, pd, base, p, 341389944450SShamir Rabinovitch udata); 341413eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 341513eab21fSAviv Heller } 341613eab21fSAviv Heller } 341713eab21fSAviv Heller } 341813eab21fSAviv Heller 3419d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3420e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3421c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3422c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3423e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3424e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3425e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3426e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3427e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3428e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3429e126ba97SEli Cohen err = -EINVAL; 3430e126ba97SEli Cohen goto out; 3431e126ba97SEli Cohen } 3432938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3433938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3434e126ba97SEli Cohen } 3435e126ba97SEli Cohen 3436e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3437e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3438e126ba97SEli Cohen 3439e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3440d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3441e126ba97SEli Cohen 3442e126ba97SEli Cohen /* todo implement counter_index functionality */ 3443e126ba97SEli Cohen 3444e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3445e126ba97SEli Cohen context->pri_path.port = qp->port; 3446e126ba97SEli Cohen 3447e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3448e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3449e126ba97SEli Cohen 3450e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 345175850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3452e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3453f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3454e126ba97SEli Cohen if (err) 3455e126ba97SEli Cohen goto out; 3456e126ba97SEli Cohen } 3457e126ba97SEli Cohen 3458e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3459e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3460e126ba97SEli Cohen 3461e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 346275850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 346375850d0bSmajd@mellanox.com &context->alt_path, 3464f879ee8dSAchiad Shochat attr->alt_port_num, 3465f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3466f879ee8dSAchiad Shochat 0, attr, true); 3467e126ba97SEli Cohen if (err) 3468e126ba97SEli Cohen goto out; 3469e126ba97SEli Cohen } 3470e126ba97SEli Cohen 347189ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 347289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3473e126ba97SEli Cohen 3474e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3475e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3476e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3477e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3478e126ba97SEli Cohen 3479e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3480e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3481e126ba97SEli Cohen 3482e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3483e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3484e126ba97SEli Cohen 3485e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3486e126ba97SEli Cohen if (attr->max_rd_atomic) 3487e126ba97SEli Cohen context->params1 |= 3488e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3489e126ba97SEli Cohen } 3490e126ba97SEli Cohen 3491e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3492e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3493e126ba97SEli Cohen 3494e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3495e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3496e126ba97SEli Cohen context->params2 |= 3497e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3498e126ba97SEli Cohen } 3499e126ba97SEli Cohen 3500a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3501bf3b4f06SBart Van Assche __be32 access_flags; 3502a60109dcSYonatan Cohen 3503a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3504a60109dcSYonatan Cohen if (err) 3505a60109dcSYonatan Cohen goto out; 3506a60109dcSYonatan Cohen 3507a60109dcSYonatan Cohen context->params2 |= access_flags; 3508a60109dcSYonatan Cohen } 3509e126ba97SEli Cohen 3510e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3511e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3512e126ba97SEli Cohen 3513e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3514e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3515e126ba97SEli Cohen 3516e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3517e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3518e126ba97SEli Cohen 3519e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3520e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3521e126ba97SEli Cohen 35220837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 35230837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 35240837e86aSMark Bloch qp->port) - 1; 3525c2e53b2cSYishai Hadas 3526c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3527c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3528c2e53b2cSYishai Hadas port_num = 0; 3529c2e53b2cSYishai Hadas 3530eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 35310837e86aSMark Bloch context->qp_counter_set_usr_page |= 3532e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 35330837e86aSMark Bloch } 35340837e86aSMark Bloch 3535e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3536e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3537e126ba97SEli Cohen 3538b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3539b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3540e126ba97SEli Cohen 3541e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3542e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3543e126ba97SEli Cohen 3544427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 35455d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 35465d414b17SDan Carpenter err = -EINVAL; 3547427c1e7bSmajd@mellanox.com goto out; 35485d414b17SDan Carpenter } 3549427c1e7bSmajd@mellanox.com 3550427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3551e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3552e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3553ad5f8e96Smajd@mellanox.com 3554c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3555c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 35560680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 35570680efa2SAlex Vesker 35580680efa2SAlex Vesker raw_qp_param.operation = op; 3559eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3560e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3561eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3562eb49ab0cSAlex Vesker } 35637d29f349SBodong Wang 35647d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 356561147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 356661147f39SBodong Wang 356761147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 356861147f39SBodong Wang if (attr->rate_limit && 356961147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 357061147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 357161147f39SBodong Wang ucmd->burst_info.max_burst_sz; 357261147f39SBodong Wang } else { 357361147f39SBodong Wang err = -EINVAL; 357461147f39SBodong Wang goto out; 357561147f39SBodong Wang } 357661147f39SBodong Wang } 357761147f39SBodong Wang 357861147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 357961147f39SBodong Wang if (attr->rate_limit && 358061147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 358161147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 358261147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 358361147f39SBodong Wang } else { 358461147f39SBodong Wang err = -EINVAL; 358561147f39SBodong Wang goto out; 358661147f39SBodong Wang } 358761147f39SBodong Wang } 358861147f39SBodong Wang 35897d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 35907d29f349SBodong Wang } 35917d29f349SBodong Wang 359213eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 35930680efa2SAlex Vesker } else { 35941a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 359519098df2Smajd@mellanox.com &base->mqp); 35960680efa2SAlex Vesker } 35970680efa2SAlex Vesker 3598e126ba97SEli Cohen if (err) 3599e126ba97SEli Cohen goto out; 3600e126ba97SEli Cohen 3601e126ba97SEli Cohen qp->state = new_state; 3602e126ba97SEli Cohen 3603e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 360419098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3605e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 360619098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3607e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3608e126ba97SEli Cohen qp->port = attr->port_num; 3609e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 361019098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3611e126ba97SEli Cohen 3612e126ba97SEli Cohen /* 3613e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3614e126ba97SEli Cohen * entries and reinitialize the QP. 3615e126ba97SEli Cohen */ 361675a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 361775a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 361819098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3619e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3620e126ba97SEli Cohen if (send_cq != recv_cq) 362119098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3622e126ba97SEli Cohen 3623e126ba97SEli Cohen qp->rq.head = 0; 3624e126ba97SEli Cohen qp->rq.tail = 0; 3625e126ba97SEli Cohen qp->sq.head = 0; 3626e126ba97SEli Cohen qp->sq.tail = 0; 3627e126ba97SEli Cohen qp->sq.cur_post = 0; 362834f4c955SGuy Levi if (qp->sq.wqe_cnt) 362934f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3630e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3631e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3632e126ba97SEli Cohen } 3633e126ba97SEli Cohen 3634e126ba97SEli Cohen out: 36351a412fb1SSaeed Mahameed kfree(context); 3636e126ba97SEli Cohen return err; 3637e126ba97SEli Cohen } 3638e126ba97SEli Cohen 3639c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3640c32a4f29SMoni Shoua { 3641c32a4f29SMoni Shoua if ((mask & req) != req) 3642c32a4f29SMoni Shoua return false; 3643c32a4f29SMoni Shoua 3644c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3645c32a4f29SMoni Shoua return false; 3646c32a4f29SMoni Shoua 3647c32a4f29SMoni Shoua return true; 3648c32a4f29SMoni Shoua } 3649c32a4f29SMoni Shoua 3650c32a4f29SMoni Shoua /* check valid transition for driver QP types 3651c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3652c32a4f29SMoni Shoua */ 3653c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3654c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3655c32a4f29SMoni Shoua { 3656c32a4f29SMoni Shoua int req = IB_QP_STATE; 3657c32a4f29SMoni Shoua int opt = 0; 3658c32a4f29SMoni Shoua 365999ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 366099ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 366199ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3662c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3663c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3664c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3665c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3666c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3667c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3668c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 36695ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3670c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3671c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3672c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3673c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3674c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3675c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3676c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3677c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3678c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3679c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3680c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3681c32a4f29SMoni Shoua } 3682c32a4f29SMoni Shoua return false; 3683c32a4f29SMoni Shoua } 3684c32a4f29SMoni Shoua 3685776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3686776a3906SMoni Shoua * valid transitions are: 3687776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3688776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3689776a3906SMoni Shoua * mtu, gid_index and hop_limit 3690776a3906SMoni Shoua * Other transitions and attributes are illegal 3691776a3906SMoni Shoua */ 3692776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3693776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3694776a3906SMoni Shoua { 3695776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3696776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3697776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3698776a3906SMoni Shoua int err = 0; 3699776a3906SMoni Shoua int required = IB_QP_STATE; 3700776a3906SMoni Shoua void *dctc; 3701776a3906SMoni Shoua 3702776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3703776a3906SMoni Shoua return -EINVAL; 3704776a3906SMoni Shoua 3705776a3906SMoni Shoua cur_state = qp->state; 3706776a3906SMoni Shoua new_state = attr->qp_state; 3707776a3906SMoni Shoua 3708776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3709776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3710776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3711776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3712776a3906SMoni Shoua return -EINVAL; 3713776a3906SMoni Shoua 3714776a3906SMoni Shoua if (attr->port_num == 0 || 3715776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3716776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3717776a3906SMoni Shoua attr->port_num, dev->num_ports); 3718776a3906SMoni Shoua return -EINVAL; 3719776a3906SMoni Shoua } 3720776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3721776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3722776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3723776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3724776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3725a60109dcSYonatan Cohen int atomic_mode; 3726a60109dcSYonatan Cohen 3727a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3728a60109dcSYonatan Cohen if (atomic_mode < 0) 3729776a3906SMoni Shoua return -EOPNOTSUPP; 3730a60109dcSYonatan Cohen 3731a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3732776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3733776a3906SMoni Shoua } 3734776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3735776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3736776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3737776a3906SMoni Shoua 3738776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3739776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3740c5ae1954SYishai Hadas u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; 3741776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3742776a3906SMoni Shoua sizeof(resp.dctn); 3743776a3906SMoni Shoua 3744776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3745776a3906SMoni Shoua return -EINVAL; 3746776a3906SMoni Shoua resp.response_length = min_resp_len; 3747776a3906SMoni Shoua 3748776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3749776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3750776a3906SMoni Shoua return -EINVAL; 3751776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3752776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3753776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3754776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3755776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3756776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3757776a3906SMoni Shoua 3758776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3759c5ae1954SYishai Hadas MLX5_ST_SZ_BYTES(create_dct_in), out, 3760c5ae1954SYishai Hadas sizeof(out)); 3761776a3906SMoni Shoua if (err) 3762776a3906SMoni Shoua return err; 3763776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3764776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3765776a3906SMoni Shoua if (err) { 3766776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3767776a3906SMoni Shoua return err; 3768776a3906SMoni Shoua } 3769776a3906SMoni Shoua } else { 3770776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3771776a3906SMoni Shoua return -EINVAL; 3772776a3906SMoni Shoua } 3773776a3906SMoni Shoua if (err) 3774776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3775776a3906SMoni Shoua else 3776776a3906SMoni Shoua qp->state = new_state; 3777776a3906SMoni Shoua return err; 3778776a3906SMoni Shoua } 3779776a3906SMoni Shoua 3780e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3781e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3782e126ba97SEli Cohen { 3783e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3784e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 378561147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3786d16e91daSHaggai Eran enum ib_qp_type qp_type; 3787e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 378861147f39SBodong Wang size_t required_cmd_sz; 3789e126ba97SEli Cohen int err = -EINVAL; 3790e126ba97SEli Cohen int port; 3791e126ba97SEli Cohen 379228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 379328d61370SYishai Hadas return -ENOSYS; 379428d61370SYishai Hadas 379561147f39SBodong Wang if (udata && udata->inlen) { 379661147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 379761147f39SBodong Wang sizeof(ucmd.reserved); 379861147f39SBodong Wang if (udata->inlen < required_cmd_sz) 379961147f39SBodong Wang return -EINVAL; 380061147f39SBodong Wang 380161147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 380261147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 380361147f39SBodong Wang udata->inlen - sizeof(ucmd))) 380461147f39SBodong Wang return -EOPNOTSUPP; 380561147f39SBodong Wang 380661147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 380761147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 380861147f39SBodong Wang return -EFAULT; 380961147f39SBodong Wang 381061147f39SBodong Wang if (ucmd.comp_mask || 381161147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 381261147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 381361147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 381461147f39SBodong Wang return -EOPNOTSUPP; 381561147f39SBodong Wang } 381661147f39SBodong Wang 3817d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3818d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3819d16e91daSHaggai Eran 3820c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3821c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3822c32a4f29SMoni Shoua else 3823d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3824d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3825d16e91daSHaggai Eran 3826776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3827776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3828c32a4f29SMoni Shoua 3829e126ba97SEli Cohen mutex_lock(&qp->mutex); 3830e126ba97SEli Cohen 3831e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3832e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3833e126ba97SEli Cohen 38342811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 38352811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 38362811ba51SAchiad Shochat } 38372811ba51SAchiad Shochat 3838c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3839c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3840c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3841c2e53b2cSYishai Hadas attr_mask); 3842c2e53b2cSYishai Hadas goto out; 3843c2e53b2cSYishai Hadas } 3844c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3845c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3846d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3847d31131bbSKamal Heib attr_mask)) { 3848158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3849158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3850e126ba97SEli Cohen goto out; 3851c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3852c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3853c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3854c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3855c32a4f29SMoni Shoua goto out; 3856158abf86SHaggai Eran } 3857e126ba97SEli Cohen 3858e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3859938fe83cSSaeed Mahameed (attr->port_num == 0 || 3860508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3861158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3862158abf86SHaggai Eran attr->port_num, dev->num_ports); 3863e126ba97SEli Cohen goto out; 3864158abf86SHaggai Eran } 3865e126ba97SEli Cohen 3866e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3867e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3868938fe83cSSaeed Mahameed if (attr->pkey_index >= 3869158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3870158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3871158abf86SHaggai Eran attr->pkey_index); 3872e126ba97SEli Cohen goto out; 3873e126ba97SEli Cohen } 3874158abf86SHaggai Eran } 3875e126ba97SEli Cohen 3876e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3877938fe83cSSaeed Mahameed attr->max_rd_atomic > 3878158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3879158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3880158abf86SHaggai Eran attr->max_rd_atomic); 3881e126ba97SEli Cohen goto out; 3882158abf86SHaggai Eran } 3883e126ba97SEli Cohen 3884e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3885938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3886158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3887158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3888158abf86SHaggai Eran attr->max_dest_rd_atomic); 3889e126ba97SEli Cohen goto out; 3890158abf86SHaggai Eran } 3891e126ba97SEli Cohen 3892e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3893e126ba97SEli Cohen err = 0; 3894e126ba97SEli Cohen goto out; 3895e126ba97SEli Cohen } 3896e126ba97SEli Cohen 389761147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 389889944450SShamir Rabinovitch new_state, &ucmd, udata); 3899e126ba97SEli Cohen 3900e126ba97SEli Cohen out: 3901e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3902e126ba97SEli Cohen return err; 3903e126ba97SEli Cohen } 3904e126ba97SEli Cohen 390534f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 390634f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 390734f4c955SGuy Levi { 390834f4c955SGuy Levi u32 idx; 390934f4c955SGuy Levi 391034f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 391134f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 391234f4c955SGuy Levi 391334f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 391434f4c955SGuy Levi } 391534f4c955SGuy Levi 391634f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 391734f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 391834f4c955SGuy Levi * @sq - SQ buffer. 391934f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 392034f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 392134f4c955SGuy Levi * @cur_edge: Updated current edge. 392234f4c955SGuy Levi */ 392334f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 392434f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 392534f4c955SGuy Levi { 392634f4c955SGuy Levi if (likely(*seg != *cur_edge)) 392734f4c955SGuy Levi return; 392834f4c955SGuy Levi 392934f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 393034f4c955SGuy Levi } 393134f4c955SGuy Levi 393234f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 393334f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 393434f4c955SGuy Levi * @sq - SQ buffer. 393534f4c955SGuy Levi * @cur_edge: Updated current edge. 393634f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 393734f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 393834f4c955SGuy Levi * @src: Pointer to copy from. 393934f4c955SGuy Levi * @n: Number of bytes to copy. 394034f4c955SGuy Levi */ 394134f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 394234f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 394334f4c955SGuy Levi size_t n) 394434f4c955SGuy Levi { 394534f4c955SGuy Levi while (likely(n)) { 394634f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 394734f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 394834f4c955SGuy Levi size_t stride; 394934f4c955SGuy Levi 395034f4c955SGuy Levi memcpy(*seg, src, copysz); 395134f4c955SGuy Levi 395234f4c955SGuy Levi n -= copysz; 395334f4c955SGuy Levi src += copysz; 395434f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 395534f4c955SGuy Levi *seg += stride; 395634f4c955SGuy Levi *wqe_sz += stride >> 4; 395734f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 395834f4c955SGuy Levi } 395934f4c955SGuy Levi } 396034f4c955SGuy Levi 3961e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3962e126ba97SEli Cohen { 3963e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3964e126ba97SEli Cohen unsigned cur; 3965e126ba97SEli Cohen 3966e126ba97SEli Cohen cur = wq->head - wq->tail; 3967e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3968e126ba97SEli Cohen return 0; 3969e126ba97SEli Cohen 3970e126ba97SEli Cohen cq = to_mcq(ib_cq); 3971e126ba97SEli Cohen spin_lock(&cq->lock); 3972e126ba97SEli Cohen cur = wq->head - wq->tail; 3973e126ba97SEli Cohen spin_unlock(&cq->lock); 3974e126ba97SEli Cohen 3975e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3976e126ba97SEli Cohen } 3977e126ba97SEli Cohen 3978e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3979e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3980e126ba97SEli Cohen { 3981e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3982e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3983e126ba97SEli Cohen rseg->reserved = 0; 3984e126ba97SEli Cohen } 3985e126ba97SEli Cohen 398634f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 398734f4c955SGuy Levi void **seg, int *size, void **cur_edge) 3988f0313965SErez Shitrit { 398934f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 3990f0313965SErez Shitrit 3991f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3992f0313965SErez Shitrit 3993f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3994f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3995f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3996f0313965SErez Shitrit 3997f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3998f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 399934f4c955SGuy Levi size_t left, copysz; 4000f0313965SErez Shitrit void *pdata = ud_wr->header; 400134f4c955SGuy Levi size_t stride; 4002f0313965SErez Shitrit 4003f0313965SErez Shitrit left = ud_wr->hlen; 4004f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 40052b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 4006f0313965SErez Shitrit 400734f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 400834f4c955SGuy Levi * first copy up to the current edge and then, if needed, 400934f4c955SGuy Levi * fall-through to memcpy_send_wqe. 4010f0313965SErez Shitrit */ 401134f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 401234f4c955SGuy Levi left); 401334f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 401434f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 401534f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 401634f4c955SGuy Levi *size += stride / 16; 401734f4c955SGuy Levi *seg += stride; 4018f0313965SErez Shitrit 401934f4c955SGuy Levi if (copysz < left) { 402034f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4021f0313965SErez Shitrit left -= copysz; 4022f0313965SErez Shitrit pdata += copysz; 402334f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 402434f4c955SGuy Levi left); 4025f0313965SErez Shitrit } 4026f0313965SErez Shitrit 402734f4c955SGuy Levi return; 402834f4c955SGuy Levi } 402934f4c955SGuy Levi 403034f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 403134f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 4032f0313965SErez Shitrit } 4033f0313965SErez Shitrit 4034e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 4035f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4036e126ba97SEli Cohen { 4037e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 4038e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 4039e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 4040e126ba97SEli Cohen } 4041e126ba97SEli Cohen 4042e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 4043e126ba97SEli Cohen { 4044e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 4045e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 4046e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 4047e126ba97SEli Cohen } 4048e126ba97SEli Cohen 404931616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 4050e126ba97SEli Cohen { 405131616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 405231616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 4053e126ba97SEli Cohen } 4054e126ba97SEli Cohen 4055e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 4056e126ba97SEli Cohen { 4057e126ba97SEli Cohen u64 result; 4058e126ba97SEli Cohen 4059e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 4060e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 4061e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 4062e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 4063e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 4064e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 4065e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 4066e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 4067e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 4068e126ba97SEli Cohen MLX5_MKEY_MASK_A | 4069e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 4070e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4071e126ba97SEli Cohen 4072e126ba97SEli Cohen return cpu_to_be64(result); 4073e126ba97SEli Cohen } 4074e126ba97SEli Cohen 4075e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 4076e6631814SSagi Grimberg { 4077e6631814SSagi Grimberg u64 result; 4078e6631814SSagi Grimberg 4079e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 4080e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 4081e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 4082d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 4083e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 4084e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 4085e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 4086e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 4087e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 4088e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 4089e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 4090e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 4091e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 4092e6631814SSagi Grimberg 4093e6631814SSagi Grimberg return cpu_to_be64(result); 4094e6631814SSagi Grimberg } 4095e6631814SSagi Grimberg 40968a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 4097064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 40988a187ee5SSagi Grimberg { 409931616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 41008a187ee5SSagi Grimberg 41018a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4102b005d316SSagi Grimberg 41038a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 4104064e5262SIdan Burstein if (umr_inline) 4105064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 410631616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 41078a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 41088a187ee5SSagi Grimberg } 41098a187ee5SSagi Grimberg 4110dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4111e126ba97SEli Cohen { 4112e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4113e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 41142d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4115e126ba97SEli Cohen } 4116e126ba97SEli Cohen 411731616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4118e126ba97SEli Cohen { 4119968e78ddSHaggai Eran u64 result; 4120e126ba97SEli Cohen 412131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4122e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4123968e78ddSHaggai Eran 4124968e78ddSHaggai Eran return cpu_to_be64(result); 4125968e78ddSHaggai Eran } 4126968e78ddSHaggai Eran 412731616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4128968e78ddSHaggai Eran { 4129968e78ddSHaggai Eran u64 result; 4130968e78ddSHaggai Eran 4131968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4132968e78ddSHaggai Eran 4133968e78ddSHaggai Eran return cpu_to_be64(result); 4134968e78ddSHaggai Eran } 4135968e78ddSHaggai Eran 413656e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 413756e11d62SNoa Osherovich { 413856e11d62SNoa Osherovich u64 result; 413956e11d62SNoa Osherovich 414056e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 414156e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 414231616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 414356e11d62SNoa Osherovich 414456e11d62SNoa Osherovich return cpu_to_be64(result); 414556e11d62SNoa Osherovich } 414656e11d62SNoa Osherovich 414731616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 414856e11d62SNoa Osherovich { 414956e11d62SNoa Osherovich u64 result; 415056e11d62SNoa Osherovich 415131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 415231616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 415356e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 415431616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 415531616255SArtemy Kovalyov 415631616255SArtemy Kovalyov if (atomic) 415731616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 415856e11d62SNoa Osherovich 415956e11d62SNoa Osherovich return cpu_to_be64(result); 416056e11d62SNoa Osherovich } 416156e11d62SNoa Osherovich 416256e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 416356e11d62SNoa Osherovich { 416456e11d62SNoa Osherovich u64 result; 416556e11d62SNoa Osherovich 416631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 416756e11d62SNoa Osherovich 416856e11d62SNoa Osherovich return cpu_to_be64(result); 416956e11d62SNoa Osherovich } 417056e11d62SNoa Osherovich 4171c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4172c8d75a98SMajd Dibbiny { 4173c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4174c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4175c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4176c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4177c8d75a98SMajd Dibbiny return -EPERM; 4178c8d75a98SMajd Dibbiny return 0; 4179c8d75a98SMajd Dibbiny } 4180c8d75a98SMajd Dibbiny 4181c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4182c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4183f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4184968e78ddSHaggai Eran { 4185f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4186968e78ddSHaggai Eran 4187968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4188968e78ddSHaggai Eran 4189968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 4190968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 4191968e78ddSHaggai Eran else 4192968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 4193968e78ddSHaggai Eran 419431616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 419531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 419631616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 419731616255SArtemy Kovalyov 419831616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 419931616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4200968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4201968e78ddSHaggai Eran } 420256e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 420356e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 420431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 420531616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 420656e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4207e126ba97SEli Cohen } 420831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 420931616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 421031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 421131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4212e126ba97SEli Cohen 4213e126ba97SEli Cohen if (!wr->num_sge) 4214968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4215c8d75a98SMajd Dibbiny 4216c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4217e126ba97SEli Cohen } 4218e126ba97SEli Cohen 4219e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4220e126ba97SEli Cohen { 4221e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4222e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4223e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4224e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 42252ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4226e126ba97SEli Cohen } 4227e126ba97SEli Cohen 42288a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 42298a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 42308a187ee5SSagi Grimberg u32 key, int access) 42318a187ee5SSagi Grimberg { 42328a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 42338a187ee5SSagi Grimberg 42348a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4235b005d316SSagi Grimberg 4236ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4237b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4238ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4239b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4240b005d316SSagi Grimberg ndescs *= 2; 4241b005d316SSagi Grimberg 4242b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 42438a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 42448a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 42458a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 42468a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 42478a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 42488a187ee5SSagi Grimberg } 42498a187ee5SSagi Grimberg 4250dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4251e126ba97SEli Cohen { 4252e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4253968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4254e126ba97SEli Cohen } 4255e126ba97SEli Cohen 4256f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4257f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4258e126ba97SEli Cohen { 4259f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4260968e78ddSHaggai Eran 4261e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 426231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4263968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4264e126ba97SEli Cohen 4265968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 426656e11d62SNoa Osherovich if (umrwr->pd) 4267968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 426831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 426931616255SArtemy Kovalyov !umrwr->length) 427031616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 427131616255SArtemy Kovalyov 427231616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4273968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4274968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4275746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4276968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4277e126ba97SEli Cohen } 4278e126ba97SEli Cohen 42798a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 42808a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 42818a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 42828a187ee5SSagi Grimberg { 42838a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 42848a187ee5SSagi Grimberg 42858a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 42868a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 42878a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 42888a187ee5SSagi Grimberg } 42898a187ee5SSagi Grimberg 4290f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4291e126ba97SEli Cohen { 4292e126ba97SEli Cohen switch (wr->opcode) { 4293e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4294e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4295e126ba97SEli Cohen return wr->ex.imm_data; 4296e126ba97SEli Cohen 4297e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4298e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4299e126ba97SEli Cohen 4300e126ba97SEli Cohen default: 4301e126ba97SEli Cohen return 0; 4302e126ba97SEli Cohen } 4303e126ba97SEli Cohen } 4304e126ba97SEli Cohen 4305e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4306e126ba97SEli Cohen { 4307e126ba97SEli Cohen u8 *p = wqe; 4308e126ba97SEli Cohen u8 res = 0; 4309e126ba97SEli Cohen int i; 4310e126ba97SEli Cohen 4311e126ba97SEli Cohen for (i = 0; i < size; i++) 4312e126ba97SEli Cohen res ^= p[i]; 4313e126ba97SEli Cohen 4314e126ba97SEli Cohen return ~res; 4315e126ba97SEli Cohen } 4316e126ba97SEli Cohen 4317e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4318e126ba97SEli Cohen { 4319e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4320e126ba97SEli Cohen } 4321e126ba97SEli Cohen 4322f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 432334f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4324e126ba97SEli Cohen { 4325e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 432634f4c955SGuy Levi size_t offset; 4327e126ba97SEli Cohen int inl = 0; 4328e126ba97SEli Cohen int i; 4329e126ba97SEli Cohen 433034f4c955SGuy Levi seg = *wqe; 433134f4c955SGuy Levi *wqe += sizeof(*seg); 433234f4c955SGuy Levi offset = sizeof(*seg); 433334f4c955SGuy Levi 4334e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 433534f4c955SGuy Levi size_t len = wr->sg_list[i].length; 433634f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 433734f4c955SGuy Levi 4338e126ba97SEli Cohen inl += len; 4339e126ba97SEli Cohen 4340e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4341e126ba97SEli Cohen return -ENOMEM; 4342e126ba97SEli Cohen 434334f4c955SGuy Levi while (likely(len)) { 434434f4c955SGuy Levi size_t leftlen; 434534f4c955SGuy Levi size_t copysz; 434634f4c955SGuy Levi 434734f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 434834f4c955SGuy Levi *wqe_sz + (offset >> 4), 434934f4c955SGuy Levi cur_edge); 435034f4c955SGuy Levi 435134f4c955SGuy Levi leftlen = *cur_edge - *wqe; 435234f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 435334f4c955SGuy Levi 435434f4c955SGuy Levi memcpy(*wqe, addr, copysz); 435534f4c955SGuy Levi len -= copysz; 435634f4c955SGuy Levi addr += copysz; 435734f4c955SGuy Levi *wqe += copysz; 435834f4c955SGuy Levi offset += copysz; 4359e126ba97SEli Cohen } 4360e126ba97SEli Cohen } 4361e126ba97SEli Cohen 4362e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4363e126ba97SEli Cohen 436434f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4365e126ba97SEli Cohen 4366e126ba97SEli Cohen return 0; 4367e126ba97SEli Cohen } 4368e126ba97SEli Cohen 4369e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4370e6631814SSagi Grimberg { 4371e6631814SSagi Grimberg switch (type) { 4372e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4373e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4374e6631814SSagi Grimberg default: 4375e6631814SSagi Grimberg return 0; 4376e6631814SSagi Grimberg } 4377e6631814SSagi Grimberg } 4378e6631814SSagi Grimberg 4379e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4380e6631814SSagi Grimberg { 4381e6631814SSagi Grimberg switch (block_size) { 4382e6631814SSagi Grimberg case 512: return 0x1; 4383e6631814SSagi Grimberg case 520: return 0x2; 4384e6631814SSagi Grimberg case 4096: return 0x3; 4385e6631814SSagi Grimberg case 4160: return 0x4; 4386e6631814SSagi Grimberg case 1073741824: return 0x5; 4387e6631814SSagi Grimberg default: return 0; 4388e6631814SSagi Grimberg } 4389e6631814SSagi Grimberg } 4390e6631814SSagi Grimberg 439178eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4392142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4393e6631814SSagi Grimberg { 4394142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4395142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4396142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4397142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4398142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4399142537f4SSagi Grimberg /* repeating block */ 4400142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4401142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4402142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4403e6631814SSagi Grimberg 440478eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 440578eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4406e6631814SSagi Grimberg 440778eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 440878eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 440978eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 441078eda2bbSSagi Grimberg else 441178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4412e6631814SSagi Grimberg } 4413e6631814SSagi Grimberg 441478eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 441578eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4416e6631814SSagi Grimberg } 4417e6631814SSagi Grimberg 4418e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4419e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4420e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4421e6631814SSagi Grimberg { 4422e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4423e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4424e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4425e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4426e6631814SSagi Grimberg 4427c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4428e6631814SSagi Grimberg 4429142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4430142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4431e6631814SSagi Grimberg /* Input domain check byte mask */ 4432e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 443378eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 443478eda2bbSSagi Grimberg 443578eda2bbSSagi Grimberg /* Memory domain */ 443678eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 443778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 443878eda2bbSSagi Grimberg break; 443978eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 444078eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 444178eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 444278eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 444378eda2bbSSagi Grimberg break; 444478eda2bbSSagi Grimberg default: 444578eda2bbSSagi Grimberg return -EINVAL; 444678eda2bbSSagi Grimberg } 444778eda2bbSSagi Grimberg 444878eda2bbSSagi Grimberg /* Wire domain */ 444978eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 445078eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 445178eda2bbSSagi Grimberg break; 445278eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4453e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 445478eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4455e6631814SSagi Grimberg /* Same block structure */ 4456142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4457e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4458fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4459c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4460fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4461c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4462fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4463e6631814SSagi Grimberg } else 4464e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4465e6631814SSagi Grimberg 4466142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 446778eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4468e6631814SSagi Grimberg break; 4469e6631814SSagi Grimberg default: 4470e6631814SSagi Grimberg return -EINVAL; 4471e6631814SSagi Grimberg } 4472e6631814SSagi Grimberg 4473e6631814SSagi Grimberg return 0; 4474e6631814SSagi Grimberg } 4475e6631814SSagi Grimberg 4476f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 447734f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, 447834f4c955SGuy Levi int *size, void **cur_edge) 4479e6631814SSagi Grimberg { 4480e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4481e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4482e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4483e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4484e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4485e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4486e6631814SSagi Grimberg int ret; 4487e6631814SSagi Grimberg int wqe_size; 4488e6631814SSagi Grimberg 4489e622f2f4SChristoph Hellwig if (!wr->prot || 4490e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4491e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4492e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4493e6631814SSagi Grimberg /** 4494e6631814SSagi Grimberg * Source domain doesn't contain signature information 44955c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4496e6631814SSagi Grimberg * So need construct: 4497e6631814SSagi Grimberg * ------------------ 4498e6631814SSagi Grimberg * | data_klm | 4499e6631814SSagi Grimberg * ------------------ 4500e6631814SSagi Grimberg * | BSF | 4501e6631814SSagi Grimberg * ------------------ 4502e6631814SSagi Grimberg **/ 4503e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4504e6631814SSagi Grimberg 4505e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4506e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4507e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4508e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4509e6631814SSagi Grimberg } else { 4510e6631814SSagi Grimberg /** 4511e6631814SSagi Grimberg * Source domain contains signature information 4512e6631814SSagi Grimberg * So need construct a strided block format: 4513e6631814SSagi Grimberg * --------------------------- 4514e6631814SSagi Grimberg * | stride_block_ctrl | 4515e6631814SSagi Grimberg * --------------------------- 4516e6631814SSagi Grimberg * | data_klm | 4517e6631814SSagi Grimberg * --------------------------- 4518e6631814SSagi Grimberg * | prot_klm | 4519e6631814SSagi Grimberg * --------------------------- 4520e6631814SSagi Grimberg * | BSF | 4521e6631814SSagi Grimberg * --------------------------- 4522e6631814SSagi Grimberg **/ 4523e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4524e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4525e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4526e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4527e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4528e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4529e6631814SSagi Grimberg int prot_size; 4530e6631814SSagi Grimberg 4531e6631814SSagi Grimberg sblock_ctrl = *seg; 4532e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4533e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4534e6631814SSagi Grimberg 4535e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4536e6631814SSagi Grimberg if (!prot_size) { 4537e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4538e6631814SSagi Grimberg return -EINVAL; 4539e6631814SSagi Grimberg } 4540e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4541e6631814SSagi Grimberg prot_size); 4542e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4543e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4544e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4545e6631814SSagi Grimberg 4546e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4547e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4548e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 45495c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 45505c273b16SSagi Grimberg 4551e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4552e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4553e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4554e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 45555c273b16SSagi Grimberg 4556e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4557e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4558e6631814SSagi Grimberg } 4559e6631814SSagi Grimberg 4560e6631814SSagi Grimberg *seg += wqe_size; 4561e6631814SSagi Grimberg *size += wqe_size / 16; 456234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4563e6631814SSagi Grimberg 4564e6631814SSagi Grimberg bsf = *seg; 4565e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4566e6631814SSagi Grimberg if (ret) 4567e6631814SSagi Grimberg return -EINVAL; 4568e6631814SSagi Grimberg 4569e6631814SSagi Grimberg *seg += sizeof(*bsf); 4570e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 457134f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4572e6631814SSagi Grimberg 4573e6631814SSagi Grimberg return 0; 4574e6631814SSagi Grimberg } 4575e6631814SSagi Grimberg 4576e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4577f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4578e6631814SSagi Grimberg u32 length, u32 pdn) 4579e6631814SSagi Grimberg { 4580e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4581e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4582d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4583e6631814SSagi Grimberg 4584e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4585e6631814SSagi Grimberg 4586e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4587ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4588e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4589d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4590e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4591e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 459231616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4593e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4594e6631814SSagi Grimberg } 4595e6631814SSagi Grimberg 4596e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 459731616255SArtemy Kovalyov u32 size) 4598e6631814SSagi Grimberg { 4599e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4600e6631814SSagi Grimberg 4601e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 460231616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4603e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4604e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4605e6631814SSagi Grimberg } 4606e6631814SSagi Grimberg 4607e6631814SSagi Grimberg 4608f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 460934f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, int *size, 461034f4c955SGuy Levi void **cur_edge) 4611e6631814SSagi Grimberg { 4612f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4613e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4614e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 461531616255SArtemy Kovalyov u32 xlt_size; 4616e6631814SSagi Grimberg int region_len, ret; 4617e6631814SSagi Grimberg 4618e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4619e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4620d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4621d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4622e6631814SSagi Grimberg return -EINVAL; 4623e6631814SSagi Grimberg 4624e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4625e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4626e622f2f4SChristoph Hellwig if (wr->prot && 4627e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4628e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4629e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4630e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4631e6631814SSagi Grimberg 4632e6631814SSagi Grimberg /** 4633e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4634e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4635e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4636e6631814SSagi Grimberg **/ 463731616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4638e6631814SSagi Grimberg 463931616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4640e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4641e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 464234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4643e6631814SSagi Grimberg 464431616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4645e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4646e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 464734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4648e6631814SSagi Grimberg 464934f4c955SGuy Levi ret = set_sig_data_segment(wr, qp, seg, size, cur_edge); 4650e6631814SSagi Grimberg if (ret) 4651e6631814SSagi Grimberg return ret; 4652e6631814SSagi Grimberg 4653d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4654e6631814SSagi Grimberg return 0; 4655e6631814SSagi Grimberg } 4656e6631814SSagi Grimberg 4657e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4658e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4659e6631814SSagi Grimberg { 4660e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4661e6631814SSagi Grimberg 4662e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4663e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4664e6631814SSagi Grimberg switch (domain->sig_type) { 466578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 466678eda2bbSSagi Grimberg break; 4667e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4668e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4669e6631814SSagi Grimberg domain->sig.dif.app_tag); 4670e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4671e6631814SSagi Grimberg break; 4672e6631814SSagi Grimberg default: 467312bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 467412bbf1eaSLeon Romanovsky domain->sig_type); 467512bbf1eaSLeon Romanovsky return -EINVAL; 4676e6631814SSagi Grimberg } 4677e6631814SSagi Grimberg 467878eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 467978eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 468078eda2bbSSagi Grimberg 4681e6631814SSagi Grimberg return 0; 4682e6631814SSagi Grimberg } 4683e6631814SSagi Grimberg 46848a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4685f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 468634f4c955SGuy Levi void **seg, int *size, void **cur_edge) 46878a187ee5SSagi Grimberg { 46888a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 46898a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 469034f4c955SGuy Levi size_t mr_list_size = mr->ndescs * mr->desc_size; 4691064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 46928a187ee5SSagi Grimberg 46938a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 46948a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 46958a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 46968a187ee5SSagi Grimberg return -EINVAL; 46978a187ee5SSagi Grimberg } 46988a187ee5SSagi Grimberg 4699064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 47008a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 47018a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 470234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47038a187ee5SSagi Grimberg 47048a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 47058a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 47068a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 470734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47088a187ee5SSagi Grimberg 4709064e5262SIdan Burstein if (umr_inline) { 471034f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 471134f4c955SGuy Levi mr_list_size); 471234f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 4713064e5262SIdan Burstein } else { 47148a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 47158a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 47168a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4717064e5262SIdan Burstein } 47188a187ee5SSagi Grimberg return 0; 47198a187ee5SSagi Grimberg } 47208a187ee5SSagi Grimberg 472134f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 472234f4c955SGuy Levi void **cur_edge) 4723e126ba97SEli Cohen { 4724dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4725e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4726e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 472734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4728dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4729e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4730e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 473134f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4732e126ba97SEli Cohen } 4733e126ba97SEli Cohen 473434f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 4735e126ba97SEli Cohen { 4736e126ba97SEli Cohen __be32 *p = NULL; 4737e126ba97SEli Cohen int i, j; 4738e126ba97SEli Cohen 473934f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 4740e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4741e126ba97SEli Cohen if ((i & 0xf) == 0) { 47421e5887b7SArtemy Kovalyov p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx); 474334f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 4744e126ba97SEli Cohen j = 0; 47451e5887b7SArtemy Kovalyov idx = (idx + 1) & (qp->sq.wqe_cnt - 1); 4746e126ba97SEli Cohen } 4747e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4748e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4749e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4750e126ba97SEli Cohen } 4751e126ba97SEli Cohen } 4752e126ba97SEli Cohen 47537bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 47546e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 475534f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 475634f4c955SGuy Levi int *size, void **cur_edge, int nreq, 475734f4c955SGuy Levi bool send_signaled, bool solicited) 47586e5eadacSSagi Grimberg { 4759b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4760b2a232d2SLeon Romanovsky return -ENOMEM; 47616e5eadacSSagi Grimberg 47626e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 476334f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 47646e5eadacSSagi Grimberg *ctrl = *seg; 47656e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 47666e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 47676e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 47687bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 47697bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 47706e5eadacSSagi Grimberg 47716e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 47726e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 477334f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 47746e5eadacSSagi Grimberg 4775b2a232d2SLeon Romanovsky return 0; 47766e5eadacSSagi Grimberg } 47776e5eadacSSagi Grimberg 47787bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 47797bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 47807bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 478134f4c955SGuy Levi int *size, void **cur_edge, int nreq) 47827bb1fafcSBart Van Assche { 478334f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 47847bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 47857bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 47867bb1fafcSBart Van Assche } 47877bb1fafcSBart Van Assche 47886e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 47896e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 479034f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 479134f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 479234f4c955SGuy Levi u32 mlx5_opcode) 47936e5eadacSSagi Grimberg { 47946e5eadacSSagi Grimberg u8 opmod = 0; 47956e5eadacSSagi Grimberg 47966e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 47976e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 479819098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 47996e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 48006e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 48016e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 48026e5eadacSSagi Grimberg 48036e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 48046e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 48056e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 48066e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 48076e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 480834f4c955SGuy Levi 480934f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 481034f4c955SGuy Levi * construction, into SQ's cache. 481134f4c955SGuy Levi */ 481234f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 481334f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 481434f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 481534f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 481634f4c955SGuy Levi cur_edge; 48176e5eadacSSagi Grimberg } 48186e5eadacSSagi Grimberg 4819d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4820d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4821e126ba97SEli Cohen { 4822e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4823e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 482489ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4825d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4826e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4827e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4828d16e91daSHaggai Eran struct mlx5_bf *bf; 482934f4c955SGuy Levi void *cur_edge; 4830e126ba97SEli Cohen int uninitialized_var(size); 4831e126ba97SEli Cohen unsigned long flags; 4832e126ba97SEli Cohen unsigned idx; 4833e126ba97SEli Cohen int err = 0; 4834e126ba97SEli Cohen int num_sge; 4835e126ba97SEli Cohen void *seg; 4836e126ba97SEli Cohen int nreq; 4837e126ba97SEli Cohen int i; 4838e126ba97SEli Cohen u8 next_fence = 0; 4839e126ba97SEli Cohen u8 fence; 4840e126ba97SEli Cohen 48416c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 48426c75520fSParav Pandit !drain)) { 48436c75520fSParav Pandit *bad_wr = wr; 48446c75520fSParav Pandit return -EIO; 48456c75520fSParav Pandit } 48466c75520fSParav Pandit 4847d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4848d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4849d16e91daSHaggai Eran 4850d16e91daSHaggai Eran qp = to_mqp(ibqp); 48515fe9dec0SEli Cohen bf = &qp->bf; 4852d16e91daSHaggai Eran 4853e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4854e126ba97SEli Cohen 4855e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4856a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4857e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4858e126ba97SEli Cohen err = -EINVAL; 4859e126ba97SEli Cohen *bad_wr = wr; 4860e126ba97SEli Cohen goto out; 4861e126ba97SEli Cohen } 4862e126ba97SEli Cohen 4863e126ba97SEli Cohen num_sge = wr->num_sge; 4864e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4865e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 486624be409bSChuck Lever err = -EINVAL; 4867e126ba97SEli Cohen *bad_wr = wr; 4868e126ba97SEli Cohen goto out; 4869e126ba97SEli Cohen } 4870e126ba97SEli Cohen 487134f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 487234f4c955SGuy Levi nreq); 48736e5eadacSSagi Grimberg if (err) { 48746e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 48756e5eadacSSagi Grimberg err = -ENOMEM; 48766e5eadacSSagi Grimberg *bad_wr = wr; 48776e5eadacSSagi Grimberg goto out; 48786e5eadacSSagi Grimberg } 4879e126ba97SEli Cohen 4880074fca3aSMajd Dibbiny if (wr->opcode == IB_WR_REG_MR) { 48816e8484c5SMax Gurtovoy fence = dev->umr_fence; 48826e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4883074fca3aSMajd Dibbiny } else { 4884074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 48856e8484c5SMax Gurtovoy if (qp->next_fence) 48866e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 48876e8484c5SMax Gurtovoy else 48886e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 48896e8484c5SMax Gurtovoy } else { 48906e8484c5SMax Gurtovoy fence = qp->next_fence; 48916e8484c5SMax Gurtovoy } 4892074fca3aSMajd Dibbiny } 48936e8484c5SMax Gurtovoy 4894e126ba97SEli Cohen switch (ibqp->qp_type) { 4895e126ba97SEli Cohen case IB_QPT_XRC_INI: 4896e126ba97SEli Cohen xrc = seg; 4897e126ba97SEli Cohen seg += sizeof(*xrc); 4898e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4899e126ba97SEli Cohen /* fall through */ 4900e126ba97SEli Cohen case IB_QPT_RC: 4901e126ba97SEli Cohen switch (wr->opcode) { 4902e126ba97SEli Cohen case IB_WR_RDMA_READ: 4903e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4904e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4905e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4906e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4907e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4908e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4909e126ba97SEli Cohen break; 4910e126ba97SEli Cohen 4911e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4912e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4913e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 491481bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 491581bea28fSEli Cohen err = -ENOSYS; 491681bea28fSEli Cohen *bad_wr = wr; 491781bea28fSEli Cohen goto out; 4918e126ba97SEli Cohen 4919e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4920e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4921e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 492234f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 4923e126ba97SEli Cohen num_sge = 0; 4924e126ba97SEli Cohen break; 4925e126ba97SEli Cohen 49268a187ee5SSagi Grimberg case IB_WR_REG_MR: 49278a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 49288a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 492934f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 493034f4c955SGuy Levi &cur_edge); 49318a187ee5SSagi Grimberg if (err) { 49328a187ee5SSagi Grimberg *bad_wr = wr; 49338a187ee5SSagi Grimberg goto out; 49348a187ee5SSagi Grimberg } 49358a187ee5SSagi Grimberg num_sge = 0; 49368a187ee5SSagi Grimberg break; 49378a187ee5SSagi Grimberg 4938e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4939e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4940e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4941e6631814SSagi Grimberg 4942e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 494334f4c955SGuy Levi err = set_sig_umr_wr(wr, qp, &seg, &size, 494434f4c955SGuy Levi &cur_edge); 4945e6631814SSagi Grimberg if (err) { 4946e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4947e6631814SSagi Grimberg *bad_wr = wr; 4948e6631814SSagi Grimberg goto out; 4949e6631814SSagi Grimberg } 4950e6631814SSagi Grimberg 495134f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 495234f4c955SGuy Levi wr->wr_id, nreq, fence, 495334f4c955SGuy Levi MLX5_OPCODE_UMR); 4954e6631814SSagi Grimberg /* 4955e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4956e6631814SSagi Grimberg * on error 4957e6631814SSagi Grimberg */ 49587bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 495934f4c955SGuy Levi &size, &cur_edge, nreq, false, 496034f4c955SGuy Levi true); 4961e6631814SSagi Grimberg if (err) { 4962e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4963e6631814SSagi Grimberg err = -ENOMEM; 4964e6631814SSagi Grimberg *bad_wr = wr; 4965e6631814SSagi Grimberg goto out; 4966e6631814SSagi Grimberg } 4967e6631814SSagi Grimberg 4968e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4969e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4970e6631814SSagi Grimberg &size); 4971e6631814SSagi Grimberg if (err) { 4972e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4973e6631814SSagi Grimberg *bad_wr = wr; 4974e6631814SSagi Grimberg goto out; 4975e6631814SSagi Grimberg } 4976e6631814SSagi Grimberg 497734f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 497834f4c955SGuy Levi wr->wr_id, nreq, fence, 497934f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 49807bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 498134f4c955SGuy Levi &size, &cur_edge, nreq, false, 498234f4c955SGuy Levi true); 4983e6631814SSagi Grimberg if (err) { 4984e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4985e6631814SSagi Grimberg err = -ENOMEM; 4986e6631814SSagi Grimberg *bad_wr = wr; 4987e6631814SSagi Grimberg goto out; 4988e6631814SSagi Grimberg } 4989e6631814SSagi Grimberg 4990e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4991e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4992e6631814SSagi Grimberg &size); 4993e6631814SSagi Grimberg if (err) { 4994e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4995e6631814SSagi Grimberg *bad_wr = wr; 4996e6631814SSagi Grimberg goto out; 4997e6631814SSagi Grimberg } 4998e6631814SSagi Grimberg 499934f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 500034f4c955SGuy Levi wr->wr_id, nreq, fence, 500134f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 50026e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 5003e6631814SSagi Grimberg num_sge = 0; 5004e6631814SSagi Grimberg goto skip_psv; 5005e6631814SSagi Grimberg 5006e126ba97SEli Cohen default: 5007e126ba97SEli Cohen break; 5008e126ba97SEli Cohen } 5009e126ba97SEli Cohen break; 5010e126ba97SEli Cohen 5011e126ba97SEli Cohen case IB_QPT_UC: 5012e126ba97SEli Cohen switch (wr->opcode) { 5013e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5014e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5015e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5016e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5017e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5018e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5019e126ba97SEli Cohen break; 5020e126ba97SEli Cohen 5021e126ba97SEli Cohen default: 5022e126ba97SEli Cohen break; 5023e126ba97SEli Cohen } 5024e126ba97SEli Cohen break; 5025e126ba97SEli Cohen 5026e126ba97SEli Cohen case IB_QPT_SMI: 50271e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 50281e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 50291e0e50b6SMaor Gottlieb err = -EPERM; 50301e0e50b6SMaor Gottlieb *bad_wr = wr; 50311e0e50b6SMaor Gottlieb goto out; 50321e0e50b6SMaor Gottlieb } 5033f6b1ee34SBart Van Assche /* fall through */ 5034d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 5035e126ba97SEli Cohen set_datagram_seg(seg, wr); 5036e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 5037e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 503834f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 503934f4c955SGuy Levi 5040e126ba97SEli Cohen break; 5041f0313965SErez Shitrit case IB_QPT_UD: 5042f0313965SErez Shitrit set_datagram_seg(seg, wr); 5043f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 5044f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 504534f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5046f0313965SErez Shitrit 5047f0313965SErez Shitrit /* handle qp that supports ud offload */ 5048f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 5049f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 5050f0313965SErez Shitrit 5051f0313965SErez Shitrit pad = seg; 5052f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 5053f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 5054f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 505534f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 505634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 505734f4c955SGuy Levi &cur_edge); 5058f0313965SErez Shitrit } 5059f0313965SErez Shitrit break; 5060e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 5061e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 5062e126ba97SEli Cohen err = -EINVAL; 5063e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 5064e126ba97SEli Cohen goto out; 5065e126ba97SEli Cohen } 5066e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 5067e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 5068c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 5069c8d75a98SMajd Dibbiny if (unlikely(err)) 5070c8d75a98SMajd Dibbiny goto out; 5071e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5072e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 507334f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5074e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 5075e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 5076e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 507734f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5078e126ba97SEli Cohen break; 5079e126ba97SEli Cohen 5080e126ba97SEli Cohen default: 5081e126ba97SEli Cohen break; 5082e126ba97SEli Cohen } 5083e126ba97SEli Cohen 5084e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 508534f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 5086e126ba97SEli Cohen if (unlikely(err)) { 5087e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5088e126ba97SEli Cohen *bad_wr = wr; 5089e126ba97SEli Cohen goto out; 5090e126ba97SEli Cohen } 5091e126ba97SEli Cohen } else { 5092e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 509334f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 509434f4c955SGuy Levi &cur_edge); 5095e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 509634f4c955SGuy Levi set_data_ptr_seg 509734f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 509834f4c955SGuy Levi wr->sg_list + i); 5099e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 510034f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 5101e126ba97SEli Cohen } 5102e126ba97SEli Cohen } 5103e126ba97SEli Cohen } 5104e126ba97SEli Cohen 51056e8484c5SMax Gurtovoy qp->next_fence = next_fence; 510634f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 510734f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 5108e6631814SSagi Grimberg skip_psv: 5109e126ba97SEli Cohen if (0) 5110e126ba97SEli Cohen dump_wqe(qp, idx, size); 5111e126ba97SEli Cohen } 5112e126ba97SEli Cohen 5113e126ba97SEli Cohen out: 5114e126ba97SEli Cohen if (likely(nreq)) { 5115e126ba97SEli Cohen qp->sq.head += nreq; 5116e126ba97SEli Cohen 5117e126ba97SEli Cohen /* Make sure that descriptors are written before 5118e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5119e126ba97SEli Cohen */ 5120e126ba97SEli Cohen wmb(); 5121e126ba97SEli Cohen 5122e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5123e126ba97SEli Cohen 5124ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5125ada388f7SEli Cohen * we hit doorbell */ 5126ada388f7SEli Cohen wmb(); 5127ada388f7SEli Cohen 51285fe9dec0SEli Cohen /* currently we support only regular doorbells */ 5129bbf29f61SMaxim Mikityanskiy mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset); 5130e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5131e126ba97SEli Cohen * and reach the HCA out of order. 5132e126ba97SEli Cohen */ 5133e126ba97SEli Cohen mmiowb(); 5134e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5135e126ba97SEli Cohen } 5136e126ba97SEli Cohen 5137e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5138e126ba97SEli Cohen 5139e126ba97SEli Cohen return err; 5140e126ba97SEli Cohen } 5141e126ba97SEli Cohen 5142d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5143d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5144d0e84c0aSYishai Hadas { 5145d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5146d0e84c0aSYishai Hadas } 5147d0e84c0aSYishai Hadas 5148e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5149e126ba97SEli Cohen { 5150e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5151e126ba97SEli Cohen } 5152e126ba97SEli Cohen 5153d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5154d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5155e126ba97SEli Cohen { 5156e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5157e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5158e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 515989ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 516089ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5161e126ba97SEli Cohen unsigned long flags; 5162e126ba97SEli Cohen int err = 0; 5163e126ba97SEli Cohen int nreq; 5164e126ba97SEli Cohen int ind; 5165e126ba97SEli Cohen int i; 5166e126ba97SEli Cohen 51676c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 51686c75520fSParav Pandit !drain)) { 51696c75520fSParav Pandit *bad_wr = wr; 51706c75520fSParav Pandit return -EIO; 51716c75520fSParav Pandit } 51726c75520fSParav Pandit 5173d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5174d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5175d16e91daSHaggai Eran 5176e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5177e126ba97SEli Cohen 5178e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5179e126ba97SEli Cohen 5180e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5181e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5182e126ba97SEli Cohen err = -ENOMEM; 5183e126ba97SEli Cohen *bad_wr = wr; 5184e126ba97SEli Cohen goto out; 5185e126ba97SEli Cohen } 5186e126ba97SEli Cohen 5187e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5188e126ba97SEli Cohen err = -EINVAL; 5189e126ba97SEli Cohen *bad_wr = wr; 5190e126ba97SEli Cohen goto out; 5191e126ba97SEli Cohen } 5192e126ba97SEli Cohen 519334f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5194e126ba97SEli Cohen if (qp->wq_sig) 5195e126ba97SEli Cohen scat++; 5196e126ba97SEli Cohen 5197e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5198e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5199e126ba97SEli Cohen 5200e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5201e126ba97SEli Cohen scat[i].byte_count = 0; 5202e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5203e126ba97SEli Cohen scat[i].addr = 0; 5204e126ba97SEli Cohen } 5205e126ba97SEli Cohen 5206e126ba97SEli Cohen if (qp->wq_sig) { 5207e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5208e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5209e126ba97SEli Cohen } 5210e126ba97SEli Cohen 5211e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5212e126ba97SEli Cohen 5213e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5214e126ba97SEli Cohen } 5215e126ba97SEli Cohen 5216e126ba97SEli Cohen out: 5217e126ba97SEli Cohen if (likely(nreq)) { 5218e126ba97SEli Cohen qp->rq.head += nreq; 5219e126ba97SEli Cohen 5220e126ba97SEli Cohen /* Make sure that descriptors are written before 5221e126ba97SEli Cohen * doorbell record. 5222e126ba97SEli Cohen */ 5223e126ba97SEli Cohen wmb(); 5224e126ba97SEli Cohen 5225e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5226e126ba97SEli Cohen } 5227e126ba97SEli Cohen 5228e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5229e126ba97SEli Cohen 5230e126ba97SEli Cohen return err; 5231e126ba97SEli Cohen } 5232e126ba97SEli Cohen 5233d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5234d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5235d0e84c0aSYishai Hadas { 5236d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5237d0e84c0aSYishai Hadas } 5238d0e84c0aSYishai Hadas 5239e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5240e126ba97SEli Cohen { 5241e126ba97SEli Cohen switch (mlx5_state) { 5242e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5243e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5244e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5245e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5246e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5247e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5248e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5249e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5250e126ba97SEli Cohen default: return -1; 5251e126ba97SEli Cohen } 5252e126ba97SEli Cohen } 5253e126ba97SEli Cohen 5254e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5255e126ba97SEli Cohen { 5256e126ba97SEli Cohen switch (mlx5_mig_state) { 5257e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5258e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5259e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5260e126ba97SEli Cohen default: return -1; 5261e126ba97SEli Cohen } 5262e126ba97SEli Cohen } 5263e126ba97SEli Cohen 5264e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5265e126ba97SEli Cohen { 5266e126ba97SEli Cohen int ib_flags = 0; 5267e126ba97SEli Cohen 5268e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5269e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5270e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5271e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5272e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5273e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5274e126ba97SEli Cohen 5275e126ba97SEli Cohen return ib_flags; 5276e126ba97SEli Cohen } 5277e126ba97SEli Cohen 527838349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5279d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5280e126ba97SEli Cohen struct mlx5_qp_path *path) 5281e126ba97SEli Cohen { 5282e126ba97SEli Cohen 5283d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5284e126ba97SEli Cohen 5285e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5286e126ba97SEli Cohen return; 5287e126ba97SEli Cohen 5288ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5289ae59c3f0SLeon Romanovsky 5290d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5291d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5292e126ba97SEli Cohen 5293d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5294d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5295d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5296d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5297d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5298d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5299d8966fcdSDasaratharaman Chandramouli 5300d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5301d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5302d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5303d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5304d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5305d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5306e126ba97SEli Cohen } 5307e126ba97SEli Cohen } 5308e126ba97SEli Cohen 53096d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 53106d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 53116d2f89dfSmajd@mellanox.com u8 *sq_state) 5312e126ba97SEli Cohen { 53136d2f89dfSmajd@mellanox.com int err; 53146d2f89dfSmajd@mellanox.com 531528160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 53166d2f89dfSmajd@mellanox.com if (err) 53176d2f89dfSmajd@mellanox.com goto out; 53186d2f89dfSmajd@mellanox.com sq->state = *sq_state; 53196d2f89dfSmajd@mellanox.com 53206d2f89dfSmajd@mellanox.com out: 53216d2f89dfSmajd@mellanox.com return err; 53226d2f89dfSmajd@mellanox.com } 53236d2f89dfSmajd@mellanox.com 53246d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 53256d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 53266d2f89dfSmajd@mellanox.com u8 *rq_state) 53276d2f89dfSmajd@mellanox.com { 53286d2f89dfSmajd@mellanox.com void *out; 53296d2f89dfSmajd@mellanox.com void *rqc; 53306d2f89dfSmajd@mellanox.com int inlen; 53316d2f89dfSmajd@mellanox.com int err; 53326d2f89dfSmajd@mellanox.com 53336d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 53341b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 53356d2f89dfSmajd@mellanox.com if (!out) 53366d2f89dfSmajd@mellanox.com return -ENOMEM; 53376d2f89dfSmajd@mellanox.com 53386d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 53396d2f89dfSmajd@mellanox.com if (err) 53406d2f89dfSmajd@mellanox.com goto out; 53416d2f89dfSmajd@mellanox.com 53426d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 53436d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 53446d2f89dfSmajd@mellanox.com rq->state = *rq_state; 53456d2f89dfSmajd@mellanox.com 53466d2f89dfSmajd@mellanox.com out: 53476d2f89dfSmajd@mellanox.com kvfree(out); 53486d2f89dfSmajd@mellanox.com return err; 53496d2f89dfSmajd@mellanox.com } 53506d2f89dfSmajd@mellanox.com 53516d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 53526d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 53536d2f89dfSmajd@mellanox.com { 53546d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 53556d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 53566d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 53576d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 53586d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 53596d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 53606d2f89dfSmajd@mellanox.com }, 53616d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 53626d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 53636d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 53646d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 53656d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 53666d2f89dfSmajd@mellanox.com }, 53676d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 53686d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 53696d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 53706d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 53716d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 53726d2f89dfSmajd@mellanox.com }, 53736d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 53746d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 53756d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 53766d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 53776d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 53786d2f89dfSmajd@mellanox.com }, 53796d2f89dfSmajd@mellanox.com }; 53806d2f89dfSmajd@mellanox.com 53816d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 53826d2f89dfSmajd@mellanox.com 53836d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 53846d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 53856d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 53866d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 53876d2f89dfSmajd@mellanox.com return -EINVAL; 53886d2f89dfSmajd@mellanox.com } 53896d2f89dfSmajd@mellanox.com 53906d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 53916d2f89dfSmajd@mellanox.com *qp_state = qp->state; 53926d2f89dfSmajd@mellanox.com 53936d2f89dfSmajd@mellanox.com return 0; 53946d2f89dfSmajd@mellanox.com } 53956d2f89dfSmajd@mellanox.com 53966d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 53976d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 53986d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 53996d2f89dfSmajd@mellanox.com { 54006d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 54016d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 54026d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 54036d2f89dfSmajd@mellanox.com int err; 54046d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 54056d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 54066d2f89dfSmajd@mellanox.com 54076d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 54086d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 54096d2f89dfSmajd@mellanox.com if (err) 54106d2f89dfSmajd@mellanox.com return err; 54116d2f89dfSmajd@mellanox.com } 54126d2f89dfSmajd@mellanox.com 54136d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 54146d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 54156d2f89dfSmajd@mellanox.com if (err) 54166d2f89dfSmajd@mellanox.com return err; 54176d2f89dfSmajd@mellanox.com } 54186d2f89dfSmajd@mellanox.com 54196d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 54206d2f89dfSmajd@mellanox.com raw_packet_qp_state); 54216d2f89dfSmajd@mellanox.com } 54226d2f89dfSmajd@mellanox.com 54236d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 54246d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 54256d2f89dfSmajd@mellanox.com { 542609a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5427e126ba97SEli Cohen struct mlx5_qp_context *context; 5428e126ba97SEli Cohen int mlx5_state; 542909a7d9ecSSaeed Mahameed u32 *outb; 5430e126ba97SEli Cohen int err = 0; 5431e126ba97SEli Cohen 543209a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 54336d2f89dfSmajd@mellanox.com if (!outb) 54346d2f89dfSmajd@mellanox.com return -ENOMEM; 54356d2f89dfSmajd@mellanox.com 543619098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 543709a7d9ecSSaeed Mahameed outlen); 5438e126ba97SEli Cohen if (err) 54396d2f89dfSmajd@mellanox.com goto out; 5440e126ba97SEli Cohen 544109a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 544209a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 544309a7d9ecSSaeed Mahameed 5444e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5445e126ba97SEli Cohen 5446e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5447e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5448e126ba97SEli Cohen qp_attr->path_mig_state = 5449e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5450e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5451e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5452e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5453e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5454e126ba97SEli Cohen qp_attr->qp_access_flags = 5455e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5456e126ba97SEli Cohen 5457e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 545838349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 545938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5460d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5461d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5462d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5463d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5464e126ba97SEli Cohen } 5465e126ba97SEli Cohen 5466d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5467e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5468e126ba97SEli Cohen 5469e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5470e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5471e126ba97SEli Cohen 5472e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5473e126ba97SEli Cohen 5474e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5475e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5476e126ba97SEli Cohen qp_attr->min_rnr_timer = 5477e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5478e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5479e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5480e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5481e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 54826d2f89dfSmajd@mellanox.com 54836d2f89dfSmajd@mellanox.com out: 54846d2f89dfSmajd@mellanox.com kfree(outb); 54856d2f89dfSmajd@mellanox.com return err; 54866d2f89dfSmajd@mellanox.com } 54876d2f89dfSmajd@mellanox.com 5488776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5489776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5490776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5491776a3906SMoni Shoua { 5492776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5493776a3906SMoni Shoua u32 *out; 5494776a3906SMoni Shoua u32 access_flags = 0; 5495776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5496776a3906SMoni Shoua void *dctc; 5497776a3906SMoni Shoua int err; 5498776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5499776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5500776a3906SMoni Shoua IB_QP_PORT | 5501776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5502776a3906SMoni Shoua IB_QP_AV | 5503776a3906SMoni Shoua IB_QP_PATH_MTU | 5504776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5505776a3906SMoni Shoua 5506776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5507776a3906SMoni Shoua return -EINVAL; 5508776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5509776a3906SMoni Shoua return -EINVAL; 5510776a3906SMoni Shoua 5511776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5512776a3906SMoni Shoua if (!out) 5513776a3906SMoni Shoua return -ENOMEM; 5514776a3906SMoni Shoua 5515776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5516776a3906SMoni Shoua if (err) 5517776a3906SMoni Shoua goto out; 5518776a3906SMoni Shoua 5519776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5520776a3906SMoni Shoua 5521776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5522776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5523776a3906SMoni Shoua 5524776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5525776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5526776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5527776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5528776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5529776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5530776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5531776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5532776a3906SMoni Shoua } 5533776a3906SMoni Shoua 5534776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5535776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5536776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5537776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5538776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5539776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5540776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5541776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5542776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5543776a3906SMoni Shoua } 5544776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5545776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5546776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5547776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5548776a3906SMoni Shoua out: 5549776a3906SMoni Shoua kfree(out); 5550776a3906SMoni Shoua return err; 5551776a3906SMoni Shoua } 5552776a3906SMoni Shoua 55536d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 55546d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 55556d2f89dfSmajd@mellanox.com { 55566d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 55576d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 55586d2f89dfSmajd@mellanox.com int err = 0; 55596d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 55606d2f89dfSmajd@mellanox.com 556128d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 556228d61370SYishai Hadas return -ENOSYS; 556328d61370SYishai Hadas 5564d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5565d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5566d16e91daSHaggai Eran qp_init_attr); 5567d16e91daSHaggai Eran 5568c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5569c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5570c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5571c2e53b2cSYishai Hadas 5572776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5573776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5574776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5575776a3906SMoni Shoua 55766d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 55776d2f89dfSmajd@mellanox.com 5578c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5579c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 55806d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 55816d2f89dfSmajd@mellanox.com if (err) 55826d2f89dfSmajd@mellanox.com goto out; 55836d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 55846d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 55856d2f89dfSmajd@mellanox.com } else { 55866d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 55876d2f89dfSmajd@mellanox.com if (err) 55886d2f89dfSmajd@mellanox.com goto out; 55896d2f89dfSmajd@mellanox.com } 55906d2f89dfSmajd@mellanox.com 55916d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5592e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5593e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5594e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5595e126ba97SEli Cohen 5596e126ba97SEli Cohen if (!ibqp->uobject) { 55970540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5598e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 55990540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5600e126ba97SEli Cohen } else { 5601e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5602e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5603e126ba97SEli Cohen } 5604e126ba97SEli Cohen 56050540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 56060540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 56070540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 56080540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 56090540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5610e126ba97SEli Cohen 5611e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5612e126ba97SEli Cohen 5613e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5614e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5615e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5616e126ba97SEli Cohen 5617051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5618051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5619051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5620051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5621051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5622051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5623b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5624b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5625051f2630SLeon Romanovsky 5626e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5627e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5628e126ba97SEli Cohen 5629e126ba97SEli Cohen out: 5630e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5631e126ba97SEli Cohen return err; 5632e126ba97SEli Cohen } 5633e126ba97SEli Cohen 5634e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5635e126ba97SEli Cohen struct ib_udata *udata) 5636e126ba97SEli Cohen { 5637e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5638e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5639e126ba97SEli Cohen int err; 5640e126ba97SEli Cohen 5641938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5642e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5643e126ba97SEli Cohen 5644e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5645e126ba97SEli Cohen if (!xrcd) 5646e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5647e126ba97SEli Cohen 56485aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 5649e126ba97SEli Cohen if (err) { 5650e126ba97SEli Cohen kfree(xrcd); 5651e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5652e126ba97SEli Cohen } 5653e126ba97SEli Cohen 5654e126ba97SEli Cohen return &xrcd->ibxrcd; 5655e126ba97SEli Cohen } 5656e126ba97SEli Cohen 5657c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 5658e126ba97SEli Cohen { 5659e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5660e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5661e126ba97SEli Cohen int err; 5662e126ba97SEli Cohen 56635aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 5664b081808aSLeon Romanovsky if (err) 5665e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5666e126ba97SEli Cohen 5667e126ba97SEli Cohen kfree(xrcd); 5668e126ba97SEli Cohen return 0; 5669e126ba97SEli Cohen } 567079b20a6cSYishai Hadas 5671350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5672350d0e4cSYishai Hadas { 5673350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5674350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5675350d0e4cSYishai Hadas struct ib_event event; 5676350d0e4cSYishai Hadas 5677350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5678350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5679350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5680350d0e4cSYishai Hadas switch (type) { 5681350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5682350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5683350d0e4cSYishai Hadas break; 5684350d0e4cSYishai Hadas default: 5685350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5686350d0e4cSYishai Hadas return; 5687350d0e4cSYishai Hadas } 5688350d0e4cSYishai Hadas 5689350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5690350d0e4cSYishai Hadas } 5691350d0e4cSYishai Hadas } 5692350d0e4cSYishai Hadas 569303404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 569403404e8aSMaor Gottlieb { 569503404e8aSMaor Gottlieb int err = 0; 569603404e8aSMaor Gottlieb 569703404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 569803404e8aSMaor Gottlieb if (dev->delay_drop.activate) 569903404e8aSMaor Gottlieb goto out; 570003404e8aSMaor Gottlieb 570103404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 570203404e8aSMaor Gottlieb if (err) 570303404e8aSMaor Gottlieb goto out; 570403404e8aSMaor Gottlieb 570503404e8aSMaor Gottlieb dev->delay_drop.activate = true; 570603404e8aSMaor Gottlieb out: 570703404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5708fe248c3aSMaor Gottlieb 5709fe248c3aSMaor Gottlieb if (!err) 5710fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 571103404e8aSMaor Gottlieb return err; 571203404e8aSMaor Gottlieb } 571303404e8aSMaor Gottlieb 571479b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 571579b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 571679b20a6cSYishai Hadas { 571779b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 57184be6da1eSNoa Osherovich int has_net_offloads; 571979b20a6cSYishai Hadas __be64 *rq_pas0; 572079b20a6cSYishai Hadas void *in; 572179b20a6cSYishai Hadas void *rqc; 572279b20a6cSYishai Hadas void *wq; 572379b20a6cSYishai Hadas int inlen; 572479b20a6cSYishai Hadas int err; 572579b20a6cSYishai Hadas 572679b20a6cSYishai Hadas dev = to_mdev(pd->device); 572779b20a6cSYishai Hadas 572879b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 57291b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 573079b20a6cSYishai Hadas if (!in) 573179b20a6cSYishai Hadas return -ENOMEM; 573279b20a6cSYishai Hadas 573334d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 573479b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 573579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 573679b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 573779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 573879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 573979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 574079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 574179b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5742ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5743ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5744ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5745b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5746b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5747b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5748b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5749b1383aa6SNoa Osherovich goto out; 5750b1383aa6SNoa Osherovich } else { 575179b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5752b1383aa6SNoa Osherovich } 5753b1383aa6SNoa Osherovich } 575479b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5755ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5756ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5757ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5758ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5759ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5760ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5761ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5762ccc87087SNoa Osherovich } 576379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 576479b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 576579b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 576679b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 576779b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 576879b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 57694be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5770b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 57714be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5772b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5773b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5774b1f74a84SNoa Osherovich goto out; 5775b1f74a84SNoa Osherovich } 5776b1f74a84SNoa Osherovich } else { 5777b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5778b1f74a84SNoa Osherovich } 57794be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 57804be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 57814be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 57824be6da1eSNoa Osherovich err = -EOPNOTSUPP; 57834be6da1eSNoa Osherovich goto out; 57844be6da1eSNoa Osherovich } 57854be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 57864be6da1eSNoa Osherovich } 578703404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 578803404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 578903404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 579003404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 579103404e8aSMaor Gottlieb err = -EOPNOTSUPP; 579203404e8aSMaor Gottlieb goto out; 579303404e8aSMaor Gottlieb } 579403404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 579503404e8aSMaor Gottlieb } 579679b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 579779b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5798350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 579903404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 580003404e8aSMaor Gottlieb err = set_delay_drop(dev); 580103404e8aSMaor Gottlieb if (err) { 580203404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 580303404e8aSMaor Gottlieb err); 580403404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 580503404e8aSMaor Gottlieb } else { 580603404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 580703404e8aSMaor Gottlieb } 580803404e8aSMaor Gottlieb } 5809b1f74a84SNoa Osherovich out: 581079b20a6cSYishai Hadas kvfree(in); 581179b20a6cSYishai Hadas return err; 581279b20a6cSYishai Hadas } 581379b20a6cSYishai Hadas 581479b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 581579b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 581679b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 581779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 581879b20a6cSYishai Hadas { 581979b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 582079b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 582179b20a6cSYishai Hadas return -EINVAL; 582279b20a6cSYishai Hadas 582379b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 582479b20a6cSYishai Hadas return -EINVAL; 582579b20a6cSYishai Hadas 582679b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 582779b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 58280dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 58290dfe4522SLeon Romanovsky return -EINVAL; 58300dfe4522SLeon Romanovsky 583179b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 583279b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 583379b20a6cSYishai Hadas return 0; 583479b20a6cSYishai Hadas } 583579b20a6cSYishai Hadas 583679b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 583779b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 583879b20a6cSYishai Hadas struct ib_udata *udata, 583979b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 584079b20a6cSYishai Hadas { 584179b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 584279b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 584379b20a6cSYishai Hadas int err; 584479b20a6cSYishai Hadas size_t required_cmd_sz; 584579b20a6cSYishai Hadas 5846ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5847ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 584879b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 584979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 585079b20a6cSYishai Hadas return -EINVAL; 585179b20a6cSYishai Hadas } 585279b20a6cSYishai Hadas 585379b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 585479b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 585579b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 585679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 585779b20a6cSYishai Hadas return -EOPNOTSUPP; 585879b20a6cSYishai Hadas } 585979b20a6cSYishai Hadas 586079b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 586179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 586279b20a6cSYishai Hadas return -EFAULT; 586379b20a6cSYishai Hadas } 586479b20a6cSYishai Hadas 5865ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 586679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 586779b20a6cSYishai Hadas return -EOPNOTSUPP; 5868ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5869ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5870ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 587179b20a6cSYishai Hadas return -EOPNOTSUPP; 587279b20a6cSYishai Hadas } 5873ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5874ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5875ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5876ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5877ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5878ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5879ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5880ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5881ccc87087SNoa Osherovich return -EINVAL; 5882ccc87087SNoa Osherovich } 5883ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5884ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5885ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5886ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5887ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5888ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5889ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5890ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5891ccc87087SNoa Osherovich return -EINVAL; 5892ccc87087SNoa Osherovich } 5893ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5894ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5895ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5896ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5897ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5898ccc87087SNoa Osherovich } 589979b20a6cSYishai Hadas 590079b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 590179b20a6cSYishai Hadas if (err) { 590279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 590379b20a6cSYishai Hadas return err; 590479b20a6cSYishai Hadas } 590579b20a6cSYishai Hadas 5906b0ea0fa5SJason Gunthorpe err = create_user_rq(dev, pd, udata, rwq, &ucmd); 590779b20a6cSYishai Hadas if (err) { 590879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 590979b20a6cSYishai Hadas return err; 591079b20a6cSYishai Hadas } 591179b20a6cSYishai Hadas 591279b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 591379b20a6cSYishai Hadas return 0; 591479b20a6cSYishai Hadas } 591579b20a6cSYishai Hadas 591679b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 591779b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 591879b20a6cSYishai Hadas struct ib_udata *udata) 591979b20a6cSYishai Hadas { 592079b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 592179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 592279b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 592379b20a6cSYishai Hadas size_t min_resp_len; 592479b20a6cSYishai Hadas int err; 592579b20a6cSYishai Hadas 592679b20a6cSYishai Hadas if (!udata) 592779b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 592879b20a6cSYishai Hadas 592979b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 593079b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 593179b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 593279b20a6cSYishai Hadas 593379b20a6cSYishai Hadas dev = to_mdev(pd->device); 593479b20a6cSYishai Hadas switch (init_attr->wq_type) { 593579b20a6cSYishai Hadas case IB_WQT_RQ: 593679b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 593779b20a6cSYishai Hadas if (!rwq) 593879b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 593979b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 594079b20a6cSYishai Hadas if (err) 594179b20a6cSYishai Hadas goto err; 594279b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 594379b20a6cSYishai Hadas if (err) 594479b20a6cSYishai Hadas goto err_user_rq; 594579b20a6cSYishai Hadas break; 594679b20a6cSYishai Hadas default: 594779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 594879b20a6cSYishai Hadas init_attr->wq_type); 594979b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 595079b20a6cSYishai Hadas } 595179b20a6cSYishai Hadas 5952350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 595379b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 595479b20a6cSYishai Hadas if (udata->outlen) { 595579b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 595679b20a6cSYishai Hadas sizeof(resp.response_length); 595779b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 595879b20a6cSYishai Hadas if (err) 595979b20a6cSYishai Hadas goto err_copy; 596079b20a6cSYishai Hadas } 596179b20a6cSYishai Hadas 5962350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5963350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 596479b20a6cSYishai Hadas return &rwq->ibwq; 596579b20a6cSYishai Hadas 596679b20a6cSYishai Hadas err_copy: 5967350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 596879b20a6cSYishai Hadas err_user_rq: 5969bdeacabdSShamir Rabinovitch destroy_user_rq(dev, pd, rwq, udata); 597079b20a6cSYishai Hadas err: 597179b20a6cSYishai Hadas kfree(rwq); 597279b20a6cSYishai Hadas return ERR_PTR(err); 597379b20a6cSYishai Hadas } 597479b20a6cSYishai Hadas 5975c4367a26SShamir Rabinovitch int mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata) 597679b20a6cSYishai Hadas { 597779b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 597879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 597979b20a6cSYishai Hadas 5980350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5981bdeacabdSShamir Rabinovitch destroy_user_rq(dev, wq->pd, rwq, udata); 598279b20a6cSYishai Hadas kfree(rwq); 598379b20a6cSYishai Hadas 598479b20a6cSYishai Hadas return 0; 598579b20a6cSYishai Hadas } 598679b20a6cSYishai Hadas 5987c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5988c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5989c5f90929SYishai Hadas struct ib_udata *udata) 5990c5f90929SYishai Hadas { 5991c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5992c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5993c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5994c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5995c5f90929SYishai Hadas size_t min_resp_len; 5996c5f90929SYishai Hadas int inlen; 5997c5f90929SYishai Hadas int err; 5998c5f90929SYishai Hadas int i; 5999c5f90929SYishai Hadas u32 *in; 6000c5f90929SYishai Hadas void *rqtc; 6001c5f90929SYishai Hadas 6002c5f90929SYishai Hadas if (udata->inlen > 0 && 6003c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 6004c5f90929SYishai Hadas udata->inlen)) 6005c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 6006c5f90929SYishai Hadas 6007efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 6008efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 6009efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 6010efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 6011efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 6012efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 6013efd7f400SMaor Gottlieb } 6014efd7f400SMaor Gottlieb 6015c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 6016c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 6017c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 6018c5f90929SYishai Hadas 6019c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 6020c5f90929SYishai Hadas if (!rwq_ind_tbl) 6021c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 6022c5f90929SYishai Hadas 6023c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 60241b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 6025c5f90929SYishai Hadas if (!in) { 6026c5f90929SYishai Hadas err = -ENOMEM; 6027c5f90929SYishai Hadas goto err; 6028c5f90929SYishai Hadas } 6029c5f90929SYishai Hadas 6030c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 6031c5f90929SYishai Hadas 6032c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 6033c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 6034c5f90929SYishai Hadas 6035c5f90929SYishai Hadas for (i = 0; i < sz; i++) 6036c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 6037c5f90929SYishai Hadas 60385deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 60395deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 60405deba86eSYishai Hadas 6041c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 6042c5f90929SYishai Hadas kvfree(in); 6043c5f90929SYishai Hadas 6044c5f90929SYishai Hadas if (err) 6045c5f90929SYishai Hadas goto err; 6046c5f90929SYishai Hadas 6047c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 6048c5f90929SYishai Hadas if (udata->outlen) { 6049c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 6050c5f90929SYishai Hadas sizeof(resp.response_length); 6051c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 6052c5f90929SYishai Hadas if (err) 6053c5f90929SYishai Hadas goto err_copy; 6054c5f90929SYishai Hadas } 6055c5f90929SYishai Hadas 6056c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 6057c5f90929SYishai Hadas 6058c5f90929SYishai Hadas err_copy: 60595deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6060c5f90929SYishai Hadas err: 6061c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6062c5f90929SYishai Hadas return ERR_PTR(err); 6063c5f90929SYishai Hadas } 6064c5f90929SYishai Hadas 6065c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 6066c5f90929SYishai Hadas { 6067c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 6068c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 6069c5f90929SYishai Hadas 60705deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6071c5f90929SYishai Hadas 6072c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6073c5f90929SYishai Hadas return 0; 6074c5f90929SYishai Hadas } 6075c5f90929SYishai Hadas 607679b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 607779b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 607879b20a6cSYishai Hadas { 607979b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 608079b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 608179b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 608279b20a6cSYishai Hadas size_t required_cmd_sz; 608379b20a6cSYishai Hadas int curr_wq_state; 608479b20a6cSYishai Hadas int wq_state; 608579b20a6cSYishai Hadas int inlen; 608679b20a6cSYishai Hadas int err; 608779b20a6cSYishai Hadas void *rqc; 608879b20a6cSYishai Hadas void *in; 608979b20a6cSYishai Hadas 609079b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 609179b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 609279b20a6cSYishai Hadas return -EINVAL; 609379b20a6cSYishai Hadas 609479b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 609579b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 609679b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 609779b20a6cSYishai Hadas return -EOPNOTSUPP; 609879b20a6cSYishai Hadas 609979b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 610079b20a6cSYishai Hadas return -EFAULT; 610179b20a6cSYishai Hadas 610279b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 610379b20a6cSYishai Hadas return -EOPNOTSUPP; 610479b20a6cSYishai Hadas 610579b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 61061b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 610779b20a6cSYishai Hadas if (!in) 610879b20a6cSYishai Hadas return -ENOMEM; 610979b20a6cSYishai Hadas 611079b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 611179b20a6cSYishai Hadas 611279b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 611379b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 611479b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 611579b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 611679b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 611779b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 611879b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 611979b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 612079b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 612134d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 612279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 612379b20a6cSYishai Hadas 6124b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6125b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6126b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6127b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6128b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6129b1f74a84SNoa Osherovich "supported\n"); 6130b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6131b1f74a84SNoa Osherovich goto out; 6132b1f74a84SNoa Osherovich } 6133b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6134b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6135b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6136b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6137b1f74a84SNoa Osherovich } 6138b1383aa6SNoa Osherovich 6139b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6140b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6141b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6142b1383aa6SNoa Osherovich goto out; 6143b1383aa6SNoa Osherovich } 6144b1f74a84SNoa Osherovich } 6145b1f74a84SNoa Osherovich 614623a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 614723a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 614823a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 614923a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 6150e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 6151e1f24a79SParav Pandit dev->port->cnts.set_id); 615223a6964eSMajd Dibbiny } else 61535a738b5dSJason Gunthorpe dev_info_once( 61545a738b5dSJason Gunthorpe &dev->ib_dev.dev, 61555a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 615623a6964eSMajd Dibbiny } 615723a6964eSMajd Dibbiny 6158350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 615979b20a6cSYishai Hadas if (!err) 616079b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 616179b20a6cSYishai Hadas 6162b1f74a84SNoa Osherovich out: 6163b1f74a84SNoa Osherovich kvfree(in); 616479b20a6cSYishai Hadas return err; 616579b20a6cSYishai Hadas } 6166d0e84c0aSYishai Hadas 6167d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6168d0e84c0aSYishai Hadas struct ib_cqe cqe; 6169d0e84c0aSYishai Hadas struct completion done; 6170d0e84c0aSYishai Hadas }; 6171d0e84c0aSYishai Hadas 6172d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6173d0e84c0aSYishai Hadas { 6174d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6175d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6176d0e84c0aSYishai Hadas cqe); 6177d0e84c0aSYishai Hadas 6178d0e84c0aSYishai Hadas complete(&cqe->done); 6179d0e84c0aSYishai Hadas } 6180d0e84c0aSYishai Hadas 6181d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6182d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6183d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6184d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6185d0e84c0aSYishai Hadas { 6186d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6187d0e84c0aSYishai Hadas 6188d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6189d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6190d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6191d0e84c0aSYishai Hadas return; 6192d0e84c0aSYishai Hadas } 6193d0e84c0aSYishai Hadas 6194d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6195d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6196d0e84c0aSYishai Hadas bool triggered = false; 6197d0e84c0aSYishai Hadas unsigned long flags; 6198d0e84c0aSYishai Hadas 6199d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6200d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6201d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6202d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6203d0e84c0aSYishai Hadas else 6204d0e84c0aSYishai Hadas triggered = true; 6205d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6206d0e84c0aSYishai Hadas 6207d0e84c0aSYishai Hadas if (triggered) { 6208d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6209d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6210d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6211d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6212d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6213d0e84c0aSYishai Hadas break; 6214d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6215d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6216d0e84c0aSYishai Hadas break; 6217d0e84c0aSYishai Hadas default: 6218d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6219d0e84c0aSYishai Hadas } 6220d0e84c0aSYishai Hadas } 6221d0e84c0aSYishai Hadas 6222d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6223d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6224d0e84c0aSYishai Hadas */ 6225d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 6226d0e84c0aSYishai Hadas } 6227d0e84c0aSYishai Hadas 6228d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6229d0e84c0aSYishai Hadas } 6230d0e84c0aSYishai Hadas 6231d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6232d0e84c0aSYishai Hadas { 6233d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6234d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6235d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6236d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6237d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6238d0e84c0aSYishai Hadas .wr = { 6239d0e84c0aSYishai Hadas .next = NULL, 6240d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6241d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6242d0e84c0aSYishai Hadas }, 6243d0e84c0aSYishai Hadas }; 6244d0e84c0aSYishai Hadas int ret; 6245d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6246d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6247d0e84c0aSYishai Hadas 6248d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6249d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6250d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6251d0e84c0aSYishai Hadas return; 6252d0e84c0aSYishai Hadas } 6253d0e84c0aSYishai Hadas 6254d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6255d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6256d0e84c0aSYishai Hadas 6257d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6258d0e84c0aSYishai Hadas if (ret) { 6259d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6260d0e84c0aSYishai Hadas return; 6261d0e84c0aSYishai Hadas } 6262d0e84c0aSYishai Hadas 6263d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6264d0e84c0aSYishai Hadas } 6265d0e84c0aSYishai Hadas 6266d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6267d0e84c0aSYishai Hadas { 6268d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6269d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6270d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6271d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6272d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6273d0e84c0aSYishai Hadas int ret; 6274d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6275d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6276d0e84c0aSYishai Hadas 6277d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6278d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6279d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6280d0e84c0aSYishai Hadas return; 6281d0e84c0aSYishai Hadas } 6282d0e84c0aSYishai Hadas 6283d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6284d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6285d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6286d0e84c0aSYishai Hadas 6287d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6288d0e84c0aSYishai Hadas if (ret) { 6289d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6290d0e84c0aSYishai Hadas return; 6291d0e84c0aSYishai Hadas } 6292d0e84c0aSYishai Hadas 6293d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6294d0e84c0aSYishai Hadas } 6295