1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37d14133ddSMark Zhang #include <rdma/rdma_counter.h> 38c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 39e126ba97SEli Cohen #include "mlx5_ib.h" 40b96c9ddeSMark Bloch #include "ib_rep.h" 41443c1cf9SYishai Hadas #include "cmd.h" 42333fbaa0SLeon Romanovsky #include "qp.h" 43e126ba97SEli Cohen 44e126ba97SEli Cohen /* not supported currently */ 45e126ba97SEli Cohen static int wq_signature; 46e126ba97SEli Cohen 47e126ba97SEli Cohen enum { 48e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 49e126ba97SEli Cohen }; 50e126ba97SEli Cohen 51e126ba97SEli Cohen enum { 52e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 53e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 54e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 55e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 56e126ba97SEli Cohen }; 57e126ba97SEli Cohen 58e126ba97SEli Cohen enum { 59e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 60064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 61e126ba97SEli Cohen }; 62e126ba97SEli Cohen 63e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 64e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 65f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 66e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 68e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 69e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 70e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 71e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 72e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 73e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 748a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 75e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 76e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 77e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 78e126ba97SEli Cohen }; 79e126ba97SEli Cohen 80f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 81f0313965SErez Shitrit u8 rsvd0[16]; 82f0313965SErez Shitrit }; 83e126ba97SEli Cohen 84eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 85eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 867d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 87eb49ab0cSAlex Vesker }; 88eb49ab0cSAlex Vesker 890680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 900680efa2SAlex Vesker u16 operation; 91eb49ab0cSAlex Vesker 92eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9361147f39SBodong Wang 9461147f39SBodong Wang struct mlx5_rate_limit rl; 9561147f39SBodong Wang 96eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 97d5ed8ac3SMark Bloch u16 port; 980680efa2SAlex Vesker }; 990680efa2SAlex Vesker 10089ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 10189ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 10289ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10389ea94a7SMaor Gottlieb 104e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 105e126ba97SEli Cohen { 106e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 107e126ba97SEli Cohen } 108e126ba97SEli Cohen 109e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 110e126ba97SEli Cohen { 111e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 112e126ba97SEli Cohen } 113e126ba97SEli Cohen 114c1395a2aSHaggai Eran /** 115fbeb4075SMoni Shoua * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ 116fbeb4075SMoni Shoua * to kernel buffer 117c1395a2aSHaggai Eran * 118fbeb4075SMoni Shoua * @umem: User space memory where the WQ is 119fbeb4075SMoni Shoua * @buffer: buffer to copy to 120fbeb4075SMoni Shoua * @buflen: buffer length 121fbeb4075SMoni Shoua * @wqe_index: index of WQE to copy from 122fbeb4075SMoni Shoua * @wq_offset: offset to start of WQ 123fbeb4075SMoni Shoua * @wq_wqe_cnt: number of WQEs in WQ 124fbeb4075SMoni Shoua * @wq_wqe_shift: log2 of WQE size 125fbeb4075SMoni Shoua * @bcnt: number of bytes to copy 126fbeb4075SMoni Shoua * @bytes_copied: number of bytes to copy (return value) 127c1395a2aSHaggai Eran * 128fbeb4075SMoni Shoua * Copies from start of WQE bcnt or less bytes. 129fbeb4075SMoni Shoua * Does not gurantee to copy the entire WQE. 130c1395a2aSHaggai Eran * 131fbeb4075SMoni Shoua * Return: zero on success, or an error code. 132c1395a2aSHaggai Eran */ 133da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, void *buffer, 134da9ee9d8SMoni Shoua size_t buflen, int wqe_index, 135da9ee9d8SMoni Shoua int wq_offset, int wq_wqe_cnt, 136da9ee9d8SMoni Shoua int wq_wqe_shift, int bcnt, 137fbeb4075SMoni Shoua size_t *bytes_copied) 138c1395a2aSHaggai Eran { 139fbeb4075SMoni Shoua size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift); 140fbeb4075SMoni Shoua size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift); 141fbeb4075SMoni Shoua size_t copy_length; 142c1395a2aSHaggai Eran int ret; 143c1395a2aSHaggai Eran 144fbeb4075SMoni Shoua /* don't copy more than requested, more than buffer length or 145fbeb4075SMoni Shoua * beyond WQ end 146fbeb4075SMoni Shoua */ 147fbeb4075SMoni Shoua copy_length = min_t(u32, buflen, wq_end - offset); 148fbeb4075SMoni Shoua copy_length = min_t(u32, copy_length, bcnt); 149c1395a2aSHaggai Eran 150fbeb4075SMoni Shoua ret = ib_umem_copy_from(buffer, umem, offset, copy_length); 151c1395a2aSHaggai Eran if (ret) 152c1395a2aSHaggai Eran return ret; 153c1395a2aSHaggai Eran 154fbeb4075SMoni Shoua if (!ret && bytes_copied) 155fbeb4075SMoni Shoua *bytes_copied = copy_length; 156c1395a2aSHaggai Eran 157fbeb4075SMoni Shoua return 0; 158fbeb4075SMoni Shoua } 159fbeb4075SMoni Shoua 160da9ee9d8SMoni Shoua static int mlx5_ib_read_kernel_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, 161da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 162da9ee9d8SMoni Shoua { 163da9ee9d8SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 164da9ee9d8SMoni Shoua size_t bytes_copied = 0; 165da9ee9d8SMoni Shoua size_t wqe_length; 166da9ee9d8SMoni Shoua void *p; 167da9ee9d8SMoni Shoua int ds; 168da9ee9d8SMoni Shoua 169da9ee9d8SMoni Shoua wqe_index = wqe_index & qp->sq.fbc.sz_m1; 170da9ee9d8SMoni Shoua 171da9ee9d8SMoni Shoua /* read the control segment first */ 172da9ee9d8SMoni Shoua p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index); 173da9ee9d8SMoni Shoua ctrl = p; 174da9ee9d8SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 175da9ee9d8SMoni Shoua wqe_length = ds * MLX5_WQE_DS_UNITS; 176da9ee9d8SMoni Shoua 177da9ee9d8SMoni Shoua /* read rest of WQE if it spreads over more than one stride */ 178da9ee9d8SMoni Shoua while (bytes_copied < wqe_length) { 179da9ee9d8SMoni Shoua size_t copy_length = 180da9ee9d8SMoni Shoua min_t(size_t, buflen - bytes_copied, MLX5_SEND_WQE_BB); 181da9ee9d8SMoni Shoua 182da9ee9d8SMoni Shoua if (!copy_length) 183da9ee9d8SMoni Shoua break; 184da9ee9d8SMoni Shoua 185da9ee9d8SMoni Shoua memcpy(buffer + bytes_copied, p, copy_length); 186da9ee9d8SMoni Shoua bytes_copied += copy_length; 187da9ee9d8SMoni Shoua 188da9ee9d8SMoni Shoua wqe_index = (wqe_index + 1) & qp->sq.fbc.sz_m1; 189da9ee9d8SMoni Shoua p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index); 190da9ee9d8SMoni Shoua } 191da9ee9d8SMoni Shoua *bc = bytes_copied; 192da9ee9d8SMoni Shoua return 0; 193da9ee9d8SMoni Shoua } 194da9ee9d8SMoni Shoua 195da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, 196da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 197fbeb4075SMoni Shoua { 198fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 199fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 200fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->sq; 201fbeb4075SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 202fbeb4075SMoni Shoua size_t bytes_copied; 203fbeb4075SMoni Shoua size_t bytes_copied2; 204fbeb4075SMoni Shoua size_t wqe_length; 205fbeb4075SMoni Shoua int ret; 206fbeb4075SMoni Shoua int ds; 207fbeb4075SMoni Shoua 208fbeb4075SMoni Shoua /* at first read as much as possible */ 209da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 210da9ee9d8SMoni Shoua wq->offset, wq->wqe_cnt, 211da9ee9d8SMoni Shoua wq->wqe_shift, buflen, 212fbeb4075SMoni Shoua &bytes_copied); 213fbeb4075SMoni Shoua if (ret) 214fbeb4075SMoni Shoua return ret; 215fbeb4075SMoni Shoua 216fbeb4075SMoni Shoua /* we need at least control segment size to proceed */ 217fbeb4075SMoni Shoua if (bytes_copied < sizeof(*ctrl)) 218fbeb4075SMoni Shoua return -EINVAL; 219fbeb4075SMoni Shoua 220fbeb4075SMoni Shoua ctrl = buffer; 221fbeb4075SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 222c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 223fbeb4075SMoni Shoua 224fbeb4075SMoni Shoua /* if we copied enough then we are done */ 225fbeb4075SMoni Shoua if (bytes_copied >= wqe_length) { 226fbeb4075SMoni Shoua *bc = bytes_copied; 227fbeb4075SMoni Shoua return 0; 228c1395a2aSHaggai Eran } 229c1395a2aSHaggai Eran 230fbeb4075SMoni Shoua /* otherwise this a wrapped around wqe 231fbeb4075SMoni Shoua * so read the remaining bytes starting 232fbeb4075SMoni Shoua * from wqe_index 0 233fbeb4075SMoni Shoua */ 234da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer + bytes_copied, 235da9ee9d8SMoni Shoua buflen - bytes_copied, 0, wq->offset, 236da9ee9d8SMoni Shoua wq->wqe_cnt, wq->wqe_shift, 237fbeb4075SMoni Shoua wqe_length - bytes_copied, 238fbeb4075SMoni Shoua &bytes_copied2); 239c1395a2aSHaggai Eran 240c1395a2aSHaggai Eran if (ret) 241c1395a2aSHaggai Eran return ret; 242fbeb4075SMoni Shoua *bc = bytes_copied + bytes_copied2; 243fbeb4075SMoni Shoua return 0; 244fbeb4075SMoni Shoua } 245c1395a2aSHaggai Eran 246da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, void *buffer, 247da9ee9d8SMoni Shoua size_t buflen, size_t *bc) 248da9ee9d8SMoni Shoua { 249da9ee9d8SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 250da9ee9d8SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 251da9ee9d8SMoni Shoua 252da9ee9d8SMoni Shoua if (buflen < sizeof(struct mlx5_wqe_ctrl_seg)) 253da9ee9d8SMoni Shoua return -EINVAL; 254da9ee9d8SMoni Shoua 255da9ee9d8SMoni Shoua if (!umem) 256da9ee9d8SMoni Shoua return mlx5_ib_read_kernel_wqe_sq(qp, wqe_index, buffer, 257da9ee9d8SMoni Shoua buflen, bc); 258da9ee9d8SMoni Shoua 259da9ee9d8SMoni Shoua return mlx5_ib_read_user_wqe_sq(qp, wqe_index, buffer, buflen, bc); 260da9ee9d8SMoni Shoua } 261da9ee9d8SMoni Shoua 262da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, int wqe_index, 263da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 264fbeb4075SMoni Shoua { 265fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 266fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 267fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 268fbeb4075SMoni Shoua size_t bytes_copied; 269fbeb4075SMoni Shoua int ret; 270fbeb4075SMoni Shoua 271da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 272da9ee9d8SMoni Shoua wq->offset, wq->wqe_cnt, 273da9ee9d8SMoni Shoua wq->wqe_shift, buflen, 274fbeb4075SMoni Shoua &bytes_copied); 275fbeb4075SMoni Shoua 276fbeb4075SMoni Shoua if (ret) 277fbeb4075SMoni Shoua return ret; 278fbeb4075SMoni Shoua *bc = bytes_copied; 279fbeb4075SMoni Shoua return 0; 280fbeb4075SMoni Shoua } 281fbeb4075SMoni Shoua 282da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_rq(struct mlx5_ib_qp *qp, int wqe_index, void *buffer, 283da9ee9d8SMoni Shoua size_t buflen, size_t *bc) 284da9ee9d8SMoni Shoua { 285da9ee9d8SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 286da9ee9d8SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 287da9ee9d8SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 288da9ee9d8SMoni Shoua size_t wqe_size = 1 << wq->wqe_shift; 289da9ee9d8SMoni Shoua 290da9ee9d8SMoni Shoua if (buflen < wqe_size) 291da9ee9d8SMoni Shoua return -EINVAL; 292da9ee9d8SMoni Shoua 293da9ee9d8SMoni Shoua if (!umem) 294da9ee9d8SMoni Shoua return -EOPNOTSUPP; 295da9ee9d8SMoni Shoua 296da9ee9d8SMoni Shoua return mlx5_ib_read_user_wqe_rq(qp, wqe_index, buffer, buflen, bc); 297da9ee9d8SMoni Shoua } 298da9ee9d8SMoni Shoua 299da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, int wqe_index, 300da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 301fbeb4075SMoni Shoua { 302fbeb4075SMoni Shoua struct ib_umem *umem = srq->umem; 303fbeb4075SMoni Shoua size_t bytes_copied; 304fbeb4075SMoni Shoua int ret; 305fbeb4075SMoni Shoua 306da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 0, 307da9ee9d8SMoni Shoua srq->msrq.max, srq->msrq.wqe_shift, 308da9ee9d8SMoni Shoua buflen, &bytes_copied); 309fbeb4075SMoni Shoua 310fbeb4075SMoni Shoua if (ret) 311fbeb4075SMoni Shoua return ret; 312fbeb4075SMoni Shoua *bc = bytes_copied; 313fbeb4075SMoni Shoua return 0; 314c1395a2aSHaggai Eran } 315c1395a2aSHaggai Eran 316da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_srq(struct mlx5_ib_srq *srq, int wqe_index, void *buffer, 317da9ee9d8SMoni Shoua size_t buflen, size_t *bc) 318da9ee9d8SMoni Shoua { 319da9ee9d8SMoni Shoua struct ib_umem *umem = srq->umem; 320da9ee9d8SMoni Shoua size_t wqe_size = 1 << srq->msrq.wqe_shift; 321da9ee9d8SMoni Shoua 322da9ee9d8SMoni Shoua if (buflen < wqe_size) 323da9ee9d8SMoni Shoua return -EINVAL; 324da9ee9d8SMoni Shoua 325da9ee9d8SMoni Shoua if (!umem) 326da9ee9d8SMoni Shoua return -EOPNOTSUPP; 327da9ee9d8SMoni Shoua 328da9ee9d8SMoni Shoua return mlx5_ib_read_user_wqe_srq(srq, wqe_index, buffer, buflen, bc); 329da9ee9d8SMoni Shoua } 330da9ee9d8SMoni Shoua 331e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 332e126ba97SEli Cohen { 333e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 334e126ba97SEli Cohen struct ib_event event; 335e126ba97SEli Cohen 33619098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 33719098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 33819098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 33919098df2Smajd@mellanox.com } 340e126ba97SEli Cohen 341e126ba97SEli Cohen if (ibqp->event_handler) { 342e126ba97SEli Cohen event.device = ibqp->device; 343e126ba97SEli Cohen event.element.qp = ibqp; 344e126ba97SEli Cohen switch (type) { 345e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 346e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 347e126ba97SEli Cohen break; 348e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 349e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 350e126ba97SEli Cohen break; 351e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 352e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 353e126ba97SEli Cohen break; 354e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 355e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 356e126ba97SEli Cohen break; 357e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 358e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 359e126ba97SEli Cohen break; 360e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 361e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 362e126ba97SEli Cohen break; 363e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 364e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 365e126ba97SEli Cohen break; 366e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 367e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 368e126ba97SEli Cohen break; 369e126ba97SEli Cohen default: 370e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 371e126ba97SEli Cohen return; 372e126ba97SEli Cohen } 373e126ba97SEli Cohen 374e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 375e126ba97SEli Cohen } 376e126ba97SEli Cohen } 377e126ba97SEli Cohen 378e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 379e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 380e126ba97SEli Cohen { 381e126ba97SEli Cohen int wqe_size; 382e126ba97SEli Cohen int wq_size; 383e126ba97SEli Cohen 384e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 385938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 386e126ba97SEli Cohen return -EINVAL; 387e126ba97SEli Cohen 388e126ba97SEli Cohen if (!has_rq) { 389e126ba97SEli Cohen qp->rq.max_gs = 0; 390e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 391e126ba97SEli Cohen qp->rq.wqe_shift = 0; 3920540d814SNoa Osherovich cap->max_recv_wr = 0; 3930540d814SNoa Osherovich cap->max_recv_sge = 0; 394e126ba97SEli Cohen } else { 395e126ba97SEli Cohen if (ucmd) { 396e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 397002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 398002bf228SLeon Romanovsky return -EINVAL; 399e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 400002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 401002bf228SLeon Romanovsky return -EINVAL; 402e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 403e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 404e126ba97SEli Cohen } else { 405e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 406e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 407e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 408e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 409e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 410e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 411938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 412e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 413e126ba97SEli Cohen wqe_size, 414938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 415938fe83cSSaeed Mahameed max_wqe_sz_rq)); 416e126ba97SEli Cohen return -EINVAL; 417e126ba97SEli Cohen } 418e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 419e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 420e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 421e126ba97SEli Cohen } 422e126ba97SEli Cohen } 423e126ba97SEli Cohen 424e126ba97SEli Cohen return 0; 425e126ba97SEli Cohen } 426e126ba97SEli Cohen 427f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 428e126ba97SEli Cohen { 429618af384SAndi Shyti int size = 0; 430e126ba97SEli Cohen 431f0313965SErez Shitrit switch (attr->qp_type) { 432e126ba97SEli Cohen case IB_QPT_XRC_INI: 433b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 434e126ba97SEli Cohen /* fall through */ 435e126ba97SEli Cohen case IB_QPT_RC: 436e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 43775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 43875c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 43975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 440064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 441064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 442064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 443e126ba97SEli Cohen break; 444e126ba97SEli Cohen 445b125a54bSEli Cohen case IB_QPT_XRC_TGT: 446b125a54bSEli Cohen return 0; 447b125a54bSEli Cohen 448e126ba97SEli Cohen case IB_QPT_UC: 449b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 45075c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 4519e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 45275c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 453e126ba97SEli Cohen break; 454e126ba97SEli Cohen 455e126ba97SEli Cohen case IB_QPT_UD: 456f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 457f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 458f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 459f0313965SErez Shitrit /* fall through */ 460e126ba97SEli Cohen case IB_QPT_SMI: 461d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 462b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 463e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 464e126ba97SEli Cohen break; 465e126ba97SEli Cohen 466e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 467b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 468e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 469e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 470e126ba97SEli Cohen break; 471e126ba97SEli Cohen 472e126ba97SEli Cohen default: 473e126ba97SEli Cohen return -EINVAL; 474e126ba97SEli Cohen } 475e126ba97SEli Cohen 476e126ba97SEli Cohen return size; 477e126ba97SEli Cohen } 478e126ba97SEli Cohen 479e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 480e126ba97SEli Cohen { 481e126ba97SEli Cohen int inl_size = 0; 482e126ba97SEli Cohen int size; 483e126ba97SEli Cohen 484f0313965SErez Shitrit size = sq_overhead(attr); 485e126ba97SEli Cohen if (size < 0) 486e126ba97SEli Cohen return size; 487e126ba97SEli Cohen 488e126ba97SEli Cohen if (attr->cap.max_inline_data) { 489e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 490e126ba97SEli Cohen attr->cap.max_inline_data; 491e126ba97SEli Cohen } 492e126ba97SEli Cohen 493e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 494c0a6cbb9SIsrael Rukshin if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN && 495e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 496e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 497e1e66cc2SSagi Grimberg else 498e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 499e126ba97SEli Cohen } 500e126ba97SEli Cohen 501288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 502288c01b7SEli Cohen { 503288c01b7SEli Cohen int max_sge; 504288c01b7SEli Cohen 505288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 506288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 507288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 508288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 509288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 510288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 511288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 512288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 513288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 514288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 515288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 516288c01b7SEli Cohen else 517288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 518288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 519288c01b7SEli Cohen 520288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 521288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 522288c01b7SEli Cohen } 523288c01b7SEli Cohen 524e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 525e126ba97SEli Cohen struct mlx5_ib_qp *qp) 526e126ba97SEli Cohen { 527e126ba97SEli Cohen int wqe_size; 528e126ba97SEli Cohen int wq_size; 529e126ba97SEli Cohen 530e126ba97SEli Cohen if (!attr->cap.max_send_wr) 531e126ba97SEli Cohen return 0; 532e126ba97SEli Cohen 533e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 534e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 535e126ba97SEli Cohen if (wqe_size < 0) 536e126ba97SEli Cohen return wqe_size; 537e126ba97SEli Cohen 538938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 539b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 540938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 541e126ba97SEli Cohen return -EINVAL; 542e126ba97SEli Cohen } 543e126ba97SEli Cohen 544f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 545e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 546e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 547e126ba97SEli Cohen 548e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 549e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 550938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 5511974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 5521974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 553938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 554938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 555b125a54bSEli Cohen return -ENOMEM; 556b125a54bSEli Cohen } 557e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 558288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 559288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 560288c01b7SEli Cohen return -ENOMEM; 561288c01b7SEli Cohen 562288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 563b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 564b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 565e126ba97SEli Cohen 566e126ba97SEli Cohen return wq_size; 567e126ba97SEli Cohen } 568e126ba97SEli Cohen 569e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 570e126ba97SEli Cohen struct mlx5_ib_qp *qp, 57119098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 5720fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 5730fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 574e126ba97SEli Cohen { 575e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 576e126ba97SEli Cohen 577938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 578e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 579938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 580e126ba97SEli Cohen return -EINVAL; 581e126ba97SEli Cohen } 582e126ba97SEli Cohen 583af8b38edSGal Pressman if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) { 584af8b38edSGal Pressman mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n", 585af8b38edSGal Pressman ucmd->sq_wqe_count); 586e126ba97SEli Cohen return -EINVAL; 587e126ba97SEli Cohen } 588e126ba97SEli Cohen 589e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 590e126ba97SEli Cohen 591938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 592e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 593938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 594938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 595e126ba97SEli Cohen return -EINVAL; 596e126ba97SEli Cohen } 597e126ba97SEli Cohen 598c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 599c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 6000fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 6010fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 6020fb2ed66Smajd@mellanox.com } else { 60319098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 604e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 6050fb2ed66Smajd@mellanox.com } 606e126ba97SEli Cohen 607e126ba97SEli Cohen return 0; 608e126ba97SEli Cohen } 609e126ba97SEli Cohen 610e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 611e126ba97SEli Cohen { 612e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 613e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 614e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 615e126ba97SEli Cohen !attr->cap.max_recv_wr) 616e126ba97SEli Cohen return 0; 617e126ba97SEli Cohen 618e126ba97SEli Cohen return 1; 619e126ba97SEli Cohen } 620e126ba97SEli Cohen 6210b80c14fSEli Cohen enum { 6220b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 6230b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 6240b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 6250b80c14fSEli Cohen * "odd/even" order 6260b80c14fSEli Cohen */ 6270b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 6280b80c14fSEli Cohen }; 6290b80c14fSEli Cohen 630b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 631b037c29aSEli Cohen { 63231a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 633b037c29aSEli Cohen } 634b037c29aSEli Cohen 635b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 636b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 637c1be5232SEli Cohen { 638c1be5232SEli Cohen int n; 639c1be5232SEli Cohen 640b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 641b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 642c1be5232SEli Cohen 643c1be5232SEli Cohen return n >= 0 ? n : 0; 644c1be5232SEli Cohen } 645c1be5232SEli Cohen 64618b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 64718b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 64818b0362eSYishai Hadas { 64918b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 65018b0362eSYishai Hadas } 65118b0362eSYishai Hadas 652b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 653b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 654c1be5232SEli Cohen { 655c1be5232SEli Cohen int med; 656c1be5232SEli Cohen 657b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 658b037c29aSEli Cohen return ++med; 659c1be5232SEli Cohen } 660c1be5232SEli Cohen 661b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 662b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 663e126ba97SEli Cohen { 664e126ba97SEli Cohen int i; 665e126ba97SEli Cohen 666b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 667b037c29aSEli Cohen if (!bfregi->count[i]) { 6682f5ff264SEli Cohen bfregi->count[i]++; 669e126ba97SEli Cohen return i; 670e126ba97SEli Cohen } 671e126ba97SEli Cohen } 672e126ba97SEli Cohen 673e126ba97SEli Cohen return -ENOMEM; 674e126ba97SEli Cohen } 675e126ba97SEli Cohen 676b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 677b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 678e126ba97SEli Cohen { 67918b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 680e126ba97SEli Cohen int i; 681e126ba97SEli Cohen 68218b0362eSYishai Hadas if (minidx < 0) 68318b0362eSYishai Hadas return minidx; 68418b0362eSYishai Hadas 68518b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 6862f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 687e126ba97SEli Cohen minidx = i; 6880b80c14fSEli Cohen if (!bfregi->count[minidx]) 6890b80c14fSEli Cohen break; 690e126ba97SEli Cohen } 691e126ba97SEli Cohen 6922f5ff264SEli Cohen bfregi->count[minidx]++; 693e126ba97SEli Cohen return minidx; 694e126ba97SEli Cohen } 695e126ba97SEli Cohen 696b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 697ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 698e126ba97SEli Cohen { 699ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 700e126ba97SEli Cohen 7010a2fd01cSYishai Hadas if (bfregi->lib_uar_dyn) 7020a2fd01cSYishai Hadas return -EINVAL; 7030a2fd01cSYishai Hadas 7042f5ff264SEli Cohen mutex_lock(&bfregi->lock); 705ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 706ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 707ffaf58deSLeon Romanovsky if (bfregn < 0) 708ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 709ffaf58deSLeon Romanovsky } 710ffaf58deSLeon Romanovsky 711ffaf58deSLeon Romanovsky if (bfregn < 0) { 7120b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 7132f5ff264SEli Cohen bfregn = 0; 7142f5ff264SEli Cohen bfregi->count[bfregn]++; 715e126ba97SEli Cohen } 7162f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 717e126ba97SEli Cohen 7182f5ff264SEli Cohen return bfregn; 719e126ba97SEli Cohen } 720e126ba97SEli Cohen 7214ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 722e126ba97SEli Cohen { 7232f5ff264SEli Cohen mutex_lock(&bfregi->lock); 724b037c29aSEli Cohen bfregi->count[bfregn]--; 7252f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 726e126ba97SEli Cohen } 727e126ba97SEli Cohen 728e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 729e126ba97SEli Cohen { 730e126ba97SEli Cohen switch (state) { 731e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 732e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 733e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 734e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 735e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 736e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 737e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 738e126ba97SEli Cohen default: return -1; 739e126ba97SEli Cohen } 740e126ba97SEli Cohen } 741e126ba97SEli Cohen 742e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 743e126ba97SEli Cohen { 744e126ba97SEli Cohen switch (type) { 745e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 746e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 747e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 748e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 749e126ba97SEli Cohen case IB_QPT_XRC_INI: 750e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 751e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 752d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 753c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 754e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 755e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 7560fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 757e126ba97SEli Cohen case IB_QPT_MAX: 758e126ba97SEli Cohen default: return -EINVAL; 759e126ba97SEli Cohen } 760e126ba97SEli Cohen } 761e126ba97SEli Cohen 76289ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 76389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 76489ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 76589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 76689ea94a7SMaor Gottlieb 7677c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 76805f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 7691ee47ab3SYishai Hadas bool dyn_bfreg) 770e126ba97SEli Cohen { 77105f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 77205f58cebSLeon Romanovsky u32 index_of_sys_page; 77305f58cebSLeon Romanovsky u32 offset; 774b037c29aSEli Cohen 7750a2fd01cSYishai Hadas if (bfregi->lib_uar_dyn) 7760a2fd01cSYishai Hadas return -EINVAL; 7770a2fd01cSYishai Hadas 778b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 779b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 780b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 781b037c29aSEli Cohen 78205f58cebSLeon Romanovsky if (dyn_bfreg) { 78305f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 78405f58cebSLeon Romanovsky 7857c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 7867c043e90SYishai Hadas return -EINVAL; 7877c043e90SYishai Hadas 7881ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 7891ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 7901ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 7911ee47ab3SYishai Hadas return -EINVAL; 7921ee47ab3SYishai Hadas } 7931ee47ab3SYishai Hadas } 794b037c29aSEli Cohen 7951ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 796b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 797e126ba97SEli Cohen } 798e126ba97SEli Cohen 799b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata, 80019098df2Smajd@mellanox.com unsigned long addr, size_t size, 801b0ea0fa5SJason Gunthorpe struct ib_umem **umem, int *npages, int *page_shift, 802b0ea0fa5SJason Gunthorpe int *ncont, u32 *offset) 80319098df2Smajd@mellanox.com { 80419098df2Smajd@mellanox.com int err; 80519098df2Smajd@mellanox.com 806c320e527SMoni Shoua *umem = ib_umem_get(&dev->ib_dev, addr, size, 0); 80719098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 80819098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 80919098df2Smajd@mellanox.com return PTR_ERR(*umem); 81019098df2Smajd@mellanox.com } 81119098df2Smajd@mellanox.com 812762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 81319098df2Smajd@mellanox.com 81419098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 81519098df2Smajd@mellanox.com if (err) { 81619098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 81719098df2Smajd@mellanox.com goto err_umem; 81819098df2Smajd@mellanox.com } 81919098df2Smajd@mellanox.com 82019098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 82119098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 82219098df2Smajd@mellanox.com 82319098df2Smajd@mellanox.com return 0; 82419098df2Smajd@mellanox.com 82519098df2Smajd@mellanox.com err_umem: 82619098df2Smajd@mellanox.com ib_umem_release(*umem); 82719098df2Smajd@mellanox.com *umem = NULL; 82819098df2Smajd@mellanox.com 82919098df2Smajd@mellanox.com return err; 83019098df2Smajd@mellanox.com } 83119098df2Smajd@mellanox.com 832fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 833bdeacabdSShamir Rabinovitch struct mlx5_ib_rwq *rwq, struct ib_udata *udata) 83479b20a6cSYishai Hadas { 835bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 836bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 837bdeacabdSShamir Rabinovitch udata, 838bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 839bdeacabdSShamir Rabinovitch ibucontext); 84079b20a6cSYishai Hadas 841fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 842fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 843fe248c3aSMaor Gottlieb 84479b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 84579b20a6cSYishai Hadas ib_umem_release(rwq->umem); 84679b20a6cSYishai Hadas } 84779b20a6cSYishai Hadas 84879b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 849b0ea0fa5SJason Gunthorpe struct ib_udata *udata, struct mlx5_ib_rwq *rwq, 85079b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 85179b20a6cSYishai Hadas { 85289944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 85389944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 85479b20a6cSYishai Hadas int page_shift = 0; 85579b20a6cSYishai Hadas int npages; 85679b20a6cSYishai Hadas u32 offset = 0; 85779b20a6cSYishai Hadas int ncont = 0; 85879b20a6cSYishai Hadas int err; 85979b20a6cSYishai Hadas 86079b20a6cSYishai Hadas if (!ucmd->buf_addr) 86179b20a6cSYishai Hadas return -EINVAL; 86279b20a6cSYishai Hadas 863c320e527SMoni Shoua rwq->umem = ib_umem_get(&dev->ib_dev, ucmd->buf_addr, rwq->buf_size, 0); 86479b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 86579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 86679b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 86779b20a6cSYishai Hadas return err; 86879b20a6cSYishai Hadas } 86979b20a6cSYishai Hadas 870762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 87179b20a6cSYishai Hadas &ncont, NULL); 87279b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 87379b20a6cSYishai Hadas &rwq->rq_page_offset); 87479b20a6cSYishai Hadas if (err) { 87579b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 87679b20a6cSYishai Hadas goto err_umem; 87779b20a6cSYishai Hadas } 87879b20a6cSYishai Hadas 87979b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 88079b20a6cSYishai Hadas rwq->page_shift = page_shift; 88179b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 88279b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 88379b20a6cSYishai Hadas 88479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 88579b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 88679b20a6cSYishai Hadas npages, page_shift, ncont, offset); 88779b20a6cSYishai Hadas 88889944450SShamir Rabinovitch err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db); 88979b20a6cSYishai Hadas if (err) { 89079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 89179b20a6cSYishai Hadas goto err_umem; 89279b20a6cSYishai Hadas } 89379b20a6cSYishai Hadas 89479b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 89579b20a6cSYishai Hadas return 0; 89679b20a6cSYishai Hadas 89779b20a6cSYishai Hadas err_umem: 89879b20a6cSYishai Hadas ib_umem_release(rwq->umem); 89979b20a6cSYishai Hadas return err; 90079b20a6cSYishai Hadas } 90179b20a6cSYishai Hadas 902b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 903b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 904b037c29aSEli Cohen { 905b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 906b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 907b037c29aSEli Cohen } 908b037c29aSEli Cohen 909e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 910e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 9110fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 91209a7d9ecSSaeed Mahameed u32 **in, 91319098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 91419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 915e126ba97SEli Cohen { 916e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 917e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 91819098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 9199e9c47d0SEli Cohen int page_shift = 0; 9201ee47ab3SYishai Hadas int uar_index = 0; 921e126ba97SEli Cohen int npages; 9229e9c47d0SEli Cohen u32 offset = 0; 9232f5ff264SEli Cohen int bfregn; 9249e9c47d0SEli Cohen int ncont = 0; 92509a7d9ecSSaeed Mahameed __be64 *pas; 92609a7d9ecSSaeed Mahameed void *qpc; 927e126ba97SEli Cohen int err; 9285aa3771dSYishai Hadas u16 uid; 929ac42a5eeSYishai Hadas u32 uar_flags; 930e126ba97SEli Cohen 931e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 932e126ba97SEli Cohen if (err) { 933e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 934e126ba97SEli Cohen return err; 935e126ba97SEli Cohen } 936e126ba97SEli Cohen 93789944450SShamir Rabinovitch context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext, 93889944450SShamir Rabinovitch ibucontext); 939ac42a5eeSYishai Hadas uar_flags = ucmd.flags & (MLX5_QP_FLAG_UAR_PAGE_INDEX | 940ac42a5eeSYishai Hadas MLX5_QP_FLAG_BFREG_INDEX); 941ac42a5eeSYishai Hadas switch (uar_flags) { 942ac42a5eeSYishai Hadas case MLX5_QP_FLAG_UAR_PAGE_INDEX: 943ac42a5eeSYishai Hadas uar_index = ucmd.bfreg_index; 944ac42a5eeSYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 945ac42a5eeSYishai Hadas break; 946ac42a5eeSYishai Hadas case MLX5_QP_FLAG_BFREG_INDEX: 9471ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 9481ee47ab3SYishai Hadas ucmd.bfreg_index, true); 9491ee47ab3SYishai Hadas if (uar_index < 0) 9501ee47ab3SYishai Hadas return uar_index; 9511ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 952ac42a5eeSYishai Hadas break; 953ac42a5eeSYishai Hadas case 0: 954ac42a5eeSYishai Hadas if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 955ac42a5eeSYishai Hadas return -EINVAL; 956ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 957ffaf58deSLeon Romanovsky if (bfregn < 0) 9582f5ff264SEli Cohen return bfregn; 959ac42a5eeSYishai Hadas break; 960ac42a5eeSYishai Hadas default: 961ac42a5eeSYishai Hadas return -EINVAL; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 9642f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 9651ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9661ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 9671ee47ab3SYishai Hadas false); 968e126ba97SEli Cohen 96948fea837SHaggai Eran qp->rq.offset = 0; 97048fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 97148fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 97248fea837SHaggai Eran 9730fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 974e126ba97SEli Cohen if (err) 9752f5ff264SEli Cohen goto err_bfreg; 976e126ba97SEli Cohen 97719098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 97819098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 979b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, 980b0ea0fa5SJason Gunthorpe ubuffer->buf_size, &ubuffer->umem, 981b0ea0fa5SJason Gunthorpe &npages, &page_shift, &ncont, &offset); 98219098df2Smajd@mellanox.com if (err) 9832f5ff264SEli Cohen goto err_bfreg; 9849e9c47d0SEli Cohen } else { 98519098df2Smajd@mellanox.com ubuffer->umem = NULL; 9869e9c47d0SEli Cohen } 987e126ba97SEli Cohen 98809a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 98909a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 9901b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 991e126ba97SEli Cohen if (!*in) { 992e126ba97SEli Cohen err = -ENOMEM; 993e126ba97SEli Cohen goto err_umem; 994e126ba97SEli Cohen } 995e126ba97SEli Cohen 9967422edceSYishai Hadas uid = (attr->qp_type != IB_QPT_XRC_TGT && 9977422edceSYishai Hadas attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 9985aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 99909a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 100009a7d9ecSSaeed Mahameed if (ubuffer->umem) 100109a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 100209a7d9ecSSaeed Mahameed 100309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 100409a7d9ecSSaeed Mahameed 100509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 100609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 100709a7d9ecSSaeed Mahameed 100809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 10091ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 1010b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 10111ee47ab3SYishai Hadas else 10121ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 10132f5ff264SEli Cohen qp->bfregn = bfregn; 1014e126ba97SEli Cohen 1015b0ea0fa5SJason Gunthorpe err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db); 1016e126ba97SEli Cohen if (err) { 1017e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 1018e126ba97SEli Cohen goto err_free; 1019e126ba97SEli Cohen } 1020e126ba97SEli Cohen 102141d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 1022e126ba97SEli Cohen if (err) { 1023e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1024e126ba97SEli Cohen goto err_unmap; 1025e126ba97SEli Cohen } 1026e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 1027e126ba97SEli Cohen 1028e126ba97SEli Cohen return 0; 1029e126ba97SEli Cohen 1030e126ba97SEli Cohen err_unmap: 1031e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 1032e126ba97SEli Cohen 1033e126ba97SEli Cohen err_free: 1034479163f4SAl Viro kvfree(*in); 1035e126ba97SEli Cohen 1036e126ba97SEli Cohen err_umem: 103719098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 1038e126ba97SEli Cohen 10392f5ff264SEli Cohen err_bfreg: 10401ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 10414ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 1042e126ba97SEli Cohen return err; 1043e126ba97SEli Cohen } 1044e126ba97SEli Cohen 1045b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1046bdeacabdSShamir Rabinovitch struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base, 1047bdeacabdSShamir Rabinovitch struct ib_udata *udata) 1048e126ba97SEli Cohen { 1049bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 1050bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 1051bdeacabdSShamir Rabinovitch udata, 1052bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 1053bdeacabdSShamir Rabinovitch ibucontext); 1054e126ba97SEli Cohen 1055e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 105619098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 10571ee47ab3SYishai Hadas 10581ee47ab3SYishai Hadas /* 10591ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 10601ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 10611ee47ab3SYishai Hadas */ 10621ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 10634ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 1064e126ba97SEli Cohen } 1065e126ba97SEli Cohen 106634f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 106734f4c955SGuy Levi * 106834f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 106934f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 107034f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 107134f4c955SGuy Levi * simply should check if it gets to an edge. 107234f4c955SGuy Levi * 107334f4c955SGuy Levi * @sq - SQ buffer. 107434f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 107534f4c955SGuy Levi * 107634f4c955SGuy Levi * Return: 107734f4c955SGuy Levi * The new edge. 107834f4c955SGuy Levi */ 107934f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 108034f4c955SGuy Levi { 108134f4c955SGuy Levi void *fragment_end; 108234f4c955SGuy Levi 108334f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 108434f4c955SGuy Levi (&sq->fbc, 108534f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 108634f4c955SGuy Levi 108734f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 108834f4c955SGuy Levi } 108934f4c955SGuy Levi 1090e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 1091e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1092e126ba97SEli Cohen struct mlx5_ib_qp *qp, 109309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 109419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 1095e126ba97SEli Cohen { 1096e126ba97SEli Cohen int uar_index; 109709a7d9ecSSaeed Mahameed void *qpc; 1098e126ba97SEli Cohen int err; 1099e126ba97SEli Cohen 1100c0a6cbb9SIsrael Rukshin if (init_attr->create_flags & ~(IB_QP_CREATE_INTEGRITY_EN | 1101f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 1102b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 110393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 110411f552e2SMichael Guralnik MLX5_IB_QP_CREATE_SQPN_QP1 | 110511f552e2SMichael Guralnik MLX5_IB_QP_CREATE_WC_TEST)) 11061a4c3a3dSEli Cohen return -EINVAL; 1107e126ba97SEli Cohen 1108e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 11095fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 111011f552e2SMichael Guralnik else if (init_attr->create_flags & MLX5_IB_QP_CREATE_WC_TEST) 111111f552e2SMichael Guralnik qp->bf.bfreg = &dev->wc_bfreg; 11125fe9dec0SEli Cohen else 11135fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 1114e126ba97SEli Cohen 1115d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 1116d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 1117d8030b0dSEli Cohen */ 1118d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 11195fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 1120e126ba97SEli Cohen 1121e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 1122e126ba97SEli Cohen if (err < 0) { 1123e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 11245fe9dec0SEli Cohen return err; 1125e126ba97SEli Cohen } 1126e126ba97SEli Cohen 1127e126ba97SEli Cohen qp->rq.offset = 0; 1128e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 112919098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 1130e126ba97SEli Cohen 113134f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 113234f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 1133e126ba97SEli Cohen if (err) { 1134e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 11355fe9dec0SEli Cohen return err; 1136e126ba97SEli Cohen } 1137e126ba97SEli Cohen 113834f4c955SGuy Levi if (qp->rq.wqe_cnt) 113934f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 114034f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 114134f4c955SGuy Levi 114234f4c955SGuy Levi if (qp->sq.wqe_cnt) { 114334f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 114434f4c955SGuy Levi MLX5_SEND_WQE_BB; 114534f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 114634f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 114734f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 114834f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 114934f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 115034f4c955SGuy Levi 115134f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 115234f4c955SGuy Levi } 115334f4c955SGuy Levi 115409a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 115509a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 11561b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 1157e126ba97SEli Cohen if (!*in) { 1158e126ba97SEli Cohen err = -ENOMEM; 1159e126ba97SEli Cohen goto err_buf; 1160e126ba97SEli Cohen } 116109a7d9ecSSaeed Mahameed 116209a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 116309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 116409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 116509a7d9ecSSaeed Mahameed 1166e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 116709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 116809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1169e126ba97SEli Cohen 11703f89b01fSMichael Guralnik if (init_attr->create_flags & MLX5_IB_QP_CREATE_SQPN_QP1) { 117109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1172b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1173b11a4f9cSHaggai Eran } 1174b11a4f9cSHaggai Eran 117534f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 117634f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 117734f4c955SGuy Levi *in, pas)); 1178e126ba97SEli Cohen 11799603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1180e126ba97SEli Cohen if (err) { 1181e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1182e126ba97SEli Cohen goto err_free; 1183e126ba97SEli Cohen } 1184e126ba97SEli Cohen 1185b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1186b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1187b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1188b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1189b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1190b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1191b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1192b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1193b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1194b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1195e126ba97SEli Cohen 1196e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1197e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1198e126ba97SEli Cohen err = -ENOMEM; 1199e126ba97SEli Cohen goto err_wrid; 1200e126ba97SEli Cohen } 1201e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1202e126ba97SEli Cohen 1203e126ba97SEli Cohen return 0; 1204e126ba97SEli Cohen 1205e126ba97SEli Cohen err_wrid: 1206b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1207b5883008SLi Dongyang kvfree(qp->sq.w_list); 1208b5883008SLi Dongyang kvfree(qp->sq.wrid); 1209b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1210b5883008SLi Dongyang kvfree(qp->rq.wrid); 1211f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1212e126ba97SEli Cohen 1213e126ba97SEli Cohen err_free: 1214479163f4SAl Viro kvfree(*in); 1215e126ba97SEli Cohen 1216e126ba97SEli Cohen err_buf: 121734f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1218e126ba97SEli Cohen return err; 1219e126ba97SEli Cohen } 1220e126ba97SEli Cohen 1221e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1222e126ba97SEli Cohen { 1223b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1224b5883008SLi Dongyang kvfree(qp->sq.w_list); 1225b5883008SLi Dongyang kvfree(qp->sq.wrid); 1226b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1227b5883008SLi Dongyang kvfree(qp->rq.wrid); 1228f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 122934f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1230e126ba97SEli Cohen } 1231e126ba97SEli Cohen 123209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1233e126ba97SEli Cohen { 1234e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 12358bde2c50SLeon Romanovsky (qp->qp_sub_type == MLX5_IB_QPT_DCI) || 1236e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 123709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1238e126ba97SEli Cohen else if (!qp->has_rq) 123909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1240e126ba97SEli Cohen else 124109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1242e126ba97SEli Cohen } 1243e126ba97SEli Cohen 12440fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1245c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 12461cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 12471cd6dbd3SYishai Hadas struct ib_pd *pd) 12480fb2ed66Smajd@mellanox.com { 1249e0b4b472SLeon Romanovsky u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {}; 12500fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 12510fb2ed66Smajd@mellanox.com 12521cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 12530fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1254c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1255c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1256c2e53b2cSYishai Hadas 1257e0b4b472SLeon Romanovsky return mlx5_core_create_tis(dev->mdev, in, &sq->tisn); 12580fb2ed66Smajd@mellanox.com } 12590fb2ed66Smajd@mellanox.com 12600fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 12611cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 12620fb2ed66Smajd@mellanox.com { 12631cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 12640fb2ed66Smajd@mellanox.com } 12650fb2ed66Smajd@mellanox.com 1266d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq) 1267b96c9ddeSMark Bloch { 1268b96c9ddeSMark Bloch if (sq->flow_rule) 1269b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1270d5ed8ac3SMark Bloch sq->flow_rule = NULL; 1271b96c9ddeSMark Bloch } 1272b96c9ddeSMark Bloch 12730fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 1274b0ea0fa5SJason Gunthorpe struct ib_udata *udata, 12750fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 12760fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12770fb2ed66Smajd@mellanox.com { 12780fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 12790fb2ed66Smajd@mellanox.com __be64 *pas; 12800fb2ed66Smajd@mellanox.com void *in; 12810fb2ed66Smajd@mellanox.com void *sqc; 12820fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12830fb2ed66Smajd@mellanox.com void *wq; 12840fb2ed66Smajd@mellanox.com int inlen; 12850fb2ed66Smajd@mellanox.com int err; 12860fb2ed66Smajd@mellanox.com int page_shift = 0; 12870fb2ed66Smajd@mellanox.com int npages; 12880fb2ed66Smajd@mellanox.com int ncont = 0; 12890fb2ed66Smajd@mellanox.com u32 offset = 0; 12900fb2ed66Smajd@mellanox.com 1291b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size, 1292b0ea0fa5SJason Gunthorpe &sq->ubuffer.umem, &npages, &page_shift, &ncont, 1293b0ea0fa5SJason Gunthorpe &offset); 12940fb2ed66Smajd@mellanox.com if (err) 12950fb2ed66Smajd@mellanox.com return err; 12960fb2ed66Smajd@mellanox.com 12970fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 12981b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12990fb2ed66Smajd@mellanox.com if (!in) { 13000fb2ed66Smajd@mellanox.com err = -ENOMEM; 13010fb2ed66Smajd@mellanox.com goto err_umem; 13020fb2ed66Smajd@mellanox.com } 13030fb2ed66Smajd@mellanox.com 1304c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 13050fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 13060fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1307795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1308795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 13090fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 13100fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 13110fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 13120fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 13130fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 131496dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 131596dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 131696dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 13170fb2ed66Smajd@mellanox.com 13180fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 13190fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 13200fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13210fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 13220fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13230fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 13240fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 13250fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 13260fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 13270fb2ed66Smajd@mellanox.com 13280fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 13290fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 13300fb2ed66Smajd@mellanox.com 1331333fbaa0SLeon Romanovsky err = mlx5_core_create_sq_tracked(dev, in, inlen, &sq->base.mqp); 13320fb2ed66Smajd@mellanox.com 13330fb2ed66Smajd@mellanox.com kvfree(in); 13340fb2ed66Smajd@mellanox.com 13350fb2ed66Smajd@mellanox.com if (err) 13360fb2ed66Smajd@mellanox.com goto err_umem; 13370fb2ed66Smajd@mellanox.com 13380fb2ed66Smajd@mellanox.com return 0; 13390fb2ed66Smajd@mellanox.com 13400fb2ed66Smajd@mellanox.com err_umem: 13410fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13420fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 13430fb2ed66Smajd@mellanox.com 13440fb2ed66Smajd@mellanox.com return err; 13450fb2ed66Smajd@mellanox.com } 13460fb2ed66Smajd@mellanox.com 13470fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 13480fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 13490fb2ed66Smajd@mellanox.com { 1350d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 1351333fbaa0SLeon Romanovsky mlx5_core_destroy_sq_tracked(dev, &sq->base.mqp); 13520fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13530fb2ed66Smajd@mellanox.com } 13540fb2ed66Smajd@mellanox.com 13552c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 13560fb2ed66Smajd@mellanox.com { 13570fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 13580fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 13590fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 13600fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 13610fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 13620fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 13630fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 13640fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 13650fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 13660fb2ed66Smajd@mellanox.com 13670fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 13680fb2ed66Smajd@mellanox.com } 13690fb2ed66Smajd@mellanox.com 13700fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13712c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 137234d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 13730fb2ed66Smajd@mellanox.com { 1374358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 13750fb2ed66Smajd@mellanox.com __be64 *pas; 13760fb2ed66Smajd@mellanox.com __be64 *qp_pas; 13770fb2ed66Smajd@mellanox.com void *in; 13780fb2ed66Smajd@mellanox.com void *rqc; 13790fb2ed66Smajd@mellanox.com void *wq; 13800fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 13812c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 13822c292dbbSBoris Pismenny size_t inlen; 13830fb2ed66Smajd@mellanox.com int err; 13842c292dbbSBoris Pismenny 13852c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 13862c292dbbSBoris Pismenny return -EINVAL; 13870fb2ed66Smajd@mellanox.com 13880fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 13891b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13900fb2ed66Smajd@mellanox.com if (!in) 13910fb2ed66Smajd@mellanox.com return -ENOMEM; 13920fb2ed66Smajd@mellanox.com 139334d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 13940fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1395e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 13960fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 13970fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 13980fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 13990fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 14000fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 14010fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 14020fb2ed66Smajd@mellanox.com 1403358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1404358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1405358e42eaSMajd Dibbiny 14060fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 14070fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1408b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1409b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 14100fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 14110fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 14120fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 14130fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 14140fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 14150fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 14160fb2ed66Smajd@mellanox.com 14170fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 14180fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 14190fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 14200fb2ed66Smajd@mellanox.com 1421333fbaa0SLeon Romanovsky err = mlx5_core_create_rq_tracked(dev, in, inlen, &rq->base.mqp); 14220fb2ed66Smajd@mellanox.com 14230fb2ed66Smajd@mellanox.com kvfree(in); 14240fb2ed66Smajd@mellanox.com 14250fb2ed66Smajd@mellanox.com return err; 14260fb2ed66Smajd@mellanox.com } 14270fb2ed66Smajd@mellanox.com 14280fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 14290fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 14300fb2ed66Smajd@mellanox.com { 1431333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rq->base.mqp); 14320fb2ed66Smajd@mellanox.com } 14330fb2ed66Smajd@mellanox.com 1434f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1435f95ef6cbSMaor Gottlieb { 1436f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1437f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1438f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1439f95ef6cbSMaor Gottlieb } 1440f95ef6cbSMaor Gottlieb 14410042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 14420042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1443443c1cf9SYishai Hadas u32 qp_flags_en, 1444443c1cf9SYishai Hadas struct ib_pd *pd) 14450042f9e4SMark Bloch { 14460042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14470042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14480042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1449443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 14500042f9e4SMark Bloch } 14510042f9e4SMark Bloch 14520fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1453f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1454e0b4b472SLeon Romanovsky u32 *qp_flags_en, struct ib_pd *pd, 1455e0b4b472SLeon Romanovsky u32 *out) 14560fb2ed66Smajd@mellanox.com { 1457175edba8SMark Bloch u8 lb_flag = 0; 14580fb2ed66Smajd@mellanox.com u32 *in; 14590fb2ed66Smajd@mellanox.com void *tirc; 14600fb2ed66Smajd@mellanox.com int inlen; 14610fb2ed66Smajd@mellanox.com int err; 14620fb2ed66Smajd@mellanox.com 14630fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14641b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 14650fb2ed66Smajd@mellanox.com if (!in) 14660fb2ed66Smajd@mellanox.com return -ENOMEM; 14670fb2ed66Smajd@mellanox.com 1468443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 14690fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 14700fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 14710fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 14720fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1473175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1474f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 14750fb2ed66Smajd@mellanox.com 1476175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1477175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1478175edba8SMark Bloch 1479175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1480175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1481175edba8SMark Bloch 14826a4d00beSMark Bloch if (dev->is_rep) { 1483175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1484175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1485175edba8SMark Bloch } 1486175edba8SMark Bloch 1487175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1488e0b4b472SLeon Romanovsky MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); 1489e0b4b472SLeon Romanovsky err = mlx5_cmd_exec_inout(dev->mdev, create_tir, in, out); 14901f1d6abbSAriel Levkovich rq->tirn = MLX5_GET(create_tir_out, out, tirn); 14910042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 14920042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 14930042f9e4SMark Bloch 14940042f9e4SMark Bloch if (err) 1495443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 14960042f9e4SMark Bloch } 14970fb2ed66Smajd@mellanox.com kvfree(in); 14980fb2ed66Smajd@mellanox.com 14990fb2ed66Smajd@mellanox.com return err; 15000fb2ed66Smajd@mellanox.com } 15010fb2ed66Smajd@mellanox.com 15020fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 15032c292dbbSBoris Pismenny u32 *in, size_t inlen, 15047f72052cSYishai Hadas struct ib_pd *pd, 15057f72052cSYishai Hadas struct ib_udata *udata, 15067f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 15070fb2ed66Smajd@mellanox.com { 15080fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 15090fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15100fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 151189944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 151289944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 15130fb2ed66Smajd@mellanox.com int err; 15140fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 15157f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 15161f1d6abbSAriel Levkovich u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {}; 15170fb2ed66Smajd@mellanox.com 15180fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 15191cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 15200fb2ed66Smajd@mellanox.com if (err) 15210fb2ed66Smajd@mellanox.com return err; 15220fb2ed66Smajd@mellanox.com 1523b0ea0fa5SJason Gunthorpe err = create_raw_packet_qp_sq(dev, udata, sq, in, pd); 15240fb2ed66Smajd@mellanox.com if (err) 15250fb2ed66Smajd@mellanox.com goto err_destroy_tis; 15260fb2ed66Smajd@mellanox.com 15277f72052cSYishai Hadas if (uid) { 15287f72052cSYishai Hadas resp->tisn = sq->tisn; 15297f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 15307f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 15317f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 15327f72052cSYishai Hadas } 15337f72052cSYishai Hadas 15340fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 15351d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 15360fb2ed66Smajd@mellanox.com } 15370fb2ed66Smajd@mellanox.com 15380fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1539358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1540358e42eaSMajd Dibbiny 1541e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1542e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1543b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1544b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 154534d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 15460fb2ed66Smajd@mellanox.com if (err) 15470fb2ed66Smajd@mellanox.com goto err_destroy_sq; 15480fb2ed66Smajd@mellanox.com 1549e0b4b472SLeon Romanovsky err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd, 1550e0b4b472SLeon Romanovsky out); 15510fb2ed66Smajd@mellanox.com if (err) 15520fb2ed66Smajd@mellanox.com goto err_destroy_rq; 15537f72052cSYishai Hadas 15547f72052cSYishai Hadas if (uid) { 15557f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 15567f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 15577f72052cSYishai Hadas resp->tirn = rq->tirn; 15587f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 15591f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 15601f1d6abbSAriel Levkovich resp->tir_icm_addr = MLX5_GET( 15611f1d6abbSAriel Levkovich create_tir_out, out, icm_address_31_0); 15621f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15631f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15641f1d6abbSAriel Levkovich icm_address_39_32) 15651f1d6abbSAriel Levkovich << 32; 15661f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15671f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15681f1d6abbSAriel Levkovich icm_address_63_40) 15691f1d6abbSAriel Levkovich << 40; 15701f1d6abbSAriel Levkovich resp->comp_mask |= 15711f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 15721f1d6abbSAriel Levkovich } 15737f72052cSYishai Hadas } 15740fb2ed66Smajd@mellanox.com } 15750fb2ed66Smajd@mellanox.com 15760fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 15770fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 15787f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 15797f72052cSYishai Hadas if (err) 15807f72052cSYishai Hadas goto err_destroy_tir; 15810fb2ed66Smajd@mellanox.com 15820fb2ed66Smajd@mellanox.com return 0; 15830fb2ed66Smajd@mellanox.com 15847f72052cSYishai Hadas err_destroy_tir: 15857f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 15860fb2ed66Smajd@mellanox.com err_destroy_rq: 15870fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15880fb2ed66Smajd@mellanox.com err_destroy_sq: 15890fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 15900fb2ed66Smajd@mellanox.com return err; 15910fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15920fb2ed66Smajd@mellanox.com err_destroy_tis: 15931cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 15940fb2ed66Smajd@mellanox.com 15950fb2ed66Smajd@mellanox.com return err; 15960fb2ed66Smajd@mellanox.com } 15970fb2ed66Smajd@mellanox.com 15980fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 15990fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 16000fb2ed66Smajd@mellanox.com { 16010fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 16020fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 16030fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 16040fb2ed66Smajd@mellanox.com 16050fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1606443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 16070fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 16080fb2ed66Smajd@mellanox.com } 16090fb2ed66Smajd@mellanox.com 16100fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 16110fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 16121cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 16130fb2ed66Smajd@mellanox.com } 16140fb2ed66Smajd@mellanox.com } 16150fb2ed66Smajd@mellanox.com 16160fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 16170fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 16180fb2ed66Smajd@mellanox.com { 16190fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 16200fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 16210fb2ed66Smajd@mellanox.com 16220fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 16230fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 16240fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 16250fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 16260fb2ed66Smajd@mellanox.com } 16270fb2ed66Smajd@mellanox.com 162828d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 162928d61370SYishai Hadas { 16300042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 16310042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 16320042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1633443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1634443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 163528d61370SYishai Hadas } 163628d61370SYishai Hadas 163728d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 163828d61370SYishai Hadas struct ib_pd *pd, 163928d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 164028d61370SYishai Hadas struct ib_udata *udata) 164128d61370SYishai Hadas { 164289944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 164389944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 164428d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 164528d61370SYishai Hadas int inlen; 16461f1d6abbSAriel Levkovich int outlen; 164728d61370SYishai Hadas int err; 164828d61370SYishai Hadas u32 *in; 16491f1d6abbSAriel Levkovich u32 *out; 165028d61370SYishai Hadas void *tirc; 165128d61370SYishai Hadas void *hfso; 165228d61370SYishai Hadas u32 selected_fields = 0; 16532d93fc85SMatan Barak u32 outer_l4; 165428d61370SYishai Hadas size_t min_resp_len; 165528d61370SYishai Hadas u32 tdn = mucontext->tdn; 165628d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 165728d61370SYishai Hadas size_t required_cmd_sz; 1658175edba8SMark Bloch u8 lb_flag = 0; 165928d61370SYishai Hadas 166028d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 166128d61370SYishai Hadas return -EINVAL; 166228d61370SYishai Hadas 16632f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 166428d61370SYishai Hadas if (udata->outlen < min_resp_len) 166528d61370SYishai Hadas return -EINVAL; 166628d61370SYishai Hadas 1667f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 166828d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 166928d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 167028d61370SYishai Hadas return -EINVAL; 167128d61370SYishai Hadas } 167228d61370SYishai Hadas 167328d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 167428d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 167528d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 167628d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 167728d61370SYishai Hadas return -EOPNOTSUPP; 167828d61370SYishai Hadas } 167928d61370SYishai Hadas 168028d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 168128d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 168228d61370SYishai Hadas return -EFAULT; 168328d61370SYishai Hadas } 168428d61370SYishai Hadas 168528d61370SYishai Hadas if (ucmd.comp_mask) { 168628d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 168728d61370SYishai Hadas return -EOPNOTSUPP; 168828d61370SYishai Hadas } 168928d61370SYishai Hadas 1690175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1691175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1692175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1693f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1694f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1695f95ef6cbSMaor Gottlieb } 1696f95ef6cbSMaor Gottlieb 1697f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1698f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1699f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 170028d61370SYishai Hadas return -EOPNOTSUPP; 170128d61370SYishai Hadas } 170228d61370SYishai Hadas 1703309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1704309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1705309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1706309fa347SMaor Gottlieb return -EOPNOTSUPP; 1707309fa347SMaor Gottlieb } 1708309fa347SMaor Gottlieb 17096a4d00beSMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->is_rep) { 1710175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1711175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1712175edba8SMark Bloch } 1713175edba8SMark Bloch 1714175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1715175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1716175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1717175edba8SMark Bloch } 1718175edba8SMark Bloch 171941d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 172028d61370SYishai Hadas if (err) { 172128d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 172228d61370SYishai Hadas return -EINVAL; 172328d61370SYishai Hadas } 172428d61370SYishai Hadas 172528d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 17261f1d6abbSAriel Levkovich outlen = MLX5_ST_SZ_BYTES(create_tir_out); 17271f1d6abbSAriel Levkovich in = kvzalloc(inlen + outlen, GFP_KERNEL); 172828d61370SYishai Hadas if (!in) 172928d61370SYishai Hadas return -ENOMEM; 173028d61370SYishai Hadas 17311f1d6abbSAriel Levkovich out = in + MLX5_ST_SZ_DW(create_tir_in); 1732443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 173328d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 173428d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 173528d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 173628d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 173728d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 173828d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 173928d61370SYishai Hadas 174028d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1741f95ef6cbSMaor Gottlieb 1742f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1743f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1744f95ef6cbSMaor Gottlieb 1745175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1746175edba8SMark Bloch 1747309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1748309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1749309fa347SMaor Gottlieb else 1750309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1751309fa347SMaor Gottlieb 175228d61370SYishai Hadas switch (ucmd.rx_hash_function) { 175328d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 175428d61370SYishai Hadas { 175528d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 175628d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 175728d61370SYishai Hadas 175828d61370SYishai Hadas if (len != ucmd.rx_key_len) { 175928d61370SYishai Hadas err = -EINVAL; 176028d61370SYishai Hadas goto err; 176128d61370SYishai Hadas } 176228d61370SYishai Hadas 176328d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 176428d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 176528d61370SYishai Hadas break; 176628d61370SYishai Hadas } 176728d61370SYishai Hadas default: 176828d61370SYishai Hadas err = -EOPNOTSUPP; 176928d61370SYishai Hadas goto err; 177028d61370SYishai Hadas } 177128d61370SYishai Hadas 177228d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 177328d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 177428d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 177528d61370SYishai Hadas goto create_tir; 177628d61370SYishai Hadas err = -EINVAL; 177728d61370SYishai Hadas goto err; 177828d61370SYishai Hadas } 177928d61370SYishai Hadas 178028d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 178128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 178228d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 178328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 178428d61370SYishai Hadas err = -EINVAL; 178528d61370SYishai Hadas goto err; 178628d61370SYishai Hadas } 178728d61370SYishai Hadas 178828d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 178928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 179028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 179128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 179228d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 179328d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 179428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 179528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 179628d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 179728d61370SYishai Hadas 17982d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17992d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 180028d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 18012d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 18022d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 18032d93fc85SMatan Barak 18042d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 18052d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 180628d61370SYishai Hadas err = -EINVAL; 180728d61370SYishai Hadas goto err; 180828d61370SYishai Hadas } 180928d61370SYishai Hadas 181028d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 181128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 181228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 181328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 181428d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 181528d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 181628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 181728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 181828d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 181928d61370SYishai Hadas 182028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 182128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 182228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 182328d61370SYishai Hadas 182428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 182528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 182628d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 182728d61370SYishai Hadas 182828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 182928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 183028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 183128d61370SYishai Hadas 183228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 183328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 183428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 183528d61370SYishai Hadas 18362d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 18372d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 18382d93fc85SMatan Barak 183928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 184028d61370SYishai Hadas 184128d61370SYishai Hadas create_tir: 1842e0b4b472SLeon Romanovsky MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); 1843e0b4b472SLeon Romanovsky err = mlx5_cmd_exec_inout(dev->mdev, create_tir, in, out); 184428d61370SYishai Hadas 18451f1d6abbSAriel Levkovich qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn); 18460042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 18470042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 18480042f9e4SMark Bloch 18490042f9e4SMark Bloch if (err) 1850443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1851443c1cf9SYishai Hadas to_mpd(pd)->uid); 18520042f9e4SMark Bloch } 18530042f9e4SMark Bloch 185428d61370SYishai Hadas if (err) 185528d61370SYishai Hadas goto err; 185628d61370SYishai Hadas 18577f72052cSYishai Hadas if (mucontext->devx_uid) { 18587f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 18597f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 18601f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 18611f1d6abbSAriel Levkovich resp.tir_icm_addr = 18621f1d6abbSAriel Levkovich MLX5_GET(create_tir_out, out, icm_address_31_0); 18631f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18641f1d6abbSAriel Levkovich icm_address_39_32) 18651f1d6abbSAriel Levkovich << 32; 18661f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18671f1d6abbSAriel Levkovich icm_address_63_40) 18681f1d6abbSAriel Levkovich << 40; 18691f1d6abbSAriel Levkovich resp.comp_mask |= 18701f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 18711f1d6abbSAriel Levkovich } 18727f72052cSYishai Hadas } 18737f72052cSYishai Hadas 18747f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 18757f72052cSYishai Hadas if (err) 18767f72052cSYishai Hadas goto err_copy; 18777f72052cSYishai Hadas 187828d61370SYishai Hadas kvfree(in); 187928d61370SYishai Hadas /* qpn is reserved for that QP */ 188028d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1881d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 188228d61370SYishai Hadas return 0; 188328d61370SYishai Hadas 18847f72052cSYishai Hadas err_copy: 18857f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 188628d61370SYishai Hadas err: 188728d61370SYishai Hadas kvfree(in); 188828d61370SYishai Hadas return err; 188928d61370SYishai Hadas } 189028d61370SYishai Hadas 18915d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 18925d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 18936f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 18945d6ff1baSYonatan Cohen void *qpc) 18955d6ff1baSYonatan Cohen { 18965d6ff1baSYonatan Cohen int scqe_sz; 18972ab367a7Szhengbin bool allow_scat_cqe = false; 18985d6ff1baSYonatan Cohen 18996f4bc0eaSYonatan Cohen if (ucmd) 19006f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 19016f4bc0eaSYonatan Cohen 19026f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 19035d6ff1baSYonatan Cohen return; 19045d6ff1baSYonatan Cohen 19055d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 19065d6ff1baSYonatan Cohen if (scqe_sz == 128) { 19075d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 19085d6ff1baSYonatan Cohen return; 19095d6ff1baSYonatan Cohen } 19105d6ff1baSYonatan Cohen 19115d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 19125d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 19135d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 19145d6ff1baSYonatan Cohen } 19155d6ff1baSYonatan Cohen 1916a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1917a60109dcSYonatan Cohen { 1918a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1919a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1920a60109dcSYonatan Cohen */ 1921a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1922a60109dcSYonatan Cohen int log_max_size; 1923a60109dcSYonatan Cohen 1924a60109dcSYonatan Cohen if (!supported_size_mask) 1925a60109dcSYonatan Cohen return -EOPNOTSUPP; 1926a60109dcSYonatan Cohen 1927a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1928a60109dcSYonatan Cohen 1929a60109dcSYonatan Cohen if (log_max_size > 3) 1930a60109dcSYonatan Cohen return log_max_size; 1931a60109dcSYonatan Cohen 1932a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1933a60109dcSYonatan Cohen } 1934a60109dcSYonatan Cohen 1935a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1936a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1937a60109dcSYonatan Cohen { 1938a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1939a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1940a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1941a60109dcSYonatan Cohen int atomic_size_mask; 1942a60109dcSYonatan Cohen 1943a60109dcSYonatan Cohen if (!atomic) 1944a60109dcSYonatan Cohen return -EOPNOTSUPP; 1945a60109dcSYonatan Cohen 1946a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1947a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1948a60109dcSYonatan Cohen else 1949a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1950a60109dcSYonatan Cohen 1951a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1952a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1953a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1954a60109dcSYonatan Cohen 1955a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1956a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1957a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1958a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1959a60109dcSYonatan Cohen 1960a60109dcSYonatan Cohen return atomic_mode; 1961a60109dcSYonatan Cohen } 1962a60109dcSYonatan Cohen 19632e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 19642e43bb31SYonatan Cohen { 19652e43bb31SYonatan Cohen return (input & ~supported) == 0; 19662e43bb31SYonatan Cohen } 19672e43bb31SYonatan Cohen 1968e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1969e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1970e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1971e126ba97SEli Cohen { 1972e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 197309a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1974938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 19750625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 197689944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 197789944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 197889ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 197989ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 198089ea94a7SMaor Gottlieb unsigned long flags; 1981cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 198209a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 198309a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1984e7b169f3SNoa Osherovich int mlx5_st; 1985cfb5e088SHaggai Abramovsky void *qpc; 198609a7d9ecSSaeed Mahameed u32 *in; 198709a7d9ecSSaeed Mahameed int err; 1988e126ba97SEli Cohen 1989e126ba97SEli Cohen mutex_init(&qp->mutex); 1990e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1991e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1992e126ba97SEli Cohen 19938bde2c50SLeon Romanovsky mlx5_st = to_mlx5_st((init_attr->qp_type != IB_QPT_DRIVER) ? 19948bde2c50SLeon Romanovsky init_attr->qp_type : 19958bde2c50SLeon Romanovsky qp->qp_sub_type); 1996e7b169f3SNoa Osherovich if (mlx5_st < 0) 1997e7b169f3SNoa Osherovich return -EINVAL; 1998e7b169f3SNoa Osherovich 19992242cc25SLeon Romanovsky if (init_attr->rwq_ind_tbl) 20002242cc25SLeon Romanovsky return create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 200128d61370SYishai Hadas 2002f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 2003938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 2004f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 2005f360d88aSEli Cohen return -EINVAL; 2006f360d88aSEli Cohen } else { 2007f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 2008f360d88aSEli Cohen } 2009f360d88aSEli Cohen } 2010f360d88aSEli Cohen 2011051f2630SLeon Romanovsky if (init_attr->create_flags & 2012051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 2013051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 2014051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 2015051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 2016051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 2017051f2630SLeon Romanovsky return -EINVAL; 2018051f2630SLeon Romanovsky } 2019051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 2020051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 2021051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 2022051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 2023051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 2024051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 2025051f2630SLeon Romanovsky } 2026f0313965SErez Shitrit 2027f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2028f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 2029f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 2030f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 2031f0313965SErez Shitrit return -EOPNOTSUPP; 2032f0313965SErez Shitrit } 2033f0313965SErez Shitrit 2034358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 2035358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2036358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 2037358e42eaSMajd Dibbiny return -EOPNOTSUPP; 2038358e42eaSMajd Dibbiny } 2039358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 2040358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 2041358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 2042358e42eaSMajd Dibbiny return -EOPNOTSUPP; 2043358e42eaSMajd Dibbiny } 2044358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 2045358e42eaSMajd Dibbiny } 2046358e42eaSMajd Dibbiny 2047e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 2048e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 2049e126ba97SEli Cohen 2050e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 2051e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 2052e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 2053e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 2054e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 2055e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 2056e4cc4fa7SNoa Osherovich } 2057e4cc4fa7SNoa Osherovich 2058e00b64f7SShamir Rabinovitch if (udata) { 2059e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 2060e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 2061e126ba97SEli Cohen return -EFAULT; 2062e126ba97SEli Cohen } 2063e126ba97SEli Cohen 20642e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 2065569c6651SDanit Goldberg MLX5_QP_FLAG_ALLOW_SCATTER_CQE | 20668af526e0SMark Bloch MLX5_QP_FLAG_BFREG_INDEX | 20678af526e0SMark Bloch MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE | 20688af526e0SMark Bloch MLX5_QP_FLAG_SCATTER_CQE | 20698af526e0SMark Bloch MLX5_QP_FLAG_SIGNATURE | 20708af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC | 20718af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 20728af526e0SMark Bloch MLX5_QP_FLAG_TUNNEL_OFFLOADS | 2073ac42a5eeSYishai Hadas MLX5_QP_FLAG_UAR_PAGE_INDEX | 20748af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCI | 20758af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCT)) 20762e43bb31SYonatan Cohen return -EINVAL; 20772e43bb31SYonatan Cohen 207889944450SShamir Rabinovitch err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx); 2079cfb5e088SHaggai Abramovsky if (err) 2080cfb5e088SHaggai Abramovsky return err; 2081cfb5e088SHaggai Abramovsky 2082e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 20835d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 2084e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 2085f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 2086f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 2087f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 2088f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 2089f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 2090f95ef6cbSMaor Gottlieb } 2091175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 2092175edba8SMark Bloch } 2093175edba8SMark Bloch 2094175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 2095175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2096175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 2097175edba8SMark Bloch return -EOPNOTSUPP; 2098175edba8SMark Bloch } 2099175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 2100175edba8SMark Bloch } 2101175edba8SMark Bloch 2102175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 2103175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2104175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 2105175edba8SMark Bloch return -EOPNOTSUPP; 2106175edba8SMark Bloch } 2107175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 2108f95ef6cbSMaor Gottlieb } 2109c2e53b2cSYishai Hadas 2110569c6651SDanit Goldberg if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) { 2111569c6651SDanit Goldberg if (init_attr->qp_type != IB_QPT_RC || 2112569c6651SDanit Goldberg !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { 2113569c6651SDanit Goldberg mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n"); 2114569c6651SDanit Goldberg return -EOPNOTSUPP; 2115569c6651SDanit Goldberg } 2116569c6651SDanit Goldberg qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT; 2117569c6651SDanit Goldberg } 2118569c6651SDanit Goldberg 2119c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 2120c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 2121c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 2122c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 2123c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 2124c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 2125c2e53b2cSYishai Hadas return -EOPNOTSUPP; 2126c2e53b2cSYishai Hadas } 2127c2e53b2cSYishai Hadas 2128c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 2129c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 2130c2e53b2cSYishai Hadas } 2131e126ba97SEli Cohen } else { 2132e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 2133e126ba97SEli Cohen } 2134e126ba97SEli Cohen 2135c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 2136c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 2137c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 2138c2e53b2cSYishai Hadas &qp->trans_qp.base; 2139c2e53b2cSYishai Hadas 2140e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 2141e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 2142e00b64f7SShamir Rabinovitch qp, udata ? &ucmd : NULL); 2143e126ba97SEli Cohen if (err) { 2144e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2145e126ba97SEli Cohen return err; 2146e126ba97SEli Cohen } 2147e126ba97SEli Cohen 2148e126ba97SEli Cohen if (pd) { 2149e00b64f7SShamir Rabinovitch if (udata) { 2150938fe83cSSaeed Mahameed __u32 max_wqes = 2151938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 2152e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 2153e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 2154e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 2155e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 2156e126ba97SEli Cohen return -EINVAL; 2157e126ba97SEli Cohen } 2158938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 2159e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 2160938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 2161e126ba97SEli Cohen return -EINVAL; 2162e126ba97SEli Cohen } 2163b11a4f9cSHaggai Eran if (init_attr->create_flags & 21643f89b01fSMichael Guralnik MLX5_IB_QP_CREATE_SQPN_QP1) { 2165b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 2166b11a4f9cSHaggai Eran return -EINVAL; 2167b11a4f9cSHaggai Eran } 21680fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 21690fb2ed66Smajd@mellanox.com &resp, &inlen, base); 2170e126ba97SEli Cohen if (err) 2171e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2172e126ba97SEli Cohen } else { 217319098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 217419098df2Smajd@mellanox.com base); 2175e126ba97SEli Cohen if (err) 2176e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2177e126ba97SEli Cohen } 2178e126ba97SEli Cohen 2179e126ba97SEli Cohen if (err) 2180e126ba97SEli Cohen return err; 2181e126ba97SEli Cohen } else { 21821b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2183e126ba97SEli Cohen if (!in) 2184e126ba97SEli Cohen return -ENOMEM; 2185e126ba97SEli Cohen 2186e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 2187e126ba97SEli Cohen } 2188e126ba97SEli Cohen 2189e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2190e126ba97SEli Cohen qp->port = init_attr->port_num; 2191e126ba97SEli Cohen 219209a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 219309a7d9ecSSaeed Mahameed 2194e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 219509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2196e126ba97SEli Cohen 2197e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 219809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2199e126ba97SEli Cohen else 220009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 220109a7d9ecSSaeed Mahameed 2202e126ba97SEli Cohen 2203e126ba97SEli Cohen if (qp->wq_sig) 220409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2205e126ba97SEli Cohen 2206f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 220709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2208f360d88aSEli Cohen 2209051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 221009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2211051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 221209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2213051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 221409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2215569c6651SDanit Goldberg if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT) 2216569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 22178bde2c50SLeon Romanovsky if (qp->scat_cqe && (init_attr->qp_type == IB_QPT_RC || 22188bde2c50SLeon Romanovsky init_attr->qp_type == IB_QPT_UC)) { 22198bde2c50SLeon Romanovsky int rcqe_sz = rcqe_sz = 22208bde2c50SLeon Romanovsky mlx5_ib_get_cqe_size(init_attr->recv_cq); 22218bde2c50SLeon Romanovsky 22228bde2c50SLeon Romanovsky MLX5_SET(qpc, qpc, cs_res, 22238bde2c50SLeon Romanovsky rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE : 22248bde2c50SLeon Romanovsky MLX5_RES_SCAT_DATA32_CQE); 22258bde2c50SLeon Romanovsky } 22268bde2c50SLeon Romanovsky if (qp->scat_cqe && (qp->qp_sub_type == MLX5_IB_QPT_DCI || 22278bde2c50SLeon Romanovsky init_attr->qp_type == IB_QPT_RC)) 22286f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 2229e00b64f7SShamir Rabinovitch udata ? &ucmd : NULL, 22306f4bc0eaSYonatan Cohen qpc); 2231e126ba97SEli Cohen 2232e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 223309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 223409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2235e126ba97SEli Cohen } 2236e126ba97SEli Cohen 223709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2238e126ba97SEli Cohen 22393fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 224009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 22413fd3307eSArtemy Kovalyov } else { 224209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 22433fd3307eSArtemy Kovalyov if (init_attr->srq && 22443fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 22453fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 22463fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 22473fd3307eSArtemy Kovalyov } 2248e126ba97SEli Cohen 2249e126ba97SEli Cohen /* Set default resources */ 2250e126ba97SEli Cohen switch (init_attr->qp_type) { 2251e126ba97SEli Cohen case IB_QPT_XRC_TGT: 225209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 225309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 225409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 225509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2256e126ba97SEli Cohen break; 2257e126ba97SEli Cohen case IB_QPT_XRC_INI: 225809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 225909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 226009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2261e126ba97SEli Cohen break; 2262e126ba97SEli Cohen default: 2263e126ba97SEli Cohen if (init_attr->srq) { 226409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 226509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2266e126ba97SEli Cohen } else { 226709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 226809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2269e126ba97SEli Cohen } 2270e126ba97SEli Cohen } 2271e126ba97SEli Cohen 2272e126ba97SEli Cohen if (init_attr->send_cq) 227309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2274e126ba97SEli Cohen 2275e126ba97SEli Cohen if (init_attr->recv_cq) 227609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2277e126ba97SEli Cohen 227809a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2279e126ba97SEli Cohen 2280cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 228109a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2282cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 228309a7d9ecSSaeed Mahameed 2284f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2285f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2286f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2287f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2288f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2289f0313965SErez Shitrit } 2290cfb5e088SHaggai Abramovsky 2291b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2292b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2293b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2294b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2295b1383aa6SNoa Osherovich goto err; 2296b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2297b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2298b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2299b1383aa6SNoa Osherovich } else { 2300b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2301b1383aa6SNoa Osherovich } 2302b1383aa6SNoa Osherovich } 2303b1383aa6SNoa Osherovich 23042c292dbbSBoris Pismenny if (inlen < 0) { 23052c292dbbSBoris Pismenny err = -EINVAL; 23062c292dbbSBoris Pismenny goto err; 23072c292dbbSBoris Pismenny } 23082c292dbbSBoris Pismenny 2309c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2310c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 23110fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 23120fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 23137f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 23147f72052cSYishai Hadas &resp); 23150fb2ed66Smajd@mellanox.com } else { 2316333fbaa0SLeon Romanovsky err = mlx5_core_create_qp(dev, &base->mqp, in, inlen); 23170fb2ed66Smajd@mellanox.com } 23180fb2ed66Smajd@mellanox.com 2319e126ba97SEli Cohen if (err) { 2320e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2321e126ba97SEli Cohen goto err_create; 2322e126ba97SEli Cohen } 2323e126ba97SEli Cohen 2324479163f4SAl Viro kvfree(in); 2325e126ba97SEli Cohen 232619098df2Smajd@mellanox.com base->container_mibqp = qp; 232719098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2328e126ba97SEli Cohen 232989ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 233089ea94a7SMaor Gottlieb &send_cq, &recv_cq); 233189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 233289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 233389ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 233489ea94a7SMaor Gottlieb * flow 233589ea94a7SMaor Gottlieb */ 233689ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 233789ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 233889ea94a7SMaor Gottlieb */ 233989ea94a7SMaor Gottlieb if (send_cq) 234089ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 234189ea94a7SMaor Gottlieb if (recv_cq) 234289ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 234389ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 234489ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 234589ea94a7SMaor Gottlieb 2346e126ba97SEli Cohen return 0; 2347e126ba97SEli Cohen 2348e126ba97SEli Cohen err_create: 2349e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2350bdeacabdSShamir Rabinovitch destroy_qp_user(dev, pd, qp, base, udata); 2351e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2352e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2353e126ba97SEli Cohen 2354b1383aa6SNoa Osherovich err: 2355479163f4SAl Viro kvfree(in); 2356e126ba97SEli Cohen return err; 2357e126ba97SEli Cohen } 2358e126ba97SEli Cohen 2359e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2360e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2361e126ba97SEli Cohen { 2362e126ba97SEli Cohen if (send_cq) { 2363e126ba97SEli Cohen if (recv_cq) { 2364e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 236589ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2366e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2367e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2368e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 236989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2370e126ba97SEli Cohen __acquire(&recv_cq->lock); 2371e126ba97SEli Cohen } else { 237289ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2373e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2374e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2375e126ba97SEli Cohen } 2376e126ba97SEli Cohen } else { 237789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 23786a4f139aSEli Cohen __acquire(&recv_cq->lock); 2379e126ba97SEli Cohen } 2380e126ba97SEli Cohen } else if (recv_cq) { 238189ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 23826a4f139aSEli Cohen __acquire(&send_cq->lock); 23836a4f139aSEli Cohen } else { 23846a4f139aSEli Cohen __acquire(&send_cq->lock); 23856a4f139aSEli Cohen __acquire(&recv_cq->lock); 2386e126ba97SEli Cohen } 2387e126ba97SEli Cohen } 2388e126ba97SEli Cohen 2389e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2390e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2391e126ba97SEli Cohen { 2392e126ba97SEli Cohen if (send_cq) { 2393e126ba97SEli Cohen if (recv_cq) { 2394e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2395e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 239689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2397e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2398e126ba97SEli Cohen __release(&recv_cq->lock); 239989ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2400e126ba97SEli Cohen } else { 2401e126ba97SEli Cohen spin_unlock(&send_cq->lock); 240289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2403e126ba97SEli Cohen } 2404e126ba97SEli Cohen } else { 24056a4f139aSEli Cohen __release(&recv_cq->lock); 240689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2407e126ba97SEli Cohen } 2408e126ba97SEli Cohen } else if (recv_cq) { 24096a4f139aSEli Cohen __release(&send_cq->lock); 241089ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 24116a4f139aSEli Cohen } else { 24126a4f139aSEli Cohen __release(&recv_cq->lock); 24136a4f139aSEli Cohen __release(&send_cq->lock); 2414e126ba97SEli Cohen } 2415e126ba97SEli Cohen } 2416e126ba97SEli Cohen 2417e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2418e126ba97SEli Cohen { 2419e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2420e126ba97SEli Cohen } 2421e126ba97SEli Cohen 242289ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 242389ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2424e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2425e126ba97SEli Cohen { 242689ea94a7SMaor Gottlieb switch (qp_type) { 2427e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2428e126ba97SEli Cohen *send_cq = NULL; 2429e126ba97SEli Cohen *recv_cq = NULL; 2430e126ba97SEli Cohen break; 2431e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2432e126ba97SEli Cohen case IB_QPT_XRC_INI: 243389ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2434e126ba97SEli Cohen *recv_cq = NULL; 2435e126ba97SEli Cohen break; 2436e126ba97SEli Cohen 2437e126ba97SEli Cohen case IB_QPT_SMI: 2438d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2439e126ba97SEli Cohen case IB_QPT_RC: 2440e126ba97SEli Cohen case IB_QPT_UC: 2441e126ba97SEli Cohen case IB_QPT_UD: 2442e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2443e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 24440fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 244589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 244689ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2447e126ba97SEli Cohen break; 2448e126ba97SEli Cohen 2449e126ba97SEli Cohen case IB_QPT_MAX: 2450e126ba97SEli Cohen default: 2451e126ba97SEli Cohen *send_cq = NULL; 2452e126ba97SEli Cohen *recv_cq = NULL; 2453e126ba97SEli Cohen break; 2454e126ba97SEli Cohen } 2455e126ba97SEli Cohen } 2456e126ba97SEli Cohen 2457ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 245813eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 245913eab21fSAviv Heller u8 lag_tx_affinity); 2460ad5f8e96Smajd@mellanox.com 2461bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 2462bdeacabdSShamir Rabinovitch struct ib_udata *udata) 2463e126ba97SEli Cohen { 2464e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2465c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 246689ea94a7SMaor Gottlieb unsigned long flags; 2467e126ba97SEli Cohen int err; 2468e126ba97SEli Cohen 246928d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 247028d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 247128d61370SYishai Hadas return; 247228d61370SYishai Hadas } 247328d61370SYishai Hadas 2474c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2475c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 24760fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 24770fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 24780fb2ed66Smajd@mellanox.com 24796aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2480c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2481c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2482333fbaa0SLeon Romanovsky err = mlx5_core_qp_modify(dev, MLX5_CMD_OP_2RST_QP, 0, 24831a412fb1SSaeed Mahameed NULL, &base->mqp); 2484ad5f8e96Smajd@mellanox.com } else { 24850680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 24860680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 24870680efa2SAlex Vesker }; 24880680efa2SAlex Vesker 248913eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2490ad5f8e96Smajd@mellanox.com } 2491ad5f8e96Smajd@mellanox.com if (err) 2492427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 249319098df2Smajd@mellanox.com base->mqp.qpn); 24946aec21f6SHaggai Eran } 2495e126ba97SEli Cohen 249689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 249789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 249889ea94a7SMaor Gottlieb 249989ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 250089ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 250189ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 250289ea94a7SMaor Gottlieb list_del(&qp->qps_list); 250389ea94a7SMaor Gottlieb if (send_cq) 250489ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 250589ea94a7SMaor Gottlieb 250689ea94a7SMaor Gottlieb if (recv_cq) 250789ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2508e126ba97SEli Cohen 2509e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 251019098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2511e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2512e126ba97SEli Cohen if (send_cq != recv_cq) 251319098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 251419098df2Smajd@mellanox.com NULL); 2515e126ba97SEli Cohen } 251689ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 251789ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2518e126ba97SEli Cohen 2519c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2520c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 25210fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 25220fb2ed66Smajd@mellanox.com } else { 2523333fbaa0SLeon Romanovsky err = mlx5_core_destroy_qp(dev, &base->mqp); 2524e126ba97SEli Cohen if (err) 25250fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 25260fb2ed66Smajd@mellanox.com base->mqp.qpn); 25270fb2ed66Smajd@mellanox.com } 2528e126ba97SEli Cohen 2529e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2530e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2531e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2532bdeacabdSShamir Rabinovitch destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata); 2533e126ba97SEli Cohen } 2534e126ba97SEli Cohen 253547c80612SLeon Romanovsky static int create_dct(struct ib_pd *pd, struct mlx5_ib_qp *qp, 2536b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 253747c80612SLeon Romanovsky struct mlx5_ib_create_qp *ucmd, struct ib_udata *udata) 2538b4aaa1f0SMoni Shoua { 253989944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 254089944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2541b4aaa1f0SMoni Shoua int err = 0; 2542b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2543b4aaa1f0SMoni Shoua void *dctc; 2544b4aaa1f0SMoni Shoua 254589944450SShamir Rabinovitch err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx); 2546b4aaa1f0SMoni Shoua if (err) 254747c80612SLeon Romanovsky return err; 2548b4aaa1f0SMoni Shoua 2549b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 25509c2ba4edSLeon Romanovsky if (!qp->dct.in) 255147c80612SLeon Romanovsky return -ENOMEM; 2552b4aaa1f0SMoni Shoua 2553a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2554b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2555b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2556b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2557b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2558b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2559b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2560b4aaa1f0SMoni Shoua 2561fd9dab7eSLeon Romanovsky if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) { 2562fd9dab7eSLeon Romanovsky int rcqe_sz = mlx5_ib_get_cqe_size(attr->recv_cq); 2563fd9dab7eSLeon Romanovsky 2564fd9dab7eSLeon Romanovsky if (rcqe_sz == 128) 2565fd9dab7eSLeon Romanovsky MLX5_SET(dctc, dctc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 2566fd9dab7eSLeon Romanovsky } 25675d6ff1baSYonatan Cohen 2568b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2569b4aaa1f0SMoni Shoua 257047c80612SLeon Romanovsky return 0; 2571b4aaa1f0SMoni Shoua } 2572b4aaa1f0SMoni Shoua 2573b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2574e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2575b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2576b4aaa1f0SMoni Shoua struct ib_udata *udata) 2577b4aaa1f0SMoni Shoua { 2578b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2579b4aaa1f0SMoni Shoua int err; 2580b4aaa1f0SMoni Shoua 2581b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2582b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2583b4aaa1f0SMoni Shoua return -EINVAL; 2584b4aaa1f0SMoni Shoua } 2585b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2586b4aaa1f0SMoni Shoua if (err) 2587b4aaa1f0SMoni Shoua return err; 2588b4aaa1f0SMoni Shoua 2589b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2590b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2591b4aaa1f0SMoni Shoua } else { 2592b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2593b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2594b4aaa1f0SMoni Shoua } else { 2595b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2596b4aaa1f0SMoni Shoua return -EINVAL; 2597b4aaa1f0SMoni Shoua } 2598b4aaa1f0SMoni Shoua } 2599b4aaa1f0SMoni Shoua 26006eb7edffSLeon Romanovsky return 0; 26016eb7edffSLeon Romanovsky } 26026eb7edffSLeon Romanovsky 26036eb7edffSLeon Romanovsky static int check_qp_type(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr) 26046eb7edffSLeon Romanovsky { 26056eb7edffSLeon Romanovsky if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct)) 26066eb7edffSLeon Romanovsky goto out; 26076eb7edffSLeon Romanovsky 26086eb7edffSLeon Romanovsky switch (attr->qp_type) { 26096eb7edffSLeon Romanovsky case IB_QPT_XRC_TGT: 26106eb7edffSLeon Romanovsky case IB_QPT_XRC_INI: 26116eb7edffSLeon Romanovsky if (!MLX5_CAP_GEN(dev->mdev, xrc)) 26126eb7edffSLeon Romanovsky goto out; 26136eb7edffSLeon Romanovsky fallthrough; 26146eb7edffSLeon Romanovsky case IB_QPT_RAW_PACKET: 26156eb7edffSLeon Romanovsky case IB_QPT_RC: 26166eb7edffSLeon Romanovsky case IB_QPT_UC: 26176eb7edffSLeon Romanovsky case IB_QPT_UD: 26186eb7edffSLeon Romanovsky case IB_QPT_SMI: 26196eb7edffSLeon Romanovsky case MLX5_IB_QPT_HW_GSI: 26206eb7edffSLeon Romanovsky case MLX5_IB_QPT_REG_UMR: 26216eb7edffSLeon Romanovsky case IB_QPT_DRIVER: 26226eb7edffSLeon Romanovsky case IB_QPT_GSI: 26236eb7edffSLeon Romanovsky return 0; 26246eb7edffSLeon Romanovsky case IB_QPT_RAW_IPV6: 26256eb7edffSLeon Romanovsky case IB_QPT_RAW_ETHERTYPE: 26266eb7edffSLeon Romanovsky case IB_QPT_MAX: 26276eb7edffSLeon Romanovsky default: 26286eb7edffSLeon Romanovsky goto out; 2629b4aaa1f0SMoni Shoua } 2630b4aaa1f0SMoni Shoua 2631b4aaa1f0SMoni Shoua return 0; 26326eb7edffSLeon Romanovsky 26336eb7edffSLeon Romanovsky out: 26346eb7edffSLeon Romanovsky mlx5_ib_dbg(dev, "Unsupported QP type %d\n", attr->qp_type); 26356eb7edffSLeon Romanovsky return -EOPNOTSUPP; 2636b4aaa1f0SMoni Shoua } 2637b4aaa1f0SMoni Shoua 26382242cc25SLeon Romanovsky static int check_valid_flow(struct mlx5_ib_dev *dev, struct ib_pd *pd, 26392242cc25SLeon Romanovsky struct ib_qp_init_attr *attr, 26402242cc25SLeon Romanovsky struct ib_udata *udata) 26412242cc25SLeon Romanovsky { 26422242cc25SLeon Romanovsky struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 26432242cc25SLeon Romanovsky udata, struct mlx5_ib_ucontext, ibucontext); 26442242cc25SLeon Romanovsky 26452242cc25SLeon Romanovsky if (!udata) { 26462242cc25SLeon Romanovsky /* Kernel create_qp callers */ 26472242cc25SLeon Romanovsky if (attr->rwq_ind_tbl) 26482242cc25SLeon Romanovsky return -EOPNOTSUPP; 26492242cc25SLeon Romanovsky 26502242cc25SLeon Romanovsky switch (attr->qp_type) { 26512242cc25SLeon Romanovsky case IB_QPT_RAW_PACKET: 26522242cc25SLeon Romanovsky case IB_QPT_DRIVER: 26532242cc25SLeon Romanovsky return -EOPNOTSUPP; 26542242cc25SLeon Romanovsky default: 26552242cc25SLeon Romanovsky return 0; 26562242cc25SLeon Romanovsky } 26572242cc25SLeon Romanovsky } 26582242cc25SLeon Romanovsky 26592242cc25SLeon Romanovsky /* Userspace create_qp callers */ 26602242cc25SLeon Romanovsky if (attr->qp_type == IB_QPT_RAW_PACKET && !ucontext->cqe_version) { 26612242cc25SLeon Romanovsky mlx5_ib_dbg(dev, 26622242cc25SLeon Romanovsky "Raw Packet QP is only supported for CQE version > 0\n"); 26632242cc25SLeon Romanovsky return -EINVAL; 26642242cc25SLeon Romanovsky } 26652242cc25SLeon Romanovsky 26662242cc25SLeon Romanovsky if (attr->qp_type != IB_QPT_RAW_PACKET && attr->rwq_ind_tbl) { 26672242cc25SLeon Romanovsky mlx5_ib_dbg(dev, 26682242cc25SLeon Romanovsky "Wrong QP type %d for the RWQ indirect table\n", 26692242cc25SLeon Romanovsky attr->qp_type); 26702242cc25SLeon Romanovsky return -EINVAL; 26712242cc25SLeon Romanovsky } 26722242cc25SLeon Romanovsky 26732242cc25SLeon Romanovsky switch (attr->qp_type) { 26742242cc25SLeon Romanovsky case IB_QPT_SMI: 26752242cc25SLeon Romanovsky case MLX5_IB_QPT_HW_GSI: 26762242cc25SLeon Romanovsky case MLX5_IB_QPT_REG_UMR: 26772242cc25SLeon Romanovsky case IB_QPT_GSI: 26782242cc25SLeon Romanovsky mlx5_ib_dbg(dev, "Kernel doesn't support QP type %d\n", 26792242cc25SLeon Romanovsky attr->qp_type); 26802242cc25SLeon Romanovsky return -EINVAL; 26812242cc25SLeon Romanovsky default: 26822242cc25SLeon Romanovsky break; 26832242cc25SLeon Romanovsky } 26842242cc25SLeon Romanovsky 26852242cc25SLeon Romanovsky /* 26862242cc25SLeon Romanovsky * We don't need to see this warning, it means that kernel code 26872242cc25SLeon Romanovsky * missing ib_pd. Placed here to catch developer's mistakes. 26882242cc25SLeon Romanovsky */ 26892242cc25SLeon Romanovsky WARN_ONCE(!pd && attr->qp_type != IB_QPT_XRC_TGT, 26902242cc25SLeon Romanovsky "There is a missing PD pointer assignment\n"); 26912242cc25SLeon Romanovsky return 0; 26922242cc25SLeon Romanovsky } 26932242cc25SLeon Romanovsky 269447c80612SLeon Romanovsky static int create_driver_qp(struct ib_pd *pd, struct mlx5_ib_qp *qp, 269547c80612SLeon Romanovsky struct ib_qp_init_attr *attr, 269647c80612SLeon Romanovsky struct mlx5_ib_create_qp *ucmd, 269747c80612SLeon Romanovsky struct ib_udata *udata) 269847c80612SLeon Romanovsky { 269947c80612SLeon Romanovsky struct mlx5_ib_dev *mdev = to_mdev(pd->device); 270047c80612SLeon Romanovsky int ret = -EINVAL; 270147c80612SLeon Romanovsky 270247c80612SLeon Romanovsky switch (qp->qp_sub_type) { 270347c80612SLeon Romanovsky case MLX5_IB_QPT_DCT: 270447c80612SLeon Romanovsky if (!attr->srq || !attr->recv_cq) 270547c80612SLeon Romanovsky goto out; 270647c80612SLeon Romanovsky 270747c80612SLeon Romanovsky ret = create_dct(pd, qp, attr, ucmd, udata); 270847c80612SLeon Romanovsky break; 270947c80612SLeon Romanovsky case MLX5_IB_QPT_DCI: 271047c80612SLeon Romanovsky ret = create_qp_common(mdev, pd, attr, udata, qp); 271147c80612SLeon Romanovsky break; 271247c80612SLeon Romanovsky default: 271347c80612SLeon Romanovsky return -EINVAL; 271447c80612SLeon Romanovsky } 271547c80612SLeon Romanovsky 271647c80612SLeon Romanovsky out: return ret; 271747c80612SLeon Romanovsky } 271847c80612SLeon Romanovsky 2719b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2720b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2721e126ba97SEli Cohen struct ib_udata *udata) 2722e126ba97SEli Cohen { 272347c80612SLeon Romanovsky struct mlx5_ib_create_qp ucmd = {}; 2724e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2725e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2726e126ba97SEli Cohen u16 xrcdn = 0; 2727e126ba97SEli Cohen int err; 2728b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2729b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2730e126ba97SEli Cohen 27316eb7edffSLeon Romanovsky dev = pd ? to_mdev(pd->device) : 27326eb7edffSLeon Romanovsky to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 27330fb2ed66Smajd@mellanox.com 27346eb7edffSLeon Romanovsky err = check_qp_type(dev, init_attr); 27356eb7edffSLeon Romanovsky if (err) { 27366eb7edffSLeon Romanovsky mlx5_ib_dbg(dev, "Unsupported QP type %d\n", 27376eb7edffSLeon Romanovsky init_attr->qp_type); 27386eb7edffSLeon Romanovsky return ERR_PTR(err); 27396eb7edffSLeon Romanovsky } 27406eb7edffSLeon Romanovsky 27412242cc25SLeon Romanovsky err = check_valid_flow(dev, pd, init_attr, udata); 27422242cc25SLeon Romanovsky if (err) 27432242cc25SLeon Romanovsky return ERR_PTR(err); 2744e126ba97SEli Cohen 27459c2ba4edSLeon Romanovsky if (init_attr->qp_type == IB_QPT_GSI) 27469c2ba4edSLeon Romanovsky return mlx5_ib_gsi_create_qp(pd, init_attr); 27479c2ba4edSLeon Romanovsky 27489c2ba4edSLeon Romanovsky qp = kzalloc(sizeof(*qp), GFP_KERNEL); 27499c2ba4edSLeon Romanovsky if (!qp) 27509c2ba4edSLeon Romanovsky return ERR_PTR(-ENOMEM); 27519c2ba4edSLeon Romanovsky 2752b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2753b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2754b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2755b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2756b4aaa1f0SMoni Shoua if (err) 27579c2ba4edSLeon Romanovsky goto free_qp; 2758c32a4f29SMoni Shoua 2759c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2760c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2761c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2762c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 27639c2ba4edSLeon Romanovsky err = -EINVAL; 27649c2ba4edSLeon Romanovsky goto free_qp; 2765c32a4f29SMoni Shoua } 2766318d2b06SLeon Romanovsky qp->qp_sub_type = MLX5_IB_QPT_DCI; 2767776a3906SMoni Shoua } else { 2768318d2b06SLeon Romanovsky qp->qp_sub_type = MLX5_IB_QPT_DCT; 2769c32a4f29SMoni Shoua } 2770b4aaa1f0SMoni Shoua } 2771b4aaa1f0SMoni Shoua 2772c86936e6SLeon Romanovsky if (init_attr->qp_type == IB_QPT_XRC_TGT) 2773e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 27746eb7edffSLeon Romanovsky 277547c80612SLeon Romanovsky switch (init_attr->qp_type) { 277647c80612SLeon Romanovsky case IB_QPT_DRIVER: 277747c80612SLeon Romanovsky err = create_driver_qp(pd, qp, init_attr, &ucmd, udata); 277847c80612SLeon Romanovsky break; 277947c80612SLeon Romanovsky default: 2780e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 278147c80612SLeon Romanovsky } 2782e126ba97SEli Cohen if (err) { 2783e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 27849c2ba4edSLeon Romanovsky goto free_qp; 2785e126ba97SEli Cohen } 2786e126ba97SEli Cohen 2787e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2788e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2789e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2790e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2791e126ba97SEli Cohen else 279219098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2793e126ba97SEli Cohen 279419098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2795e126ba97SEli Cohen 2796e126ba97SEli Cohen return &qp->ibqp; 27979c2ba4edSLeon Romanovsky 27989c2ba4edSLeon Romanovsky free_qp: 27999c2ba4edSLeon Romanovsky kfree(qp); 28009c2ba4edSLeon Romanovsky return ERR_PTR(err); 2801e126ba97SEli Cohen } 2802e126ba97SEli Cohen 2803776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2804776a3906SMoni Shoua { 2805776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2806776a3906SMoni Shoua 2807776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2808776a3906SMoni Shoua int err; 2809776a3906SMoni Shoua 2810333fbaa0SLeon Romanovsky err = mlx5_core_destroy_dct(dev, &mqp->dct.mdct); 2811776a3906SMoni Shoua if (err) { 2812776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2813776a3906SMoni Shoua return err; 2814776a3906SMoni Shoua } 2815776a3906SMoni Shoua } 2816776a3906SMoni Shoua 2817776a3906SMoni Shoua kfree(mqp->dct.in); 2818776a3906SMoni Shoua kfree(mqp); 2819776a3906SMoni Shoua return 0; 2820776a3906SMoni Shoua } 2821776a3906SMoni Shoua 2822c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata) 2823e126ba97SEli Cohen { 2824e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2825e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2826e126ba97SEli Cohen 2827d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2828d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2829d16e91daSHaggai Eran 2830776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2831776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2832776a3906SMoni Shoua 2833bdeacabdSShamir Rabinovitch destroy_qp_common(dev, mqp, udata); 2834e126ba97SEli Cohen 2835e126ba97SEli Cohen kfree(mqp); 2836e126ba97SEli Cohen 2837e126ba97SEli Cohen return 0; 2838e126ba97SEli Cohen } 2839e126ba97SEli Cohen 2840a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2841a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2842bf3b4f06SBart Van Assche int attr_mask, __be32 *hw_access_flags_be) 2843e126ba97SEli Cohen { 2844e126ba97SEli Cohen u8 dest_rd_atomic; 2845bf3b4f06SBart Van Assche u32 access_flags, hw_access_flags = 0; 2846e126ba97SEli Cohen 2847a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2848a60109dcSYonatan Cohen 2849e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2850e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2851e126ba97SEli Cohen else 285219098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2853e126ba97SEli Cohen 2854e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2855e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2856e126ba97SEli Cohen else 285719098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2858e126ba97SEli Cohen 2859e126ba97SEli Cohen if (!dest_rd_atomic) 2860e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2861e126ba97SEli Cohen 2862e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2863bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RRE; 286413f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 2865a60109dcSYonatan Cohen int atomic_mode; 2866e126ba97SEli Cohen 2867a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2868a60109dcSYonatan Cohen if (atomic_mode < 0) 2869a60109dcSYonatan Cohen return -EOPNOTSUPP; 2870a60109dcSYonatan Cohen 2871bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RAE; 2872bf3b4f06SBart Van Assche hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2873a60109dcSYonatan Cohen } 2874a60109dcSYonatan Cohen 2875a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2876bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RWE; 2877a60109dcSYonatan Cohen 2878bf3b4f06SBart Van Assche *hw_access_flags_be = cpu_to_be32(hw_access_flags); 2879a60109dcSYonatan Cohen 2880a60109dcSYonatan Cohen return 0; 2881e126ba97SEli Cohen } 2882e126ba97SEli Cohen 2883e126ba97SEli Cohen enum { 2884e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2885e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2886e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2887e126ba97SEli Cohen }; 2888e126ba97SEli Cohen 2889e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2890e126ba97SEli Cohen { 28914f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2892e126ba97SEli Cohen return 0; 28934f32ac2eSDanit Goldberg 2894a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 2895e126ba97SEli Cohen return -EINVAL; 28964f32ac2eSDanit Goldberg 28974f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2898e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2899938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2900e126ba97SEli Cohen --rate; 2901e126ba97SEli Cohen 29024f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2903e126ba97SEli Cohen } 2904e126ba97SEli Cohen 290575850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 29061cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 29071cd6dbd3SYishai Hadas struct ib_pd *pd) 290875850d0bSmajd@mellanox.com { 290975850d0bSmajd@mellanox.com void *in; 291075850d0bSmajd@mellanox.com void *tisc; 291175850d0bSmajd@mellanox.com int inlen; 291275850d0bSmajd@mellanox.com int err; 291375850d0bSmajd@mellanox.com 291475850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 29151b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 291675850d0bSmajd@mellanox.com if (!in) 291775850d0bSmajd@mellanox.com return -ENOMEM; 291875850d0bSmajd@mellanox.com 291975850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 29201cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 292175850d0bSmajd@mellanox.com 292275850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 292375850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 292475850d0bSmajd@mellanox.com 2925e0b4b472SLeon Romanovsky err = mlx5_core_modify_tis(dev, sq->tisn, in); 292675850d0bSmajd@mellanox.com 292775850d0bSmajd@mellanox.com kvfree(in); 292875850d0bSmajd@mellanox.com 292975850d0bSmajd@mellanox.com return err; 293075850d0bSmajd@mellanox.com } 293175850d0bSmajd@mellanox.com 293213eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 29331cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 29341cd6dbd3SYishai Hadas struct ib_pd *pd) 293513eab21fSAviv Heller { 293613eab21fSAviv Heller void *in; 293713eab21fSAviv Heller void *tisc; 293813eab21fSAviv Heller int inlen; 293913eab21fSAviv Heller int err; 294013eab21fSAviv Heller 294113eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 29421b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 294313eab21fSAviv Heller if (!in) 294413eab21fSAviv Heller return -ENOMEM; 294513eab21fSAviv Heller 294613eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 29471cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 294813eab21fSAviv Heller 294913eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 295013eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 295113eab21fSAviv Heller 2952e0b4b472SLeon Romanovsky err = mlx5_core_modify_tis(dev, sq->tisn, in); 295313eab21fSAviv Heller 295413eab21fSAviv Heller kvfree(in); 295513eab21fSAviv Heller 295613eab21fSAviv Heller return err; 295713eab21fSAviv Heller } 295813eab21fSAviv Heller 295975850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 296090898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2961e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2962f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2963f879ee8dSAchiad Shochat bool alt) 2964e126ba97SEli Cohen { 2965d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2966e126ba97SEli Cohen int err; 2967ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2968d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2969d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2970e126ba97SEli Cohen 2971e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2972f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2973f879ee8dSAchiad Shochat attr->pkey_index); 2974e126ba97SEli Cohen 2975d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2976d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2977938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2978f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2979d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2980938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2981f83b4263SEli Cohen return -EINVAL; 2982f83b4263SEli Cohen } 29832811ba51SAchiad Shochat } 298444c58487SDasaratharaman Chandramouli 298544c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2986d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 29872811ba51SAchiad Shochat return -EINVAL; 298847ec3866SParav Pandit 298944c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 29902b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 29912b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 29922b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 29932b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 299447ec3866SParav Pandit path->udp_sport = 299547ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2996d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 299747ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2998ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2999d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 30002811ba51SAchiad Shochat } else { 3001d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 3002d3ae2bdeSNoa Osherovich path->fl_free_ar |= 3003d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 3004d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 3005d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 3006d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 3007e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 3008d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 30092811ba51SAchiad Shochat } 30102811ba51SAchiad Shochat 3011d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 3012d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 3013d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 3014e126ba97SEli Cohen path->tclass_flowlabel = 3015d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 3016d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 3017d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 3018e126ba97SEli Cohen } 3019e126ba97SEli Cohen 3020d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 3021e126ba97SEli Cohen if (err < 0) 3022e126ba97SEli Cohen return err; 3023e126ba97SEli Cohen path->static_rate = err; 3024e126ba97SEli Cohen path->port = port; 3025e126ba97SEli Cohen 3026e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3027f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 3028e126ba97SEli Cohen 302975850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 303075850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 303175850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 30321cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 303375850d0bSmajd@mellanox.com 3034e126ba97SEli Cohen return 0; 3035e126ba97SEli Cohen } 3036e126ba97SEli Cohen 3037e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 3038e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 3039e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 3040e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3041e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3042e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3043e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 3044e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 3045e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3046e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 3047e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 3048e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3049e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 3050e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 30518f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 30528f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30538f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30548f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PKEY_INDEX | 30558f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PRI_PORT, 3056e126ba97SEli Cohen }, 3057e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3058e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3059e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3060e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3061e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3062e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3063e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3064e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3065e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3066e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3067e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3068e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 3069e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3070a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3071a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 3072a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3073a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3074a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3075e126ba97SEli Cohen }, 3076e126ba97SEli Cohen }, 3077e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3078e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3079e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3080e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3081e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3082e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3083e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3084e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 3085e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3086e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3087e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 3088e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 30898f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 30908f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE | 30918f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30928f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30938f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 30948f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT, 3095e126ba97SEli Cohen }, 3096e126ba97SEli Cohen }, 3097e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3098e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3099e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3100e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3101e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3102e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 3103c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3104c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3105e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3106c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3107c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3108e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 3109e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 3110e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 31118f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 31128f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 31138f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 31148f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT | 31158f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 31168f4426aaSJack Morgenstein MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3117e126ba97SEli Cohen }, 3118e126ba97SEli Cohen }, 3119e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 3120e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3121e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3122e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 312375959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 3124a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 3125a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3126a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3127a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 31288f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 31298f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 31308f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 31318f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE, 3132e126ba97SEli Cohen }, 3133e126ba97SEli Cohen }, 3134e126ba97SEli Cohen }; 3135e126ba97SEli Cohen 3136e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 3137e126ba97SEli Cohen { 3138e126ba97SEli Cohen switch (ib_mask) { 3139e126ba97SEli Cohen case IB_QP_STATE: 3140e126ba97SEli Cohen return 0; 3141e126ba97SEli Cohen case IB_QP_CUR_STATE: 3142e126ba97SEli Cohen return 0; 3143e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 3144e126ba97SEli Cohen return 0; 3145e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 3146e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 3147e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 3148e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 3149e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 3150e126ba97SEli Cohen case IB_QP_PORT: 3151e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 3152e126ba97SEli Cohen case IB_QP_QKEY: 3153e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 3154e126ba97SEli Cohen case IB_QP_AV: 3155e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 3156e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 3157e126ba97SEli Cohen case IB_QP_PATH_MTU: 3158e126ba97SEli Cohen return 0; 3159e126ba97SEli Cohen case IB_QP_TIMEOUT: 3160e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 3161e126ba97SEli Cohen case IB_QP_RETRY_CNT: 3162e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 3163e126ba97SEli Cohen case IB_QP_RNR_RETRY: 3164e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 3165e126ba97SEli Cohen case IB_QP_RQ_PSN: 3166e126ba97SEli Cohen return 0; 3167e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 3168e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 3169e126ba97SEli Cohen case IB_QP_ALT_PATH: 3170e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 3171e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 3172e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 3173e126ba97SEli Cohen case IB_QP_SQ_PSN: 3174e126ba97SEli Cohen return 0; 3175e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 3176e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 3177e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 3178e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 3179e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 3180e126ba97SEli Cohen case IB_QP_CAP: 3181e126ba97SEli Cohen return 0; 3182e126ba97SEli Cohen case IB_QP_DEST_QPN: 3183e126ba97SEli Cohen return 0; 3184e126ba97SEli Cohen } 3185e126ba97SEli Cohen return 0; 3186e126ba97SEli Cohen } 3187e126ba97SEli Cohen 3188e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 3189e126ba97SEli Cohen { 3190e126ba97SEli Cohen int result = 0; 3191e126ba97SEli Cohen int i; 3192e126ba97SEli Cohen 3193e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 3194e126ba97SEli Cohen if ((1 << i) & ib_mask) 3195e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 3196e126ba97SEli Cohen } 3197e126ba97SEli Cohen 3198e126ba97SEli Cohen return result; 3199e126ba97SEli Cohen } 3200e126ba97SEli Cohen 320134d57585SYishai Hadas static int modify_raw_packet_qp_rq( 320234d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 320334d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3204ad5f8e96Smajd@mellanox.com { 3205ad5f8e96Smajd@mellanox.com void *in; 3206ad5f8e96Smajd@mellanox.com void *rqc; 3207ad5f8e96Smajd@mellanox.com int inlen; 3208ad5f8e96Smajd@mellanox.com int err; 3209ad5f8e96Smajd@mellanox.com 3210ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 32111b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3212ad5f8e96Smajd@mellanox.com if (!in) 3213ad5f8e96Smajd@mellanox.com return -ENOMEM; 3214ad5f8e96Smajd@mellanox.com 3215ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 321634d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3217ad5f8e96Smajd@mellanox.com 3218ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3219ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3220ad5f8e96Smajd@mellanox.com 3221eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3222eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3223eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 322423a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3225eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3226eb49ab0cSAlex Vesker } else 32275a738b5dSJason Gunthorpe dev_info_once( 32285a738b5dSJason Gunthorpe &dev->ib_dev.dev, 32295a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3230eb49ab0cSAlex Vesker } 3231eb49ab0cSAlex Vesker 3232e0b4b472SLeon Romanovsky err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in); 3233ad5f8e96Smajd@mellanox.com if (err) 3234ad5f8e96Smajd@mellanox.com goto out; 3235ad5f8e96Smajd@mellanox.com 3236ad5f8e96Smajd@mellanox.com rq->state = new_state; 3237ad5f8e96Smajd@mellanox.com 3238ad5f8e96Smajd@mellanox.com out: 3239ad5f8e96Smajd@mellanox.com kvfree(in); 3240ad5f8e96Smajd@mellanox.com return err; 3241ad5f8e96Smajd@mellanox.com } 3242ad5f8e96Smajd@mellanox.com 3243c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3244c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3245c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3246ad5f8e96Smajd@mellanox.com { 32477d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 324861147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 324961147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 325061147f39SBodong Wang bool new_rate_added = false; 32517d29f349SBodong Wang u16 rl_index = 0; 3252ad5f8e96Smajd@mellanox.com void *in; 3253ad5f8e96Smajd@mellanox.com void *sqc; 3254ad5f8e96Smajd@mellanox.com int inlen; 3255ad5f8e96Smajd@mellanox.com int err; 3256ad5f8e96Smajd@mellanox.com 3257ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 32581b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3259ad5f8e96Smajd@mellanox.com if (!in) 3260ad5f8e96Smajd@mellanox.com return -ENOMEM; 3261ad5f8e96Smajd@mellanox.com 3262c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3263ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3264ad5f8e96Smajd@mellanox.com 3265ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3266ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3267ad5f8e96Smajd@mellanox.com 32687d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 32697d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 32707d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 32717d29f349SBodong Wang __func__); 32727d29f349SBodong Wang else 327361147f39SBodong Wang new_rl = raw_qp_param->rl; 32747d29f349SBodong Wang } 3275ad5f8e96Smajd@mellanox.com 327661147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 327761147f39SBodong Wang if (new_rl.rate) { 327861147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 32797d29f349SBodong Wang if (err) { 328061147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 328161147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 328261147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 328361147f39SBodong Wang new_rl.typical_pkt_sz); 328461147f39SBodong Wang 32857d29f349SBodong Wang goto out; 32867d29f349SBodong Wang } 328761147f39SBodong Wang new_rate_added = true; 32887d29f349SBodong Wang } 32897d29f349SBodong Wang 32907d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 329161147f39SBodong Wang /* index 0 means no limit */ 32927d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 32937d29f349SBodong Wang } 32947d29f349SBodong Wang 3295e0b4b472SLeon Romanovsky err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in); 32967d29f349SBodong Wang if (err) { 32977d29f349SBodong Wang /* Remove new rate from table if failed */ 329861147f39SBodong Wang if (new_rate_added) 329961147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 33007d29f349SBodong Wang goto out; 33017d29f349SBodong Wang } 33027d29f349SBodong Wang 33037d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 3304c8973df2SRafi Wiener if ((old_rl.rate && !mlx5_rl_are_equal(&old_rl, &new_rl)) || 3305c8973df2SRafi Wiener (new_state != MLX5_SQC_STATE_RDY)) { 330661147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 3307c8973df2SRafi Wiener if (new_state != MLX5_SQC_STATE_RDY) 3308c8973df2SRafi Wiener memset(&new_rl, 0, sizeof(new_rl)); 3309c8973df2SRafi Wiener } 33107d29f349SBodong Wang 331161147f39SBodong Wang ibqp->rl = new_rl; 3312ad5f8e96Smajd@mellanox.com sq->state = new_state; 3313ad5f8e96Smajd@mellanox.com 3314ad5f8e96Smajd@mellanox.com out: 3315ad5f8e96Smajd@mellanox.com kvfree(in); 3316ad5f8e96Smajd@mellanox.com return err; 3317ad5f8e96Smajd@mellanox.com } 3318ad5f8e96Smajd@mellanox.com 3319ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 332013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 332113eab21fSAviv Heller u8 tx_affinity) 3322ad5f8e96Smajd@mellanox.com { 3323ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3324ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3325ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 33267d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 33277d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3328ad5f8e96Smajd@mellanox.com int rq_state; 3329ad5f8e96Smajd@mellanox.com int sq_state; 3330ad5f8e96Smajd@mellanox.com int err; 3331ad5f8e96Smajd@mellanox.com 33320680efa2SAlex Vesker switch (raw_qp_param->operation) { 3333ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3334ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3335ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3336ad5f8e96Smajd@mellanox.com break; 3337ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3338ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3339ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3340ad5f8e96Smajd@mellanox.com break; 3341ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3342ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3343ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3344ad5f8e96Smajd@mellanox.com break; 3345ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3346ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 33477d29f349SBodong Wang if (raw_qp_param->set_mask == 33487d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 33497d29f349SBodong Wang modify_rq = 0; 33507d29f349SBodong Wang sq_state = sq->state; 33517d29f349SBodong Wang } else { 33527d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 33537d29f349SBodong Wang } 33547d29f349SBodong Wang break; 33557d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 33567d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3357eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3358eb49ab0cSAlex Vesker return -EINVAL; 3359eb49ab0cSAlex Vesker else 3360ad5f8e96Smajd@mellanox.com return 0; 3361ad5f8e96Smajd@mellanox.com default: 3362ad5f8e96Smajd@mellanox.com WARN_ON(1); 3363ad5f8e96Smajd@mellanox.com return -EINVAL; 3364ad5f8e96Smajd@mellanox.com } 3365ad5f8e96Smajd@mellanox.com 33667d29f349SBodong Wang if (modify_rq) { 336734d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 336834d57585SYishai Hadas qp->ibqp.pd); 3369ad5f8e96Smajd@mellanox.com if (err) 3370ad5f8e96Smajd@mellanox.com return err; 3371ad5f8e96Smajd@mellanox.com } 3372ad5f8e96Smajd@mellanox.com 33737d29f349SBodong Wang if (modify_sq) { 3374d5ed8ac3SMark Bloch struct mlx5_flow_handle *flow_rule; 3375d5ed8ac3SMark Bloch 337613eab21fSAviv Heller if (tx_affinity) { 337713eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 33781cd6dbd3SYishai Hadas tx_affinity, 33791cd6dbd3SYishai Hadas qp->ibqp.pd); 338013eab21fSAviv Heller if (err) 338113eab21fSAviv Heller return err; 338213eab21fSAviv Heller } 338313eab21fSAviv Heller 3384d5ed8ac3SMark Bloch flow_rule = create_flow_rule_vport_sq(dev, sq, 3385d5ed8ac3SMark Bloch raw_qp_param->port); 3386d5ed8ac3SMark Bloch if (IS_ERR(flow_rule)) 33871db86318SColin Ian King return PTR_ERR(flow_rule); 3388d5ed8ac3SMark Bloch 3389d5ed8ac3SMark Bloch err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3390c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 3391d5ed8ac3SMark Bloch if (err) { 3392d5ed8ac3SMark Bloch if (flow_rule) 3393d5ed8ac3SMark Bloch mlx5_del_flow_rules(flow_rule); 3394d5ed8ac3SMark Bloch return err; 3395d5ed8ac3SMark Bloch } 3396d5ed8ac3SMark Bloch 3397d5ed8ac3SMark Bloch if (flow_rule) { 3398d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 3399d5ed8ac3SMark Bloch sq->flow_rule = flow_rule; 3400d5ed8ac3SMark Bloch } 3401d5ed8ac3SMark Bloch 3402d5ed8ac3SMark Bloch return err; 340313eab21fSAviv Heller } 3404ad5f8e96Smajd@mellanox.com 3405ad5f8e96Smajd@mellanox.com return 0; 3406ad5f8e96Smajd@mellanox.com } 3407ad5f8e96Smajd@mellanox.com 3408c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3409c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3410c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 341189944450SShamir Rabinovitch u8 port_num, struct ib_udata *udata) 3412c6a21c38SMajd Dibbiny { 341389944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 341489944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 3415c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3416c6a21c38SMajd Dibbiny 3417c6a21c38SMajd Dibbiny if (ucontext) { 3418c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3419c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3420c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3421c6a21c38SMajd Dibbiny 1; 3422c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3423c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3424c6a21c38SMajd Dibbiny } else { 3425c6a21c38SMajd Dibbiny tx_port_affinity = 3426c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 342795579e78SMark Bloch 1, &dev->port[port_num].roce.tx_port_affinity) % 3428c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3429c6a21c38SMajd Dibbiny 1; 3430c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3431c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3432c6a21c38SMajd Dibbiny } 3433c6a21c38SMajd Dibbiny 3434c6a21c38SMajd Dibbiny return tx_port_affinity; 3435c6a21c38SMajd Dibbiny } 3436c6a21c38SMajd Dibbiny 3437d14133ddSMark Zhang static int __mlx5_ib_qp_set_counter(struct ib_qp *qp, 3438d14133ddSMark Zhang struct rdma_counter *counter) 3439d14133ddSMark Zhang { 3440d14133ddSMark Zhang struct mlx5_ib_dev *dev = to_mdev(qp->device); 3441d14133ddSMark Zhang struct mlx5_ib_qp *mqp = to_mqp(qp); 3442d14133ddSMark Zhang struct mlx5_qp_context context = {}; 3443d14133ddSMark Zhang struct mlx5_ib_qp_base *base; 3444d14133ddSMark Zhang u32 set_id; 3445d14133ddSMark Zhang 34463e1f000fSParav Pandit if (counter) 3447d14133ddSMark Zhang set_id = counter->id; 34483e1f000fSParav Pandit else 34493e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, mqp->port - 1); 3450d14133ddSMark Zhang 3451d14133ddSMark Zhang base = &mqp->trans_qp.base; 3452d14133ddSMark Zhang context.qp_counter_set_usr_page &= cpu_to_be32(0xffffff); 3453d14133ddSMark Zhang context.qp_counter_set_usr_page |= cpu_to_be32(set_id << 24); 3454333fbaa0SLeon Romanovsky return mlx5_core_qp_modify(dev, MLX5_CMD_OP_RTS2RTS_QP, 3455333fbaa0SLeon Romanovsky MLX5_QP_OPTPAR_COUNTER_SET_ID, &context, 3456333fbaa0SLeon Romanovsky &base->mqp); 3457d14133ddSMark Zhang } 3458d14133ddSMark Zhang 3459e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3460e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 346189944450SShamir Rabinovitch enum ib_qp_state cur_state, 346289944450SShamir Rabinovitch enum ib_qp_state new_state, 346389944450SShamir Rabinovitch const struct mlx5_ib_modify_qp *ucmd, 346489944450SShamir Rabinovitch struct ib_udata *udata) 3465e126ba97SEli Cohen { 3466427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3467427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3468427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3469427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3470427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3471427c1e7bSmajd@mellanox.com }, 3472427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3473427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3474427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3475427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3476427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3477427c1e7bSmajd@mellanox.com }, 3478427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3479427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3480427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3481427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3482427c1e7bSmajd@mellanox.com }, 3483427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3484427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3485427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3486427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3487427c1e7bSmajd@mellanox.com }, 3488427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3489427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3490427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3491427c1e7bSmajd@mellanox.com }, 3492427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3493427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3494427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3495427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3496427c1e7bSmajd@mellanox.com }, 3497427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3498427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3499427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3500427c1e7bSmajd@mellanox.com } 3501427c1e7bSmajd@mellanox.com }; 3502427c1e7bSmajd@mellanox.com 3503e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3504e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 350519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3506e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3507e126ba97SEli Cohen struct mlx5_qp_context *context; 3508e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3509e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3510e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3511d14133ddSMark Zhang u32 set_id = 0; 3512e126ba97SEli Cohen int mlx5_st; 3513e126ba97SEli Cohen int err; 3514427c1e7bSmajd@mellanox.com u16 op; 351513eab21fSAviv Heller u8 tx_affinity = 0; 3516e126ba97SEli Cohen 351755de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 351855de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 351955de9a77SLeon Romanovsky if (mlx5_st < 0) 352055de9a77SLeon Romanovsky return -EINVAL; 352155de9a77SLeon Romanovsky 35221a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 35231a412fb1SSaeed Mahameed if (!context) 3524e126ba97SEli Cohen return -ENOMEM; 3525e126ba97SEli Cohen 3526c6a21c38SMajd Dibbiny pd = get_pd(qp); 352755de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3528e126ba97SEli Cohen 3529e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3530e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3531e126ba97SEli Cohen } else { 3532e126ba97SEli Cohen switch (attr->path_mig_state) { 3533e126ba97SEli Cohen case IB_MIG_MIGRATED: 3534e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3535e126ba97SEli Cohen break; 3536e126ba97SEli Cohen case IB_MIG_REARM: 3537e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3538e126ba97SEli Cohen break; 3539e126ba97SEli Cohen case IB_MIG_ARMED: 3540e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3541e126ba97SEli Cohen break; 3542e126ba97SEli Cohen } 3543e126ba97SEli Cohen } 3544e126ba97SEli Cohen 354513eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 354613eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 354713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 354813eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 354913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 355013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 355113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 355213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 35537c34ec19SAviv Heller if (dev->lag_active) { 355495579e78SMark Bloch u8 p = mlx5_core_native_port_num(dev->mdev) - 1; 355589944450SShamir Rabinovitch tx_affinity = get_tx_affinity(dev, pd, base, p, 355689944450SShamir Rabinovitch udata); 355713eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 355813eab21fSAviv Heller } 355913eab21fSAviv Heller } 356013eab21fSAviv Heller } 356113eab21fSAviv Heller 3562d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3563e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3564c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3565c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3566e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3567e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3568e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3569e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3570e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3571e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3572e126ba97SEli Cohen err = -EINVAL; 3573e126ba97SEli Cohen goto out; 3574e126ba97SEli Cohen } 3575938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3576938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3577e126ba97SEli Cohen } 3578e126ba97SEli Cohen 3579e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3580e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3581e126ba97SEli Cohen 3582e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3583d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3584e126ba97SEli Cohen 3585e126ba97SEli Cohen /* todo implement counter_index functionality */ 3586e126ba97SEli Cohen 3587e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3588e126ba97SEli Cohen context->pri_path.port = qp->port; 3589e126ba97SEli Cohen 3590e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3591e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3592e126ba97SEli Cohen 3593e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 359475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3595e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3596f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3597e126ba97SEli Cohen if (err) 3598e126ba97SEli Cohen goto out; 3599e126ba97SEli Cohen } 3600e126ba97SEli Cohen 3601e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3602e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3603e126ba97SEli Cohen 3604e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 360575850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 360675850d0bSmajd@mellanox.com &context->alt_path, 3607f879ee8dSAchiad Shochat attr->alt_port_num, 3608f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3609f879ee8dSAchiad Shochat 0, attr, true); 3610e126ba97SEli Cohen if (err) 3611e126ba97SEli Cohen goto out; 3612e126ba97SEli Cohen } 3613e126ba97SEli Cohen 361489ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 361589ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3616e126ba97SEli Cohen 3617e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3618e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3619e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3620e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3621e126ba97SEli Cohen 3622e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3623e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3624e126ba97SEli Cohen 3625e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3626e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3627e126ba97SEli Cohen 3628e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3629e126ba97SEli Cohen if (attr->max_rd_atomic) 3630e126ba97SEli Cohen context->params1 |= 3631e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3632e126ba97SEli Cohen } 3633e126ba97SEli Cohen 3634e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3635e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3636e126ba97SEli Cohen 3637e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3638e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3639e126ba97SEli Cohen context->params2 |= 3640e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3641e126ba97SEli Cohen } 3642e126ba97SEli Cohen 3643a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3644bf3b4f06SBart Van Assche __be32 access_flags; 3645a60109dcSYonatan Cohen 3646a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3647a60109dcSYonatan Cohen if (err) 3648a60109dcSYonatan Cohen goto out; 3649a60109dcSYonatan Cohen 3650a60109dcSYonatan Cohen context->params2 |= access_flags; 3651a60109dcSYonatan Cohen } 3652e126ba97SEli Cohen 3653e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3654e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3655e126ba97SEli Cohen 3656e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3657e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3658e126ba97SEli Cohen 3659e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3660e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3661e126ba97SEli Cohen 3662e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3663e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3664e126ba97SEli Cohen 36650837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 36660837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 36670837e86aSMark Bloch qp->port) - 1; 3668c2e53b2cSYishai Hadas 3669c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3670c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3671c2e53b2cSYishai Hadas port_num = 0; 3672c2e53b2cSYishai Hadas 3673d14133ddSMark Zhang if (ibqp->counter) 3674d14133ddSMark Zhang set_id = ibqp->counter->id; 3675d14133ddSMark Zhang else 36763e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, port_num); 36770837e86aSMark Bloch context->qp_counter_set_usr_page |= 3678d14133ddSMark Zhang cpu_to_be32(set_id << 24); 36790837e86aSMark Bloch } 36800837e86aSMark Bloch 3681e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3682e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3683e126ba97SEli Cohen 3684b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3685b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3686e126ba97SEli Cohen 3687e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3688e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3689e126ba97SEli Cohen 3690427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 36915d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 36925d414b17SDan Carpenter err = -EINVAL; 3693427c1e7bSmajd@mellanox.com goto out; 36945d414b17SDan Carpenter } 3695427c1e7bSmajd@mellanox.com 3696427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3697e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3698e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3699ad5f8e96Smajd@mellanox.com 3700c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3701c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 37020680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 37030680efa2SAlex Vesker 37040680efa2SAlex Vesker raw_qp_param.operation = op; 3705eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3706d14133ddSMark Zhang raw_qp_param.rq_q_ctr_id = set_id; 3707eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3708eb49ab0cSAlex Vesker } 37097d29f349SBodong Wang 3710d5ed8ac3SMark Bloch if (attr_mask & IB_QP_PORT) 3711d5ed8ac3SMark Bloch raw_qp_param.port = attr->port_num; 3712d5ed8ac3SMark Bloch 37137d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 371461147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 371561147f39SBodong Wang 371661147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 371761147f39SBodong Wang if (attr->rate_limit && 371861147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 371961147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 372061147f39SBodong Wang ucmd->burst_info.max_burst_sz; 372161147f39SBodong Wang } else { 372261147f39SBodong Wang err = -EINVAL; 372361147f39SBodong Wang goto out; 372461147f39SBodong Wang } 372561147f39SBodong Wang } 372661147f39SBodong Wang 372761147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 372861147f39SBodong Wang if (attr->rate_limit && 372961147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 373061147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 373161147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 373261147f39SBodong Wang } else { 373361147f39SBodong Wang err = -EINVAL; 373461147f39SBodong Wang goto out; 373561147f39SBodong Wang } 373661147f39SBodong Wang } 373761147f39SBodong Wang 37387d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 37397d29f349SBodong Wang } 37407d29f349SBodong Wang 374113eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 37420680efa2SAlex Vesker } else { 3743333fbaa0SLeon Romanovsky err = mlx5_core_qp_modify(dev, op, optpar, context, &base->mqp); 37440680efa2SAlex Vesker } 37450680efa2SAlex Vesker 3746e126ba97SEli Cohen if (err) 3747e126ba97SEli Cohen goto out; 3748e126ba97SEli Cohen 3749e126ba97SEli Cohen qp->state = new_state; 3750e126ba97SEli Cohen 3751e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 375219098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3753e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 375419098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3755e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3756e126ba97SEli Cohen qp->port = attr->port_num; 3757e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 375819098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3759e126ba97SEli Cohen 3760e126ba97SEli Cohen /* 3761e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3762e126ba97SEli Cohen * entries and reinitialize the QP. 3763e126ba97SEli Cohen */ 376475a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 376575a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 376619098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3767e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3768e126ba97SEli Cohen if (send_cq != recv_cq) 376919098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3770e126ba97SEli Cohen 3771e126ba97SEli Cohen qp->rq.head = 0; 3772e126ba97SEli Cohen qp->rq.tail = 0; 3773e126ba97SEli Cohen qp->sq.head = 0; 3774e126ba97SEli Cohen qp->sq.tail = 0; 3775e126ba97SEli Cohen qp->sq.cur_post = 0; 377634f4c955SGuy Levi if (qp->sq.wqe_cnt) 377734f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3778950bf4f1SLeon Romanovsky qp->sq.last_poll = 0; 3779e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3780e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3781e126ba97SEli Cohen } 3782e126ba97SEli Cohen 3783d14133ddSMark Zhang if ((new_state == IB_QPS_RTS) && qp->counter_pending) { 3784d14133ddSMark Zhang err = __mlx5_ib_qp_set_counter(ibqp, ibqp->counter); 3785d14133ddSMark Zhang if (!err) 3786d14133ddSMark Zhang qp->counter_pending = 0; 3787d14133ddSMark Zhang } 3788d14133ddSMark Zhang 3789e126ba97SEli Cohen out: 37901a412fb1SSaeed Mahameed kfree(context); 3791e126ba97SEli Cohen return err; 3792e126ba97SEli Cohen } 3793e126ba97SEli Cohen 3794c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3795c32a4f29SMoni Shoua { 3796c32a4f29SMoni Shoua if ((mask & req) != req) 3797c32a4f29SMoni Shoua return false; 3798c32a4f29SMoni Shoua 3799c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3800c32a4f29SMoni Shoua return false; 3801c32a4f29SMoni Shoua 3802c32a4f29SMoni Shoua return true; 3803c32a4f29SMoni Shoua } 3804c32a4f29SMoni Shoua 3805c32a4f29SMoni Shoua /* check valid transition for driver QP types 3806c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3807c32a4f29SMoni Shoua */ 3808c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3809c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3810c32a4f29SMoni Shoua { 3811c32a4f29SMoni Shoua int req = IB_QP_STATE; 3812c32a4f29SMoni Shoua int opt = 0; 3813c32a4f29SMoni Shoua 381499ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 381599ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 381699ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3817c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3818c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3819c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3820c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3821c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3822c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3823c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 38245ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3825c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3826c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3827c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3828c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3829c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3830c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3831c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3832c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3833c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3834c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3835c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3836c32a4f29SMoni Shoua } 3837c32a4f29SMoni Shoua return false; 3838c32a4f29SMoni Shoua } 3839c32a4f29SMoni Shoua 3840776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3841776a3906SMoni Shoua * valid transitions are: 3842776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3843776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3844776a3906SMoni Shoua * mtu, gid_index and hop_limit 3845776a3906SMoni Shoua * Other transitions and attributes are illegal 3846776a3906SMoni Shoua */ 3847776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3848776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3849776a3906SMoni Shoua { 3850776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3851776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3852776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3853776a3906SMoni Shoua int err = 0; 3854776a3906SMoni Shoua int required = IB_QP_STATE; 3855776a3906SMoni Shoua void *dctc; 3856776a3906SMoni Shoua 3857776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3858776a3906SMoni Shoua return -EINVAL; 3859776a3906SMoni Shoua 3860776a3906SMoni Shoua cur_state = qp->state; 3861776a3906SMoni Shoua new_state = attr->qp_state; 3862776a3906SMoni Shoua 3863776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3864776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 38653e1f000fSParav Pandit u16 set_id; 38663e1f000fSParav Pandit 3867776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3868776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3869776a3906SMoni Shoua return -EINVAL; 3870776a3906SMoni Shoua 3871776a3906SMoni Shoua if (attr->port_num == 0 || 3872776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3873776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3874776a3906SMoni Shoua attr->port_num, dev->num_ports); 3875776a3906SMoni Shoua return -EINVAL; 3876776a3906SMoni Shoua } 3877776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3878776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3879776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3880776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3881776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3882a60109dcSYonatan Cohen int atomic_mode; 3883a60109dcSYonatan Cohen 3884a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3885a60109dcSYonatan Cohen if (atomic_mode < 0) 3886776a3906SMoni Shoua return -EOPNOTSUPP; 3887a60109dcSYonatan Cohen 3888a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3889776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3890776a3906SMoni Shoua } 3891776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3892776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 38933e1f000fSParav Pandit 38943e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, attr->port_num - 1); 38953e1f000fSParav Pandit MLX5_SET(dctc, dctc, counter_set_id, set_id); 3896776a3906SMoni Shoua 3897776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3898776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3899c5ae1954SYishai Hadas u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; 3900776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3901776a3906SMoni Shoua sizeof(resp.dctn); 3902776a3906SMoni Shoua 3903776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3904776a3906SMoni Shoua return -EINVAL; 3905776a3906SMoni Shoua resp.response_length = min_resp_len; 3906776a3906SMoni Shoua 3907776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3908776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3909776a3906SMoni Shoua return -EINVAL; 3910776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3911776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3912776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3913776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3914776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3915776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3916776a3906SMoni Shoua 3917333fbaa0SLeon Romanovsky err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in, 3918c5ae1954SYishai Hadas MLX5_ST_SZ_BYTES(create_dct_in), out, 3919c5ae1954SYishai Hadas sizeof(out)); 3920776a3906SMoni Shoua if (err) 3921776a3906SMoni Shoua return err; 3922776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3923776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3924776a3906SMoni Shoua if (err) { 3925333fbaa0SLeon Romanovsky mlx5_core_destroy_dct(dev, &qp->dct.mdct); 3926776a3906SMoni Shoua return err; 3927776a3906SMoni Shoua } 3928776a3906SMoni Shoua } else { 3929776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3930776a3906SMoni Shoua return -EINVAL; 3931776a3906SMoni Shoua } 3932776a3906SMoni Shoua if (err) 3933776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3934776a3906SMoni Shoua else 3935776a3906SMoni Shoua qp->state = new_state; 3936776a3906SMoni Shoua return err; 3937776a3906SMoni Shoua } 3938776a3906SMoni Shoua 3939e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3940e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3941e126ba97SEli Cohen { 3942e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3943e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 394461147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3945d16e91daSHaggai Eran enum ib_qp_type qp_type; 3946e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 394761147f39SBodong Wang size_t required_cmd_sz; 3948e126ba97SEli Cohen int err = -EINVAL; 3949e126ba97SEli Cohen int port; 3950e126ba97SEli Cohen 395128d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 395228d61370SYishai Hadas return -ENOSYS; 395328d61370SYishai Hadas 395461147f39SBodong Wang if (udata && udata->inlen) { 395561147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 395661147f39SBodong Wang sizeof(ucmd.reserved); 395761147f39SBodong Wang if (udata->inlen < required_cmd_sz) 395861147f39SBodong Wang return -EINVAL; 395961147f39SBodong Wang 396061147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 396161147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 396261147f39SBodong Wang udata->inlen - sizeof(ucmd))) 396361147f39SBodong Wang return -EOPNOTSUPP; 396461147f39SBodong Wang 396561147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 396661147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 396761147f39SBodong Wang return -EFAULT; 396861147f39SBodong Wang 396961147f39SBodong Wang if (ucmd.comp_mask || 397061147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 397161147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 397261147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 397361147f39SBodong Wang return -EOPNOTSUPP; 397461147f39SBodong Wang } 397561147f39SBodong Wang 3976d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3977d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3978d16e91daSHaggai Eran 3979c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3980c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3981c32a4f29SMoni Shoua else 3982d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3983d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3984d16e91daSHaggai Eran 3985776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3986776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3987c32a4f29SMoni Shoua 3988e126ba97SEli Cohen mutex_lock(&qp->mutex); 3989e126ba97SEli Cohen 3990e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3991e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3992e126ba97SEli Cohen 39932811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 39942811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 39952811ba51SAchiad Shochat } 39962811ba51SAchiad Shochat 3997c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3998c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3999c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 4000c2e53b2cSYishai Hadas attr_mask); 4001c2e53b2cSYishai Hadas goto out; 4002c2e53b2cSYishai Hadas } 4003c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 4004c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 4005d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 4006d31131bbSKamal Heib attr_mask)) { 4007158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 4008158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 4009e126ba97SEli Cohen goto out; 4010c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 4011c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 4012c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 4013c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 4014c32a4f29SMoni Shoua goto out; 4015158abf86SHaggai Eran } 4016e126ba97SEli Cohen 4017e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 4018938fe83cSSaeed Mahameed (attr->port_num == 0 || 4019508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 4020158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 4021158abf86SHaggai Eran attr->port_num, dev->num_ports); 4022e126ba97SEli Cohen goto out; 4023158abf86SHaggai Eran } 4024e126ba97SEli Cohen 4025e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 4026e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 4027938fe83cSSaeed Mahameed if (attr->pkey_index >= 4028158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 4029158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 4030158abf86SHaggai Eran attr->pkey_index); 4031e126ba97SEli Cohen goto out; 4032e126ba97SEli Cohen } 4033158abf86SHaggai Eran } 4034e126ba97SEli Cohen 4035e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 4036938fe83cSSaeed Mahameed attr->max_rd_atomic > 4037158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 4038158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 4039158abf86SHaggai Eran attr->max_rd_atomic); 4040e126ba97SEli Cohen goto out; 4041158abf86SHaggai Eran } 4042e126ba97SEli Cohen 4043e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 4044938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 4045158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 4046158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 4047158abf86SHaggai Eran attr->max_dest_rd_atomic); 4048e126ba97SEli Cohen goto out; 4049158abf86SHaggai Eran } 4050e126ba97SEli Cohen 4051e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 4052e126ba97SEli Cohen err = 0; 4053e126ba97SEli Cohen goto out; 4054e126ba97SEli Cohen } 4055e126ba97SEli Cohen 405661147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 405789944450SShamir Rabinovitch new_state, &ucmd, udata); 4058e126ba97SEli Cohen 4059e126ba97SEli Cohen out: 4060e126ba97SEli Cohen mutex_unlock(&qp->mutex); 4061e126ba97SEli Cohen return err; 4062e126ba97SEli Cohen } 4063e126ba97SEli Cohen 406434f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 406534f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 406634f4c955SGuy Levi { 406734f4c955SGuy Levi u32 idx; 406834f4c955SGuy Levi 406934f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 407034f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 407134f4c955SGuy Levi 407234f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 407334f4c955SGuy Levi } 407434f4c955SGuy Levi 407534f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 407634f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 407734f4c955SGuy Levi * @sq - SQ buffer. 407834f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 407934f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 408034f4c955SGuy Levi * @cur_edge: Updated current edge. 408134f4c955SGuy Levi */ 408234f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 408334f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 408434f4c955SGuy Levi { 408534f4c955SGuy Levi if (likely(*seg != *cur_edge)) 408634f4c955SGuy Levi return; 408734f4c955SGuy Levi 408834f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 408934f4c955SGuy Levi } 409034f4c955SGuy Levi 409134f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 409234f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 409334f4c955SGuy Levi * @sq - SQ buffer. 409434f4c955SGuy Levi * @cur_edge: Updated current edge. 409534f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 409634f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 409734f4c955SGuy Levi * @src: Pointer to copy from. 409834f4c955SGuy Levi * @n: Number of bytes to copy. 409934f4c955SGuy Levi */ 410034f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 410134f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 410234f4c955SGuy Levi size_t n) 410334f4c955SGuy Levi { 410434f4c955SGuy Levi while (likely(n)) { 410534f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 410634f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 410734f4c955SGuy Levi size_t stride; 410834f4c955SGuy Levi 410934f4c955SGuy Levi memcpy(*seg, src, copysz); 411034f4c955SGuy Levi 411134f4c955SGuy Levi n -= copysz; 411234f4c955SGuy Levi src += copysz; 411334f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 411434f4c955SGuy Levi *seg += stride; 411534f4c955SGuy Levi *wqe_sz += stride >> 4; 411634f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 411734f4c955SGuy Levi } 411834f4c955SGuy Levi } 411934f4c955SGuy Levi 4120e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 4121e126ba97SEli Cohen { 4122e126ba97SEli Cohen struct mlx5_ib_cq *cq; 4123e126ba97SEli Cohen unsigned cur; 4124e126ba97SEli Cohen 4125e126ba97SEli Cohen cur = wq->head - wq->tail; 4126e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 4127e126ba97SEli Cohen return 0; 4128e126ba97SEli Cohen 4129e126ba97SEli Cohen cq = to_mcq(ib_cq); 4130e126ba97SEli Cohen spin_lock(&cq->lock); 4131e126ba97SEli Cohen cur = wq->head - wq->tail; 4132e126ba97SEli Cohen spin_unlock(&cq->lock); 4133e126ba97SEli Cohen 4134e126ba97SEli Cohen return cur + nreq >= wq->max_post; 4135e126ba97SEli Cohen } 4136e126ba97SEli Cohen 4137e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 4138e126ba97SEli Cohen u64 remote_addr, u32 rkey) 4139e126ba97SEli Cohen { 4140e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 4141e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 4142e126ba97SEli Cohen rseg->reserved = 0; 4143e126ba97SEli Cohen } 4144e126ba97SEli Cohen 414534f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 414634f4c955SGuy Levi void **seg, int *size, void **cur_edge) 4147f0313965SErez Shitrit { 414834f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 4149f0313965SErez Shitrit 4150f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 4151f0313965SErez Shitrit 4152f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 4153f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 4154f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 4155f0313965SErez Shitrit 4156f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 4157f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 415834f4c955SGuy Levi size_t left, copysz; 4159f0313965SErez Shitrit void *pdata = ud_wr->header; 416034f4c955SGuy Levi size_t stride; 4161f0313965SErez Shitrit 4162f0313965SErez Shitrit left = ud_wr->hlen; 4163f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 41642b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 4165f0313965SErez Shitrit 416634f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 416734f4c955SGuy Levi * first copy up to the current edge and then, if needed, 416834f4c955SGuy Levi * fall-through to memcpy_send_wqe. 4169f0313965SErez Shitrit */ 417034f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 417134f4c955SGuy Levi left); 417234f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 417334f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 417434f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 417534f4c955SGuy Levi *size += stride / 16; 417634f4c955SGuy Levi *seg += stride; 4177f0313965SErez Shitrit 417834f4c955SGuy Levi if (copysz < left) { 417934f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4180f0313965SErez Shitrit left -= copysz; 4181f0313965SErez Shitrit pdata += copysz; 418234f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 418334f4c955SGuy Levi left); 4184f0313965SErez Shitrit } 4185f0313965SErez Shitrit 418634f4c955SGuy Levi return; 418734f4c955SGuy Levi } 418834f4c955SGuy Levi 418934f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 419034f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 4191f0313965SErez Shitrit } 4192f0313965SErez Shitrit 4193e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 4194f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4195e126ba97SEli Cohen { 4196e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 4197e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 4198e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 4199e126ba97SEli Cohen } 4200e126ba97SEli Cohen 4201e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 4202e126ba97SEli Cohen { 4203e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 4204e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 4205e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 4206e126ba97SEli Cohen } 4207e126ba97SEli Cohen 420831616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 4209e126ba97SEli Cohen { 421031616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 421131616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 4212e126ba97SEli Cohen } 4213e126ba97SEli Cohen 4214841b07f9SMoni Shoua static __be64 frwr_mkey_mask(bool atomic) 4215e126ba97SEli Cohen { 4216e126ba97SEli Cohen u64 result; 4217e126ba97SEli Cohen 4218e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 4219e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 4220e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 4221e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 4222e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 4223e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 4224e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 4225e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 4226e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 4227e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 4228e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4229e126ba97SEli Cohen 4230841b07f9SMoni Shoua if (atomic) 4231841b07f9SMoni Shoua result |= MLX5_MKEY_MASK_A; 4232841b07f9SMoni Shoua 4233e126ba97SEli Cohen return cpu_to_be64(result); 4234e126ba97SEli Cohen } 4235e126ba97SEli Cohen 4236e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 4237e6631814SSagi Grimberg { 4238e6631814SSagi Grimberg u64 result; 4239e6631814SSagi Grimberg 4240e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 4241e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 4242e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 4243d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 4244e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 4245e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 4246e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 4247e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 4248e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 4249e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 4250e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 4251e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 4252e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 4253e6631814SSagi Grimberg 4254e6631814SSagi Grimberg return cpu_to_be64(result); 4255e6631814SSagi Grimberg } 4256e6631814SSagi Grimberg 42578a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 4258841b07f9SMoni Shoua struct mlx5_ib_mr *mr, u8 flags, bool atomic) 42598a187ee5SSagi Grimberg { 426038ca87c6SMax Gurtovoy int size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size; 42618a187ee5SSagi Grimberg 42628a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4263b005d316SSagi Grimberg 42649ac7c4bcSMax Gurtovoy umr->flags = flags; 426531616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4266841b07f9SMoni Shoua umr->mkey_mask = frwr_mkey_mask(atomic); 42678a187ee5SSagi Grimberg } 42688a187ee5SSagi Grimberg 4269dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4270e126ba97SEli Cohen { 4271e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4272e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 42732d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4274e126ba97SEli Cohen } 4275e126ba97SEli Cohen 427631616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4277e126ba97SEli Cohen { 4278968e78ddSHaggai Eran u64 result; 4279e126ba97SEli Cohen 428031616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4281e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4282968e78ddSHaggai Eran 4283968e78ddSHaggai Eran return cpu_to_be64(result); 4284968e78ddSHaggai Eran } 4285968e78ddSHaggai Eran 428631616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4287968e78ddSHaggai Eran { 4288968e78ddSHaggai Eran u64 result; 4289968e78ddSHaggai Eran 4290968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4291968e78ddSHaggai Eran 4292968e78ddSHaggai Eran return cpu_to_be64(result); 4293968e78ddSHaggai Eran } 4294968e78ddSHaggai Eran 429556e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 429656e11d62SNoa Osherovich { 429756e11d62SNoa Osherovich u64 result; 429856e11d62SNoa Osherovich 429956e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 430056e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 430131616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 430256e11d62SNoa Osherovich 430356e11d62SNoa Osherovich return cpu_to_be64(result); 430456e11d62SNoa Osherovich } 430556e11d62SNoa Osherovich 430631616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 430756e11d62SNoa Osherovich { 430856e11d62SNoa Osherovich u64 result; 430956e11d62SNoa Osherovich 431031616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 431131616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 431256e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 431331616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 431431616255SArtemy Kovalyov 431531616255SArtemy Kovalyov if (atomic) 431631616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 431756e11d62SNoa Osherovich 431856e11d62SNoa Osherovich return cpu_to_be64(result); 431956e11d62SNoa Osherovich } 432056e11d62SNoa Osherovich 432156e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 432256e11d62SNoa Osherovich { 432356e11d62SNoa Osherovich u64 result; 432456e11d62SNoa Osherovich 432531616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 432656e11d62SNoa Osherovich 432756e11d62SNoa Osherovich return cpu_to_be64(result); 432856e11d62SNoa Osherovich } 432956e11d62SNoa Osherovich 4330c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4331c8d75a98SMajd Dibbiny { 4332c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4333c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4334c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4335c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4336c8d75a98SMajd Dibbiny return -EPERM; 4337c8d75a98SMajd Dibbiny return 0; 4338c8d75a98SMajd Dibbiny } 4339c8d75a98SMajd Dibbiny 4340c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4341c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4342f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4343968e78ddSHaggai Eran { 4344f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4345968e78ddSHaggai Eran 4346968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4347968e78ddSHaggai Eran 43486a053953SYishai Hadas if (!umrwr->ignore_free_state) { 4349968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 43506a053953SYishai Hadas /* fail if free */ 43516a053953SYishai Hadas umr->flags = MLX5_UMR_CHECK_FREE; 4352968e78ddSHaggai Eran else 43536a053953SYishai Hadas /* fail if not free */ 43546a053953SYishai Hadas umr->flags = MLX5_UMR_CHECK_NOT_FREE; 43556a053953SYishai Hadas } 4356968e78ddSHaggai Eran 435731616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 435831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 435931616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 436031616255SArtemy Kovalyov 436131616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 436231616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4363968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4364968e78ddSHaggai Eran } 436556e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 436656e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 436731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 436831616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 436956e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4370e126ba97SEli Cohen } 437131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 437231616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 437331616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 437431616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4375e126ba97SEli Cohen 4376e126ba97SEli Cohen if (!wr->num_sge) 4377968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4378c8d75a98SMajd Dibbiny 4379c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4380e126ba97SEli Cohen } 4381e126ba97SEli Cohen 4382e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4383e126ba97SEli Cohen { 4384e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4385e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4386e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4387e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 43882ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4389e126ba97SEli Cohen } 4390e126ba97SEli Cohen 43918a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 43928a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 43938a187ee5SSagi Grimberg u32 key, int access) 43948a187ee5SSagi Grimberg { 439538ca87c6SMax Gurtovoy int ndescs = ALIGN(mr->ndescs + mr->meta_ndescs, 8) >> 1; 43968a187ee5SSagi Grimberg 43978a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4398b005d316SSagi Grimberg 4399ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4400b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4401ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4402b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4403b005d316SSagi Grimberg ndescs *= 2; 4404b005d316SSagi Grimberg 4405b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 44068a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 44078a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 44088a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 44098a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 44108a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 44118a187ee5SSagi Grimberg } 44128a187ee5SSagi Grimberg 4413dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4414e126ba97SEli Cohen { 4415e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4416968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4417e126ba97SEli Cohen } 4418e126ba97SEli Cohen 4419f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4420f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4421e126ba97SEli Cohen { 4422f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4423968e78ddSHaggai Eran 4424e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 442531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4426968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4427e126ba97SEli Cohen 4428968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 442956e11d62SNoa Osherovich if (umrwr->pd) 4430968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 443131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 443231616255SArtemy Kovalyov !umrwr->length) 443331616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 443431616255SArtemy Kovalyov 443531616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4436968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4437968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4438746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4439968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4440e126ba97SEli Cohen } 4441e126ba97SEli Cohen 44428a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 44438a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 44448a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 44458a187ee5SSagi Grimberg { 444638ca87c6SMax Gurtovoy int bcount = mr->desc_size * (mr->ndescs + mr->meta_ndescs); 44478a187ee5SSagi Grimberg 44488a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 44498a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 44508a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 44518a187ee5SSagi Grimberg } 44528a187ee5SSagi Grimberg 4453f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4454e126ba97SEli Cohen { 4455e126ba97SEli Cohen switch (wr->opcode) { 4456e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4457e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4458e126ba97SEli Cohen return wr->ex.imm_data; 4459e126ba97SEli Cohen 4460e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4461e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4462e126ba97SEli Cohen 4463e126ba97SEli Cohen default: 4464e126ba97SEli Cohen return 0; 4465e126ba97SEli Cohen } 4466e126ba97SEli Cohen } 4467e126ba97SEli Cohen 4468e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4469e126ba97SEli Cohen { 4470e126ba97SEli Cohen u8 *p = wqe; 4471e126ba97SEli Cohen u8 res = 0; 4472e126ba97SEli Cohen int i; 4473e126ba97SEli Cohen 4474e126ba97SEli Cohen for (i = 0; i < size; i++) 4475e126ba97SEli Cohen res ^= p[i]; 4476e126ba97SEli Cohen 4477e126ba97SEli Cohen return ~res; 4478e126ba97SEli Cohen } 4479e126ba97SEli Cohen 4480e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4481e126ba97SEli Cohen { 4482e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4483e126ba97SEli Cohen } 4484e126ba97SEli Cohen 4485f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 448634f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4487e126ba97SEli Cohen { 4488e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 448934f4c955SGuy Levi size_t offset; 4490e126ba97SEli Cohen int inl = 0; 4491e126ba97SEli Cohen int i; 4492e126ba97SEli Cohen 449334f4c955SGuy Levi seg = *wqe; 449434f4c955SGuy Levi *wqe += sizeof(*seg); 449534f4c955SGuy Levi offset = sizeof(*seg); 449634f4c955SGuy Levi 4497e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 449834f4c955SGuy Levi size_t len = wr->sg_list[i].length; 449934f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 450034f4c955SGuy Levi 4501e126ba97SEli Cohen inl += len; 4502e126ba97SEli Cohen 4503e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4504e126ba97SEli Cohen return -ENOMEM; 4505e126ba97SEli Cohen 450634f4c955SGuy Levi while (likely(len)) { 450734f4c955SGuy Levi size_t leftlen; 450834f4c955SGuy Levi size_t copysz; 450934f4c955SGuy Levi 451034f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 451134f4c955SGuy Levi *wqe_sz + (offset >> 4), 451234f4c955SGuy Levi cur_edge); 451334f4c955SGuy Levi 451434f4c955SGuy Levi leftlen = *cur_edge - *wqe; 451534f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 451634f4c955SGuy Levi 451734f4c955SGuy Levi memcpy(*wqe, addr, copysz); 451834f4c955SGuy Levi len -= copysz; 451934f4c955SGuy Levi addr += copysz; 452034f4c955SGuy Levi *wqe += copysz; 452134f4c955SGuy Levi offset += copysz; 4522e126ba97SEli Cohen } 4523e126ba97SEli Cohen } 4524e126ba97SEli Cohen 4525e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4526e126ba97SEli Cohen 452734f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4528e126ba97SEli Cohen 4529e126ba97SEli Cohen return 0; 4530e126ba97SEli Cohen } 4531e126ba97SEli Cohen 4532e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4533e6631814SSagi Grimberg { 4534e6631814SSagi Grimberg switch (type) { 4535e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4536e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4537e6631814SSagi Grimberg default: 4538e6631814SSagi Grimberg return 0; 4539e6631814SSagi Grimberg } 4540e6631814SSagi Grimberg } 4541e6631814SSagi Grimberg 4542e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4543e6631814SSagi Grimberg { 4544e6631814SSagi Grimberg switch (block_size) { 4545e6631814SSagi Grimberg case 512: return 0x1; 4546e6631814SSagi Grimberg case 520: return 0x2; 4547e6631814SSagi Grimberg case 4096: return 0x3; 4548e6631814SSagi Grimberg case 4160: return 0x4; 4549e6631814SSagi Grimberg case 1073741824: return 0x5; 4550e6631814SSagi Grimberg default: return 0; 4551e6631814SSagi Grimberg } 4552e6631814SSagi Grimberg } 4553e6631814SSagi Grimberg 455478eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4555142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4556e6631814SSagi Grimberg { 4557142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4558142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4559142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4560142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4561142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4562142537f4SSagi Grimberg /* repeating block */ 4563142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4564142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4565142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4566e6631814SSagi Grimberg 456778eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 456878eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4569e6631814SSagi Grimberg 457078eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 457178eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 457278eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 457378eda2bbSSagi Grimberg else 457478eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4575e6631814SSagi Grimberg } 4576e6631814SSagi Grimberg 457778eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 457878eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4579e6631814SSagi Grimberg } 4580e6631814SSagi Grimberg 4581e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4582e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4583e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4584e6631814SSagi Grimberg { 4585e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4586e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4587e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4588e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4589e6631814SSagi Grimberg 4590c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4591e6631814SSagi Grimberg 4592142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4593142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4594e6631814SSagi Grimberg /* Input domain check byte mask */ 4595e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 459678eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 459778eda2bbSSagi Grimberg 459878eda2bbSSagi Grimberg /* Memory domain */ 459978eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 460078eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 460178eda2bbSSagi Grimberg break; 460278eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 460378eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 460478eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 460578eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 460678eda2bbSSagi Grimberg break; 460778eda2bbSSagi Grimberg default: 460878eda2bbSSagi Grimberg return -EINVAL; 460978eda2bbSSagi Grimberg } 461078eda2bbSSagi Grimberg 461178eda2bbSSagi Grimberg /* Wire domain */ 461278eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 461378eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 461478eda2bbSSagi Grimberg break; 461578eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4616e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 461778eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4618e6631814SSagi Grimberg /* Same block structure */ 4619142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4620e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4621fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4622c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4623fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4624c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4625fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4626e6631814SSagi Grimberg } else 4627e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4628e6631814SSagi Grimberg 4629142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 463078eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4631e6631814SSagi Grimberg break; 4632e6631814SSagi Grimberg default: 4633e6631814SSagi Grimberg return -EINVAL; 4634e6631814SSagi Grimberg } 4635e6631814SSagi Grimberg 4636e6631814SSagi Grimberg return 0; 4637e6631814SSagi Grimberg } 4638e6631814SSagi Grimberg 463938ca87c6SMax Gurtovoy static int set_sig_data_segment(const struct ib_send_wr *send_wr, 464038ca87c6SMax Gurtovoy struct ib_mr *sig_mr, 464138ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs, 464238ca87c6SMax Gurtovoy struct mlx5_ib_qp *qp, void **seg, int *size, 464338ca87c6SMax Gurtovoy void **cur_edge) 4644e6631814SSagi Grimberg { 4645e6631814SSagi Grimberg struct mlx5_bsf *bsf; 464638ca87c6SMax Gurtovoy u32 data_len; 464738ca87c6SMax Gurtovoy u32 data_key; 464838ca87c6SMax Gurtovoy u64 data_va; 464938ca87c6SMax Gurtovoy u32 prot_len = 0; 465038ca87c6SMax Gurtovoy u32 prot_key = 0; 465138ca87c6SMax Gurtovoy u64 prot_va = 0; 465238ca87c6SMax Gurtovoy bool prot = false; 4653e6631814SSagi Grimberg int ret; 4654e6631814SSagi Grimberg int wqe_size; 465538ca87c6SMax Gurtovoy struct mlx5_ib_mr *mr = to_mmr(sig_mr); 465638ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr = mr->pi_mr; 465738ca87c6SMax Gurtovoy 465838ca87c6SMax Gurtovoy data_len = pi_mr->data_length; 465938ca87c6SMax Gurtovoy data_key = pi_mr->ibmr.lkey; 46602563e2f3SMax Gurtovoy data_va = pi_mr->data_iova; 466138ca87c6SMax Gurtovoy if (pi_mr->meta_ndescs) { 466238ca87c6SMax Gurtovoy prot_len = pi_mr->meta_length; 466338ca87c6SMax Gurtovoy prot_key = pi_mr->ibmr.lkey; 4664de0ae958SIsrael Rukshin prot_va = pi_mr->pi_iova; 466538ca87c6SMax Gurtovoy prot = true; 466638ca87c6SMax Gurtovoy } 466738ca87c6SMax Gurtovoy 466838ca87c6SMax Gurtovoy if (!prot || (data_key == prot_key && data_va == prot_va && 466938ca87c6SMax Gurtovoy data_len == prot_len)) { 4670e6631814SSagi Grimberg /** 4671e6631814SSagi Grimberg * Source domain doesn't contain signature information 46725c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4673e6631814SSagi Grimberg * So need construct: 4674e6631814SSagi Grimberg * ------------------ 4675e6631814SSagi Grimberg * | data_klm | 4676e6631814SSagi Grimberg * ------------------ 4677e6631814SSagi Grimberg * | BSF | 4678e6631814SSagi Grimberg * ------------------ 4679e6631814SSagi Grimberg **/ 4680e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4681e6631814SSagi Grimberg 4682e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4683e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4684e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4685e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4686e6631814SSagi Grimberg } else { 4687e6631814SSagi Grimberg /** 4688e6631814SSagi Grimberg * Source domain contains signature information 4689e6631814SSagi Grimberg * So need construct a strided block format: 4690e6631814SSagi Grimberg * --------------------------- 4691e6631814SSagi Grimberg * | stride_block_ctrl | 4692e6631814SSagi Grimberg * --------------------------- 4693e6631814SSagi Grimberg * | data_klm | 4694e6631814SSagi Grimberg * --------------------------- 4695e6631814SSagi Grimberg * | prot_klm | 4696e6631814SSagi Grimberg * --------------------------- 4697e6631814SSagi Grimberg * | BSF | 4698e6631814SSagi Grimberg * --------------------------- 4699e6631814SSagi Grimberg **/ 4700e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4701e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4702e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4703e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4704e6631814SSagi Grimberg int prot_size; 4705e6631814SSagi Grimberg 4706e6631814SSagi Grimberg sblock_ctrl = *seg; 4707e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4708e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4709e6631814SSagi Grimberg 4710e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4711e6631814SSagi Grimberg if (!prot_size) { 4712e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4713e6631814SSagi Grimberg return -EINVAL; 4714e6631814SSagi Grimberg } 4715e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4716e6631814SSagi Grimberg prot_size); 4717e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4718e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4719e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4720e6631814SSagi Grimberg 4721e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4722e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4723e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 47245c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 47255c273b16SSagi Grimberg 4726e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4727e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4728e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4729e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 47305c273b16SSagi Grimberg 4731e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4732e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4733e6631814SSagi Grimberg } 4734e6631814SSagi Grimberg 4735e6631814SSagi Grimberg *seg += wqe_size; 4736e6631814SSagi Grimberg *size += wqe_size / 16; 473734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4738e6631814SSagi Grimberg 4739e6631814SSagi Grimberg bsf = *seg; 4740e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4741e6631814SSagi Grimberg if (ret) 4742e6631814SSagi Grimberg return -EINVAL; 4743e6631814SSagi Grimberg 4744e6631814SSagi Grimberg *seg += sizeof(*bsf); 4745e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 474634f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4747e6631814SSagi Grimberg 4748e6631814SSagi Grimberg return 0; 4749e6631814SSagi Grimberg } 4750e6631814SSagi Grimberg 4751e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 475222465bbaSMax Gurtovoy struct ib_mr *sig_mr, int access_flags, 475322465bbaSMax Gurtovoy u32 size, u32 length, u32 pdn) 4754e6631814SSagi Grimberg { 4755e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4756d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4757e6631814SSagi Grimberg 4758e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4759e6631814SSagi Grimberg 476022465bbaSMax Gurtovoy seg->flags = get_umr_flags(access_flags) | MLX5_MKC_ACCESS_MODE_KLMS; 4761e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4762d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4763e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4764e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 476531616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4766e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4767e6631814SSagi Grimberg } 4768e6631814SSagi Grimberg 4769e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 477031616255SArtemy Kovalyov u32 size) 4771e6631814SSagi Grimberg { 4772e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4773e6631814SSagi Grimberg 4774e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 477531616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4776e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4777e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4778e6631814SSagi Grimberg } 4779e6631814SSagi Grimberg 478038ca87c6SMax Gurtovoy static int set_pi_umr_wr(const struct ib_send_wr *send_wr, 478138ca87c6SMax Gurtovoy struct mlx5_ib_qp *qp, void **seg, int *size, 478238ca87c6SMax Gurtovoy void **cur_edge) 478338ca87c6SMax Gurtovoy { 478438ca87c6SMax Gurtovoy const struct ib_reg_wr *wr = reg_wr(send_wr); 478538ca87c6SMax Gurtovoy struct mlx5_ib_mr *sig_mr = to_mmr(wr->mr); 478638ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr = sig_mr->pi_mr; 478738ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs = sig_mr->ibmr.sig_attrs; 478838ca87c6SMax Gurtovoy u32 pdn = get_pd(qp)->pdn; 478938ca87c6SMax Gurtovoy u32 xlt_size; 479038ca87c6SMax Gurtovoy int region_len, ret; 479138ca87c6SMax Gurtovoy 479238ca87c6SMax Gurtovoy if (unlikely(send_wr->num_sge != 0) || 479338ca87c6SMax Gurtovoy unlikely(wr->access & IB_ACCESS_REMOTE_ATOMIC) || 4794185eddc4SMax Gurtovoy unlikely(!sig_mr->sig) || unlikely(!qp->ibqp.integrity_en) || 479538ca87c6SMax Gurtovoy unlikely(!sig_mr->sig->sig_status_checked)) 479638ca87c6SMax Gurtovoy return -EINVAL; 479738ca87c6SMax Gurtovoy 479838ca87c6SMax Gurtovoy /* length of the protected region, data + protection */ 479938ca87c6SMax Gurtovoy region_len = pi_mr->ibmr.length; 480038ca87c6SMax Gurtovoy 480138ca87c6SMax Gurtovoy /** 480238ca87c6SMax Gurtovoy * KLM octoword size - if protection was provided 480338ca87c6SMax Gurtovoy * then we use strided block format (3 octowords), 480438ca87c6SMax Gurtovoy * else we use single KLM (1 octoword) 480538ca87c6SMax Gurtovoy **/ 480638ca87c6SMax Gurtovoy if (sig_attrs->mem.sig_type != IB_SIG_TYPE_NONE) 480738ca87c6SMax Gurtovoy xlt_size = 0x30; 480838ca87c6SMax Gurtovoy else 480938ca87c6SMax Gurtovoy xlt_size = sizeof(struct mlx5_klm); 481038ca87c6SMax Gurtovoy 481138ca87c6SMax Gurtovoy set_sig_umr_segment(*seg, xlt_size); 481238ca87c6SMax Gurtovoy *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 481338ca87c6SMax Gurtovoy *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 481438ca87c6SMax Gurtovoy handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 481538ca87c6SMax Gurtovoy 481638ca87c6SMax Gurtovoy set_sig_mkey_segment(*seg, wr->mr, wr->access, xlt_size, region_len, 481738ca87c6SMax Gurtovoy pdn); 481838ca87c6SMax Gurtovoy *seg += sizeof(struct mlx5_mkey_seg); 481938ca87c6SMax Gurtovoy *size += sizeof(struct mlx5_mkey_seg) / 16; 482038ca87c6SMax Gurtovoy handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 482138ca87c6SMax Gurtovoy 482238ca87c6SMax Gurtovoy ret = set_sig_data_segment(send_wr, wr->mr, sig_attrs, qp, seg, size, 482338ca87c6SMax Gurtovoy cur_edge); 482438ca87c6SMax Gurtovoy if (ret) 482538ca87c6SMax Gurtovoy return ret; 482638ca87c6SMax Gurtovoy 482738ca87c6SMax Gurtovoy sig_mr->sig->sig_status_checked = false; 482838ca87c6SMax Gurtovoy return 0; 482938ca87c6SMax Gurtovoy } 4830e6631814SSagi Grimberg 4831e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4832e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4833e6631814SSagi Grimberg { 4834e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4835e6631814SSagi Grimberg 4836e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4837e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4838e6631814SSagi Grimberg switch (domain->sig_type) { 483978eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 484078eda2bbSSagi Grimberg break; 4841e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4842e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4843e6631814SSagi Grimberg domain->sig.dif.app_tag); 4844e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4845e6631814SSagi Grimberg break; 4846e6631814SSagi Grimberg default: 484712bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 484812bbf1eaSLeon Romanovsky domain->sig_type); 484912bbf1eaSLeon Romanovsky return -EINVAL; 4850e6631814SSagi Grimberg } 4851e6631814SSagi Grimberg 485278eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 485378eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 485478eda2bbSSagi Grimberg 4855e6631814SSagi Grimberg return 0; 4856e6631814SSagi Grimberg } 4857e6631814SSagi Grimberg 48588a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4859f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 48609ac7c4bcSMax Gurtovoy void **seg, int *size, void **cur_edge, 48619ac7c4bcSMax Gurtovoy bool check_not_free) 48628a187ee5SSagi Grimberg { 48638a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 48648a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 4865841b07f9SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(pd->ibpd.device); 486638ca87c6SMax Gurtovoy int mr_list_size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size; 4867064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 4868841b07f9SMoni Shoua bool atomic = wr->access & IB_ACCESS_REMOTE_ATOMIC; 48699ac7c4bcSMax Gurtovoy u8 flags = 0; 48708a187ee5SSagi Grimberg 4871d6de0bb1SMichael Guralnik if (!mlx5_ib_can_use_umr(dev, atomic, wr->access)) { 4872841b07f9SMoni Shoua mlx5_ib_warn(to_mdev(qp->ibqp.device), 4873841b07f9SMoni Shoua "Fast update of %s for MR is disabled\n", 4874841b07f9SMoni Shoua (MLX5_CAP_GEN(dev->mdev, 4875841b07f9SMoni Shoua umr_modify_entity_size_disabled)) ? 4876841b07f9SMoni Shoua "entity size" : 4877841b07f9SMoni Shoua "atomic access"); 4878841b07f9SMoni Shoua return -EINVAL; 4879841b07f9SMoni Shoua } 4880841b07f9SMoni Shoua 48818a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 48828a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 48838a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 48848a187ee5SSagi Grimberg return -EINVAL; 48858a187ee5SSagi Grimberg } 48868a187ee5SSagi Grimberg 48879ac7c4bcSMax Gurtovoy if (check_not_free) 48889ac7c4bcSMax Gurtovoy flags |= MLX5_UMR_CHECK_NOT_FREE; 48899ac7c4bcSMax Gurtovoy if (umr_inline) 48909ac7c4bcSMax Gurtovoy flags |= MLX5_UMR_INLINE; 48919ac7c4bcSMax Gurtovoy 4892841b07f9SMoni Shoua set_reg_umr_seg(*seg, mr, flags, atomic); 48938a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 48948a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 489534f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 48968a187ee5SSagi Grimberg 48978a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 48988a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 48998a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 490034f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 49018a187ee5SSagi Grimberg 4902064e5262SIdan Burstein if (umr_inline) { 490334f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 490434f4c955SGuy Levi mr_list_size); 490534f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 4906064e5262SIdan Burstein } else { 49078a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 49088a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 49098a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4910064e5262SIdan Burstein } 49118a187ee5SSagi Grimberg return 0; 49128a187ee5SSagi Grimberg } 49138a187ee5SSagi Grimberg 491434f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 491534f4c955SGuy Levi void **cur_edge) 4916e126ba97SEli Cohen { 4917dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4918e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4919e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 492034f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4921dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4922e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4923e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 492434f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4925e126ba97SEli Cohen } 4926e126ba97SEli Cohen 492734f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 4928e126ba97SEli Cohen { 4929e126ba97SEli Cohen __be32 *p = NULL; 4930e126ba97SEli Cohen int i, j; 4931e126ba97SEli Cohen 493234f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 4933e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4934e126ba97SEli Cohen if ((i & 0xf) == 0) { 49351e5887b7SArtemy Kovalyov p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx); 493634f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 4937e126ba97SEli Cohen j = 0; 49381e5887b7SArtemy Kovalyov idx = (idx + 1) & (qp->sq.wqe_cnt - 1); 4939e126ba97SEli Cohen } 4940e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4941e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4942e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4943e126ba97SEli Cohen } 4944e126ba97SEli Cohen } 4945e126ba97SEli Cohen 49467bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 49476e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 494834f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 494934f4c955SGuy Levi int *size, void **cur_edge, int nreq, 495034f4c955SGuy Levi bool send_signaled, bool solicited) 49516e5eadacSSagi Grimberg { 4952b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4953b2a232d2SLeon Romanovsky return -ENOMEM; 49546e5eadacSSagi Grimberg 49556e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 495634f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 49576e5eadacSSagi Grimberg *ctrl = *seg; 49586e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 49596e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 49606e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 49617bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 49627bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 49636e5eadacSSagi Grimberg 49646e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 49656e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 496634f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 49676e5eadacSSagi Grimberg 4968b2a232d2SLeon Romanovsky return 0; 49696e5eadacSSagi Grimberg } 49706e5eadacSSagi Grimberg 49717bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 49727bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 49737bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 497434f4c955SGuy Levi int *size, void **cur_edge, int nreq) 49757bb1fafcSBart Van Assche { 497634f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 49777bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 49787bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 49797bb1fafcSBart Van Assche } 49807bb1fafcSBart Van Assche 49816e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 49826e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 498334f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 498434f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 498534f4c955SGuy Levi u32 mlx5_opcode) 49866e5eadacSSagi Grimberg { 49876e5eadacSSagi Grimberg u8 opmod = 0; 49886e5eadacSSagi Grimberg 49896e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 49906e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 499119098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 49926e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 49936e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 49946e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 49956e5eadacSSagi Grimberg 49966e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 49976e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 49986e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 49996e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 50006e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 500134f4c955SGuy Levi 500234f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 500334f4c955SGuy Levi * construction, into SQ's cache. 500434f4c955SGuy Levi */ 500534f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 500634f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 500734f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 500834f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 500934f4c955SGuy Levi cur_edge; 50106e5eadacSSagi Grimberg } 50116e5eadacSSagi Grimberg 5012d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5013d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 5014e126ba97SEli Cohen { 5015e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 5016e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 501789ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 501838ca87c6SMax Gurtovoy struct ib_reg_wr reg_pi_wr; 5019d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 5020e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 502138ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr; 50222563e2f3SMax Gurtovoy struct mlx5_ib_mr pa_pi_mr; 502338ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs; 5024e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 5025d16e91daSHaggai Eran struct mlx5_bf *bf; 502634f4c955SGuy Levi void *cur_edge; 5027e126ba97SEli Cohen int uninitialized_var(size); 5028e126ba97SEli Cohen unsigned long flags; 5029e126ba97SEli Cohen unsigned idx; 5030e126ba97SEli Cohen int err = 0; 5031e126ba97SEli Cohen int num_sge; 5032e126ba97SEli Cohen void *seg; 5033e126ba97SEli Cohen int nreq; 5034e126ba97SEli Cohen int i; 5035e126ba97SEli Cohen u8 next_fence = 0; 5036e126ba97SEli Cohen u8 fence; 5037e126ba97SEli Cohen 50386c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 50396c75520fSParav Pandit !drain)) { 50406c75520fSParav Pandit *bad_wr = wr; 50416c75520fSParav Pandit return -EIO; 50426c75520fSParav Pandit } 50436c75520fSParav Pandit 5044d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5045d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 5046d16e91daSHaggai Eran 5047d16e91daSHaggai Eran qp = to_mqp(ibqp); 50485fe9dec0SEli Cohen bf = &qp->bf; 5049d16e91daSHaggai Eran 5050e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 5051e126ba97SEli Cohen 5052e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5053a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 5054e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5055e126ba97SEli Cohen err = -EINVAL; 5056e126ba97SEli Cohen *bad_wr = wr; 5057e126ba97SEli Cohen goto out; 5058e126ba97SEli Cohen } 5059e126ba97SEli Cohen 5060e126ba97SEli Cohen num_sge = wr->num_sge; 5061e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 5062e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 506324be409bSChuck Lever err = -EINVAL; 5064e126ba97SEli Cohen *bad_wr = wr; 5065e126ba97SEli Cohen goto out; 5066e126ba97SEli Cohen } 5067e126ba97SEli Cohen 506834f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 506934f4c955SGuy Levi nreq); 50706e5eadacSSagi Grimberg if (err) { 50716e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 50726e5eadacSSagi Grimberg err = -ENOMEM; 50736e5eadacSSagi Grimberg *bad_wr = wr; 50746e5eadacSSagi Grimberg goto out; 50756e5eadacSSagi Grimberg } 5076e126ba97SEli Cohen 507738ca87c6SMax Gurtovoy if (wr->opcode == IB_WR_REG_MR || 507838ca87c6SMax Gurtovoy wr->opcode == IB_WR_REG_MR_INTEGRITY) { 50796e8484c5SMax Gurtovoy fence = dev->umr_fence; 50806e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 5081074fca3aSMajd Dibbiny } else { 5082074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 50836e8484c5SMax Gurtovoy if (qp->next_fence) 50846e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 50856e8484c5SMax Gurtovoy else 50866e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 50876e8484c5SMax Gurtovoy } else { 50886e8484c5SMax Gurtovoy fence = qp->next_fence; 50896e8484c5SMax Gurtovoy } 5090074fca3aSMajd Dibbiny } 50916e8484c5SMax Gurtovoy 5092e126ba97SEli Cohen switch (ibqp->qp_type) { 5093e126ba97SEli Cohen case IB_QPT_XRC_INI: 5094e126ba97SEli Cohen xrc = seg; 5095e126ba97SEli Cohen seg += sizeof(*xrc); 5096e126ba97SEli Cohen size += sizeof(*xrc) / 16; 5097e126ba97SEli Cohen /* fall through */ 5098e126ba97SEli Cohen case IB_QPT_RC: 5099e126ba97SEli Cohen switch (wr->opcode) { 5100e126ba97SEli Cohen case IB_WR_RDMA_READ: 5101e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5102e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5103e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5104e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5105e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5106e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5107e126ba97SEli Cohen break; 5108e126ba97SEli Cohen 5109e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 5110e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 5111e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 511281bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 511381bea28fSEli Cohen err = -ENOSYS; 511481bea28fSEli Cohen *bad_wr = wr; 511581bea28fSEli Cohen goto out; 5116e126ba97SEli Cohen 5117e126ba97SEli Cohen case IB_WR_LOCAL_INV: 5118e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 5119e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 512034f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 5121e126ba97SEli Cohen num_sge = 0; 5122e126ba97SEli Cohen break; 5123e126ba97SEli Cohen 51248a187ee5SSagi Grimberg case IB_WR_REG_MR: 51258a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 51268a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 512734f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 51289ac7c4bcSMax Gurtovoy &cur_edge, true); 51298a187ee5SSagi Grimberg if (err) { 51308a187ee5SSagi Grimberg *bad_wr = wr; 51318a187ee5SSagi Grimberg goto out; 51328a187ee5SSagi Grimberg } 51338a187ee5SSagi Grimberg num_sge = 0; 51348a187ee5SSagi Grimberg break; 51358a187ee5SSagi Grimberg 513638ca87c6SMax Gurtovoy case IB_WR_REG_MR_INTEGRITY: 51372563e2f3SMax Gurtovoy qp->sq.wr_data[idx] = IB_WR_REG_MR_INTEGRITY; 513838ca87c6SMax Gurtovoy 513938ca87c6SMax Gurtovoy mr = to_mmr(reg_wr(wr)->mr); 514038ca87c6SMax Gurtovoy pi_mr = mr->pi_mr; 514138ca87c6SMax Gurtovoy 51422563e2f3SMax Gurtovoy if (pi_mr) { 51432563e2f3SMax Gurtovoy memset(®_pi_wr, 0, 51442563e2f3SMax Gurtovoy sizeof(struct ib_reg_wr)); 51452563e2f3SMax Gurtovoy 514638ca87c6SMax Gurtovoy reg_pi_wr.mr = &pi_mr->ibmr; 514738ca87c6SMax Gurtovoy reg_pi_wr.access = reg_wr(wr)->access; 514838ca87c6SMax Gurtovoy reg_pi_wr.key = pi_mr->ibmr.rkey; 514938ca87c6SMax Gurtovoy 515038ca87c6SMax Gurtovoy ctrl->imm = cpu_to_be32(reg_pi_wr.key); 51512563e2f3SMax Gurtovoy /* UMR for data + prot registration */ 51522563e2f3SMax Gurtovoy err = set_reg_wr(qp, ®_pi_wr, &seg, 51532563e2f3SMax Gurtovoy &size, &cur_edge, 51542563e2f3SMax Gurtovoy false); 515538ca87c6SMax Gurtovoy if (err) { 515638ca87c6SMax Gurtovoy *bad_wr = wr; 515738ca87c6SMax Gurtovoy goto out; 515838ca87c6SMax Gurtovoy } 51592563e2f3SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, 51602563e2f3SMax Gurtovoy cur_edge, idx, wr->wr_id, 51612563e2f3SMax Gurtovoy nreq, fence, 516238ca87c6SMax Gurtovoy MLX5_OPCODE_UMR); 516338ca87c6SMax Gurtovoy 51642563e2f3SMax Gurtovoy err = begin_wqe(qp, &seg, &ctrl, wr, 51652563e2f3SMax Gurtovoy &idx, &size, &cur_edge, 51662563e2f3SMax Gurtovoy nreq); 516738ca87c6SMax Gurtovoy if (err) { 516838ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 516938ca87c6SMax Gurtovoy err = -ENOMEM; 517038ca87c6SMax Gurtovoy *bad_wr = wr; 517138ca87c6SMax Gurtovoy goto out; 517238ca87c6SMax Gurtovoy } 51732563e2f3SMax Gurtovoy } else { 51742563e2f3SMax Gurtovoy memset(&pa_pi_mr, 0, 51752563e2f3SMax Gurtovoy sizeof(struct mlx5_ib_mr)); 51762563e2f3SMax Gurtovoy /* No UMR, use local_dma_lkey */ 51772563e2f3SMax Gurtovoy pa_pi_mr.ibmr.lkey = 51782563e2f3SMax Gurtovoy mr->ibmr.pd->local_dma_lkey; 51792563e2f3SMax Gurtovoy 51802563e2f3SMax Gurtovoy pa_pi_mr.ndescs = mr->ndescs; 51812563e2f3SMax Gurtovoy pa_pi_mr.data_length = mr->data_length; 51822563e2f3SMax Gurtovoy pa_pi_mr.data_iova = mr->data_iova; 51832563e2f3SMax Gurtovoy if (mr->meta_ndescs) { 51842563e2f3SMax Gurtovoy pa_pi_mr.meta_ndescs = 51852563e2f3SMax Gurtovoy mr->meta_ndescs; 51862563e2f3SMax Gurtovoy pa_pi_mr.meta_length = 51872563e2f3SMax Gurtovoy mr->meta_length; 51882563e2f3SMax Gurtovoy pa_pi_mr.pi_iova = mr->pi_iova; 51892563e2f3SMax Gurtovoy } 51902563e2f3SMax Gurtovoy 51912563e2f3SMax Gurtovoy pa_pi_mr.ibmr.length = mr->ibmr.length; 51922563e2f3SMax Gurtovoy mr->pi_mr = &pa_pi_mr; 51932563e2f3SMax Gurtovoy } 519438ca87c6SMax Gurtovoy ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 519538ca87c6SMax Gurtovoy /* UMR for sig MR */ 519638ca87c6SMax Gurtovoy err = set_pi_umr_wr(wr, qp, &seg, &size, 519738ca87c6SMax Gurtovoy &cur_edge); 519838ca87c6SMax Gurtovoy if (err) { 519938ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 520038ca87c6SMax Gurtovoy *bad_wr = wr; 520138ca87c6SMax Gurtovoy goto out; 520238ca87c6SMax Gurtovoy } 520338ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 520438ca87c6SMax Gurtovoy wr->wr_id, nreq, fence, 520538ca87c6SMax Gurtovoy MLX5_OPCODE_UMR); 520638ca87c6SMax Gurtovoy 520738ca87c6SMax Gurtovoy /* 520838ca87c6SMax Gurtovoy * SET_PSV WQEs are not signaled and solicited 520938ca87c6SMax Gurtovoy * on error 521038ca87c6SMax Gurtovoy */ 521138ca87c6SMax Gurtovoy sig_attrs = mr->ibmr.sig_attrs; 521238ca87c6SMax Gurtovoy err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 521338ca87c6SMax Gurtovoy &size, &cur_edge, nreq, false, 521438ca87c6SMax Gurtovoy true); 521538ca87c6SMax Gurtovoy if (err) { 521638ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 521738ca87c6SMax Gurtovoy err = -ENOMEM; 521838ca87c6SMax Gurtovoy *bad_wr = wr; 521938ca87c6SMax Gurtovoy goto out; 522038ca87c6SMax Gurtovoy } 522138ca87c6SMax Gurtovoy err = set_psv_wr(&sig_attrs->mem, 522238ca87c6SMax Gurtovoy mr->sig->psv_memory.psv_idx, 522338ca87c6SMax Gurtovoy &seg, &size); 522438ca87c6SMax Gurtovoy if (err) { 522538ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 522638ca87c6SMax Gurtovoy *bad_wr = wr; 522738ca87c6SMax Gurtovoy goto out; 522838ca87c6SMax Gurtovoy } 522938ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 523038ca87c6SMax Gurtovoy wr->wr_id, nreq, next_fence, 523138ca87c6SMax Gurtovoy MLX5_OPCODE_SET_PSV); 523238ca87c6SMax Gurtovoy 523338ca87c6SMax Gurtovoy err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 523438ca87c6SMax Gurtovoy &size, &cur_edge, nreq, false, 523538ca87c6SMax Gurtovoy true); 523638ca87c6SMax Gurtovoy if (err) { 523738ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 523838ca87c6SMax Gurtovoy err = -ENOMEM; 523938ca87c6SMax Gurtovoy *bad_wr = wr; 524038ca87c6SMax Gurtovoy goto out; 524138ca87c6SMax Gurtovoy } 524238ca87c6SMax Gurtovoy err = set_psv_wr(&sig_attrs->wire, 524338ca87c6SMax Gurtovoy mr->sig->psv_wire.psv_idx, 524438ca87c6SMax Gurtovoy &seg, &size); 524538ca87c6SMax Gurtovoy if (err) { 524638ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 524738ca87c6SMax Gurtovoy *bad_wr = wr; 524838ca87c6SMax Gurtovoy goto out; 524938ca87c6SMax Gurtovoy } 525038ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 525138ca87c6SMax Gurtovoy wr->wr_id, nreq, next_fence, 525238ca87c6SMax Gurtovoy MLX5_OPCODE_SET_PSV); 525338ca87c6SMax Gurtovoy 525438ca87c6SMax Gurtovoy qp->next_fence = 525538ca87c6SMax Gurtovoy MLX5_FENCE_MODE_INITIATOR_SMALL; 525638ca87c6SMax Gurtovoy num_sge = 0; 525738ca87c6SMax Gurtovoy goto skip_psv; 525838ca87c6SMax Gurtovoy 5259e126ba97SEli Cohen default: 5260e126ba97SEli Cohen break; 5261e126ba97SEli Cohen } 5262e126ba97SEli Cohen break; 5263e126ba97SEli Cohen 5264e126ba97SEli Cohen case IB_QPT_UC: 5265e126ba97SEli Cohen switch (wr->opcode) { 5266e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5267e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5268e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5269e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5270e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5271e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5272e126ba97SEli Cohen break; 5273e126ba97SEli Cohen 5274e126ba97SEli Cohen default: 5275e126ba97SEli Cohen break; 5276e126ba97SEli Cohen } 5277e126ba97SEli Cohen break; 5278e126ba97SEli Cohen 5279e126ba97SEli Cohen case IB_QPT_SMI: 52801e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 52811e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 52821e0e50b6SMaor Gottlieb err = -EPERM; 52831e0e50b6SMaor Gottlieb *bad_wr = wr; 52841e0e50b6SMaor Gottlieb goto out; 52851e0e50b6SMaor Gottlieb } 5286f6b1ee34SBart Van Assche /* fall through */ 5287d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 5288e126ba97SEli Cohen set_datagram_seg(seg, wr); 5289e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 5290e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 529134f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 529234f4c955SGuy Levi 5293e126ba97SEli Cohen break; 5294f0313965SErez Shitrit case IB_QPT_UD: 5295f0313965SErez Shitrit set_datagram_seg(seg, wr); 5296f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 5297f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 529834f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5299f0313965SErez Shitrit 5300f0313965SErez Shitrit /* handle qp that supports ud offload */ 5301f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 5302f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 5303f0313965SErez Shitrit 5304f0313965SErez Shitrit pad = seg; 5305f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 5306f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 5307f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 530834f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 530934f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 531034f4c955SGuy Levi &cur_edge); 5311f0313965SErez Shitrit } 5312f0313965SErez Shitrit break; 5313e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 5314e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 5315e126ba97SEli Cohen err = -EINVAL; 5316e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 5317e126ba97SEli Cohen goto out; 5318e126ba97SEli Cohen } 5319e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 5320e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 5321c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 5322c8d75a98SMajd Dibbiny if (unlikely(err)) 5323c8d75a98SMajd Dibbiny goto out; 5324e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5325e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 532634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5327e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 5328e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 5329e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 533034f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5331e126ba97SEli Cohen break; 5332e126ba97SEli Cohen 5333e126ba97SEli Cohen default: 5334e126ba97SEli Cohen break; 5335e126ba97SEli Cohen } 5336e126ba97SEli Cohen 5337e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 533834f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 5339e126ba97SEli Cohen if (unlikely(err)) { 5340e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5341e126ba97SEli Cohen *bad_wr = wr; 5342e126ba97SEli Cohen goto out; 5343e126ba97SEli Cohen } 5344e126ba97SEli Cohen } else { 5345e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 534634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 534734f4c955SGuy Levi &cur_edge); 5348e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 534934f4c955SGuy Levi set_data_ptr_seg 535034f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 535134f4c955SGuy Levi wr->sg_list + i); 5352e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 535334f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 5354e126ba97SEli Cohen } 5355e126ba97SEli Cohen } 5356e126ba97SEli Cohen } 5357e126ba97SEli Cohen 53586e8484c5SMax Gurtovoy qp->next_fence = next_fence; 535934f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 536034f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 5361e6631814SSagi Grimberg skip_psv: 5362e126ba97SEli Cohen if (0) 5363e126ba97SEli Cohen dump_wqe(qp, idx, size); 5364e126ba97SEli Cohen } 5365e126ba97SEli Cohen 5366e126ba97SEli Cohen out: 5367e126ba97SEli Cohen if (likely(nreq)) { 5368e126ba97SEli Cohen qp->sq.head += nreq; 5369e126ba97SEli Cohen 5370e126ba97SEli Cohen /* Make sure that descriptors are written before 5371e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5372e126ba97SEli Cohen */ 5373e126ba97SEli Cohen wmb(); 5374e126ba97SEli Cohen 5375e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5376e126ba97SEli Cohen 5377ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5378ada388f7SEli Cohen * we hit doorbell */ 5379ada388f7SEli Cohen wmb(); 5380ada388f7SEli Cohen 5381bbf29f61SMaxim Mikityanskiy mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset); 5382e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5383e126ba97SEli Cohen * and reach the HCA out of order. 5384e126ba97SEli Cohen */ 5385e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5386e126ba97SEli Cohen } 5387e126ba97SEli Cohen 5388e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5389e126ba97SEli Cohen 5390e126ba97SEli Cohen return err; 5391e126ba97SEli Cohen } 5392e126ba97SEli Cohen 5393d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5394d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5395d0e84c0aSYishai Hadas { 5396d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5397d0e84c0aSYishai Hadas } 5398d0e84c0aSYishai Hadas 5399e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5400e126ba97SEli Cohen { 5401e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5402e126ba97SEli Cohen } 5403e126ba97SEli Cohen 5404d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5405d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5406e126ba97SEli Cohen { 5407e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5408e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5409e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 541089ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 541189ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5412e126ba97SEli Cohen unsigned long flags; 5413e126ba97SEli Cohen int err = 0; 5414e126ba97SEli Cohen int nreq; 5415e126ba97SEli Cohen int ind; 5416e126ba97SEli Cohen int i; 5417e126ba97SEli Cohen 54186c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 54196c75520fSParav Pandit !drain)) { 54206c75520fSParav Pandit *bad_wr = wr; 54216c75520fSParav Pandit return -EIO; 54226c75520fSParav Pandit } 54236c75520fSParav Pandit 5424d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5425d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5426d16e91daSHaggai Eran 5427e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5428e126ba97SEli Cohen 5429e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5430e126ba97SEli Cohen 5431e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5432e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5433e126ba97SEli Cohen err = -ENOMEM; 5434e126ba97SEli Cohen *bad_wr = wr; 5435e126ba97SEli Cohen goto out; 5436e126ba97SEli Cohen } 5437e126ba97SEli Cohen 5438e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5439e126ba97SEli Cohen err = -EINVAL; 5440e126ba97SEli Cohen *bad_wr = wr; 5441e126ba97SEli Cohen goto out; 5442e126ba97SEli Cohen } 5443e126ba97SEli Cohen 544434f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5445e126ba97SEli Cohen if (qp->wq_sig) 5446e126ba97SEli Cohen scat++; 5447e126ba97SEli Cohen 5448e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5449e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5450e126ba97SEli Cohen 5451e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5452e126ba97SEli Cohen scat[i].byte_count = 0; 5453e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5454e126ba97SEli Cohen scat[i].addr = 0; 5455e126ba97SEli Cohen } 5456e126ba97SEli Cohen 5457e126ba97SEli Cohen if (qp->wq_sig) { 5458e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5459e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5460e126ba97SEli Cohen } 5461e126ba97SEli Cohen 5462e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5463e126ba97SEli Cohen 5464e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5465e126ba97SEli Cohen } 5466e126ba97SEli Cohen 5467e126ba97SEli Cohen out: 5468e126ba97SEli Cohen if (likely(nreq)) { 5469e126ba97SEli Cohen qp->rq.head += nreq; 5470e126ba97SEli Cohen 5471e126ba97SEli Cohen /* Make sure that descriptors are written before 5472e126ba97SEli Cohen * doorbell record. 5473e126ba97SEli Cohen */ 5474e126ba97SEli Cohen wmb(); 5475e126ba97SEli Cohen 5476e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5477e126ba97SEli Cohen } 5478e126ba97SEli Cohen 5479e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5480e126ba97SEli Cohen 5481e126ba97SEli Cohen return err; 5482e126ba97SEli Cohen } 5483e126ba97SEli Cohen 5484d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5485d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5486d0e84c0aSYishai Hadas { 5487d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5488d0e84c0aSYishai Hadas } 5489d0e84c0aSYishai Hadas 5490e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5491e126ba97SEli Cohen { 5492e126ba97SEli Cohen switch (mlx5_state) { 5493e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5494e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5495e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5496e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5497e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5498e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5499e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5500e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5501e126ba97SEli Cohen default: return -1; 5502e126ba97SEli Cohen } 5503e126ba97SEli Cohen } 5504e126ba97SEli Cohen 5505e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5506e126ba97SEli Cohen { 5507e126ba97SEli Cohen switch (mlx5_mig_state) { 5508e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5509e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5510e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5511e126ba97SEli Cohen default: return -1; 5512e126ba97SEli Cohen } 5513e126ba97SEli Cohen } 5514e126ba97SEli Cohen 5515e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5516e126ba97SEli Cohen { 5517e126ba97SEli Cohen int ib_flags = 0; 5518e126ba97SEli Cohen 5519e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5520e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5521e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5522e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5523e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5524e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5525e126ba97SEli Cohen 5526e126ba97SEli Cohen return ib_flags; 5527e126ba97SEli Cohen } 5528e126ba97SEli Cohen 552938349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5530d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5531e126ba97SEli Cohen struct mlx5_qp_path *path) 5532e126ba97SEli Cohen { 5533e126ba97SEli Cohen 5534d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5535e126ba97SEli Cohen 5536e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5537e126ba97SEli Cohen return; 5538e126ba97SEli Cohen 5539ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5540ae59c3f0SLeon Romanovsky 5541d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5542d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5543e126ba97SEli Cohen 5544d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5545d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5546d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5547d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5548d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5549d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5550d8966fcdSDasaratharaman Chandramouli 5551d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5552d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5553d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5554d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5555d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5556d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5557e126ba97SEli Cohen } 5558e126ba97SEli Cohen } 5559e126ba97SEli Cohen 55606d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 55616d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 55626d2f89dfSmajd@mellanox.com u8 *sq_state) 5563e126ba97SEli Cohen { 55646d2f89dfSmajd@mellanox.com int err; 55656d2f89dfSmajd@mellanox.com 556628160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 55676d2f89dfSmajd@mellanox.com if (err) 55686d2f89dfSmajd@mellanox.com goto out; 55696d2f89dfSmajd@mellanox.com sq->state = *sq_state; 55706d2f89dfSmajd@mellanox.com 55716d2f89dfSmajd@mellanox.com out: 55726d2f89dfSmajd@mellanox.com return err; 55736d2f89dfSmajd@mellanox.com } 55746d2f89dfSmajd@mellanox.com 55756d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 55766d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 55776d2f89dfSmajd@mellanox.com u8 *rq_state) 55786d2f89dfSmajd@mellanox.com { 55796d2f89dfSmajd@mellanox.com void *out; 55806d2f89dfSmajd@mellanox.com void *rqc; 55816d2f89dfSmajd@mellanox.com int inlen; 55826d2f89dfSmajd@mellanox.com int err; 55836d2f89dfSmajd@mellanox.com 55846d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 55851b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 55866d2f89dfSmajd@mellanox.com if (!out) 55876d2f89dfSmajd@mellanox.com return -ENOMEM; 55886d2f89dfSmajd@mellanox.com 55896d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 55906d2f89dfSmajd@mellanox.com if (err) 55916d2f89dfSmajd@mellanox.com goto out; 55926d2f89dfSmajd@mellanox.com 55936d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 55946d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 55956d2f89dfSmajd@mellanox.com rq->state = *rq_state; 55966d2f89dfSmajd@mellanox.com 55976d2f89dfSmajd@mellanox.com out: 55986d2f89dfSmajd@mellanox.com kvfree(out); 55996d2f89dfSmajd@mellanox.com return err; 56006d2f89dfSmajd@mellanox.com } 56016d2f89dfSmajd@mellanox.com 56026d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 56036d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 56046d2f89dfSmajd@mellanox.com { 56056d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 56066d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 56076d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 56086d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 56096d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 56106d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 56116d2f89dfSmajd@mellanox.com }, 56126d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 56136d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 56146d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 56156d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 56166d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 56176d2f89dfSmajd@mellanox.com }, 56186d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 56196d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 56206d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 56216d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 56226d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 56236d2f89dfSmajd@mellanox.com }, 56246d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 56256d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 56266d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 56276d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 56286d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 56296d2f89dfSmajd@mellanox.com }, 56306d2f89dfSmajd@mellanox.com }; 56316d2f89dfSmajd@mellanox.com 56326d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 56336d2f89dfSmajd@mellanox.com 56346d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 56356d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 56366d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 56376d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 56386d2f89dfSmajd@mellanox.com return -EINVAL; 56396d2f89dfSmajd@mellanox.com } 56406d2f89dfSmajd@mellanox.com 56416d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 56426d2f89dfSmajd@mellanox.com *qp_state = qp->state; 56436d2f89dfSmajd@mellanox.com 56446d2f89dfSmajd@mellanox.com return 0; 56456d2f89dfSmajd@mellanox.com } 56466d2f89dfSmajd@mellanox.com 56476d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 56486d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 56496d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 56506d2f89dfSmajd@mellanox.com { 56516d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 56526d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 56536d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 56546d2f89dfSmajd@mellanox.com int err; 56556d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 56566d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 56576d2f89dfSmajd@mellanox.com 56586d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 56596d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 56606d2f89dfSmajd@mellanox.com if (err) 56616d2f89dfSmajd@mellanox.com return err; 56626d2f89dfSmajd@mellanox.com } 56636d2f89dfSmajd@mellanox.com 56646d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 56656d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 56666d2f89dfSmajd@mellanox.com if (err) 56676d2f89dfSmajd@mellanox.com return err; 56686d2f89dfSmajd@mellanox.com } 56696d2f89dfSmajd@mellanox.com 56706d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 56716d2f89dfSmajd@mellanox.com raw_packet_qp_state); 56726d2f89dfSmajd@mellanox.com } 56736d2f89dfSmajd@mellanox.com 56746d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 56756d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 56766d2f89dfSmajd@mellanox.com { 567709a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5678e126ba97SEli Cohen struct mlx5_qp_context *context; 5679e126ba97SEli Cohen int mlx5_state; 568009a7d9ecSSaeed Mahameed u32 *outb; 5681e126ba97SEli Cohen int err = 0; 5682e126ba97SEli Cohen 568309a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 56846d2f89dfSmajd@mellanox.com if (!outb) 56856d2f89dfSmajd@mellanox.com return -ENOMEM; 56866d2f89dfSmajd@mellanox.com 5687333fbaa0SLeon Romanovsky err = mlx5_core_qp_query(dev, &qp->trans_qp.base.mqp, outb, outlen); 5688e126ba97SEli Cohen if (err) 56896d2f89dfSmajd@mellanox.com goto out; 5690e126ba97SEli Cohen 569109a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 569209a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 569309a7d9ecSSaeed Mahameed 5694e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5695e126ba97SEli Cohen 5696e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5697e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5698e126ba97SEli Cohen qp_attr->path_mig_state = 5699e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5700e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5701e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5702e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5703e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5704e126ba97SEli Cohen qp_attr->qp_access_flags = 5705e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5706e126ba97SEli Cohen 5707e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 570838349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 570938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5710d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5711d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5712d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5713d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5714e126ba97SEli Cohen } 5715e126ba97SEli Cohen 5716d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5717e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5718e126ba97SEli Cohen 5719e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5720e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5721e126ba97SEli Cohen 5722e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5723e126ba97SEli Cohen 5724e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5725e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5726e126ba97SEli Cohen qp_attr->min_rnr_timer = 5727e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5728e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5729e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5730e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5731e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 57326d2f89dfSmajd@mellanox.com 57336d2f89dfSmajd@mellanox.com out: 57346d2f89dfSmajd@mellanox.com kfree(outb); 57356d2f89dfSmajd@mellanox.com return err; 57366d2f89dfSmajd@mellanox.com } 57376d2f89dfSmajd@mellanox.com 5738776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5739776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5740776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5741776a3906SMoni Shoua { 5742776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5743776a3906SMoni Shoua u32 *out; 5744776a3906SMoni Shoua u32 access_flags = 0; 5745776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5746776a3906SMoni Shoua void *dctc; 5747776a3906SMoni Shoua int err; 5748776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5749776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5750776a3906SMoni Shoua IB_QP_PORT | 5751776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5752776a3906SMoni Shoua IB_QP_AV | 5753776a3906SMoni Shoua IB_QP_PATH_MTU | 5754776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5755776a3906SMoni Shoua 5756776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5757776a3906SMoni Shoua return -EINVAL; 5758776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5759776a3906SMoni Shoua return -EINVAL; 5760776a3906SMoni Shoua 5761776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5762776a3906SMoni Shoua if (!out) 5763776a3906SMoni Shoua return -ENOMEM; 5764776a3906SMoni Shoua 5765333fbaa0SLeon Romanovsky err = mlx5_core_dct_query(dev, dct, out, outlen); 5766776a3906SMoni Shoua if (err) 5767776a3906SMoni Shoua goto out; 5768776a3906SMoni Shoua 5769776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5770776a3906SMoni Shoua 5771776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5772776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5773776a3906SMoni Shoua 5774776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5775776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5776776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5777776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5778776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5779776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5780776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5781776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5782776a3906SMoni Shoua } 5783776a3906SMoni Shoua 5784776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5785776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5786776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5787776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5788776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5789776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5790776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5791776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5792776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5793776a3906SMoni Shoua } 5794776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5795776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5796776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5797776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5798776a3906SMoni Shoua out: 5799776a3906SMoni Shoua kfree(out); 5800776a3906SMoni Shoua return err; 5801776a3906SMoni Shoua } 5802776a3906SMoni Shoua 58036d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 58046d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 58056d2f89dfSmajd@mellanox.com { 58066d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 58076d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 58086d2f89dfSmajd@mellanox.com int err = 0; 58096d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 58106d2f89dfSmajd@mellanox.com 581128d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 581228d61370SYishai Hadas return -ENOSYS; 581328d61370SYishai Hadas 5814d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5815d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5816d16e91daSHaggai Eran qp_init_attr); 5817d16e91daSHaggai Eran 5818c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5819c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5820c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5821c2e53b2cSYishai Hadas 5822776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5823776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5824776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5825776a3906SMoni Shoua 58266d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 58276d2f89dfSmajd@mellanox.com 5828c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5829c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 58306d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 58316d2f89dfSmajd@mellanox.com if (err) 58326d2f89dfSmajd@mellanox.com goto out; 58336d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 58346d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 58356d2f89dfSmajd@mellanox.com } else { 58366d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 58376d2f89dfSmajd@mellanox.com if (err) 58386d2f89dfSmajd@mellanox.com goto out; 58396d2f89dfSmajd@mellanox.com } 58406d2f89dfSmajd@mellanox.com 58416d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5842e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5843e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5844e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5845e126ba97SEli Cohen 5846e126ba97SEli Cohen if (!ibqp->uobject) { 58470540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5848e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 58490540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5850e126ba97SEli Cohen } else { 5851e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5852e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5853e126ba97SEli Cohen } 5854e126ba97SEli Cohen 58550540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 58560540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 58570540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 58580540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 58590540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5860e126ba97SEli Cohen 5861e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5862e126ba97SEli Cohen 5863e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5864e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5865e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5866e126ba97SEli Cohen 5867051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5868051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5869051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5870051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5871051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5872051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5873b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 58743f89b01fSMichael Guralnik qp_init_attr->create_flags |= MLX5_IB_QP_CREATE_SQPN_QP1; 5875051f2630SLeon Romanovsky 5876e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5877e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5878e126ba97SEli Cohen 5879e126ba97SEli Cohen out: 5880e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5881e126ba97SEli Cohen return err; 5882e126ba97SEli Cohen } 5883e126ba97SEli Cohen 5884e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5885e126ba97SEli Cohen struct ib_udata *udata) 5886e126ba97SEli Cohen { 5887e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5888e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5889e126ba97SEli Cohen int err; 5890e126ba97SEli Cohen 5891938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5892e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5893e126ba97SEli Cohen 5894e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5895e126ba97SEli Cohen if (!xrcd) 5896e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5897e126ba97SEli Cohen 58985aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 5899e126ba97SEli Cohen if (err) { 5900e126ba97SEli Cohen kfree(xrcd); 5901e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5902e126ba97SEli Cohen } 5903e126ba97SEli Cohen 5904e126ba97SEli Cohen return &xrcd->ibxrcd; 5905e126ba97SEli Cohen } 5906e126ba97SEli Cohen 5907c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 5908e126ba97SEli Cohen { 5909e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5910e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5911e126ba97SEli Cohen int err; 5912e126ba97SEli Cohen 59135aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 5914b081808aSLeon Romanovsky if (err) 5915e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5916e126ba97SEli Cohen 5917e126ba97SEli Cohen kfree(xrcd); 5918e126ba97SEli Cohen return 0; 5919e126ba97SEli Cohen } 592079b20a6cSYishai Hadas 5921350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5922350d0e4cSYishai Hadas { 5923350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5924350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5925350d0e4cSYishai Hadas struct ib_event event; 5926350d0e4cSYishai Hadas 5927350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5928350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5929350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5930350d0e4cSYishai Hadas switch (type) { 5931350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5932350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5933350d0e4cSYishai Hadas break; 5934350d0e4cSYishai Hadas default: 5935350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5936350d0e4cSYishai Hadas return; 5937350d0e4cSYishai Hadas } 5938350d0e4cSYishai Hadas 5939350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5940350d0e4cSYishai Hadas } 5941350d0e4cSYishai Hadas } 5942350d0e4cSYishai Hadas 594303404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 594403404e8aSMaor Gottlieb { 594503404e8aSMaor Gottlieb int err = 0; 594603404e8aSMaor Gottlieb 594703404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 594803404e8aSMaor Gottlieb if (dev->delay_drop.activate) 594903404e8aSMaor Gottlieb goto out; 595003404e8aSMaor Gottlieb 5951333fbaa0SLeon Romanovsky err = mlx5_core_set_delay_drop(dev, dev->delay_drop.timeout); 595203404e8aSMaor Gottlieb if (err) 595303404e8aSMaor Gottlieb goto out; 595403404e8aSMaor Gottlieb 595503404e8aSMaor Gottlieb dev->delay_drop.activate = true; 595603404e8aSMaor Gottlieb out: 595703404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5958fe248c3aSMaor Gottlieb 5959fe248c3aSMaor Gottlieb if (!err) 5960fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 596103404e8aSMaor Gottlieb return err; 596203404e8aSMaor Gottlieb } 596303404e8aSMaor Gottlieb 596479b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 596579b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 596679b20a6cSYishai Hadas { 596779b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 59684be6da1eSNoa Osherovich int has_net_offloads; 596979b20a6cSYishai Hadas __be64 *rq_pas0; 597079b20a6cSYishai Hadas void *in; 597179b20a6cSYishai Hadas void *rqc; 597279b20a6cSYishai Hadas void *wq; 597379b20a6cSYishai Hadas int inlen; 597479b20a6cSYishai Hadas int err; 597579b20a6cSYishai Hadas 597679b20a6cSYishai Hadas dev = to_mdev(pd->device); 597779b20a6cSYishai Hadas 597879b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 59791b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 598079b20a6cSYishai Hadas if (!in) 598179b20a6cSYishai Hadas return -ENOMEM; 598279b20a6cSYishai Hadas 598334d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 598479b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 598579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 598679b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 598779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 598879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 598979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 599079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 599179b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5992ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5993ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5994ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5995b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5996b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5997b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5998b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5999b1383aa6SNoa Osherovich goto out; 6000b1383aa6SNoa Osherovich } else { 600179b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 6002b1383aa6SNoa Osherovich } 6003b1383aa6SNoa Osherovich } 600479b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 6005ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 6006c16339b6SMark Zhang /* 6007c16339b6SMark Zhang * In Firmware number of strides in each WQE is: 6008c16339b6SMark Zhang * "512 * 2^single_wqe_log_num_of_strides" 6009c16339b6SMark Zhang * Values 3 to 8 are accepted as 10 to 15, 9 to 18 are 6010c16339b6SMark Zhang * accepted as 0 to 9 6011c16339b6SMark Zhang */ 6012c16339b6SMark Zhang static const u8 fw_map[] = { 10, 11, 12, 13, 14, 15, 0, 1, 6013c16339b6SMark Zhang 2, 3, 4, 5, 6, 7, 8, 9 }; 6014ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 6015ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 6016ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 6017ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 6018c16339b6SMark Zhang MLX5_SET(wq, wq, log_wqe_num_of_strides, 6019c16339b6SMark Zhang fw_map[rwq->log_num_strides - 6020c16339b6SMark Zhang MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES]); 6021ccc87087SNoa Osherovich } 602279b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 602379b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 602479b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 602579b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 602679b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 602779b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 60284be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 6029b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 60304be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6031b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 6032b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6033b1f74a84SNoa Osherovich goto out; 6034b1f74a84SNoa Osherovich } 6035b1f74a84SNoa Osherovich } else { 6036b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 6037b1f74a84SNoa Osherovich } 60384be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 60394be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 60404be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 60414be6da1eSNoa Osherovich err = -EOPNOTSUPP; 60424be6da1eSNoa Osherovich goto out; 60434be6da1eSNoa Osherovich } 60444be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 60454be6da1eSNoa Osherovich } 604603404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 604703404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 604803404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 604903404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 605003404e8aSMaor Gottlieb err = -EOPNOTSUPP; 605103404e8aSMaor Gottlieb goto out; 605203404e8aSMaor Gottlieb } 605303404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 605403404e8aSMaor Gottlieb } 605579b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 605679b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 6057333fbaa0SLeon Romanovsky err = mlx5_core_create_rq_tracked(dev, in, inlen, &rwq->core_qp); 605803404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 605903404e8aSMaor Gottlieb err = set_delay_drop(dev); 606003404e8aSMaor Gottlieb if (err) { 606103404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 606203404e8aSMaor Gottlieb err); 6063333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rwq->core_qp); 606403404e8aSMaor Gottlieb } else { 606503404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 606603404e8aSMaor Gottlieb } 606703404e8aSMaor Gottlieb } 6068b1f74a84SNoa Osherovich out: 606979b20a6cSYishai Hadas kvfree(in); 607079b20a6cSYishai Hadas return err; 607179b20a6cSYishai Hadas } 607279b20a6cSYishai Hadas 607379b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 607479b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 607579b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 607679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 607779b20a6cSYishai Hadas { 607879b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 607979b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 608079b20a6cSYishai Hadas return -EINVAL; 608179b20a6cSYishai Hadas 608279b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 608379b20a6cSYishai Hadas return -EINVAL; 608479b20a6cSYishai Hadas 608579b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 608679b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 60870dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 60880dfe4522SLeon Romanovsky return -EINVAL; 60890dfe4522SLeon Romanovsky 609079b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 609179b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 609279b20a6cSYishai Hadas return 0; 609379b20a6cSYishai Hadas } 609479b20a6cSYishai Hadas 6095c16339b6SMark Zhang static bool log_of_strides_valid(struct mlx5_ib_dev *dev, u32 log_num_strides) 6096c16339b6SMark Zhang { 6097c16339b6SMark Zhang if ((log_num_strides > MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 6098c16339b6SMark Zhang (log_num_strides < MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) 6099c16339b6SMark Zhang return false; 6100c16339b6SMark Zhang 6101c16339b6SMark Zhang if (!MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) && 6102c16339b6SMark Zhang (log_num_strides < MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) 6103c16339b6SMark Zhang return false; 6104c16339b6SMark Zhang 6105c16339b6SMark Zhang return true; 6106c16339b6SMark Zhang } 6107c16339b6SMark Zhang 610879b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 610979b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 611079b20a6cSYishai Hadas struct ib_udata *udata, 611179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 611279b20a6cSYishai Hadas { 611379b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 611479b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 611579b20a6cSYishai Hadas int err; 611679b20a6cSYishai Hadas size_t required_cmd_sz; 611779b20a6cSYishai Hadas 6118ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 6119ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 612079b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 612179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 612279b20a6cSYishai Hadas return -EINVAL; 612379b20a6cSYishai Hadas } 612479b20a6cSYishai Hadas 612579b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 612679b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 612779b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 612879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 612979b20a6cSYishai Hadas return -EOPNOTSUPP; 613079b20a6cSYishai Hadas } 613179b20a6cSYishai Hadas 613279b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 613379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 613479b20a6cSYishai Hadas return -EFAULT; 613579b20a6cSYishai Hadas } 613679b20a6cSYishai Hadas 6137ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 613879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 613979b20a6cSYishai Hadas return -EOPNOTSUPP; 6140ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 6141ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 6142ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 614379b20a6cSYishai Hadas return -EOPNOTSUPP; 614479b20a6cSYishai Hadas } 6145ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 6146ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 6147ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 6148ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 6149ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 6150ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 6151ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 6152ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 6153ccc87087SNoa Osherovich return -EINVAL; 6154ccc87087SNoa Osherovich } 6155c16339b6SMark Zhang if (!log_of_strides_valid(dev, 6156c16339b6SMark Zhang ucmd.single_wqe_log_num_of_strides)) { 6157c16339b6SMark Zhang mlx5_ib_dbg( 6158c16339b6SMark Zhang dev, 6159c16339b6SMark Zhang "Invalid log num strides (%u. Range is %u - %u)\n", 6160ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 6161c16339b6SMark Zhang MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) ? 6162c16339b6SMark Zhang MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES : 6163ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 6164ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 6165ccc87087SNoa Osherovich return -EINVAL; 6166ccc87087SNoa Osherovich } 6167ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 6168ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 6169ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 6170ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 6171ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 6172ccc87087SNoa Osherovich } 617379b20a6cSYishai Hadas 617479b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 617579b20a6cSYishai Hadas if (err) { 617679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 617779b20a6cSYishai Hadas return err; 617879b20a6cSYishai Hadas } 617979b20a6cSYishai Hadas 6180b0ea0fa5SJason Gunthorpe err = create_user_rq(dev, pd, udata, rwq, &ucmd); 618179b20a6cSYishai Hadas if (err) { 618279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 618379b20a6cSYishai Hadas return err; 618479b20a6cSYishai Hadas } 618579b20a6cSYishai Hadas 618679b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 618779b20a6cSYishai Hadas return 0; 618879b20a6cSYishai Hadas } 618979b20a6cSYishai Hadas 619079b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 619179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 619279b20a6cSYishai Hadas struct ib_udata *udata) 619379b20a6cSYishai Hadas { 619479b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 619579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 619679b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 619779b20a6cSYishai Hadas size_t min_resp_len; 619879b20a6cSYishai Hadas int err; 619979b20a6cSYishai Hadas 620079b20a6cSYishai Hadas if (!udata) 620179b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 620279b20a6cSYishai Hadas 620379b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 620479b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 620579b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 620679b20a6cSYishai Hadas 6207ba80013fSMaor Gottlieb if (!capable(CAP_SYS_RAWIO) && 6208ba80013fSMaor Gottlieb init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) 6209ba80013fSMaor Gottlieb return ERR_PTR(-EPERM); 6210ba80013fSMaor Gottlieb 621179b20a6cSYishai Hadas dev = to_mdev(pd->device); 621279b20a6cSYishai Hadas switch (init_attr->wq_type) { 621379b20a6cSYishai Hadas case IB_WQT_RQ: 621479b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 621579b20a6cSYishai Hadas if (!rwq) 621679b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 621779b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 621879b20a6cSYishai Hadas if (err) 621979b20a6cSYishai Hadas goto err; 622079b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 622179b20a6cSYishai Hadas if (err) 622279b20a6cSYishai Hadas goto err_user_rq; 622379b20a6cSYishai Hadas break; 622479b20a6cSYishai Hadas default: 622579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 622679b20a6cSYishai Hadas init_attr->wq_type); 622779b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 622879b20a6cSYishai Hadas } 622979b20a6cSYishai Hadas 6230350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 623179b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 623279b20a6cSYishai Hadas if (udata->outlen) { 623379b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 623479b20a6cSYishai Hadas sizeof(resp.response_length); 623579b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 623679b20a6cSYishai Hadas if (err) 623779b20a6cSYishai Hadas goto err_copy; 623879b20a6cSYishai Hadas } 623979b20a6cSYishai Hadas 6240350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 6241350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 624279b20a6cSYishai Hadas return &rwq->ibwq; 624379b20a6cSYishai Hadas 624479b20a6cSYishai Hadas err_copy: 6245333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rwq->core_qp); 624679b20a6cSYishai Hadas err_user_rq: 6247bdeacabdSShamir Rabinovitch destroy_user_rq(dev, pd, rwq, udata); 624879b20a6cSYishai Hadas err: 624979b20a6cSYishai Hadas kfree(rwq); 625079b20a6cSYishai Hadas return ERR_PTR(err); 625179b20a6cSYishai Hadas } 625279b20a6cSYishai Hadas 6253a49b1dc7SLeon Romanovsky void mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata) 625479b20a6cSYishai Hadas { 625579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 625679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 625779b20a6cSYishai Hadas 6258333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rwq->core_qp); 6259bdeacabdSShamir Rabinovitch destroy_user_rq(dev, wq->pd, rwq, udata); 626079b20a6cSYishai Hadas kfree(rwq); 626179b20a6cSYishai Hadas } 626279b20a6cSYishai Hadas 6263c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 6264c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 6265c5f90929SYishai Hadas struct ib_udata *udata) 6266c5f90929SYishai Hadas { 6267c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 6268c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 6269c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 6270c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 6271c5f90929SYishai Hadas size_t min_resp_len; 6272c5f90929SYishai Hadas int inlen; 6273c5f90929SYishai Hadas int err; 6274c5f90929SYishai Hadas int i; 6275c5f90929SYishai Hadas u32 *in; 6276c5f90929SYishai Hadas void *rqtc; 6277c5f90929SYishai Hadas 6278c5f90929SYishai Hadas if (udata->inlen > 0 && 6279c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 6280c5f90929SYishai Hadas udata->inlen)) 6281c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 6282c5f90929SYishai Hadas 6283efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 6284efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 6285efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 6286efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 6287efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 6288efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 6289efd7f400SMaor Gottlieb } 6290efd7f400SMaor Gottlieb 6291c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 6292c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 6293c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 6294c5f90929SYishai Hadas 6295c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 6296c5f90929SYishai Hadas if (!rwq_ind_tbl) 6297c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 6298c5f90929SYishai Hadas 6299c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 63001b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 6301c5f90929SYishai Hadas if (!in) { 6302c5f90929SYishai Hadas err = -ENOMEM; 6303c5f90929SYishai Hadas goto err; 6304c5f90929SYishai Hadas } 6305c5f90929SYishai Hadas 6306c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 6307c5f90929SYishai Hadas 6308c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 6309c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 6310c5f90929SYishai Hadas 6311c5f90929SYishai Hadas for (i = 0; i < sz; i++) 6312c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 6313c5f90929SYishai Hadas 63145deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 63155deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 63165deba86eSYishai Hadas 6317c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 6318c5f90929SYishai Hadas kvfree(in); 6319c5f90929SYishai Hadas 6320c5f90929SYishai Hadas if (err) 6321c5f90929SYishai Hadas goto err; 6322c5f90929SYishai Hadas 6323c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 6324c5f90929SYishai Hadas if (udata->outlen) { 6325c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 6326c5f90929SYishai Hadas sizeof(resp.response_length); 6327c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 6328c5f90929SYishai Hadas if (err) 6329c5f90929SYishai Hadas goto err_copy; 6330c5f90929SYishai Hadas } 6331c5f90929SYishai Hadas 6332c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 6333c5f90929SYishai Hadas 6334c5f90929SYishai Hadas err_copy: 63355deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6336c5f90929SYishai Hadas err: 6337c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6338c5f90929SYishai Hadas return ERR_PTR(err); 6339c5f90929SYishai Hadas } 6340c5f90929SYishai Hadas 6341c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 6342c5f90929SYishai Hadas { 6343c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 6344c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 6345c5f90929SYishai Hadas 63465deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6347c5f90929SYishai Hadas 6348c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6349c5f90929SYishai Hadas return 0; 6350c5f90929SYishai Hadas } 6351c5f90929SYishai Hadas 635279b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 635379b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 635479b20a6cSYishai Hadas { 635579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 635679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 635779b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 635879b20a6cSYishai Hadas size_t required_cmd_sz; 635979b20a6cSYishai Hadas int curr_wq_state; 636079b20a6cSYishai Hadas int wq_state; 636179b20a6cSYishai Hadas int inlen; 636279b20a6cSYishai Hadas int err; 636379b20a6cSYishai Hadas void *rqc; 636479b20a6cSYishai Hadas void *in; 636579b20a6cSYishai Hadas 636679b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 636779b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 636879b20a6cSYishai Hadas return -EINVAL; 636979b20a6cSYishai Hadas 637079b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 637179b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 637279b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 637379b20a6cSYishai Hadas return -EOPNOTSUPP; 637479b20a6cSYishai Hadas 637579b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 637679b20a6cSYishai Hadas return -EFAULT; 637779b20a6cSYishai Hadas 637879b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 637979b20a6cSYishai Hadas return -EOPNOTSUPP; 638079b20a6cSYishai Hadas 638179b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 63821b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 638379b20a6cSYishai Hadas if (!in) 638479b20a6cSYishai Hadas return -ENOMEM; 638579b20a6cSYishai Hadas 638679b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 638779b20a6cSYishai Hadas 638879b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 638979b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 639079b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 639179b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 639279b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 639379b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 639479b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 639579b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 639679b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 639734d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 639879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 639979b20a6cSYishai Hadas 6400b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6401b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6402b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6403b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6404b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6405b1f74a84SNoa Osherovich "supported\n"); 6406b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6407b1f74a84SNoa Osherovich goto out; 6408b1f74a84SNoa Osherovich } 6409b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6410b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6411b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6412b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6413b1f74a84SNoa Osherovich } 6414b1383aa6SNoa Osherovich 6415b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6416b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6417b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6418b1383aa6SNoa Osherovich goto out; 6419b1383aa6SNoa Osherovich } 6420b1f74a84SNoa Osherovich } 6421b1f74a84SNoa Osherovich 642223a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 64233e1f000fSParav Pandit u16 set_id; 64243e1f000fSParav Pandit 64253e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, 0); 642623a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 642723a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 642823a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 64293e1f000fSParav Pandit MLX5_SET(rqc, rqc, counter_set_id, set_id); 643023a6964eSMajd Dibbiny } else 64315a738b5dSJason Gunthorpe dev_info_once( 64325a738b5dSJason Gunthorpe &dev->ib_dev.dev, 64335a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 643423a6964eSMajd Dibbiny } 643523a6964eSMajd Dibbiny 6436e0b4b472SLeon Romanovsky err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in); 643779b20a6cSYishai Hadas if (!err) 643879b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 643979b20a6cSYishai Hadas 6440b1f74a84SNoa Osherovich out: 6441b1f74a84SNoa Osherovich kvfree(in); 644279b20a6cSYishai Hadas return err; 644379b20a6cSYishai Hadas } 6444d0e84c0aSYishai Hadas 6445d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6446d0e84c0aSYishai Hadas struct ib_cqe cqe; 6447d0e84c0aSYishai Hadas struct completion done; 6448d0e84c0aSYishai Hadas }; 6449d0e84c0aSYishai Hadas 6450d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6451d0e84c0aSYishai Hadas { 6452d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6453d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6454d0e84c0aSYishai Hadas cqe); 6455d0e84c0aSYishai Hadas 6456d0e84c0aSYishai Hadas complete(&cqe->done); 6457d0e84c0aSYishai Hadas } 6458d0e84c0aSYishai Hadas 6459d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6460d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6461d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6462d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6463d0e84c0aSYishai Hadas { 6464d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6465d0e84c0aSYishai Hadas 6466d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6467d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6468d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6469d0e84c0aSYishai Hadas return; 6470d0e84c0aSYishai Hadas } 6471d0e84c0aSYishai Hadas 6472d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6473d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6474d0e84c0aSYishai Hadas bool triggered = false; 6475d0e84c0aSYishai Hadas unsigned long flags; 6476d0e84c0aSYishai Hadas 6477d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6478d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6479d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6480d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6481d0e84c0aSYishai Hadas else 6482d0e84c0aSYishai Hadas triggered = true; 6483d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6484d0e84c0aSYishai Hadas 6485d0e84c0aSYishai Hadas if (triggered) { 6486d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6487d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6488d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6489d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6490d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6491d0e84c0aSYishai Hadas break; 6492d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6493d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6494d0e84c0aSYishai Hadas break; 6495d0e84c0aSYishai Hadas default: 6496d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6497d0e84c0aSYishai Hadas } 6498d0e84c0aSYishai Hadas } 6499d0e84c0aSYishai Hadas 6500d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6501d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6502d0e84c0aSYishai Hadas */ 65034e0e2ea1SYishai Hadas mcq->mcq.comp(&mcq->mcq, NULL); 6504d0e84c0aSYishai Hadas } 6505d0e84c0aSYishai Hadas 6506d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6507d0e84c0aSYishai Hadas } 6508d0e84c0aSYishai Hadas 6509d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6510d0e84c0aSYishai Hadas { 6511d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6512d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6513d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6514d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6515d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6516d0e84c0aSYishai Hadas .wr = { 6517d0e84c0aSYishai Hadas .next = NULL, 6518d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6519d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6520d0e84c0aSYishai Hadas }, 6521d0e84c0aSYishai Hadas }; 6522d0e84c0aSYishai Hadas int ret; 6523d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6524d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6525d0e84c0aSYishai Hadas 6526d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6527d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6528d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6529d0e84c0aSYishai Hadas return; 6530d0e84c0aSYishai Hadas } 6531d0e84c0aSYishai Hadas 6532d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6533d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6534d0e84c0aSYishai Hadas 6535d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6536d0e84c0aSYishai Hadas if (ret) { 6537d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6538d0e84c0aSYishai Hadas return; 6539d0e84c0aSYishai Hadas } 6540d0e84c0aSYishai Hadas 6541d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6542d0e84c0aSYishai Hadas } 6543d0e84c0aSYishai Hadas 6544d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6545d0e84c0aSYishai Hadas { 6546d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6547d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6548d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6549d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6550d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6551d0e84c0aSYishai Hadas int ret; 6552d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6553d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6554d0e84c0aSYishai Hadas 6555d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6556d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6557d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6558d0e84c0aSYishai Hadas return; 6559d0e84c0aSYishai Hadas } 6560d0e84c0aSYishai Hadas 6561d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6562d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6563d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6564d0e84c0aSYishai Hadas 6565d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6566d0e84c0aSYishai Hadas if (ret) { 6567d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6568d0e84c0aSYishai Hadas return; 6569d0e84c0aSYishai Hadas } 6570d0e84c0aSYishai Hadas 6571d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6572d0e84c0aSYishai Hadas } 6573d14133ddSMark Zhang 6574d14133ddSMark Zhang /** 6575d14133ddSMark Zhang * Bind a qp to a counter. If @counter is NULL then bind the qp to 6576d14133ddSMark Zhang * the default counter 6577d14133ddSMark Zhang */ 6578d14133ddSMark Zhang int mlx5_ib_qp_set_counter(struct ib_qp *qp, struct rdma_counter *counter) 6579d14133ddSMark Zhang { 658010189e8eSMark Zhang struct mlx5_ib_dev *dev = to_mdev(qp->device); 6581d14133ddSMark Zhang struct mlx5_ib_qp *mqp = to_mqp(qp); 6582d14133ddSMark Zhang int err = 0; 6583d14133ddSMark Zhang 6584d14133ddSMark Zhang mutex_lock(&mqp->mutex); 6585d14133ddSMark Zhang if (mqp->state == IB_QPS_RESET) { 6586d14133ddSMark Zhang qp->counter = counter; 6587d14133ddSMark Zhang goto out; 6588d14133ddSMark Zhang } 6589d14133ddSMark Zhang 659010189e8eSMark Zhang if (!MLX5_CAP_GEN(dev->mdev, rts2rts_qp_counters_set_id)) { 659110189e8eSMark Zhang err = -EOPNOTSUPP; 659210189e8eSMark Zhang goto out; 659310189e8eSMark Zhang } 659410189e8eSMark Zhang 6595d14133ddSMark Zhang if (mqp->state == IB_QPS_RTS) { 6596d14133ddSMark Zhang err = __mlx5_ib_qp_set_counter(qp, counter); 6597d14133ddSMark Zhang if (!err) 6598d14133ddSMark Zhang qp->counter = counter; 6599d14133ddSMark Zhang 6600d14133ddSMark Zhang goto out; 6601d14133ddSMark Zhang } 6602d14133ddSMark Zhang 6603d14133ddSMark Zhang mqp->counter_pending = 1; 6604d14133ddSMark Zhang qp->counter = counter; 6605d14133ddSMark Zhang 6606d14133ddSMark Zhang out: 6607d14133ddSMark Zhang mutex_unlock(&mqp->mutex); 6608d14133ddSMark Zhang return err; 6609d14133ddSMark Zhang } 6610