1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111c1395a2aSHaggai Eran /** 112c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 113c1395a2aSHaggai Eran * 114c1395a2aSHaggai Eran * @qp: QP to copy from. 115c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 116c1395a2aSHaggai Eran * otherwise. 117c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 118c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 119c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 120c1395a2aSHaggai Eran * element in the queue. 121c1395a2aSHaggai Eran * @buffer: destination buffer. 122c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 123c1395a2aSHaggai Eran * 124c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 125c1395a2aSHaggai Eran * 126c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 127c1395a2aSHaggai Eran */ 128c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 12919098df2Smajd@mellanox.com void *buffer, u32 length, 13019098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 131c1395a2aSHaggai Eran { 132c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 133c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 134c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 135c1395a2aSHaggai Eran size_t offset; 136c1395a2aSHaggai Eran size_t wq_end; 13719098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 138c1395a2aSHaggai Eran u32 first_copy_length; 139c1395a2aSHaggai Eran int wqe_length; 140c1395a2aSHaggai Eran int ret; 141c1395a2aSHaggai Eran 142c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 143c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 144c1395a2aSHaggai Eran qp->ibqp.qp_type); 145c1395a2aSHaggai Eran return -EINVAL; 146c1395a2aSHaggai Eran } 147c1395a2aSHaggai Eran 148c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 149c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 150c1395a2aSHaggai Eran 151c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 152c1395a2aSHaggai Eran return -EINVAL; 153c1395a2aSHaggai Eran 154c1395a2aSHaggai Eran if (offset > umem->length || 155c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 156c1395a2aSHaggai Eran return -EINVAL; 157c1395a2aSHaggai Eran 158c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 159c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 160c1395a2aSHaggai Eran if (ret) 161c1395a2aSHaggai Eran return ret; 162c1395a2aSHaggai Eran 163c1395a2aSHaggai Eran if (send) { 164c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 165c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 166c1395a2aSHaggai Eran 167c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 168c1395a2aSHaggai Eran } else { 169c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 170c1395a2aSHaggai Eran } 171c1395a2aSHaggai Eran 172c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 173c1395a2aSHaggai Eran return first_copy_length; 174c1395a2aSHaggai Eran 175c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 176c1395a2aSHaggai Eran wqe_length - first_copy_length); 177c1395a2aSHaggai Eran if (ret) 178c1395a2aSHaggai Eran return ret; 179c1395a2aSHaggai Eran 180c1395a2aSHaggai Eran return wqe_length; 181c1395a2aSHaggai Eran } 182c1395a2aSHaggai Eran 183e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 184e126ba97SEli Cohen { 185e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 186e126ba97SEli Cohen struct ib_event event; 187e126ba97SEli Cohen 18819098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 18919098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 19019098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 19119098df2Smajd@mellanox.com } 192e126ba97SEli Cohen 193e126ba97SEli Cohen if (ibqp->event_handler) { 194e126ba97SEli Cohen event.device = ibqp->device; 195e126ba97SEli Cohen event.element.qp = ibqp; 196e126ba97SEli Cohen switch (type) { 197e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 198e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 199e126ba97SEli Cohen break; 200e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 201e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 202e126ba97SEli Cohen break; 203e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 204e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 205e126ba97SEli Cohen break; 206e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 207e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 208e126ba97SEli Cohen break; 209e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 210e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 211e126ba97SEli Cohen break; 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 213e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 216e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 217e126ba97SEli Cohen break; 218e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 219e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 220e126ba97SEli Cohen break; 221e126ba97SEli Cohen default: 222e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 223e126ba97SEli Cohen return; 224e126ba97SEli Cohen } 225e126ba97SEli Cohen 226e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 227e126ba97SEli Cohen } 228e126ba97SEli Cohen } 229e126ba97SEli Cohen 230e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 231e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 232e126ba97SEli Cohen { 233e126ba97SEli Cohen int wqe_size; 234e126ba97SEli Cohen int wq_size; 235e126ba97SEli Cohen 236e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 237938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 238e126ba97SEli Cohen return -EINVAL; 239e126ba97SEli Cohen 240e126ba97SEli Cohen if (!has_rq) { 241e126ba97SEli Cohen qp->rq.max_gs = 0; 242e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 243e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2440540d814SNoa Osherovich cap->max_recv_wr = 0; 2450540d814SNoa Osherovich cap->max_recv_sge = 0; 246e126ba97SEli Cohen } else { 247e126ba97SEli Cohen if (ucmd) { 248e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 249002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 250002bf228SLeon Romanovsky return -EINVAL; 251e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 252002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 253002bf228SLeon Romanovsky return -EINVAL; 254e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 255e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 256e126ba97SEli Cohen } else { 257e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 258e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 259e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 260e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 261e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 262e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 263938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 264e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 265e126ba97SEli Cohen wqe_size, 266938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 267938fe83cSSaeed Mahameed max_wqe_sz_rq)); 268e126ba97SEli Cohen return -EINVAL; 269e126ba97SEli Cohen } 270e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 271e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 272e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 273e126ba97SEli Cohen } 274e126ba97SEli Cohen } 275e126ba97SEli Cohen 276e126ba97SEli Cohen return 0; 277e126ba97SEli Cohen } 278e126ba97SEli Cohen 279f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 280e126ba97SEli Cohen { 281618af384SAndi Shyti int size = 0; 282e126ba97SEli Cohen 283f0313965SErez Shitrit switch (attr->qp_type) { 284e126ba97SEli Cohen case IB_QPT_XRC_INI: 285b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 286e126ba97SEli Cohen /* fall through */ 287e126ba97SEli Cohen case IB_QPT_RC: 288e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 28975c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 29075c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 29175c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 292064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 293064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 294064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 295e126ba97SEli Cohen break; 296e126ba97SEli Cohen 297b125a54bSEli Cohen case IB_QPT_XRC_TGT: 298b125a54bSEli Cohen return 0; 299b125a54bSEli Cohen 300e126ba97SEli Cohen case IB_QPT_UC: 301b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30275c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3039e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 30475c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 305e126ba97SEli Cohen break; 306e126ba97SEli Cohen 307e126ba97SEli Cohen case IB_QPT_UD: 308f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 309f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 310f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 311f0313965SErez Shitrit /* fall through */ 312e126ba97SEli Cohen case IB_QPT_SMI: 313d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 314b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 315e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 316e126ba97SEli Cohen break; 317e126ba97SEli Cohen 318e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 319b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 320e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 321e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 322e126ba97SEli Cohen break; 323e126ba97SEli Cohen 324e126ba97SEli Cohen default: 325e126ba97SEli Cohen return -EINVAL; 326e126ba97SEli Cohen } 327e126ba97SEli Cohen 328e126ba97SEli Cohen return size; 329e126ba97SEli Cohen } 330e126ba97SEli Cohen 331e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 332e126ba97SEli Cohen { 333e126ba97SEli Cohen int inl_size = 0; 334e126ba97SEli Cohen int size; 335e126ba97SEli Cohen 336f0313965SErez Shitrit size = sq_overhead(attr); 337e126ba97SEli Cohen if (size < 0) 338e126ba97SEli Cohen return size; 339e126ba97SEli Cohen 340e126ba97SEli Cohen if (attr->cap.max_inline_data) { 341e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 342e126ba97SEli Cohen attr->cap.max_inline_data; 343e126ba97SEli Cohen } 344e126ba97SEli Cohen 345e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 346e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 347e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 348e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 349e1e66cc2SSagi Grimberg else 350e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 351e126ba97SEli Cohen } 352e126ba97SEli Cohen 353288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 354288c01b7SEli Cohen { 355288c01b7SEli Cohen int max_sge; 356288c01b7SEli Cohen 357288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 358288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 359288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 360288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 361288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 362288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 363288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 364288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 365288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 366288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 367288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 368288c01b7SEli Cohen else 369288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 370288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 371288c01b7SEli Cohen 372288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 373288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 374288c01b7SEli Cohen } 375288c01b7SEli Cohen 376e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 377e126ba97SEli Cohen struct mlx5_ib_qp *qp) 378e126ba97SEli Cohen { 379e126ba97SEli Cohen int wqe_size; 380e126ba97SEli Cohen int wq_size; 381e126ba97SEli Cohen 382e126ba97SEli Cohen if (!attr->cap.max_send_wr) 383e126ba97SEli Cohen return 0; 384e126ba97SEli Cohen 385e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 386e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 387e126ba97SEli Cohen if (wqe_size < 0) 388e126ba97SEli Cohen return wqe_size; 389e126ba97SEli Cohen 390938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 391b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 392938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 393e126ba97SEli Cohen return -EINVAL; 394e126ba97SEli Cohen } 395e126ba97SEli Cohen 396f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 397e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 398e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 399e126ba97SEli Cohen 400e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 401e1e66cc2SSagi Grimberg qp->signature_en = true; 402e1e66cc2SSagi Grimberg 403e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 404e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 405938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4061974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4071974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 408938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 409938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 410b125a54bSEli Cohen return -ENOMEM; 411b125a54bSEli Cohen } 412e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 413288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 414288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 415288c01b7SEli Cohen return -ENOMEM; 416288c01b7SEli Cohen 417288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 418b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 419b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 420e126ba97SEli Cohen 421e126ba97SEli Cohen return wq_size; 422e126ba97SEli Cohen } 423e126ba97SEli Cohen 424e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 425e126ba97SEli Cohen struct mlx5_ib_qp *qp, 42619098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4270fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4280fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 429e126ba97SEli Cohen { 430e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 431e126ba97SEli Cohen 432938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 433e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 434938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 435e126ba97SEli Cohen return -EINVAL; 436e126ba97SEli Cohen } 437e126ba97SEli Cohen 438e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 439e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 440e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 441e126ba97SEli Cohen return -EINVAL; 442e126ba97SEli Cohen } 443e126ba97SEli Cohen 444e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 445e126ba97SEli Cohen 446938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 447e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 448938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 449938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 450e126ba97SEli Cohen return -EINVAL; 451e126ba97SEli Cohen } 452e126ba97SEli Cohen 453c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 454c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4550fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4560fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4570fb2ed66Smajd@mellanox.com } else { 45819098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 459e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4600fb2ed66Smajd@mellanox.com } 461e126ba97SEli Cohen 462e126ba97SEli Cohen return 0; 463e126ba97SEli Cohen } 464e126ba97SEli Cohen 465e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 466e126ba97SEli Cohen { 467e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 468e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 469e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 470e126ba97SEli Cohen !attr->cap.max_recv_wr) 471e126ba97SEli Cohen return 0; 472e126ba97SEli Cohen 473e126ba97SEli Cohen return 1; 474e126ba97SEli Cohen } 475e126ba97SEli Cohen 4760b80c14fSEli Cohen enum { 4770b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4780b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4790b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4800b80c14fSEli Cohen * "odd/even" order 4810b80c14fSEli Cohen */ 4820b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4830b80c14fSEli Cohen }; 4840b80c14fSEli Cohen 485b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 486b037c29aSEli Cohen { 48731a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 488b037c29aSEli Cohen } 489b037c29aSEli Cohen 490b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 491b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 492c1be5232SEli Cohen { 493c1be5232SEli Cohen int n; 494c1be5232SEli Cohen 495b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 496b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 497c1be5232SEli Cohen 498c1be5232SEli Cohen return n >= 0 ? n : 0; 499c1be5232SEli Cohen } 500c1be5232SEli Cohen 50118b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 50218b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 50318b0362eSYishai Hadas { 50418b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 50518b0362eSYishai Hadas } 50618b0362eSYishai Hadas 507b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 508b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 509c1be5232SEli Cohen { 510c1be5232SEli Cohen int med; 511c1be5232SEli Cohen 512b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 513b037c29aSEli Cohen return ++med; 514c1be5232SEli Cohen } 515c1be5232SEli Cohen 516b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 517b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 518e126ba97SEli Cohen { 519e126ba97SEli Cohen int i; 520e126ba97SEli Cohen 521b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 522b037c29aSEli Cohen if (!bfregi->count[i]) { 5232f5ff264SEli Cohen bfregi->count[i]++; 524e126ba97SEli Cohen return i; 525e126ba97SEli Cohen } 526e126ba97SEli Cohen } 527e126ba97SEli Cohen 528e126ba97SEli Cohen return -ENOMEM; 529e126ba97SEli Cohen } 530e126ba97SEli Cohen 531b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 532b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 533e126ba97SEli Cohen { 53418b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 535e126ba97SEli Cohen int i; 536e126ba97SEli Cohen 53718b0362eSYishai Hadas if (minidx < 0) 53818b0362eSYishai Hadas return minidx; 53918b0362eSYishai Hadas 54018b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 5412f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 542e126ba97SEli Cohen minidx = i; 5430b80c14fSEli Cohen if (!bfregi->count[minidx]) 5440b80c14fSEli Cohen break; 545e126ba97SEli Cohen } 546e126ba97SEli Cohen 5472f5ff264SEli Cohen bfregi->count[minidx]++; 548e126ba97SEli Cohen return minidx; 549e126ba97SEli Cohen } 550e126ba97SEli Cohen 551b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 552ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 553e126ba97SEli Cohen { 554ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 555e126ba97SEli Cohen 5562f5ff264SEli Cohen mutex_lock(&bfregi->lock); 557ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 558ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 559ffaf58deSLeon Romanovsky if (bfregn < 0) 560ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 561ffaf58deSLeon Romanovsky } 562ffaf58deSLeon Romanovsky 563ffaf58deSLeon Romanovsky if (bfregn < 0) { 5640b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5652f5ff264SEli Cohen bfregn = 0; 5662f5ff264SEli Cohen bfregi->count[bfregn]++; 567e126ba97SEli Cohen } 5682f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 569e126ba97SEli Cohen 5702f5ff264SEli Cohen return bfregn; 571e126ba97SEli Cohen } 572e126ba97SEli Cohen 5734ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 574e126ba97SEli Cohen { 5752f5ff264SEli Cohen mutex_lock(&bfregi->lock); 576b037c29aSEli Cohen bfregi->count[bfregn]--; 5772f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 578e126ba97SEli Cohen } 579e126ba97SEli Cohen 580e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 581e126ba97SEli Cohen { 582e126ba97SEli Cohen switch (state) { 583e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 584e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 585e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 586e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 587e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 588e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 589e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 590e126ba97SEli Cohen default: return -1; 591e126ba97SEli Cohen } 592e126ba97SEli Cohen } 593e126ba97SEli Cohen 594e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 595e126ba97SEli Cohen { 596e126ba97SEli Cohen switch (type) { 597e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 598e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 599e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 600e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 601e126ba97SEli Cohen case IB_QPT_XRC_INI: 602e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 603e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 604d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 605c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 606e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 607e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6080fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 609e126ba97SEli Cohen case IB_QPT_MAX: 610e126ba97SEli Cohen default: return -EINVAL; 611e126ba97SEli Cohen } 612e126ba97SEli Cohen } 613e126ba97SEli Cohen 61489ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 61589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 61689ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 61789ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 61889ea94a7SMaor Gottlieb 6197c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 62005f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 6211ee47ab3SYishai Hadas bool dyn_bfreg) 622e126ba97SEli Cohen { 62305f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 62405f58cebSLeon Romanovsky u32 index_of_sys_page; 62505f58cebSLeon Romanovsky u32 offset; 626b037c29aSEli Cohen 627b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 628b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 629b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 630b037c29aSEli Cohen 63105f58cebSLeon Romanovsky if (dyn_bfreg) { 63205f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 63305f58cebSLeon Romanovsky 6347c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 6357c043e90SYishai Hadas return -EINVAL; 6367c043e90SYishai Hadas 6371ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6381ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6391ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6401ee47ab3SYishai Hadas return -EINVAL; 6411ee47ab3SYishai Hadas } 6421ee47ab3SYishai Hadas } 643b037c29aSEli Cohen 6441ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 645b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 646e126ba97SEli Cohen } 647e126ba97SEli Cohen 64819098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 64919098df2Smajd@mellanox.com struct ib_pd *pd, 65019098df2Smajd@mellanox.com unsigned long addr, size_t size, 65119098df2Smajd@mellanox.com struct ib_umem **umem, 65219098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 65319098df2Smajd@mellanox.com u32 *offset) 65419098df2Smajd@mellanox.com { 65519098df2Smajd@mellanox.com int err; 65619098df2Smajd@mellanox.com 65719098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 65819098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 65919098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 66019098df2Smajd@mellanox.com return PTR_ERR(*umem); 66119098df2Smajd@mellanox.com } 66219098df2Smajd@mellanox.com 663762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 66419098df2Smajd@mellanox.com 66519098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 66619098df2Smajd@mellanox.com if (err) { 66719098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 66819098df2Smajd@mellanox.com goto err_umem; 66919098df2Smajd@mellanox.com } 67019098df2Smajd@mellanox.com 67119098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 67219098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 67319098df2Smajd@mellanox.com 67419098df2Smajd@mellanox.com return 0; 67519098df2Smajd@mellanox.com 67619098df2Smajd@mellanox.com err_umem: 67719098df2Smajd@mellanox.com ib_umem_release(*umem); 67819098df2Smajd@mellanox.com *umem = NULL; 67919098df2Smajd@mellanox.com 68019098df2Smajd@mellanox.com return err; 68119098df2Smajd@mellanox.com } 68219098df2Smajd@mellanox.com 683fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 684fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 68579b20a6cSYishai Hadas { 68679b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 68779b20a6cSYishai Hadas 688fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 689fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 690fe248c3aSMaor Gottlieb 69179b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 69279b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 69379b20a6cSYishai Hadas if (rwq->umem) 69479b20a6cSYishai Hadas ib_umem_release(rwq->umem); 69579b20a6cSYishai Hadas } 69679b20a6cSYishai Hadas 69779b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 69879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 69979b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 70079b20a6cSYishai Hadas { 70179b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70279b20a6cSYishai Hadas int page_shift = 0; 70379b20a6cSYishai Hadas int npages; 70479b20a6cSYishai Hadas u32 offset = 0; 70579b20a6cSYishai Hadas int ncont = 0; 70679b20a6cSYishai Hadas int err; 70779b20a6cSYishai Hadas 70879b20a6cSYishai Hadas if (!ucmd->buf_addr) 70979b20a6cSYishai Hadas return -EINVAL; 71079b20a6cSYishai Hadas 71179b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 71279b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 71379b20a6cSYishai Hadas rwq->buf_size, 0, 0); 71479b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 71579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 71679b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 71779b20a6cSYishai Hadas return err; 71879b20a6cSYishai Hadas } 71979b20a6cSYishai Hadas 720762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 72179b20a6cSYishai Hadas &ncont, NULL); 72279b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 72379b20a6cSYishai Hadas &rwq->rq_page_offset); 72479b20a6cSYishai Hadas if (err) { 72579b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 72679b20a6cSYishai Hadas goto err_umem; 72779b20a6cSYishai Hadas } 72879b20a6cSYishai Hadas 72979b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 73079b20a6cSYishai Hadas rwq->page_shift = page_shift; 73179b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 73279b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 73379b20a6cSYishai Hadas 73479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 73579b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 73679b20a6cSYishai Hadas npages, page_shift, ncont, offset); 73779b20a6cSYishai Hadas 73879b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 73979b20a6cSYishai Hadas if (err) { 74079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 74179b20a6cSYishai Hadas goto err_umem; 74279b20a6cSYishai Hadas } 74379b20a6cSYishai Hadas 74479b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 74579b20a6cSYishai Hadas return 0; 74679b20a6cSYishai Hadas 74779b20a6cSYishai Hadas err_umem: 74879b20a6cSYishai Hadas ib_umem_release(rwq->umem); 74979b20a6cSYishai Hadas return err; 75079b20a6cSYishai Hadas } 75179b20a6cSYishai Hadas 752b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 753b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 754b037c29aSEli Cohen { 755b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 756b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 757b037c29aSEli Cohen } 758b037c29aSEli Cohen 759e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 760e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7610fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 76209a7d9ecSSaeed Mahameed u32 **in, 76319098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 76419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 765e126ba97SEli Cohen { 766e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 767e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 76819098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7699e9c47d0SEli Cohen int page_shift = 0; 7701ee47ab3SYishai Hadas int uar_index = 0; 771e126ba97SEli Cohen int npages; 7729e9c47d0SEli Cohen u32 offset = 0; 7732f5ff264SEli Cohen int bfregn; 7749e9c47d0SEli Cohen int ncont = 0; 77509a7d9ecSSaeed Mahameed __be64 *pas; 77609a7d9ecSSaeed Mahameed void *qpc; 777e126ba97SEli Cohen int err; 7785aa3771dSYishai Hadas u16 uid; 779e126ba97SEli Cohen 780e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 781e126ba97SEli Cohen if (err) { 782e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 783e126ba97SEli Cohen return err; 784e126ba97SEli Cohen } 785e126ba97SEli Cohen 786e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 7871ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 7881ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 7891ee47ab3SYishai Hadas ucmd.bfreg_index, true); 7901ee47ab3SYishai Hadas if (uar_index < 0) 7911ee47ab3SYishai Hadas return uar_index; 7921ee47ab3SYishai Hadas 7931ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 7941ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 795e126ba97SEli Cohen /* 796e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 797e126ba97SEli Cohen */ 798051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 7992f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8001ee47ab3SYishai Hadas } 801051f2630SLeon Romanovsky else { 802ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 803ffaf58deSLeon Romanovsky if (bfregn < 0) 8042f5ff264SEli Cohen return bfregn; 805e126ba97SEli Cohen } 806e126ba97SEli Cohen 8072f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8081ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8091ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8101ee47ab3SYishai Hadas false); 811e126ba97SEli Cohen 81248fea837SHaggai Eran qp->rq.offset = 0; 81348fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 81448fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 81548fea837SHaggai Eran 8160fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 817e126ba97SEli Cohen if (err) 8182f5ff264SEli Cohen goto err_bfreg; 819e126ba97SEli Cohen 82019098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 82119098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 82219098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 82319098df2Smajd@mellanox.com ubuffer->buf_size, 82419098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 82519098df2Smajd@mellanox.com &ncont, &offset); 82619098df2Smajd@mellanox.com if (err) 8272f5ff264SEli Cohen goto err_bfreg; 8289e9c47d0SEli Cohen } else { 82919098df2Smajd@mellanox.com ubuffer->umem = NULL; 8309e9c47d0SEli Cohen } 831e126ba97SEli Cohen 83209a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 83309a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8341b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 835e126ba97SEli Cohen if (!*in) { 836e126ba97SEli Cohen err = -ENOMEM; 837e126ba97SEli Cohen goto err_umem; 838e126ba97SEli Cohen } 839e126ba97SEli Cohen 8407422edceSYishai Hadas uid = (attr->qp_type != IB_QPT_XRC_TGT && 8417422edceSYishai Hadas attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 8425aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 84309a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 84409a7d9ecSSaeed Mahameed if (ubuffer->umem) 84509a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 84609a7d9ecSSaeed Mahameed 84709a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 84809a7d9ecSSaeed Mahameed 84909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 85009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 85109a7d9ecSSaeed Mahameed 85209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8531ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 854b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8551ee47ab3SYishai Hadas else 8561ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8572f5ff264SEli Cohen qp->bfregn = bfregn; 858e126ba97SEli Cohen 859e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 860e126ba97SEli Cohen if (err) { 861e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 862e126ba97SEli Cohen goto err_free; 863e126ba97SEli Cohen } 864e126ba97SEli Cohen 86541d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 866e126ba97SEli Cohen if (err) { 867e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 868e126ba97SEli Cohen goto err_unmap; 869e126ba97SEli Cohen } 870e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 871e126ba97SEli Cohen 872e126ba97SEli Cohen return 0; 873e126ba97SEli Cohen 874e126ba97SEli Cohen err_unmap: 875e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 876e126ba97SEli Cohen 877e126ba97SEli Cohen err_free: 878479163f4SAl Viro kvfree(*in); 879e126ba97SEli Cohen 880e126ba97SEli Cohen err_umem: 88119098df2Smajd@mellanox.com if (ubuffer->umem) 88219098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 883e126ba97SEli Cohen 8842f5ff264SEli Cohen err_bfreg: 8851ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8864ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 887e126ba97SEli Cohen return err; 888e126ba97SEli Cohen } 889e126ba97SEli Cohen 890b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 891b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 892e126ba97SEli Cohen { 893e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 894e126ba97SEli Cohen 895e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 896e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 89719098df2Smajd@mellanox.com if (base->ubuffer.umem) 89819098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 8991ee47ab3SYishai Hadas 9001ee47ab3SYishai Hadas /* 9011ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9021ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9031ee47ab3SYishai Hadas */ 9041ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9054ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 906e126ba97SEli Cohen } 907e126ba97SEli Cohen 90834f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 90934f4c955SGuy Levi * 91034f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 91134f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 91234f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 91334f4c955SGuy Levi * simply should check if it gets to an edge. 91434f4c955SGuy Levi * 91534f4c955SGuy Levi * @sq - SQ buffer. 91634f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 91734f4c955SGuy Levi * 91834f4c955SGuy Levi * Return: 91934f4c955SGuy Levi * The new edge. 92034f4c955SGuy Levi */ 92134f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 92234f4c955SGuy Levi { 92334f4c955SGuy Levi void *fragment_end; 92434f4c955SGuy Levi 92534f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 92634f4c955SGuy Levi (&sq->fbc, 92734f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 92834f4c955SGuy Levi 92934f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 93034f4c955SGuy Levi } 93134f4c955SGuy Levi 932e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 933e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 934e126ba97SEli Cohen struct mlx5_ib_qp *qp, 93509a7d9ecSSaeed Mahameed u32 **in, int *inlen, 93619098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 937e126ba97SEli Cohen { 938e126ba97SEli Cohen int uar_index; 93909a7d9ecSSaeed Mahameed void *qpc; 940e126ba97SEli Cohen int err; 941e126ba97SEli Cohen 942f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 943f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 944b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 94593d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 946b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9471a4c3a3dSEli Cohen return -EINVAL; 948e126ba97SEli Cohen 949e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9505fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9515fe9dec0SEli Cohen else 9525fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 953e126ba97SEli Cohen 954d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 955d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 956d8030b0dSEli Cohen */ 957d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9585fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 959e126ba97SEli Cohen 960e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 961e126ba97SEli Cohen if (err < 0) { 962e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9635fe9dec0SEli Cohen return err; 964e126ba97SEli Cohen } 965e126ba97SEli Cohen 966e126ba97SEli Cohen qp->rq.offset = 0; 967e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 96819098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 969e126ba97SEli Cohen 97034f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 97134f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 972e126ba97SEli Cohen if (err) { 973e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9745fe9dec0SEli Cohen return err; 975e126ba97SEli Cohen } 976e126ba97SEli Cohen 97734f4c955SGuy Levi if (qp->rq.wqe_cnt) 97834f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 97934f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 98034f4c955SGuy Levi 98134f4c955SGuy Levi if (qp->sq.wqe_cnt) { 98234f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 98334f4c955SGuy Levi MLX5_SEND_WQE_BB; 98434f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 98534f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 98634f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 98734f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 98834f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 98934f4c955SGuy Levi 99034f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 99134f4c955SGuy Levi } 99234f4c955SGuy Levi 99309a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 99409a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9951b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 996e126ba97SEli Cohen if (!*in) { 997e126ba97SEli Cohen err = -ENOMEM; 998e126ba97SEli Cohen goto err_buf; 999e126ba97SEli Cohen } 100009a7d9ecSSaeed Mahameed 100109a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 100209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 100309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 100409a7d9ecSSaeed Mahameed 1005e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 100609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 100709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1008e126ba97SEli Cohen 1009b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 101009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1011b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1012b11a4f9cSHaggai Eran } 1013b11a4f9cSHaggai Eran 101434f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 101534f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 101634f4c955SGuy Levi *in, pas)); 1017e126ba97SEli Cohen 10189603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1019e126ba97SEli Cohen if (err) { 1020e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1021e126ba97SEli Cohen goto err_free; 1022e126ba97SEli Cohen } 1023e126ba97SEli Cohen 1024b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1025b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1026b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1027b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1028b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1029b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1030b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1031b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1032b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1033b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1034e126ba97SEli Cohen 1035e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1036e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1037e126ba97SEli Cohen err = -ENOMEM; 1038e126ba97SEli Cohen goto err_wrid; 1039e126ba97SEli Cohen } 1040e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1041e126ba97SEli Cohen 1042e126ba97SEli Cohen return 0; 1043e126ba97SEli Cohen 1044e126ba97SEli Cohen err_wrid: 1045b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1046b5883008SLi Dongyang kvfree(qp->sq.w_list); 1047b5883008SLi Dongyang kvfree(qp->sq.wrid); 1048b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1049b5883008SLi Dongyang kvfree(qp->rq.wrid); 1050f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1051e126ba97SEli Cohen 1052e126ba97SEli Cohen err_free: 1053479163f4SAl Viro kvfree(*in); 1054e126ba97SEli Cohen 1055e126ba97SEli Cohen err_buf: 105634f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1057e126ba97SEli Cohen return err; 1058e126ba97SEli Cohen } 1059e126ba97SEli Cohen 1060e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1061e126ba97SEli Cohen { 1062b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1063b5883008SLi Dongyang kvfree(qp->sq.w_list); 1064b5883008SLi Dongyang kvfree(qp->sq.wrid); 1065b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1066b5883008SLi Dongyang kvfree(qp->rq.wrid); 1067f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 106834f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1069e126ba97SEli Cohen } 1070e126ba97SEli Cohen 107109a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1072e126ba97SEli Cohen { 1073e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1074c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1075e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 107609a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1077e126ba97SEli Cohen else if (!qp->has_rq) 107809a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1079e126ba97SEli Cohen else 108009a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1081e126ba97SEli Cohen } 1082e126ba97SEli Cohen 1083e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1084e126ba97SEli Cohen { 10855d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 10865d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1087e126ba97SEli Cohen return 1; 1088e126ba97SEli Cohen 1089e126ba97SEli Cohen return 0; 1090e126ba97SEli Cohen } 1091e126ba97SEli Cohen 10920fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1093c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10941cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 10951cd6dbd3SYishai Hadas struct ib_pd *pd) 10960fb2ed66Smajd@mellanox.com { 1097c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10980fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10990fb2ed66Smajd@mellanox.com 11001cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 11010fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1102c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1103c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1104c2e53b2cSYishai Hadas 11050fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 11060fb2ed66Smajd@mellanox.com } 11070fb2ed66Smajd@mellanox.com 11080fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 11091cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 11100fb2ed66Smajd@mellanox.com { 11111cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 11120fb2ed66Smajd@mellanox.com } 11130fb2ed66Smajd@mellanox.com 1114b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1115b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1116b96c9ddeSMark Bloch { 1117b96c9ddeSMark Bloch if (sq->flow_rule) 1118b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1119b96c9ddeSMark Bloch } 1120b96c9ddeSMark Bloch 11210fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11220fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 11230fb2ed66Smajd@mellanox.com struct ib_pd *pd) 11240fb2ed66Smajd@mellanox.com { 11250fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 11260fb2ed66Smajd@mellanox.com __be64 *pas; 11270fb2ed66Smajd@mellanox.com void *in; 11280fb2ed66Smajd@mellanox.com void *sqc; 11290fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11300fb2ed66Smajd@mellanox.com void *wq; 11310fb2ed66Smajd@mellanox.com int inlen; 11320fb2ed66Smajd@mellanox.com int err; 11330fb2ed66Smajd@mellanox.com int page_shift = 0; 11340fb2ed66Smajd@mellanox.com int npages; 11350fb2ed66Smajd@mellanox.com int ncont = 0; 11360fb2ed66Smajd@mellanox.com u32 offset = 0; 11370fb2ed66Smajd@mellanox.com 11380fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11390fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11400fb2ed66Smajd@mellanox.com &ncont, &offset); 11410fb2ed66Smajd@mellanox.com if (err) 11420fb2ed66Smajd@mellanox.com return err; 11430fb2ed66Smajd@mellanox.com 11440fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11451b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11460fb2ed66Smajd@mellanox.com if (!in) { 11470fb2ed66Smajd@mellanox.com err = -ENOMEM; 11480fb2ed66Smajd@mellanox.com goto err_umem; 11490fb2ed66Smajd@mellanox.com } 11500fb2ed66Smajd@mellanox.com 1151c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 11520fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11530fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1154795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1155795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11560fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11570fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11580fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11590fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11600fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 116196dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 116296dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 116396dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11640fb2ed66Smajd@mellanox.com 11650fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11660fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11670fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11680fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11690fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11700fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11710fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11720fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11730fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11740fb2ed66Smajd@mellanox.com 11750fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11760fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11770fb2ed66Smajd@mellanox.com 11780fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11790fb2ed66Smajd@mellanox.com 11800fb2ed66Smajd@mellanox.com kvfree(in); 11810fb2ed66Smajd@mellanox.com 11820fb2ed66Smajd@mellanox.com if (err) 11830fb2ed66Smajd@mellanox.com goto err_umem; 11840fb2ed66Smajd@mellanox.com 1185b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1186b96c9ddeSMark Bloch if (err) 1187b96c9ddeSMark Bloch goto err_flow; 1188b96c9ddeSMark Bloch 11890fb2ed66Smajd@mellanox.com return 0; 11900fb2ed66Smajd@mellanox.com 1191b96c9ddeSMark Bloch err_flow: 1192b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1193b96c9ddeSMark Bloch 11940fb2ed66Smajd@mellanox.com err_umem: 11950fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11960fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11970fb2ed66Smajd@mellanox.com 11980fb2ed66Smajd@mellanox.com return err; 11990fb2ed66Smajd@mellanox.com } 12000fb2ed66Smajd@mellanox.com 12010fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 12020fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 12030fb2ed66Smajd@mellanox.com { 1204b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 12050fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 12060fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 12070fb2ed66Smajd@mellanox.com } 12080fb2ed66Smajd@mellanox.com 12092c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 12100fb2ed66Smajd@mellanox.com { 12110fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 12120fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 12130fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 12140fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 12150fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 12160fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 12170fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 12180fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 12190fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 12200fb2ed66Smajd@mellanox.com 12210fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 12220fb2ed66Smajd@mellanox.com } 12230fb2ed66Smajd@mellanox.com 12240fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12252c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 122634d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 12270fb2ed66Smajd@mellanox.com { 1228358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12290fb2ed66Smajd@mellanox.com __be64 *pas; 12300fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12310fb2ed66Smajd@mellanox.com void *in; 12320fb2ed66Smajd@mellanox.com void *rqc; 12330fb2ed66Smajd@mellanox.com void *wq; 12340fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12352c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12362c292dbbSBoris Pismenny size_t inlen; 12370fb2ed66Smajd@mellanox.com int err; 12382c292dbbSBoris Pismenny 12392c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12402c292dbbSBoris Pismenny return -EINVAL; 12410fb2ed66Smajd@mellanox.com 12420fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12431b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12440fb2ed66Smajd@mellanox.com if (!in) 12450fb2ed66Smajd@mellanox.com return -ENOMEM; 12460fb2ed66Smajd@mellanox.com 124734d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 12480fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1249e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12500fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12510fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12520fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12530fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12540fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12550fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12560fb2ed66Smajd@mellanox.com 1257358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1258358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1259358e42eaSMajd Dibbiny 12600fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12610fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1262b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1263b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12650fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12660fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12670fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12680fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12690fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12700fb2ed66Smajd@mellanox.com 12710fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12720fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12730fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12740fb2ed66Smajd@mellanox.com 12750fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12760fb2ed66Smajd@mellanox.com 12770fb2ed66Smajd@mellanox.com kvfree(in); 12780fb2ed66Smajd@mellanox.com 12790fb2ed66Smajd@mellanox.com return err; 12800fb2ed66Smajd@mellanox.com } 12810fb2ed66Smajd@mellanox.com 12820fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12830fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12840fb2ed66Smajd@mellanox.com { 12850fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12860fb2ed66Smajd@mellanox.com } 12870fb2ed66Smajd@mellanox.com 1288f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1289f95ef6cbSMaor Gottlieb { 1290f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1291f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1292f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1293f95ef6cbSMaor Gottlieb } 1294f95ef6cbSMaor Gottlieb 12950042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12960042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1297443c1cf9SYishai Hadas u32 qp_flags_en, 1298443c1cf9SYishai Hadas struct ib_pd *pd) 12990042f9e4SMark Bloch { 13000042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 13010042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 13020042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1303443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 13040042f9e4SMark Bloch } 13050042f9e4SMark Bloch 13060fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1307f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1308443c1cf9SYishai Hadas u32 *qp_flags_en, 1309443c1cf9SYishai Hadas struct ib_pd *pd) 13100fb2ed66Smajd@mellanox.com { 1311175edba8SMark Bloch u8 lb_flag = 0; 13120fb2ed66Smajd@mellanox.com u32 *in; 13130fb2ed66Smajd@mellanox.com void *tirc; 13140fb2ed66Smajd@mellanox.com int inlen; 13150fb2ed66Smajd@mellanox.com int err; 13160fb2ed66Smajd@mellanox.com 13170fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 13181b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13190fb2ed66Smajd@mellanox.com if (!in) 13200fb2ed66Smajd@mellanox.com return -ENOMEM; 13210fb2ed66Smajd@mellanox.com 1322443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 13230fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 13240fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 13250fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 13260fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1327175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1328f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 13290fb2ed66Smajd@mellanox.com 1330175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1331175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1332175edba8SMark Bloch 1333175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1334175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1335175edba8SMark Bloch 1336175edba8SMark Bloch if (dev->rep) { 1337175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1338175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1339175edba8SMark Bloch } 1340175edba8SMark Bloch 1341175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1342ec9c2fb8SMark Bloch 13430fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 13440fb2ed66Smajd@mellanox.com 13450042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 13460042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 13470042f9e4SMark Bloch 13480042f9e4SMark Bloch if (err) 1349443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 13500042f9e4SMark Bloch } 13510fb2ed66Smajd@mellanox.com kvfree(in); 13520fb2ed66Smajd@mellanox.com 13530fb2ed66Smajd@mellanox.com return err; 13540fb2ed66Smajd@mellanox.com } 13550fb2ed66Smajd@mellanox.com 13560fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13572c292dbbSBoris Pismenny u32 *in, size_t inlen, 13587f72052cSYishai Hadas struct ib_pd *pd, 13597f72052cSYishai Hadas struct ib_udata *udata, 13607f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 13610fb2ed66Smajd@mellanox.com { 13620fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13630fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13640fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13650fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13660fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13670fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13680fb2ed66Smajd@mellanox.com int err; 13690fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13707f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 13710fb2ed66Smajd@mellanox.com 13720fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13731cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 13740fb2ed66Smajd@mellanox.com if (err) 13750fb2ed66Smajd@mellanox.com return err; 13760fb2ed66Smajd@mellanox.com 13770fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13780fb2ed66Smajd@mellanox.com if (err) 13790fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13800fb2ed66Smajd@mellanox.com 13817f72052cSYishai Hadas if (uid) { 13827f72052cSYishai Hadas resp->tisn = sq->tisn; 13837f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 13847f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 13857f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 13867f72052cSYishai Hadas } 13877f72052cSYishai Hadas 13880fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13891d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13900fb2ed66Smajd@mellanox.com } 13910fb2ed66Smajd@mellanox.com 13920fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1393358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1394358e42eaSMajd Dibbiny 1395e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1396e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1397b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1398b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 139934d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 14000fb2ed66Smajd@mellanox.com if (err) 14010fb2ed66Smajd@mellanox.com goto err_destroy_sq; 14020fb2ed66Smajd@mellanox.com 1403443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 14040fb2ed66Smajd@mellanox.com if (err) 14050fb2ed66Smajd@mellanox.com goto err_destroy_rq; 14067f72052cSYishai Hadas 14077f72052cSYishai Hadas if (uid) { 14087f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 14097f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 14107f72052cSYishai Hadas resp->tirn = rq->tirn; 14117f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 14127f72052cSYishai Hadas } 14130fb2ed66Smajd@mellanox.com } 14140fb2ed66Smajd@mellanox.com 14150fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 14160fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 14177f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 14187f72052cSYishai Hadas if (err) 14197f72052cSYishai Hadas goto err_destroy_tir; 14200fb2ed66Smajd@mellanox.com 14210fb2ed66Smajd@mellanox.com return 0; 14220fb2ed66Smajd@mellanox.com 14237f72052cSYishai Hadas err_destroy_tir: 14247f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 14250fb2ed66Smajd@mellanox.com err_destroy_rq: 14260fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 14270fb2ed66Smajd@mellanox.com err_destroy_sq: 14280fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 14290fb2ed66Smajd@mellanox.com return err; 14300fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14310fb2ed66Smajd@mellanox.com err_destroy_tis: 14321cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 14330fb2ed66Smajd@mellanox.com 14340fb2ed66Smajd@mellanox.com return err; 14350fb2ed66Smajd@mellanox.com } 14360fb2ed66Smajd@mellanox.com 14370fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 14380fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 14390fb2ed66Smajd@mellanox.com { 14400fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14410fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14420fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14430fb2ed66Smajd@mellanox.com 14440fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1445443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 14460fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 14470fb2ed66Smajd@mellanox.com } 14480fb2ed66Smajd@mellanox.com 14490fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14500fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14511cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 14520fb2ed66Smajd@mellanox.com } 14530fb2ed66Smajd@mellanox.com } 14540fb2ed66Smajd@mellanox.com 14550fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 14560fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 14570fb2ed66Smajd@mellanox.com { 14580fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14590fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14600fb2ed66Smajd@mellanox.com 14610fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 14620fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 14630fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 14640fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 14650fb2ed66Smajd@mellanox.com } 14660fb2ed66Smajd@mellanox.com 146728d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 146828d61370SYishai Hadas { 14690042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14700042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14710042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1472443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1473443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 147428d61370SYishai Hadas } 147528d61370SYishai Hadas 147628d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 147728d61370SYishai Hadas struct ib_pd *pd, 147828d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 147928d61370SYishai Hadas struct ib_udata *udata) 148028d61370SYishai Hadas { 148128d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 148228d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 148328d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 148428d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 148528d61370SYishai Hadas int inlen; 148628d61370SYishai Hadas int err; 148728d61370SYishai Hadas u32 *in; 148828d61370SYishai Hadas void *tirc; 148928d61370SYishai Hadas void *hfso; 149028d61370SYishai Hadas u32 selected_fields = 0; 14912d93fc85SMatan Barak u32 outer_l4; 149228d61370SYishai Hadas size_t min_resp_len; 149328d61370SYishai Hadas u32 tdn = mucontext->tdn; 149428d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 149528d61370SYishai Hadas size_t required_cmd_sz; 1496175edba8SMark Bloch u8 lb_flag = 0; 149728d61370SYishai Hadas 149828d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 149928d61370SYishai Hadas return -EOPNOTSUPP; 150028d61370SYishai Hadas 150128d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 150228d61370SYishai Hadas return -EINVAL; 150328d61370SYishai Hadas 15042f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 150528d61370SYishai Hadas if (udata->outlen < min_resp_len) 150628d61370SYishai Hadas return -EINVAL; 150728d61370SYishai Hadas 1508f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 150928d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 151028d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 151128d61370SYishai Hadas return -EINVAL; 151228d61370SYishai Hadas } 151328d61370SYishai Hadas 151428d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 151528d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 151628d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 151728d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 151828d61370SYishai Hadas return -EOPNOTSUPP; 151928d61370SYishai Hadas } 152028d61370SYishai Hadas 152128d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 152228d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 152328d61370SYishai Hadas return -EFAULT; 152428d61370SYishai Hadas } 152528d61370SYishai Hadas 152628d61370SYishai Hadas if (ucmd.comp_mask) { 152728d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 152828d61370SYishai Hadas return -EOPNOTSUPP; 152928d61370SYishai Hadas } 153028d61370SYishai Hadas 1531175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1532175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1533175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1534f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1535f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1536f95ef6cbSMaor Gottlieb } 1537f95ef6cbSMaor Gottlieb 1538f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1539f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1540f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 154128d61370SYishai Hadas return -EOPNOTSUPP; 154228d61370SYishai Hadas } 154328d61370SYishai Hadas 1544309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1545309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1546309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1547309fa347SMaor Gottlieb return -EOPNOTSUPP; 1548309fa347SMaor Gottlieb } 1549309fa347SMaor Gottlieb 1550175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1551175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1552175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1553175edba8SMark Bloch } 1554175edba8SMark Bloch 1555175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1556175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1557175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1558175edba8SMark Bloch } 1559175edba8SMark Bloch 156041d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 156128d61370SYishai Hadas if (err) { 156228d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 156328d61370SYishai Hadas return -EINVAL; 156428d61370SYishai Hadas } 156528d61370SYishai Hadas 156628d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 15671b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 156828d61370SYishai Hadas if (!in) 156928d61370SYishai Hadas return -ENOMEM; 157028d61370SYishai Hadas 1571443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 157228d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 157328d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 157428d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 157528d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 157628d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 157728d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 157828d61370SYishai Hadas 157928d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1580f95ef6cbSMaor Gottlieb 1581f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1582f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1583f95ef6cbSMaor Gottlieb 1584175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1585175edba8SMark Bloch 1586309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1587309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1588309fa347SMaor Gottlieb else 1589309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1590309fa347SMaor Gottlieb 159128d61370SYishai Hadas switch (ucmd.rx_hash_function) { 159228d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 159328d61370SYishai Hadas { 159428d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 159528d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 159628d61370SYishai Hadas 159728d61370SYishai Hadas if (len != ucmd.rx_key_len) { 159828d61370SYishai Hadas err = -EINVAL; 159928d61370SYishai Hadas goto err; 160028d61370SYishai Hadas } 160128d61370SYishai Hadas 160228d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 160328d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 160428d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 160528d61370SYishai Hadas break; 160628d61370SYishai Hadas } 160728d61370SYishai Hadas default: 160828d61370SYishai Hadas err = -EOPNOTSUPP; 160928d61370SYishai Hadas goto err; 161028d61370SYishai Hadas } 161128d61370SYishai Hadas 161228d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 161328d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 161428d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 161528d61370SYishai Hadas goto create_tir; 161628d61370SYishai Hadas err = -EINVAL; 161728d61370SYishai Hadas goto err; 161828d61370SYishai Hadas } 161928d61370SYishai Hadas 162028d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 162128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 162228d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 162328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 162428d61370SYishai Hadas err = -EINVAL; 162528d61370SYishai Hadas goto err; 162628d61370SYishai Hadas } 162728d61370SYishai Hadas 162828d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 162928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 163028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 163128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 163228d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 163328d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 163428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 163528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 163628d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 163728d61370SYishai Hadas 16382d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 16392d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 164028d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 16412d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 16422d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 16432d93fc85SMatan Barak 16442d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 16452d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 164628d61370SYishai Hadas err = -EINVAL; 164728d61370SYishai Hadas goto err; 164828d61370SYishai Hadas } 164928d61370SYishai Hadas 165028d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 165128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 165228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 165328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 165428d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 165528d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 165628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 165728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 165828d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 165928d61370SYishai Hadas 166028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 166128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 166228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 166328d61370SYishai Hadas 166428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 166528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 166628d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 166728d61370SYishai Hadas 166828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 166928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 167028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 167128d61370SYishai Hadas 167228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 167328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 167428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 167528d61370SYishai Hadas 16762d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 16772d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 16782d93fc85SMatan Barak 167928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 168028d61370SYishai Hadas 168128d61370SYishai Hadas create_tir: 168228d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 168328d61370SYishai Hadas 16840042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 16850042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 16860042f9e4SMark Bloch 16870042f9e4SMark Bloch if (err) 1688443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1689443c1cf9SYishai Hadas to_mpd(pd)->uid); 16900042f9e4SMark Bloch } 16910042f9e4SMark Bloch 169228d61370SYishai Hadas if (err) 169328d61370SYishai Hadas goto err; 169428d61370SYishai Hadas 16957f72052cSYishai Hadas if (mucontext->devx_uid) { 16967f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 16977f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 16987f72052cSYishai Hadas } 16997f72052cSYishai Hadas 17007f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 17017f72052cSYishai Hadas if (err) 17027f72052cSYishai Hadas goto err_copy; 17037f72052cSYishai Hadas 170428d61370SYishai Hadas kvfree(in); 170528d61370SYishai Hadas /* qpn is reserved for that QP */ 170628d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1707d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 170828d61370SYishai Hadas return 0; 170928d61370SYishai Hadas 17107f72052cSYishai Hadas err_copy: 17117f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 171228d61370SYishai Hadas err: 171328d61370SYishai Hadas kvfree(in); 171428d61370SYishai Hadas return err; 171528d61370SYishai Hadas } 171628d61370SYishai Hadas 17175d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 17185d6ff1baSYonatan Cohen void *qpc) 17195d6ff1baSYonatan Cohen { 17205d6ff1baSYonatan Cohen int rcqe_sz; 17215d6ff1baSYonatan Cohen 17225d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 17235d6ff1baSYonatan Cohen return; 17245d6ff1baSYonatan Cohen 17255d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 17265d6ff1baSYonatan Cohen 17275d6ff1baSYonatan Cohen if (rcqe_sz == 128) { 17285d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 17295d6ff1baSYonatan Cohen return; 17305d6ff1baSYonatan Cohen } 17315d6ff1baSYonatan Cohen 17325d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCT) 17335d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 17345d6ff1baSYonatan Cohen } 17355d6ff1baSYonatan Cohen 17365d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 17375d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 17386f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 17395d6ff1baSYonatan Cohen void *qpc) 17405d6ff1baSYonatan Cohen { 17415d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 17425d6ff1baSYonatan Cohen int scqe_sz; 17436f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 17445d6ff1baSYonatan Cohen 17455d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 17465d6ff1baSYonatan Cohen return; 17475d6ff1baSYonatan Cohen 17486f4bc0eaSYonatan Cohen if (ucmd) 17496f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 17506f4bc0eaSYonatan Cohen 17516f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 17525d6ff1baSYonatan Cohen return; 17535d6ff1baSYonatan Cohen 17545d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 17555d6ff1baSYonatan Cohen if (scqe_sz == 128) { 17565d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 17575d6ff1baSYonatan Cohen return; 17585d6ff1baSYonatan Cohen } 17595d6ff1baSYonatan Cohen 17605d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 17615d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 17625d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 17635d6ff1baSYonatan Cohen } 17645d6ff1baSYonatan Cohen 1765a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1766a60109dcSYonatan Cohen { 1767a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1768a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1769a60109dcSYonatan Cohen */ 1770a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1771a60109dcSYonatan Cohen int log_max_size; 1772a60109dcSYonatan Cohen 1773a60109dcSYonatan Cohen if (!supported_size_mask) 1774a60109dcSYonatan Cohen return -EOPNOTSUPP; 1775a60109dcSYonatan Cohen 1776a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1777a60109dcSYonatan Cohen 1778a60109dcSYonatan Cohen if (log_max_size > 3) 1779a60109dcSYonatan Cohen return log_max_size; 1780a60109dcSYonatan Cohen 1781a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1782a60109dcSYonatan Cohen } 1783a60109dcSYonatan Cohen 1784a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1785a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1786a60109dcSYonatan Cohen { 1787a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1788a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1789a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1790a60109dcSYonatan Cohen int atomic_size_mask; 1791a60109dcSYonatan Cohen 1792a60109dcSYonatan Cohen if (!atomic) 1793a60109dcSYonatan Cohen return -EOPNOTSUPP; 1794a60109dcSYonatan Cohen 1795a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1796a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1797a60109dcSYonatan Cohen else 1798a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1799a60109dcSYonatan Cohen 1800a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1801a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1802a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1803a60109dcSYonatan Cohen 1804a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1805a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1806a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1807a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1808a60109dcSYonatan Cohen 1809a60109dcSYonatan Cohen return atomic_mode; 1810a60109dcSYonatan Cohen } 1811a60109dcSYonatan Cohen 18122e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 18132e43bb31SYonatan Cohen { 18142e43bb31SYonatan Cohen return (input & ~supported) == 0; 18152e43bb31SYonatan Cohen } 18162e43bb31SYonatan Cohen 1817e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1818e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1819e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1820e126ba97SEli Cohen { 1821e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 182209a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1823938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 18240625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 182589ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 182689ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 182789ea94a7SMaor Gottlieb unsigned long flags; 1828cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 182909a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 183009a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1831e7b169f3SNoa Osherovich int mlx5_st; 1832cfb5e088SHaggai Abramovsky void *qpc; 183309a7d9ecSSaeed Mahameed u32 *in; 183409a7d9ecSSaeed Mahameed int err; 1835e126ba97SEli Cohen 1836e126ba97SEli Cohen mutex_init(&qp->mutex); 1837e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1838e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1839e126ba97SEli Cohen 1840e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1841e7b169f3SNoa Osherovich if (mlx5_st < 0) 1842e7b169f3SNoa Osherovich return -EINVAL; 1843e7b169f3SNoa Osherovich 184428d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 184528d61370SYishai Hadas if (!udata) 184628d61370SYishai Hadas return -ENOSYS; 184728d61370SYishai Hadas 184828d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 184928d61370SYishai Hadas return err; 185028d61370SYishai Hadas } 185128d61370SYishai Hadas 1852f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1853938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1854f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1855f360d88aSEli Cohen return -EINVAL; 1856f360d88aSEli Cohen } else { 1857f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1858f360d88aSEli Cohen } 1859f360d88aSEli Cohen } 1860f360d88aSEli Cohen 1861051f2630SLeon Romanovsky if (init_attr->create_flags & 1862051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1863051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1864051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1865051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1866051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1867051f2630SLeon Romanovsky return -EINVAL; 1868051f2630SLeon Romanovsky } 1869051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1870051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1871051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1872051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1873051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1874051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1875051f2630SLeon Romanovsky } 1876f0313965SErez Shitrit 1877f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1878f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1879f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1880f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1881f0313965SErez Shitrit return -EOPNOTSUPP; 1882f0313965SErez Shitrit } 1883f0313965SErez Shitrit 1884358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1885358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1886358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1887358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1888358e42eaSMajd Dibbiny } 1889358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1890358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1891358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1892358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1893358e42eaSMajd Dibbiny } 1894358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1895358e42eaSMajd Dibbiny } 1896358e42eaSMajd Dibbiny 1897e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1898e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1899e126ba97SEli Cohen 1900e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1901e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1902e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1903e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1904e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1905e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1906e4cc4fa7SNoa Osherovich } 1907e4cc4fa7SNoa Osherovich 1908e00b64f7SShamir Rabinovitch if (udata) { 1909e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1910e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1911e126ba97SEli Cohen return -EFAULT; 1912e126ba97SEli Cohen } 1913e126ba97SEli Cohen 19142e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 1915569c6651SDanit Goldberg MLX5_QP_FLAG_ALLOW_SCATTER_CQE | 19168af526e0SMark Bloch MLX5_QP_FLAG_BFREG_INDEX | 19178af526e0SMark Bloch MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE | 19188af526e0SMark Bloch MLX5_QP_FLAG_SCATTER_CQE | 19198af526e0SMark Bloch MLX5_QP_FLAG_SIGNATURE | 19208af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC | 19218af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 19228af526e0SMark Bloch MLX5_QP_FLAG_TUNNEL_OFFLOADS | 19238af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCI | 19248af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCT)) 19252e43bb31SYonatan Cohen return -EINVAL; 19262e43bb31SYonatan Cohen 1927cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1928cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1929cfb5e088SHaggai Abramovsky if (err) 1930cfb5e088SHaggai Abramovsky return err; 1931cfb5e088SHaggai Abramovsky 1932e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 19335d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 1934e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1935f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1936f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1937f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1938f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1939f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1940f95ef6cbSMaor Gottlieb } 1941175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 1942175edba8SMark Bloch } 1943175edba8SMark Bloch 1944175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 1945175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1946175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 1947175edba8SMark Bloch return -EOPNOTSUPP; 1948175edba8SMark Bloch } 1949175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1950175edba8SMark Bloch } 1951175edba8SMark Bloch 1952175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1953175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1954175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 1955175edba8SMark Bloch return -EOPNOTSUPP; 1956175edba8SMark Bloch } 1957175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1958f95ef6cbSMaor Gottlieb } 1959c2e53b2cSYishai Hadas 1960569c6651SDanit Goldberg if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) { 1961569c6651SDanit Goldberg if (init_attr->qp_type != IB_QPT_RC || 1962569c6651SDanit Goldberg !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { 1963569c6651SDanit Goldberg mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n"); 1964569c6651SDanit Goldberg return -EOPNOTSUPP; 1965569c6651SDanit Goldberg } 1966569c6651SDanit Goldberg qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT; 1967569c6651SDanit Goldberg } 1968569c6651SDanit Goldberg 1969c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1970c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1971c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1972c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1973c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1974c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1975c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1976c2e53b2cSYishai Hadas } 1977c2e53b2cSYishai Hadas 1978c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1979c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1980c2e53b2cSYishai Hadas } 1981e126ba97SEli Cohen } else { 1982e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1983e126ba97SEli Cohen } 1984e126ba97SEli Cohen 1985c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1986c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1987c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1988c2e53b2cSYishai Hadas &qp->trans_qp.base; 1989c2e53b2cSYishai Hadas 1990e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1991e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1992e00b64f7SShamir Rabinovitch qp, udata ? &ucmd : NULL); 1993e126ba97SEli Cohen if (err) { 1994e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1995e126ba97SEli Cohen return err; 1996e126ba97SEli Cohen } 1997e126ba97SEli Cohen 1998e126ba97SEli Cohen if (pd) { 1999e00b64f7SShamir Rabinovitch if (udata) { 2000938fe83cSSaeed Mahameed __u32 max_wqes = 2001938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 2002e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 2003e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 2004e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 2005e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 2006e126ba97SEli Cohen return -EINVAL; 2007e126ba97SEli Cohen } 2008938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 2009e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 2010938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 2011e126ba97SEli Cohen return -EINVAL; 2012e126ba97SEli Cohen } 2013b11a4f9cSHaggai Eran if (init_attr->create_flags & 2014b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 2015b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 2016b11a4f9cSHaggai Eran return -EINVAL; 2017b11a4f9cSHaggai Eran } 20180fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 20190fb2ed66Smajd@mellanox.com &resp, &inlen, base); 2020e126ba97SEli Cohen if (err) 2021e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2022e126ba97SEli Cohen } else { 202319098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 202419098df2Smajd@mellanox.com base); 2025e126ba97SEli Cohen if (err) 2026e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2027e126ba97SEli Cohen } 2028e126ba97SEli Cohen 2029e126ba97SEli Cohen if (err) 2030e126ba97SEli Cohen return err; 2031e126ba97SEli Cohen } else { 20321b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2033e126ba97SEli Cohen if (!in) 2034e126ba97SEli Cohen return -ENOMEM; 2035e126ba97SEli Cohen 2036e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 2037e126ba97SEli Cohen } 2038e126ba97SEli Cohen 2039e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2040e126ba97SEli Cohen qp->port = init_attr->port_num; 2041e126ba97SEli Cohen 204209a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 204309a7d9ecSSaeed Mahameed 2044e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 204509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2046e126ba97SEli Cohen 2047e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 204809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2049e126ba97SEli Cohen else 205009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 205109a7d9ecSSaeed Mahameed 2052e126ba97SEli Cohen 2053e126ba97SEli Cohen if (qp->wq_sig) 205409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2055e126ba97SEli Cohen 2056f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 205709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2058f360d88aSEli Cohen 2059051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 206009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2061051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 206209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2063051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 206409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2065569c6651SDanit Goldberg if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT) 2066569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 2067e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 20685d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 20696f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 2070e00b64f7SShamir Rabinovitch udata ? &ucmd : NULL, 20716f4bc0eaSYonatan Cohen qpc); 2072e126ba97SEli Cohen } 2073e126ba97SEli Cohen 2074e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 207509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 207609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2077e126ba97SEli Cohen } 2078e126ba97SEli Cohen 207909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2080e126ba97SEli Cohen 20813fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 208209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 20833fd3307eSArtemy Kovalyov } else { 208409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 20853fd3307eSArtemy Kovalyov if (init_attr->srq && 20863fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 20873fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 20883fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 20893fd3307eSArtemy Kovalyov } 2090e126ba97SEli Cohen 2091e126ba97SEli Cohen /* Set default resources */ 2092e126ba97SEli Cohen switch (init_attr->qp_type) { 2093e126ba97SEli Cohen case IB_QPT_XRC_TGT: 209409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 209509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 209609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 209709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2098e126ba97SEli Cohen break; 2099e126ba97SEli Cohen case IB_QPT_XRC_INI: 210009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 210109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 210209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2103e126ba97SEli Cohen break; 2104e126ba97SEli Cohen default: 2105e126ba97SEli Cohen if (init_attr->srq) { 210609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 210709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2108e126ba97SEli Cohen } else { 210909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 211009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2111e126ba97SEli Cohen } 2112e126ba97SEli Cohen } 2113e126ba97SEli Cohen 2114e126ba97SEli Cohen if (init_attr->send_cq) 211509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2116e126ba97SEli Cohen 2117e126ba97SEli Cohen if (init_attr->recv_cq) 211809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2119e126ba97SEli Cohen 212009a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2121e126ba97SEli Cohen 2122cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 212309a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2124cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 212509a7d9ecSSaeed Mahameed 2126f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2127f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2128f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2129f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2130f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2131f0313965SErez Shitrit } 2132cfb5e088SHaggai Abramovsky 2133b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2134b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2135b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2136b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2137b1383aa6SNoa Osherovich goto err; 2138b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2139b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2140b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2141b1383aa6SNoa Osherovich } else { 2142b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2143b1383aa6SNoa Osherovich } 2144b1383aa6SNoa Osherovich } 2145b1383aa6SNoa Osherovich 21462c292dbbSBoris Pismenny if (inlen < 0) { 21472c292dbbSBoris Pismenny err = -EINVAL; 21482c292dbbSBoris Pismenny goto err; 21492c292dbbSBoris Pismenny } 21502c292dbbSBoris Pismenny 2151c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2152c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21530fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 21540fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 21557f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 21567f72052cSYishai Hadas &resp); 21570fb2ed66Smajd@mellanox.com } else { 215819098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 21590fb2ed66Smajd@mellanox.com } 21600fb2ed66Smajd@mellanox.com 2161e126ba97SEli Cohen if (err) { 2162e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2163e126ba97SEli Cohen goto err_create; 2164e126ba97SEli Cohen } 2165e126ba97SEli Cohen 2166479163f4SAl Viro kvfree(in); 2167e126ba97SEli Cohen 216819098df2Smajd@mellanox.com base->container_mibqp = qp; 216919098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2170e126ba97SEli Cohen 217189ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 217289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 217389ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 217489ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 217589ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 217689ea94a7SMaor Gottlieb * flow 217789ea94a7SMaor Gottlieb */ 217889ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 217989ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 218089ea94a7SMaor Gottlieb */ 218189ea94a7SMaor Gottlieb if (send_cq) 218289ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 218389ea94a7SMaor Gottlieb if (recv_cq) 218489ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 218589ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 218689ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 218789ea94a7SMaor Gottlieb 2188e126ba97SEli Cohen return 0; 2189e126ba97SEli Cohen 2190e126ba97SEli Cohen err_create: 2191e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2192b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 2193e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2194e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2195e126ba97SEli Cohen 2196b1383aa6SNoa Osherovich err: 2197479163f4SAl Viro kvfree(in); 2198e126ba97SEli Cohen return err; 2199e126ba97SEli Cohen } 2200e126ba97SEli Cohen 2201e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2202e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2203e126ba97SEli Cohen { 2204e126ba97SEli Cohen if (send_cq) { 2205e126ba97SEli Cohen if (recv_cq) { 2206e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 220789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2208e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2209e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2210e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 221189ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2212e126ba97SEli Cohen __acquire(&recv_cq->lock); 2213e126ba97SEli Cohen } else { 221489ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2215e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2216e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2217e126ba97SEli Cohen } 2218e126ba97SEli Cohen } else { 221989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 22206a4f139aSEli Cohen __acquire(&recv_cq->lock); 2221e126ba97SEli Cohen } 2222e126ba97SEli Cohen } else if (recv_cq) { 222389ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 22246a4f139aSEli Cohen __acquire(&send_cq->lock); 22256a4f139aSEli Cohen } else { 22266a4f139aSEli Cohen __acquire(&send_cq->lock); 22276a4f139aSEli Cohen __acquire(&recv_cq->lock); 2228e126ba97SEli Cohen } 2229e126ba97SEli Cohen } 2230e126ba97SEli Cohen 2231e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2232e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2233e126ba97SEli Cohen { 2234e126ba97SEli Cohen if (send_cq) { 2235e126ba97SEli Cohen if (recv_cq) { 2236e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2237e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 223889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2239e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2240e126ba97SEli Cohen __release(&recv_cq->lock); 224189ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2242e126ba97SEli Cohen } else { 2243e126ba97SEli Cohen spin_unlock(&send_cq->lock); 224489ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2245e126ba97SEli Cohen } 2246e126ba97SEli Cohen } else { 22476a4f139aSEli Cohen __release(&recv_cq->lock); 224889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2249e126ba97SEli Cohen } 2250e126ba97SEli Cohen } else if (recv_cq) { 22516a4f139aSEli Cohen __release(&send_cq->lock); 225289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 22536a4f139aSEli Cohen } else { 22546a4f139aSEli Cohen __release(&recv_cq->lock); 22556a4f139aSEli Cohen __release(&send_cq->lock); 2256e126ba97SEli Cohen } 2257e126ba97SEli Cohen } 2258e126ba97SEli Cohen 2259e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2260e126ba97SEli Cohen { 2261e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2262e126ba97SEli Cohen } 2263e126ba97SEli Cohen 226489ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 226589ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2266e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2267e126ba97SEli Cohen { 226889ea94a7SMaor Gottlieb switch (qp_type) { 2269e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2270e126ba97SEli Cohen *send_cq = NULL; 2271e126ba97SEli Cohen *recv_cq = NULL; 2272e126ba97SEli Cohen break; 2273e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2274e126ba97SEli Cohen case IB_QPT_XRC_INI: 227589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2276e126ba97SEli Cohen *recv_cq = NULL; 2277e126ba97SEli Cohen break; 2278e126ba97SEli Cohen 2279e126ba97SEli Cohen case IB_QPT_SMI: 2280d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2281e126ba97SEli Cohen case IB_QPT_RC: 2282e126ba97SEli Cohen case IB_QPT_UC: 2283e126ba97SEli Cohen case IB_QPT_UD: 2284e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2285e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 22860fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 228789ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 228889ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2289e126ba97SEli Cohen break; 2290e126ba97SEli Cohen 2291e126ba97SEli Cohen case IB_QPT_MAX: 2292e126ba97SEli Cohen default: 2293e126ba97SEli Cohen *send_cq = NULL; 2294e126ba97SEli Cohen *recv_cq = NULL; 2295e126ba97SEli Cohen break; 2296e126ba97SEli Cohen } 2297e126ba97SEli Cohen } 2298e126ba97SEli Cohen 2299ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 230013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 230113eab21fSAviv Heller u8 lag_tx_affinity); 2302ad5f8e96Smajd@mellanox.com 2303e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2304e126ba97SEli Cohen { 2305e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2306c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 230789ea94a7SMaor Gottlieb unsigned long flags; 2308e126ba97SEli Cohen int err; 2309e126ba97SEli Cohen 231028d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 231128d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 231228d61370SYishai Hadas return; 231328d61370SYishai Hadas } 231428d61370SYishai Hadas 2315c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2316c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 23170fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 23180fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 23190fb2ed66Smajd@mellanox.com 23206aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2321c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2322c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2323ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 23241a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 23251a412fb1SSaeed Mahameed NULL, &base->mqp); 2326ad5f8e96Smajd@mellanox.com } else { 23270680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 23280680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 23290680efa2SAlex Vesker }; 23300680efa2SAlex Vesker 233113eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2332ad5f8e96Smajd@mellanox.com } 2333ad5f8e96Smajd@mellanox.com if (err) 2334427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 233519098df2Smajd@mellanox.com base->mqp.qpn); 23366aec21f6SHaggai Eran } 2337e126ba97SEli Cohen 233889ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 233989ea94a7SMaor Gottlieb &send_cq, &recv_cq); 234089ea94a7SMaor Gottlieb 234189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 234289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 234389ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 234489ea94a7SMaor Gottlieb list_del(&qp->qps_list); 234589ea94a7SMaor Gottlieb if (send_cq) 234689ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 234789ea94a7SMaor Gottlieb 234889ea94a7SMaor Gottlieb if (recv_cq) 234989ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2350e126ba97SEli Cohen 2351e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 235219098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2353e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2354e126ba97SEli Cohen if (send_cq != recv_cq) 235519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 235619098df2Smajd@mellanox.com NULL); 2357e126ba97SEli Cohen } 235889ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 235989ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2360e126ba97SEli Cohen 2361c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2362c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 23630fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 23640fb2ed66Smajd@mellanox.com } else { 236519098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2366e126ba97SEli Cohen if (err) 23670fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 23680fb2ed66Smajd@mellanox.com base->mqp.qpn); 23690fb2ed66Smajd@mellanox.com } 2370e126ba97SEli Cohen 2371e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2372e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2373e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2374b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2375e126ba97SEli Cohen } 2376e126ba97SEli Cohen 2377e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2378e126ba97SEli Cohen { 2379e126ba97SEli Cohen switch (type) { 2380e126ba97SEli Cohen case IB_QPT_SMI: 2381e126ba97SEli Cohen return "IB_QPT_SMI"; 2382e126ba97SEli Cohen case IB_QPT_GSI: 2383e126ba97SEli Cohen return "IB_QPT_GSI"; 2384e126ba97SEli Cohen case IB_QPT_RC: 2385e126ba97SEli Cohen return "IB_QPT_RC"; 2386e126ba97SEli Cohen case IB_QPT_UC: 2387e126ba97SEli Cohen return "IB_QPT_UC"; 2388e126ba97SEli Cohen case IB_QPT_UD: 2389e126ba97SEli Cohen return "IB_QPT_UD"; 2390e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2391e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2392e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2393e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2394e126ba97SEli Cohen case IB_QPT_XRC_INI: 2395e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2396e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2397e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2398e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2399e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2400e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2401e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2402b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2403b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2404e126ba97SEli Cohen case IB_QPT_MAX: 2405e126ba97SEli Cohen default: 2406e126ba97SEli Cohen return "Invalid QP type"; 2407e126ba97SEli Cohen } 2408e126ba97SEli Cohen } 2409e126ba97SEli Cohen 2410b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2411b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2412b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2413b4aaa1f0SMoni Shoua { 2414b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2415b4aaa1f0SMoni Shoua int err = 0; 2416b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2417b4aaa1f0SMoni Shoua void *dctc; 2418b4aaa1f0SMoni Shoua 2419b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2420b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2421b4aaa1f0SMoni Shoua 2422b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2423b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2424b4aaa1f0SMoni Shoua if (err) 2425b4aaa1f0SMoni Shoua return ERR_PTR(err); 2426b4aaa1f0SMoni Shoua 2427b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2428b4aaa1f0SMoni Shoua if (!qp) 2429b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2430b4aaa1f0SMoni Shoua 2431b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2432b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2433b4aaa1f0SMoni Shoua err = -ENOMEM; 2434b4aaa1f0SMoni Shoua goto err_free; 2435b4aaa1f0SMoni Shoua } 2436b4aaa1f0SMoni Shoua 2437a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2438b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2439776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2440b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2441b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2442b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2443b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2444b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2445b4aaa1f0SMoni Shoua 24465d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 24475d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 24485d6ff1baSYonatan Cohen 2449b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2450b4aaa1f0SMoni Shoua 2451b4aaa1f0SMoni Shoua return &qp->ibqp; 2452b4aaa1f0SMoni Shoua err_free: 2453b4aaa1f0SMoni Shoua kfree(qp); 2454b4aaa1f0SMoni Shoua return ERR_PTR(err); 2455b4aaa1f0SMoni Shoua } 2456b4aaa1f0SMoni Shoua 2457b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2458e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2459b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2460b4aaa1f0SMoni Shoua struct ib_udata *udata) 2461b4aaa1f0SMoni Shoua { 2462b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2463b4aaa1f0SMoni Shoua int err; 2464b4aaa1f0SMoni Shoua 2465b4aaa1f0SMoni Shoua if (!udata) 2466b4aaa1f0SMoni Shoua return -EINVAL; 2467b4aaa1f0SMoni Shoua 2468b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2469b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2470b4aaa1f0SMoni Shoua return -EINVAL; 2471b4aaa1f0SMoni Shoua } 2472b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2473b4aaa1f0SMoni Shoua if (err) 2474b4aaa1f0SMoni Shoua return err; 2475b4aaa1f0SMoni Shoua 2476b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2477b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2478b4aaa1f0SMoni Shoua } else { 2479b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2480b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2481b4aaa1f0SMoni Shoua } else { 2482b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2483b4aaa1f0SMoni Shoua return -EINVAL; 2484b4aaa1f0SMoni Shoua } 2485b4aaa1f0SMoni Shoua } 2486b4aaa1f0SMoni Shoua 2487b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2488b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2489b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2490b4aaa1f0SMoni Shoua } 2491b4aaa1f0SMoni Shoua 2492b4aaa1f0SMoni Shoua return 0; 2493b4aaa1f0SMoni Shoua } 2494b4aaa1f0SMoni Shoua 2495b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2496b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2497e126ba97SEli Cohen struct ib_udata *udata) 2498e126ba97SEli Cohen { 2499e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2500e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2501e126ba97SEli Cohen u16 xrcdn = 0; 2502e126ba97SEli Cohen int err; 2503b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2504b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2505e126ba97SEli Cohen 2506e126ba97SEli Cohen if (pd) { 2507e126ba97SEli Cohen dev = to_mdev(pd->device); 25080fb2ed66Smajd@mellanox.com 25090fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 2510e00b64f7SShamir Rabinovitch if (!udata) { 25110fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 25120fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 25130fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 25140fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 25150fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 25160fb2ed66Smajd@mellanox.com } 25170fb2ed66Smajd@mellanox.com } 251809f16cf5SMajd Dibbiny } else { 251909f16cf5SMajd Dibbiny /* being cautious here */ 252009f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 252109f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 252209f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 252309f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 252409f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 252509f16cf5SMajd Dibbiny } 252609f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2527e126ba97SEli Cohen } 2528e126ba97SEli Cohen 2529b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2530b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2531b4aaa1f0SMoni Shoua 2532b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2533b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2534b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2535b4aaa1f0SMoni Shoua if (err) 2536b4aaa1f0SMoni Shoua return ERR_PTR(err); 2537c32a4f29SMoni Shoua 2538c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2539c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2540c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2541c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2542c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2543c32a4f29SMoni Shoua } 2544776a3906SMoni Shoua } else { 2545776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2546c32a4f29SMoni Shoua } 2547b4aaa1f0SMoni Shoua } 2548b4aaa1f0SMoni Shoua 2549e126ba97SEli Cohen switch (init_attr->qp_type) { 2550e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2551e126ba97SEli Cohen case IB_QPT_XRC_INI: 2552938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2553e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2554e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2555e126ba97SEli Cohen } 2556e126ba97SEli Cohen init_attr->recv_cq = NULL; 2557e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2558e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2559e126ba97SEli Cohen init_attr->send_cq = NULL; 2560e126ba97SEli Cohen } 2561e126ba97SEli Cohen 2562e126ba97SEli Cohen /* fall through */ 25630fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2564e126ba97SEli Cohen case IB_QPT_RC: 2565e126ba97SEli Cohen case IB_QPT_UC: 2566e126ba97SEli Cohen case IB_QPT_UD: 2567e126ba97SEli Cohen case IB_QPT_SMI: 2568d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2569e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2570c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2571e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2572e126ba97SEli Cohen if (!qp) 2573e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2574e126ba97SEli Cohen 2575e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2576e126ba97SEli Cohen if (err) { 2577e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2578e126ba97SEli Cohen kfree(qp); 2579e126ba97SEli Cohen return ERR_PTR(err); 2580e126ba97SEli Cohen } 2581e126ba97SEli Cohen 2582e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2583e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2584e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2585e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2586e126ba97SEli Cohen else 258719098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2588e126ba97SEli Cohen 2589e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 259019098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2591a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2592a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2593e126ba97SEli Cohen 259419098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2595e126ba97SEli Cohen 2596e126ba97SEli Cohen break; 2597e126ba97SEli Cohen 2598d16e91daSHaggai Eran case IB_QPT_GSI: 2599d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2600d16e91daSHaggai Eran 2601e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2602e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2603e126ba97SEli Cohen case IB_QPT_MAX: 2604e126ba97SEli Cohen default: 2605e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2606e126ba97SEli Cohen init_attr->qp_type); 2607e126ba97SEli Cohen /* Don't support raw QPs */ 2608e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2609e126ba97SEli Cohen } 2610e126ba97SEli Cohen 2611b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2612b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2613b4aaa1f0SMoni Shoua 2614e126ba97SEli Cohen return &qp->ibqp; 2615e126ba97SEli Cohen } 2616e126ba97SEli Cohen 2617776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2618776a3906SMoni Shoua { 2619776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2620776a3906SMoni Shoua 2621776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2622776a3906SMoni Shoua int err; 2623776a3906SMoni Shoua 2624776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2625776a3906SMoni Shoua if (err) { 2626776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2627776a3906SMoni Shoua return err; 2628776a3906SMoni Shoua } 2629776a3906SMoni Shoua } 2630776a3906SMoni Shoua 2631776a3906SMoni Shoua kfree(mqp->dct.in); 2632776a3906SMoni Shoua kfree(mqp); 2633776a3906SMoni Shoua return 0; 2634776a3906SMoni Shoua } 2635776a3906SMoni Shoua 2636e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2637e126ba97SEli Cohen { 2638e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2639e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2640e126ba97SEli Cohen 2641d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2642d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2643d16e91daSHaggai Eran 2644776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2645776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2646776a3906SMoni Shoua 2647e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2648e126ba97SEli Cohen 2649e126ba97SEli Cohen kfree(mqp); 2650e126ba97SEli Cohen 2651e126ba97SEli Cohen return 0; 2652e126ba97SEli Cohen } 2653e126ba97SEli Cohen 2654a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2655a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2656a60109dcSYonatan Cohen int attr_mask, __be32 *hw_access_flags) 2657e126ba97SEli Cohen { 2658e126ba97SEli Cohen u8 dest_rd_atomic; 2659e126ba97SEli Cohen u32 access_flags; 2660e126ba97SEli Cohen 2661a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2662a60109dcSYonatan Cohen 2663e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2664e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2665e126ba97SEli Cohen else 266619098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2667e126ba97SEli Cohen 2668e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2669e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2670e126ba97SEli Cohen else 267119098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2672e126ba97SEli Cohen 2673e126ba97SEli Cohen if (!dest_rd_atomic) 2674e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2675e126ba97SEli Cohen 2676e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2677a60109dcSYonatan Cohen *hw_access_flags |= MLX5_QP_BIT_RRE; 267813f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 2679a60109dcSYonatan Cohen int atomic_mode; 2680e126ba97SEli Cohen 2681a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2682a60109dcSYonatan Cohen if (atomic_mode < 0) 2683a60109dcSYonatan Cohen return -EOPNOTSUPP; 2684a60109dcSYonatan Cohen 2685a60109dcSYonatan Cohen *hw_access_flags |= MLX5_QP_BIT_RAE; 2686a60109dcSYonatan Cohen *hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2687a60109dcSYonatan Cohen } 2688a60109dcSYonatan Cohen 2689a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2690a60109dcSYonatan Cohen *hw_access_flags |= MLX5_QP_BIT_RWE; 2691a60109dcSYonatan Cohen 2692a60109dcSYonatan Cohen *hw_access_flags = cpu_to_be32(*hw_access_flags); 2693a60109dcSYonatan Cohen 2694a60109dcSYonatan Cohen return 0; 2695e126ba97SEli Cohen } 2696e126ba97SEli Cohen 2697e126ba97SEli Cohen enum { 2698e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2699e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2700e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2701e126ba97SEli Cohen }; 2702e126ba97SEli Cohen 2703e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2704e126ba97SEli Cohen { 27054f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2706e126ba97SEli Cohen return 0; 27074f32ac2eSDanit Goldberg 2708a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 2709e126ba97SEli Cohen return -EINVAL; 27104f32ac2eSDanit Goldberg 27114f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2712e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2713938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2714e126ba97SEli Cohen --rate; 2715e126ba97SEli Cohen 27164f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2717e126ba97SEli Cohen } 2718e126ba97SEli Cohen 271975850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 27201cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 27211cd6dbd3SYishai Hadas struct ib_pd *pd) 272275850d0bSmajd@mellanox.com { 272375850d0bSmajd@mellanox.com void *in; 272475850d0bSmajd@mellanox.com void *tisc; 272575850d0bSmajd@mellanox.com int inlen; 272675850d0bSmajd@mellanox.com int err; 272775850d0bSmajd@mellanox.com 272875850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 27291b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 273075850d0bSmajd@mellanox.com if (!in) 273175850d0bSmajd@mellanox.com return -ENOMEM; 273275850d0bSmajd@mellanox.com 273375850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 27341cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 273575850d0bSmajd@mellanox.com 273675850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 273775850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 273875850d0bSmajd@mellanox.com 273975850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 274075850d0bSmajd@mellanox.com 274175850d0bSmajd@mellanox.com kvfree(in); 274275850d0bSmajd@mellanox.com 274375850d0bSmajd@mellanox.com return err; 274475850d0bSmajd@mellanox.com } 274575850d0bSmajd@mellanox.com 274613eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 27471cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 27481cd6dbd3SYishai Hadas struct ib_pd *pd) 274913eab21fSAviv Heller { 275013eab21fSAviv Heller void *in; 275113eab21fSAviv Heller void *tisc; 275213eab21fSAviv Heller int inlen; 275313eab21fSAviv Heller int err; 275413eab21fSAviv Heller 275513eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 27561b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 275713eab21fSAviv Heller if (!in) 275813eab21fSAviv Heller return -ENOMEM; 275913eab21fSAviv Heller 276013eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 27611cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 276213eab21fSAviv Heller 276313eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 276413eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 276513eab21fSAviv Heller 276613eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 276713eab21fSAviv Heller 276813eab21fSAviv Heller kvfree(in); 276913eab21fSAviv Heller 277013eab21fSAviv Heller return err; 277113eab21fSAviv Heller } 277213eab21fSAviv Heller 277375850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 277490898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2775e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2776f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2777f879ee8dSAchiad Shochat bool alt) 2778e126ba97SEli Cohen { 2779d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2780e126ba97SEli Cohen int err; 2781ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2782d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2783d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2784e126ba97SEli Cohen 2785e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2786f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2787f879ee8dSAchiad Shochat attr->pkey_index); 2788e126ba97SEli Cohen 2789d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2790d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2791938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2792f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2793d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2794938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2795f83b4263SEli Cohen return -EINVAL; 2796f83b4263SEli Cohen } 27972811ba51SAchiad Shochat } 279844c58487SDasaratharaman Chandramouli 279944c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2800d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 28012811ba51SAchiad Shochat return -EINVAL; 280247ec3866SParav Pandit 280344c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 28042b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 28052b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 28062b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 28072b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 280847ec3866SParav Pandit path->udp_sport = 280947ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2810d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 281147ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2812ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2813d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 28142811ba51SAchiad Shochat } else { 2815d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2816d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2817d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2818d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2819d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2820d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2821e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2822d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 28232811ba51SAchiad Shochat } 28242811ba51SAchiad Shochat 2825d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2826d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2827d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2828e126ba97SEli Cohen path->tclass_flowlabel = 2829d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2830d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2831d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2832e126ba97SEli Cohen } 2833e126ba97SEli Cohen 2834d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2835e126ba97SEli Cohen if (err < 0) 2836e126ba97SEli Cohen return err; 2837e126ba97SEli Cohen path->static_rate = err; 2838e126ba97SEli Cohen path->port = port; 2839e126ba97SEli Cohen 2840e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2841f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2842e126ba97SEli Cohen 284375850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 284475850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 284575850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 28461cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 284775850d0bSmajd@mellanox.com 2848e126ba97SEli Cohen return 0; 2849e126ba97SEli Cohen } 2850e126ba97SEli Cohen 2851e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2852e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2853e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2854e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2855e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2856e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2857e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2858e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2859e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2860e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2861e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2862e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2863e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2864e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2865e126ba97SEli Cohen }, 2866e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2867e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2868e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2869e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2870e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2871e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2872e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2873e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2874e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2875e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2876e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2877e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2878e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2879a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2880a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2881a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2882a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2883a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2884e126ba97SEli Cohen }, 2885e126ba97SEli Cohen }, 2886e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2887e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2888e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2889e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2890e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2891e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2892e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2893e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2894e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2895e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2896e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2897e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2898e126ba97SEli Cohen }, 2899e126ba97SEli Cohen }, 2900e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2901e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2902e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2903e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2904e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2905e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2906c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2907c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2908e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2909c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2910c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2911e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2912e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2913e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2914e126ba97SEli Cohen }, 2915e126ba97SEli Cohen }, 2916e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2917e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2918e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2919e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 292075959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2921a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2922a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2923a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2924a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2925e126ba97SEli Cohen }, 2926e126ba97SEli Cohen }, 2927e126ba97SEli Cohen }; 2928e126ba97SEli Cohen 2929e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2930e126ba97SEli Cohen { 2931e126ba97SEli Cohen switch (ib_mask) { 2932e126ba97SEli Cohen case IB_QP_STATE: 2933e126ba97SEli Cohen return 0; 2934e126ba97SEli Cohen case IB_QP_CUR_STATE: 2935e126ba97SEli Cohen return 0; 2936e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2937e126ba97SEli Cohen return 0; 2938e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2939e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2940e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2941e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2942e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2943e126ba97SEli Cohen case IB_QP_PORT: 2944e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2945e126ba97SEli Cohen case IB_QP_QKEY: 2946e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2947e126ba97SEli Cohen case IB_QP_AV: 2948e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2949e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2950e126ba97SEli Cohen case IB_QP_PATH_MTU: 2951e126ba97SEli Cohen return 0; 2952e126ba97SEli Cohen case IB_QP_TIMEOUT: 2953e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2954e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2955e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2956e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2957e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2958e126ba97SEli Cohen case IB_QP_RQ_PSN: 2959e126ba97SEli Cohen return 0; 2960e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2961e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2962e126ba97SEli Cohen case IB_QP_ALT_PATH: 2963e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2964e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2965e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2966e126ba97SEli Cohen case IB_QP_SQ_PSN: 2967e126ba97SEli Cohen return 0; 2968e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2969e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2970e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2971e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2972e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2973e126ba97SEli Cohen case IB_QP_CAP: 2974e126ba97SEli Cohen return 0; 2975e126ba97SEli Cohen case IB_QP_DEST_QPN: 2976e126ba97SEli Cohen return 0; 2977e126ba97SEli Cohen } 2978e126ba97SEli Cohen return 0; 2979e126ba97SEli Cohen } 2980e126ba97SEli Cohen 2981e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2982e126ba97SEli Cohen { 2983e126ba97SEli Cohen int result = 0; 2984e126ba97SEli Cohen int i; 2985e126ba97SEli Cohen 2986e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2987e126ba97SEli Cohen if ((1 << i) & ib_mask) 2988e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2989e126ba97SEli Cohen } 2990e126ba97SEli Cohen 2991e126ba97SEli Cohen return result; 2992e126ba97SEli Cohen } 2993e126ba97SEli Cohen 299434d57585SYishai Hadas static int modify_raw_packet_qp_rq( 299534d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 299634d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2997ad5f8e96Smajd@mellanox.com { 2998ad5f8e96Smajd@mellanox.com void *in; 2999ad5f8e96Smajd@mellanox.com void *rqc; 3000ad5f8e96Smajd@mellanox.com int inlen; 3001ad5f8e96Smajd@mellanox.com int err; 3002ad5f8e96Smajd@mellanox.com 3003ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 30041b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3005ad5f8e96Smajd@mellanox.com if (!in) 3006ad5f8e96Smajd@mellanox.com return -ENOMEM; 3007ad5f8e96Smajd@mellanox.com 3008ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 300934d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3010ad5f8e96Smajd@mellanox.com 3011ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3012ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3013ad5f8e96Smajd@mellanox.com 3014eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3015eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3016eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 301723a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3018eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3019eb49ab0cSAlex Vesker } else 30205a738b5dSJason Gunthorpe dev_info_once( 30215a738b5dSJason Gunthorpe &dev->ib_dev.dev, 30225a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3023eb49ab0cSAlex Vesker } 3024eb49ab0cSAlex Vesker 3025eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 3026ad5f8e96Smajd@mellanox.com if (err) 3027ad5f8e96Smajd@mellanox.com goto out; 3028ad5f8e96Smajd@mellanox.com 3029ad5f8e96Smajd@mellanox.com rq->state = new_state; 3030ad5f8e96Smajd@mellanox.com 3031ad5f8e96Smajd@mellanox.com out: 3032ad5f8e96Smajd@mellanox.com kvfree(in); 3033ad5f8e96Smajd@mellanox.com return err; 3034ad5f8e96Smajd@mellanox.com } 3035ad5f8e96Smajd@mellanox.com 3036c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3037c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3038c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3039ad5f8e96Smajd@mellanox.com { 30407d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 304161147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 304261147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 304361147f39SBodong Wang bool new_rate_added = false; 30447d29f349SBodong Wang u16 rl_index = 0; 3045ad5f8e96Smajd@mellanox.com void *in; 3046ad5f8e96Smajd@mellanox.com void *sqc; 3047ad5f8e96Smajd@mellanox.com int inlen; 3048ad5f8e96Smajd@mellanox.com int err; 3049ad5f8e96Smajd@mellanox.com 3050ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 30511b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3052ad5f8e96Smajd@mellanox.com if (!in) 3053ad5f8e96Smajd@mellanox.com return -ENOMEM; 3054ad5f8e96Smajd@mellanox.com 3055c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3056ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3057ad5f8e96Smajd@mellanox.com 3058ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3059ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3060ad5f8e96Smajd@mellanox.com 30617d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 30627d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 30637d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 30647d29f349SBodong Wang __func__); 30657d29f349SBodong Wang else 306661147f39SBodong Wang new_rl = raw_qp_param->rl; 30677d29f349SBodong Wang } 3068ad5f8e96Smajd@mellanox.com 306961147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 307061147f39SBodong Wang if (new_rl.rate) { 307161147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 30727d29f349SBodong Wang if (err) { 307361147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 307461147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 307561147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 307661147f39SBodong Wang new_rl.typical_pkt_sz); 307761147f39SBodong Wang 30787d29f349SBodong Wang goto out; 30797d29f349SBodong Wang } 308061147f39SBodong Wang new_rate_added = true; 30817d29f349SBodong Wang } 30827d29f349SBodong Wang 30837d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 308461147f39SBodong Wang /* index 0 means no limit */ 30857d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 30867d29f349SBodong Wang } 30877d29f349SBodong Wang 30887d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 30897d29f349SBodong Wang if (err) { 30907d29f349SBodong Wang /* Remove new rate from table if failed */ 309161147f39SBodong Wang if (new_rate_added) 309261147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 30937d29f349SBodong Wang goto out; 30947d29f349SBodong Wang } 30957d29f349SBodong Wang 30967d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 309761147f39SBodong Wang if ((old_rl.rate && 309861147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 30997d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 310061147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 31017d29f349SBodong Wang 310261147f39SBodong Wang ibqp->rl = new_rl; 3103ad5f8e96Smajd@mellanox.com sq->state = new_state; 3104ad5f8e96Smajd@mellanox.com 3105ad5f8e96Smajd@mellanox.com out: 3106ad5f8e96Smajd@mellanox.com kvfree(in); 3107ad5f8e96Smajd@mellanox.com return err; 3108ad5f8e96Smajd@mellanox.com } 3109ad5f8e96Smajd@mellanox.com 3110ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 311113eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 311213eab21fSAviv Heller u8 tx_affinity) 3113ad5f8e96Smajd@mellanox.com { 3114ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3115ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3116ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 31177d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 31187d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3119ad5f8e96Smajd@mellanox.com int rq_state; 3120ad5f8e96Smajd@mellanox.com int sq_state; 3121ad5f8e96Smajd@mellanox.com int err; 3122ad5f8e96Smajd@mellanox.com 31230680efa2SAlex Vesker switch (raw_qp_param->operation) { 3124ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3125ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3126ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3127ad5f8e96Smajd@mellanox.com break; 3128ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3129ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3130ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3131ad5f8e96Smajd@mellanox.com break; 3132ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3133ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3134ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3135ad5f8e96Smajd@mellanox.com break; 3136ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3137ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 31387d29f349SBodong Wang if (raw_qp_param->set_mask == 31397d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 31407d29f349SBodong Wang modify_rq = 0; 31417d29f349SBodong Wang sq_state = sq->state; 31427d29f349SBodong Wang } else { 31437d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 31447d29f349SBodong Wang } 31457d29f349SBodong Wang break; 31467d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 31477d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3148eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3149eb49ab0cSAlex Vesker return -EINVAL; 3150eb49ab0cSAlex Vesker else 3151ad5f8e96Smajd@mellanox.com return 0; 3152ad5f8e96Smajd@mellanox.com default: 3153ad5f8e96Smajd@mellanox.com WARN_ON(1); 3154ad5f8e96Smajd@mellanox.com return -EINVAL; 3155ad5f8e96Smajd@mellanox.com } 3156ad5f8e96Smajd@mellanox.com 31577d29f349SBodong Wang if (modify_rq) { 315834d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 315934d57585SYishai Hadas qp->ibqp.pd); 3160ad5f8e96Smajd@mellanox.com if (err) 3161ad5f8e96Smajd@mellanox.com return err; 3162ad5f8e96Smajd@mellanox.com } 3163ad5f8e96Smajd@mellanox.com 31647d29f349SBodong Wang if (modify_sq) { 316513eab21fSAviv Heller if (tx_affinity) { 316613eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 31671cd6dbd3SYishai Hadas tx_affinity, 31681cd6dbd3SYishai Hadas qp->ibqp.pd); 316913eab21fSAviv Heller if (err) 317013eab21fSAviv Heller return err; 317113eab21fSAviv Heller } 317213eab21fSAviv Heller 3173c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3174c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 317513eab21fSAviv Heller } 3176ad5f8e96Smajd@mellanox.com 3177ad5f8e96Smajd@mellanox.com return 0; 3178ad5f8e96Smajd@mellanox.com } 3179ad5f8e96Smajd@mellanox.com 3180c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3181c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3182c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 3183c6a21c38SMajd Dibbiny u8 port_num) 3184c6a21c38SMajd Dibbiny { 3185c6a21c38SMajd Dibbiny struct mlx5_ib_ucontext *ucontext = NULL; 3186c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3187c6a21c38SMajd Dibbiny 3188c6a21c38SMajd Dibbiny if (pd && pd->ibpd.uobject && pd->ibpd.uobject->context) 3189c6a21c38SMajd Dibbiny ucontext = to_mucontext(pd->ibpd.uobject->context); 3190c6a21c38SMajd Dibbiny 3191c6a21c38SMajd Dibbiny if (ucontext) { 3192c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3193c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3194c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3195c6a21c38SMajd Dibbiny 1; 3196c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3197c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3198c6a21c38SMajd Dibbiny } else { 3199c6a21c38SMajd Dibbiny tx_port_affinity = 3200c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 3201c6a21c38SMajd Dibbiny 1, &dev->roce[port_num].tx_port_affinity) % 3202c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3203c6a21c38SMajd Dibbiny 1; 3204c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3205c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3206c6a21c38SMajd Dibbiny } 3207c6a21c38SMajd Dibbiny 3208c6a21c38SMajd Dibbiny return tx_port_affinity; 3209c6a21c38SMajd Dibbiny } 3210c6a21c38SMajd Dibbiny 3211e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3212e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 321361147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 321461147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 3215e126ba97SEli Cohen { 3216427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3217427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3218427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3219427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3220427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3221427c1e7bSmajd@mellanox.com }, 3222427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3223427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3224427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3225427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3226427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3227427c1e7bSmajd@mellanox.com }, 3228427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3229427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3230427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3231427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3232427c1e7bSmajd@mellanox.com }, 3233427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3234427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3235427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3236427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3237427c1e7bSmajd@mellanox.com }, 3238427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3239427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3240427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3241427c1e7bSmajd@mellanox.com }, 3242427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3243427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3244427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3245427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3246427c1e7bSmajd@mellanox.com }, 3247427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3248427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3249427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3250427c1e7bSmajd@mellanox.com } 3251427c1e7bSmajd@mellanox.com }; 3252427c1e7bSmajd@mellanox.com 3253e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3254e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 325519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3256e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3257e126ba97SEli Cohen struct mlx5_qp_context *context; 3258e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3259eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3260e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3261e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3262e126ba97SEli Cohen int mlx5_st; 3263e126ba97SEli Cohen int err; 3264427c1e7bSmajd@mellanox.com u16 op; 326513eab21fSAviv Heller u8 tx_affinity = 0; 3266e126ba97SEli Cohen 326755de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 326855de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 326955de9a77SLeon Romanovsky if (mlx5_st < 0) 327055de9a77SLeon Romanovsky return -EINVAL; 327155de9a77SLeon Romanovsky 32721a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 32731a412fb1SSaeed Mahameed if (!context) 3274e126ba97SEli Cohen return -ENOMEM; 3275e126ba97SEli Cohen 3276c6a21c38SMajd Dibbiny pd = get_pd(qp); 327755de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3278e126ba97SEli Cohen 3279e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3280e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3281e126ba97SEli Cohen } else { 3282e126ba97SEli Cohen switch (attr->path_mig_state) { 3283e126ba97SEli Cohen case IB_MIG_MIGRATED: 3284e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3285e126ba97SEli Cohen break; 3286e126ba97SEli Cohen case IB_MIG_REARM: 3287e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3288e126ba97SEli Cohen break; 3289e126ba97SEli Cohen case IB_MIG_ARMED: 3290e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3291e126ba97SEli Cohen break; 3292e126ba97SEli Cohen } 3293e126ba97SEli Cohen } 3294e126ba97SEli Cohen 329513eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 329613eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 329713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 329813eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 329913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 330013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 330113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 330213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 33037c34ec19SAviv Heller if (dev->lag_active) { 33047fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 3305c6a21c38SMajd Dibbiny tx_affinity = get_tx_affinity(dev, pd, base, p); 330613eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 330713eab21fSAviv Heller } 330813eab21fSAviv Heller } 330913eab21fSAviv Heller } 331013eab21fSAviv Heller 3311d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3312e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3313c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3314c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3315e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3316e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3317e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3318e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3319e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3320e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3321e126ba97SEli Cohen err = -EINVAL; 3322e126ba97SEli Cohen goto out; 3323e126ba97SEli Cohen } 3324938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3325938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3326e126ba97SEli Cohen } 3327e126ba97SEli Cohen 3328e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3329e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3330e126ba97SEli Cohen 3331e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3332d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3333e126ba97SEli Cohen 3334e126ba97SEli Cohen /* todo implement counter_index functionality */ 3335e126ba97SEli Cohen 3336e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3337e126ba97SEli Cohen context->pri_path.port = qp->port; 3338e126ba97SEli Cohen 3339e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3340e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3341e126ba97SEli Cohen 3342e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 334375850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3344e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3345f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3346e126ba97SEli Cohen if (err) 3347e126ba97SEli Cohen goto out; 3348e126ba97SEli Cohen } 3349e126ba97SEli Cohen 3350e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3351e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3352e126ba97SEli Cohen 3353e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 335475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 335575850d0bSmajd@mellanox.com &context->alt_path, 3356f879ee8dSAchiad Shochat attr->alt_port_num, 3357f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3358f879ee8dSAchiad Shochat 0, attr, true); 3359e126ba97SEli Cohen if (err) 3360e126ba97SEli Cohen goto out; 3361e126ba97SEli Cohen } 3362e126ba97SEli Cohen 336389ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 336489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3365e126ba97SEli Cohen 3366e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3367e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3368e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3369e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3370e126ba97SEli Cohen 3371e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3372e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3373e126ba97SEli Cohen 3374e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3375e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3376e126ba97SEli Cohen 3377e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3378e126ba97SEli Cohen if (attr->max_rd_atomic) 3379e126ba97SEli Cohen context->params1 |= 3380e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3381e126ba97SEli Cohen } 3382e126ba97SEli Cohen 3383e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3384e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3385e126ba97SEli Cohen 3386e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3387e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3388e126ba97SEli Cohen context->params2 |= 3389e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3390e126ba97SEli Cohen } 3391e126ba97SEli Cohen 3392a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3393a60109dcSYonatan Cohen __be32 access_flags = 0; 3394a60109dcSYonatan Cohen 3395a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3396a60109dcSYonatan Cohen if (err) 3397a60109dcSYonatan Cohen goto out; 3398a60109dcSYonatan Cohen 3399a60109dcSYonatan Cohen context->params2 |= access_flags; 3400a60109dcSYonatan Cohen } 3401e126ba97SEli Cohen 3402e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3403e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3404e126ba97SEli Cohen 3405e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3406e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3407e126ba97SEli Cohen 3408e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3409e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3410e126ba97SEli Cohen 3411e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3412e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3413e126ba97SEli Cohen 34140837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 34150837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 34160837e86aSMark Bloch qp->port) - 1; 3417c2e53b2cSYishai Hadas 3418c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3419c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3420c2e53b2cSYishai Hadas port_num = 0; 3421c2e53b2cSYishai Hadas 3422eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 34230837e86aSMark Bloch context->qp_counter_set_usr_page |= 3424e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 34250837e86aSMark Bloch } 34260837e86aSMark Bloch 3427e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3428e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3429e126ba97SEli Cohen 3430b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3431b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3432e126ba97SEli Cohen 3433e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3434e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3435e126ba97SEli Cohen 3436427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 34375d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 34385d414b17SDan Carpenter err = -EINVAL; 3439427c1e7bSmajd@mellanox.com goto out; 34405d414b17SDan Carpenter } 3441427c1e7bSmajd@mellanox.com 3442427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3443e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3444e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3445ad5f8e96Smajd@mellanox.com 3446c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3447c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 34480680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 34490680efa2SAlex Vesker 34500680efa2SAlex Vesker raw_qp_param.operation = op; 3451eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3452e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3453eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3454eb49ab0cSAlex Vesker } 34557d29f349SBodong Wang 34567d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 345761147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 345861147f39SBodong Wang 345961147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 346061147f39SBodong Wang if (attr->rate_limit && 346161147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 346261147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 346361147f39SBodong Wang ucmd->burst_info.max_burst_sz; 346461147f39SBodong Wang } else { 346561147f39SBodong Wang err = -EINVAL; 346661147f39SBodong Wang goto out; 346761147f39SBodong Wang } 346861147f39SBodong Wang } 346961147f39SBodong Wang 347061147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 347161147f39SBodong Wang if (attr->rate_limit && 347261147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 347361147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 347461147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 347561147f39SBodong Wang } else { 347661147f39SBodong Wang err = -EINVAL; 347761147f39SBodong Wang goto out; 347861147f39SBodong Wang } 347961147f39SBodong Wang } 348061147f39SBodong Wang 34817d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 34827d29f349SBodong Wang } 34837d29f349SBodong Wang 348413eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 34850680efa2SAlex Vesker } else { 34861a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 348719098df2Smajd@mellanox.com &base->mqp); 34880680efa2SAlex Vesker } 34890680efa2SAlex Vesker 3490e126ba97SEli Cohen if (err) 3491e126ba97SEli Cohen goto out; 3492e126ba97SEli Cohen 3493e126ba97SEli Cohen qp->state = new_state; 3494e126ba97SEli Cohen 3495e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 349619098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3497e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 349819098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3499e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3500e126ba97SEli Cohen qp->port = attr->port_num; 3501e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 350219098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3503e126ba97SEli Cohen 3504e126ba97SEli Cohen /* 3505e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3506e126ba97SEli Cohen * entries and reinitialize the QP. 3507e126ba97SEli Cohen */ 350875a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 350975a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 351019098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3511e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3512e126ba97SEli Cohen if (send_cq != recv_cq) 351319098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3514e126ba97SEli Cohen 3515e126ba97SEli Cohen qp->rq.head = 0; 3516e126ba97SEli Cohen qp->rq.tail = 0; 3517e126ba97SEli Cohen qp->sq.head = 0; 3518e126ba97SEli Cohen qp->sq.tail = 0; 3519e126ba97SEli Cohen qp->sq.cur_post = 0; 352034f4c955SGuy Levi if (qp->sq.wqe_cnt) 352134f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3522e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3523e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3524e126ba97SEli Cohen } 3525e126ba97SEli Cohen 3526e126ba97SEli Cohen out: 35271a412fb1SSaeed Mahameed kfree(context); 3528e126ba97SEli Cohen return err; 3529e126ba97SEli Cohen } 3530e126ba97SEli Cohen 3531c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3532c32a4f29SMoni Shoua { 3533c32a4f29SMoni Shoua if ((mask & req) != req) 3534c32a4f29SMoni Shoua return false; 3535c32a4f29SMoni Shoua 3536c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3537c32a4f29SMoni Shoua return false; 3538c32a4f29SMoni Shoua 3539c32a4f29SMoni Shoua return true; 3540c32a4f29SMoni Shoua } 3541c32a4f29SMoni Shoua 3542c32a4f29SMoni Shoua /* check valid transition for driver QP types 3543c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3544c32a4f29SMoni Shoua */ 3545c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3546c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3547c32a4f29SMoni Shoua { 3548c32a4f29SMoni Shoua int req = IB_QP_STATE; 3549c32a4f29SMoni Shoua int opt = 0; 3550c32a4f29SMoni Shoua 355199ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 355299ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 355399ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3554c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3555c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3556c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3557c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3558c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3559c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3560c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 35615ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3562c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3563c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3564c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3565c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3566c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3567c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3568c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3569c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3570c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3571c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3572c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3573c32a4f29SMoni Shoua } 3574c32a4f29SMoni Shoua return false; 3575c32a4f29SMoni Shoua } 3576c32a4f29SMoni Shoua 3577776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3578776a3906SMoni Shoua * valid transitions are: 3579776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3580776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3581776a3906SMoni Shoua * mtu, gid_index and hop_limit 3582776a3906SMoni Shoua * Other transitions and attributes are illegal 3583776a3906SMoni Shoua */ 3584776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3585776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3586776a3906SMoni Shoua { 3587776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3588776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3589776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3590776a3906SMoni Shoua int err = 0; 3591776a3906SMoni Shoua int required = IB_QP_STATE; 3592776a3906SMoni Shoua void *dctc; 3593776a3906SMoni Shoua 3594776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3595776a3906SMoni Shoua return -EINVAL; 3596776a3906SMoni Shoua 3597776a3906SMoni Shoua cur_state = qp->state; 3598776a3906SMoni Shoua new_state = attr->qp_state; 3599776a3906SMoni Shoua 3600776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3601776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3602776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3603776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3604776a3906SMoni Shoua return -EINVAL; 3605776a3906SMoni Shoua 3606776a3906SMoni Shoua if (attr->port_num == 0 || 3607776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3608776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3609776a3906SMoni Shoua attr->port_num, dev->num_ports); 3610776a3906SMoni Shoua return -EINVAL; 3611776a3906SMoni Shoua } 3612776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3613776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3614776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3615776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3616776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3617a60109dcSYonatan Cohen int atomic_mode; 3618a60109dcSYonatan Cohen 3619a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3620a60109dcSYonatan Cohen if (atomic_mode < 0) 3621776a3906SMoni Shoua return -EOPNOTSUPP; 3622a60109dcSYonatan Cohen 3623a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3624776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3625776a3906SMoni Shoua } 3626776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3627776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3628776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3629776a3906SMoni Shoua 3630776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3631776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3632776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3633776a3906SMoni Shoua sizeof(resp.dctn); 3634776a3906SMoni Shoua 3635776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3636776a3906SMoni Shoua return -EINVAL; 3637776a3906SMoni Shoua resp.response_length = min_resp_len; 3638776a3906SMoni Shoua 3639776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3640776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3641776a3906SMoni Shoua return -EINVAL; 3642776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3643776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3644776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3645776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3646776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3647776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3648776a3906SMoni Shoua 3649776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3650776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3651776a3906SMoni Shoua if (err) 3652776a3906SMoni Shoua return err; 3653776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3654776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3655776a3906SMoni Shoua if (err) { 3656776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3657776a3906SMoni Shoua return err; 3658776a3906SMoni Shoua } 3659776a3906SMoni Shoua } else { 3660776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3661776a3906SMoni Shoua return -EINVAL; 3662776a3906SMoni Shoua } 3663776a3906SMoni Shoua if (err) 3664776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3665776a3906SMoni Shoua else 3666776a3906SMoni Shoua qp->state = new_state; 3667776a3906SMoni Shoua return err; 3668776a3906SMoni Shoua } 3669776a3906SMoni Shoua 3670e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3671e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3672e126ba97SEli Cohen { 3673e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3674e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 367561147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3676d16e91daSHaggai Eran enum ib_qp_type qp_type; 3677e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 367861147f39SBodong Wang size_t required_cmd_sz; 3679e126ba97SEli Cohen int err = -EINVAL; 3680e126ba97SEli Cohen int port; 3681e126ba97SEli Cohen 368228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 368328d61370SYishai Hadas return -ENOSYS; 368428d61370SYishai Hadas 368561147f39SBodong Wang if (udata && udata->inlen) { 368661147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 368761147f39SBodong Wang sizeof(ucmd.reserved); 368861147f39SBodong Wang if (udata->inlen < required_cmd_sz) 368961147f39SBodong Wang return -EINVAL; 369061147f39SBodong Wang 369161147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 369261147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 369361147f39SBodong Wang udata->inlen - sizeof(ucmd))) 369461147f39SBodong Wang return -EOPNOTSUPP; 369561147f39SBodong Wang 369661147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 369761147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 369861147f39SBodong Wang return -EFAULT; 369961147f39SBodong Wang 370061147f39SBodong Wang if (ucmd.comp_mask || 370161147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 370261147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 370361147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 370461147f39SBodong Wang return -EOPNOTSUPP; 370561147f39SBodong Wang } 370661147f39SBodong Wang 3707d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3708d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3709d16e91daSHaggai Eran 3710c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3711c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3712c32a4f29SMoni Shoua else 3713d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3714d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3715d16e91daSHaggai Eran 3716776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3717776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3718c32a4f29SMoni Shoua 3719e126ba97SEli Cohen mutex_lock(&qp->mutex); 3720e126ba97SEli Cohen 3721e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3722e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3723e126ba97SEli Cohen 37242811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 37252811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 37262811ba51SAchiad Shochat } 37272811ba51SAchiad Shochat 3728c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3729c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3730c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3731c2e53b2cSYishai Hadas attr_mask); 3732c2e53b2cSYishai Hadas goto out; 3733c2e53b2cSYishai Hadas } 3734c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3735c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3736d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3737d31131bbSKamal Heib attr_mask)) { 3738158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3739158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3740e126ba97SEli Cohen goto out; 3741c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3742c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3743c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3744c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3745c32a4f29SMoni Shoua goto out; 3746158abf86SHaggai Eran } 3747e126ba97SEli Cohen 3748e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3749938fe83cSSaeed Mahameed (attr->port_num == 0 || 3750508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3751158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3752158abf86SHaggai Eran attr->port_num, dev->num_ports); 3753e126ba97SEli Cohen goto out; 3754158abf86SHaggai Eran } 3755e126ba97SEli Cohen 3756e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3757e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3758938fe83cSSaeed Mahameed if (attr->pkey_index >= 3759158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3760158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3761158abf86SHaggai Eran attr->pkey_index); 3762e126ba97SEli Cohen goto out; 3763e126ba97SEli Cohen } 3764158abf86SHaggai Eran } 3765e126ba97SEli Cohen 3766e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3767938fe83cSSaeed Mahameed attr->max_rd_atomic > 3768158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3769158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3770158abf86SHaggai Eran attr->max_rd_atomic); 3771e126ba97SEli Cohen goto out; 3772158abf86SHaggai Eran } 3773e126ba97SEli Cohen 3774e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3775938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3776158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3777158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3778158abf86SHaggai Eran attr->max_dest_rd_atomic); 3779e126ba97SEli Cohen goto out; 3780158abf86SHaggai Eran } 3781e126ba97SEli Cohen 3782e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3783e126ba97SEli Cohen err = 0; 3784e126ba97SEli Cohen goto out; 3785e126ba97SEli Cohen } 3786e126ba97SEli Cohen 378761147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 378861147f39SBodong Wang new_state, &ucmd); 3789e126ba97SEli Cohen 3790e126ba97SEli Cohen out: 3791e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3792e126ba97SEli Cohen return err; 3793e126ba97SEli Cohen } 3794e126ba97SEli Cohen 379534f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 379634f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 379734f4c955SGuy Levi { 379834f4c955SGuy Levi u32 idx; 379934f4c955SGuy Levi 380034f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 380134f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 380234f4c955SGuy Levi 380334f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 380434f4c955SGuy Levi } 380534f4c955SGuy Levi 380634f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 380734f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 380834f4c955SGuy Levi * @sq - SQ buffer. 380934f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 381034f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 381134f4c955SGuy Levi * @cur_edge: Updated current edge. 381234f4c955SGuy Levi */ 381334f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 381434f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 381534f4c955SGuy Levi { 381634f4c955SGuy Levi if (likely(*seg != *cur_edge)) 381734f4c955SGuy Levi return; 381834f4c955SGuy Levi 381934f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 382034f4c955SGuy Levi } 382134f4c955SGuy Levi 382234f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 382334f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 382434f4c955SGuy Levi * @sq - SQ buffer. 382534f4c955SGuy Levi * @cur_edge: Updated current edge. 382634f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 382734f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 382834f4c955SGuy Levi * @src: Pointer to copy from. 382934f4c955SGuy Levi * @n: Number of bytes to copy. 383034f4c955SGuy Levi */ 383134f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 383234f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 383334f4c955SGuy Levi size_t n) 383434f4c955SGuy Levi { 383534f4c955SGuy Levi while (likely(n)) { 383634f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 383734f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 383834f4c955SGuy Levi size_t stride; 383934f4c955SGuy Levi 384034f4c955SGuy Levi memcpy(*seg, src, copysz); 384134f4c955SGuy Levi 384234f4c955SGuy Levi n -= copysz; 384334f4c955SGuy Levi src += copysz; 384434f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 384534f4c955SGuy Levi *seg += stride; 384634f4c955SGuy Levi *wqe_sz += stride >> 4; 384734f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 384834f4c955SGuy Levi } 384934f4c955SGuy Levi } 385034f4c955SGuy Levi 3851e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3852e126ba97SEli Cohen { 3853e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3854e126ba97SEli Cohen unsigned cur; 3855e126ba97SEli Cohen 3856e126ba97SEli Cohen cur = wq->head - wq->tail; 3857e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3858e126ba97SEli Cohen return 0; 3859e126ba97SEli Cohen 3860e126ba97SEli Cohen cq = to_mcq(ib_cq); 3861e126ba97SEli Cohen spin_lock(&cq->lock); 3862e126ba97SEli Cohen cur = wq->head - wq->tail; 3863e126ba97SEli Cohen spin_unlock(&cq->lock); 3864e126ba97SEli Cohen 3865e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3866e126ba97SEli Cohen } 3867e126ba97SEli Cohen 3868e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3869e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3870e126ba97SEli Cohen { 3871e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3872e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3873e126ba97SEli Cohen rseg->reserved = 0; 3874e126ba97SEli Cohen } 3875e126ba97SEli Cohen 387634f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 387734f4c955SGuy Levi void **seg, int *size, void **cur_edge) 3878f0313965SErez Shitrit { 387934f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 3880f0313965SErez Shitrit 3881f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3882f0313965SErez Shitrit 3883f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3884f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3885f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3886f0313965SErez Shitrit 3887f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3888f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 388934f4c955SGuy Levi size_t left, copysz; 3890f0313965SErez Shitrit void *pdata = ud_wr->header; 389134f4c955SGuy Levi size_t stride; 3892f0313965SErez Shitrit 3893f0313965SErez Shitrit left = ud_wr->hlen; 3894f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 38952b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3896f0313965SErez Shitrit 389734f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 389834f4c955SGuy Levi * first copy up to the current edge and then, if needed, 389934f4c955SGuy Levi * fall-through to memcpy_send_wqe. 3900f0313965SErez Shitrit */ 390134f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 390234f4c955SGuy Levi left); 390334f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 390434f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 390534f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 390634f4c955SGuy Levi *size += stride / 16; 390734f4c955SGuy Levi *seg += stride; 3908f0313965SErez Shitrit 390934f4c955SGuy Levi if (copysz < left) { 391034f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 3911f0313965SErez Shitrit left -= copysz; 3912f0313965SErez Shitrit pdata += copysz; 391334f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 391434f4c955SGuy Levi left); 3915f0313965SErez Shitrit } 3916f0313965SErez Shitrit 391734f4c955SGuy Levi return; 391834f4c955SGuy Levi } 391934f4c955SGuy Levi 392034f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 392134f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3922f0313965SErez Shitrit } 3923f0313965SErez Shitrit 3924e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3925f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3926e126ba97SEli Cohen { 3927e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3928e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3929e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3930e126ba97SEli Cohen } 3931e126ba97SEli Cohen 3932e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3933e126ba97SEli Cohen { 3934e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3935e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3936e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3937e126ba97SEli Cohen } 3938e126ba97SEli Cohen 393931616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3940e126ba97SEli Cohen { 394131616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 394231616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3943e126ba97SEli Cohen } 3944e126ba97SEli Cohen 3945e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3946e126ba97SEli Cohen { 3947e126ba97SEli Cohen u64 result; 3948e126ba97SEli Cohen 3949e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3950e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3951e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3952e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3953e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3954e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3955e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3956e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3957e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3958e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3959e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3960e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3961e126ba97SEli Cohen 3962e126ba97SEli Cohen return cpu_to_be64(result); 3963e126ba97SEli Cohen } 3964e126ba97SEli Cohen 3965e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3966e6631814SSagi Grimberg { 3967e6631814SSagi Grimberg u64 result; 3968e6631814SSagi Grimberg 3969e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3970e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3971e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3972d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3973e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3974e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3975e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3976e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3977e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3978e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3979e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3980e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3981e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3982e6631814SSagi Grimberg 3983e6631814SSagi Grimberg return cpu_to_be64(result); 3984e6631814SSagi Grimberg } 3985e6631814SSagi Grimberg 39868a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 3987064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 39888a187ee5SSagi Grimberg { 398931616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 39908a187ee5SSagi Grimberg 39918a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3992b005d316SSagi Grimberg 39938a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 3994064e5262SIdan Burstein if (umr_inline) 3995064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 399631616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 39978a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 39988a187ee5SSagi Grimberg } 39998a187ee5SSagi Grimberg 4000dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4001e126ba97SEli Cohen { 4002e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4003e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 40042d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4005e126ba97SEli Cohen } 4006e126ba97SEli Cohen 400731616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4008e126ba97SEli Cohen { 4009968e78ddSHaggai Eran u64 result; 4010e126ba97SEli Cohen 401131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4012e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4013968e78ddSHaggai Eran 4014968e78ddSHaggai Eran return cpu_to_be64(result); 4015968e78ddSHaggai Eran } 4016968e78ddSHaggai Eran 401731616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4018968e78ddSHaggai Eran { 4019968e78ddSHaggai Eran u64 result; 4020968e78ddSHaggai Eran 4021968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4022968e78ddSHaggai Eran 4023968e78ddSHaggai Eran return cpu_to_be64(result); 4024968e78ddSHaggai Eran } 4025968e78ddSHaggai Eran 402656e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 402756e11d62SNoa Osherovich { 402856e11d62SNoa Osherovich u64 result; 402956e11d62SNoa Osherovich 403056e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 403156e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 403231616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 403356e11d62SNoa Osherovich 403456e11d62SNoa Osherovich return cpu_to_be64(result); 403556e11d62SNoa Osherovich } 403656e11d62SNoa Osherovich 403731616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 403856e11d62SNoa Osherovich { 403956e11d62SNoa Osherovich u64 result; 404056e11d62SNoa Osherovich 404131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 404231616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 404356e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 404431616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 404531616255SArtemy Kovalyov 404631616255SArtemy Kovalyov if (atomic) 404731616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 404856e11d62SNoa Osherovich 404956e11d62SNoa Osherovich return cpu_to_be64(result); 405056e11d62SNoa Osherovich } 405156e11d62SNoa Osherovich 405256e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 405356e11d62SNoa Osherovich { 405456e11d62SNoa Osherovich u64 result; 405556e11d62SNoa Osherovich 405631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 405756e11d62SNoa Osherovich 405856e11d62SNoa Osherovich return cpu_to_be64(result); 405956e11d62SNoa Osherovich } 406056e11d62SNoa Osherovich 4061c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4062c8d75a98SMajd Dibbiny { 4063c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4064c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4065c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4066c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4067c8d75a98SMajd Dibbiny return -EPERM; 4068c8d75a98SMajd Dibbiny return 0; 4069c8d75a98SMajd Dibbiny } 4070c8d75a98SMajd Dibbiny 4071c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4072c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4073f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4074968e78ddSHaggai Eran { 4075f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4076968e78ddSHaggai Eran 4077968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4078968e78ddSHaggai Eran 4079968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 4080968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 4081968e78ddSHaggai Eran else 4082968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 4083968e78ddSHaggai Eran 408431616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 408531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 408631616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 408731616255SArtemy Kovalyov 408831616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 408931616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4090968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4091968e78ddSHaggai Eran } 409256e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 409356e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 409431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 409531616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 409656e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4097e126ba97SEli Cohen } 409831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 409931616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 410031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 410131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4102e126ba97SEli Cohen 4103e126ba97SEli Cohen if (!wr->num_sge) 4104968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4105c8d75a98SMajd Dibbiny 4106c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4107e126ba97SEli Cohen } 4108e126ba97SEli Cohen 4109e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4110e126ba97SEli Cohen { 4111e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4112e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4113e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4114e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 41152ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4116e126ba97SEli Cohen } 4117e126ba97SEli Cohen 41188a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 41198a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 41208a187ee5SSagi Grimberg u32 key, int access) 41218a187ee5SSagi Grimberg { 41228a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 41238a187ee5SSagi Grimberg 41248a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4125b005d316SSagi Grimberg 4126ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4127b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4128ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4129b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4130b005d316SSagi Grimberg ndescs *= 2; 4131b005d316SSagi Grimberg 4132b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 41338a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 41348a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 41358a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 41368a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 41378a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 41388a187ee5SSagi Grimberg } 41398a187ee5SSagi Grimberg 4140dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4141e126ba97SEli Cohen { 4142e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4143968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4144e126ba97SEli Cohen } 4145e126ba97SEli Cohen 4146f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4147f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4148e126ba97SEli Cohen { 4149f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4150968e78ddSHaggai Eran 4151e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 415231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4153968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4154e126ba97SEli Cohen 4155968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 415656e11d62SNoa Osherovich if (umrwr->pd) 4157968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 415831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 415931616255SArtemy Kovalyov !umrwr->length) 416031616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 416131616255SArtemy Kovalyov 416231616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4163968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4164968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4165746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4166968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4167e126ba97SEli Cohen } 4168e126ba97SEli Cohen 41698a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 41708a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 41718a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 41728a187ee5SSagi Grimberg { 41738a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 41748a187ee5SSagi Grimberg 41758a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 41768a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 41778a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 41788a187ee5SSagi Grimberg } 41798a187ee5SSagi Grimberg 4180f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4181e126ba97SEli Cohen { 4182e126ba97SEli Cohen switch (wr->opcode) { 4183e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4184e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4185e126ba97SEli Cohen return wr->ex.imm_data; 4186e126ba97SEli Cohen 4187e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4188e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4189e126ba97SEli Cohen 4190e126ba97SEli Cohen default: 4191e126ba97SEli Cohen return 0; 4192e126ba97SEli Cohen } 4193e126ba97SEli Cohen } 4194e126ba97SEli Cohen 4195e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4196e126ba97SEli Cohen { 4197e126ba97SEli Cohen u8 *p = wqe; 4198e126ba97SEli Cohen u8 res = 0; 4199e126ba97SEli Cohen int i; 4200e126ba97SEli Cohen 4201e126ba97SEli Cohen for (i = 0; i < size; i++) 4202e126ba97SEli Cohen res ^= p[i]; 4203e126ba97SEli Cohen 4204e126ba97SEli Cohen return ~res; 4205e126ba97SEli Cohen } 4206e126ba97SEli Cohen 4207e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4208e126ba97SEli Cohen { 4209e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4210e126ba97SEli Cohen } 4211e126ba97SEli Cohen 4212f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 421334f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4214e126ba97SEli Cohen { 4215e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 421634f4c955SGuy Levi size_t offset; 4217e126ba97SEli Cohen int inl = 0; 4218e126ba97SEli Cohen int i; 4219e126ba97SEli Cohen 422034f4c955SGuy Levi seg = *wqe; 422134f4c955SGuy Levi *wqe += sizeof(*seg); 422234f4c955SGuy Levi offset = sizeof(*seg); 422334f4c955SGuy Levi 4224e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 422534f4c955SGuy Levi size_t len = wr->sg_list[i].length; 422634f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 422734f4c955SGuy Levi 4228e126ba97SEli Cohen inl += len; 4229e126ba97SEli Cohen 4230e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4231e126ba97SEli Cohen return -ENOMEM; 4232e126ba97SEli Cohen 423334f4c955SGuy Levi while (likely(len)) { 423434f4c955SGuy Levi size_t leftlen; 423534f4c955SGuy Levi size_t copysz; 423634f4c955SGuy Levi 423734f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 423834f4c955SGuy Levi *wqe_sz + (offset >> 4), 423934f4c955SGuy Levi cur_edge); 424034f4c955SGuy Levi 424134f4c955SGuy Levi leftlen = *cur_edge - *wqe; 424234f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 424334f4c955SGuy Levi 424434f4c955SGuy Levi memcpy(*wqe, addr, copysz); 424534f4c955SGuy Levi len -= copysz; 424634f4c955SGuy Levi addr += copysz; 424734f4c955SGuy Levi *wqe += copysz; 424834f4c955SGuy Levi offset += copysz; 4249e126ba97SEli Cohen } 4250e126ba97SEli Cohen } 4251e126ba97SEli Cohen 4252e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4253e126ba97SEli Cohen 425434f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4255e126ba97SEli Cohen 4256e126ba97SEli Cohen return 0; 4257e126ba97SEli Cohen } 4258e126ba97SEli Cohen 4259e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4260e6631814SSagi Grimberg { 4261e6631814SSagi Grimberg switch (type) { 4262e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4263e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4264e6631814SSagi Grimberg default: 4265e6631814SSagi Grimberg return 0; 4266e6631814SSagi Grimberg } 4267e6631814SSagi Grimberg } 4268e6631814SSagi Grimberg 4269e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4270e6631814SSagi Grimberg { 4271e6631814SSagi Grimberg switch (block_size) { 4272e6631814SSagi Grimberg case 512: return 0x1; 4273e6631814SSagi Grimberg case 520: return 0x2; 4274e6631814SSagi Grimberg case 4096: return 0x3; 4275e6631814SSagi Grimberg case 4160: return 0x4; 4276e6631814SSagi Grimberg case 1073741824: return 0x5; 4277e6631814SSagi Grimberg default: return 0; 4278e6631814SSagi Grimberg } 4279e6631814SSagi Grimberg } 4280e6631814SSagi Grimberg 428178eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4282142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4283e6631814SSagi Grimberg { 4284142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4285142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4286142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4287142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4288142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4289142537f4SSagi Grimberg /* repeating block */ 4290142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4291142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4292142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4293e6631814SSagi Grimberg 429478eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 429578eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4296e6631814SSagi Grimberg 429778eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 429878eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 429978eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 430078eda2bbSSagi Grimberg else 430178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4302e6631814SSagi Grimberg } 4303e6631814SSagi Grimberg 430478eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 430578eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4306e6631814SSagi Grimberg } 4307e6631814SSagi Grimberg 4308e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4309e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4310e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4311e6631814SSagi Grimberg { 4312e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4313e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4314e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4315e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4316e6631814SSagi Grimberg 4317c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4318e6631814SSagi Grimberg 4319142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4320142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4321e6631814SSagi Grimberg /* Input domain check byte mask */ 4322e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 432378eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 432478eda2bbSSagi Grimberg 432578eda2bbSSagi Grimberg /* Memory domain */ 432678eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 432778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 432878eda2bbSSagi Grimberg break; 432978eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 433078eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 433178eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 433278eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 433378eda2bbSSagi Grimberg break; 433478eda2bbSSagi Grimberg default: 433578eda2bbSSagi Grimberg return -EINVAL; 433678eda2bbSSagi Grimberg } 433778eda2bbSSagi Grimberg 433878eda2bbSSagi Grimberg /* Wire domain */ 433978eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 434078eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 434178eda2bbSSagi Grimberg break; 434278eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4343e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 434478eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4345e6631814SSagi Grimberg /* Same block structure */ 4346142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4347e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4348fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4349c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4350fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4351c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4352fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4353e6631814SSagi Grimberg } else 4354e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4355e6631814SSagi Grimberg 4356142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 435778eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4358e6631814SSagi Grimberg break; 4359e6631814SSagi Grimberg default: 4360e6631814SSagi Grimberg return -EINVAL; 4361e6631814SSagi Grimberg } 4362e6631814SSagi Grimberg 4363e6631814SSagi Grimberg return 0; 4364e6631814SSagi Grimberg } 4365e6631814SSagi Grimberg 4366f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 436734f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, 436834f4c955SGuy Levi int *size, void **cur_edge) 4369e6631814SSagi Grimberg { 4370e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4371e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4372e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4373e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4374e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4375e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4376e6631814SSagi Grimberg int ret; 4377e6631814SSagi Grimberg int wqe_size; 4378e6631814SSagi Grimberg 4379e622f2f4SChristoph Hellwig if (!wr->prot || 4380e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4381e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4382e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4383e6631814SSagi Grimberg /** 4384e6631814SSagi Grimberg * Source domain doesn't contain signature information 43855c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4386e6631814SSagi Grimberg * So need construct: 4387e6631814SSagi Grimberg * ------------------ 4388e6631814SSagi Grimberg * | data_klm | 4389e6631814SSagi Grimberg * ------------------ 4390e6631814SSagi Grimberg * | BSF | 4391e6631814SSagi Grimberg * ------------------ 4392e6631814SSagi Grimberg **/ 4393e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4394e6631814SSagi Grimberg 4395e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4396e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4397e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4398e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4399e6631814SSagi Grimberg } else { 4400e6631814SSagi Grimberg /** 4401e6631814SSagi Grimberg * Source domain contains signature information 4402e6631814SSagi Grimberg * So need construct a strided block format: 4403e6631814SSagi Grimberg * --------------------------- 4404e6631814SSagi Grimberg * | stride_block_ctrl | 4405e6631814SSagi Grimberg * --------------------------- 4406e6631814SSagi Grimberg * | data_klm | 4407e6631814SSagi Grimberg * --------------------------- 4408e6631814SSagi Grimberg * | prot_klm | 4409e6631814SSagi Grimberg * --------------------------- 4410e6631814SSagi Grimberg * | BSF | 4411e6631814SSagi Grimberg * --------------------------- 4412e6631814SSagi Grimberg **/ 4413e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4414e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4415e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4416e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4417e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4418e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4419e6631814SSagi Grimberg int prot_size; 4420e6631814SSagi Grimberg 4421e6631814SSagi Grimberg sblock_ctrl = *seg; 4422e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4423e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4424e6631814SSagi Grimberg 4425e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4426e6631814SSagi Grimberg if (!prot_size) { 4427e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4428e6631814SSagi Grimberg return -EINVAL; 4429e6631814SSagi Grimberg } 4430e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4431e6631814SSagi Grimberg prot_size); 4432e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4433e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4434e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4435e6631814SSagi Grimberg 4436e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4437e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4438e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 44395c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 44405c273b16SSagi Grimberg 4441e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4442e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4443e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4444e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 44455c273b16SSagi Grimberg 4446e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4447e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4448e6631814SSagi Grimberg } 4449e6631814SSagi Grimberg 4450e6631814SSagi Grimberg *seg += wqe_size; 4451e6631814SSagi Grimberg *size += wqe_size / 16; 445234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4453e6631814SSagi Grimberg 4454e6631814SSagi Grimberg bsf = *seg; 4455e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4456e6631814SSagi Grimberg if (ret) 4457e6631814SSagi Grimberg return -EINVAL; 4458e6631814SSagi Grimberg 4459e6631814SSagi Grimberg *seg += sizeof(*bsf); 4460e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 446134f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4462e6631814SSagi Grimberg 4463e6631814SSagi Grimberg return 0; 4464e6631814SSagi Grimberg } 4465e6631814SSagi Grimberg 4466e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4467f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4468e6631814SSagi Grimberg u32 length, u32 pdn) 4469e6631814SSagi Grimberg { 4470e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4471e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4472d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4473e6631814SSagi Grimberg 4474e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4475e6631814SSagi Grimberg 4476e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4477ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4478e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4479d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4480e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4481e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 448231616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4483e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4484e6631814SSagi Grimberg } 4485e6631814SSagi Grimberg 4486e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 448731616255SArtemy Kovalyov u32 size) 4488e6631814SSagi Grimberg { 4489e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4490e6631814SSagi Grimberg 4491e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 449231616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4493e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4494e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4495e6631814SSagi Grimberg } 4496e6631814SSagi Grimberg 4497e6631814SSagi Grimberg 4498f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 449934f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, int *size, 450034f4c955SGuy Levi void **cur_edge) 4501e6631814SSagi Grimberg { 4502f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4503e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4504e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 450531616255SArtemy Kovalyov u32 xlt_size; 4506e6631814SSagi Grimberg int region_len, ret; 4507e6631814SSagi Grimberg 4508e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4509e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4510d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4511d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4512e6631814SSagi Grimberg return -EINVAL; 4513e6631814SSagi Grimberg 4514e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4515e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4516e622f2f4SChristoph Hellwig if (wr->prot && 4517e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4518e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4519e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4520e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4521e6631814SSagi Grimberg 4522e6631814SSagi Grimberg /** 4523e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4524e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4525e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4526e6631814SSagi Grimberg **/ 452731616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4528e6631814SSagi Grimberg 452931616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4530e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4531e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 453234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4533e6631814SSagi Grimberg 453431616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4535e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4536e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 453734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4538e6631814SSagi Grimberg 453934f4c955SGuy Levi ret = set_sig_data_segment(wr, qp, seg, size, cur_edge); 4540e6631814SSagi Grimberg if (ret) 4541e6631814SSagi Grimberg return ret; 4542e6631814SSagi Grimberg 4543d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4544e6631814SSagi Grimberg return 0; 4545e6631814SSagi Grimberg } 4546e6631814SSagi Grimberg 4547e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4548e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4549e6631814SSagi Grimberg { 4550e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4551e6631814SSagi Grimberg 4552e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4553e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4554e6631814SSagi Grimberg switch (domain->sig_type) { 455578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 455678eda2bbSSagi Grimberg break; 4557e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4558e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4559e6631814SSagi Grimberg domain->sig.dif.app_tag); 4560e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4561e6631814SSagi Grimberg break; 4562e6631814SSagi Grimberg default: 456312bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 456412bbf1eaSLeon Romanovsky domain->sig_type); 456512bbf1eaSLeon Romanovsky return -EINVAL; 4566e6631814SSagi Grimberg } 4567e6631814SSagi Grimberg 456878eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 456978eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 457078eda2bbSSagi Grimberg 4571e6631814SSagi Grimberg return 0; 4572e6631814SSagi Grimberg } 4573e6631814SSagi Grimberg 45748a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4575f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 457634f4c955SGuy Levi void **seg, int *size, void **cur_edge) 45778a187ee5SSagi Grimberg { 45788a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 45798a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 458034f4c955SGuy Levi size_t mr_list_size = mr->ndescs * mr->desc_size; 4581064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 45828a187ee5SSagi Grimberg 45838a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 45848a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 45858a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 45868a187ee5SSagi Grimberg return -EINVAL; 45878a187ee5SSagi Grimberg } 45888a187ee5SSagi Grimberg 4589064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 45908a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 45918a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 459234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 45938a187ee5SSagi Grimberg 45948a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 45958a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 45968a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 459734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 45988a187ee5SSagi Grimberg 4599064e5262SIdan Burstein if (umr_inline) { 460034f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 460134f4c955SGuy Levi mr_list_size); 460234f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 4603064e5262SIdan Burstein } else { 46048a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 46058a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 46068a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4607064e5262SIdan Burstein } 46088a187ee5SSagi Grimberg return 0; 46098a187ee5SSagi Grimberg } 46108a187ee5SSagi Grimberg 461134f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 461234f4c955SGuy Levi void **cur_edge) 4613e126ba97SEli Cohen { 4614dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4615e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4616e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 461734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4618dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4619e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4620e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 462134f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4622e126ba97SEli Cohen } 4623e126ba97SEli Cohen 462434f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 4625e126ba97SEli Cohen { 4626e126ba97SEli Cohen __be32 *p = NULL; 462734f4c955SGuy Levi u32 tidx = idx; 4628e126ba97SEli Cohen int i, j; 4629e126ba97SEli Cohen 463034f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 4631e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4632e126ba97SEli Cohen if ((i & 0xf) == 0) { 4633e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 463434f4c955SGuy Levi p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, tidx); 463534f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 4636e126ba97SEli Cohen j = 0; 4637e126ba97SEli Cohen } 4638e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4639e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4640e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4641e126ba97SEli Cohen } 4642e126ba97SEli Cohen } 4643e126ba97SEli Cohen 46447bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 46456e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 464634f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 464734f4c955SGuy Levi int *size, void **cur_edge, int nreq, 464834f4c955SGuy Levi bool send_signaled, bool solicited) 46496e5eadacSSagi Grimberg { 4650b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4651b2a232d2SLeon Romanovsky return -ENOMEM; 46526e5eadacSSagi Grimberg 46536e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 465434f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 46556e5eadacSSagi Grimberg *ctrl = *seg; 46566e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 46576e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 46586e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 46597bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 46607bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 46616e5eadacSSagi Grimberg 46626e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 46636e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 466434f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 46656e5eadacSSagi Grimberg 4666b2a232d2SLeon Romanovsky return 0; 46676e5eadacSSagi Grimberg } 46686e5eadacSSagi Grimberg 46697bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 46707bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 46717bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 467234f4c955SGuy Levi int *size, void **cur_edge, int nreq) 46737bb1fafcSBart Van Assche { 467434f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 46757bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 46767bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 46777bb1fafcSBart Van Assche } 46787bb1fafcSBart Van Assche 46796e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 46806e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 468134f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 468234f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 468334f4c955SGuy Levi u32 mlx5_opcode) 46846e5eadacSSagi Grimberg { 46856e5eadacSSagi Grimberg u8 opmod = 0; 46866e5eadacSSagi Grimberg 46876e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 46886e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 468919098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 46906e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 46916e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 46926e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 46936e5eadacSSagi Grimberg 46946e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 46956e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 46966e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 46976e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 46986e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 469934f4c955SGuy Levi 470034f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 470134f4c955SGuy Levi * construction, into SQ's cache. 470234f4c955SGuy Levi */ 470334f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 470434f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 470534f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 470634f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 470734f4c955SGuy Levi cur_edge; 47086e5eadacSSagi Grimberg } 47096e5eadacSSagi Grimberg 4710d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4711d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4712e126ba97SEli Cohen { 4713e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4714e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 471589ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4716d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4717e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4718e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4719d16e91daSHaggai Eran struct mlx5_bf *bf; 472034f4c955SGuy Levi void *cur_edge; 4721e126ba97SEli Cohen int uninitialized_var(size); 4722e126ba97SEli Cohen unsigned long flags; 4723e126ba97SEli Cohen unsigned idx; 4724e126ba97SEli Cohen int err = 0; 4725e126ba97SEli Cohen int num_sge; 4726e126ba97SEli Cohen void *seg; 4727e126ba97SEli Cohen int nreq; 4728e126ba97SEli Cohen int i; 4729e126ba97SEli Cohen u8 next_fence = 0; 4730e126ba97SEli Cohen u8 fence; 4731e126ba97SEli Cohen 47326c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 47336c75520fSParav Pandit !drain)) { 47346c75520fSParav Pandit *bad_wr = wr; 47356c75520fSParav Pandit return -EIO; 47366c75520fSParav Pandit } 47376c75520fSParav Pandit 4738d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4739d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4740d16e91daSHaggai Eran 4741d16e91daSHaggai Eran qp = to_mqp(ibqp); 47425fe9dec0SEli Cohen bf = &qp->bf; 4743d16e91daSHaggai Eran 4744e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4745e126ba97SEli Cohen 4746e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4747a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4748e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4749e126ba97SEli Cohen err = -EINVAL; 4750e126ba97SEli Cohen *bad_wr = wr; 4751e126ba97SEli Cohen goto out; 4752e126ba97SEli Cohen } 4753e126ba97SEli Cohen 4754e126ba97SEli Cohen num_sge = wr->num_sge; 4755e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4756e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 475724be409bSChuck Lever err = -EINVAL; 4758e126ba97SEli Cohen *bad_wr = wr; 4759e126ba97SEli Cohen goto out; 4760e126ba97SEli Cohen } 4761e126ba97SEli Cohen 476234f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 476334f4c955SGuy Levi nreq); 47646e5eadacSSagi Grimberg if (err) { 47656e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 47666e5eadacSSagi Grimberg err = -ENOMEM; 47676e5eadacSSagi Grimberg *bad_wr = wr; 47686e5eadacSSagi Grimberg goto out; 47696e5eadacSSagi Grimberg } 4770e126ba97SEli Cohen 4771074fca3aSMajd Dibbiny if (wr->opcode == IB_WR_REG_MR) { 47726e8484c5SMax Gurtovoy fence = dev->umr_fence; 47736e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4774074fca3aSMajd Dibbiny } else { 4775074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 47766e8484c5SMax Gurtovoy if (qp->next_fence) 47776e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 47786e8484c5SMax Gurtovoy else 47796e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 47806e8484c5SMax Gurtovoy } else { 47816e8484c5SMax Gurtovoy fence = qp->next_fence; 47826e8484c5SMax Gurtovoy } 4783074fca3aSMajd Dibbiny } 47846e8484c5SMax Gurtovoy 4785e126ba97SEli Cohen switch (ibqp->qp_type) { 4786e126ba97SEli Cohen case IB_QPT_XRC_INI: 4787e126ba97SEli Cohen xrc = seg; 4788e126ba97SEli Cohen seg += sizeof(*xrc); 4789e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4790e126ba97SEli Cohen /* fall through */ 4791e126ba97SEli Cohen case IB_QPT_RC: 4792e126ba97SEli Cohen switch (wr->opcode) { 4793e126ba97SEli Cohen case IB_WR_RDMA_READ: 4794e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4795e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4796e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4797e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4798e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4799e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4800e126ba97SEli Cohen break; 4801e126ba97SEli Cohen 4802e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4803e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4804e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 480581bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 480681bea28fSEli Cohen err = -ENOSYS; 480781bea28fSEli Cohen *bad_wr = wr; 480881bea28fSEli Cohen goto out; 4809e126ba97SEli Cohen 4810e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4811e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4812e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 481334f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 4814e126ba97SEli Cohen num_sge = 0; 4815e126ba97SEli Cohen break; 4816e126ba97SEli Cohen 48178a187ee5SSagi Grimberg case IB_WR_REG_MR: 48188a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 48198a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 482034f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 482134f4c955SGuy Levi &cur_edge); 48228a187ee5SSagi Grimberg if (err) { 48238a187ee5SSagi Grimberg *bad_wr = wr; 48248a187ee5SSagi Grimberg goto out; 48258a187ee5SSagi Grimberg } 48268a187ee5SSagi Grimberg num_sge = 0; 48278a187ee5SSagi Grimberg break; 48288a187ee5SSagi Grimberg 4829e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4830e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4831e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4832e6631814SSagi Grimberg 4833e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 483434f4c955SGuy Levi err = set_sig_umr_wr(wr, qp, &seg, &size, 483534f4c955SGuy Levi &cur_edge); 4836e6631814SSagi Grimberg if (err) { 4837e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4838e6631814SSagi Grimberg *bad_wr = wr; 4839e6631814SSagi Grimberg goto out; 4840e6631814SSagi Grimberg } 4841e6631814SSagi Grimberg 484234f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 484334f4c955SGuy Levi wr->wr_id, nreq, fence, 484434f4c955SGuy Levi MLX5_OPCODE_UMR); 4845e6631814SSagi Grimberg /* 4846e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4847e6631814SSagi Grimberg * on error 4848e6631814SSagi Grimberg */ 48497bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 485034f4c955SGuy Levi &size, &cur_edge, nreq, false, 485134f4c955SGuy Levi true); 4852e6631814SSagi Grimberg if (err) { 4853e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4854e6631814SSagi Grimberg err = -ENOMEM; 4855e6631814SSagi Grimberg *bad_wr = wr; 4856e6631814SSagi Grimberg goto out; 4857e6631814SSagi Grimberg } 4858e6631814SSagi Grimberg 4859e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4860e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4861e6631814SSagi Grimberg &size); 4862e6631814SSagi Grimberg if (err) { 4863e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4864e6631814SSagi Grimberg *bad_wr = wr; 4865e6631814SSagi Grimberg goto out; 4866e6631814SSagi Grimberg } 4867e6631814SSagi Grimberg 486834f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 486934f4c955SGuy Levi wr->wr_id, nreq, fence, 487034f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 48717bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 487234f4c955SGuy Levi &size, &cur_edge, nreq, false, 487334f4c955SGuy Levi true); 4874e6631814SSagi Grimberg if (err) { 4875e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4876e6631814SSagi Grimberg err = -ENOMEM; 4877e6631814SSagi Grimberg *bad_wr = wr; 4878e6631814SSagi Grimberg goto out; 4879e6631814SSagi Grimberg } 4880e6631814SSagi Grimberg 4881e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4882e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4883e6631814SSagi Grimberg &size); 4884e6631814SSagi Grimberg if (err) { 4885e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4886e6631814SSagi Grimberg *bad_wr = wr; 4887e6631814SSagi Grimberg goto out; 4888e6631814SSagi Grimberg } 4889e6631814SSagi Grimberg 489034f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 489134f4c955SGuy Levi wr->wr_id, nreq, fence, 489234f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 48936e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4894e6631814SSagi Grimberg num_sge = 0; 4895e6631814SSagi Grimberg goto skip_psv; 4896e6631814SSagi Grimberg 4897e126ba97SEli Cohen default: 4898e126ba97SEli Cohen break; 4899e126ba97SEli Cohen } 4900e126ba97SEli Cohen break; 4901e126ba97SEli Cohen 4902e126ba97SEli Cohen case IB_QPT_UC: 4903e126ba97SEli Cohen switch (wr->opcode) { 4904e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4905e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4906e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4907e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4908e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4909e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4910e126ba97SEli Cohen break; 4911e126ba97SEli Cohen 4912e126ba97SEli Cohen default: 4913e126ba97SEli Cohen break; 4914e126ba97SEli Cohen } 4915e126ba97SEli Cohen break; 4916e126ba97SEli Cohen 4917e126ba97SEli Cohen case IB_QPT_SMI: 49181e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 49191e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 49201e0e50b6SMaor Gottlieb err = -EPERM; 49211e0e50b6SMaor Gottlieb *bad_wr = wr; 49221e0e50b6SMaor Gottlieb goto out; 49231e0e50b6SMaor Gottlieb } 4924f6b1ee34SBart Van Assche /* fall through */ 4925d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4926e126ba97SEli Cohen set_datagram_seg(seg, wr); 4927e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4928e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 492934f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 493034f4c955SGuy Levi 4931e126ba97SEli Cohen break; 4932f0313965SErez Shitrit case IB_QPT_UD: 4933f0313965SErez Shitrit set_datagram_seg(seg, wr); 4934f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4935f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 493634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 4937f0313965SErez Shitrit 4938f0313965SErez Shitrit /* handle qp that supports ud offload */ 4939f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4940f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4941f0313965SErez Shitrit 4942f0313965SErez Shitrit pad = seg; 4943f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4944f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4945f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 494634f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 494734f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 494834f4c955SGuy Levi &cur_edge); 4949f0313965SErez Shitrit } 4950f0313965SErez Shitrit break; 4951e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4952e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4953e126ba97SEli Cohen err = -EINVAL; 4954e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4955e126ba97SEli Cohen goto out; 4956e126ba97SEli Cohen } 4957e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4958e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4959c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4960c8d75a98SMajd Dibbiny if (unlikely(err)) 4961c8d75a98SMajd Dibbiny goto out; 4962e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4963e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 496434f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 4965e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4966e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4967e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 496834f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 4969e126ba97SEli Cohen break; 4970e126ba97SEli Cohen 4971e126ba97SEli Cohen default: 4972e126ba97SEli Cohen break; 4973e126ba97SEli Cohen } 4974e126ba97SEli Cohen 4975e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 497634f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 4977e126ba97SEli Cohen if (unlikely(err)) { 4978e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4979e126ba97SEli Cohen *bad_wr = wr; 4980e126ba97SEli Cohen goto out; 4981e126ba97SEli Cohen } 4982e126ba97SEli Cohen } else { 4983e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 498434f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 498534f4c955SGuy Levi &cur_edge); 4986e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 498734f4c955SGuy Levi set_data_ptr_seg 498834f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 498934f4c955SGuy Levi wr->sg_list + i); 4990e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 499134f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 4992e126ba97SEli Cohen } 4993e126ba97SEli Cohen } 4994e126ba97SEli Cohen } 4995e126ba97SEli Cohen 49966e8484c5SMax Gurtovoy qp->next_fence = next_fence; 499734f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 499834f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 4999e6631814SSagi Grimberg skip_psv: 5000e126ba97SEli Cohen if (0) 5001e126ba97SEli Cohen dump_wqe(qp, idx, size); 5002e126ba97SEli Cohen } 5003e126ba97SEli Cohen 5004e126ba97SEli Cohen out: 5005e126ba97SEli Cohen if (likely(nreq)) { 5006e126ba97SEli Cohen qp->sq.head += nreq; 5007e126ba97SEli Cohen 5008e126ba97SEli Cohen /* Make sure that descriptors are written before 5009e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5010e126ba97SEli Cohen */ 5011e126ba97SEli Cohen wmb(); 5012e126ba97SEli Cohen 5013e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5014e126ba97SEli Cohen 5015ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5016ada388f7SEli Cohen * we hit doorbell */ 5017ada388f7SEli Cohen wmb(); 5018ada388f7SEli Cohen 50195fe9dec0SEli Cohen /* currently we support only regular doorbells */ 50205fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 5021e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5022e126ba97SEli Cohen * and reach the HCA out of order. 5023e126ba97SEli Cohen */ 5024e126ba97SEli Cohen mmiowb(); 5025e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5026e126ba97SEli Cohen } 5027e126ba97SEli Cohen 5028e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5029e126ba97SEli Cohen 5030e126ba97SEli Cohen return err; 5031e126ba97SEli Cohen } 5032e126ba97SEli Cohen 5033d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5034d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5035d0e84c0aSYishai Hadas { 5036d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5037d0e84c0aSYishai Hadas } 5038d0e84c0aSYishai Hadas 5039e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5040e126ba97SEli Cohen { 5041e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5042e126ba97SEli Cohen } 5043e126ba97SEli Cohen 5044d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5045d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5046e126ba97SEli Cohen { 5047e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5048e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5049e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 505089ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 505189ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5052e126ba97SEli Cohen unsigned long flags; 5053e126ba97SEli Cohen int err = 0; 5054e126ba97SEli Cohen int nreq; 5055e126ba97SEli Cohen int ind; 5056e126ba97SEli Cohen int i; 5057e126ba97SEli Cohen 50586c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 50596c75520fSParav Pandit !drain)) { 50606c75520fSParav Pandit *bad_wr = wr; 50616c75520fSParav Pandit return -EIO; 50626c75520fSParav Pandit } 50636c75520fSParav Pandit 5064d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5065d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5066d16e91daSHaggai Eran 5067e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5068e126ba97SEli Cohen 5069e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5070e126ba97SEli Cohen 5071e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5072e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5073e126ba97SEli Cohen err = -ENOMEM; 5074e126ba97SEli Cohen *bad_wr = wr; 5075e126ba97SEli Cohen goto out; 5076e126ba97SEli Cohen } 5077e126ba97SEli Cohen 5078e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5079e126ba97SEli Cohen err = -EINVAL; 5080e126ba97SEli Cohen *bad_wr = wr; 5081e126ba97SEli Cohen goto out; 5082e126ba97SEli Cohen } 5083e126ba97SEli Cohen 508434f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5085e126ba97SEli Cohen if (qp->wq_sig) 5086e126ba97SEli Cohen scat++; 5087e126ba97SEli Cohen 5088e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5089e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5090e126ba97SEli Cohen 5091e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5092e126ba97SEli Cohen scat[i].byte_count = 0; 5093e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5094e126ba97SEli Cohen scat[i].addr = 0; 5095e126ba97SEli Cohen } 5096e126ba97SEli Cohen 5097e126ba97SEli Cohen if (qp->wq_sig) { 5098e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5099e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5100e126ba97SEli Cohen } 5101e126ba97SEli Cohen 5102e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5103e126ba97SEli Cohen 5104e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5105e126ba97SEli Cohen } 5106e126ba97SEli Cohen 5107e126ba97SEli Cohen out: 5108e126ba97SEli Cohen if (likely(nreq)) { 5109e126ba97SEli Cohen qp->rq.head += nreq; 5110e126ba97SEli Cohen 5111e126ba97SEli Cohen /* Make sure that descriptors are written before 5112e126ba97SEli Cohen * doorbell record. 5113e126ba97SEli Cohen */ 5114e126ba97SEli Cohen wmb(); 5115e126ba97SEli Cohen 5116e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5117e126ba97SEli Cohen } 5118e126ba97SEli Cohen 5119e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5120e126ba97SEli Cohen 5121e126ba97SEli Cohen return err; 5122e126ba97SEli Cohen } 5123e126ba97SEli Cohen 5124d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5125d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5126d0e84c0aSYishai Hadas { 5127d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5128d0e84c0aSYishai Hadas } 5129d0e84c0aSYishai Hadas 5130e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5131e126ba97SEli Cohen { 5132e126ba97SEli Cohen switch (mlx5_state) { 5133e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5134e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5135e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5136e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5137e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5138e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5139e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5140e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5141e126ba97SEli Cohen default: return -1; 5142e126ba97SEli Cohen } 5143e126ba97SEli Cohen } 5144e126ba97SEli Cohen 5145e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5146e126ba97SEli Cohen { 5147e126ba97SEli Cohen switch (mlx5_mig_state) { 5148e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5149e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5150e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5151e126ba97SEli Cohen default: return -1; 5152e126ba97SEli Cohen } 5153e126ba97SEli Cohen } 5154e126ba97SEli Cohen 5155e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5156e126ba97SEli Cohen { 5157e126ba97SEli Cohen int ib_flags = 0; 5158e126ba97SEli Cohen 5159e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5160e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5161e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5162e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5163e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5164e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5165e126ba97SEli Cohen 5166e126ba97SEli Cohen return ib_flags; 5167e126ba97SEli Cohen } 5168e126ba97SEli Cohen 516938349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5170d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5171e126ba97SEli Cohen struct mlx5_qp_path *path) 5172e126ba97SEli Cohen { 5173e126ba97SEli Cohen 5174d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5175e126ba97SEli Cohen 5176e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5177e126ba97SEli Cohen return; 5178e126ba97SEli Cohen 5179ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5180ae59c3f0SLeon Romanovsky 5181d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5182d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5183e126ba97SEli Cohen 5184d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5185d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5186d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5187d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5188d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5189d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5190d8966fcdSDasaratharaman Chandramouli 5191d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5192d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5193d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5194d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5195d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5196d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5197e126ba97SEli Cohen } 5198e126ba97SEli Cohen } 5199e126ba97SEli Cohen 52006d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 52016d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 52026d2f89dfSmajd@mellanox.com u8 *sq_state) 5203e126ba97SEli Cohen { 52046d2f89dfSmajd@mellanox.com int err; 52056d2f89dfSmajd@mellanox.com 520628160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 52076d2f89dfSmajd@mellanox.com if (err) 52086d2f89dfSmajd@mellanox.com goto out; 52096d2f89dfSmajd@mellanox.com sq->state = *sq_state; 52106d2f89dfSmajd@mellanox.com 52116d2f89dfSmajd@mellanox.com out: 52126d2f89dfSmajd@mellanox.com return err; 52136d2f89dfSmajd@mellanox.com } 52146d2f89dfSmajd@mellanox.com 52156d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 52166d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 52176d2f89dfSmajd@mellanox.com u8 *rq_state) 52186d2f89dfSmajd@mellanox.com { 52196d2f89dfSmajd@mellanox.com void *out; 52206d2f89dfSmajd@mellanox.com void *rqc; 52216d2f89dfSmajd@mellanox.com int inlen; 52226d2f89dfSmajd@mellanox.com int err; 52236d2f89dfSmajd@mellanox.com 52246d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 52251b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 52266d2f89dfSmajd@mellanox.com if (!out) 52276d2f89dfSmajd@mellanox.com return -ENOMEM; 52286d2f89dfSmajd@mellanox.com 52296d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 52306d2f89dfSmajd@mellanox.com if (err) 52316d2f89dfSmajd@mellanox.com goto out; 52326d2f89dfSmajd@mellanox.com 52336d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 52346d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 52356d2f89dfSmajd@mellanox.com rq->state = *rq_state; 52366d2f89dfSmajd@mellanox.com 52376d2f89dfSmajd@mellanox.com out: 52386d2f89dfSmajd@mellanox.com kvfree(out); 52396d2f89dfSmajd@mellanox.com return err; 52406d2f89dfSmajd@mellanox.com } 52416d2f89dfSmajd@mellanox.com 52426d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 52436d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 52446d2f89dfSmajd@mellanox.com { 52456d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 52466d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 52476d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 52486d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 52496d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 52506d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 52516d2f89dfSmajd@mellanox.com }, 52526d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 52536d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 52546d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 52556d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 52566d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 52576d2f89dfSmajd@mellanox.com }, 52586d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 52596d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 52606d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 52616d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 52626d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 52636d2f89dfSmajd@mellanox.com }, 52646d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 52656d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 52666d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 52676d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 52686d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 52696d2f89dfSmajd@mellanox.com }, 52706d2f89dfSmajd@mellanox.com }; 52716d2f89dfSmajd@mellanox.com 52726d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 52736d2f89dfSmajd@mellanox.com 52746d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 52756d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 52766d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 52776d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 52786d2f89dfSmajd@mellanox.com return -EINVAL; 52796d2f89dfSmajd@mellanox.com } 52806d2f89dfSmajd@mellanox.com 52816d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 52826d2f89dfSmajd@mellanox.com *qp_state = qp->state; 52836d2f89dfSmajd@mellanox.com 52846d2f89dfSmajd@mellanox.com return 0; 52856d2f89dfSmajd@mellanox.com } 52866d2f89dfSmajd@mellanox.com 52876d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 52886d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 52896d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 52906d2f89dfSmajd@mellanox.com { 52916d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 52926d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 52936d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 52946d2f89dfSmajd@mellanox.com int err; 52956d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 52966d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 52976d2f89dfSmajd@mellanox.com 52986d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 52996d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 53006d2f89dfSmajd@mellanox.com if (err) 53016d2f89dfSmajd@mellanox.com return err; 53026d2f89dfSmajd@mellanox.com } 53036d2f89dfSmajd@mellanox.com 53046d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 53056d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 53066d2f89dfSmajd@mellanox.com if (err) 53076d2f89dfSmajd@mellanox.com return err; 53086d2f89dfSmajd@mellanox.com } 53096d2f89dfSmajd@mellanox.com 53106d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 53116d2f89dfSmajd@mellanox.com raw_packet_qp_state); 53126d2f89dfSmajd@mellanox.com } 53136d2f89dfSmajd@mellanox.com 53146d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 53156d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 53166d2f89dfSmajd@mellanox.com { 531709a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5318e126ba97SEli Cohen struct mlx5_qp_context *context; 5319e126ba97SEli Cohen int mlx5_state; 532009a7d9ecSSaeed Mahameed u32 *outb; 5321e126ba97SEli Cohen int err = 0; 5322e126ba97SEli Cohen 532309a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 53246d2f89dfSmajd@mellanox.com if (!outb) 53256d2f89dfSmajd@mellanox.com return -ENOMEM; 53266d2f89dfSmajd@mellanox.com 532719098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 532809a7d9ecSSaeed Mahameed outlen); 5329e126ba97SEli Cohen if (err) 53306d2f89dfSmajd@mellanox.com goto out; 5331e126ba97SEli Cohen 533209a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 533309a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 533409a7d9ecSSaeed Mahameed 5335e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5336e126ba97SEli Cohen 5337e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5338e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5339e126ba97SEli Cohen qp_attr->path_mig_state = 5340e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5341e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5342e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5343e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5344e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5345e126ba97SEli Cohen qp_attr->qp_access_flags = 5346e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5347e126ba97SEli Cohen 5348e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 534938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 535038349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5351d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5352d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5353d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5354d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5355e126ba97SEli Cohen } 5356e126ba97SEli Cohen 5357d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5358e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5359e126ba97SEli Cohen 5360e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5361e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5362e126ba97SEli Cohen 5363e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5364e126ba97SEli Cohen 5365e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5366e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5367e126ba97SEli Cohen qp_attr->min_rnr_timer = 5368e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5369e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5370e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5371e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5372e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 53736d2f89dfSmajd@mellanox.com 53746d2f89dfSmajd@mellanox.com out: 53756d2f89dfSmajd@mellanox.com kfree(outb); 53766d2f89dfSmajd@mellanox.com return err; 53776d2f89dfSmajd@mellanox.com } 53786d2f89dfSmajd@mellanox.com 5379776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5380776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5381776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5382776a3906SMoni Shoua { 5383776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5384776a3906SMoni Shoua u32 *out; 5385776a3906SMoni Shoua u32 access_flags = 0; 5386776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5387776a3906SMoni Shoua void *dctc; 5388776a3906SMoni Shoua int err; 5389776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5390776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5391776a3906SMoni Shoua IB_QP_PORT | 5392776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5393776a3906SMoni Shoua IB_QP_AV | 5394776a3906SMoni Shoua IB_QP_PATH_MTU | 5395776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5396776a3906SMoni Shoua 5397776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5398776a3906SMoni Shoua return -EINVAL; 5399776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5400776a3906SMoni Shoua return -EINVAL; 5401776a3906SMoni Shoua 5402776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5403776a3906SMoni Shoua if (!out) 5404776a3906SMoni Shoua return -ENOMEM; 5405776a3906SMoni Shoua 5406776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5407776a3906SMoni Shoua if (err) 5408776a3906SMoni Shoua goto out; 5409776a3906SMoni Shoua 5410776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5411776a3906SMoni Shoua 5412776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5413776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5414776a3906SMoni Shoua 5415776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5416776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5417776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5418776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5419776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5420776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5421776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5422776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5423776a3906SMoni Shoua } 5424776a3906SMoni Shoua 5425776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5426776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5427776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5428776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5429776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5430776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5431776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5432776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5433776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5434776a3906SMoni Shoua } 5435776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5436776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5437776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5438776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5439776a3906SMoni Shoua out: 5440776a3906SMoni Shoua kfree(out); 5441776a3906SMoni Shoua return err; 5442776a3906SMoni Shoua } 5443776a3906SMoni Shoua 54446d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 54456d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 54466d2f89dfSmajd@mellanox.com { 54476d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 54486d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 54496d2f89dfSmajd@mellanox.com int err = 0; 54506d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 54516d2f89dfSmajd@mellanox.com 545228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 545328d61370SYishai Hadas return -ENOSYS; 545428d61370SYishai Hadas 5455d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5456d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5457d16e91daSHaggai Eran qp_init_attr); 5458d16e91daSHaggai Eran 5459c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5460c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5461c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5462c2e53b2cSYishai Hadas 5463776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5464776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5465776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5466776a3906SMoni Shoua 54676d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 54686d2f89dfSmajd@mellanox.com 5469c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5470c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 54716d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 54726d2f89dfSmajd@mellanox.com if (err) 54736d2f89dfSmajd@mellanox.com goto out; 54746d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 54756d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 54766d2f89dfSmajd@mellanox.com } else { 54776d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 54786d2f89dfSmajd@mellanox.com if (err) 54796d2f89dfSmajd@mellanox.com goto out; 54806d2f89dfSmajd@mellanox.com } 54816d2f89dfSmajd@mellanox.com 54826d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5483e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5484e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5485e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5486e126ba97SEli Cohen 5487e126ba97SEli Cohen if (!ibqp->uobject) { 54880540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5489e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 54900540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5491e126ba97SEli Cohen } else { 5492e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5493e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5494e126ba97SEli Cohen } 5495e126ba97SEli Cohen 54960540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 54970540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 54980540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 54990540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 55000540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5501e126ba97SEli Cohen 5502e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5503e126ba97SEli Cohen 5504e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5505e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5506e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5507e126ba97SEli Cohen 5508051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5509051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5510051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5511051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5512051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5513051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5514b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5515b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5516051f2630SLeon Romanovsky 5517e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5518e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5519e126ba97SEli Cohen 5520e126ba97SEli Cohen out: 5521e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5522e126ba97SEli Cohen return err; 5523e126ba97SEli Cohen } 5524e126ba97SEli Cohen 5525e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5526e126ba97SEli Cohen struct ib_ucontext *context, 5527e126ba97SEli Cohen struct ib_udata *udata) 5528e126ba97SEli Cohen { 5529e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5530e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5531e126ba97SEli Cohen int err; 5532e126ba97SEli Cohen 5533938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5534e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5535e126ba97SEli Cohen 5536e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5537e126ba97SEli Cohen if (!xrcd) 5538e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5539e126ba97SEli Cohen 55405aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 5541e126ba97SEli Cohen if (err) { 5542e126ba97SEli Cohen kfree(xrcd); 5543e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5544e126ba97SEli Cohen } 5545e126ba97SEli Cohen 5546e126ba97SEli Cohen return &xrcd->ibxrcd; 5547e126ba97SEli Cohen } 5548e126ba97SEli Cohen 5549e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5550e126ba97SEli Cohen { 5551e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5552e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5553e126ba97SEli Cohen int err; 5554e126ba97SEli Cohen 55555aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 5556b081808aSLeon Romanovsky if (err) 5557e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5558e126ba97SEli Cohen 5559e126ba97SEli Cohen kfree(xrcd); 5560e126ba97SEli Cohen return 0; 5561e126ba97SEli Cohen } 556279b20a6cSYishai Hadas 5563350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5564350d0e4cSYishai Hadas { 5565350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5566350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5567350d0e4cSYishai Hadas struct ib_event event; 5568350d0e4cSYishai Hadas 5569350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5570350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5571350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5572350d0e4cSYishai Hadas switch (type) { 5573350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5574350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5575350d0e4cSYishai Hadas break; 5576350d0e4cSYishai Hadas default: 5577350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5578350d0e4cSYishai Hadas return; 5579350d0e4cSYishai Hadas } 5580350d0e4cSYishai Hadas 5581350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5582350d0e4cSYishai Hadas } 5583350d0e4cSYishai Hadas } 5584350d0e4cSYishai Hadas 558503404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 558603404e8aSMaor Gottlieb { 558703404e8aSMaor Gottlieb int err = 0; 558803404e8aSMaor Gottlieb 558903404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 559003404e8aSMaor Gottlieb if (dev->delay_drop.activate) 559103404e8aSMaor Gottlieb goto out; 559203404e8aSMaor Gottlieb 559303404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 559403404e8aSMaor Gottlieb if (err) 559503404e8aSMaor Gottlieb goto out; 559603404e8aSMaor Gottlieb 559703404e8aSMaor Gottlieb dev->delay_drop.activate = true; 559803404e8aSMaor Gottlieb out: 559903404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5600fe248c3aSMaor Gottlieb 5601fe248c3aSMaor Gottlieb if (!err) 5602fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 560303404e8aSMaor Gottlieb return err; 560403404e8aSMaor Gottlieb } 560503404e8aSMaor Gottlieb 560679b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 560779b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 560879b20a6cSYishai Hadas { 560979b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 56104be6da1eSNoa Osherovich int has_net_offloads; 561179b20a6cSYishai Hadas __be64 *rq_pas0; 561279b20a6cSYishai Hadas void *in; 561379b20a6cSYishai Hadas void *rqc; 561479b20a6cSYishai Hadas void *wq; 561579b20a6cSYishai Hadas int inlen; 561679b20a6cSYishai Hadas int err; 561779b20a6cSYishai Hadas 561879b20a6cSYishai Hadas dev = to_mdev(pd->device); 561979b20a6cSYishai Hadas 562079b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 56211b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 562279b20a6cSYishai Hadas if (!in) 562379b20a6cSYishai Hadas return -ENOMEM; 562479b20a6cSYishai Hadas 562534d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 562679b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 562779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 562879b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 562979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 563079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 563179b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 563279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 563379b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5634ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5635ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5636ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5637b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5638b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5639b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5640b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5641b1383aa6SNoa Osherovich goto out; 5642b1383aa6SNoa Osherovich } else { 564379b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5644b1383aa6SNoa Osherovich } 5645b1383aa6SNoa Osherovich } 564679b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5647ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5648ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5649ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5650ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5651ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5652ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5653ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5654ccc87087SNoa Osherovich } 565579b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 565679b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 565779b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 565879b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 565979b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 566079b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 56614be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5662b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 56634be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5664b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5665b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5666b1f74a84SNoa Osherovich goto out; 5667b1f74a84SNoa Osherovich } 5668b1f74a84SNoa Osherovich } else { 5669b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5670b1f74a84SNoa Osherovich } 56714be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 56724be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 56734be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 56744be6da1eSNoa Osherovich err = -EOPNOTSUPP; 56754be6da1eSNoa Osherovich goto out; 56764be6da1eSNoa Osherovich } 56774be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 56784be6da1eSNoa Osherovich } 567903404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 568003404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 568103404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 568203404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 568303404e8aSMaor Gottlieb err = -EOPNOTSUPP; 568403404e8aSMaor Gottlieb goto out; 568503404e8aSMaor Gottlieb } 568603404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 568703404e8aSMaor Gottlieb } 568879b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 568979b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5690350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 569103404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 569203404e8aSMaor Gottlieb err = set_delay_drop(dev); 569303404e8aSMaor Gottlieb if (err) { 569403404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 569503404e8aSMaor Gottlieb err); 569603404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 569703404e8aSMaor Gottlieb } else { 569803404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 569903404e8aSMaor Gottlieb } 570003404e8aSMaor Gottlieb } 5701b1f74a84SNoa Osherovich out: 570279b20a6cSYishai Hadas kvfree(in); 570379b20a6cSYishai Hadas return err; 570479b20a6cSYishai Hadas } 570579b20a6cSYishai Hadas 570679b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 570779b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 570879b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 570979b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 571079b20a6cSYishai Hadas { 571179b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 571279b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 571379b20a6cSYishai Hadas return -EINVAL; 571479b20a6cSYishai Hadas 571579b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 571679b20a6cSYishai Hadas return -EINVAL; 571779b20a6cSYishai Hadas 571879b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 571979b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 57200dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 57210dfe4522SLeon Romanovsky return -EINVAL; 57220dfe4522SLeon Romanovsky 572379b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 572479b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 572579b20a6cSYishai Hadas return 0; 572679b20a6cSYishai Hadas } 572779b20a6cSYishai Hadas 572879b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 572979b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 573079b20a6cSYishai Hadas struct ib_udata *udata, 573179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 573279b20a6cSYishai Hadas { 573379b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 573479b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 573579b20a6cSYishai Hadas int err; 573679b20a6cSYishai Hadas size_t required_cmd_sz; 573779b20a6cSYishai Hadas 5738ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5739ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 574079b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 574179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 574279b20a6cSYishai Hadas return -EINVAL; 574379b20a6cSYishai Hadas } 574479b20a6cSYishai Hadas 574579b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 574679b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 574779b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 574879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 574979b20a6cSYishai Hadas return -EOPNOTSUPP; 575079b20a6cSYishai Hadas } 575179b20a6cSYishai Hadas 575279b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 575379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 575479b20a6cSYishai Hadas return -EFAULT; 575579b20a6cSYishai Hadas } 575679b20a6cSYishai Hadas 5757ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 575879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 575979b20a6cSYishai Hadas return -EOPNOTSUPP; 5760ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5761ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5762ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 576379b20a6cSYishai Hadas return -EOPNOTSUPP; 576479b20a6cSYishai Hadas } 5765ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5766ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5767ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5768ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5769ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5770ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5771ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5772ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5773ccc87087SNoa Osherovich return -EINVAL; 5774ccc87087SNoa Osherovich } 5775ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5776ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5777ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5778ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5779ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5780ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5781ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5782ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5783ccc87087SNoa Osherovich return -EINVAL; 5784ccc87087SNoa Osherovich } 5785ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5786ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5787ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5788ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5789ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5790ccc87087SNoa Osherovich } 579179b20a6cSYishai Hadas 579279b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 579379b20a6cSYishai Hadas if (err) { 579479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 579579b20a6cSYishai Hadas return err; 579679b20a6cSYishai Hadas } 579779b20a6cSYishai Hadas 579879b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 579979b20a6cSYishai Hadas if (err) { 580079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 580179b20a6cSYishai Hadas return err; 580279b20a6cSYishai Hadas } 580379b20a6cSYishai Hadas 580479b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 580579b20a6cSYishai Hadas return 0; 580679b20a6cSYishai Hadas } 580779b20a6cSYishai Hadas 580879b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 580979b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 581079b20a6cSYishai Hadas struct ib_udata *udata) 581179b20a6cSYishai Hadas { 581279b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 581379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 581479b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 581579b20a6cSYishai Hadas size_t min_resp_len; 581679b20a6cSYishai Hadas int err; 581779b20a6cSYishai Hadas 581879b20a6cSYishai Hadas if (!udata) 581979b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 582079b20a6cSYishai Hadas 582179b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 582279b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 582379b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 582479b20a6cSYishai Hadas 582579b20a6cSYishai Hadas dev = to_mdev(pd->device); 582679b20a6cSYishai Hadas switch (init_attr->wq_type) { 582779b20a6cSYishai Hadas case IB_WQT_RQ: 582879b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 582979b20a6cSYishai Hadas if (!rwq) 583079b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 583179b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 583279b20a6cSYishai Hadas if (err) 583379b20a6cSYishai Hadas goto err; 583479b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 583579b20a6cSYishai Hadas if (err) 583679b20a6cSYishai Hadas goto err_user_rq; 583779b20a6cSYishai Hadas break; 583879b20a6cSYishai Hadas default: 583979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 584079b20a6cSYishai Hadas init_attr->wq_type); 584179b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 584279b20a6cSYishai Hadas } 584379b20a6cSYishai Hadas 5844350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 584579b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 584679b20a6cSYishai Hadas if (udata->outlen) { 584779b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 584879b20a6cSYishai Hadas sizeof(resp.response_length); 584979b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 585079b20a6cSYishai Hadas if (err) 585179b20a6cSYishai Hadas goto err_copy; 585279b20a6cSYishai Hadas } 585379b20a6cSYishai Hadas 5854350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5855350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 585679b20a6cSYishai Hadas return &rwq->ibwq; 585779b20a6cSYishai Hadas 585879b20a6cSYishai Hadas err_copy: 5859350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 586079b20a6cSYishai Hadas err_user_rq: 5861fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 586279b20a6cSYishai Hadas err: 586379b20a6cSYishai Hadas kfree(rwq); 586479b20a6cSYishai Hadas return ERR_PTR(err); 586579b20a6cSYishai Hadas } 586679b20a6cSYishai Hadas 586779b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 586879b20a6cSYishai Hadas { 586979b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 587079b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 587179b20a6cSYishai Hadas 5872350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5873fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 587479b20a6cSYishai Hadas kfree(rwq); 587579b20a6cSYishai Hadas 587679b20a6cSYishai Hadas return 0; 587779b20a6cSYishai Hadas } 587879b20a6cSYishai Hadas 5879c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5880c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5881c5f90929SYishai Hadas struct ib_udata *udata) 5882c5f90929SYishai Hadas { 5883c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5884c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5885c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5886c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5887c5f90929SYishai Hadas size_t min_resp_len; 5888c5f90929SYishai Hadas int inlen; 5889c5f90929SYishai Hadas int err; 5890c5f90929SYishai Hadas int i; 5891c5f90929SYishai Hadas u32 *in; 5892c5f90929SYishai Hadas void *rqtc; 5893c5f90929SYishai Hadas 5894c5f90929SYishai Hadas if (udata->inlen > 0 && 5895c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5896c5f90929SYishai Hadas udata->inlen)) 5897c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5898c5f90929SYishai Hadas 5899efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5900efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5901efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5902efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5903efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5904efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5905efd7f400SMaor Gottlieb } 5906efd7f400SMaor Gottlieb 5907c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5908c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5909c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5910c5f90929SYishai Hadas 5911c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5912c5f90929SYishai Hadas if (!rwq_ind_tbl) 5913c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5914c5f90929SYishai Hadas 5915c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 59161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5917c5f90929SYishai Hadas if (!in) { 5918c5f90929SYishai Hadas err = -ENOMEM; 5919c5f90929SYishai Hadas goto err; 5920c5f90929SYishai Hadas } 5921c5f90929SYishai Hadas 5922c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5923c5f90929SYishai Hadas 5924c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5925c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5926c5f90929SYishai Hadas 5927c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5928c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5929c5f90929SYishai Hadas 59305deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 59315deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 59325deba86eSYishai Hadas 5933c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5934c5f90929SYishai Hadas kvfree(in); 5935c5f90929SYishai Hadas 5936c5f90929SYishai Hadas if (err) 5937c5f90929SYishai Hadas goto err; 5938c5f90929SYishai Hadas 5939c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5940c5f90929SYishai Hadas if (udata->outlen) { 5941c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5942c5f90929SYishai Hadas sizeof(resp.response_length); 5943c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5944c5f90929SYishai Hadas if (err) 5945c5f90929SYishai Hadas goto err_copy; 5946c5f90929SYishai Hadas } 5947c5f90929SYishai Hadas 5948c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5949c5f90929SYishai Hadas 5950c5f90929SYishai Hadas err_copy: 59515deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5952c5f90929SYishai Hadas err: 5953c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5954c5f90929SYishai Hadas return ERR_PTR(err); 5955c5f90929SYishai Hadas } 5956c5f90929SYishai Hadas 5957c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5958c5f90929SYishai Hadas { 5959c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5960c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5961c5f90929SYishai Hadas 59625deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5963c5f90929SYishai Hadas 5964c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5965c5f90929SYishai Hadas return 0; 5966c5f90929SYishai Hadas } 5967c5f90929SYishai Hadas 596879b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 596979b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 597079b20a6cSYishai Hadas { 597179b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 597279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 597379b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 597479b20a6cSYishai Hadas size_t required_cmd_sz; 597579b20a6cSYishai Hadas int curr_wq_state; 597679b20a6cSYishai Hadas int wq_state; 597779b20a6cSYishai Hadas int inlen; 597879b20a6cSYishai Hadas int err; 597979b20a6cSYishai Hadas void *rqc; 598079b20a6cSYishai Hadas void *in; 598179b20a6cSYishai Hadas 598279b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 598379b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 598479b20a6cSYishai Hadas return -EINVAL; 598579b20a6cSYishai Hadas 598679b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 598779b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 598879b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 598979b20a6cSYishai Hadas return -EOPNOTSUPP; 599079b20a6cSYishai Hadas 599179b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 599279b20a6cSYishai Hadas return -EFAULT; 599379b20a6cSYishai Hadas 599479b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 599579b20a6cSYishai Hadas return -EOPNOTSUPP; 599679b20a6cSYishai Hadas 599779b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 59981b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 599979b20a6cSYishai Hadas if (!in) 600079b20a6cSYishai Hadas return -ENOMEM; 600179b20a6cSYishai Hadas 600279b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 600379b20a6cSYishai Hadas 600479b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 600579b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 600679b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 600779b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 600879b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 600979b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 601079b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 601179b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 601279b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 601334d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 601479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 601579b20a6cSYishai Hadas 6016b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6017b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6018b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6019b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6020b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6021b1f74a84SNoa Osherovich "supported\n"); 6022b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6023b1f74a84SNoa Osherovich goto out; 6024b1f74a84SNoa Osherovich } 6025b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6026b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6027b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6028b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6029b1f74a84SNoa Osherovich } 6030b1383aa6SNoa Osherovich 6031b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6032b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6033b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6034b1383aa6SNoa Osherovich goto out; 6035b1383aa6SNoa Osherovich } 6036b1f74a84SNoa Osherovich } 6037b1f74a84SNoa Osherovich 603823a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 603923a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 604023a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 604123a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 6042e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 6043e1f24a79SParav Pandit dev->port->cnts.set_id); 604423a6964eSMajd Dibbiny } else 60455a738b5dSJason Gunthorpe dev_info_once( 60465a738b5dSJason Gunthorpe &dev->ib_dev.dev, 60475a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 604823a6964eSMajd Dibbiny } 604923a6964eSMajd Dibbiny 6050350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 605179b20a6cSYishai Hadas if (!err) 605279b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 605379b20a6cSYishai Hadas 6054b1f74a84SNoa Osherovich out: 6055b1f74a84SNoa Osherovich kvfree(in); 605679b20a6cSYishai Hadas return err; 605779b20a6cSYishai Hadas } 6058d0e84c0aSYishai Hadas 6059d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6060d0e84c0aSYishai Hadas struct ib_cqe cqe; 6061d0e84c0aSYishai Hadas struct completion done; 6062d0e84c0aSYishai Hadas }; 6063d0e84c0aSYishai Hadas 6064d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6065d0e84c0aSYishai Hadas { 6066d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6067d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6068d0e84c0aSYishai Hadas cqe); 6069d0e84c0aSYishai Hadas 6070d0e84c0aSYishai Hadas complete(&cqe->done); 6071d0e84c0aSYishai Hadas } 6072d0e84c0aSYishai Hadas 6073d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6074d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6075d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6076d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6077d0e84c0aSYishai Hadas { 6078d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6079d0e84c0aSYishai Hadas 6080d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6081d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6082d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6083d0e84c0aSYishai Hadas return; 6084d0e84c0aSYishai Hadas } 6085d0e84c0aSYishai Hadas 6086d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6087d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6088d0e84c0aSYishai Hadas bool triggered = false; 6089d0e84c0aSYishai Hadas unsigned long flags; 6090d0e84c0aSYishai Hadas 6091d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6092d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6093d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6094d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6095d0e84c0aSYishai Hadas else 6096d0e84c0aSYishai Hadas triggered = true; 6097d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6098d0e84c0aSYishai Hadas 6099d0e84c0aSYishai Hadas if (triggered) { 6100d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6101d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6102d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6103d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6104d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6105d0e84c0aSYishai Hadas break; 6106d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6107d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6108d0e84c0aSYishai Hadas break; 6109d0e84c0aSYishai Hadas default: 6110d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6111d0e84c0aSYishai Hadas } 6112d0e84c0aSYishai Hadas } 6113d0e84c0aSYishai Hadas 6114d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6115d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6116d0e84c0aSYishai Hadas */ 6117d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 6118d0e84c0aSYishai Hadas } 6119d0e84c0aSYishai Hadas 6120d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6121d0e84c0aSYishai Hadas } 6122d0e84c0aSYishai Hadas 6123d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6124d0e84c0aSYishai Hadas { 6125d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6126d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6127d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6128d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6129d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6130d0e84c0aSYishai Hadas .wr = { 6131d0e84c0aSYishai Hadas .next = NULL, 6132d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6133d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6134d0e84c0aSYishai Hadas }, 6135d0e84c0aSYishai Hadas }; 6136d0e84c0aSYishai Hadas int ret; 6137d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6138d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6139d0e84c0aSYishai Hadas 6140d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6141d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6142d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6143d0e84c0aSYishai Hadas return; 6144d0e84c0aSYishai Hadas } 6145d0e84c0aSYishai Hadas 6146d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6147d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6148d0e84c0aSYishai Hadas 6149d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6150d0e84c0aSYishai Hadas if (ret) { 6151d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6152d0e84c0aSYishai Hadas return; 6153d0e84c0aSYishai Hadas } 6154d0e84c0aSYishai Hadas 6155d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6156d0e84c0aSYishai Hadas } 6157d0e84c0aSYishai Hadas 6158d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6159d0e84c0aSYishai Hadas { 6160d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6161d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6162d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6163d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6164d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6165d0e84c0aSYishai Hadas int ret; 6166d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6167d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6168d0e84c0aSYishai Hadas 6169d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6170d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6171d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6172d0e84c0aSYishai Hadas return; 6173d0e84c0aSYishai Hadas } 6174d0e84c0aSYishai Hadas 6175d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6176d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6177d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6178d0e84c0aSYishai Hadas 6179d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6180d0e84c0aSYishai Hadas if (ret) { 6181d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6182d0e84c0aSYishai Hadas return; 6183d0e84c0aSYishai Hadas } 6184d0e84c0aSYishai Hadas 6185d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6186d0e84c0aSYishai Hadas } 6187