1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40e126ba97SEli Cohen 41e126ba97SEli Cohen /* not supported currently */ 42e126ba97SEli Cohen static int wq_signature; 43e126ba97SEli Cohen 44e126ba97SEli Cohen enum { 45e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 46e126ba97SEli Cohen }; 47e126ba97SEli Cohen 48e126ba97SEli Cohen enum { 49e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 50e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 53e126ba97SEli Cohen }; 54e126ba97SEli Cohen 55e126ba97SEli Cohen enum { 56e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 57064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 58e126ba97SEli Cohen }; 59e126ba97SEli Cohen 60e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 61e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 62f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 63e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 64e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 66e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 67e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 68e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 69e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 70e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 718a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 72e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 74e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 75e126ba97SEli Cohen }; 76e126ba97SEli Cohen 77f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 78f0313965SErez Shitrit u8 rsvd0[16]; 79f0313965SErez Shitrit }; 80e126ba97SEli Cohen 81eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 82eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 837d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 84eb49ab0cSAlex Vesker }; 85eb49ab0cSAlex Vesker 860680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 870680efa2SAlex Vesker u16 operation; 88eb49ab0cSAlex Vesker 89eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9061147f39SBodong Wang 9161147f39SBodong Wang struct mlx5_rate_limit rl; 9261147f39SBodong Wang 93eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 940680efa2SAlex Vesker }; 950680efa2SAlex Vesker 9689ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9789ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9889ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 9989ea94a7SMaor Gottlieb 100e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 101e126ba97SEli Cohen { 102e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 103e126ba97SEli Cohen } 104e126ba97SEli Cohen 105e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 106e126ba97SEli Cohen { 107e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 108e126ba97SEli Cohen } 109e126ba97SEli Cohen 110e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 111e126ba97SEli Cohen { 112e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 113e126ba97SEli Cohen } 114e126ba97SEli Cohen 115e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 116e126ba97SEli Cohen { 117e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 118e126ba97SEli Cohen } 119e126ba97SEli Cohen 120e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 121e126ba97SEli Cohen { 122e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 123e126ba97SEli Cohen } 124e126ba97SEli Cohen 125c1395a2aSHaggai Eran /** 126c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 127c1395a2aSHaggai Eran * 128c1395a2aSHaggai Eran * @qp: QP to copy from. 129c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 130c1395a2aSHaggai Eran * otherwise. 131c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 132c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 133c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 134c1395a2aSHaggai Eran * element in the queue. 135c1395a2aSHaggai Eran * @buffer: destination buffer. 136c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 137c1395a2aSHaggai Eran * 138c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 139c1395a2aSHaggai Eran * 140c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 141c1395a2aSHaggai Eran */ 142c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14319098df2Smajd@mellanox.com void *buffer, u32 length, 14419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 145c1395a2aSHaggai Eran { 146c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 147c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 148c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 149c1395a2aSHaggai Eran size_t offset; 150c1395a2aSHaggai Eran size_t wq_end; 15119098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 152c1395a2aSHaggai Eran u32 first_copy_length; 153c1395a2aSHaggai Eran int wqe_length; 154c1395a2aSHaggai Eran int ret; 155c1395a2aSHaggai Eran 156c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 157c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 158c1395a2aSHaggai Eran qp->ibqp.qp_type); 159c1395a2aSHaggai Eran return -EINVAL; 160c1395a2aSHaggai Eran } 161c1395a2aSHaggai Eran 162c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 163c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 164c1395a2aSHaggai Eran 165c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 166c1395a2aSHaggai Eran return -EINVAL; 167c1395a2aSHaggai Eran 168c1395a2aSHaggai Eran if (offset > umem->length || 169c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 170c1395a2aSHaggai Eran return -EINVAL; 171c1395a2aSHaggai Eran 172c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 173c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 174c1395a2aSHaggai Eran if (ret) 175c1395a2aSHaggai Eran return ret; 176c1395a2aSHaggai Eran 177c1395a2aSHaggai Eran if (send) { 178c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 179c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 180c1395a2aSHaggai Eran 181c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 182c1395a2aSHaggai Eran } else { 183c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 184c1395a2aSHaggai Eran } 185c1395a2aSHaggai Eran 186c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 187c1395a2aSHaggai Eran return first_copy_length; 188c1395a2aSHaggai Eran 189c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 190c1395a2aSHaggai Eran wqe_length - first_copy_length); 191c1395a2aSHaggai Eran if (ret) 192c1395a2aSHaggai Eran return ret; 193c1395a2aSHaggai Eran 194c1395a2aSHaggai Eran return wqe_length; 195c1395a2aSHaggai Eran } 196c1395a2aSHaggai Eran 197e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 198e126ba97SEli Cohen { 199e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 200e126ba97SEli Cohen struct ib_event event; 201e126ba97SEli Cohen 20219098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20319098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20419098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20519098df2Smajd@mellanox.com } 206e126ba97SEli Cohen 207e126ba97SEli Cohen if (ibqp->event_handler) { 208e126ba97SEli Cohen event.device = ibqp->device; 209e126ba97SEli Cohen event.element.qp = ibqp; 210e126ba97SEli Cohen switch (type) { 211e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 212e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 213e126ba97SEli Cohen break; 214e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 215e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 216e126ba97SEli Cohen break; 217e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 218e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 219e126ba97SEli Cohen break; 220e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 221e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 222e126ba97SEli Cohen break; 223e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 224e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 225e126ba97SEli Cohen break; 226e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 227e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 228e126ba97SEli Cohen break; 229e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 230e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 231e126ba97SEli Cohen break; 232e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 233e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 234e126ba97SEli Cohen break; 235e126ba97SEli Cohen default: 236e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 237e126ba97SEli Cohen return; 238e126ba97SEli Cohen } 239e126ba97SEli Cohen 240e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 241e126ba97SEli Cohen } 242e126ba97SEli Cohen } 243e126ba97SEli Cohen 244e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 245e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 246e126ba97SEli Cohen { 247e126ba97SEli Cohen int wqe_size; 248e126ba97SEli Cohen int wq_size; 249e126ba97SEli Cohen 250e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 251938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 252e126ba97SEli Cohen return -EINVAL; 253e126ba97SEli Cohen 254e126ba97SEli Cohen if (!has_rq) { 255e126ba97SEli Cohen qp->rq.max_gs = 0; 256e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 257e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2580540d814SNoa Osherovich cap->max_recv_wr = 0; 2590540d814SNoa Osherovich cap->max_recv_sge = 0; 260e126ba97SEli Cohen } else { 261e126ba97SEli Cohen if (ucmd) { 262e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 263002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 264002bf228SLeon Romanovsky return -EINVAL; 265e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 266002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 267002bf228SLeon Romanovsky return -EINVAL; 268e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 269e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 270e126ba97SEli Cohen } else { 271e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 272e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 273e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 274e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 275e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 276e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 277938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 278e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 279e126ba97SEli Cohen wqe_size, 280938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 281938fe83cSSaeed Mahameed max_wqe_sz_rq)); 282e126ba97SEli Cohen return -EINVAL; 283e126ba97SEli Cohen } 284e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 285e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 286e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 287e126ba97SEli Cohen } 288e126ba97SEli Cohen } 289e126ba97SEli Cohen 290e126ba97SEli Cohen return 0; 291e126ba97SEli Cohen } 292e126ba97SEli Cohen 293f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 294e126ba97SEli Cohen { 295618af384SAndi Shyti int size = 0; 296e126ba97SEli Cohen 297f0313965SErez Shitrit switch (attr->qp_type) { 298e126ba97SEli Cohen case IB_QPT_XRC_INI: 299b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 300e126ba97SEli Cohen /* fall through */ 301e126ba97SEli Cohen case IB_QPT_RC: 302e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30375c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 30475c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30575c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 306064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 307064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 308064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 309e126ba97SEli Cohen break; 310e126ba97SEli Cohen 311b125a54bSEli Cohen case IB_QPT_XRC_TGT: 312b125a54bSEli Cohen return 0; 313b125a54bSEli Cohen 314e126ba97SEli Cohen case IB_QPT_UC: 315b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 31675c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3179e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31875c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 319e126ba97SEli Cohen break; 320e126ba97SEli Cohen 321e126ba97SEli Cohen case IB_QPT_UD: 322f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 323f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 324f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 325f0313965SErez Shitrit /* fall through */ 326e126ba97SEli Cohen case IB_QPT_SMI: 327d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 328b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 329e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 330e126ba97SEli Cohen break; 331e126ba97SEli Cohen 332e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 333b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 334e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 335e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 336e126ba97SEli Cohen break; 337e126ba97SEli Cohen 338e126ba97SEli Cohen default: 339e126ba97SEli Cohen return -EINVAL; 340e126ba97SEli Cohen } 341e126ba97SEli Cohen 342e126ba97SEli Cohen return size; 343e126ba97SEli Cohen } 344e126ba97SEli Cohen 345e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 346e126ba97SEli Cohen { 347e126ba97SEli Cohen int inl_size = 0; 348e126ba97SEli Cohen int size; 349e126ba97SEli Cohen 350f0313965SErez Shitrit size = sq_overhead(attr); 351e126ba97SEli Cohen if (size < 0) 352e126ba97SEli Cohen return size; 353e126ba97SEli Cohen 354e126ba97SEli Cohen if (attr->cap.max_inline_data) { 355e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 356e126ba97SEli Cohen attr->cap.max_inline_data; 357e126ba97SEli Cohen } 358e126ba97SEli Cohen 359e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 360e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 361e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 362e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 363e1e66cc2SSagi Grimberg else 364e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 365e126ba97SEli Cohen } 366e126ba97SEli Cohen 367288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 368288c01b7SEli Cohen { 369288c01b7SEli Cohen int max_sge; 370288c01b7SEli Cohen 371288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 372288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 373288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 376288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 377288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 378288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 379288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 380288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 381288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 382288c01b7SEli Cohen else 383288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 384288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 385288c01b7SEli Cohen 386288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 387288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 388288c01b7SEli Cohen } 389288c01b7SEli Cohen 390e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 391e126ba97SEli Cohen struct mlx5_ib_qp *qp) 392e126ba97SEli Cohen { 393e126ba97SEli Cohen int wqe_size; 394e126ba97SEli Cohen int wq_size; 395e126ba97SEli Cohen 396e126ba97SEli Cohen if (!attr->cap.max_send_wr) 397e126ba97SEli Cohen return 0; 398e126ba97SEli Cohen 399e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 400e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 401e126ba97SEli Cohen if (wqe_size < 0) 402e126ba97SEli Cohen return wqe_size; 403e126ba97SEli Cohen 404938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 405b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 406938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 407e126ba97SEli Cohen return -EINVAL; 408e126ba97SEli Cohen } 409e126ba97SEli Cohen 410f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 411e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 412e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 413e126ba97SEli Cohen 414e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 415e1e66cc2SSagi Grimberg qp->signature_en = true; 416e1e66cc2SSagi Grimberg 417e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 418e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 419938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4201974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4211974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 422938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 423938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 424b125a54bSEli Cohen return -ENOMEM; 425b125a54bSEli Cohen } 426e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 427288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 428288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 429288c01b7SEli Cohen return -ENOMEM; 430288c01b7SEli Cohen 431288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 432b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 433b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 434e126ba97SEli Cohen 435e126ba97SEli Cohen return wq_size; 436e126ba97SEli Cohen } 437e126ba97SEli Cohen 438e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 439e126ba97SEli Cohen struct mlx5_ib_qp *qp, 44019098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4410fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4420fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 443e126ba97SEli Cohen { 444e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 445e126ba97SEli Cohen 446938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 447e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 448938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 449e126ba97SEli Cohen return -EINVAL; 450e126ba97SEli Cohen } 451e126ba97SEli Cohen 452e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 453e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 454e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 455e126ba97SEli Cohen return -EINVAL; 456e126ba97SEli Cohen } 457e126ba97SEli Cohen 458e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 459e126ba97SEli Cohen 460938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 461e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 462938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 463938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 464e126ba97SEli Cohen return -EINVAL; 465e126ba97SEli Cohen } 466e126ba97SEli Cohen 467c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 468c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4690fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4700fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4710fb2ed66Smajd@mellanox.com } else { 47219098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 473e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4740fb2ed66Smajd@mellanox.com } 475e126ba97SEli Cohen 476e126ba97SEli Cohen return 0; 477e126ba97SEli Cohen } 478e126ba97SEli Cohen 479e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 480e126ba97SEli Cohen { 481e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 482e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 483e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 484e126ba97SEli Cohen !attr->cap.max_recv_wr) 485e126ba97SEli Cohen return 0; 486e126ba97SEli Cohen 487e126ba97SEli Cohen return 1; 488e126ba97SEli Cohen } 489e126ba97SEli Cohen 4900b80c14fSEli Cohen enum { 4910b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4920b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4930b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4940b80c14fSEli Cohen * "odd/even" order 4950b80c14fSEli Cohen */ 4960b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4970b80c14fSEli Cohen }; 4980b80c14fSEli Cohen 499b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 500b037c29aSEli Cohen { 50131a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 502b037c29aSEli Cohen } 503b037c29aSEli Cohen 504b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 505b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 506c1be5232SEli Cohen { 507c1be5232SEli Cohen int n; 508c1be5232SEli Cohen 509b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 510b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 511c1be5232SEli Cohen 512c1be5232SEli Cohen return n >= 0 ? n : 0; 513c1be5232SEli Cohen } 514c1be5232SEli Cohen 51518b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 51618b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 51718b0362eSYishai Hadas { 51818b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 51918b0362eSYishai Hadas } 52018b0362eSYishai Hadas 521b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 522b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 523c1be5232SEli Cohen { 524c1be5232SEli Cohen int med; 525c1be5232SEli Cohen 526b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 527b037c29aSEli Cohen return ++med; 528c1be5232SEli Cohen } 529c1be5232SEli Cohen 530b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 531b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 532e126ba97SEli Cohen { 533e126ba97SEli Cohen int i; 534e126ba97SEli Cohen 535b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 536b037c29aSEli Cohen if (!bfregi->count[i]) { 5372f5ff264SEli Cohen bfregi->count[i]++; 538e126ba97SEli Cohen return i; 539e126ba97SEli Cohen } 540e126ba97SEli Cohen } 541e126ba97SEli Cohen 542e126ba97SEli Cohen return -ENOMEM; 543e126ba97SEli Cohen } 544e126ba97SEli Cohen 545b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 546b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 547e126ba97SEli Cohen { 54818b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 549e126ba97SEli Cohen int i; 550e126ba97SEli Cohen 55118b0362eSYishai Hadas if (minidx < 0) 55218b0362eSYishai Hadas return minidx; 55318b0362eSYishai Hadas 55418b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 5552f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 556e126ba97SEli Cohen minidx = i; 5570b80c14fSEli Cohen if (!bfregi->count[minidx]) 5580b80c14fSEli Cohen break; 559e126ba97SEli Cohen } 560e126ba97SEli Cohen 5612f5ff264SEli Cohen bfregi->count[minidx]++; 562e126ba97SEli Cohen return minidx; 563e126ba97SEli Cohen } 564e126ba97SEli Cohen 565b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 566b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, 567e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 568e126ba97SEli Cohen { 5692f5ff264SEli Cohen int bfregn = -EINVAL; 570e126ba97SEli Cohen 5712f5ff264SEli Cohen mutex_lock(&bfregi->lock); 572e126ba97SEli Cohen switch (lat) { 573e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 5740b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5752f5ff264SEli Cohen bfregn = 0; 5762f5ff264SEli Cohen bfregi->count[bfregn]++; 577e126ba97SEli Cohen break; 578e126ba97SEli Cohen 579e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 5802f5ff264SEli Cohen if (bfregi->ver < 2) 5812f5ff264SEli Cohen bfregn = -ENOMEM; 58278c0f98cSEli Cohen else 583b037c29aSEli Cohen bfregn = alloc_med_class_bfreg(dev, bfregi); 584e126ba97SEli Cohen break; 585e126ba97SEli Cohen 586e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 5872f5ff264SEli Cohen if (bfregi->ver < 2) 5882f5ff264SEli Cohen bfregn = -ENOMEM; 58978c0f98cSEli Cohen else 590b037c29aSEli Cohen bfregn = alloc_high_class_bfreg(dev, bfregi); 591e126ba97SEli Cohen break; 592e126ba97SEli Cohen } 5932f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 594e126ba97SEli Cohen 5952f5ff264SEli Cohen return bfregn; 596e126ba97SEli Cohen } 597e126ba97SEli Cohen 5984ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 599e126ba97SEli Cohen { 6002f5ff264SEli Cohen mutex_lock(&bfregi->lock); 601b037c29aSEli Cohen bfregi->count[bfregn]--; 6022f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 603e126ba97SEli Cohen } 604e126ba97SEli Cohen 605e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 606e126ba97SEli Cohen { 607e126ba97SEli Cohen switch (state) { 608e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 609e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 610e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 611e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 612e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 613e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 614e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 615e126ba97SEli Cohen default: return -1; 616e126ba97SEli Cohen } 617e126ba97SEli Cohen } 618e126ba97SEli Cohen 619e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 620e126ba97SEli Cohen { 621e126ba97SEli Cohen switch (type) { 622e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 623e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 624e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 625e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 626e126ba97SEli Cohen case IB_QPT_XRC_INI: 627e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 628e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 629d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 630c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 631e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 632e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6330fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 634e126ba97SEli Cohen case IB_QPT_MAX: 635e126ba97SEli Cohen default: return -EINVAL; 636e126ba97SEli Cohen } 637e126ba97SEli Cohen } 638e126ba97SEli Cohen 63989ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 64089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 64189ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 64289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 64389ea94a7SMaor Gottlieb 6447c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 6451ee47ab3SYishai Hadas struct mlx5_bfreg_info *bfregi, int bfregn, 6461ee47ab3SYishai Hadas bool dyn_bfreg) 647e126ba97SEli Cohen { 648b037c29aSEli Cohen int bfregs_per_sys_page; 649b037c29aSEli Cohen int index_of_sys_page; 650b037c29aSEli Cohen int offset; 651b037c29aSEli Cohen 652b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 653b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 654b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 655b037c29aSEli Cohen 6567c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 6577c043e90SYishai Hadas return -EINVAL; 6587c043e90SYishai Hadas 6591ee47ab3SYishai Hadas if (dyn_bfreg) { 6601ee47ab3SYishai Hadas index_of_sys_page += bfregi->num_static_sys_pages; 6611ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6621ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6631ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6641ee47ab3SYishai Hadas return -EINVAL; 6651ee47ab3SYishai Hadas } 6661ee47ab3SYishai Hadas } 667b037c29aSEli Cohen 6681ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 669b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 670e126ba97SEli Cohen } 671e126ba97SEli Cohen 67219098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 67319098df2Smajd@mellanox.com struct ib_pd *pd, 67419098df2Smajd@mellanox.com unsigned long addr, size_t size, 67519098df2Smajd@mellanox.com struct ib_umem **umem, 67619098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 67719098df2Smajd@mellanox.com u32 *offset) 67819098df2Smajd@mellanox.com { 67919098df2Smajd@mellanox.com int err; 68019098df2Smajd@mellanox.com 68119098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 68219098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 68319098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 68419098df2Smajd@mellanox.com return PTR_ERR(*umem); 68519098df2Smajd@mellanox.com } 68619098df2Smajd@mellanox.com 687762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 68819098df2Smajd@mellanox.com 68919098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 69019098df2Smajd@mellanox.com if (err) { 69119098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 69219098df2Smajd@mellanox.com goto err_umem; 69319098df2Smajd@mellanox.com } 69419098df2Smajd@mellanox.com 69519098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 69619098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 69719098df2Smajd@mellanox.com 69819098df2Smajd@mellanox.com return 0; 69919098df2Smajd@mellanox.com 70019098df2Smajd@mellanox.com err_umem: 70119098df2Smajd@mellanox.com ib_umem_release(*umem); 70219098df2Smajd@mellanox.com *umem = NULL; 70319098df2Smajd@mellanox.com 70419098df2Smajd@mellanox.com return err; 70519098df2Smajd@mellanox.com } 70619098df2Smajd@mellanox.com 707fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 708fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 70979b20a6cSYishai Hadas { 71079b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71179b20a6cSYishai Hadas 712fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 713fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 714fe248c3aSMaor Gottlieb 71579b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 71679b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 71779b20a6cSYishai Hadas if (rwq->umem) 71879b20a6cSYishai Hadas ib_umem_release(rwq->umem); 71979b20a6cSYishai Hadas } 72079b20a6cSYishai Hadas 72179b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 72279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 72379b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 72479b20a6cSYishai Hadas { 72579b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 72679b20a6cSYishai Hadas int page_shift = 0; 72779b20a6cSYishai Hadas int npages; 72879b20a6cSYishai Hadas u32 offset = 0; 72979b20a6cSYishai Hadas int ncont = 0; 73079b20a6cSYishai Hadas int err; 73179b20a6cSYishai Hadas 73279b20a6cSYishai Hadas if (!ucmd->buf_addr) 73379b20a6cSYishai Hadas return -EINVAL; 73479b20a6cSYishai Hadas 73579b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 73679b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 73779b20a6cSYishai Hadas rwq->buf_size, 0, 0); 73879b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 73979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 74079b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 74179b20a6cSYishai Hadas return err; 74279b20a6cSYishai Hadas } 74379b20a6cSYishai Hadas 744762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 74579b20a6cSYishai Hadas &ncont, NULL); 74679b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 74779b20a6cSYishai Hadas &rwq->rq_page_offset); 74879b20a6cSYishai Hadas if (err) { 74979b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 75079b20a6cSYishai Hadas goto err_umem; 75179b20a6cSYishai Hadas } 75279b20a6cSYishai Hadas 75379b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 75479b20a6cSYishai Hadas rwq->page_shift = page_shift; 75579b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 75679b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 75779b20a6cSYishai Hadas 75879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 75979b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 76079b20a6cSYishai Hadas npages, page_shift, ncont, offset); 76179b20a6cSYishai Hadas 76279b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 76379b20a6cSYishai Hadas if (err) { 76479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 76579b20a6cSYishai Hadas goto err_umem; 76679b20a6cSYishai Hadas } 76779b20a6cSYishai Hadas 76879b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 76979b20a6cSYishai Hadas return 0; 77079b20a6cSYishai Hadas 77179b20a6cSYishai Hadas err_umem: 77279b20a6cSYishai Hadas ib_umem_release(rwq->umem); 77379b20a6cSYishai Hadas return err; 77479b20a6cSYishai Hadas } 77579b20a6cSYishai Hadas 776b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 777b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 778b037c29aSEli Cohen { 779b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 780b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 781b037c29aSEli Cohen } 782b037c29aSEli Cohen 783e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 784e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7850fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 78609a7d9ecSSaeed Mahameed u32 **in, 78719098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 78819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 789e126ba97SEli Cohen { 790e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 791e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 79219098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7939e9c47d0SEli Cohen int page_shift = 0; 7941ee47ab3SYishai Hadas int uar_index = 0; 795e126ba97SEli Cohen int npages; 7969e9c47d0SEli Cohen u32 offset = 0; 7972f5ff264SEli Cohen int bfregn; 7989e9c47d0SEli Cohen int ncont = 0; 79909a7d9ecSSaeed Mahameed __be64 *pas; 80009a7d9ecSSaeed Mahameed void *qpc; 801e126ba97SEli Cohen int err; 802e126ba97SEli Cohen 803e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 804e126ba97SEli Cohen if (err) { 805e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 806e126ba97SEli Cohen return err; 807e126ba97SEli Cohen } 808e126ba97SEli Cohen 809e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 8101ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8111ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8121ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8131ee47ab3SYishai Hadas if (uar_index < 0) 8141ee47ab3SYishai Hadas return uar_index; 8151ee47ab3SYishai Hadas 8161ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8171ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 818e126ba97SEli Cohen /* 819e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 820e126ba97SEli Cohen */ 821051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8222f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8231ee47ab3SYishai Hadas } 824051f2630SLeon Romanovsky else { 825b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_HIGH); 8262f5ff264SEli Cohen if (bfregn < 0) { 8272f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency BFREG\n"); 828c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 829b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_MEDIUM); 8302f5ff264SEli Cohen if (bfregn < 0) { 8312f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency BFREG\n"); 832e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 833b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_LOW); 8342f5ff264SEli Cohen if (bfregn < 0) { 8352f5ff264SEli Cohen mlx5_ib_warn(dev, "bfreg allocation failed\n"); 8362f5ff264SEli Cohen return bfregn; 837e126ba97SEli Cohen } 838e126ba97SEli Cohen } 839c1be5232SEli Cohen } 840051f2630SLeon Romanovsky } 841e126ba97SEli Cohen 8422f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8431ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8441ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8451ee47ab3SYishai Hadas false); 846e126ba97SEli Cohen 84748fea837SHaggai Eran qp->rq.offset = 0; 84848fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 84948fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 85048fea837SHaggai Eran 8510fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 852e126ba97SEli Cohen if (err) 8532f5ff264SEli Cohen goto err_bfreg; 854e126ba97SEli Cohen 85519098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 85619098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 85719098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 85819098df2Smajd@mellanox.com ubuffer->buf_size, 85919098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 86019098df2Smajd@mellanox.com &ncont, &offset); 86119098df2Smajd@mellanox.com if (err) 8622f5ff264SEli Cohen goto err_bfreg; 8639e9c47d0SEli Cohen } else { 86419098df2Smajd@mellanox.com ubuffer->umem = NULL; 8659e9c47d0SEli Cohen } 866e126ba97SEli Cohen 86709a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 86809a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8691b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 870e126ba97SEli Cohen if (!*in) { 871e126ba97SEli Cohen err = -ENOMEM; 872e126ba97SEli Cohen goto err_umem; 873e126ba97SEli Cohen } 874e126ba97SEli Cohen 87509a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 87609a7d9ecSSaeed Mahameed if (ubuffer->umem) 87709a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 87809a7d9ecSSaeed Mahameed 87909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 88009a7d9ecSSaeed Mahameed 88109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 88209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 88309a7d9ecSSaeed Mahameed 88409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8851ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 886b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8871ee47ab3SYishai Hadas else 8881ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8892f5ff264SEli Cohen qp->bfregn = bfregn; 890e126ba97SEli Cohen 891e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 892e126ba97SEli Cohen if (err) { 893e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 894e126ba97SEli Cohen goto err_free; 895e126ba97SEli Cohen } 896e126ba97SEli Cohen 89741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 898e126ba97SEli Cohen if (err) { 899e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 900e126ba97SEli Cohen goto err_unmap; 901e126ba97SEli Cohen } 902e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 903e126ba97SEli Cohen 904e126ba97SEli Cohen return 0; 905e126ba97SEli Cohen 906e126ba97SEli Cohen err_unmap: 907e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 908e126ba97SEli Cohen 909e126ba97SEli Cohen err_free: 910479163f4SAl Viro kvfree(*in); 911e126ba97SEli Cohen 912e126ba97SEli Cohen err_umem: 91319098df2Smajd@mellanox.com if (ubuffer->umem) 91419098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 915e126ba97SEli Cohen 9162f5ff264SEli Cohen err_bfreg: 9171ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9184ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 919e126ba97SEli Cohen return err; 920e126ba97SEli Cohen } 921e126ba97SEli Cohen 922b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 923b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 924e126ba97SEli Cohen { 925e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 926e126ba97SEli Cohen 927e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 928e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 92919098df2Smajd@mellanox.com if (base->ubuffer.umem) 93019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9311ee47ab3SYishai Hadas 9321ee47ab3SYishai Hadas /* 9331ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9341ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9351ee47ab3SYishai Hadas */ 9361ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9374ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 938e126ba97SEli Cohen } 939e126ba97SEli Cohen 940e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 941e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 942e126ba97SEli Cohen struct mlx5_ib_qp *qp, 94309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 94419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 945e126ba97SEli Cohen { 946e126ba97SEli Cohen int uar_index; 94709a7d9ecSSaeed Mahameed void *qpc; 948e126ba97SEli Cohen int err; 949e126ba97SEli Cohen 950f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 951f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 952b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 95393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 954b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9551a4c3a3dSEli Cohen return -EINVAL; 956e126ba97SEli Cohen 957e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9585fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9595fe9dec0SEli Cohen else 9605fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 961e126ba97SEli Cohen 962d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 963d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 964d8030b0dSEli Cohen */ 965d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9665fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 967e126ba97SEli Cohen 968e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 969e126ba97SEli Cohen if (err < 0) { 970e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9715fe9dec0SEli Cohen return err; 972e126ba97SEli Cohen } 973e126ba97SEli Cohen 974e126ba97SEli Cohen qp->rq.offset = 0; 975e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 97619098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 977e126ba97SEli Cohen 97819098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 979e126ba97SEli Cohen if (err) { 980e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9815fe9dec0SEli Cohen return err; 982e126ba97SEli Cohen } 983e126ba97SEli Cohen 984e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 98509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 98609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9871b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 988e126ba97SEli Cohen if (!*in) { 989e126ba97SEli Cohen err = -ENOMEM; 990e126ba97SEli Cohen goto err_buf; 991e126ba97SEli Cohen } 99209a7d9ecSSaeed Mahameed 99309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 99409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 99509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 99609a7d9ecSSaeed Mahameed 997e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 99809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 99909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1000e126ba97SEli Cohen 1001b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 100209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1003b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1004b11a4f9cSHaggai Eran } 1005b11a4f9cSHaggai Eran 100609a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 100709a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 1008e126ba97SEli Cohen 10099603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1010e126ba97SEli Cohen if (err) { 1011e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1012e126ba97SEli Cohen goto err_free; 1013e126ba97SEli Cohen } 1014e126ba97SEli Cohen 1015b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1016b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1017b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1018b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1019b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1020b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1021b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1022b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1023b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1024b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1027e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1028e126ba97SEli Cohen err = -ENOMEM; 1029e126ba97SEli Cohen goto err_wrid; 1030e126ba97SEli Cohen } 1031e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1032e126ba97SEli Cohen 1033e126ba97SEli Cohen return 0; 1034e126ba97SEli Cohen 1035e126ba97SEli Cohen err_wrid: 1036b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1037b5883008SLi Dongyang kvfree(qp->sq.w_list); 1038b5883008SLi Dongyang kvfree(qp->sq.wrid); 1039b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1040b5883008SLi Dongyang kvfree(qp->rq.wrid); 1041f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1042e126ba97SEli Cohen 1043e126ba97SEli Cohen err_free: 1044479163f4SAl Viro kvfree(*in); 1045e126ba97SEli Cohen 1046e126ba97SEli Cohen err_buf: 10479603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1048e126ba97SEli Cohen return err; 1049e126ba97SEli Cohen } 1050e126ba97SEli Cohen 1051e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1052e126ba97SEli Cohen { 1053b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1054b5883008SLi Dongyang kvfree(qp->sq.w_list); 1055b5883008SLi Dongyang kvfree(qp->sq.wrid); 1056b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1057b5883008SLi Dongyang kvfree(qp->rq.wrid); 1058f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10599603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1060e126ba97SEli Cohen } 1061e126ba97SEli Cohen 106209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1063e126ba97SEli Cohen { 1064e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1065c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1066e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 106709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1068e126ba97SEli Cohen else if (!qp->has_rq) 106909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1070e126ba97SEli Cohen else 107109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1072e126ba97SEli Cohen } 1073e126ba97SEli Cohen 1074e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1075e126ba97SEli Cohen { 1076e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1077e126ba97SEli Cohen return 1; 1078e126ba97SEli Cohen 1079e126ba97SEli Cohen return 0; 1080e126ba97SEli Cohen } 1081e126ba97SEli Cohen 10820fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1083c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10840fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 10850fb2ed66Smajd@mellanox.com { 1086c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10870fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10880fb2ed66Smajd@mellanox.com 10890fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1090c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1091c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1092c2e53b2cSYishai Hadas 10930fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10940fb2ed66Smajd@mellanox.com } 10950fb2ed66Smajd@mellanox.com 10960fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10970fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10980fb2ed66Smajd@mellanox.com { 10990fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 11000fb2ed66Smajd@mellanox.com } 11010fb2ed66Smajd@mellanox.com 1102b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1103b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1104b96c9ddeSMark Bloch { 1105b96c9ddeSMark Bloch if (sq->flow_rule) 1106b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1107b96c9ddeSMark Bloch } 1108b96c9ddeSMark Bloch 11090fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11100fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 11110fb2ed66Smajd@mellanox.com struct ib_pd *pd) 11120fb2ed66Smajd@mellanox.com { 11130fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 11140fb2ed66Smajd@mellanox.com __be64 *pas; 11150fb2ed66Smajd@mellanox.com void *in; 11160fb2ed66Smajd@mellanox.com void *sqc; 11170fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11180fb2ed66Smajd@mellanox.com void *wq; 11190fb2ed66Smajd@mellanox.com int inlen; 11200fb2ed66Smajd@mellanox.com int err; 11210fb2ed66Smajd@mellanox.com int page_shift = 0; 11220fb2ed66Smajd@mellanox.com int npages; 11230fb2ed66Smajd@mellanox.com int ncont = 0; 11240fb2ed66Smajd@mellanox.com u32 offset = 0; 11250fb2ed66Smajd@mellanox.com 11260fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11270fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11280fb2ed66Smajd@mellanox.com &ncont, &offset); 11290fb2ed66Smajd@mellanox.com if (err) 11300fb2ed66Smajd@mellanox.com return err; 11310fb2ed66Smajd@mellanox.com 11320fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11331b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11340fb2ed66Smajd@mellanox.com if (!in) { 11350fb2ed66Smajd@mellanox.com err = -ENOMEM; 11360fb2ed66Smajd@mellanox.com goto err_umem; 11370fb2ed66Smajd@mellanox.com } 11380fb2ed66Smajd@mellanox.com 11390fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11400fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1141795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1142795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11430fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11440fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11450fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11460fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11470fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 114896dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 114996dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 115096dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11510fb2ed66Smajd@mellanox.com 11520fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11530fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11540fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11550fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11560fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11570fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11580fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11590fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11600fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11610fb2ed66Smajd@mellanox.com 11620fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11630fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11640fb2ed66Smajd@mellanox.com 11650fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11660fb2ed66Smajd@mellanox.com 11670fb2ed66Smajd@mellanox.com kvfree(in); 11680fb2ed66Smajd@mellanox.com 11690fb2ed66Smajd@mellanox.com if (err) 11700fb2ed66Smajd@mellanox.com goto err_umem; 11710fb2ed66Smajd@mellanox.com 1172b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1173b96c9ddeSMark Bloch if (err) 1174b96c9ddeSMark Bloch goto err_flow; 1175b96c9ddeSMark Bloch 11760fb2ed66Smajd@mellanox.com return 0; 11770fb2ed66Smajd@mellanox.com 1178b96c9ddeSMark Bloch err_flow: 1179b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1180b96c9ddeSMark Bloch 11810fb2ed66Smajd@mellanox.com err_umem: 11820fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11830fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11840fb2ed66Smajd@mellanox.com 11850fb2ed66Smajd@mellanox.com return err; 11860fb2ed66Smajd@mellanox.com } 11870fb2ed66Smajd@mellanox.com 11880fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11890fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11900fb2ed66Smajd@mellanox.com { 1191b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11920fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11930fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11940fb2ed66Smajd@mellanox.com } 11950fb2ed66Smajd@mellanox.com 11962c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11970fb2ed66Smajd@mellanox.com { 11980fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11990fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 12000fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 12010fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 12020fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 12030fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 12040fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 12050fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 12060fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 12070fb2ed66Smajd@mellanox.com 12080fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 12090fb2ed66Smajd@mellanox.com } 12100fb2ed66Smajd@mellanox.com 12110fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12122c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 12132c292dbbSBoris Pismenny size_t qpinlen) 12140fb2ed66Smajd@mellanox.com { 1215358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12160fb2ed66Smajd@mellanox.com __be64 *pas; 12170fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12180fb2ed66Smajd@mellanox.com void *in; 12190fb2ed66Smajd@mellanox.com void *rqc; 12200fb2ed66Smajd@mellanox.com void *wq; 12210fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12222c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12232c292dbbSBoris Pismenny size_t inlen; 12240fb2ed66Smajd@mellanox.com int err; 12252c292dbbSBoris Pismenny 12262c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12272c292dbbSBoris Pismenny return -EINVAL; 12280fb2ed66Smajd@mellanox.com 12290fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12301b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12310fb2ed66Smajd@mellanox.com if (!in) 12320fb2ed66Smajd@mellanox.com return -ENOMEM; 12330fb2ed66Smajd@mellanox.com 12340fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1235e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12360fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12370fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12380fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12390fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12400fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12410fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12420fb2ed66Smajd@mellanox.com 1243358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1244358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1245358e42eaSMajd Dibbiny 12460fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12470fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1248b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1249b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12500fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12510fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12520fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12530fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12540fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12550fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12560fb2ed66Smajd@mellanox.com 12570fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12580fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12590fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12600fb2ed66Smajd@mellanox.com 12610fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12620fb2ed66Smajd@mellanox.com 12630fb2ed66Smajd@mellanox.com kvfree(in); 12640fb2ed66Smajd@mellanox.com 12650fb2ed66Smajd@mellanox.com return err; 12660fb2ed66Smajd@mellanox.com } 12670fb2ed66Smajd@mellanox.com 12680fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12690fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12700fb2ed66Smajd@mellanox.com { 12710fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12720fb2ed66Smajd@mellanox.com } 12730fb2ed66Smajd@mellanox.com 1274f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1275f95ef6cbSMaor Gottlieb { 1276f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1277f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1278f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1279f95ef6cbSMaor Gottlieb } 1280f95ef6cbSMaor Gottlieb 12810fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1282f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1283f95ef6cbSMaor Gottlieb bool tunnel_offload_en) 12840fb2ed66Smajd@mellanox.com { 12850fb2ed66Smajd@mellanox.com u32 *in; 12860fb2ed66Smajd@mellanox.com void *tirc; 12870fb2ed66Smajd@mellanox.com int inlen; 12880fb2ed66Smajd@mellanox.com int err; 12890fb2ed66Smajd@mellanox.com 12900fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12911b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12920fb2ed66Smajd@mellanox.com if (!in) 12930fb2ed66Smajd@mellanox.com return -ENOMEM; 12940fb2ed66Smajd@mellanox.com 12950fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12960fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12970fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12980fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1299f95ef6cbSMaor Gottlieb if (tunnel_offload_en) 1300f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 13010fb2ed66Smajd@mellanox.com 1302ec9c2fb8SMark Bloch if (dev->rep) 1303ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1304ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1305ec9c2fb8SMark Bloch 13060fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 13070fb2ed66Smajd@mellanox.com 13080fb2ed66Smajd@mellanox.com kvfree(in); 13090fb2ed66Smajd@mellanox.com 13100fb2ed66Smajd@mellanox.com return err; 13110fb2ed66Smajd@mellanox.com } 13120fb2ed66Smajd@mellanox.com 13130fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13140fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13150fb2ed66Smajd@mellanox.com { 13160fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 13170fb2ed66Smajd@mellanox.com } 13180fb2ed66Smajd@mellanox.com 13190fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13202c292dbbSBoris Pismenny u32 *in, size_t inlen, 13210fb2ed66Smajd@mellanox.com struct ib_pd *pd) 13220fb2ed66Smajd@mellanox.com { 13230fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13240fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13250fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13260fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13270fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13280fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13290fb2ed66Smajd@mellanox.com int err; 13300fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13310fb2ed66Smajd@mellanox.com 13320fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 1333c2e53b2cSYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn); 13340fb2ed66Smajd@mellanox.com if (err) 13350fb2ed66Smajd@mellanox.com return err; 13360fb2ed66Smajd@mellanox.com 13370fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13380fb2ed66Smajd@mellanox.com if (err) 13390fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13400fb2ed66Smajd@mellanox.com 13410fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13421d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13430fb2ed66Smajd@mellanox.com } 13440fb2ed66Smajd@mellanox.com 13450fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1346358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1347358e42eaSMajd Dibbiny 1348e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1349e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1350b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1351b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 13522c292dbbSBoris Pismenny err = create_raw_packet_qp_rq(dev, rq, in, inlen); 13530fb2ed66Smajd@mellanox.com if (err) 13540fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13550fb2ed66Smajd@mellanox.com 13560fb2ed66Smajd@mellanox.com 1357f95ef6cbSMaor Gottlieb err = create_raw_packet_qp_tir(dev, rq, tdn, 1358f95ef6cbSMaor Gottlieb qp->tunnel_offload_en); 13590fb2ed66Smajd@mellanox.com if (err) 13600fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13610fb2ed66Smajd@mellanox.com } 13620fb2ed66Smajd@mellanox.com 13630fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13640fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13650fb2ed66Smajd@mellanox.com 13660fb2ed66Smajd@mellanox.com return 0; 13670fb2ed66Smajd@mellanox.com 13680fb2ed66Smajd@mellanox.com err_destroy_rq: 13690fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13700fb2ed66Smajd@mellanox.com err_destroy_sq: 13710fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 13720fb2ed66Smajd@mellanox.com return err; 13730fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13740fb2ed66Smajd@mellanox.com err_destroy_tis: 13750fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13760fb2ed66Smajd@mellanox.com 13770fb2ed66Smajd@mellanox.com return err; 13780fb2ed66Smajd@mellanox.com } 13790fb2ed66Smajd@mellanox.com 13800fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 13810fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 13820fb2ed66Smajd@mellanox.com { 13830fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13840fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13850fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13860fb2ed66Smajd@mellanox.com 13870fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 13880fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 13890fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13900fb2ed66Smajd@mellanox.com } 13910fb2ed66Smajd@mellanox.com 13920fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13930fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13940fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13950fb2ed66Smajd@mellanox.com } 13960fb2ed66Smajd@mellanox.com } 13970fb2ed66Smajd@mellanox.com 13980fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 13990fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 14000fb2ed66Smajd@mellanox.com { 14010fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14020fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14030fb2ed66Smajd@mellanox.com 14040fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 14050fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 14060fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 14070fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 14080fb2ed66Smajd@mellanox.com } 14090fb2ed66Smajd@mellanox.com 141028d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 141128d61370SYishai Hadas { 141228d61370SYishai Hadas mlx5_core_destroy_tir(dev->mdev, qp->rss_qp.tirn); 141328d61370SYishai Hadas } 141428d61370SYishai Hadas 141528d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 141628d61370SYishai Hadas struct ib_pd *pd, 141728d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 141828d61370SYishai Hadas struct ib_udata *udata) 141928d61370SYishai Hadas { 142028d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 142128d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 142228d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 142328d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 142428d61370SYishai Hadas int inlen; 142528d61370SYishai Hadas int err; 142628d61370SYishai Hadas u32 *in; 142728d61370SYishai Hadas void *tirc; 142828d61370SYishai Hadas void *hfso; 142928d61370SYishai Hadas u32 selected_fields = 0; 14302d93fc85SMatan Barak u32 outer_l4; 143128d61370SYishai Hadas size_t min_resp_len; 143228d61370SYishai Hadas u32 tdn = mucontext->tdn; 143328d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 143428d61370SYishai Hadas size_t required_cmd_sz; 143528d61370SYishai Hadas 143628d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 143728d61370SYishai Hadas return -EOPNOTSUPP; 143828d61370SYishai Hadas 143928d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 144028d61370SYishai Hadas return -EINVAL; 144128d61370SYishai Hadas 14422f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 144328d61370SYishai Hadas if (udata->outlen < min_resp_len) 144428d61370SYishai Hadas return -EINVAL; 144528d61370SYishai Hadas 1446f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 144728d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 144828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 144928d61370SYishai Hadas return -EINVAL; 145028d61370SYishai Hadas } 145128d61370SYishai Hadas 145228d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 145328d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 145428d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 145528d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 145628d61370SYishai Hadas return -EOPNOTSUPP; 145728d61370SYishai Hadas } 145828d61370SYishai Hadas 145928d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 146028d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 146128d61370SYishai Hadas return -EFAULT; 146228d61370SYishai Hadas } 146328d61370SYishai Hadas 146428d61370SYishai Hadas if (ucmd.comp_mask) { 146528d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 146628d61370SYishai Hadas return -EOPNOTSUPP; 146728d61370SYishai Hadas } 146828d61370SYishai Hadas 1469f95ef6cbSMaor Gottlieb if (ucmd.flags & ~MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1470f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1471f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1472f95ef6cbSMaor Gottlieb } 1473f95ef6cbSMaor Gottlieb 1474f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1475f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1476f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 147728d61370SYishai Hadas return -EOPNOTSUPP; 147828d61370SYishai Hadas } 147928d61370SYishai Hadas 1480309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1481309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1482309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1483309fa347SMaor Gottlieb return -EOPNOTSUPP; 1484309fa347SMaor Gottlieb } 1485309fa347SMaor Gottlieb 148641d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 148728d61370SYishai Hadas if (err) { 148828d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 148928d61370SYishai Hadas return -EINVAL; 149028d61370SYishai Hadas } 149128d61370SYishai Hadas 149228d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14931b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 149428d61370SYishai Hadas if (!in) 149528d61370SYishai Hadas return -ENOMEM; 149628d61370SYishai Hadas 149728d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 149828d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 149928d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 150028d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 150128d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 150228d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 150328d61370SYishai Hadas 150428d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1505f95ef6cbSMaor Gottlieb 1506f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1507f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1508f95ef6cbSMaor Gottlieb 1509309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1510309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1511309fa347SMaor Gottlieb else 1512309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1513309fa347SMaor Gottlieb 151428d61370SYishai Hadas switch (ucmd.rx_hash_function) { 151528d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 151628d61370SYishai Hadas { 151728d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 151828d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 151928d61370SYishai Hadas 152028d61370SYishai Hadas if (len != ucmd.rx_key_len) { 152128d61370SYishai Hadas err = -EINVAL; 152228d61370SYishai Hadas goto err; 152328d61370SYishai Hadas } 152428d61370SYishai Hadas 152528d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 152628d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 152728d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 152828d61370SYishai Hadas break; 152928d61370SYishai Hadas } 153028d61370SYishai Hadas default: 153128d61370SYishai Hadas err = -EOPNOTSUPP; 153228d61370SYishai Hadas goto err; 153328d61370SYishai Hadas } 153428d61370SYishai Hadas 153528d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 153628d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 153728d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 153828d61370SYishai Hadas goto create_tir; 153928d61370SYishai Hadas err = -EINVAL; 154028d61370SYishai Hadas goto err; 154128d61370SYishai Hadas } 154228d61370SYishai Hadas 154328d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 154428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 154528d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 154628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 154728d61370SYishai Hadas err = -EINVAL; 154828d61370SYishai Hadas goto err; 154928d61370SYishai Hadas } 155028d61370SYishai Hadas 155128d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 155228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 155328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 155428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 155528d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 155628d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 155728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 155828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 155928d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 156028d61370SYishai Hadas 15612d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 15622d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 156328d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 15642d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 15652d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 15662d93fc85SMatan Barak 15672d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 15682d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 156928d61370SYishai Hadas err = -EINVAL; 157028d61370SYishai Hadas goto err; 157128d61370SYishai Hadas } 157228d61370SYishai Hadas 157328d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 157428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 157528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 157628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 157728d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 157828d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 157928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 158028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 158128d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 158228d61370SYishai Hadas 158328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 158428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 158528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 158628d61370SYishai Hadas 158728d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 158828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 158928d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 159028d61370SYishai Hadas 159128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 159228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 159328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 159428d61370SYishai Hadas 159528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 159628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 159728d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 159828d61370SYishai Hadas 15992d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 16002d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 16012d93fc85SMatan Barak 160228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 160328d61370SYishai Hadas 160428d61370SYishai Hadas create_tir: 1605ec9c2fb8SMark Bloch if (dev->rep) 1606ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1607ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1608ec9c2fb8SMark Bloch 160928d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 161028d61370SYishai Hadas 161128d61370SYishai Hadas if (err) 161228d61370SYishai Hadas goto err; 161328d61370SYishai Hadas 161428d61370SYishai Hadas kvfree(in); 161528d61370SYishai Hadas /* qpn is reserved for that QP */ 161628d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1617d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 161828d61370SYishai Hadas return 0; 161928d61370SYishai Hadas 162028d61370SYishai Hadas err: 162128d61370SYishai Hadas kvfree(in); 162228d61370SYishai Hadas return err; 162328d61370SYishai Hadas } 162428d61370SYishai Hadas 1625e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1626e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1627e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1628e126ba97SEli Cohen { 1629e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 163009a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1631938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 1632e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 163389ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 163489ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 163589ea94a7SMaor Gottlieb unsigned long flags; 1636cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 163709a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 163809a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1639e7b169f3SNoa Osherovich int mlx5_st; 1640cfb5e088SHaggai Abramovsky void *qpc; 164109a7d9ecSSaeed Mahameed u32 *in; 164209a7d9ecSSaeed Mahameed int err; 1643e126ba97SEli Cohen 1644e126ba97SEli Cohen mutex_init(&qp->mutex); 1645e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1646e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1647e126ba97SEli Cohen 1648e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1649e7b169f3SNoa Osherovich if (mlx5_st < 0) 1650e7b169f3SNoa Osherovich return -EINVAL; 1651e7b169f3SNoa Osherovich 165228d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 165328d61370SYishai Hadas if (!udata) 165428d61370SYishai Hadas return -ENOSYS; 165528d61370SYishai Hadas 165628d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 165728d61370SYishai Hadas return err; 165828d61370SYishai Hadas } 165928d61370SYishai Hadas 1660f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1661938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1662f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1663f360d88aSEli Cohen return -EINVAL; 1664f360d88aSEli Cohen } else { 1665f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1666f360d88aSEli Cohen } 1667f360d88aSEli Cohen } 1668f360d88aSEli Cohen 1669051f2630SLeon Romanovsky if (init_attr->create_flags & 1670051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1671051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1672051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1673051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1674051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1675051f2630SLeon Romanovsky return -EINVAL; 1676051f2630SLeon Romanovsky } 1677051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1678051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1679051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1680051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1681051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1682051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1683051f2630SLeon Romanovsky } 1684f0313965SErez Shitrit 1685f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1686f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1687f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1688f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1689f0313965SErez Shitrit return -EOPNOTSUPP; 1690f0313965SErez Shitrit } 1691f0313965SErez Shitrit 1692358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1693358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1694358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1695358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1696358e42eaSMajd Dibbiny } 1697358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1698358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1699358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1700358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1701358e42eaSMajd Dibbiny } 1702358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1703358e42eaSMajd Dibbiny } 1704358e42eaSMajd Dibbiny 1705e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1706e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1707e126ba97SEli Cohen 1708e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1709e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1710e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1711e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1712e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1713e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1714e4cc4fa7SNoa Osherovich } 1715e4cc4fa7SNoa Osherovich 1716e126ba97SEli Cohen if (pd && pd->uobject) { 1717e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1718e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1719e126ba97SEli Cohen return -EFAULT; 1720e126ba97SEli Cohen } 1721e126ba97SEli Cohen 1722cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1723cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1724cfb5e088SHaggai Abramovsky if (err) 1725cfb5e088SHaggai Abramovsky return err; 1726cfb5e088SHaggai Abramovsky 1727e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1728e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1729f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1730f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1731f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1732f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1733f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1734f95ef6cbSMaor Gottlieb } 1735f95ef6cbSMaor Gottlieb qp->tunnel_offload_en = true; 1736f95ef6cbSMaor Gottlieb } 1737c2e53b2cSYishai Hadas 1738c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1739c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1740c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1741c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1742c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1743c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1744c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1745c2e53b2cSYishai Hadas } 1746c2e53b2cSYishai Hadas 1747c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1748c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1749c2e53b2cSYishai Hadas } 1750e126ba97SEli Cohen } else { 1751e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1752e126ba97SEli Cohen } 1753e126ba97SEli Cohen 1754c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1755c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1756c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1757c2e53b2cSYishai Hadas &qp->trans_qp.base; 1758c2e53b2cSYishai Hadas 1759e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1760e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1761e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1762e126ba97SEli Cohen if (err) { 1763e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1764e126ba97SEli Cohen return err; 1765e126ba97SEli Cohen } 1766e126ba97SEli Cohen 1767e126ba97SEli Cohen if (pd) { 1768e126ba97SEli Cohen if (pd->uobject) { 1769938fe83cSSaeed Mahameed __u32 max_wqes = 1770938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1771e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1772e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1773e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1774e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1775e126ba97SEli Cohen return -EINVAL; 1776e126ba97SEli Cohen } 1777938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1778e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1779938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1780e126ba97SEli Cohen return -EINVAL; 1781e126ba97SEli Cohen } 1782b11a4f9cSHaggai Eran if (init_attr->create_flags & 1783b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1784b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1785b11a4f9cSHaggai Eran return -EINVAL; 1786b11a4f9cSHaggai Eran } 17870fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 17880fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1789e126ba97SEli Cohen if (err) 1790e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1791e126ba97SEli Cohen } else { 179219098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 179319098df2Smajd@mellanox.com base); 1794e126ba97SEli Cohen if (err) 1795e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1796e126ba97SEli Cohen } 1797e126ba97SEli Cohen 1798e126ba97SEli Cohen if (err) 1799e126ba97SEli Cohen return err; 1800e126ba97SEli Cohen } else { 18011b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1802e126ba97SEli Cohen if (!in) 1803e126ba97SEli Cohen return -ENOMEM; 1804e126ba97SEli Cohen 1805e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1806e126ba97SEli Cohen } 1807e126ba97SEli Cohen 1808e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1809e126ba97SEli Cohen qp->port = init_attr->port_num; 1810e126ba97SEli Cohen 181109a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 181209a7d9ecSSaeed Mahameed 1813e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 181409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1815e126ba97SEli Cohen 1816e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 181709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1818e126ba97SEli Cohen else 181909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 182009a7d9ecSSaeed Mahameed 1821e126ba97SEli Cohen 1822e126ba97SEli Cohen if (qp->wq_sig) 182309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1824e126ba97SEli Cohen 1825f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 182609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1827f360d88aSEli Cohen 1828051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 182909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1830051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 183109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1832051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 183309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1834051f2630SLeon Romanovsky 1835e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1836e126ba97SEli Cohen int rcqe_sz; 1837e126ba97SEli Cohen int scqe_sz; 1838e126ba97SEli Cohen 1839e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1840e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1841e126ba97SEli Cohen 1842e126ba97SEli Cohen if (rcqe_sz == 128) 184309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1844e126ba97SEli Cohen else 184509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1846e126ba97SEli Cohen 1847e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1848e126ba97SEli Cohen if (scqe_sz == 128) 184909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1850e126ba97SEli Cohen else 185109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1852e126ba97SEli Cohen } 1853e126ba97SEli Cohen } 1854e126ba97SEli Cohen 1855e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 185609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 185709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1858e126ba97SEli Cohen } 1859e126ba97SEli Cohen 186009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1861e126ba97SEli Cohen 18623fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 186309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 18643fd3307eSArtemy Kovalyov } else { 186509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 18663fd3307eSArtemy Kovalyov if (init_attr->srq && 18673fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 18683fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 18693fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 18703fd3307eSArtemy Kovalyov } 1871e126ba97SEli Cohen 1872e126ba97SEli Cohen /* Set default resources */ 1873e126ba97SEli Cohen switch (init_attr->qp_type) { 1874e126ba97SEli Cohen case IB_QPT_XRC_TGT: 187509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 187609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 187709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 187809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1879e126ba97SEli Cohen break; 1880e126ba97SEli Cohen case IB_QPT_XRC_INI: 188109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 188209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 188309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1884e126ba97SEli Cohen break; 1885e126ba97SEli Cohen default: 1886e126ba97SEli Cohen if (init_attr->srq) { 188709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 188809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1889e126ba97SEli Cohen } else { 189009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 189109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1892e126ba97SEli Cohen } 1893e126ba97SEli Cohen } 1894e126ba97SEli Cohen 1895e126ba97SEli Cohen if (init_attr->send_cq) 189609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1897e126ba97SEli Cohen 1898e126ba97SEli Cohen if (init_attr->recv_cq) 189909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1900e126ba97SEli Cohen 190109a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1902e126ba97SEli Cohen 1903cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 190409a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1905cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 190609a7d9ecSSaeed Mahameed 1907f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1908f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1909f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1910f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1911f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1912f0313965SErez Shitrit } 1913cfb5e088SHaggai Abramovsky 1914b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 1915b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 1916b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 1917b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 1918b1383aa6SNoa Osherovich goto err; 1919b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1920b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 1921b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 1922b1383aa6SNoa Osherovich } else { 1923b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 1924b1383aa6SNoa Osherovich } 1925b1383aa6SNoa Osherovich } 1926b1383aa6SNoa Osherovich 19272c292dbbSBoris Pismenny if (inlen < 0) { 19282c292dbbSBoris Pismenny err = -EINVAL; 19292c292dbbSBoris Pismenny goto err; 19302c292dbbSBoris Pismenny } 19312c292dbbSBoris Pismenny 1932c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 1933c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 19340fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 19350fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 19362c292dbbSBoris Pismenny err = create_raw_packet_qp(dev, qp, in, inlen, pd); 19370fb2ed66Smajd@mellanox.com } else { 193819098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 19390fb2ed66Smajd@mellanox.com } 19400fb2ed66Smajd@mellanox.com 1941e126ba97SEli Cohen if (err) { 1942e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1943e126ba97SEli Cohen goto err_create; 1944e126ba97SEli Cohen } 1945e126ba97SEli Cohen 1946479163f4SAl Viro kvfree(in); 1947e126ba97SEli Cohen 194819098df2Smajd@mellanox.com base->container_mibqp = qp; 194919098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1950e126ba97SEli Cohen 195189ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 195289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 195389ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 195489ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 195589ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 195689ea94a7SMaor Gottlieb * flow 195789ea94a7SMaor Gottlieb */ 195889ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 195989ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 196089ea94a7SMaor Gottlieb */ 196189ea94a7SMaor Gottlieb if (send_cq) 196289ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 196389ea94a7SMaor Gottlieb if (recv_cq) 196489ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 196589ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 196689ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 196789ea94a7SMaor Gottlieb 1968e126ba97SEli Cohen return 0; 1969e126ba97SEli Cohen 1970e126ba97SEli Cohen err_create: 1971e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 1972b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 1973e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1974e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1975e126ba97SEli Cohen 1976b1383aa6SNoa Osherovich err: 1977479163f4SAl Viro kvfree(in); 1978e126ba97SEli Cohen return err; 1979e126ba97SEli Cohen } 1980e126ba97SEli Cohen 1981e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1982e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1983e126ba97SEli Cohen { 1984e126ba97SEli Cohen if (send_cq) { 1985e126ba97SEli Cohen if (recv_cq) { 1986e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 198789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1988e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1989e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1990e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 199189ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1992e126ba97SEli Cohen __acquire(&recv_cq->lock); 1993e126ba97SEli Cohen } else { 199489ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 1995e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1996e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1997e126ba97SEli Cohen } 1998e126ba97SEli Cohen } else { 199989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 20006a4f139aSEli Cohen __acquire(&recv_cq->lock); 2001e126ba97SEli Cohen } 2002e126ba97SEli Cohen } else if (recv_cq) { 200389ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 20046a4f139aSEli Cohen __acquire(&send_cq->lock); 20056a4f139aSEli Cohen } else { 20066a4f139aSEli Cohen __acquire(&send_cq->lock); 20076a4f139aSEli Cohen __acquire(&recv_cq->lock); 2008e126ba97SEli Cohen } 2009e126ba97SEli Cohen } 2010e126ba97SEli Cohen 2011e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2012e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2013e126ba97SEli Cohen { 2014e126ba97SEli Cohen if (send_cq) { 2015e126ba97SEli Cohen if (recv_cq) { 2016e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2017e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 201889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2019e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2020e126ba97SEli Cohen __release(&recv_cq->lock); 202189ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2022e126ba97SEli Cohen } else { 2023e126ba97SEli Cohen spin_unlock(&send_cq->lock); 202489ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2025e126ba97SEli Cohen } 2026e126ba97SEli Cohen } else { 20276a4f139aSEli Cohen __release(&recv_cq->lock); 202889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2029e126ba97SEli Cohen } 2030e126ba97SEli Cohen } else if (recv_cq) { 20316a4f139aSEli Cohen __release(&send_cq->lock); 203289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 20336a4f139aSEli Cohen } else { 20346a4f139aSEli Cohen __release(&recv_cq->lock); 20356a4f139aSEli Cohen __release(&send_cq->lock); 2036e126ba97SEli Cohen } 2037e126ba97SEli Cohen } 2038e126ba97SEli Cohen 2039e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2040e126ba97SEli Cohen { 2041e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2042e126ba97SEli Cohen } 2043e126ba97SEli Cohen 204489ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 204589ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2046e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2047e126ba97SEli Cohen { 204889ea94a7SMaor Gottlieb switch (qp_type) { 2049e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2050e126ba97SEli Cohen *send_cq = NULL; 2051e126ba97SEli Cohen *recv_cq = NULL; 2052e126ba97SEli Cohen break; 2053e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2054e126ba97SEli Cohen case IB_QPT_XRC_INI: 205589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2056e126ba97SEli Cohen *recv_cq = NULL; 2057e126ba97SEli Cohen break; 2058e126ba97SEli Cohen 2059e126ba97SEli Cohen case IB_QPT_SMI: 2060d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2061e126ba97SEli Cohen case IB_QPT_RC: 2062e126ba97SEli Cohen case IB_QPT_UC: 2063e126ba97SEli Cohen case IB_QPT_UD: 2064e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2065e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 20660fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 206789ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 206889ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2069e126ba97SEli Cohen break; 2070e126ba97SEli Cohen 2071e126ba97SEli Cohen case IB_QPT_MAX: 2072e126ba97SEli Cohen default: 2073e126ba97SEli Cohen *send_cq = NULL; 2074e126ba97SEli Cohen *recv_cq = NULL; 2075e126ba97SEli Cohen break; 2076e126ba97SEli Cohen } 2077e126ba97SEli Cohen } 2078e126ba97SEli Cohen 2079ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 208013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 208113eab21fSAviv Heller u8 lag_tx_affinity); 2082ad5f8e96Smajd@mellanox.com 2083e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2084e126ba97SEli Cohen { 2085e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2086c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 208789ea94a7SMaor Gottlieb unsigned long flags; 2088e126ba97SEli Cohen int err; 2089e126ba97SEli Cohen 209028d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 209128d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 209228d61370SYishai Hadas return; 209328d61370SYishai Hadas } 209428d61370SYishai Hadas 2095c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2096c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 20970fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 20980fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 20990fb2ed66Smajd@mellanox.com 21006aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2101c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2102c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2103ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 21041a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 21051a412fb1SSaeed Mahameed NULL, &base->mqp); 2106ad5f8e96Smajd@mellanox.com } else { 21070680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 21080680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 21090680efa2SAlex Vesker }; 21100680efa2SAlex Vesker 211113eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2112ad5f8e96Smajd@mellanox.com } 2113ad5f8e96Smajd@mellanox.com if (err) 2114427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 211519098df2Smajd@mellanox.com base->mqp.qpn); 21166aec21f6SHaggai Eran } 2117e126ba97SEli Cohen 211889ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 211989ea94a7SMaor Gottlieb &send_cq, &recv_cq); 212089ea94a7SMaor Gottlieb 212189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 212289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 212389ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 212489ea94a7SMaor Gottlieb list_del(&qp->qps_list); 212589ea94a7SMaor Gottlieb if (send_cq) 212689ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 212789ea94a7SMaor Gottlieb 212889ea94a7SMaor Gottlieb if (recv_cq) 212989ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2130e126ba97SEli Cohen 2131e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 213219098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2133e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2134e126ba97SEli Cohen if (send_cq != recv_cq) 213519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 213619098df2Smajd@mellanox.com NULL); 2137e126ba97SEli Cohen } 213889ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 213989ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2140e126ba97SEli Cohen 2141c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2142c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21430fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 21440fb2ed66Smajd@mellanox.com } else { 214519098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2146e126ba97SEli Cohen if (err) 21470fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 21480fb2ed66Smajd@mellanox.com base->mqp.qpn); 21490fb2ed66Smajd@mellanox.com } 2150e126ba97SEli Cohen 2151e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2152e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2153e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2154b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2155e126ba97SEli Cohen } 2156e126ba97SEli Cohen 2157e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2158e126ba97SEli Cohen { 2159e126ba97SEli Cohen switch (type) { 2160e126ba97SEli Cohen case IB_QPT_SMI: 2161e126ba97SEli Cohen return "IB_QPT_SMI"; 2162e126ba97SEli Cohen case IB_QPT_GSI: 2163e126ba97SEli Cohen return "IB_QPT_GSI"; 2164e126ba97SEli Cohen case IB_QPT_RC: 2165e126ba97SEli Cohen return "IB_QPT_RC"; 2166e126ba97SEli Cohen case IB_QPT_UC: 2167e126ba97SEli Cohen return "IB_QPT_UC"; 2168e126ba97SEli Cohen case IB_QPT_UD: 2169e126ba97SEli Cohen return "IB_QPT_UD"; 2170e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2171e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2172e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2173e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2174e126ba97SEli Cohen case IB_QPT_XRC_INI: 2175e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2176e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2177e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2178e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2179e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2180e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2181e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2182b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2183b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2184e126ba97SEli Cohen case IB_QPT_MAX: 2185e126ba97SEli Cohen default: 2186e126ba97SEli Cohen return "Invalid QP type"; 2187e126ba97SEli Cohen } 2188e126ba97SEli Cohen } 2189e126ba97SEli Cohen 2190b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2191b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2192b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2193b4aaa1f0SMoni Shoua { 2194b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2195b4aaa1f0SMoni Shoua int err = 0; 2196b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2197b4aaa1f0SMoni Shoua void *dctc; 2198b4aaa1f0SMoni Shoua 2199b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2200b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2201b4aaa1f0SMoni Shoua 2202b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2203b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2204b4aaa1f0SMoni Shoua if (err) 2205b4aaa1f0SMoni Shoua return ERR_PTR(err); 2206b4aaa1f0SMoni Shoua 2207b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2208b4aaa1f0SMoni Shoua if (!qp) 2209b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2210b4aaa1f0SMoni Shoua 2211b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2212b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2213b4aaa1f0SMoni Shoua err = -ENOMEM; 2214b4aaa1f0SMoni Shoua goto err_free; 2215b4aaa1f0SMoni Shoua } 2216b4aaa1f0SMoni Shoua 2217b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2218776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2219b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2220b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2221b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2222b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2223b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2224b4aaa1f0SMoni Shoua 2225b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2226b4aaa1f0SMoni Shoua 2227b4aaa1f0SMoni Shoua return &qp->ibqp; 2228b4aaa1f0SMoni Shoua err_free: 2229b4aaa1f0SMoni Shoua kfree(qp); 2230b4aaa1f0SMoni Shoua return ERR_PTR(err); 2231b4aaa1f0SMoni Shoua } 2232b4aaa1f0SMoni Shoua 2233b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2234e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2235b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2236b4aaa1f0SMoni Shoua struct ib_udata *udata) 2237b4aaa1f0SMoni Shoua { 2238b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2239b4aaa1f0SMoni Shoua int err; 2240b4aaa1f0SMoni Shoua 2241b4aaa1f0SMoni Shoua if (!udata) 2242b4aaa1f0SMoni Shoua return -EINVAL; 2243b4aaa1f0SMoni Shoua 2244b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2245b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2246b4aaa1f0SMoni Shoua return -EINVAL; 2247b4aaa1f0SMoni Shoua } 2248b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2249b4aaa1f0SMoni Shoua if (err) 2250b4aaa1f0SMoni Shoua return err; 2251b4aaa1f0SMoni Shoua 2252b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2253b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2254b4aaa1f0SMoni Shoua } else { 2255b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2256b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2257b4aaa1f0SMoni Shoua } else { 2258b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2259b4aaa1f0SMoni Shoua return -EINVAL; 2260b4aaa1f0SMoni Shoua } 2261b4aaa1f0SMoni Shoua } 2262b4aaa1f0SMoni Shoua 2263b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2264b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2265b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2266b4aaa1f0SMoni Shoua } 2267b4aaa1f0SMoni Shoua 2268b4aaa1f0SMoni Shoua return 0; 2269b4aaa1f0SMoni Shoua } 2270b4aaa1f0SMoni Shoua 2271b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2272b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2273e126ba97SEli Cohen struct ib_udata *udata) 2274e126ba97SEli Cohen { 2275e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2276e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2277e126ba97SEli Cohen u16 xrcdn = 0; 2278e126ba97SEli Cohen int err; 2279b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2280b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2281e126ba97SEli Cohen 2282e126ba97SEli Cohen if (pd) { 2283e126ba97SEli Cohen dev = to_mdev(pd->device); 22840fb2ed66Smajd@mellanox.com 22850fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 22860fb2ed66Smajd@mellanox.com if (!pd->uobject) { 22870fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 22880fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22890fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 22900fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 22910fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22920fb2ed66Smajd@mellanox.com } 22930fb2ed66Smajd@mellanox.com } 229409f16cf5SMajd Dibbiny } else { 229509f16cf5SMajd Dibbiny /* being cautious here */ 229609f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 229709f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 229809f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 229909f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 230009f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 230109f16cf5SMajd Dibbiny } 230209f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2303e126ba97SEli Cohen } 2304e126ba97SEli Cohen 2305b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2306b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2307b4aaa1f0SMoni Shoua 2308b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2309b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2310b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2311b4aaa1f0SMoni Shoua if (err) 2312b4aaa1f0SMoni Shoua return ERR_PTR(err); 2313c32a4f29SMoni Shoua 2314c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2315c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2316c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2317c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2318c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2319c32a4f29SMoni Shoua } 2320776a3906SMoni Shoua } else { 2321776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2322c32a4f29SMoni Shoua } 2323b4aaa1f0SMoni Shoua } 2324b4aaa1f0SMoni Shoua 2325e126ba97SEli Cohen switch (init_attr->qp_type) { 2326e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2327e126ba97SEli Cohen case IB_QPT_XRC_INI: 2328938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2329e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2330e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2331e126ba97SEli Cohen } 2332e126ba97SEli Cohen init_attr->recv_cq = NULL; 2333e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2334e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2335e126ba97SEli Cohen init_attr->send_cq = NULL; 2336e126ba97SEli Cohen } 2337e126ba97SEli Cohen 2338e126ba97SEli Cohen /* fall through */ 23390fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2340e126ba97SEli Cohen case IB_QPT_RC: 2341e126ba97SEli Cohen case IB_QPT_UC: 2342e126ba97SEli Cohen case IB_QPT_UD: 2343e126ba97SEli Cohen case IB_QPT_SMI: 2344d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2345e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2346c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2347e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2348e126ba97SEli Cohen if (!qp) 2349e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2350e126ba97SEli Cohen 2351e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2352e126ba97SEli Cohen if (err) { 2353e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2354e126ba97SEli Cohen kfree(qp); 2355e126ba97SEli Cohen return ERR_PTR(err); 2356e126ba97SEli Cohen } 2357e126ba97SEli Cohen 2358e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2359e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2360e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2361e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2362e126ba97SEli Cohen else 236319098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2364e126ba97SEli Cohen 2365e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 236619098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2367a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2368a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2369e126ba97SEli Cohen 237019098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2371e126ba97SEli Cohen 2372e126ba97SEli Cohen break; 2373e126ba97SEli Cohen 2374d16e91daSHaggai Eran case IB_QPT_GSI: 2375d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2376d16e91daSHaggai Eran 2377e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2378e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2379e126ba97SEli Cohen case IB_QPT_MAX: 2380e126ba97SEli Cohen default: 2381e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2382e126ba97SEli Cohen init_attr->qp_type); 2383e126ba97SEli Cohen /* Don't support raw QPs */ 2384e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2385e126ba97SEli Cohen } 2386e126ba97SEli Cohen 2387b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2388b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2389b4aaa1f0SMoni Shoua 2390e126ba97SEli Cohen return &qp->ibqp; 2391e126ba97SEli Cohen } 2392e126ba97SEli Cohen 2393776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2394776a3906SMoni Shoua { 2395776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2396776a3906SMoni Shoua 2397776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2398776a3906SMoni Shoua int err; 2399776a3906SMoni Shoua 2400776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2401776a3906SMoni Shoua if (err) { 2402776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2403776a3906SMoni Shoua return err; 2404776a3906SMoni Shoua } 2405776a3906SMoni Shoua } 2406776a3906SMoni Shoua 2407776a3906SMoni Shoua kfree(mqp->dct.in); 2408776a3906SMoni Shoua kfree(mqp); 2409776a3906SMoni Shoua return 0; 2410776a3906SMoni Shoua } 2411776a3906SMoni Shoua 2412e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2413e126ba97SEli Cohen { 2414e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2415e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2416e126ba97SEli Cohen 2417d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2418d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2419d16e91daSHaggai Eran 2420776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2421776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2422776a3906SMoni Shoua 2423e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2424e126ba97SEli Cohen 2425e126ba97SEli Cohen kfree(mqp); 2426e126ba97SEli Cohen 2427e126ba97SEli Cohen return 0; 2428e126ba97SEli Cohen } 2429e126ba97SEli Cohen 2430e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2431e126ba97SEli Cohen int attr_mask) 2432e126ba97SEli Cohen { 2433e126ba97SEli Cohen u32 hw_access_flags = 0; 2434e126ba97SEli Cohen u8 dest_rd_atomic; 2435e126ba97SEli Cohen u32 access_flags; 2436e126ba97SEli Cohen 2437e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2438e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2439e126ba97SEli Cohen else 244019098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2441e126ba97SEli Cohen 2442e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2443e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2444e126ba97SEli Cohen else 244519098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2446e126ba97SEli Cohen 2447e126ba97SEli Cohen if (!dest_rd_atomic) 2448e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2449e126ba97SEli Cohen 2450e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2451e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2452e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2453e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2454e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2455e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2456e126ba97SEli Cohen 2457e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2458e126ba97SEli Cohen } 2459e126ba97SEli Cohen 2460e126ba97SEli Cohen enum { 2461e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2462e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2463e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2464e126ba97SEli Cohen }; 2465e126ba97SEli Cohen 2466e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2467e126ba97SEli Cohen { 24684f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2469e126ba97SEli Cohen return 0; 24704f32ac2eSDanit Goldberg 24714f32ac2eSDanit Goldberg if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) 2472e126ba97SEli Cohen return -EINVAL; 24734f32ac2eSDanit Goldberg 24744f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2475e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2476938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2477e126ba97SEli Cohen --rate; 2478e126ba97SEli Cohen 24794f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2480e126ba97SEli Cohen } 2481e126ba97SEli Cohen 248275850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 248375850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 248475850d0bSmajd@mellanox.com { 248575850d0bSmajd@mellanox.com void *in; 248675850d0bSmajd@mellanox.com void *tisc; 248775850d0bSmajd@mellanox.com int inlen; 248875850d0bSmajd@mellanox.com int err; 248975850d0bSmajd@mellanox.com 249075850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24911b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 249275850d0bSmajd@mellanox.com if (!in) 249375850d0bSmajd@mellanox.com return -ENOMEM; 249475850d0bSmajd@mellanox.com 249575850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 249675850d0bSmajd@mellanox.com 249775850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 249875850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 249975850d0bSmajd@mellanox.com 250075850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 250175850d0bSmajd@mellanox.com 250275850d0bSmajd@mellanox.com kvfree(in); 250375850d0bSmajd@mellanox.com 250475850d0bSmajd@mellanox.com return err; 250575850d0bSmajd@mellanox.com } 250675850d0bSmajd@mellanox.com 250713eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 250813eab21fSAviv Heller struct mlx5_ib_sq *sq, u8 tx_affinity) 250913eab21fSAviv Heller { 251013eab21fSAviv Heller void *in; 251113eab21fSAviv Heller void *tisc; 251213eab21fSAviv Heller int inlen; 251313eab21fSAviv Heller int err; 251413eab21fSAviv Heller 251513eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 25161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 251713eab21fSAviv Heller if (!in) 251813eab21fSAviv Heller return -ENOMEM; 251913eab21fSAviv Heller 252013eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 252113eab21fSAviv Heller 252213eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 252313eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 252413eab21fSAviv Heller 252513eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 252613eab21fSAviv Heller 252713eab21fSAviv Heller kvfree(in); 252813eab21fSAviv Heller 252913eab21fSAviv Heller return err; 253013eab21fSAviv Heller } 253113eab21fSAviv Heller 253275850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 253390898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2534e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2535f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2536f879ee8dSAchiad Shochat bool alt) 2537e126ba97SEli Cohen { 2538d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2539e126ba97SEli Cohen int err; 2540ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2541d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2542d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2543e126ba97SEli Cohen 2544e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2545f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2546f879ee8dSAchiad Shochat attr->pkey_index); 2547e126ba97SEli Cohen 2548d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2549d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2550938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2551f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2552d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2553938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2554f83b4263SEli Cohen return -EINVAL; 2555f83b4263SEli Cohen } 25562811ba51SAchiad Shochat } 255744c58487SDasaratharaman Chandramouli 255844c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2559d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 25602811ba51SAchiad Shochat return -EINVAL; 256147ec3866SParav Pandit 256244c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 25632b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 25642b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 25652b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 25662b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 256747ec3866SParav Pandit path->udp_sport = 256847ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2569d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 257047ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2571ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2572d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 25732811ba51SAchiad Shochat } else { 2574d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2575d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2576d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2577d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2578d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2579d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2580e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2581d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 25822811ba51SAchiad Shochat } 25832811ba51SAchiad Shochat 2584d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2585d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2586d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2587e126ba97SEli Cohen path->tclass_flowlabel = 2588d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2589d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2590d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2591e126ba97SEli Cohen } 2592e126ba97SEli Cohen 2593d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2594e126ba97SEli Cohen if (err < 0) 2595e126ba97SEli Cohen return err; 2596e126ba97SEli Cohen path->static_rate = err; 2597e126ba97SEli Cohen path->port = port; 2598e126ba97SEli Cohen 2599e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2600f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2601e126ba97SEli Cohen 260275850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 260375850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 260475850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 2605d8966fcdSDasaratharaman Chandramouli sl & 0xf); 260675850d0bSmajd@mellanox.com 2607e126ba97SEli Cohen return 0; 2608e126ba97SEli Cohen } 2609e126ba97SEli Cohen 2610e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2611e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2612e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2613e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2614e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2615e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2616e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2617e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2618e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2619e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2620e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2621e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2622e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2623e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2624e126ba97SEli Cohen }, 2625e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2626e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2627e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2628e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2629e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2630e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2631e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2632e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2633e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2634e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2635e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2636e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2637e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2638a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2639a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2640a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2641a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2642a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2643e126ba97SEli Cohen }, 2644e126ba97SEli Cohen }, 2645e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2646e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2647e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2648e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2649e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2650e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2651e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2652e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2653e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2654e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2655e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2656e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2657e126ba97SEli Cohen }, 2658e126ba97SEli Cohen }, 2659e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2660e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2661e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2662e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2663e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2664e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2665c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2666c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2667e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2668c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2669c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2670e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2671e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2672e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2673e126ba97SEli Cohen }, 2674e126ba97SEli Cohen }, 2675e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2676e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2677e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2678e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 267975959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2680a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2681a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2682a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2683a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2684e126ba97SEli Cohen }, 2685e126ba97SEli Cohen }, 2686e126ba97SEli Cohen }; 2687e126ba97SEli Cohen 2688e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2689e126ba97SEli Cohen { 2690e126ba97SEli Cohen switch (ib_mask) { 2691e126ba97SEli Cohen case IB_QP_STATE: 2692e126ba97SEli Cohen return 0; 2693e126ba97SEli Cohen case IB_QP_CUR_STATE: 2694e126ba97SEli Cohen return 0; 2695e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2696e126ba97SEli Cohen return 0; 2697e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2698e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2699e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2700e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2701e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2702e126ba97SEli Cohen case IB_QP_PORT: 2703e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2704e126ba97SEli Cohen case IB_QP_QKEY: 2705e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2706e126ba97SEli Cohen case IB_QP_AV: 2707e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2708e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2709e126ba97SEli Cohen case IB_QP_PATH_MTU: 2710e126ba97SEli Cohen return 0; 2711e126ba97SEli Cohen case IB_QP_TIMEOUT: 2712e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2713e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2714e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2715e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2716e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2717e126ba97SEli Cohen case IB_QP_RQ_PSN: 2718e126ba97SEli Cohen return 0; 2719e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2720e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2721e126ba97SEli Cohen case IB_QP_ALT_PATH: 2722e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2723e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2724e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2725e126ba97SEli Cohen case IB_QP_SQ_PSN: 2726e126ba97SEli Cohen return 0; 2727e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2728e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2729e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2730e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2731e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2732e126ba97SEli Cohen case IB_QP_CAP: 2733e126ba97SEli Cohen return 0; 2734e126ba97SEli Cohen case IB_QP_DEST_QPN: 2735e126ba97SEli Cohen return 0; 2736e126ba97SEli Cohen } 2737e126ba97SEli Cohen return 0; 2738e126ba97SEli Cohen } 2739e126ba97SEli Cohen 2740e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2741e126ba97SEli Cohen { 2742e126ba97SEli Cohen int result = 0; 2743e126ba97SEli Cohen int i; 2744e126ba97SEli Cohen 2745e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2746e126ba97SEli Cohen if ((1 << i) & ib_mask) 2747e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2748e126ba97SEli Cohen } 2749e126ba97SEli Cohen 2750e126ba97SEli Cohen return result; 2751e126ba97SEli Cohen } 2752e126ba97SEli Cohen 2753eb49ab0cSAlex Vesker static int modify_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 2754eb49ab0cSAlex Vesker struct mlx5_ib_rq *rq, int new_state, 2755eb49ab0cSAlex Vesker const struct mlx5_modify_raw_qp_param *raw_qp_param) 2756ad5f8e96Smajd@mellanox.com { 2757ad5f8e96Smajd@mellanox.com void *in; 2758ad5f8e96Smajd@mellanox.com void *rqc; 2759ad5f8e96Smajd@mellanox.com int inlen; 2760ad5f8e96Smajd@mellanox.com int err; 2761ad5f8e96Smajd@mellanox.com 2762ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 27631b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2764ad5f8e96Smajd@mellanox.com if (!in) 2765ad5f8e96Smajd@mellanox.com return -ENOMEM; 2766ad5f8e96Smajd@mellanox.com 2767ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2768ad5f8e96Smajd@mellanox.com 2769ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2770ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2771ad5f8e96Smajd@mellanox.com 2772eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2773eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2774eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 277523a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2776eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2777eb49ab0cSAlex Vesker } else 2778eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2779eb49ab0cSAlex Vesker dev->ib_dev.name); 2780eb49ab0cSAlex Vesker } 2781eb49ab0cSAlex Vesker 2782eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2783ad5f8e96Smajd@mellanox.com if (err) 2784ad5f8e96Smajd@mellanox.com goto out; 2785ad5f8e96Smajd@mellanox.com 2786ad5f8e96Smajd@mellanox.com rq->state = new_state; 2787ad5f8e96Smajd@mellanox.com 2788ad5f8e96Smajd@mellanox.com out: 2789ad5f8e96Smajd@mellanox.com kvfree(in); 2790ad5f8e96Smajd@mellanox.com return err; 2791ad5f8e96Smajd@mellanox.com } 2792ad5f8e96Smajd@mellanox.com 2793ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 27947d29f349SBodong Wang struct mlx5_ib_sq *sq, 27957d29f349SBodong Wang int new_state, 27967d29f349SBodong Wang const struct mlx5_modify_raw_qp_param *raw_qp_param) 2797ad5f8e96Smajd@mellanox.com { 27987d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 279961147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 280061147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 280161147f39SBodong Wang bool new_rate_added = false; 28027d29f349SBodong Wang u16 rl_index = 0; 2803ad5f8e96Smajd@mellanox.com void *in; 2804ad5f8e96Smajd@mellanox.com void *sqc; 2805ad5f8e96Smajd@mellanox.com int inlen; 2806ad5f8e96Smajd@mellanox.com int err; 2807ad5f8e96Smajd@mellanox.com 2808ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 28091b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2810ad5f8e96Smajd@mellanox.com if (!in) 2811ad5f8e96Smajd@mellanox.com return -ENOMEM; 2812ad5f8e96Smajd@mellanox.com 2813ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2814ad5f8e96Smajd@mellanox.com 2815ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2816ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2817ad5f8e96Smajd@mellanox.com 28187d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 28197d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 28207d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 28217d29f349SBodong Wang __func__); 28227d29f349SBodong Wang else 282361147f39SBodong Wang new_rl = raw_qp_param->rl; 28247d29f349SBodong Wang } 2825ad5f8e96Smajd@mellanox.com 282661147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 282761147f39SBodong Wang if (new_rl.rate) { 282861147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 28297d29f349SBodong Wang if (err) { 283061147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 283161147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 283261147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 283361147f39SBodong Wang new_rl.typical_pkt_sz); 283461147f39SBodong Wang 28357d29f349SBodong Wang goto out; 28367d29f349SBodong Wang } 283761147f39SBodong Wang new_rate_added = true; 28387d29f349SBodong Wang } 28397d29f349SBodong Wang 28407d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 284161147f39SBodong Wang /* index 0 means no limit */ 28427d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 28437d29f349SBodong Wang } 28447d29f349SBodong Wang 28457d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 28467d29f349SBodong Wang if (err) { 28477d29f349SBodong Wang /* Remove new rate from table if failed */ 284861147f39SBodong Wang if (new_rate_added) 284961147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 28507d29f349SBodong Wang goto out; 28517d29f349SBodong Wang } 28527d29f349SBodong Wang 28537d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 285461147f39SBodong Wang if ((old_rl.rate && 285561147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 28567d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 285761147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 28587d29f349SBodong Wang 285961147f39SBodong Wang ibqp->rl = new_rl; 2860ad5f8e96Smajd@mellanox.com sq->state = new_state; 2861ad5f8e96Smajd@mellanox.com 2862ad5f8e96Smajd@mellanox.com out: 2863ad5f8e96Smajd@mellanox.com kvfree(in); 2864ad5f8e96Smajd@mellanox.com return err; 2865ad5f8e96Smajd@mellanox.com } 2866ad5f8e96Smajd@mellanox.com 2867ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 286813eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 286913eab21fSAviv Heller u8 tx_affinity) 2870ad5f8e96Smajd@mellanox.com { 2871ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2872ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2873ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 28747d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 28757d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2876ad5f8e96Smajd@mellanox.com int rq_state; 2877ad5f8e96Smajd@mellanox.com int sq_state; 2878ad5f8e96Smajd@mellanox.com int err; 2879ad5f8e96Smajd@mellanox.com 28800680efa2SAlex Vesker switch (raw_qp_param->operation) { 2881ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2882ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2883ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2884ad5f8e96Smajd@mellanox.com break; 2885ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2886ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2887ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2888ad5f8e96Smajd@mellanox.com break; 2889ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2890ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2891ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2892ad5f8e96Smajd@mellanox.com break; 2893ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2894ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 28957d29f349SBodong Wang if (raw_qp_param->set_mask == 28967d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 28977d29f349SBodong Wang modify_rq = 0; 28987d29f349SBodong Wang sq_state = sq->state; 28997d29f349SBodong Wang } else { 29007d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 29017d29f349SBodong Wang } 29027d29f349SBodong Wang break; 29037d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 29047d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2905eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2906eb49ab0cSAlex Vesker return -EINVAL; 2907eb49ab0cSAlex Vesker else 2908ad5f8e96Smajd@mellanox.com return 0; 2909ad5f8e96Smajd@mellanox.com default: 2910ad5f8e96Smajd@mellanox.com WARN_ON(1); 2911ad5f8e96Smajd@mellanox.com return -EINVAL; 2912ad5f8e96Smajd@mellanox.com } 2913ad5f8e96Smajd@mellanox.com 29147d29f349SBodong Wang if (modify_rq) { 2915eb49ab0cSAlex Vesker err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param); 2916ad5f8e96Smajd@mellanox.com if (err) 2917ad5f8e96Smajd@mellanox.com return err; 2918ad5f8e96Smajd@mellanox.com } 2919ad5f8e96Smajd@mellanox.com 29207d29f349SBodong Wang if (modify_sq) { 292113eab21fSAviv Heller if (tx_affinity) { 292213eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 292313eab21fSAviv Heller tx_affinity); 292413eab21fSAviv Heller if (err) 292513eab21fSAviv Heller return err; 292613eab21fSAviv Heller } 292713eab21fSAviv Heller 29287d29f349SBodong Wang return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, raw_qp_param); 292913eab21fSAviv Heller } 2930ad5f8e96Smajd@mellanox.com 2931ad5f8e96Smajd@mellanox.com return 0; 2932ad5f8e96Smajd@mellanox.com } 2933ad5f8e96Smajd@mellanox.com 2934e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2935e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 293661147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 293761147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 2938e126ba97SEli Cohen { 2939427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2940427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2941427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2942427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2943427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2944427c1e7bSmajd@mellanox.com }, 2945427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2946427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2947427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2948427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2949427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2950427c1e7bSmajd@mellanox.com }, 2951427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2952427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2953427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2954427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2955427c1e7bSmajd@mellanox.com }, 2956427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2957427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2958427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2959427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2960427c1e7bSmajd@mellanox.com }, 2961427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2962427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2963427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2964427c1e7bSmajd@mellanox.com }, 2965427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2966427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2967427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2968427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2969427c1e7bSmajd@mellanox.com }, 2970427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2971427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2972427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2973427c1e7bSmajd@mellanox.com } 2974427c1e7bSmajd@mellanox.com }; 2975427c1e7bSmajd@mellanox.com 2976e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2977e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 297819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2979e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2980e126ba97SEli Cohen struct mlx5_qp_context *context; 2981e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2982eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 2983e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2984e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2985e126ba97SEli Cohen int mlx5_st; 2986e126ba97SEli Cohen int err; 2987427c1e7bSmajd@mellanox.com u16 op; 298813eab21fSAviv Heller u8 tx_affinity = 0; 2989e126ba97SEli Cohen 299055de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 299155de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 299255de9a77SLeon Romanovsky if (mlx5_st < 0) 299355de9a77SLeon Romanovsky return -EINVAL; 299455de9a77SLeon Romanovsky 29951a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 29961a412fb1SSaeed Mahameed if (!context) 2997e126ba97SEli Cohen return -ENOMEM; 2998e126ba97SEli Cohen 299955de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3000e126ba97SEli Cohen 3001e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3002e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3003e126ba97SEli Cohen } else { 3004e126ba97SEli Cohen switch (attr->path_mig_state) { 3005e126ba97SEli Cohen case IB_MIG_MIGRATED: 3006e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3007e126ba97SEli Cohen break; 3008e126ba97SEli Cohen case IB_MIG_REARM: 3009e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3010e126ba97SEli Cohen break; 3011e126ba97SEli Cohen case IB_MIG_ARMED: 3012e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3013e126ba97SEli Cohen break; 3014e126ba97SEli Cohen } 3015e126ba97SEli Cohen } 3016e126ba97SEli Cohen 301713eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 301813eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 301913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 302013eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 302113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 302213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 302313eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 302413eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 302513eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 30267fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 302713eab21fSAviv Heller tx_affinity = (unsigned int)atomic_add_return(1, 30287fd8aefbSDaniel Jurgens &dev->roce[p].next_port) % 302913eab21fSAviv Heller MLX5_MAX_PORTS + 1; 303013eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 303113eab21fSAviv Heller } 303213eab21fSAviv Heller } 303313eab21fSAviv Heller } 303413eab21fSAviv Heller 3035d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3036e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3037c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3038c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3039e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3040e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3041e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3042e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3043e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3044e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3045e126ba97SEli Cohen err = -EINVAL; 3046e126ba97SEli Cohen goto out; 3047e126ba97SEli Cohen } 3048938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3049938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3050e126ba97SEli Cohen } 3051e126ba97SEli Cohen 3052e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3053e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3054e126ba97SEli Cohen 3055e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3056d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3057e126ba97SEli Cohen 3058e126ba97SEli Cohen /* todo implement counter_index functionality */ 3059e126ba97SEli Cohen 3060e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3061e126ba97SEli Cohen context->pri_path.port = qp->port; 3062e126ba97SEli Cohen 3063e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3064e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3065e126ba97SEli Cohen 3066e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 306775850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3068e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3069f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3070e126ba97SEli Cohen if (err) 3071e126ba97SEli Cohen goto out; 3072e126ba97SEli Cohen } 3073e126ba97SEli Cohen 3074e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3075e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3076e126ba97SEli Cohen 3077e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 307875850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 307975850d0bSmajd@mellanox.com &context->alt_path, 3080f879ee8dSAchiad Shochat attr->alt_port_num, 3081f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3082f879ee8dSAchiad Shochat 0, attr, true); 3083e126ba97SEli Cohen if (err) 3084e126ba97SEli Cohen goto out; 3085e126ba97SEli Cohen } 3086e126ba97SEli Cohen 3087e126ba97SEli Cohen pd = get_pd(qp); 308889ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 308989ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3090e126ba97SEli Cohen 3091e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3092e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3093e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3094e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3095e126ba97SEli Cohen 3096e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3097e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3098e126ba97SEli Cohen 3099e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3100e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3101e126ba97SEli Cohen 3102e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3103e126ba97SEli Cohen if (attr->max_rd_atomic) 3104e126ba97SEli Cohen context->params1 |= 3105e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3106e126ba97SEli Cohen } 3107e126ba97SEli Cohen 3108e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3109e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3110e126ba97SEli Cohen 3111e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3112e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3113e126ba97SEli Cohen context->params2 |= 3114e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3115e126ba97SEli Cohen } 3116e126ba97SEli Cohen 3117e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3118e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3119e126ba97SEli Cohen 3120e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3121e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3122e126ba97SEli Cohen 3123e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3124e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3125e126ba97SEli Cohen 3126e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3127e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3128e126ba97SEli Cohen 3129e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3130e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3131e126ba97SEli Cohen 31320837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 31330837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 31340837e86aSMark Bloch qp->port) - 1; 3135c2e53b2cSYishai Hadas 3136c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3137c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3138c2e53b2cSYishai Hadas port_num = 0; 3139c2e53b2cSYishai Hadas 3140eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 31410837e86aSMark Bloch context->qp_counter_set_usr_page |= 3142e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 31430837e86aSMark Bloch } 31440837e86aSMark Bloch 3145e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3146e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3147e126ba97SEli Cohen 3148b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3149b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3150e126ba97SEli Cohen 3151e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3152e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3153e126ba97SEli Cohen 3154427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 31555d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 31565d414b17SDan Carpenter err = -EINVAL; 3157427c1e7bSmajd@mellanox.com goto out; 31585d414b17SDan Carpenter } 3159427c1e7bSmajd@mellanox.com 3160427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3161e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3162e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3163ad5f8e96Smajd@mellanox.com 3164c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3165c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 31660680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 31670680efa2SAlex Vesker 31680680efa2SAlex Vesker raw_qp_param.operation = op; 3169eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3170e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3171eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3172eb49ab0cSAlex Vesker } 31737d29f349SBodong Wang 31747d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 317561147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 317661147f39SBodong Wang 317761147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 317861147f39SBodong Wang if (attr->rate_limit && 317961147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 318061147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 318161147f39SBodong Wang ucmd->burst_info.max_burst_sz; 318261147f39SBodong Wang } else { 318361147f39SBodong Wang err = -EINVAL; 318461147f39SBodong Wang goto out; 318561147f39SBodong Wang } 318661147f39SBodong Wang } 318761147f39SBodong Wang 318861147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 318961147f39SBodong Wang if (attr->rate_limit && 319061147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 319161147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 319261147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 319361147f39SBodong Wang } else { 319461147f39SBodong Wang err = -EINVAL; 319561147f39SBodong Wang goto out; 319661147f39SBodong Wang } 319761147f39SBodong Wang } 319861147f39SBodong Wang 31997d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 32007d29f349SBodong Wang } 32017d29f349SBodong Wang 320213eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 32030680efa2SAlex Vesker } else { 32041a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 320519098df2Smajd@mellanox.com &base->mqp); 32060680efa2SAlex Vesker } 32070680efa2SAlex Vesker 3208e126ba97SEli Cohen if (err) 3209e126ba97SEli Cohen goto out; 3210e126ba97SEli Cohen 3211e126ba97SEli Cohen qp->state = new_state; 3212e126ba97SEli Cohen 3213e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 321419098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3215e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 321619098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3217e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3218e126ba97SEli Cohen qp->port = attr->port_num; 3219e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 322019098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3221e126ba97SEli Cohen 3222e126ba97SEli Cohen /* 3223e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3224e126ba97SEli Cohen * entries and reinitialize the QP. 3225e126ba97SEli Cohen */ 322675a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 322775a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 322819098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3229e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3230e126ba97SEli Cohen if (send_cq != recv_cq) 323119098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3232e126ba97SEli Cohen 3233e126ba97SEli Cohen qp->rq.head = 0; 3234e126ba97SEli Cohen qp->rq.tail = 0; 3235e126ba97SEli Cohen qp->sq.head = 0; 3236e126ba97SEli Cohen qp->sq.tail = 0; 3237e126ba97SEli Cohen qp->sq.cur_post = 0; 3238e126ba97SEli Cohen qp->sq.last_poll = 0; 3239e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3240e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3241e126ba97SEli Cohen } 3242e126ba97SEli Cohen 3243e126ba97SEli Cohen out: 32441a412fb1SSaeed Mahameed kfree(context); 3245e126ba97SEli Cohen return err; 3246e126ba97SEli Cohen } 3247e126ba97SEli Cohen 3248c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3249c32a4f29SMoni Shoua { 3250c32a4f29SMoni Shoua if ((mask & req) != req) 3251c32a4f29SMoni Shoua return false; 3252c32a4f29SMoni Shoua 3253c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3254c32a4f29SMoni Shoua return false; 3255c32a4f29SMoni Shoua 3256c32a4f29SMoni Shoua return true; 3257c32a4f29SMoni Shoua } 3258c32a4f29SMoni Shoua 3259c32a4f29SMoni Shoua /* check valid transition for driver QP types 3260c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3261c32a4f29SMoni Shoua */ 3262c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3263c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3264c32a4f29SMoni Shoua { 3265c32a4f29SMoni Shoua int req = IB_QP_STATE; 3266c32a4f29SMoni Shoua int opt = 0; 3267c32a4f29SMoni Shoua 3268c32a4f29SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3269c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3270c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3271c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3272c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3273c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3274c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3275c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3276c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3277c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3278c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3279c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3280c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3281c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3282c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3283c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3284c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3285c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3286c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3287c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3288c32a4f29SMoni Shoua } 3289c32a4f29SMoni Shoua return false; 3290c32a4f29SMoni Shoua } 3291c32a4f29SMoni Shoua 3292776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3293776a3906SMoni Shoua * valid transitions are: 3294776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3295776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3296776a3906SMoni Shoua * mtu, gid_index and hop_limit 3297776a3906SMoni Shoua * Other transitions and attributes are illegal 3298776a3906SMoni Shoua */ 3299776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3300776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3301776a3906SMoni Shoua { 3302776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3303776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3304776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3305776a3906SMoni Shoua int err = 0; 3306776a3906SMoni Shoua int required = IB_QP_STATE; 3307776a3906SMoni Shoua void *dctc; 3308776a3906SMoni Shoua 3309776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3310776a3906SMoni Shoua return -EINVAL; 3311776a3906SMoni Shoua 3312776a3906SMoni Shoua cur_state = qp->state; 3313776a3906SMoni Shoua new_state = attr->qp_state; 3314776a3906SMoni Shoua 3315776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3316776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3317776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3318776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3319776a3906SMoni Shoua return -EINVAL; 3320776a3906SMoni Shoua 3321776a3906SMoni Shoua if (attr->port_num == 0 || 3322776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3323776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3324776a3906SMoni Shoua attr->port_num, dev->num_ports); 3325776a3906SMoni Shoua return -EINVAL; 3326776a3906SMoni Shoua } 3327776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3328776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3329776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3330776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3331776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3332776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3333776a3906SMoni Shoua return -EOPNOTSUPP; 3334776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3335776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3336776a3906SMoni Shoua } 3337776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3338776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3339776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3340776a3906SMoni Shoua 3341776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3342776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3343776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3344776a3906SMoni Shoua sizeof(resp.dctn); 3345776a3906SMoni Shoua 3346776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3347776a3906SMoni Shoua return -EINVAL; 3348776a3906SMoni Shoua resp.response_length = min_resp_len; 3349776a3906SMoni Shoua 3350776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3351776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3352776a3906SMoni Shoua return -EINVAL; 3353776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3354776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3355776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3356776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3357776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3358776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3359776a3906SMoni Shoua 3360776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3361776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3362776a3906SMoni Shoua if (err) 3363776a3906SMoni Shoua return err; 3364776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3365776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3366776a3906SMoni Shoua if (err) { 3367776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3368776a3906SMoni Shoua return err; 3369776a3906SMoni Shoua } 3370776a3906SMoni Shoua } else { 3371776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3372776a3906SMoni Shoua return -EINVAL; 3373776a3906SMoni Shoua } 3374776a3906SMoni Shoua if (err) 3375776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3376776a3906SMoni Shoua else 3377776a3906SMoni Shoua qp->state = new_state; 3378776a3906SMoni Shoua return err; 3379776a3906SMoni Shoua } 3380776a3906SMoni Shoua 3381e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3382e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3383e126ba97SEli Cohen { 3384e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3385e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 338661147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3387d16e91daSHaggai Eran enum ib_qp_type qp_type; 3388e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 338961147f39SBodong Wang size_t required_cmd_sz; 3390e126ba97SEli Cohen int err = -EINVAL; 3391e126ba97SEli Cohen int port; 33922811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 3393e126ba97SEli Cohen 339428d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 339528d61370SYishai Hadas return -ENOSYS; 339628d61370SYishai Hadas 339761147f39SBodong Wang if (udata && udata->inlen) { 339861147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 339961147f39SBodong Wang sizeof(ucmd.reserved); 340061147f39SBodong Wang if (udata->inlen < required_cmd_sz) 340161147f39SBodong Wang return -EINVAL; 340261147f39SBodong Wang 340361147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 340461147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 340561147f39SBodong Wang udata->inlen - sizeof(ucmd))) 340661147f39SBodong Wang return -EOPNOTSUPP; 340761147f39SBodong Wang 340861147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 340961147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 341061147f39SBodong Wang return -EFAULT; 341161147f39SBodong Wang 341261147f39SBodong Wang if (ucmd.comp_mask || 341361147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 341461147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 341561147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 341661147f39SBodong Wang return -EOPNOTSUPP; 341761147f39SBodong Wang } 341861147f39SBodong Wang 3419d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3420d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3421d16e91daSHaggai Eran 3422c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3423c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3424c32a4f29SMoni Shoua else 3425d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3426d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3427d16e91daSHaggai Eran 3428776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3429776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3430c32a4f29SMoni Shoua 3431e126ba97SEli Cohen mutex_lock(&qp->mutex); 3432e126ba97SEli Cohen 3433e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3434e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3435e126ba97SEli Cohen 34362811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 34372811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 34382811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 34392811ba51SAchiad Shochat } 34402811ba51SAchiad Shochat 3441c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3442c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3443c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3444c2e53b2cSYishai Hadas attr_mask); 3445c2e53b2cSYishai Hadas goto out; 3446c2e53b2cSYishai Hadas } 3447c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3448c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3449d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 3450158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3451158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3452e126ba97SEli Cohen goto out; 3453c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3454c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3455c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3456c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3457c32a4f29SMoni Shoua goto out; 3458158abf86SHaggai Eran } 3459e126ba97SEli Cohen 3460e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3461938fe83cSSaeed Mahameed (attr->port_num == 0 || 3462508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3463158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3464158abf86SHaggai Eran attr->port_num, dev->num_ports); 3465e126ba97SEli Cohen goto out; 3466158abf86SHaggai Eran } 3467e126ba97SEli Cohen 3468e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3469e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3470938fe83cSSaeed Mahameed if (attr->pkey_index >= 3471158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3472158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3473158abf86SHaggai Eran attr->pkey_index); 3474e126ba97SEli Cohen goto out; 3475e126ba97SEli Cohen } 3476158abf86SHaggai Eran } 3477e126ba97SEli Cohen 3478e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3479938fe83cSSaeed Mahameed attr->max_rd_atomic > 3480158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3481158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3482158abf86SHaggai Eran attr->max_rd_atomic); 3483e126ba97SEli Cohen goto out; 3484158abf86SHaggai Eran } 3485e126ba97SEli Cohen 3486e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3487938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3488158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3489158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3490158abf86SHaggai Eran attr->max_dest_rd_atomic); 3491e126ba97SEli Cohen goto out; 3492158abf86SHaggai Eran } 3493e126ba97SEli Cohen 3494e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3495e126ba97SEli Cohen err = 0; 3496e126ba97SEli Cohen goto out; 3497e126ba97SEli Cohen } 3498e126ba97SEli Cohen 349961147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 350061147f39SBodong Wang new_state, &ucmd); 3501e126ba97SEli Cohen 3502e126ba97SEli Cohen out: 3503e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3504e126ba97SEli Cohen return err; 3505e126ba97SEli Cohen } 3506e126ba97SEli Cohen 3507e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3508e126ba97SEli Cohen { 3509e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3510e126ba97SEli Cohen unsigned cur; 3511e126ba97SEli Cohen 3512e126ba97SEli Cohen cur = wq->head - wq->tail; 3513e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3514e126ba97SEli Cohen return 0; 3515e126ba97SEli Cohen 3516e126ba97SEli Cohen cq = to_mcq(ib_cq); 3517e126ba97SEli Cohen spin_lock(&cq->lock); 3518e126ba97SEli Cohen cur = wq->head - wq->tail; 3519e126ba97SEli Cohen spin_unlock(&cq->lock); 3520e126ba97SEli Cohen 3521e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3522e126ba97SEli Cohen } 3523e126ba97SEli Cohen 3524e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3525e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3526e126ba97SEli Cohen { 3527e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3528e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3529e126ba97SEli Cohen rseg->reserved = 0; 3530e126ba97SEli Cohen } 3531e126ba97SEli Cohen 3532f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3533f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 3534f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3535f0313965SErez Shitrit { 3536f0313965SErez Shitrit void *seg = eseg; 3537f0313965SErez Shitrit 3538f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3539f0313965SErez Shitrit 3540f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3541f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3542f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3543f0313965SErez Shitrit 3544f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3545f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3546f0313965SErez Shitrit 3547f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3548f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 35492b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3550f0313965SErez Shitrit u64 left, leftlen, copysz; 3551f0313965SErez Shitrit void *pdata = ud_wr->header; 3552f0313965SErez Shitrit 3553f0313965SErez Shitrit left = ud_wr->hlen; 3554f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 35552b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3556f0313965SErez Shitrit 3557f0313965SErez Shitrit /* 3558f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3559f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3560f0313965SErez Shitrit * rollback and than the copy the left 3561f0313965SErez Shitrit */ 35622b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3563f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3564f0313965SErez Shitrit 3565f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3566f0313965SErez Shitrit 3567f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3568f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3569f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3570f0313965SErez Shitrit } 3571f0313965SErez Shitrit 3572f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3573f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3574f0313965SErez Shitrit left -= copysz; 3575f0313965SErez Shitrit pdata += copysz; 3576f0313965SErez Shitrit memcpy(seg, pdata, left); 3577f0313965SErez Shitrit seg += ALIGN(left, 16); 3578f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3579f0313965SErez Shitrit } 3580f0313965SErez Shitrit } 3581f0313965SErez Shitrit 3582f0313965SErez Shitrit return seg; 3583f0313965SErez Shitrit } 3584f0313965SErez Shitrit 3585e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3586e126ba97SEli Cohen struct ib_send_wr *wr) 3587e126ba97SEli Cohen { 3588e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3589e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3590e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3591e126ba97SEli Cohen } 3592e126ba97SEli Cohen 3593e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3594e126ba97SEli Cohen { 3595e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3596e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3597e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3598e126ba97SEli Cohen } 3599e126ba97SEli Cohen 360031616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3601e126ba97SEli Cohen { 360231616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 360331616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3604e126ba97SEli Cohen } 3605e126ba97SEli Cohen 3606e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3607e126ba97SEli Cohen { 3608e126ba97SEli Cohen u64 result; 3609e126ba97SEli Cohen 3610e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3611e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3612e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3613e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3614e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3615e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3616e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3617e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3618e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3619e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3620e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3621e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3622e126ba97SEli Cohen 3623e126ba97SEli Cohen return cpu_to_be64(result); 3624e126ba97SEli Cohen } 3625e126ba97SEli Cohen 3626e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3627e6631814SSagi Grimberg { 3628e6631814SSagi Grimberg u64 result; 3629e6631814SSagi Grimberg 3630e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3631e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3632e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3633d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3634e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3635e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3636e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3637e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3638e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3639e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3640e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3641e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3642e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3643e6631814SSagi Grimberg 3644e6631814SSagi Grimberg return cpu_to_be64(result); 3645e6631814SSagi Grimberg } 3646e6631814SSagi Grimberg 36478a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 3648064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 36498a187ee5SSagi Grimberg { 365031616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 36518a187ee5SSagi Grimberg 36528a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3653b005d316SSagi Grimberg 36548a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 3655064e5262SIdan Burstein if (umr_inline) 3656064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 365731616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 36588a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 36598a187ee5SSagi Grimberg } 36608a187ee5SSagi Grimberg 3661dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3662e126ba97SEli Cohen { 3663e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3664e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 36652d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3666e126ba97SEli Cohen } 3667e126ba97SEli Cohen 366831616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3669e126ba97SEli Cohen { 3670968e78ddSHaggai Eran u64 result; 3671e126ba97SEli Cohen 367231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3673e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3674968e78ddSHaggai Eran 3675968e78ddSHaggai Eran return cpu_to_be64(result); 3676968e78ddSHaggai Eran } 3677968e78ddSHaggai Eran 367831616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3679968e78ddSHaggai Eran { 3680968e78ddSHaggai Eran u64 result; 3681968e78ddSHaggai Eran 3682968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3683968e78ddSHaggai Eran 3684968e78ddSHaggai Eran return cpu_to_be64(result); 3685968e78ddSHaggai Eran } 3686968e78ddSHaggai Eran 368756e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 368856e11d62SNoa Osherovich { 368956e11d62SNoa Osherovich u64 result; 369056e11d62SNoa Osherovich 369156e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 369256e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 369331616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 369456e11d62SNoa Osherovich 369556e11d62SNoa Osherovich return cpu_to_be64(result); 369656e11d62SNoa Osherovich } 369756e11d62SNoa Osherovich 369831616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 369956e11d62SNoa Osherovich { 370056e11d62SNoa Osherovich u64 result; 370156e11d62SNoa Osherovich 370231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 370331616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 370456e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 370531616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 370631616255SArtemy Kovalyov 370731616255SArtemy Kovalyov if (atomic) 370831616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 370956e11d62SNoa Osherovich 371056e11d62SNoa Osherovich return cpu_to_be64(result); 371156e11d62SNoa Osherovich } 371256e11d62SNoa Osherovich 371356e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 371456e11d62SNoa Osherovich { 371556e11d62SNoa Osherovich u64 result; 371656e11d62SNoa Osherovich 371731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 371856e11d62SNoa Osherovich 371956e11d62SNoa Osherovich return cpu_to_be64(result); 372056e11d62SNoa Osherovich } 372156e11d62SNoa Osherovich 3722c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3723c8d75a98SMajd Dibbiny { 3724c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3725c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3726c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3727c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3728c8d75a98SMajd Dibbiny return -EPERM; 3729c8d75a98SMajd Dibbiny return 0; 3730c8d75a98SMajd Dibbiny } 3731c8d75a98SMajd Dibbiny 3732c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3733c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3734578e7264SMaor Gottlieb struct ib_send_wr *wr, int atomic) 3735968e78ddSHaggai Eran { 3736e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3737968e78ddSHaggai Eran 3738968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3739968e78ddSHaggai Eran 3740968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3741968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3742968e78ddSHaggai Eran else 3743968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3744968e78ddSHaggai Eran 374531616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 374631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 374731616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 374831616255SArtemy Kovalyov 374931616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 375031616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3751968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3752968e78ddSHaggai Eran } 375356e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 375456e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 375531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 375631616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 375756e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3758e126ba97SEli Cohen } 375931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 376031616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 376131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 376231616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3763e126ba97SEli Cohen 3764e126ba97SEli Cohen if (!wr->num_sge) 3765968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3766c8d75a98SMajd Dibbiny 3767c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 3768e126ba97SEli Cohen } 3769e126ba97SEli Cohen 3770e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3771e126ba97SEli Cohen { 3772e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3773e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3774e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3775e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 37762ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3777e126ba97SEli Cohen } 3778e126ba97SEli Cohen 37798a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 37808a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 37818a187ee5SSagi Grimberg u32 key, int access) 37828a187ee5SSagi Grimberg { 37838a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 37848a187ee5SSagi Grimberg 37858a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3786b005d316SSagi Grimberg 3787ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3788b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3789ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3790b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3791b005d316SSagi Grimberg ndescs *= 2; 3792b005d316SSagi Grimberg 3793b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 37948a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 37958a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 37968a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 37978a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 37988a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 37998a187ee5SSagi Grimberg } 38008a187ee5SSagi Grimberg 3801dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3802e126ba97SEli Cohen { 3803e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3804968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3805e126ba97SEli Cohen } 3806e126ba97SEli Cohen 3807e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 3808e126ba97SEli Cohen { 3809e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3810968e78ddSHaggai Eran 3811e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 381231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3813968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3814e126ba97SEli Cohen 3815968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 381656e11d62SNoa Osherovich if (umrwr->pd) 3817968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 381831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 381931616255SArtemy Kovalyov !umrwr->length) 382031616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 382131616255SArtemy Kovalyov 382231616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3823968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3824968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3825746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3826968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3827e126ba97SEli Cohen } 3828e126ba97SEli Cohen 38298a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 38308a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 38318a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 38328a187ee5SSagi Grimberg { 38338a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 38348a187ee5SSagi Grimberg 38358a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 38368a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 38378a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 38388a187ee5SSagi Grimberg } 38398a187ee5SSagi Grimberg 3840064e5262SIdan Burstein static void set_reg_umr_inline_seg(void *seg, struct mlx5_ib_qp *qp, 3841064e5262SIdan Burstein struct mlx5_ib_mr *mr, int mr_list_size) 3842064e5262SIdan Burstein { 3843064e5262SIdan Burstein void *qend = qp->sq.qend; 3844064e5262SIdan Burstein void *addr = mr->descs; 3845064e5262SIdan Burstein int copy; 3846064e5262SIdan Burstein 3847064e5262SIdan Burstein if (unlikely(seg + mr_list_size > qend)) { 3848064e5262SIdan Burstein copy = qend - seg; 3849064e5262SIdan Burstein memcpy(seg, addr, copy); 3850064e5262SIdan Burstein addr += copy; 3851064e5262SIdan Burstein mr_list_size -= copy; 3852064e5262SIdan Burstein seg = mlx5_get_send_wqe(qp, 0); 3853064e5262SIdan Burstein } 3854064e5262SIdan Burstein memcpy(seg, addr, mr_list_size); 3855064e5262SIdan Burstein seg += mr_list_size; 3856064e5262SIdan Burstein } 3857064e5262SIdan Burstein 3858e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 3859e126ba97SEli Cohen { 3860e126ba97SEli Cohen switch (wr->opcode) { 3861e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3862e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3863e126ba97SEli Cohen return wr->ex.imm_data; 3864e126ba97SEli Cohen 3865e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3866e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3867e126ba97SEli Cohen 3868e126ba97SEli Cohen default: 3869e126ba97SEli Cohen return 0; 3870e126ba97SEli Cohen } 3871e126ba97SEli Cohen } 3872e126ba97SEli Cohen 3873e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3874e126ba97SEli Cohen { 3875e126ba97SEli Cohen u8 *p = wqe; 3876e126ba97SEli Cohen u8 res = 0; 3877e126ba97SEli Cohen int i; 3878e126ba97SEli Cohen 3879e126ba97SEli Cohen for (i = 0; i < size; i++) 3880e126ba97SEli Cohen res ^= p[i]; 3881e126ba97SEli Cohen 3882e126ba97SEli Cohen return ~res; 3883e126ba97SEli Cohen } 3884e126ba97SEli Cohen 3885e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3886e126ba97SEli Cohen { 3887e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3888e126ba97SEli Cohen } 3889e126ba97SEli Cohen 3890e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 3891e126ba97SEli Cohen void *wqe, int *sz) 3892e126ba97SEli Cohen { 3893e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3894e126ba97SEli Cohen void *qend = qp->sq.qend; 3895e126ba97SEli Cohen void *addr; 3896e126ba97SEli Cohen int inl = 0; 3897e126ba97SEli Cohen int copy; 3898e126ba97SEli Cohen int len; 3899e126ba97SEli Cohen int i; 3900e126ba97SEli Cohen 3901e126ba97SEli Cohen seg = wqe; 3902e126ba97SEli Cohen wqe += sizeof(*seg); 3903e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3904e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3905e126ba97SEli Cohen len = wr->sg_list[i].length; 3906e126ba97SEli Cohen inl += len; 3907e126ba97SEli Cohen 3908e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3909e126ba97SEli Cohen return -ENOMEM; 3910e126ba97SEli Cohen 3911e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3912e126ba97SEli Cohen copy = qend - wqe; 3913e126ba97SEli Cohen memcpy(wqe, addr, copy); 3914e126ba97SEli Cohen addr += copy; 3915e126ba97SEli Cohen len -= copy; 3916e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 3917e126ba97SEli Cohen } 3918e126ba97SEli Cohen memcpy(wqe, addr, len); 3919e126ba97SEli Cohen wqe += len; 3920e126ba97SEli Cohen } 3921e126ba97SEli Cohen 3922e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 3923e126ba97SEli Cohen 3924e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 3925e126ba97SEli Cohen 3926e126ba97SEli Cohen return 0; 3927e126ba97SEli Cohen } 3928e126ba97SEli Cohen 3929e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 3930e6631814SSagi Grimberg { 3931e6631814SSagi Grimberg switch (type) { 3932e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3933e6631814SSagi Grimberg return MLX5_DIF_SIZE; 3934e6631814SSagi Grimberg default: 3935e6631814SSagi Grimberg return 0; 3936e6631814SSagi Grimberg } 3937e6631814SSagi Grimberg } 3938e6631814SSagi Grimberg 3939e6631814SSagi Grimberg static u8 bs_selector(int block_size) 3940e6631814SSagi Grimberg { 3941e6631814SSagi Grimberg switch (block_size) { 3942e6631814SSagi Grimberg case 512: return 0x1; 3943e6631814SSagi Grimberg case 520: return 0x2; 3944e6631814SSagi Grimberg case 4096: return 0x3; 3945e6631814SSagi Grimberg case 4160: return 0x4; 3946e6631814SSagi Grimberg case 1073741824: return 0x5; 3947e6631814SSagi Grimberg default: return 0; 3948e6631814SSagi Grimberg } 3949e6631814SSagi Grimberg } 3950e6631814SSagi Grimberg 395178eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 3952142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 3953e6631814SSagi Grimberg { 3954142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 3955142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 3956142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 3957142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 3958142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 3959142537f4SSagi Grimberg /* repeating block */ 3960142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 3961142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 3962142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 3963e6631814SSagi Grimberg 396478eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 396578eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 3966e6631814SSagi Grimberg 396778eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 396878eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 396978eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 397078eda2bbSSagi Grimberg else 397178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 3972e6631814SSagi Grimberg } 3973e6631814SSagi Grimberg 397478eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 397578eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 3976e6631814SSagi Grimberg } 3977e6631814SSagi Grimberg 3978e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 3979e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 3980e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 3981e6631814SSagi Grimberg { 3982e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 3983e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 3984e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 3985e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 3986e6631814SSagi Grimberg 3987c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 3988e6631814SSagi Grimberg 3989142537f4SSagi Grimberg /* Basic + Extended + Inline */ 3990142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 3991e6631814SSagi Grimberg /* Input domain check byte mask */ 3992e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 399378eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 399478eda2bbSSagi Grimberg 399578eda2bbSSagi Grimberg /* Memory domain */ 399678eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 399778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 399878eda2bbSSagi Grimberg break; 399978eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 400078eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 400178eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 400278eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 400378eda2bbSSagi Grimberg break; 400478eda2bbSSagi Grimberg default: 400578eda2bbSSagi Grimberg return -EINVAL; 400678eda2bbSSagi Grimberg } 400778eda2bbSSagi Grimberg 400878eda2bbSSagi Grimberg /* Wire domain */ 400978eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 401078eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 401178eda2bbSSagi Grimberg break; 401278eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4013e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 401478eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4015e6631814SSagi Grimberg /* Same block structure */ 4016142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4017e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4018fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4019c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4020fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4021c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4022fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4023e6631814SSagi Grimberg } else 4024e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4025e6631814SSagi Grimberg 4026142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 402778eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4028e6631814SSagi Grimberg break; 4029e6631814SSagi Grimberg default: 4030e6631814SSagi Grimberg return -EINVAL; 4031e6631814SSagi Grimberg } 4032e6631814SSagi Grimberg 4033e6631814SSagi Grimberg return 0; 4034e6631814SSagi Grimberg } 4035e6631814SSagi Grimberg 4036e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 4037e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4038e6631814SSagi Grimberg { 4039e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4040e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4041e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4042e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4043e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4044e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4045e6631814SSagi Grimberg int ret; 4046e6631814SSagi Grimberg int wqe_size; 4047e6631814SSagi Grimberg 4048e622f2f4SChristoph Hellwig if (!wr->prot || 4049e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4050e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4051e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4052e6631814SSagi Grimberg /** 4053e6631814SSagi Grimberg * Source domain doesn't contain signature information 40545c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4055e6631814SSagi Grimberg * So need construct: 4056e6631814SSagi Grimberg * ------------------ 4057e6631814SSagi Grimberg * | data_klm | 4058e6631814SSagi Grimberg * ------------------ 4059e6631814SSagi Grimberg * | BSF | 4060e6631814SSagi Grimberg * ------------------ 4061e6631814SSagi Grimberg **/ 4062e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4063e6631814SSagi Grimberg 4064e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4065e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4066e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4067e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4068e6631814SSagi Grimberg } else { 4069e6631814SSagi Grimberg /** 4070e6631814SSagi Grimberg * Source domain contains signature information 4071e6631814SSagi Grimberg * So need construct a strided block format: 4072e6631814SSagi Grimberg * --------------------------- 4073e6631814SSagi Grimberg * | stride_block_ctrl | 4074e6631814SSagi Grimberg * --------------------------- 4075e6631814SSagi Grimberg * | data_klm | 4076e6631814SSagi Grimberg * --------------------------- 4077e6631814SSagi Grimberg * | prot_klm | 4078e6631814SSagi Grimberg * --------------------------- 4079e6631814SSagi Grimberg * | BSF | 4080e6631814SSagi Grimberg * --------------------------- 4081e6631814SSagi Grimberg **/ 4082e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4083e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4084e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4085e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4086e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4087e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4088e6631814SSagi Grimberg int prot_size; 4089e6631814SSagi Grimberg 4090e6631814SSagi Grimberg sblock_ctrl = *seg; 4091e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4092e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4093e6631814SSagi Grimberg 4094e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4095e6631814SSagi Grimberg if (!prot_size) { 4096e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4097e6631814SSagi Grimberg return -EINVAL; 4098e6631814SSagi Grimberg } 4099e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4100e6631814SSagi Grimberg prot_size); 4101e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4102e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4103e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4104e6631814SSagi Grimberg 4105e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4106e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4107e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 41085c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 41095c273b16SSagi Grimberg 4110e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4111e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4112e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4113e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 41145c273b16SSagi Grimberg 4115e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4116e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4117e6631814SSagi Grimberg } 4118e6631814SSagi Grimberg 4119e6631814SSagi Grimberg *seg += wqe_size; 4120e6631814SSagi Grimberg *size += wqe_size / 16; 4121e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4122e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4123e6631814SSagi Grimberg 4124e6631814SSagi Grimberg bsf = *seg; 4125e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4126e6631814SSagi Grimberg if (ret) 4127e6631814SSagi Grimberg return -EINVAL; 4128e6631814SSagi Grimberg 4129e6631814SSagi Grimberg *seg += sizeof(*bsf); 4130e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4131e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4132e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4133e6631814SSagi Grimberg 4134e6631814SSagi Grimberg return 0; 4135e6631814SSagi Grimberg } 4136e6631814SSagi Grimberg 4137e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 413831616255SArtemy Kovalyov struct ib_sig_handover_wr *wr, u32 size, 4139e6631814SSagi Grimberg u32 length, u32 pdn) 4140e6631814SSagi Grimberg { 4141e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4142e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4143d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4144e6631814SSagi Grimberg 4145e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4146e6631814SSagi Grimberg 4147e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4148ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4149e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4150d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4151e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4152e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 415331616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4154e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4155e6631814SSagi Grimberg } 4156e6631814SSagi Grimberg 4157e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 415831616255SArtemy Kovalyov u32 size) 4159e6631814SSagi Grimberg { 4160e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4161e6631814SSagi Grimberg 4162e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 416331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4164e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4165e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4166e6631814SSagi Grimberg } 4167e6631814SSagi Grimberg 4168e6631814SSagi Grimberg 4169e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 4170e6631814SSagi Grimberg void **seg, int *size) 4171e6631814SSagi Grimberg { 4172e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4173e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4174e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 417531616255SArtemy Kovalyov u32 xlt_size; 4176e6631814SSagi Grimberg int region_len, ret; 4177e6631814SSagi Grimberg 4178e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4179e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4180d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4181d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4182e6631814SSagi Grimberg return -EINVAL; 4183e6631814SSagi Grimberg 4184e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4185e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4186e622f2f4SChristoph Hellwig if (wr->prot && 4187e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4188e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4189e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4190e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4191e6631814SSagi Grimberg 4192e6631814SSagi Grimberg /** 4193e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4194e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4195e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4196e6631814SSagi Grimberg **/ 419731616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4198e6631814SSagi Grimberg 419931616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4200e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4201e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4202e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4203e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4204e6631814SSagi Grimberg 420531616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4206e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4207e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4208e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4209e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4210e6631814SSagi Grimberg 4211e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4212e6631814SSagi Grimberg if (ret) 4213e6631814SSagi Grimberg return ret; 4214e6631814SSagi Grimberg 4215d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4216e6631814SSagi Grimberg return 0; 4217e6631814SSagi Grimberg } 4218e6631814SSagi Grimberg 4219e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4220e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4221e6631814SSagi Grimberg { 4222e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4223e6631814SSagi Grimberg 4224e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4225e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4226e6631814SSagi Grimberg switch (domain->sig_type) { 422778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 422878eda2bbSSagi Grimberg break; 4229e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4230e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4231e6631814SSagi Grimberg domain->sig.dif.app_tag); 4232e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4233e6631814SSagi Grimberg break; 4234e6631814SSagi Grimberg default: 423512bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 423612bbf1eaSLeon Romanovsky domain->sig_type); 423712bbf1eaSLeon Romanovsky return -EINVAL; 4238e6631814SSagi Grimberg } 4239e6631814SSagi Grimberg 424078eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 424178eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 424278eda2bbSSagi Grimberg 4243e6631814SSagi Grimberg return 0; 4244e6631814SSagi Grimberg } 4245e6631814SSagi Grimberg 42468a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 42478a187ee5SSagi Grimberg struct ib_reg_wr *wr, 42488a187ee5SSagi Grimberg void **seg, int *size) 42498a187ee5SSagi Grimberg { 42508a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 42518a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 4252064e5262SIdan Burstein int mr_list_size = mr->ndescs * mr->desc_size; 4253064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 42548a187ee5SSagi Grimberg 42558a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 42568a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 42578a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 42588a187ee5SSagi Grimberg return -EINVAL; 42598a187ee5SSagi Grimberg } 42608a187ee5SSagi Grimberg 4261064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 42628a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 42638a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 42648a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 42658a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 42668a187ee5SSagi Grimberg 42678a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 42688a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 42698a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 42708a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 42718a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 42728a187ee5SSagi Grimberg 4273064e5262SIdan Burstein if (umr_inline) { 4274064e5262SIdan Burstein set_reg_umr_inline_seg(*seg, qp, mr, mr_list_size); 4275064e5262SIdan Burstein *size += get_xlt_octo(mr_list_size); 4276064e5262SIdan Burstein } else { 42778a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 42788a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 42798a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4280064e5262SIdan Burstein } 42818a187ee5SSagi Grimberg return 0; 42828a187ee5SSagi Grimberg } 42838a187ee5SSagi Grimberg 4284dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4285e126ba97SEli Cohen { 4286dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4287e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4288e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4289e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4290e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4291dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4292e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4293e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4294e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4295e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4296e126ba97SEli Cohen } 4297e126ba97SEli Cohen 4298e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4299e126ba97SEli Cohen { 4300e126ba97SEli Cohen __be32 *p = NULL; 4301e126ba97SEli Cohen int tidx = idx; 4302e126ba97SEli Cohen int i, j; 4303e126ba97SEli Cohen 4304e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4305e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4306e126ba97SEli Cohen if ((i & 0xf) == 0) { 4307e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4308e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4309e126ba97SEli Cohen p = buf; 4310e126ba97SEli Cohen j = 0; 4311e126ba97SEli Cohen } 4312e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4313e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4314e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4315e126ba97SEli Cohen } 4316e126ba97SEli Cohen } 4317e126ba97SEli Cohen 43186e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 43196e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 43206a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 43216e5eadacSSagi Grimberg int *size, int nreq) 43226e5eadacSSagi Grimberg { 4323b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4324b2a232d2SLeon Romanovsky return -ENOMEM; 43256e5eadacSSagi Grimberg 43266e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 43276e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 43286e5eadacSSagi Grimberg *ctrl = *seg; 43296e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 43306e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 43316e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 43326e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 43336e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 43346e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 43356e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 43366e5eadacSSagi Grimberg 43376e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 43386e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 43396e5eadacSSagi Grimberg 4340b2a232d2SLeon Romanovsky return 0; 43416e5eadacSSagi Grimberg } 43426e5eadacSSagi Grimberg 43436e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 43446e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 43456e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 43466e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 43476e5eadacSSagi Grimberg { 43486e5eadacSSagi Grimberg u8 opmod = 0; 43496e5eadacSSagi Grimberg 43506e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 43516e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 435219098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 43536e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 43546e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 43556e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 43566e5eadacSSagi Grimberg 43576e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 43586e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 43596e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 43606e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 43616e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 43626e5eadacSSagi Grimberg } 43636e5eadacSSagi Grimberg 43646e5eadacSSagi Grimberg 4365e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 4366e126ba97SEli Cohen struct ib_send_wr **bad_wr) 4367e126ba97SEli Cohen { 4368e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4369e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 437089ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4371d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4372e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4373e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4374e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4375d16e91daSHaggai Eran struct mlx5_bf *bf; 4376e126ba97SEli Cohen int uninitialized_var(size); 4377d16e91daSHaggai Eran void *qend; 4378e126ba97SEli Cohen unsigned long flags; 4379e126ba97SEli Cohen unsigned idx; 4380e126ba97SEli Cohen int err = 0; 4381e126ba97SEli Cohen int num_sge; 4382e126ba97SEli Cohen void *seg; 4383e126ba97SEli Cohen int nreq; 4384e126ba97SEli Cohen int i; 4385e126ba97SEli Cohen u8 next_fence = 0; 4386e126ba97SEli Cohen u8 fence; 4387e126ba97SEli Cohen 4388d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4389d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4390d16e91daSHaggai Eran 4391d16e91daSHaggai Eran qp = to_mqp(ibqp); 43925fe9dec0SEli Cohen bf = &qp->bf; 4393d16e91daSHaggai Eran qend = qp->sq.qend; 4394d16e91daSHaggai Eran 4395e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4396e126ba97SEli Cohen 439789ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 439889ea94a7SMaor Gottlieb err = -EIO; 439989ea94a7SMaor Gottlieb *bad_wr = wr; 440089ea94a7SMaor Gottlieb nreq = 0; 440189ea94a7SMaor Gottlieb goto out; 440289ea94a7SMaor Gottlieb } 440389ea94a7SMaor Gottlieb 4404e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4405a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4406e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4407e126ba97SEli Cohen err = -EINVAL; 4408e126ba97SEli Cohen *bad_wr = wr; 4409e126ba97SEli Cohen goto out; 4410e126ba97SEli Cohen } 4411e126ba97SEli Cohen 4412e126ba97SEli Cohen num_sge = wr->num_sge; 4413e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4414e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 441524be409bSChuck Lever err = -EINVAL; 4416e126ba97SEli Cohen *bad_wr = wr; 4417e126ba97SEli Cohen goto out; 4418e126ba97SEli Cohen } 4419e126ba97SEli Cohen 44206e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 44216e5eadacSSagi Grimberg if (err) { 44226e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 44236e5eadacSSagi Grimberg err = -ENOMEM; 44246e5eadacSSagi Grimberg *bad_wr = wr; 44256e5eadacSSagi Grimberg goto out; 44266e5eadacSSagi Grimberg } 4427e126ba97SEli Cohen 44286e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 44296e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 44306e8484c5SMax Gurtovoy fence = dev->umr_fence; 44316e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 44326e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 44336e8484c5SMax Gurtovoy if (qp->next_fence) 44346e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 44356e8484c5SMax Gurtovoy else 44366e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 44376e8484c5SMax Gurtovoy } else { 44386e8484c5SMax Gurtovoy fence = qp->next_fence; 44396e8484c5SMax Gurtovoy } 44406e8484c5SMax Gurtovoy 4441e126ba97SEli Cohen switch (ibqp->qp_type) { 4442e126ba97SEli Cohen case IB_QPT_XRC_INI: 4443e126ba97SEli Cohen xrc = seg; 4444e126ba97SEli Cohen seg += sizeof(*xrc); 4445e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4446e126ba97SEli Cohen /* fall through */ 4447e126ba97SEli Cohen case IB_QPT_RC: 4448e126ba97SEli Cohen switch (wr->opcode) { 4449e126ba97SEli Cohen case IB_WR_RDMA_READ: 4450e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4451e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4452e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4453e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4454e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4455e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4456e126ba97SEli Cohen break; 4457e126ba97SEli Cohen 4458e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4459e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4460e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 446181bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 446281bea28fSEli Cohen err = -ENOSYS; 446381bea28fSEli Cohen *bad_wr = wr; 446481bea28fSEli Cohen goto out; 4465e126ba97SEli Cohen 4466e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4467e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4468e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4469dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4470e126ba97SEli Cohen num_sge = 0; 4471e126ba97SEli Cohen break; 4472e126ba97SEli Cohen 44738a187ee5SSagi Grimberg case IB_WR_REG_MR: 44748a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 44758a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 44768a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 44778a187ee5SSagi Grimberg if (err) { 44788a187ee5SSagi Grimberg *bad_wr = wr; 44798a187ee5SSagi Grimberg goto out; 44808a187ee5SSagi Grimberg } 44818a187ee5SSagi Grimberg num_sge = 0; 44828a187ee5SSagi Grimberg break; 44838a187ee5SSagi Grimberg 4484e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4485e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4486e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4487e6631814SSagi Grimberg 4488e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4489e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4490e6631814SSagi Grimberg if (err) { 4491e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4492e6631814SSagi Grimberg *bad_wr = wr; 4493e6631814SSagi Grimberg goto out; 4494e6631814SSagi Grimberg } 4495e6631814SSagi Grimberg 44966e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 44976e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4498e6631814SSagi Grimberg /* 4499e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4500e6631814SSagi Grimberg * on error 4501e6631814SSagi Grimberg */ 4502e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 4503e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 4504e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4505e6631814SSagi Grimberg &idx, &size, nreq); 4506e6631814SSagi Grimberg if (err) { 4507e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4508e6631814SSagi Grimberg err = -ENOMEM; 4509e6631814SSagi Grimberg *bad_wr = wr; 4510e6631814SSagi Grimberg goto out; 4511e6631814SSagi Grimberg } 4512e6631814SSagi Grimberg 4513e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4514e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4515e6631814SSagi Grimberg &size); 4516e6631814SSagi Grimberg if (err) { 4517e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4518e6631814SSagi Grimberg *bad_wr = wr; 4519e6631814SSagi Grimberg goto out; 4520e6631814SSagi Grimberg } 4521e6631814SSagi Grimberg 45226e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 45236e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 4524e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4525e6631814SSagi Grimberg &idx, &size, nreq); 4526e6631814SSagi Grimberg if (err) { 4527e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4528e6631814SSagi Grimberg err = -ENOMEM; 4529e6631814SSagi Grimberg *bad_wr = wr; 4530e6631814SSagi Grimberg goto out; 4531e6631814SSagi Grimberg } 4532e6631814SSagi Grimberg 4533e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4534e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4535e6631814SSagi Grimberg &size); 4536e6631814SSagi Grimberg if (err) { 4537e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4538e6631814SSagi Grimberg *bad_wr = wr; 4539e6631814SSagi Grimberg goto out; 4540e6631814SSagi Grimberg } 4541e6631814SSagi Grimberg 45426e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 45436e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 45446e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4545e6631814SSagi Grimberg num_sge = 0; 4546e6631814SSagi Grimberg goto skip_psv; 4547e6631814SSagi Grimberg 4548e126ba97SEli Cohen default: 4549e126ba97SEli Cohen break; 4550e126ba97SEli Cohen } 4551e126ba97SEli Cohen break; 4552e126ba97SEli Cohen 4553e126ba97SEli Cohen case IB_QPT_UC: 4554e126ba97SEli Cohen switch (wr->opcode) { 4555e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4556e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4557e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4558e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4559e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4560e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4561e126ba97SEli Cohen break; 4562e126ba97SEli Cohen 4563e126ba97SEli Cohen default: 4564e126ba97SEli Cohen break; 4565e126ba97SEli Cohen } 4566e126ba97SEli Cohen break; 4567e126ba97SEli Cohen 4568e126ba97SEli Cohen case IB_QPT_SMI: 45691e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 45701e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 45711e0e50b6SMaor Gottlieb err = -EPERM; 45721e0e50b6SMaor Gottlieb *bad_wr = wr; 45731e0e50b6SMaor Gottlieb goto out; 45741e0e50b6SMaor Gottlieb } 4575f6b1ee34SBart Van Assche /* fall through */ 4576d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4577e126ba97SEli Cohen set_datagram_seg(seg, wr); 4578e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4579e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4580e126ba97SEli Cohen if (unlikely((seg == qend))) 4581e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4582e126ba97SEli Cohen break; 4583f0313965SErez Shitrit case IB_QPT_UD: 4584f0313965SErez Shitrit set_datagram_seg(seg, wr); 4585f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4586f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4587e126ba97SEli Cohen 4588f0313965SErez Shitrit if (unlikely((seg == qend))) 4589f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4590f0313965SErez Shitrit 4591f0313965SErez Shitrit /* handle qp that supports ud offload */ 4592f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4593f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4594f0313965SErez Shitrit 4595f0313965SErez Shitrit pad = seg; 4596f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4597f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4598f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4599f0313965SErez Shitrit 4600f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4601f0313965SErez Shitrit 4602f0313965SErez Shitrit if (unlikely((seg == qend))) 4603f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4604f0313965SErez Shitrit } 4605f0313965SErez Shitrit break; 4606e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4607e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4608e126ba97SEli Cohen err = -EINVAL; 4609e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4610e126ba97SEli Cohen goto out; 4611e126ba97SEli Cohen } 4612e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4613e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4614c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4615c8d75a98SMajd Dibbiny if (unlikely(err)) 4616c8d75a98SMajd Dibbiny goto out; 4617e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4618e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4619e126ba97SEli Cohen if (unlikely((seg == qend))) 4620e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4621e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4622e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4623e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4624e126ba97SEli Cohen if (unlikely((seg == qend))) 4625e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4626e126ba97SEli Cohen break; 4627e126ba97SEli Cohen 4628e126ba97SEli Cohen default: 4629e126ba97SEli Cohen break; 4630e126ba97SEli Cohen } 4631e126ba97SEli Cohen 4632e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4633e126ba97SEli Cohen int uninitialized_var(sz); 4634e126ba97SEli Cohen 4635e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4636e126ba97SEli Cohen if (unlikely(err)) { 4637e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4638e126ba97SEli Cohen *bad_wr = wr; 4639e126ba97SEli Cohen goto out; 4640e126ba97SEli Cohen } 4641e126ba97SEli Cohen size += sz; 4642e126ba97SEli Cohen } else { 4643e126ba97SEli Cohen dpseg = seg; 4644e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4645e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4646e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4647e126ba97SEli Cohen dpseg = seg; 4648e126ba97SEli Cohen } 4649e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4650e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4651e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4652e126ba97SEli Cohen dpseg++; 4653e126ba97SEli Cohen } 4654e126ba97SEli Cohen } 4655e126ba97SEli Cohen } 4656e126ba97SEli Cohen 46576e8484c5SMax Gurtovoy qp->next_fence = next_fence; 46586e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 46596e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4660e6631814SSagi Grimberg skip_psv: 4661e126ba97SEli Cohen if (0) 4662e126ba97SEli Cohen dump_wqe(qp, idx, size); 4663e126ba97SEli Cohen } 4664e126ba97SEli Cohen 4665e126ba97SEli Cohen out: 4666e126ba97SEli Cohen if (likely(nreq)) { 4667e126ba97SEli Cohen qp->sq.head += nreq; 4668e126ba97SEli Cohen 4669e126ba97SEli Cohen /* Make sure that descriptors are written before 4670e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4671e126ba97SEli Cohen */ 4672e126ba97SEli Cohen wmb(); 4673e126ba97SEli Cohen 4674e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4675e126ba97SEli Cohen 4676ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4677ada388f7SEli Cohen * we hit doorbell */ 4678ada388f7SEli Cohen wmb(); 4679ada388f7SEli Cohen 46805fe9dec0SEli Cohen /* currently we support only regular doorbells */ 46815fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4682e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4683e126ba97SEli Cohen * and reach the HCA out of order. 4684e126ba97SEli Cohen */ 4685e126ba97SEli Cohen mmiowb(); 4686e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4687e126ba97SEli Cohen } 4688e126ba97SEli Cohen 4689e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4690e126ba97SEli Cohen 4691e126ba97SEli Cohen return err; 4692e126ba97SEli Cohen } 4693e126ba97SEli Cohen 4694e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4695e126ba97SEli Cohen { 4696e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4697e126ba97SEli Cohen } 4698e126ba97SEli Cohen 4699e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 4700e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 4701e126ba97SEli Cohen { 4702e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4703e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4704e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 470589ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 470689ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4707e126ba97SEli Cohen unsigned long flags; 4708e126ba97SEli Cohen int err = 0; 4709e126ba97SEli Cohen int nreq; 4710e126ba97SEli Cohen int ind; 4711e126ba97SEli Cohen int i; 4712e126ba97SEli Cohen 4713d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4714d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4715d16e91daSHaggai Eran 4716e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4717e126ba97SEli Cohen 471889ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 471989ea94a7SMaor Gottlieb err = -EIO; 472089ea94a7SMaor Gottlieb *bad_wr = wr; 472189ea94a7SMaor Gottlieb nreq = 0; 472289ea94a7SMaor Gottlieb goto out; 472389ea94a7SMaor Gottlieb } 472489ea94a7SMaor Gottlieb 4725e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4726e126ba97SEli Cohen 4727e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4728e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4729e126ba97SEli Cohen err = -ENOMEM; 4730e126ba97SEli Cohen *bad_wr = wr; 4731e126ba97SEli Cohen goto out; 4732e126ba97SEli Cohen } 4733e126ba97SEli Cohen 4734e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4735e126ba97SEli Cohen err = -EINVAL; 4736e126ba97SEli Cohen *bad_wr = wr; 4737e126ba97SEli Cohen goto out; 4738e126ba97SEli Cohen } 4739e126ba97SEli Cohen 4740e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4741e126ba97SEli Cohen if (qp->wq_sig) 4742e126ba97SEli Cohen scat++; 4743e126ba97SEli Cohen 4744e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4745e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4746e126ba97SEli Cohen 4747e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4748e126ba97SEli Cohen scat[i].byte_count = 0; 4749e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4750e126ba97SEli Cohen scat[i].addr = 0; 4751e126ba97SEli Cohen } 4752e126ba97SEli Cohen 4753e126ba97SEli Cohen if (qp->wq_sig) { 4754e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4755e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4756e126ba97SEli Cohen } 4757e126ba97SEli Cohen 4758e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4759e126ba97SEli Cohen 4760e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4761e126ba97SEli Cohen } 4762e126ba97SEli Cohen 4763e126ba97SEli Cohen out: 4764e126ba97SEli Cohen if (likely(nreq)) { 4765e126ba97SEli Cohen qp->rq.head += nreq; 4766e126ba97SEli Cohen 4767e126ba97SEli Cohen /* Make sure that descriptors are written before 4768e126ba97SEli Cohen * doorbell record. 4769e126ba97SEli Cohen */ 4770e126ba97SEli Cohen wmb(); 4771e126ba97SEli Cohen 4772e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4773e126ba97SEli Cohen } 4774e126ba97SEli Cohen 4775e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4776e126ba97SEli Cohen 4777e126ba97SEli Cohen return err; 4778e126ba97SEli Cohen } 4779e126ba97SEli Cohen 4780e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4781e126ba97SEli Cohen { 4782e126ba97SEli Cohen switch (mlx5_state) { 4783e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4784e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4785e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4786e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4787e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4788e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4789e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4790e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4791e126ba97SEli Cohen default: return -1; 4792e126ba97SEli Cohen } 4793e126ba97SEli Cohen } 4794e126ba97SEli Cohen 4795e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4796e126ba97SEli Cohen { 4797e126ba97SEli Cohen switch (mlx5_mig_state) { 4798e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4799e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4800e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4801e126ba97SEli Cohen default: return -1; 4802e126ba97SEli Cohen } 4803e126ba97SEli Cohen } 4804e126ba97SEli Cohen 4805e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4806e126ba97SEli Cohen { 4807e126ba97SEli Cohen int ib_flags = 0; 4808e126ba97SEli Cohen 4809e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4810e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4811e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4812e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4813e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4814e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4815e126ba97SEli Cohen 4816e126ba97SEli Cohen return ib_flags; 4817e126ba97SEli Cohen } 4818e126ba97SEli Cohen 481938349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4820d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4821e126ba97SEli Cohen struct mlx5_qp_path *path) 4822e126ba97SEli Cohen { 4823e126ba97SEli Cohen 4824d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4825e126ba97SEli Cohen 4826e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 4827e126ba97SEli Cohen return; 4828e126ba97SEli Cohen 4829ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4830ae59c3f0SLeon Romanovsky 4831d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4832d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4833e126ba97SEli Cohen 4834d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4835d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4836d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4837d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4838d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4839d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4840d8966fcdSDasaratharaman Chandramouli 4841d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4842d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4843d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4844d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4845d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4846d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4847e126ba97SEli Cohen } 4848e126ba97SEli Cohen } 4849e126ba97SEli Cohen 48506d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 48516d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 48526d2f89dfSmajd@mellanox.com u8 *sq_state) 4853e126ba97SEli Cohen { 48546d2f89dfSmajd@mellanox.com int err; 48556d2f89dfSmajd@mellanox.com 485628160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 48576d2f89dfSmajd@mellanox.com if (err) 48586d2f89dfSmajd@mellanox.com goto out; 48596d2f89dfSmajd@mellanox.com sq->state = *sq_state; 48606d2f89dfSmajd@mellanox.com 48616d2f89dfSmajd@mellanox.com out: 48626d2f89dfSmajd@mellanox.com return err; 48636d2f89dfSmajd@mellanox.com } 48646d2f89dfSmajd@mellanox.com 48656d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 48666d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 48676d2f89dfSmajd@mellanox.com u8 *rq_state) 48686d2f89dfSmajd@mellanox.com { 48696d2f89dfSmajd@mellanox.com void *out; 48706d2f89dfSmajd@mellanox.com void *rqc; 48716d2f89dfSmajd@mellanox.com int inlen; 48726d2f89dfSmajd@mellanox.com int err; 48736d2f89dfSmajd@mellanox.com 48746d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 48751b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 48766d2f89dfSmajd@mellanox.com if (!out) 48776d2f89dfSmajd@mellanox.com return -ENOMEM; 48786d2f89dfSmajd@mellanox.com 48796d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 48806d2f89dfSmajd@mellanox.com if (err) 48816d2f89dfSmajd@mellanox.com goto out; 48826d2f89dfSmajd@mellanox.com 48836d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 48846d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 48856d2f89dfSmajd@mellanox.com rq->state = *rq_state; 48866d2f89dfSmajd@mellanox.com 48876d2f89dfSmajd@mellanox.com out: 48886d2f89dfSmajd@mellanox.com kvfree(out); 48896d2f89dfSmajd@mellanox.com return err; 48906d2f89dfSmajd@mellanox.com } 48916d2f89dfSmajd@mellanox.com 48926d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 48936d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 48946d2f89dfSmajd@mellanox.com { 48956d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 48966d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 48976d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 48986d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 48996d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 49006d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 49016d2f89dfSmajd@mellanox.com }, 49026d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 49036d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 49046d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 49056d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 49066d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 49076d2f89dfSmajd@mellanox.com }, 49086d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 49096d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 49106d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 49116d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 49126d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 49136d2f89dfSmajd@mellanox.com }, 49146d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 49156d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 49166d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 49176d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 49186d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 49196d2f89dfSmajd@mellanox.com }, 49206d2f89dfSmajd@mellanox.com }; 49216d2f89dfSmajd@mellanox.com 49226d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 49236d2f89dfSmajd@mellanox.com 49246d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 49256d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 49266d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 49276d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 49286d2f89dfSmajd@mellanox.com return -EINVAL; 49296d2f89dfSmajd@mellanox.com } 49306d2f89dfSmajd@mellanox.com 49316d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 49326d2f89dfSmajd@mellanox.com *qp_state = qp->state; 49336d2f89dfSmajd@mellanox.com 49346d2f89dfSmajd@mellanox.com return 0; 49356d2f89dfSmajd@mellanox.com } 49366d2f89dfSmajd@mellanox.com 49376d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 49386d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 49396d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 49406d2f89dfSmajd@mellanox.com { 49416d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 49426d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 49436d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 49446d2f89dfSmajd@mellanox.com int err; 49456d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 49466d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 49476d2f89dfSmajd@mellanox.com 49486d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 49496d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 49506d2f89dfSmajd@mellanox.com if (err) 49516d2f89dfSmajd@mellanox.com return err; 49526d2f89dfSmajd@mellanox.com } 49536d2f89dfSmajd@mellanox.com 49546d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 49556d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 49566d2f89dfSmajd@mellanox.com if (err) 49576d2f89dfSmajd@mellanox.com return err; 49586d2f89dfSmajd@mellanox.com } 49596d2f89dfSmajd@mellanox.com 49606d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 49616d2f89dfSmajd@mellanox.com raw_packet_qp_state); 49626d2f89dfSmajd@mellanox.com } 49636d2f89dfSmajd@mellanox.com 49646d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 49656d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 49666d2f89dfSmajd@mellanox.com { 496709a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 4968e126ba97SEli Cohen struct mlx5_qp_context *context; 4969e126ba97SEli Cohen int mlx5_state; 497009a7d9ecSSaeed Mahameed u32 *outb; 4971e126ba97SEli Cohen int err = 0; 4972e126ba97SEli Cohen 497309a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 49746d2f89dfSmajd@mellanox.com if (!outb) 49756d2f89dfSmajd@mellanox.com return -ENOMEM; 49766d2f89dfSmajd@mellanox.com 497719098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 497809a7d9ecSSaeed Mahameed outlen); 4979e126ba97SEli Cohen if (err) 49806d2f89dfSmajd@mellanox.com goto out; 4981e126ba97SEli Cohen 498209a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 498309a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 498409a7d9ecSSaeed Mahameed 4985e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 4986e126ba97SEli Cohen 4987e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 4988e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 4989e126ba97SEli Cohen qp_attr->path_mig_state = 4990e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 4991e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 4992e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 4993e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 4994e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 4995e126ba97SEli Cohen qp_attr->qp_access_flags = 4996e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 4997e126ba97SEli Cohen 4998e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 499938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 500038349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5001d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5002d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5003d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5004d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5005e126ba97SEli Cohen } 5006e126ba97SEli Cohen 5007d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5008e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5009e126ba97SEli Cohen 5010e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5011e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5012e126ba97SEli Cohen 5013e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5014e126ba97SEli Cohen 5015e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5016e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5017e126ba97SEli Cohen qp_attr->min_rnr_timer = 5018e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5019e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5020e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5021e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5022e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 50236d2f89dfSmajd@mellanox.com 50246d2f89dfSmajd@mellanox.com out: 50256d2f89dfSmajd@mellanox.com kfree(outb); 50266d2f89dfSmajd@mellanox.com return err; 50276d2f89dfSmajd@mellanox.com } 50286d2f89dfSmajd@mellanox.com 5029776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5030776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5031776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5032776a3906SMoni Shoua { 5033776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5034776a3906SMoni Shoua u32 *out; 5035776a3906SMoni Shoua u32 access_flags = 0; 5036776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5037776a3906SMoni Shoua void *dctc; 5038776a3906SMoni Shoua int err; 5039776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5040776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5041776a3906SMoni Shoua IB_QP_PORT | 5042776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5043776a3906SMoni Shoua IB_QP_AV | 5044776a3906SMoni Shoua IB_QP_PATH_MTU | 5045776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5046776a3906SMoni Shoua 5047776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5048776a3906SMoni Shoua return -EINVAL; 5049776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5050776a3906SMoni Shoua return -EINVAL; 5051776a3906SMoni Shoua 5052776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5053776a3906SMoni Shoua if (!out) 5054776a3906SMoni Shoua return -ENOMEM; 5055776a3906SMoni Shoua 5056776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5057776a3906SMoni Shoua if (err) 5058776a3906SMoni Shoua goto out; 5059776a3906SMoni Shoua 5060776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5061776a3906SMoni Shoua 5062776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5063776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5064776a3906SMoni Shoua 5065776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5066776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5067776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5068776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5069776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5070776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5071776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5072776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5073776a3906SMoni Shoua } 5074776a3906SMoni Shoua 5075776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5076776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5077776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5078776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5079776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5080776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5081776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5082776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5083776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5084776a3906SMoni Shoua } 5085776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5086776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5087776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5088776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5089776a3906SMoni Shoua out: 5090776a3906SMoni Shoua kfree(out); 5091776a3906SMoni Shoua return err; 5092776a3906SMoni Shoua } 5093776a3906SMoni Shoua 50946d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 50956d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 50966d2f89dfSmajd@mellanox.com { 50976d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 50986d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 50996d2f89dfSmajd@mellanox.com int err = 0; 51006d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 51016d2f89dfSmajd@mellanox.com 510228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 510328d61370SYishai Hadas return -ENOSYS; 510428d61370SYishai Hadas 5105d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5106d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5107d16e91daSHaggai Eran qp_init_attr); 5108d16e91daSHaggai Eran 5109c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5110c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5111c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5112c2e53b2cSYishai Hadas 5113776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5114776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5115776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5116776a3906SMoni Shoua 51176d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 51186d2f89dfSmajd@mellanox.com 5119c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5120c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 51216d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 51226d2f89dfSmajd@mellanox.com if (err) 51236d2f89dfSmajd@mellanox.com goto out; 51246d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 51256d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 51266d2f89dfSmajd@mellanox.com } else { 51276d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 51286d2f89dfSmajd@mellanox.com if (err) 51296d2f89dfSmajd@mellanox.com goto out; 51306d2f89dfSmajd@mellanox.com } 51316d2f89dfSmajd@mellanox.com 51326d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5133e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5134e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5135e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5136e126ba97SEli Cohen 5137e126ba97SEli Cohen if (!ibqp->uobject) { 51380540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5139e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 51400540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5141e126ba97SEli Cohen } else { 5142e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5143e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5144e126ba97SEli Cohen } 5145e126ba97SEli Cohen 51460540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 51470540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 51480540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 51490540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 51500540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5151e126ba97SEli Cohen 5152e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5153e126ba97SEli Cohen 5154e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5155e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5156e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5157e126ba97SEli Cohen 5158051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5159051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5160051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5161051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5162051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5163051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5164b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5165b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5166051f2630SLeon Romanovsky 5167e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5168e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5169e126ba97SEli Cohen 5170e126ba97SEli Cohen out: 5171e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5172e126ba97SEli Cohen return err; 5173e126ba97SEli Cohen } 5174e126ba97SEli Cohen 5175e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5176e126ba97SEli Cohen struct ib_ucontext *context, 5177e126ba97SEli Cohen struct ib_udata *udata) 5178e126ba97SEli Cohen { 5179e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5180e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5181e126ba97SEli Cohen int err; 5182e126ba97SEli Cohen 5183938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5184e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5185e126ba97SEli Cohen 5186e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5187e126ba97SEli Cohen if (!xrcd) 5188e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5189e126ba97SEli Cohen 51909603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 5191e126ba97SEli Cohen if (err) { 5192e126ba97SEli Cohen kfree(xrcd); 5193e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5194e126ba97SEli Cohen } 5195e126ba97SEli Cohen 5196e126ba97SEli Cohen return &xrcd->ibxrcd; 5197e126ba97SEli Cohen } 5198e126ba97SEli Cohen 5199e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5200e126ba97SEli Cohen { 5201e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5202e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5203e126ba97SEli Cohen int err; 5204e126ba97SEli Cohen 52059603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 5206b081808aSLeon Romanovsky if (err) 5207e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5208e126ba97SEli Cohen 5209e126ba97SEli Cohen kfree(xrcd); 5210e126ba97SEli Cohen return 0; 5211e126ba97SEli Cohen } 521279b20a6cSYishai Hadas 5213350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5214350d0e4cSYishai Hadas { 5215350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5216350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5217350d0e4cSYishai Hadas struct ib_event event; 5218350d0e4cSYishai Hadas 5219350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5220350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5221350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5222350d0e4cSYishai Hadas switch (type) { 5223350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5224350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5225350d0e4cSYishai Hadas break; 5226350d0e4cSYishai Hadas default: 5227350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5228350d0e4cSYishai Hadas return; 5229350d0e4cSYishai Hadas } 5230350d0e4cSYishai Hadas 5231350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5232350d0e4cSYishai Hadas } 5233350d0e4cSYishai Hadas } 5234350d0e4cSYishai Hadas 523503404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 523603404e8aSMaor Gottlieb { 523703404e8aSMaor Gottlieb int err = 0; 523803404e8aSMaor Gottlieb 523903404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 524003404e8aSMaor Gottlieb if (dev->delay_drop.activate) 524103404e8aSMaor Gottlieb goto out; 524203404e8aSMaor Gottlieb 524303404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 524403404e8aSMaor Gottlieb if (err) 524503404e8aSMaor Gottlieb goto out; 524603404e8aSMaor Gottlieb 524703404e8aSMaor Gottlieb dev->delay_drop.activate = true; 524803404e8aSMaor Gottlieb out: 524903404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5250fe248c3aSMaor Gottlieb 5251fe248c3aSMaor Gottlieb if (!err) 5252fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 525303404e8aSMaor Gottlieb return err; 525403404e8aSMaor Gottlieb } 525503404e8aSMaor Gottlieb 525679b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 525779b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 525879b20a6cSYishai Hadas { 525979b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 52604be6da1eSNoa Osherovich int has_net_offloads; 526179b20a6cSYishai Hadas __be64 *rq_pas0; 526279b20a6cSYishai Hadas void *in; 526379b20a6cSYishai Hadas void *rqc; 526479b20a6cSYishai Hadas void *wq; 526579b20a6cSYishai Hadas int inlen; 526679b20a6cSYishai Hadas int err; 526779b20a6cSYishai Hadas 526879b20a6cSYishai Hadas dev = to_mdev(pd->device); 526979b20a6cSYishai Hadas 527079b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 52711b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 527279b20a6cSYishai Hadas if (!in) 527379b20a6cSYishai Hadas return -ENOMEM; 527479b20a6cSYishai Hadas 527579b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 527679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 527779b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 527879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 527979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 528079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 528179b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 528279b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5283ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5284ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5285ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5286b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5287b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5288b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5289b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5290b1383aa6SNoa Osherovich goto out; 5291b1383aa6SNoa Osherovich } else { 529279b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5293b1383aa6SNoa Osherovich } 5294b1383aa6SNoa Osherovich } 529579b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5296ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5297ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5298ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5299ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5300ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5301ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5302ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5303ccc87087SNoa Osherovich } 530479b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 530579b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 530679b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 530779b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 530879b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 530979b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 53104be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5311b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 53124be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5313b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5314b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5315b1f74a84SNoa Osherovich goto out; 5316b1f74a84SNoa Osherovich } 5317b1f74a84SNoa Osherovich } else { 5318b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5319b1f74a84SNoa Osherovich } 53204be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 53214be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 53224be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 53234be6da1eSNoa Osherovich err = -EOPNOTSUPP; 53244be6da1eSNoa Osherovich goto out; 53254be6da1eSNoa Osherovich } 53264be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 53274be6da1eSNoa Osherovich } 532803404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 532903404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 533003404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 533103404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 533203404e8aSMaor Gottlieb err = -EOPNOTSUPP; 533303404e8aSMaor Gottlieb goto out; 533403404e8aSMaor Gottlieb } 533503404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 533603404e8aSMaor Gottlieb } 533779b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 533879b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5339350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 534003404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 534103404e8aSMaor Gottlieb err = set_delay_drop(dev); 534203404e8aSMaor Gottlieb if (err) { 534303404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 534403404e8aSMaor Gottlieb err); 534503404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 534603404e8aSMaor Gottlieb } else { 534703404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 534803404e8aSMaor Gottlieb } 534903404e8aSMaor Gottlieb } 5350b1f74a84SNoa Osherovich out: 535179b20a6cSYishai Hadas kvfree(in); 535279b20a6cSYishai Hadas return err; 535379b20a6cSYishai Hadas } 535479b20a6cSYishai Hadas 535579b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 535679b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 535779b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 535879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 535979b20a6cSYishai Hadas { 536079b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 536179b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 536279b20a6cSYishai Hadas return -EINVAL; 536379b20a6cSYishai Hadas 536479b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 536579b20a6cSYishai Hadas return -EINVAL; 536679b20a6cSYishai Hadas 536779b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 536879b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 536979b20a6cSYishai Hadas rwq->buf_size = (rwq->wqe_count << rwq->wqe_shift); 537079b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 537179b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 537279b20a6cSYishai Hadas return 0; 537379b20a6cSYishai Hadas } 537479b20a6cSYishai Hadas 537579b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 537679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 537779b20a6cSYishai Hadas struct ib_udata *udata, 537879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 537979b20a6cSYishai Hadas { 538079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 538179b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 538279b20a6cSYishai Hadas int err; 538379b20a6cSYishai Hadas size_t required_cmd_sz; 538479b20a6cSYishai Hadas 5385ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5386ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 538779b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 538879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 538979b20a6cSYishai Hadas return -EINVAL; 539079b20a6cSYishai Hadas } 539179b20a6cSYishai Hadas 539279b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 539379b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 539479b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 539579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 539679b20a6cSYishai Hadas return -EOPNOTSUPP; 539779b20a6cSYishai Hadas } 539879b20a6cSYishai Hadas 539979b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 540079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 540179b20a6cSYishai Hadas return -EFAULT; 540279b20a6cSYishai Hadas } 540379b20a6cSYishai Hadas 5404ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 540579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 540679b20a6cSYishai Hadas return -EOPNOTSUPP; 5407ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5408ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5409ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 541079b20a6cSYishai Hadas return -EOPNOTSUPP; 541179b20a6cSYishai Hadas } 5412ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5413ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5414ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5415ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5416ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5417ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5418ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5419ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5420ccc87087SNoa Osherovich return -EINVAL; 5421ccc87087SNoa Osherovich } 5422ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5423ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5424ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5425ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5426ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5427ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5428ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5429ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5430ccc87087SNoa Osherovich return -EINVAL; 5431ccc87087SNoa Osherovich } 5432ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5433ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5434ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5435ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5436ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5437ccc87087SNoa Osherovich } 543879b20a6cSYishai Hadas 543979b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 544079b20a6cSYishai Hadas if (err) { 544179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 544279b20a6cSYishai Hadas return err; 544379b20a6cSYishai Hadas } 544479b20a6cSYishai Hadas 544579b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 544679b20a6cSYishai Hadas if (err) { 544779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 544879b20a6cSYishai Hadas if (err) 544979b20a6cSYishai Hadas return err; 545079b20a6cSYishai Hadas } 545179b20a6cSYishai Hadas 545279b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 545379b20a6cSYishai Hadas return 0; 545479b20a6cSYishai Hadas } 545579b20a6cSYishai Hadas 545679b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 545779b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 545879b20a6cSYishai Hadas struct ib_udata *udata) 545979b20a6cSYishai Hadas { 546079b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 546179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 546279b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 546379b20a6cSYishai Hadas size_t min_resp_len; 546479b20a6cSYishai Hadas int err; 546579b20a6cSYishai Hadas 546679b20a6cSYishai Hadas if (!udata) 546779b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 546879b20a6cSYishai Hadas 546979b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 547079b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 547179b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 547279b20a6cSYishai Hadas 547379b20a6cSYishai Hadas dev = to_mdev(pd->device); 547479b20a6cSYishai Hadas switch (init_attr->wq_type) { 547579b20a6cSYishai Hadas case IB_WQT_RQ: 547679b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 547779b20a6cSYishai Hadas if (!rwq) 547879b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 547979b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 548079b20a6cSYishai Hadas if (err) 548179b20a6cSYishai Hadas goto err; 548279b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 548379b20a6cSYishai Hadas if (err) 548479b20a6cSYishai Hadas goto err_user_rq; 548579b20a6cSYishai Hadas break; 548679b20a6cSYishai Hadas default: 548779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 548879b20a6cSYishai Hadas init_attr->wq_type); 548979b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 549079b20a6cSYishai Hadas } 549179b20a6cSYishai Hadas 5492350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 549379b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 549479b20a6cSYishai Hadas if (udata->outlen) { 549579b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 549679b20a6cSYishai Hadas sizeof(resp.response_length); 549779b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 549879b20a6cSYishai Hadas if (err) 549979b20a6cSYishai Hadas goto err_copy; 550079b20a6cSYishai Hadas } 550179b20a6cSYishai Hadas 5502350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5503350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 550479b20a6cSYishai Hadas return &rwq->ibwq; 550579b20a6cSYishai Hadas 550679b20a6cSYishai Hadas err_copy: 5507350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 550879b20a6cSYishai Hadas err_user_rq: 5509fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 551079b20a6cSYishai Hadas err: 551179b20a6cSYishai Hadas kfree(rwq); 551279b20a6cSYishai Hadas return ERR_PTR(err); 551379b20a6cSYishai Hadas } 551479b20a6cSYishai Hadas 551579b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 551679b20a6cSYishai Hadas { 551779b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 551879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 551979b20a6cSYishai Hadas 5520350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5521fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 552279b20a6cSYishai Hadas kfree(rwq); 552379b20a6cSYishai Hadas 552479b20a6cSYishai Hadas return 0; 552579b20a6cSYishai Hadas } 552679b20a6cSYishai Hadas 5527c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5528c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5529c5f90929SYishai Hadas struct ib_udata *udata) 5530c5f90929SYishai Hadas { 5531c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5532c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5533c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5534c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5535c5f90929SYishai Hadas size_t min_resp_len; 5536c5f90929SYishai Hadas int inlen; 5537c5f90929SYishai Hadas int err; 5538c5f90929SYishai Hadas int i; 5539c5f90929SYishai Hadas u32 *in; 5540c5f90929SYishai Hadas void *rqtc; 5541c5f90929SYishai Hadas 5542c5f90929SYishai Hadas if (udata->inlen > 0 && 5543c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5544c5f90929SYishai Hadas udata->inlen)) 5545c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5546c5f90929SYishai Hadas 5547efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5548efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5549efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5550efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5551efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5552efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5553efd7f400SMaor Gottlieb } 5554efd7f400SMaor Gottlieb 5555c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5556c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5557c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5558c5f90929SYishai Hadas 5559c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5560c5f90929SYishai Hadas if (!rwq_ind_tbl) 5561c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5562c5f90929SYishai Hadas 5563c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 55641b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5565c5f90929SYishai Hadas if (!in) { 5566c5f90929SYishai Hadas err = -ENOMEM; 5567c5f90929SYishai Hadas goto err; 5568c5f90929SYishai Hadas } 5569c5f90929SYishai Hadas 5570c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5571c5f90929SYishai Hadas 5572c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5573c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5574c5f90929SYishai Hadas 5575c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5576c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5577c5f90929SYishai Hadas 5578c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5579c5f90929SYishai Hadas kvfree(in); 5580c5f90929SYishai Hadas 5581c5f90929SYishai Hadas if (err) 5582c5f90929SYishai Hadas goto err; 5583c5f90929SYishai Hadas 5584c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5585c5f90929SYishai Hadas if (udata->outlen) { 5586c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5587c5f90929SYishai Hadas sizeof(resp.response_length); 5588c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5589c5f90929SYishai Hadas if (err) 5590c5f90929SYishai Hadas goto err_copy; 5591c5f90929SYishai Hadas } 5592c5f90929SYishai Hadas 5593c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5594c5f90929SYishai Hadas 5595c5f90929SYishai Hadas err_copy: 5596c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5597c5f90929SYishai Hadas err: 5598c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5599c5f90929SYishai Hadas return ERR_PTR(err); 5600c5f90929SYishai Hadas } 5601c5f90929SYishai Hadas 5602c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5603c5f90929SYishai Hadas { 5604c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5605c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5606c5f90929SYishai Hadas 5607c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5608c5f90929SYishai Hadas 5609c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5610c5f90929SYishai Hadas return 0; 5611c5f90929SYishai Hadas } 5612c5f90929SYishai Hadas 561379b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 561479b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 561579b20a6cSYishai Hadas { 561679b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 561779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 561879b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 561979b20a6cSYishai Hadas size_t required_cmd_sz; 562079b20a6cSYishai Hadas int curr_wq_state; 562179b20a6cSYishai Hadas int wq_state; 562279b20a6cSYishai Hadas int inlen; 562379b20a6cSYishai Hadas int err; 562479b20a6cSYishai Hadas void *rqc; 562579b20a6cSYishai Hadas void *in; 562679b20a6cSYishai Hadas 562779b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 562879b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 562979b20a6cSYishai Hadas return -EINVAL; 563079b20a6cSYishai Hadas 563179b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 563279b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 563379b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 563479b20a6cSYishai Hadas return -EOPNOTSUPP; 563579b20a6cSYishai Hadas 563679b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 563779b20a6cSYishai Hadas return -EFAULT; 563879b20a6cSYishai Hadas 563979b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 564079b20a6cSYishai Hadas return -EOPNOTSUPP; 564179b20a6cSYishai Hadas 564279b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 56431b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 564479b20a6cSYishai Hadas if (!in) 564579b20a6cSYishai Hadas return -ENOMEM; 564679b20a6cSYishai Hadas 564779b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 564879b20a6cSYishai Hadas 564979b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 565079b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 565179b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 565279b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 565379b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 565479b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 565579b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 565679b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 565779b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 565879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 565979b20a6cSYishai Hadas 5660b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5661b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5662b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5663b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5664b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5665b1f74a84SNoa Osherovich "supported\n"); 5666b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5667b1f74a84SNoa Osherovich goto out; 5668b1f74a84SNoa Osherovich } 5669b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5670b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5671b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5672b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5673b1f74a84SNoa Osherovich } 5674b1383aa6SNoa Osherovich 5675b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5676b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5677b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5678b1383aa6SNoa Osherovich goto out; 5679b1383aa6SNoa Osherovich } 5680b1f74a84SNoa Osherovich } 5681b1f74a84SNoa Osherovich 568223a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 568323a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 568423a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 568523a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5686e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5687e1f24a79SParav Pandit dev->port->cnts.set_id); 568823a6964eSMajd Dibbiny } else 568923a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 569023a6964eSMajd Dibbiny dev->ib_dev.name); 569123a6964eSMajd Dibbiny } 569223a6964eSMajd Dibbiny 5693350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 569479b20a6cSYishai Hadas if (!err) 569579b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 569679b20a6cSYishai Hadas 5697b1f74a84SNoa Osherovich out: 5698b1f74a84SNoa Osherovich kvfree(in); 569979b20a6cSYishai Hadas return err; 570079b20a6cSYishai Hadas } 5701