1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39e126ba97SEli Cohen 40e126ba97SEli Cohen /* not supported currently */ 41e126ba97SEli Cohen static int wq_signature; 42e126ba97SEli Cohen 43e126ba97SEli Cohen enum { 44e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 45e126ba97SEli Cohen }; 46e126ba97SEli Cohen 47e126ba97SEli Cohen enum { 48e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 49e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 50e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 52e126ba97SEli Cohen }; 53e126ba97SEli Cohen 54e126ba97SEli Cohen enum { 55e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 56e126ba97SEli Cohen }; 57e126ba97SEli Cohen 58e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 59e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 60f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 61e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 62e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 63e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 64e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 65e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 66e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 67e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 68e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 698a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 70e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 71e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 72e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen }; 74e126ba97SEli Cohen 75f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 76f0313965SErez Shitrit u8 rsvd0[16]; 77f0313965SErez Shitrit }; 78e126ba97SEli Cohen 79eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 80eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 817d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 82eb49ab0cSAlex Vesker }; 83eb49ab0cSAlex Vesker 840680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 850680efa2SAlex Vesker u16 operation; 86eb49ab0cSAlex Vesker 87eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 887d29f349SBodong Wang u32 rate_limit; 89eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 900680efa2SAlex Vesker }; 910680efa2SAlex Vesker 9289ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9389ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9489ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 9589ea94a7SMaor Gottlieb 96e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 97e126ba97SEli Cohen { 98e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 99e126ba97SEli Cohen } 100e126ba97SEli Cohen 101e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 112e126ba97SEli Cohen { 113e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 114e126ba97SEli Cohen } 115e126ba97SEli Cohen 116e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 117e126ba97SEli Cohen { 118e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 119e126ba97SEli Cohen } 120e126ba97SEli Cohen 121c1395a2aSHaggai Eran /** 122c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 123c1395a2aSHaggai Eran * 124c1395a2aSHaggai Eran * @qp: QP to copy from. 125c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 126c1395a2aSHaggai Eran * otherwise. 127c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 128c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 129c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 130c1395a2aSHaggai Eran * element in the queue. 131c1395a2aSHaggai Eran * @buffer: destination buffer. 132c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 133c1395a2aSHaggai Eran * 134c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 135c1395a2aSHaggai Eran * 136c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 137c1395a2aSHaggai Eran */ 138c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 13919098df2Smajd@mellanox.com void *buffer, u32 length, 14019098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 141c1395a2aSHaggai Eran { 142c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 143c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 144c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 145c1395a2aSHaggai Eran size_t offset; 146c1395a2aSHaggai Eran size_t wq_end; 14719098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 148c1395a2aSHaggai Eran u32 first_copy_length; 149c1395a2aSHaggai Eran int wqe_length; 150c1395a2aSHaggai Eran int ret; 151c1395a2aSHaggai Eran 152c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 153c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 154c1395a2aSHaggai Eran qp->ibqp.qp_type); 155c1395a2aSHaggai Eran return -EINVAL; 156c1395a2aSHaggai Eran } 157c1395a2aSHaggai Eran 158c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 159c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 160c1395a2aSHaggai Eran 161c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 162c1395a2aSHaggai Eran return -EINVAL; 163c1395a2aSHaggai Eran 164c1395a2aSHaggai Eran if (offset > umem->length || 165c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 166c1395a2aSHaggai Eran return -EINVAL; 167c1395a2aSHaggai Eran 168c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 169c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 170c1395a2aSHaggai Eran if (ret) 171c1395a2aSHaggai Eran return ret; 172c1395a2aSHaggai Eran 173c1395a2aSHaggai Eran if (send) { 174c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 175c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 176c1395a2aSHaggai Eran 177c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 178c1395a2aSHaggai Eran } else { 179c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 180c1395a2aSHaggai Eran } 181c1395a2aSHaggai Eran 182c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 183c1395a2aSHaggai Eran return first_copy_length; 184c1395a2aSHaggai Eran 185c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 186c1395a2aSHaggai Eran wqe_length - first_copy_length); 187c1395a2aSHaggai Eran if (ret) 188c1395a2aSHaggai Eran return ret; 189c1395a2aSHaggai Eran 190c1395a2aSHaggai Eran return wqe_length; 191c1395a2aSHaggai Eran } 192c1395a2aSHaggai Eran 193e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 194e126ba97SEli Cohen { 195e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 196e126ba97SEli Cohen struct ib_event event; 197e126ba97SEli Cohen 19819098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 19919098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20019098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20119098df2Smajd@mellanox.com } 202e126ba97SEli Cohen 203e126ba97SEli Cohen if (ibqp->event_handler) { 204e126ba97SEli Cohen event.device = ibqp->device; 205e126ba97SEli Cohen event.element.qp = ibqp; 206e126ba97SEli Cohen switch (type) { 207e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 208e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 209e126ba97SEli Cohen break; 210e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 211e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 212e126ba97SEli Cohen break; 213e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 214e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 215e126ba97SEli Cohen break; 216e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 217e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 218e126ba97SEli Cohen break; 219e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 220e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 221e126ba97SEli Cohen break; 222e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 223e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 224e126ba97SEli Cohen break; 225e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 226e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 227e126ba97SEli Cohen break; 228e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 229e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 230e126ba97SEli Cohen break; 231e126ba97SEli Cohen default: 232e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 233e126ba97SEli Cohen return; 234e126ba97SEli Cohen } 235e126ba97SEli Cohen 236e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 237e126ba97SEli Cohen } 238e126ba97SEli Cohen } 239e126ba97SEli Cohen 240e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 241e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 242e126ba97SEli Cohen { 243e126ba97SEli Cohen int wqe_size; 244e126ba97SEli Cohen int wq_size; 245e126ba97SEli Cohen 246e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 247938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 248e126ba97SEli Cohen return -EINVAL; 249e126ba97SEli Cohen 250e126ba97SEli Cohen if (!has_rq) { 251e126ba97SEli Cohen qp->rq.max_gs = 0; 252e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 253e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2540540d814SNoa Osherovich cap->max_recv_wr = 0; 2550540d814SNoa Osherovich cap->max_recv_sge = 0; 256e126ba97SEli Cohen } else { 257e126ba97SEli Cohen if (ucmd) { 258e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 259e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 260e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 261e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 262e126ba97SEli Cohen } else { 263e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 264e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 265e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 266e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 267e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 268e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 269938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 270e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 271e126ba97SEli Cohen wqe_size, 272938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 273938fe83cSSaeed Mahameed max_wqe_sz_rq)); 274e126ba97SEli Cohen return -EINVAL; 275e126ba97SEli Cohen } 276e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 277e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 278e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 279e126ba97SEli Cohen } 280e126ba97SEli Cohen } 281e126ba97SEli Cohen 282e126ba97SEli Cohen return 0; 283e126ba97SEli Cohen } 284e126ba97SEli Cohen 285f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 286e126ba97SEli Cohen { 287618af384SAndi Shyti int size = 0; 288e126ba97SEli Cohen 289f0313965SErez Shitrit switch (attr->qp_type) { 290e126ba97SEli Cohen case IB_QPT_XRC_INI: 291b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 292e126ba97SEli Cohen /* fall through */ 293e126ba97SEli Cohen case IB_QPT_RC: 294e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 29575c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 29675c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 29775c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 29875c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 299e126ba97SEli Cohen break; 300e126ba97SEli Cohen 301b125a54bSEli Cohen case IB_QPT_XRC_TGT: 302b125a54bSEli Cohen return 0; 303b125a54bSEli Cohen 304e126ba97SEli Cohen case IB_QPT_UC: 305b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30675c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3079e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 30875c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 309e126ba97SEli Cohen break; 310e126ba97SEli Cohen 311e126ba97SEli Cohen case IB_QPT_UD: 312f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 313f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 314f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 315f0313965SErez Shitrit /* fall through */ 316e126ba97SEli Cohen case IB_QPT_SMI: 317d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 318b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 319e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 320e126ba97SEli Cohen break; 321e126ba97SEli Cohen 322e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 323b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 324e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 325e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 326e126ba97SEli Cohen break; 327e126ba97SEli Cohen 328e126ba97SEli Cohen default: 329e126ba97SEli Cohen return -EINVAL; 330e126ba97SEli Cohen } 331e126ba97SEli Cohen 332e126ba97SEli Cohen return size; 333e126ba97SEli Cohen } 334e126ba97SEli Cohen 335e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 336e126ba97SEli Cohen { 337e126ba97SEli Cohen int inl_size = 0; 338e126ba97SEli Cohen int size; 339e126ba97SEli Cohen 340f0313965SErez Shitrit size = sq_overhead(attr); 341e126ba97SEli Cohen if (size < 0) 342e126ba97SEli Cohen return size; 343e126ba97SEli Cohen 344e126ba97SEli Cohen if (attr->cap.max_inline_data) { 345e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 346e126ba97SEli Cohen attr->cap.max_inline_data; 347e126ba97SEli Cohen } 348e126ba97SEli Cohen 349e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 350e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 351e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 352e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 353e1e66cc2SSagi Grimberg else 354e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 355e126ba97SEli Cohen } 356e126ba97SEli Cohen 357288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 358288c01b7SEli Cohen { 359288c01b7SEli Cohen int max_sge; 360288c01b7SEli Cohen 361288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 362288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 363288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 364288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 365288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 366288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 367288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 368288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 369288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 370288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 371288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 372288c01b7SEli Cohen else 373288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 375288c01b7SEli Cohen 376288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 377288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 378288c01b7SEli Cohen } 379288c01b7SEli Cohen 380e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 381e126ba97SEli Cohen struct mlx5_ib_qp *qp) 382e126ba97SEli Cohen { 383e126ba97SEli Cohen int wqe_size; 384e126ba97SEli Cohen int wq_size; 385e126ba97SEli Cohen 386e126ba97SEli Cohen if (!attr->cap.max_send_wr) 387e126ba97SEli Cohen return 0; 388e126ba97SEli Cohen 389e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 390e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 391e126ba97SEli Cohen if (wqe_size < 0) 392e126ba97SEli Cohen return wqe_size; 393e126ba97SEli Cohen 394938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 395b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 396938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 397e126ba97SEli Cohen return -EINVAL; 398e126ba97SEli Cohen } 399e126ba97SEli Cohen 400f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 401e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 402e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 403e126ba97SEli Cohen 404e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 405e1e66cc2SSagi Grimberg qp->signature_en = true; 406e1e66cc2SSagi Grimberg 407e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 408e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 409938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4101974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4111974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 412938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 413938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 414b125a54bSEli Cohen return -ENOMEM; 415b125a54bSEli Cohen } 416e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 417288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 418288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 419288c01b7SEli Cohen return -ENOMEM; 420288c01b7SEli Cohen 421288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 422b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 423b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 424e126ba97SEli Cohen 425e126ba97SEli Cohen return wq_size; 426e126ba97SEli Cohen } 427e126ba97SEli Cohen 428e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 429e126ba97SEli Cohen struct mlx5_ib_qp *qp, 43019098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4310fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4320fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 433e126ba97SEli Cohen { 434e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 435e126ba97SEli Cohen 436938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 437e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 438938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 439e126ba97SEli Cohen return -EINVAL; 440e126ba97SEli Cohen } 441e126ba97SEli Cohen 442e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 443e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 444e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 445e126ba97SEli Cohen return -EINVAL; 446e126ba97SEli Cohen } 447e126ba97SEli Cohen 448e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 449e126ba97SEli Cohen 450938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 451e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 452938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 453938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 454e126ba97SEli Cohen return -EINVAL; 455e126ba97SEli Cohen } 456e126ba97SEli Cohen 457c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 458c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4590fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4600fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4610fb2ed66Smajd@mellanox.com } else { 46219098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 463e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4640fb2ed66Smajd@mellanox.com } 465e126ba97SEli Cohen 466e126ba97SEli Cohen return 0; 467e126ba97SEli Cohen } 468e126ba97SEli Cohen 469e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 470e126ba97SEli Cohen { 471e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 472e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 473e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 474e126ba97SEli Cohen !attr->cap.max_recv_wr) 475e126ba97SEli Cohen return 0; 476e126ba97SEli Cohen 477e126ba97SEli Cohen return 1; 478e126ba97SEli Cohen } 479e126ba97SEli Cohen 4802f5ff264SEli Cohen static int first_med_bfreg(void) 481c1be5232SEli Cohen { 482c1be5232SEli Cohen return 1; 483c1be5232SEli Cohen } 484c1be5232SEli Cohen 4850b80c14fSEli Cohen enum { 4860b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4870b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4880b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4890b80c14fSEli Cohen * "odd/even" order 4900b80c14fSEli Cohen */ 4910b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4920b80c14fSEli Cohen }; 4930b80c14fSEli Cohen 494b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 495b037c29aSEli Cohen { 49631a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 497b037c29aSEli Cohen } 498b037c29aSEli Cohen 499b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 500b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 501c1be5232SEli Cohen { 502c1be5232SEli Cohen int n; 503c1be5232SEli Cohen 504b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 505b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 506c1be5232SEli Cohen 507c1be5232SEli Cohen return n >= 0 ? n : 0; 508c1be5232SEli Cohen } 509c1be5232SEli Cohen 510b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 511b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 512c1be5232SEli Cohen { 513c1be5232SEli Cohen int med; 514c1be5232SEli Cohen 515b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 516b037c29aSEli Cohen return ++med; 517c1be5232SEli Cohen } 518c1be5232SEli Cohen 519b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 520b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 521e126ba97SEli Cohen { 522e126ba97SEli Cohen int i; 523e126ba97SEli Cohen 524b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 525b037c29aSEli Cohen if (!bfregi->count[i]) { 5262f5ff264SEli Cohen bfregi->count[i]++; 527e126ba97SEli Cohen return i; 528e126ba97SEli Cohen } 529e126ba97SEli Cohen } 530e126ba97SEli Cohen 531e126ba97SEli Cohen return -ENOMEM; 532e126ba97SEli Cohen } 533e126ba97SEli Cohen 534b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 535b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 536e126ba97SEli Cohen { 5372f5ff264SEli Cohen int minidx = first_med_bfreg(); 538e126ba97SEli Cohen int i; 539e126ba97SEli Cohen 540b037c29aSEli Cohen for (i = first_med_bfreg(); i < first_hi_bfreg(dev, bfregi); i++) { 5412f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 542e126ba97SEli Cohen minidx = i; 5430b80c14fSEli Cohen if (!bfregi->count[minidx]) 5440b80c14fSEli Cohen break; 545e126ba97SEli Cohen } 546e126ba97SEli Cohen 5472f5ff264SEli Cohen bfregi->count[minidx]++; 548e126ba97SEli Cohen return minidx; 549e126ba97SEli Cohen } 550e126ba97SEli Cohen 551b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 552b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, 553e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 554e126ba97SEli Cohen { 5552f5ff264SEli Cohen int bfregn = -EINVAL; 556e126ba97SEli Cohen 5572f5ff264SEli Cohen mutex_lock(&bfregi->lock); 558e126ba97SEli Cohen switch (lat) { 559e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 5600b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5612f5ff264SEli Cohen bfregn = 0; 5622f5ff264SEli Cohen bfregi->count[bfregn]++; 563e126ba97SEli Cohen break; 564e126ba97SEli Cohen 565e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 5662f5ff264SEli Cohen if (bfregi->ver < 2) 5672f5ff264SEli Cohen bfregn = -ENOMEM; 56878c0f98cSEli Cohen else 569b037c29aSEli Cohen bfregn = alloc_med_class_bfreg(dev, bfregi); 570e126ba97SEli Cohen break; 571e126ba97SEli Cohen 572e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 5732f5ff264SEli Cohen if (bfregi->ver < 2) 5742f5ff264SEli Cohen bfregn = -ENOMEM; 57578c0f98cSEli Cohen else 576b037c29aSEli Cohen bfregn = alloc_high_class_bfreg(dev, bfregi); 577e126ba97SEli Cohen break; 578e126ba97SEli Cohen } 5792f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 580e126ba97SEli Cohen 5812f5ff264SEli Cohen return bfregn; 582e126ba97SEli Cohen } 583e126ba97SEli Cohen 5844ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 585e126ba97SEli Cohen { 5862f5ff264SEli Cohen mutex_lock(&bfregi->lock); 587b037c29aSEli Cohen bfregi->count[bfregn]--; 5882f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 589e126ba97SEli Cohen } 590e126ba97SEli Cohen 591e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 592e126ba97SEli Cohen { 593e126ba97SEli Cohen switch (state) { 594e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 595e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 596e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 597e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 598e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 599e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 600e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 601e126ba97SEli Cohen default: return -1; 602e126ba97SEli Cohen } 603e126ba97SEli Cohen } 604e126ba97SEli Cohen 605e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 606e126ba97SEli Cohen { 607e126ba97SEli Cohen switch (type) { 608e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 609e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 610e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 611e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 612e126ba97SEli Cohen case IB_QPT_XRC_INI: 613e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 614e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 615d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 616c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 617e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 618e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6190fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 620e126ba97SEli Cohen case IB_QPT_MAX: 621e126ba97SEli Cohen default: return -EINVAL; 622e126ba97SEli Cohen } 623e126ba97SEli Cohen } 624e126ba97SEli Cohen 62589ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 62689ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 62789ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 62889ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 62989ea94a7SMaor Gottlieb 630b037c29aSEli Cohen static int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 6311ee47ab3SYishai Hadas struct mlx5_bfreg_info *bfregi, int bfregn, 6321ee47ab3SYishai Hadas bool dyn_bfreg) 633e126ba97SEli Cohen { 634b037c29aSEli Cohen int bfregs_per_sys_page; 635b037c29aSEli Cohen int index_of_sys_page; 636b037c29aSEli Cohen int offset; 637b037c29aSEli Cohen 638b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 639b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 640b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 641b037c29aSEli Cohen 6421ee47ab3SYishai Hadas if (dyn_bfreg) { 6431ee47ab3SYishai Hadas index_of_sys_page += bfregi->num_static_sys_pages; 6441ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6451ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6461ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6471ee47ab3SYishai Hadas return -EINVAL; 6481ee47ab3SYishai Hadas } 6491ee47ab3SYishai Hadas } 650b037c29aSEli Cohen 6511ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 652b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 653e126ba97SEli Cohen } 654e126ba97SEli Cohen 65519098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 65619098df2Smajd@mellanox.com struct ib_pd *pd, 65719098df2Smajd@mellanox.com unsigned long addr, size_t size, 65819098df2Smajd@mellanox.com struct ib_umem **umem, 65919098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66019098df2Smajd@mellanox.com u32 *offset) 66119098df2Smajd@mellanox.com { 66219098df2Smajd@mellanox.com int err; 66319098df2Smajd@mellanox.com 66419098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 66519098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 66619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 66719098df2Smajd@mellanox.com return PTR_ERR(*umem); 66819098df2Smajd@mellanox.com } 66919098df2Smajd@mellanox.com 670762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67119098df2Smajd@mellanox.com 67219098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 67319098df2Smajd@mellanox.com if (err) { 67419098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 67519098df2Smajd@mellanox.com goto err_umem; 67619098df2Smajd@mellanox.com } 67719098df2Smajd@mellanox.com 67819098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 67919098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68019098df2Smajd@mellanox.com 68119098df2Smajd@mellanox.com return 0; 68219098df2Smajd@mellanox.com 68319098df2Smajd@mellanox.com err_umem: 68419098df2Smajd@mellanox.com ib_umem_release(*umem); 68519098df2Smajd@mellanox.com *umem = NULL; 68619098df2Smajd@mellanox.com 68719098df2Smajd@mellanox.com return err; 68819098df2Smajd@mellanox.com } 68919098df2Smajd@mellanox.com 690fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 691fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 69279b20a6cSYishai Hadas { 69379b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 69479b20a6cSYishai Hadas 695fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 696fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 697fe248c3aSMaor Gottlieb 69879b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 69979b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70079b20a6cSYishai Hadas if (rwq->umem) 70179b20a6cSYishai Hadas ib_umem_release(rwq->umem); 70279b20a6cSYishai Hadas } 70379b20a6cSYishai Hadas 70479b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 70579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 70679b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 70779b20a6cSYishai Hadas { 70879b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70979b20a6cSYishai Hadas int page_shift = 0; 71079b20a6cSYishai Hadas int npages; 71179b20a6cSYishai Hadas u32 offset = 0; 71279b20a6cSYishai Hadas int ncont = 0; 71379b20a6cSYishai Hadas int err; 71479b20a6cSYishai Hadas 71579b20a6cSYishai Hadas if (!ucmd->buf_addr) 71679b20a6cSYishai Hadas return -EINVAL; 71779b20a6cSYishai Hadas 71879b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 71979b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72079b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72179b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 72279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 72379b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 72479b20a6cSYishai Hadas return err; 72579b20a6cSYishai Hadas } 72679b20a6cSYishai Hadas 727762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 72879b20a6cSYishai Hadas &ncont, NULL); 72979b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73079b20a6cSYishai Hadas &rwq->rq_page_offset); 73179b20a6cSYishai Hadas if (err) { 73279b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 73379b20a6cSYishai Hadas goto err_umem; 73479b20a6cSYishai Hadas } 73579b20a6cSYishai Hadas 73679b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 73779b20a6cSYishai Hadas rwq->page_shift = page_shift; 73879b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 73979b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74079b20a6cSYishai Hadas 74179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 74279b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 74379b20a6cSYishai Hadas npages, page_shift, ncont, offset); 74479b20a6cSYishai Hadas 74579b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 74679b20a6cSYishai Hadas if (err) { 74779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 74879b20a6cSYishai Hadas goto err_umem; 74979b20a6cSYishai Hadas } 75079b20a6cSYishai Hadas 75179b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 75279b20a6cSYishai Hadas return 0; 75379b20a6cSYishai Hadas 75479b20a6cSYishai Hadas err_umem: 75579b20a6cSYishai Hadas ib_umem_release(rwq->umem); 75679b20a6cSYishai Hadas return err; 75779b20a6cSYishai Hadas } 75879b20a6cSYishai Hadas 759b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 760b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 761b037c29aSEli Cohen { 762b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 763b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 764b037c29aSEli Cohen } 765b037c29aSEli Cohen 766e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 767e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7680fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 76909a7d9ecSSaeed Mahameed u32 **in, 77019098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77119098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 772e126ba97SEli Cohen { 773e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 774e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 77519098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7769e9c47d0SEli Cohen int page_shift = 0; 7771ee47ab3SYishai Hadas int uar_index = 0; 778e126ba97SEli Cohen int npages; 7799e9c47d0SEli Cohen u32 offset = 0; 7802f5ff264SEli Cohen int bfregn; 7819e9c47d0SEli Cohen int ncont = 0; 78209a7d9ecSSaeed Mahameed __be64 *pas; 78309a7d9ecSSaeed Mahameed void *qpc; 784e126ba97SEli Cohen int err; 785e126ba97SEli Cohen 786e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 787e126ba97SEli Cohen if (err) { 788e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 789e126ba97SEli Cohen return err; 790e126ba97SEli Cohen } 791e126ba97SEli Cohen 792e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 7931ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 7941ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 7951ee47ab3SYishai Hadas ucmd.bfreg_index, true); 7961ee47ab3SYishai Hadas if (uar_index < 0) 7971ee47ab3SYishai Hadas return uar_index; 7981ee47ab3SYishai Hadas 7991ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8001ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 801e126ba97SEli Cohen /* 802e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 803e126ba97SEli Cohen */ 804051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8052f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8061ee47ab3SYishai Hadas } 807051f2630SLeon Romanovsky else { 808b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_HIGH); 8092f5ff264SEli Cohen if (bfregn < 0) { 8102f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency BFREG\n"); 811c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 812b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_MEDIUM); 8132f5ff264SEli Cohen if (bfregn < 0) { 8142f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency BFREG\n"); 815e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 816b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_LOW); 8172f5ff264SEli Cohen if (bfregn < 0) { 8182f5ff264SEli Cohen mlx5_ib_warn(dev, "bfreg allocation failed\n"); 8192f5ff264SEli Cohen return bfregn; 820e126ba97SEli Cohen } 821e126ba97SEli Cohen } 822c1be5232SEli Cohen } 823051f2630SLeon Romanovsky } 824e126ba97SEli Cohen 8252f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8261ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8271ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8281ee47ab3SYishai Hadas false); 829e126ba97SEli Cohen 83048fea837SHaggai Eran qp->rq.offset = 0; 83148fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 83248fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 83348fea837SHaggai Eran 8340fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 835e126ba97SEli Cohen if (err) 8362f5ff264SEli Cohen goto err_bfreg; 837e126ba97SEli Cohen 83819098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 83919098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 84019098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 84119098df2Smajd@mellanox.com ubuffer->buf_size, 84219098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 84319098df2Smajd@mellanox.com &ncont, &offset); 84419098df2Smajd@mellanox.com if (err) 8452f5ff264SEli Cohen goto err_bfreg; 8469e9c47d0SEli Cohen } else { 84719098df2Smajd@mellanox.com ubuffer->umem = NULL; 8489e9c47d0SEli Cohen } 849e126ba97SEli Cohen 85009a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 85109a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8521b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 853e126ba97SEli Cohen if (!*in) { 854e126ba97SEli Cohen err = -ENOMEM; 855e126ba97SEli Cohen goto err_umem; 856e126ba97SEli Cohen } 857e126ba97SEli Cohen 85809a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 85909a7d9ecSSaeed Mahameed if (ubuffer->umem) 86009a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 86109a7d9ecSSaeed Mahameed 86209a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86309a7d9ecSSaeed Mahameed 86409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86609a7d9ecSSaeed Mahameed 86709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8681ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 869b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8701ee47ab3SYishai Hadas else 8711ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8722f5ff264SEli Cohen qp->bfregn = bfregn; 873e126ba97SEli Cohen 874e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 875e126ba97SEli Cohen if (err) { 876e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 877e126ba97SEli Cohen goto err_free; 878e126ba97SEli Cohen } 879e126ba97SEli Cohen 880e126ba97SEli Cohen err = ib_copy_to_udata(udata, resp, sizeof(*resp)); 881e126ba97SEli Cohen if (err) { 882e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 883e126ba97SEli Cohen goto err_unmap; 884e126ba97SEli Cohen } 885e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 886e126ba97SEli Cohen 887e126ba97SEli Cohen return 0; 888e126ba97SEli Cohen 889e126ba97SEli Cohen err_unmap: 890e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 891e126ba97SEli Cohen 892e126ba97SEli Cohen err_free: 893479163f4SAl Viro kvfree(*in); 894e126ba97SEli Cohen 895e126ba97SEli Cohen err_umem: 89619098df2Smajd@mellanox.com if (ubuffer->umem) 89719098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 898e126ba97SEli Cohen 8992f5ff264SEli Cohen err_bfreg: 9001ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9014ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 902e126ba97SEli Cohen return err; 903e126ba97SEli Cohen } 904e126ba97SEli Cohen 905b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 906b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 907e126ba97SEli Cohen { 908e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 909e126ba97SEli Cohen 910e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 911e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 91219098df2Smajd@mellanox.com if (base->ubuffer.umem) 91319098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9141ee47ab3SYishai Hadas 9151ee47ab3SYishai Hadas /* 9161ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9171ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9181ee47ab3SYishai Hadas */ 9191ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9204ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 921e126ba97SEli Cohen } 922e126ba97SEli Cohen 923e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 924e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 925e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92609a7d9ecSSaeed Mahameed u32 **in, int *inlen, 92719098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 928e126ba97SEli Cohen { 929e126ba97SEli Cohen int uar_index; 93009a7d9ecSSaeed Mahameed void *qpc; 931e126ba97SEli Cohen int err; 932e126ba97SEli Cohen 933f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 934f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 935b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93693d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 937b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9381a4c3a3dSEli Cohen return -EINVAL; 939e126ba97SEli Cohen 940e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9415fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9425fe9dec0SEli Cohen else 9435fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 944e126ba97SEli Cohen 945d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 946d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 947d8030b0dSEli Cohen */ 948d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9495fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 950e126ba97SEli Cohen 951e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 952e126ba97SEli Cohen if (err < 0) { 953e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9545fe9dec0SEli Cohen return err; 955e126ba97SEli Cohen } 956e126ba97SEli Cohen 957e126ba97SEli Cohen qp->rq.offset = 0; 958e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 95919098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 960e126ba97SEli Cohen 96119098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 962e126ba97SEli Cohen if (err) { 963e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9645fe9dec0SEli Cohen return err; 965e126ba97SEli Cohen } 966e126ba97SEli Cohen 967e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 96809a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 96909a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9701b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 971e126ba97SEli Cohen if (!*in) { 972e126ba97SEli Cohen err = -ENOMEM; 973e126ba97SEli Cohen goto err_buf; 974e126ba97SEli Cohen } 97509a7d9ecSSaeed Mahameed 97609a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 97709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 97809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 97909a7d9ecSSaeed Mahameed 980e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 98109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 98209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 983e126ba97SEli Cohen 984b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 986b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 987b11a4f9cSHaggai Eran } 988b11a4f9cSHaggai Eran 98909a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 99009a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 991e126ba97SEli Cohen 9929603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 993e126ba97SEli Cohen if (err) { 994e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 995e126ba97SEli Cohen goto err_free; 996e126ba97SEli Cohen } 997e126ba97SEli Cohen 998b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 999b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1000b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1001b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1002b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1003b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1004b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1005b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1006b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1007b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1008e126ba97SEli Cohen 1009e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1010e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1011e126ba97SEli Cohen err = -ENOMEM; 1012e126ba97SEli Cohen goto err_wrid; 1013e126ba97SEli Cohen } 1014e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1015e126ba97SEli Cohen 1016e126ba97SEli Cohen return 0; 1017e126ba97SEli Cohen 1018e126ba97SEli Cohen err_wrid: 1019b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1020b5883008SLi Dongyang kvfree(qp->sq.w_list); 1021b5883008SLi Dongyang kvfree(qp->sq.wrid); 1022b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1023b5883008SLi Dongyang kvfree(qp->rq.wrid); 1024f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen err_free: 1027479163f4SAl Viro kvfree(*in); 1028e126ba97SEli Cohen 1029e126ba97SEli Cohen err_buf: 10309603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1031e126ba97SEli Cohen return err; 1032e126ba97SEli Cohen } 1033e126ba97SEli Cohen 1034e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1035e126ba97SEli Cohen { 1036b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1037b5883008SLi Dongyang kvfree(qp->sq.w_list); 1038b5883008SLi Dongyang kvfree(qp->sq.wrid); 1039b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1040b5883008SLi Dongyang kvfree(qp->rq.wrid); 1041f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10429603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1043e126ba97SEli Cohen } 1044e126ba97SEli Cohen 104509a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1046e126ba97SEli Cohen { 1047e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1048c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1049e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 105009a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1051e126ba97SEli Cohen else if (!qp->has_rq) 105209a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1053e126ba97SEli Cohen else 105409a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1055e126ba97SEli Cohen } 1056e126ba97SEli Cohen 1057e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1058e126ba97SEli Cohen { 1059e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1060e126ba97SEli Cohen return 1; 1061e126ba97SEli Cohen 1062e126ba97SEli Cohen return 0; 1063e126ba97SEli Cohen } 1064e126ba97SEli Cohen 10650fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1066c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10670fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 10680fb2ed66Smajd@mellanox.com { 1069c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10700fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10710fb2ed66Smajd@mellanox.com 10720fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1073c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1074c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1075c2e53b2cSYishai Hadas 10760fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10770fb2ed66Smajd@mellanox.com } 10780fb2ed66Smajd@mellanox.com 10790fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10800fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10810fb2ed66Smajd@mellanox.com { 10820fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 10830fb2ed66Smajd@mellanox.com } 10840fb2ed66Smajd@mellanox.com 10850fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10860fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10870fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10880fb2ed66Smajd@mellanox.com { 10890fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10900fb2ed66Smajd@mellanox.com __be64 *pas; 10910fb2ed66Smajd@mellanox.com void *in; 10920fb2ed66Smajd@mellanox.com void *sqc; 10930fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 10940fb2ed66Smajd@mellanox.com void *wq; 10950fb2ed66Smajd@mellanox.com int inlen; 10960fb2ed66Smajd@mellanox.com int err; 10970fb2ed66Smajd@mellanox.com int page_shift = 0; 10980fb2ed66Smajd@mellanox.com int npages; 10990fb2ed66Smajd@mellanox.com int ncont = 0; 11000fb2ed66Smajd@mellanox.com u32 offset = 0; 11010fb2ed66Smajd@mellanox.com 11020fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11030fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11040fb2ed66Smajd@mellanox.com &ncont, &offset); 11050fb2ed66Smajd@mellanox.com if (err) 11060fb2ed66Smajd@mellanox.com return err; 11070fb2ed66Smajd@mellanox.com 11080fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11091b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11100fb2ed66Smajd@mellanox.com if (!in) { 11110fb2ed66Smajd@mellanox.com err = -ENOMEM; 11120fb2ed66Smajd@mellanox.com goto err_umem; 11130fb2ed66Smajd@mellanox.com } 11140fb2ed66Smajd@mellanox.com 11150fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11160fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1117795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1118795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11190fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11200fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11210fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11220fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11230fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 112496dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 112596dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 112696dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11270fb2ed66Smajd@mellanox.com 11280fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11290fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11300fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11310fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11320fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11330fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11340fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11350fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11360fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11370fb2ed66Smajd@mellanox.com 11380fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11390fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11400fb2ed66Smajd@mellanox.com 11410fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11420fb2ed66Smajd@mellanox.com 11430fb2ed66Smajd@mellanox.com kvfree(in); 11440fb2ed66Smajd@mellanox.com 11450fb2ed66Smajd@mellanox.com if (err) 11460fb2ed66Smajd@mellanox.com goto err_umem; 11470fb2ed66Smajd@mellanox.com 11480fb2ed66Smajd@mellanox.com return 0; 11490fb2ed66Smajd@mellanox.com 11500fb2ed66Smajd@mellanox.com err_umem: 11510fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11520fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11530fb2ed66Smajd@mellanox.com 11540fb2ed66Smajd@mellanox.com return err; 11550fb2ed66Smajd@mellanox.com } 11560fb2ed66Smajd@mellanox.com 11570fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11580fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11590fb2ed66Smajd@mellanox.com { 11600fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11610fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11620fb2ed66Smajd@mellanox.com } 11630fb2ed66Smajd@mellanox.com 11640fb2ed66Smajd@mellanox.com static int get_rq_pas_size(void *qpc) 11650fb2ed66Smajd@mellanox.com { 11660fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11670fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11680fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11690fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11700fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11710fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11720fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11730fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11740fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11750fb2ed66Smajd@mellanox.com 11760fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11770fb2ed66Smajd@mellanox.com } 11780fb2ed66Smajd@mellanox.com 11790fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11800fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq, void *qpin) 11810fb2ed66Smajd@mellanox.com { 1182358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 11830fb2ed66Smajd@mellanox.com __be64 *pas; 11840fb2ed66Smajd@mellanox.com __be64 *qp_pas; 11850fb2ed66Smajd@mellanox.com void *in; 11860fb2ed66Smajd@mellanox.com void *rqc; 11870fb2ed66Smajd@mellanox.com void *wq; 11880fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11890fb2ed66Smajd@mellanox.com int inlen; 11900fb2ed66Smajd@mellanox.com int err; 11910fb2ed66Smajd@mellanox.com u32 rq_pas_size = get_rq_pas_size(qpc); 11920fb2ed66Smajd@mellanox.com 11930fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 11941b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11950fb2ed66Smajd@mellanox.com if (!in) 11960fb2ed66Smajd@mellanox.com return -ENOMEM; 11970fb2ed66Smajd@mellanox.com 11980fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1199e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12000fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12010fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12020fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12030fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12040fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12050fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12060fb2ed66Smajd@mellanox.com 1207358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1208358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1209358e42eaSMajd Dibbiny 12100fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12110fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1212b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1213b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12140fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12150fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12160fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12170fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12180fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12190fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12200fb2ed66Smajd@mellanox.com 12210fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12220fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12230fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12240fb2ed66Smajd@mellanox.com 12250fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12260fb2ed66Smajd@mellanox.com 12270fb2ed66Smajd@mellanox.com kvfree(in); 12280fb2ed66Smajd@mellanox.com 12290fb2ed66Smajd@mellanox.com return err; 12300fb2ed66Smajd@mellanox.com } 12310fb2ed66Smajd@mellanox.com 12320fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12330fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12340fb2ed66Smajd@mellanox.com { 12350fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12360fb2ed66Smajd@mellanox.com } 12370fb2ed66Smajd@mellanox.com 1238f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1239f95ef6cbSMaor Gottlieb { 1240f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1241f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1242f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1243f95ef6cbSMaor Gottlieb } 1244f95ef6cbSMaor Gottlieb 12450fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1246f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1247f95ef6cbSMaor Gottlieb bool tunnel_offload_en) 12480fb2ed66Smajd@mellanox.com { 12490fb2ed66Smajd@mellanox.com u32 *in; 12500fb2ed66Smajd@mellanox.com void *tirc; 12510fb2ed66Smajd@mellanox.com int inlen; 12520fb2ed66Smajd@mellanox.com int err; 12530fb2ed66Smajd@mellanox.com 12540fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12551b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12560fb2ed66Smajd@mellanox.com if (!in) 12570fb2ed66Smajd@mellanox.com return -ENOMEM; 12580fb2ed66Smajd@mellanox.com 12590fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12600fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12610fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12620fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1263f95ef6cbSMaor Gottlieb if (tunnel_offload_en) 1264f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 12650fb2ed66Smajd@mellanox.com 12660fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 12670fb2ed66Smajd@mellanox.com 12680fb2ed66Smajd@mellanox.com kvfree(in); 12690fb2ed66Smajd@mellanox.com 12700fb2ed66Smajd@mellanox.com return err; 12710fb2ed66Smajd@mellanox.com } 12720fb2ed66Smajd@mellanox.com 12730fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12740fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12750fb2ed66Smajd@mellanox.com { 12760fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 12770fb2ed66Smajd@mellanox.com } 12780fb2ed66Smajd@mellanox.com 12790fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 128009a7d9ecSSaeed Mahameed u32 *in, 12810fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12820fb2ed66Smajd@mellanox.com { 12830fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 12840fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 12850fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 12860fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 12870fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 12880fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 12890fb2ed66Smajd@mellanox.com int err; 12900fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 12910fb2ed66Smajd@mellanox.com 12920fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 1293c2e53b2cSYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn); 12940fb2ed66Smajd@mellanox.com if (err) 12950fb2ed66Smajd@mellanox.com return err; 12960fb2ed66Smajd@mellanox.com 12970fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 12980fb2ed66Smajd@mellanox.com if (err) 12990fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13000fb2ed66Smajd@mellanox.com 13010fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13021d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13030fb2ed66Smajd@mellanox.com } 13040fb2ed66Smajd@mellanox.com 13050fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1306358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1307358e42eaSMajd Dibbiny 1308e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1309e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1310b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1311b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 13120fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_rq(dev, rq, in); 13130fb2ed66Smajd@mellanox.com if (err) 13140fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13150fb2ed66Smajd@mellanox.com 13160fb2ed66Smajd@mellanox.com 1317f95ef6cbSMaor Gottlieb err = create_raw_packet_qp_tir(dev, rq, tdn, 1318f95ef6cbSMaor Gottlieb qp->tunnel_offload_en); 13190fb2ed66Smajd@mellanox.com if (err) 13200fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13210fb2ed66Smajd@mellanox.com } 13220fb2ed66Smajd@mellanox.com 13230fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13240fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13250fb2ed66Smajd@mellanox.com 13260fb2ed66Smajd@mellanox.com return 0; 13270fb2ed66Smajd@mellanox.com 13280fb2ed66Smajd@mellanox.com err_destroy_rq: 13290fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13300fb2ed66Smajd@mellanox.com err_destroy_sq: 13310fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 13320fb2ed66Smajd@mellanox.com return err; 13330fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13340fb2ed66Smajd@mellanox.com err_destroy_tis: 13350fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13360fb2ed66Smajd@mellanox.com 13370fb2ed66Smajd@mellanox.com return err; 13380fb2ed66Smajd@mellanox.com } 13390fb2ed66Smajd@mellanox.com 13400fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 13410fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 13420fb2ed66Smajd@mellanox.com { 13430fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13440fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13450fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13460fb2ed66Smajd@mellanox.com 13470fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 13480fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 13490fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13500fb2ed66Smajd@mellanox.com } 13510fb2ed66Smajd@mellanox.com 13520fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13530fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13540fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13550fb2ed66Smajd@mellanox.com } 13560fb2ed66Smajd@mellanox.com } 13570fb2ed66Smajd@mellanox.com 13580fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 13590fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 13600fb2ed66Smajd@mellanox.com { 13610fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13620fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13630fb2ed66Smajd@mellanox.com 13640fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 13650fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 13660fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 13670fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 13680fb2ed66Smajd@mellanox.com } 13690fb2ed66Smajd@mellanox.com 137028d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 137128d61370SYishai Hadas { 137228d61370SYishai Hadas mlx5_core_destroy_tir(dev->mdev, qp->rss_qp.tirn); 137328d61370SYishai Hadas } 137428d61370SYishai Hadas 137528d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 137628d61370SYishai Hadas struct ib_pd *pd, 137728d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 137828d61370SYishai Hadas struct ib_udata *udata) 137928d61370SYishai Hadas { 138028d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 138128d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 138228d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 138328d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 138428d61370SYishai Hadas int inlen; 138528d61370SYishai Hadas int err; 138628d61370SYishai Hadas u32 *in; 138728d61370SYishai Hadas void *tirc; 138828d61370SYishai Hadas void *hfso; 138928d61370SYishai Hadas u32 selected_fields = 0; 139028d61370SYishai Hadas size_t min_resp_len; 139128d61370SYishai Hadas u32 tdn = mucontext->tdn; 139228d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 139328d61370SYishai Hadas size_t required_cmd_sz; 139428d61370SYishai Hadas 139528d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 139628d61370SYishai Hadas return -EOPNOTSUPP; 139728d61370SYishai Hadas 139828d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 139928d61370SYishai Hadas return -EINVAL; 140028d61370SYishai Hadas 14012f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 140228d61370SYishai Hadas if (udata->outlen < min_resp_len) 140328d61370SYishai Hadas return -EINVAL; 140428d61370SYishai Hadas 1405f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 140628d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 140728d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 140828d61370SYishai Hadas return -EINVAL; 140928d61370SYishai Hadas } 141028d61370SYishai Hadas 141128d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 141228d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 141328d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 141428d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 141528d61370SYishai Hadas return -EOPNOTSUPP; 141628d61370SYishai Hadas } 141728d61370SYishai Hadas 141828d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 141928d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 142028d61370SYishai Hadas return -EFAULT; 142128d61370SYishai Hadas } 142228d61370SYishai Hadas 142328d61370SYishai Hadas if (ucmd.comp_mask) { 142428d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 142528d61370SYishai Hadas return -EOPNOTSUPP; 142628d61370SYishai Hadas } 142728d61370SYishai Hadas 1428f95ef6cbSMaor Gottlieb if (ucmd.flags & ~MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1429f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1430f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1431f95ef6cbSMaor Gottlieb } 1432f95ef6cbSMaor Gottlieb 1433f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1434f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1435f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 143628d61370SYishai Hadas return -EOPNOTSUPP; 143728d61370SYishai Hadas } 143828d61370SYishai Hadas 1439309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1440309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1441309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1442309fa347SMaor Gottlieb return -EOPNOTSUPP; 1443309fa347SMaor Gottlieb } 1444309fa347SMaor Gottlieb 144528d61370SYishai Hadas err = ib_copy_to_udata(udata, &resp, min_resp_len); 144628d61370SYishai Hadas if (err) { 144728d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 144828d61370SYishai Hadas return -EINVAL; 144928d61370SYishai Hadas } 145028d61370SYishai Hadas 145128d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14521b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 145328d61370SYishai Hadas if (!in) 145428d61370SYishai Hadas return -ENOMEM; 145528d61370SYishai Hadas 145628d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 145728d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 145828d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 145928d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 146028d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 146128d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 146228d61370SYishai Hadas 146328d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1464f95ef6cbSMaor Gottlieb 1465f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1466f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1467f95ef6cbSMaor Gottlieb 1468309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1469309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1470309fa347SMaor Gottlieb else 1471309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1472309fa347SMaor Gottlieb 147328d61370SYishai Hadas switch (ucmd.rx_hash_function) { 147428d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 147528d61370SYishai Hadas { 147628d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 147728d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 147828d61370SYishai Hadas 147928d61370SYishai Hadas if (len != ucmd.rx_key_len) { 148028d61370SYishai Hadas err = -EINVAL; 148128d61370SYishai Hadas goto err; 148228d61370SYishai Hadas } 148328d61370SYishai Hadas 148428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 148528d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 148628d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 148728d61370SYishai Hadas break; 148828d61370SYishai Hadas } 148928d61370SYishai Hadas default: 149028d61370SYishai Hadas err = -EOPNOTSUPP; 149128d61370SYishai Hadas goto err; 149228d61370SYishai Hadas } 149328d61370SYishai Hadas 149428d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 149528d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 149628d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 149728d61370SYishai Hadas goto create_tir; 149828d61370SYishai Hadas err = -EINVAL; 149928d61370SYishai Hadas goto err; 150028d61370SYishai Hadas } 150128d61370SYishai Hadas 150228d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 150328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 150428d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 150528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 150628d61370SYishai Hadas err = -EINVAL; 150728d61370SYishai Hadas goto err; 150828d61370SYishai Hadas } 150928d61370SYishai Hadas 151028d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 151128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 151228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 151328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 151428d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 151528d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 151628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 151728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 151828d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 151928d61370SYishai Hadas 152028d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 152128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) && 152228d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 152328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))) { 152428d61370SYishai Hadas err = -EINVAL; 152528d61370SYishai Hadas goto err; 152628d61370SYishai Hadas } 152728d61370SYishai Hadas 152828d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 152928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 153028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 153128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 153228d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 153328d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 153428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 153528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 153628d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 153728d61370SYishai Hadas 153828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 153928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 154028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 154128d61370SYishai Hadas 154228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 154328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 154428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 154528d61370SYishai Hadas 154628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 154728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 154828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 154928d61370SYishai Hadas 155028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 155128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 155228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 155328d61370SYishai Hadas 155428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 155528d61370SYishai Hadas 155628d61370SYishai Hadas create_tir: 155728d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 155828d61370SYishai Hadas 155928d61370SYishai Hadas if (err) 156028d61370SYishai Hadas goto err; 156128d61370SYishai Hadas 156228d61370SYishai Hadas kvfree(in); 156328d61370SYishai Hadas /* qpn is reserved for that QP */ 156428d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1565d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 156628d61370SYishai Hadas return 0; 156728d61370SYishai Hadas 156828d61370SYishai Hadas err: 156928d61370SYishai Hadas kvfree(in); 157028d61370SYishai Hadas return err; 157128d61370SYishai Hadas } 157228d61370SYishai Hadas 1573e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1574e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1575e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1576e126ba97SEli Cohen { 1577e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 157809a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1579938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 1580e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 158189ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 158289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 158389ea94a7SMaor Gottlieb unsigned long flags; 1584cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 158509a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 158609a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1587cfb5e088SHaggai Abramovsky void *qpc; 158809a7d9ecSSaeed Mahameed u32 *in; 158909a7d9ecSSaeed Mahameed int err; 1590e126ba97SEli Cohen 1591e126ba97SEli Cohen mutex_init(&qp->mutex); 1592e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1593e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1594e126ba97SEli Cohen 159528d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 159628d61370SYishai Hadas if (!udata) 159728d61370SYishai Hadas return -ENOSYS; 159828d61370SYishai Hadas 159928d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 160028d61370SYishai Hadas return err; 160128d61370SYishai Hadas } 160228d61370SYishai Hadas 1603f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1604938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1605f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1606f360d88aSEli Cohen return -EINVAL; 1607f360d88aSEli Cohen } else { 1608f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1609f360d88aSEli Cohen } 1610f360d88aSEli Cohen } 1611f360d88aSEli Cohen 1612051f2630SLeon Romanovsky if (init_attr->create_flags & 1613051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1614051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1615051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1616051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1617051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1618051f2630SLeon Romanovsky return -EINVAL; 1619051f2630SLeon Romanovsky } 1620051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1621051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1622051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1623051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1624051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1625051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1626051f2630SLeon Romanovsky } 1627f0313965SErez Shitrit 1628f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1629f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1630f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1631f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1632f0313965SErez Shitrit return -EOPNOTSUPP; 1633f0313965SErez Shitrit } 1634f0313965SErez Shitrit 1635358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1636358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1637358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1638358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1639358e42eaSMajd Dibbiny } 1640358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1641358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1642358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1643358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1644358e42eaSMajd Dibbiny } 1645358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1646358e42eaSMajd Dibbiny } 1647358e42eaSMajd Dibbiny 1648e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1649e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1650e126ba97SEli Cohen 1651e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1652e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1653e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1654e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1655e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1656e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1657e4cc4fa7SNoa Osherovich } 1658e4cc4fa7SNoa Osherovich 1659e126ba97SEli Cohen if (pd && pd->uobject) { 1660e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1661e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1662e126ba97SEli Cohen return -EFAULT; 1663e126ba97SEli Cohen } 1664e126ba97SEli Cohen 1665cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1666cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1667cfb5e088SHaggai Abramovsky if (err) 1668cfb5e088SHaggai Abramovsky return err; 1669cfb5e088SHaggai Abramovsky 1670e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1671e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1672f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1673f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1674f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1675f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1676f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1677f95ef6cbSMaor Gottlieb } 1678f95ef6cbSMaor Gottlieb qp->tunnel_offload_en = true; 1679f95ef6cbSMaor Gottlieb } 1680c2e53b2cSYishai Hadas 1681c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1682c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1683c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1684c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1685c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1686c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1687c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1688c2e53b2cSYishai Hadas } 1689c2e53b2cSYishai Hadas 1690c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1691c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1692c2e53b2cSYishai Hadas } 1693e126ba97SEli Cohen } else { 1694e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1695e126ba97SEli Cohen } 1696e126ba97SEli Cohen 1697c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1698c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1699c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1700c2e53b2cSYishai Hadas &qp->trans_qp.base; 1701c2e53b2cSYishai Hadas 1702e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1703e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1704e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1705e126ba97SEli Cohen if (err) { 1706e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1707e126ba97SEli Cohen return err; 1708e126ba97SEli Cohen } 1709e126ba97SEli Cohen 1710e126ba97SEli Cohen if (pd) { 1711e126ba97SEli Cohen if (pd->uobject) { 1712938fe83cSSaeed Mahameed __u32 max_wqes = 1713938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1714e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1715e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1716e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1717e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1718e126ba97SEli Cohen return -EINVAL; 1719e126ba97SEli Cohen } 1720938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1721e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1722938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1723e126ba97SEli Cohen return -EINVAL; 1724e126ba97SEli Cohen } 1725b11a4f9cSHaggai Eran if (init_attr->create_flags & 1726b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1727b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1728b11a4f9cSHaggai Eran return -EINVAL; 1729b11a4f9cSHaggai Eran } 17300fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 17310fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1732e126ba97SEli Cohen if (err) 1733e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1734e126ba97SEli Cohen } else { 173519098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 173619098df2Smajd@mellanox.com base); 1737e126ba97SEli Cohen if (err) 1738e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1739e126ba97SEli Cohen } 1740e126ba97SEli Cohen 1741e126ba97SEli Cohen if (err) 1742e126ba97SEli Cohen return err; 1743e126ba97SEli Cohen } else { 17441b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1745e126ba97SEli Cohen if (!in) 1746e126ba97SEli Cohen return -ENOMEM; 1747e126ba97SEli Cohen 1748e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1749e126ba97SEli Cohen } 1750e126ba97SEli Cohen 1751e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1752e126ba97SEli Cohen qp->port = init_attr->port_num; 1753e126ba97SEli Cohen 175409a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 175509a7d9ecSSaeed Mahameed 175609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, st, to_mlx5_st(init_attr->qp_type)); 175709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1758e126ba97SEli Cohen 1759e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 176009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1761e126ba97SEli Cohen else 176209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 176309a7d9ecSSaeed Mahameed 1764e126ba97SEli Cohen 1765e126ba97SEli Cohen if (qp->wq_sig) 176609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1767e126ba97SEli Cohen 1768f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 176909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1770f360d88aSEli Cohen 1771051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 177209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1773051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 177409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1775051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 177609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1777051f2630SLeon Romanovsky 1778e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1779e126ba97SEli Cohen int rcqe_sz; 1780e126ba97SEli Cohen int scqe_sz; 1781e126ba97SEli Cohen 1782e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1783e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1784e126ba97SEli Cohen 1785e126ba97SEli Cohen if (rcqe_sz == 128) 178609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1787e126ba97SEli Cohen else 178809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1789e126ba97SEli Cohen 1790e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1791e126ba97SEli Cohen if (scqe_sz == 128) 179209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1793e126ba97SEli Cohen else 179409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1795e126ba97SEli Cohen } 1796e126ba97SEli Cohen } 1797e126ba97SEli Cohen 1798e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 179909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 180009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1801e126ba97SEli Cohen } 1802e126ba97SEli Cohen 180309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1804e126ba97SEli Cohen 18053fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 180609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 18073fd3307eSArtemy Kovalyov } else { 180809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 18093fd3307eSArtemy Kovalyov if (init_attr->srq && 18103fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 18113fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 18123fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 18133fd3307eSArtemy Kovalyov } 1814e126ba97SEli Cohen 1815e126ba97SEli Cohen /* Set default resources */ 1816e126ba97SEli Cohen switch (init_attr->qp_type) { 1817e126ba97SEli Cohen case IB_QPT_XRC_TGT: 181809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 181909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 182009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 182109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1822e126ba97SEli Cohen break; 1823e126ba97SEli Cohen case IB_QPT_XRC_INI: 182409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 182509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 182609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1827e126ba97SEli Cohen break; 1828e126ba97SEli Cohen default: 1829e126ba97SEli Cohen if (init_attr->srq) { 183009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 183109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1832e126ba97SEli Cohen } else { 183309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 183409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1835e126ba97SEli Cohen } 1836e126ba97SEli Cohen } 1837e126ba97SEli Cohen 1838e126ba97SEli Cohen if (init_attr->send_cq) 183909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1840e126ba97SEli Cohen 1841e126ba97SEli Cohen if (init_attr->recv_cq) 184209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1843e126ba97SEli Cohen 184409a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1845e126ba97SEli Cohen 1846cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 184709a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1848cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 184909a7d9ecSSaeed Mahameed 1850f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1851f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1852f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1853f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1854f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1855f0313965SErez Shitrit } 1856cfb5e088SHaggai Abramovsky 1857b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 1858b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 1859b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 1860b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 1861b1383aa6SNoa Osherovich goto err; 1862b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1863b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 1864b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 1865b1383aa6SNoa Osherovich } else { 1866b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 1867b1383aa6SNoa Osherovich } 1868b1383aa6SNoa Osherovich } 1869b1383aa6SNoa Osherovich 1870c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 1871c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 18720fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 18730fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 18740fb2ed66Smajd@mellanox.com err = create_raw_packet_qp(dev, qp, in, pd); 18750fb2ed66Smajd@mellanox.com } else { 187619098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 18770fb2ed66Smajd@mellanox.com } 18780fb2ed66Smajd@mellanox.com 1879e126ba97SEli Cohen if (err) { 1880e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1881e126ba97SEli Cohen goto err_create; 1882e126ba97SEli Cohen } 1883e126ba97SEli Cohen 1884479163f4SAl Viro kvfree(in); 1885e126ba97SEli Cohen 188619098df2Smajd@mellanox.com base->container_mibqp = qp; 188719098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1888e126ba97SEli Cohen 188989ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 189089ea94a7SMaor Gottlieb &send_cq, &recv_cq); 189189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 189289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 189389ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 189489ea94a7SMaor Gottlieb * flow 189589ea94a7SMaor Gottlieb */ 189689ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 189789ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 189889ea94a7SMaor Gottlieb */ 189989ea94a7SMaor Gottlieb if (send_cq) 190089ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 190189ea94a7SMaor Gottlieb if (recv_cq) 190289ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 190389ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 190489ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 190589ea94a7SMaor Gottlieb 1906e126ba97SEli Cohen return 0; 1907e126ba97SEli Cohen 1908e126ba97SEli Cohen err_create: 1909e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 1910b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 1911e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1912e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1913e126ba97SEli Cohen 1914b1383aa6SNoa Osherovich err: 1915479163f4SAl Viro kvfree(in); 1916e126ba97SEli Cohen return err; 1917e126ba97SEli Cohen } 1918e126ba97SEli Cohen 1919e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1920e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1921e126ba97SEli Cohen { 1922e126ba97SEli Cohen if (send_cq) { 1923e126ba97SEli Cohen if (recv_cq) { 1924e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 192589ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1926e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1927e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1928e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 192989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1930e126ba97SEli Cohen __acquire(&recv_cq->lock); 1931e126ba97SEli Cohen } else { 193289ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 1933e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1934e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1935e126ba97SEli Cohen } 1936e126ba97SEli Cohen } else { 193789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 19386a4f139aSEli Cohen __acquire(&recv_cq->lock); 1939e126ba97SEli Cohen } 1940e126ba97SEli Cohen } else if (recv_cq) { 194189ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 19426a4f139aSEli Cohen __acquire(&send_cq->lock); 19436a4f139aSEli Cohen } else { 19446a4f139aSEli Cohen __acquire(&send_cq->lock); 19456a4f139aSEli Cohen __acquire(&recv_cq->lock); 1946e126ba97SEli Cohen } 1947e126ba97SEli Cohen } 1948e126ba97SEli Cohen 1949e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1950e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 1951e126ba97SEli Cohen { 1952e126ba97SEli Cohen if (send_cq) { 1953e126ba97SEli Cohen if (recv_cq) { 1954e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 1955e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 195689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1957e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 1958e126ba97SEli Cohen __release(&recv_cq->lock); 195989ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1960e126ba97SEli Cohen } else { 1961e126ba97SEli Cohen spin_unlock(&send_cq->lock); 196289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 1963e126ba97SEli Cohen } 1964e126ba97SEli Cohen } else { 19656a4f139aSEli Cohen __release(&recv_cq->lock); 196689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1967e126ba97SEli Cohen } 1968e126ba97SEli Cohen } else if (recv_cq) { 19696a4f139aSEli Cohen __release(&send_cq->lock); 197089ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 19716a4f139aSEli Cohen } else { 19726a4f139aSEli Cohen __release(&recv_cq->lock); 19736a4f139aSEli Cohen __release(&send_cq->lock); 1974e126ba97SEli Cohen } 1975e126ba97SEli Cohen } 1976e126ba97SEli Cohen 1977e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 1978e126ba97SEli Cohen { 1979e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 1980e126ba97SEli Cohen } 1981e126ba97SEli Cohen 198289ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 198389ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 1984e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 1985e126ba97SEli Cohen { 198689ea94a7SMaor Gottlieb switch (qp_type) { 1987e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1988e126ba97SEli Cohen *send_cq = NULL; 1989e126ba97SEli Cohen *recv_cq = NULL; 1990e126ba97SEli Cohen break; 1991e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 1992e126ba97SEli Cohen case IB_QPT_XRC_INI: 199389ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 1994e126ba97SEli Cohen *recv_cq = NULL; 1995e126ba97SEli Cohen break; 1996e126ba97SEli Cohen 1997e126ba97SEli Cohen case IB_QPT_SMI: 1998d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 1999e126ba97SEli Cohen case IB_QPT_RC: 2000e126ba97SEli Cohen case IB_QPT_UC: 2001e126ba97SEli Cohen case IB_QPT_UD: 2002e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2003e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 20040fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 200589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 200689ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2007e126ba97SEli Cohen break; 2008e126ba97SEli Cohen 2009e126ba97SEli Cohen case IB_QPT_MAX: 2010e126ba97SEli Cohen default: 2011e126ba97SEli Cohen *send_cq = NULL; 2012e126ba97SEli Cohen *recv_cq = NULL; 2013e126ba97SEli Cohen break; 2014e126ba97SEli Cohen } 2015e126ba97SEli Cohen } 2016e126ba97SEli Cohen 2017ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 201813eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 201913eab21fSAviv Heller u8 lag_tx_affinity); 2020ad5f8e96Smajd@mellanox.com 2021e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2022e126ba97SEli Cohen { 2023e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2024c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 202589ea94a7SMaor Gottlieb unsigned long flags; 2026e126ba97SEli Cohen int err; 2027e126ba97SEli Cohen 202828d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 202928d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 203028d61370SYishai Hadas return; 203128d61370SYishai Hadas } 203228d61370SYishai Hadas 2033c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2034c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 20350fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 20360fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 20370fb2ed66Smajd@mellanox.com 20386aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2039c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2040c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2041ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 20421a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 20431a412fb1SSaeed Mahameed NULL, &base->mqp); 2044ad5f8e96Smajd@mellanox.com } else { 20450680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 20460680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 20470680efa2SAlex Vesker }; 20480680efa2SAlex Vesker 204913eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2050ad5f8e96Smajd@mellanox.com } 2051ad5f8e96Smajd@mellanox.com if (err) 2052427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 205319098df2Smajd@mellanox.com base->mqp.qpn); 20546aec21f6SHaggai Eran } 2055e126ba97SEli Cohen 205689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 205789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 205889ea94a7SMaor Gottlieb 205989ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 206089ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 206189ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 206289ea94a7SMaor Gottlieb list_del(&qp->qps_list); 206389ea94a7SMaor Gottlieb if (send_cq) 206489ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 206589ea94a7SMaor Gottlieb 206689ea94a7SMaor Gottlieb if (recv_cq) 206789ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2068e126ba97SEli Cohen 2069e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 207019098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2071e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2072e126ba97SEli Cohen if (send_cq != recv_cq) 207319098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 207419098df2Smajd@mellanox.com NULL); 2075e126ba97SEli Cohen } 207689ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 207789ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2078e126ba97SEli Cohen 2079c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2080c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 20810fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 20820fb2ed66Smajd@mellanox.com } else { 208319098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2084e126ba97SEli Cohen if (err) 20850fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 20860fb2ed66Smajd@mellanox.com base->mqp.qpn); 20870fb2ed66Smajd@mellanox.com } 2088e126ba97SEli Cohen 2089e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2090e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2091e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2092b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2093e126ba97SEli Cohen } 2094e126ba97SEli Cohen 2095e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2096e126ba97SEli Cohen { 2097e126ba97SEli Cohen switch (type) { 2098e126ba97SEli Cohen case IB_QPT_SMI: 2099e126ba97SEli Cohen return "IB_QPT_SMI"; 2100e126ba97SEli Cohen case IB_QPT_GSI: 2101e126ba97SEli Cohen return "IB_QPT_GSI"; 2102e126ba97SEli Cohen case IB_QPT_RC: 2103e126ba97SEli Cohen return "IB_QPT_RC"; 2104e126ba97SEli Cohen case IB_QPT_UC: 2105e126ba97SEli Cohen return "IB_QPT_UC"; 2106e126ba97SEli Cohen case IB_QPT_UD: 2107e126ba97SEli Cohen return "IB_QPT_UD"; 2108e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2109e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2110e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2111e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2112e126ba97SEli Cohen case IB_QPT_XRC_INI: 2113e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2114e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2115e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2116e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2117e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2118e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2119e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2120b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2121b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2122e126ba97SEli Cohen case IB_QPT_MAX: 2123e126ba97SEli Cohen default: 2124e126ba97SEli Cohen return "Invalid QP type"; 2125e126ba97SEli Cohen } 2126e126ba97SEli Cohen } 2127e126ba97SEli Cohen 2128b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2129b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2130b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2131b4aaa1f0SMoni Shoua { 2132b4aaa1f0SMoni Shoua struct mlx5_ib_dev *dev; 2133b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2134b4aaa1f0SMoni Shoua int err = 0; 2135b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2136b4aaa1f0SMoni Shoua void *dctc; 2137b4aaa1f0SMoni Shoua 2138b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2139b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2140b4aaa1f0SMoni Shoua 2141b4aaa1f0SMoni Shoua dev = to_mdev(pd->device); 2142b4aaa1f0SMoni Shoua 2143b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2144b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2145b4aaa1f0SMoni Shoua if (err) 2146b4aaa1f0SMoni Shoua return ERR_PTR(err); 2147b4aaa1f0SMoni Shoua 2148b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2149b4aaa1f0SMoni Shoua if (!qp) 2150b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2151b4aaa1f0SMoni Shoua 2152b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2153b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2154b4aaa1f0SMoni Shoua err = -ENOMEM; 2155b4aaa1f0SMoni Shoua goto err_free; 2156b4aaa1f0SMoni Shoua } 2157b4aaa1f0SMoni Shoua 2158b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2159776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2160b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2161b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2162b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2163b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2164b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2165b4aaa1f0SMoni Shoua 2166b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2167b4aaa1f0SMoni Shoua 2168b4aaa1f0SMoni Shoua return &qp->ibqp; 2169b4aaa1f0SMoni Shoua err_free: 2170b4aaa1f0SMoni Shoua kfree(qp); 2171b4aaa1f0SMoni Shoua return ERR_PTR(err); 2172b4aaa1f0SMoni Shoua } 2173b4aaa1f0SMoni Shoua 2174b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2175e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2176b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2177b4aaa1f0SMoni Shoua struct ib_udata *udata) 2178b4aaa1f0SMoni Shoua { 2179b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2180b4aaa1f0SMoni Shoua int err; 2181b4aaa1f0SMoni Shoua 2182b4aaa1f0SMoni Shoua if (!udata) 2183b4aaa1f0SMoni Shoua return -EINVAL; 2184b4aaa1f0SMoni Shoua 2185b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2186b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2187b4aaa1f0SMoni Shoua return -EINVAL; 2188b4aaa1f0SMoni Shoua } 2189b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2190b4aaa1f0SMoni Shoua if (err) 2191b4aaa1f0SMoni Shoua return err; 2192b4aaa1f0SMoni Shoua 2193b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2194b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2195b4aaa1f0SMoni Shoua } else { 2196b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2197b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2198b4aaa1f0SMoni Shoua } else { 2199b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2200b4aaa1f0SMoni Shoua return -EINVAL; 2201b4aaa1f0SMoni Shoua } 2202b4aaa1f0SMoni Shoua } 2203b4aaa1f0SMoni Shoua 2204b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2205b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2206b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2207b4aaa1f0SMoni Shoua } 2208b4aaa1f0SMoni Shoua 2209b4aaa1f0SMoni Shoua return 0; 2210b4aaa1f0SMoni Shoua } 2211b4aaa1f0SMoni Shoua 2212b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2213b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2214e126ba97SEli Cohen struct ib_udata *udata) 2215e126ba97SEli Cohen { 2216e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2217e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2218e126ba97SEli Cohen u16 xrcdn = 0; 2219e126ba97SEli Cohen int err; 2220b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2221b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2222e126ba97SEli Cohen 2223e126ba97SEli Cohen if (pd) { 2224e126ba97SEli Cohen dev = to_mdev(pd->device); 22250fb2ed66Smajd@mellanox.com 22260fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 22270fb2ed66Smajd@mellanox.com if (!pd->uobject) { 22280fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 22290fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22300fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 22310fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 22320fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22330fb2ed66Smajd@mellanox.com } 22340fb2ed66Smajd@mellanox.com } 223509f16cf5SMajd Dibbiny } else { 223609f16cf5SMajd Dibbiny /* being cautious here */ 223709f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 223809f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 223909f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 224009f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 224109f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 224209f16cf5SMajd Dibbiny } 224309f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2244e126ba97SEli Cohen } 2245e126ba97SEli Cohen 2246b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2247b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2248b4aaa1f0SMoni Shoua 2249b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2250b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2251b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2252b4aaa1f0SMoni Shoua if (err) 2253b4aaa1f0SMoni Shoua return ERR_PTR(err); 2254c32a4f29SMoni Shoua 2255c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2256c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2257c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2258c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2259c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2260c32a4f29SMoni Shoua } 2261776a3906SMoni Shoua } else { 2262776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2263c32a4f29SMoni Shoua } 2264b4aaa1f0SMoni Shoua } 2265b4aaa1f0SMoni Shoua 2266e126ba97SEli Cohen switch (init_attr->qp_type) { 2267e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2268e126ba97SEli Cohen case IB_QPT_XRC_INI: 2269938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2270e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2271e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2272e126ba97SEli Cohen } 2273e126ba97SEli Cohen init_attr->recv_cq = NULL; 2274e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2275e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2276e126ba97SEli Cohen init_attr->send_cq = NULL; 2277e126ba97SEli Cohen } 2278e126ba97SEli Cohen 2279e126ba97SEli Cohen /* fall through */ 22800fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2281e126ba97SEli Cohen case IB_QPT_RC: 2282e126ba97SEli Cohen case IB_QPT_UC: 2283e126ba97SEli Cohen case IB_QPT_UD: 2284e126ba97SEli Cohen case IB_QPT_SMI: 2285d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2286e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2287c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2288e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2289e126ba97SEli Cohen if (!qp) 2290e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2291e126ba97SEli Cohen 2292e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2293e126ba97SEli Cohen if (err) { 2294e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2295e126ba97SEli Cohen kfree(qp); 2296e126ba97SEli Cohen return ERR_PTR(err); 2297e126ba97SEli Cohen } 2298e126ba97SEli Cohen 2299e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2300e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2301e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2302e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2303e126ba97SEli Cohen else 230419098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2305e126ba97SEli Cohen 2306e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 230719098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2308a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2309a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2310e126ba97SEli Cohen 231119098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2312e126ba97SEli Cohen 2313e126ba97SEli Cohen break; 2314e126ba97SEli Cohen 2315d16e91daSHaggai Eran case IB_QPT_GSI: 2316d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2317d16e91daSHaggai Eran 2318e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2319e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2320e126ba97SEli Cohen case IB_QPT_MAX: 2321e126ba97SEli Cohen default: 2322e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2323e126ba97SEli Cohen init_attr->qp_type); 2324e126ba97SEli Cohen /* Don't support raw QPs */ 2325e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2326e126ba97SEli Cohen } 2327e126ba97SEli Cohen 2328b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2329b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2330b4aaa1f0SMoni Shoua 2331e126ba97SEli Cohen return &qp->ibqp; 2332e126ba97SEli Cohen } 2333e126ba97SEli Cohen 2334776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2335776a3906SMoni Shoua { 2336776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2337776a3906SMoni Shoua 2338776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2339776a3906SMoni Shoua int err; 2340776a3906SMoni Shoua 2341776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2342776a3906SMoni Shoua if (err) { 2343776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2344776a3906SMoni Shoua return err; 2345776a3906SMoni Shoua } 2346776a3906SMoni Shoua } 2347776a3906SMoni Shoua 2348776a3906SMoni Shoua kfree(mqp->dct.in); 2349776a3906SMoni Shoua kfree(mqp); 2350776a3906SMoni Shoua return 0; 2351776a3906SMoni Shoua } 2352776a3906SMoni Shoua 2353e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2354e126ba97SEli Cohen { 2355e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2356e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2357e126ba97SEli Cohen 2358d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2359d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2360d16e91daSHaggai Eran 2361776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2362776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2363776a3906SMoni Shoua 2364e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2365e126ba97SEli Cohen 2366e126ba97SEli Cohen kfree(mqp); 2367e126ba97SEli Cohen 2368e126ba97SEli Cohen return 0; 2369e126ba97SEli Cohen } 2370e126ba97SEli Cohen 2371e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2372e126ba97SEli Cohen int attr_mask) 2373e126ba97SEli Cohen { 2374e126ba97SEli Cohen u32 hw_access_flags = 0; 2375e126ba97SEli Cohen u8 dest_rd_atomic; 2376e126ba97SEli Cohen u32 access_flags; 2377e126ba97SEli Cohen 2378e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2379e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2380e126ba97SEli Cohen else 238119098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2382e126ba97SEli Cohen 2383e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2384e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2385e126ba97SEli Cohen else 238619098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2387e126ba97SEli Cohen 2388e126ba97SEli Cohen if (!dest_rd_atomic) 2389e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2390e126ba97SEli Cohen 2391e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2392e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2393e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2394e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2395e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2396e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2397e126ba97SEli Cohen 2398e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2399e126ba97SEli Cohen } 2400e126ba97SEli Cohen 2401e126ba97SEli Cohen enum { 2402e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2403e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2404e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2405e126ba97SEli Cohen }; 2406e126ba97SEli Cohen 2407e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2408e126ba97SEli Cohen { 2409e126ba97SEli Cohen if (rate == IB_RATE_PORT_CURRENT) { 2410e126ba97SEli Cohen return 0; 2411e126ba97SEli Cohen } else if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) { 2412e126ba97SEli Cohen return -EINVAL; 2413e126ba97SEli Cohen } else { 2414e126ba97SEli Cohen while (rate != IB_RATE_2_5_GBPS && 2415e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2416938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2417e126ba97SEli Cohen --rate; 2418e126ba97SEli Cohen } 2419e126ba97SEli Cohen 2420e126ba97SEli Cohen return rate + MLX5_STAT_RATE_OFFSET; 2421e126ba97SEli Cohen } 2422e126ba97SEli Cohen 242375850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 242475850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 242575850d0bSmajd@mellanox.com { 242675850d0bSmajd@mellanox.com void *in; 242775850d0bSmajd@mellanox.com void *tisc; 242875850d0bSmajd@mellanox.com int inlen; 242975850d0bSmajd@mellanox.com int err; 243075850d0bSmajd@mellanox.com 243175850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24321b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 243375850d0bSmajd@mellanox.com if (!in) 243475850d0bSmajd@mellanox.com return -ENOMEM; 243575850d0bSmajd@mellanox.com 243675850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 243775850d0bSmajd@mellanox.com 243875850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 243975850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 244075850d0bSmajd@mellanox.com 244175850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 244275850d0bSmajd@mellanox.com 244375850d0bSmajd@mellanox.com kvfree(in); 244475850d0bSmajd@mellanox.com 244575850d0bSmajd@mellanox.com return err; 244675850d0bSmajd@mellanox.com } 244775850d0bSmajd@mellanox.com 244813eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 244913eab21fSAviv Heller struct mlx5_ib_sq *sq, u8 tx_affinity) 245013eab21fSAviv Heller { 245113eab21fSAviv Heller void *in; 245213eab21fSAviv Heller void *tisc; 245313eab21fSAviv Heller int inlen; 245413eab21fSAviv Heller int err; 245513eab21fSAviv Heller 245613eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24571b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 245813eab21fSAviv Heller if (!in) 245913eab21fSAviv Heller return -ENOMEM; 246013eab21fSAviv Heller 246113eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 246213eab21fSAviv Heller 246313eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 246413eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 246513eab21fSAviv Heller 246613eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 246713eab21fSAviv Heller 246813eab21fSAviv Heller kvfree(in); 246913eab21fSAviv Heller 247013eab21fSAviv Heller return err; 247113eab21fSAviv Heller } 247213eab21fSAviv Heller 247375850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 247490898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2475e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2476f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2477f879ee8dSAchiad Shochat bool alt) 2478e126ba97SEli Cohen { 2479d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2480e126ba97SEli Cohen int err; 2481ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2482d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2483d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2484e126ba97SEli Cohen 2485e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2486f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2487f879ee8dSAchiad Shochat attr->pkey_index); 2488e126ba97SEli Cohen 2489d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2490d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2491938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2492f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2493d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2494938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2495f83b4263SEli Cohen return -EINVAL; 2496f83b4263SEli Cohen } 24972811ba51SAchiad Shochat } 249844c58487SDasaratharaman Chandramouli 249944c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2500d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 25012811ba51SAchiad Shochat return -EINVAL; 2502d8966fcdSDasaratharaman Chandramouli err = mlx5_get_roce_gid_type(dev, port, grh->sgid_index, 2503ed88451eSMajd Dibbiny &gid_type); 2504ed88451eSMajd Dibbiny if (err) 2505ed88451eSMajd Dibbiny return err; 250644c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 25072b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 25082b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 25092b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 25102b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 25112811ba51SAchiad Shochat path->udp_sport = mlx5_get_roce_udp_sport(dev, port, 2512d8966fcdSDasaratharaman Chandramouli grh->sgid_index); 2513d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 2514ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2515d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 25162811ba51SAchiad Shochat } else { 2517d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2518d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2519d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2520d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2521d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2522d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2523e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2524d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 25252811ba51SAchiad Shochat } 25262811ba51SAchiad Shochat 2527d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2528d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2529d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2530e126ba97SEli Cohen path->tclass_flowlabel = 2531d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2532d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2533d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2534e126ba97SEli Cohen } 2535e126ba97SEli Cohen 2536d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2537e126ba97SEli Cohen if (err < 0) 2538e126ba97SEli Cohen return err; 2539e126ba97SEli Cohen path->static_rate = err; 2540e126ba97SEli Cohen path->port = port; 2541e126ba97SEli Cohen 2542e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2543f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2544e126ba97SEli Cohen 254575850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 254675850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 254775850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 2548d8966fcdSDasaratharaman Chandramouli sl & 0xf); 254975850d0bSmajd@mellanox.com 2550e126ba97SEli Cohen return 0; 2551e126ba97SEli Cohen } 2552e126ba97SEli Cohen 2553e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2554e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2555e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2556e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2557e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2558e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2559e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2560e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2561e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2562e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2563e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2564e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2565e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2566e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2567e126ba97SEli Cohen }, 2568e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2569e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2570e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2571e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2572e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2573e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2574e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2575e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2576e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2577e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2578e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2579e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2580e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2581a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2582a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2583a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2584a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2585a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2586e126ba97SEli Cohen }, 2587e126ba97SEli Cohen }, 2588e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2589e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2590e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2591e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2592e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2593e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2594e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2595e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2596e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2597e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2598e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2599e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2600e126ba97SEli Cohen }, 2601e126ba97SEli Cohen }, 2602e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2603e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2604e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2605e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2606e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2607e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2608c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2609c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2610e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2611c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2612c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2613e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2614e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2615e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2616e126ba97SEli Cohen }, 2617e126ba97SEli Cohen }, 2618e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2619e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2620e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2621e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 262275959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2623a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2624a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2625a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2626a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2627e126ba97SEli Cohen }, 2628e126ba97SEli Cohen }, 2629e126ba97SEli Cohen }; 2630e126ba97SEli Cohen 2631e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2632e126ba97SEli Cohen { 2633e126ba97SEli Cohen switch (ib_mask) { 2634e126ba97SEli Cohen case IB_QP_STATE: 2635e126ba97SEli Cohen return 0; 2636e126ba97SEli Cohen case IB_QP_CUR_STATE: 2637e126ba97SEli Cohen return 0; 2638e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2639e126ba97SEli Cohen return 0; 2640e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2641e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2642e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2643e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2644e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2645e126ba97SEli Cohen case IB_QP_PORT: 2646e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2647e126ba97SEli Cohen case IB_QP_QKEY: 2648e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2649e126ba97SEli Cohen case IB_QP_AV: 2650e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2651e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2652e126ba97SEli Cohen case IB_QP_PATH_MTU: 2653e126ba97SEli Cohen return 0; 2654e126ba97SEli Cohen case IB_QP_TIMEOUT: 2655e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2656e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2657e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2658e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2659e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2660e126ba97SEli Cohen case IB_QP_RQ_PSN: 2661e126ba97SEli Cohen return 0; 2662e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2663e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2664e126ba97SEli Cohen case IB_QP_ALT_PATH: 2665e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2666e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2667e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2668e126ba97SEli Cohen case IB_QP_SQ_PSN: 2669e126ba97SEli Cohen return 0; 2670e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2671e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2672e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2673e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2674e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2675e126ba97SEli Cohen case IB_QP_CAP: 2676e126ba97SEli Cohen return 0; 2677e126ba97SEli Cohen case IB_QP_DEST_QPN: 2678e126ba97SEli Cohen return 0; 2679e126ba97SEli Cohen } 2680e126ba97SEli Cohen return 0; 2681e126ba97SEli Cohen } 2682e126ba97SEli Cohen 2683e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2684e126ba97SEli Cohen { 2685e126ba97SEli Cohen int result = 0; 2686e126ba97SEli Cohen int i; 2687e126ba97SEli Cohen 2688e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2689e126ba97SEli Cohen if ((1 << i) & ib_mask) 2690e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2691e126ba97SEli Cohen } 2692e126ba97SEli Cohen 2693e126ba97SEli Cohen return result; 2694e126ba97SEli Cohen } 2695e126ba97SEli Cohen 2696eb49ab0cSAlex Vesker static int modify_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 2697eb49ab0cSAlex Vesker struct mlx5_ib_rq *rq, int new_state, 2698eb49ab0cSAlex Vesker const struct mlx5_modify_raw_qp_param *raw_qp_param) 2699ad5f8e96Smajd@mellanox.com { 2700ad5f8e96Smajd@mellanox.com void *in; 2701ad5f8e96Smajd@mellanox.com void *rqc; 2702ad5f8e96Smajd@mellanox.com int inlen; 2703ad5f8e96Smajd@mellanox.com int err; 2704ad5f8e96Smajd@mellanox.com 2705ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 27061b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2707ad5f8e96Smajd@mellanox.com if (!in) 2708ad5f8e96Smajd@mellanox.com return -ENOMEM; 2709ad5f8e96Smajd@mellanox.com 2710ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2711ad5f8e96Smajd@mellanox.com 2712ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2713ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2714ad5f8e96Smajd@mellanox.com 2715eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2716eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2717eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 271823a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2719eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2720eb49ab0cSAlex Vesker } else 2721eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2722eb49ab0cSAlex Vesker dev->ib_dev.name); 2723eb49ab0cSAlex Vesker } 2724eb49ab0cSAlex Vesker 2725eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2726ad5f8e96Smajd@mellanox.com if (err) 2727ad5f8e96Smajd@mellanox.com goto out; 2728ad5f8e96Smajd@mellanox.com 2729ad5f8e96Smajd@mellanox.com rq->state = new_state; 2730ad5f8e96Smajd@mellanox.com 2731ad5f8e96Smajd@mellanox.com out: 2732ad5f8e96Smajd@mellanox.com kvfree(in); 2733ad5f8e96Smajd@mellanox.com return err; 2734ad5f8e96Smajd@mellanox.com } 2735ad5f8e96Smajd@mellanox.com 2736ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 27377d29f349SBodong Wang struct mlx5_ib_sq *sq, 27387d29f349SBodong Wang int new_state, 27397d29f349SBodong Wang const struct mlx5_modify_raw_qp_param *raw_qp_param) 2740ad5f8e96Smajd@mellanox.com { 27417d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 27427d29f349SBodong Wang u32 old_rate = ibqp->rate_limit; 27437d29f349SBodong Wang u32 new_rate = old_rate; 27447d29f349SBodong Wang u16 rl_index = 0; 2745ad5f8e96Smajd@mellanox.com void *in; 2746ad5f8e96Smajd@mellanox.com void *sqc; 2747ad5f8e96Smajd@mellanox.com int inlen; 2748ad5f8e96Smajd@mellanox.com int err; 2749ad5f8e96Smajd@mellanox.com 2750ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 27511b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2752ad5f8e96Smajd@mellanox.com if (!in) 2753ad5f8e96Smajd@mellanox.com return -ENOMEM; 2754ad5f8e96Smajd@mellanox.com 2755ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2756ad5f8e96Smajd@mellanox.com 2757ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2758ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2759ad5f8e96Smajd@mellanox.com 27607d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 27617d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 27627d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 27637d29f349SBodong Wang __func__); 27647d29f349SBodong Wang else 27657d29f349SBodong Wang new_rate = raw_qp_param->rate_limit; 27667d29f349SBodong Wang } 2767ad5f8e96Smajd@mellanox.com 27687d29f349SBodong Wang if (old_rate != new_rate) { 27697d29f349SBodong Wang if (new_rate) { 27707d29f349SBodong Wang err = mlx5_rl_add_rate(dev, new_rate, &rl_index); 27717d29f349SBodong Wang if (err) { 27727d29f349SBodong Wang pr_err("Failed configuring rate %u: %d\n", 27737d29f349SBodong Wang new_rate, err); 27747d29f349SBodong Wang goto out; 27757d29f349SBodong Wang } 27767d29f349SBodong Wang } 27777d29f349SBodong Wang 27787d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 27797d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 27807d29f349SBodong Wang } 27817d29f349SBodong Wang 27827d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 27837d29f349SBodong Wang if (err) { 27847d29f349SBodong Wang /* Remove new rate from table if failed */ 27857d29f349SBodong Wang if (new_rate && 27867d29f349SBodong Wang old_rate != new_rate) 27877d29f349SBodong Wang mlx5_rl_remove_rate(dev, new_rate); 27887d29f349SBodong Wang goto out; 27897d29f349SBodong Wang } 27907d29f349SBodong Wang 27917d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 27927d29f349SBodong Wang if ((old_rate && 27937d29f349SBodong Wang (old_rate != new_rate)) || 27947d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 27957d29f349SBodong Wang mlx5_rl_remove_rate(dev, old_rate); 27967d29f349SBodong Wang 27977d29f349SBodong Wang ibqp->rate_limit = new_rate; 2798ad5f8e96Smajd@mellanox.com sq->state = new_state; 2799ad5f8e96Smajd@mellanox.com 2800ad5f8e96Smajd@mellanox.com out: 2801ad5f8e96Smajd@mellanox.com kvfree(in); 2802ad5f8e96Smajd@mellanox.com return err; 2803ad5f8e96Smajd@mellanox.com } 2804ad5f8e96Smajd@mellanox.com 2805ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 280613eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 280713eab21fSAviv Heller u8 tx_affinity) 2808ad5f8e96Smajd@mellanox.com { 2809ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2810ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2811ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 28127d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 28137d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2814ad5f8e96Smajd@mellanox.com int rq_state; 2815ad5f8e96Smajd@mellanox.com int sq_state; 2816ad5f8e96Smajd@mellanox.com int err; 2817ad5f8e96Smajd@mellanox.com 28180680efa2SAlex Vesker switch (raw_qp_param->operation) { 2819ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2820ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2821ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2822ad5f8e96Smajd@mellanox.com break; 2823ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2824ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2825ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2826ad5f8e96Smajd@mellanox.com break; 2827ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2828ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2829ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2830ad5f8e96Smajd@mellanox.com break; 2831ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2832ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 28337d29f349SBodong Wang if (raw_qp_param->set_mask == 28347d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 28357d29f349SBodong Wang modify_rq = 0; 28367d29f349SBodong Wang sq_state = sq->state; 28377d29f349SBodong Wang } else { 28387d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 28397d29f349SBodong Wang } 28407d29f349SBodong Wang break; 28417d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 28427d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2843eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2844eb49ab0cSAlex Vesker return -EINVAL; 2845eb49ab0cSAlex Vesker else 2846ad5f8e96Smajd@mellanox.com return 0; 2847ad5f8e96Smajd@mellanox.com default: 2848ad5f8e96Smajd@mellanox.com WARN_ON(1); 2849ad5f8e96Smajd@mellanox.com return -EINVAL; 2850ad5f8e96Smajd@mellanox.com } 2851ad5f8e96Smajd@mellanox.com 28527d29f349SBodong Wang if (modify_rq) { 2853eb49ab0cSAlex Vesker err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param); 2854ad5f8e96Smajd@mellanox.com if (err) 2855ad5f8e96Smajd@mellanox.com return err; 2856ad5f8e96Smajd@mellanox.com } 2857ad5f8e96Smajd@mellanox.com 28587d29f349SBodong Wang if (modify_sq) { 285913eab21fSAviv Heller if (tx_affinity) { 286013eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 286113eab21fSAviv Heller tx_affinity); 286213eab21fSAviv Heller if (err) 286313eab21fSAviv Heller return err; 286413eab21fSAviv Heller } 286513eab21fSAviv Heller 28667d29f349SBodong Wang return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, raw_qp_param); 286713eab21fSAviv Heller } 2868ad5f8e96Smajd@mellanox.com 2869ad5f8e96Smajd@mellanox.com return 0; 2870ad5f8e96Smajd@mellanox.com } 2871ad5f8e96Smajd@mellanox.com 2872e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2873e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 2874e126ba97SEli Cohen enum ib_qp_state cur_state, enum ib_qp_state new_state) 2875e126ba97SEli Cohen { 2876427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2877427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2878427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2879427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2880427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2881427c1e7bSmajd@mellanox.com }, 2882427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2883427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2884427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2885427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2886427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2887427c1e7bSmajd@mellanox.com }, 2888427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2889427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2890427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2891427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2892427c1e7bSmajd@mellanox.com }, 2893427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2894427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2895427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2896427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2897427c1e7bSmajd@mellanox.com }, 2898427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2899427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2900427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2901427c1e7bSmajd@mellanox.com }, 2902427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2903427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2904427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2905427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2906427c1e7bSmajd@mellanox.com }, 2907427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2908427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2909427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2910427c1e7bSmajd@mellanox.com } 2911427c1e7bSmajd@mellanox.com }; 2912427c1e7bSmajd@mellanox.com 2913e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2914e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 291519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2916e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2917e126ba97SEli Cohen struct mlx5_qp_context *context; 2918e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2919eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 2920e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2921e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2922e126ba97SEli Cohen int mlx5_st; 2923e126ba97SEli Cohen int err; 2924427c1e7bSmajd@mellanox.com u16 op; 292513eab21fSAviv Heller u8 tx_affinity = 0; 2926e126ba97SEli Cohen 29271a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 29281a412fb1SSaeed Mahameed if (!context) 2929e126ba97SEli Cohen return -ENOMEM; 2930e126ba97SEli Cohen 2931c32a4f29SMoni Shoua err = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 2932c32a4f29SMoni Shoua qp->qp_sub_type : ibqp->qp_type); 2933158abf86SHaggai Eran if (err < 0) { 2934158abf86SHaggai Eran mlx5_ib_dbg(dev, "unsupported qp type %d\n", ibqp->qp_type); 2935e126ba97SEli Cohen goto out; 2936158abf86SHaggai Eran } 2937e126ba97SEli Cohen 2938e126ba97SEli Cohen context->flags = cpu_to_be32(err << 16); 2939e126ba97SEli Cohen 2940e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 2941e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2942e126ba97SEli Cohen } else { 2943e126ba97SEli Cohen switch (attr->path_mig_state) { 2944e126ba97SEli Cohen case IB_MIG_MIGRATED: 2945e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2946e126ba97SEli Cohen break; 2947e126ba97SEli Cohen case IB_MIG_REARM: 2948e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 2949e126ba97SEli Cohen break; 2950e126ba97SEli Cohen case IB_MIG_ARMED: 2951e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 2952e126ba97SEli Cohen break; 2953e126ba97SEli Cohen } 2954e126ba97SEli Cohen } 2955e126ba97SEli Cohen 295613eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 295713eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 295813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 295913eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 296013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 296113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 296213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 296313eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 296413eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 296513eab21fSAviv Heller tx_affinity = (unsigned int)atomic_add_return(1, 296613eab21fSAviv Heller &dev->roce.next_port) % 296713eab21fSAviv Heller MLX5_MAX_PORTS + 1; 296813eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 296913eab21fSAviv Heller } 297013eab21fSAviv Heller } 297113eab21fSAviv Heller } 297213eab21fSAviv Heller 2973d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 2974e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 2975c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 2976c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 2977e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 2978e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 2979e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 2980e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 2981e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 2982e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 2983e126ba97SEli Cohen err = -EINVAL; 2984e126ba97SEli Cohen goto out; 2985e126ba97SEli Cohen } 2986938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 2987938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 2988e126ba97SEli Cohen } 2989e126ba97SEli Cohen 2990e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 2991e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 2992e126ba97SEli Cohen 2993e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2994d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 2995e126ba97SEli Cohen 2996e126ba97SEli Cohen /* todo implement counter_index functionality */ 2997e126ba97SEli Cohen 2998e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 2999e126ba97SEli Cohen context->pri_path.port = qp->port; 3000e126ba97SEli Cohen 3001e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3002e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3003e126ba97SEli Cohen 3004e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 300575850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3006e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3007f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3008e126ba97SEli Cohen if (err) 3009e126ba97SEli Cohen goto out; 3010e126ba97SEli Cohen } 3011e126ba97SEli Cohen 3012e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3013e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3014e126ba97SEli Cohen 3015e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 301675850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 301775850d0bSmajd@mellanox.com &context->alt_path, 3018f879ee8dSAchiad Shochat attr->alt_port_num, 3019f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3020f879ee8dSAchiad Shochat 0, attr, true); 3021e126ba97SEli Cohen if (err) 3022e126ba97SEli Cohen goto out; 3023e126ba97SEli Cohen } 3024e126ba97SEli Cohen 3025e126ba97SEli Cohen pd = get_pd(qp); 302689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 302789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3028e126ba97SEli Cohen 3029e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3030e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3031e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3032e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3033e126ba97SEli Cohen 3034e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3035e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3036e126ba97SEli Cohen 3037e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3038e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3039e126ba97SEli Cohen 3040e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3041e126ba97SEli Cohen if (attr->max_rd_atomic) 3042e126ba97SEli Cohen context->params1 |= 3043e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3044e126ba97SEli Cohen } 3045e126ba97SEli Cohen 3046e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3047e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3048e126ba97SEli Cohen 3049e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3050e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3051e126ba97SEli Cohen context->params2 |= 3052e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3053e126ba97SEli Cohen } 3054e126ba97SEli Cohen 3055e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3056e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3057e126ba97SEli Cohen 3058e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3059e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3060e126ba97SEli Cohen 3061e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3062e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3063e126ba97SEli Cohen 3064e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3065e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3066e126ba97SEli Cohen 3067e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3068e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3069e126ba97SEli Cohen 30700837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 30710837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 30720837e86aSMark Bloch qp->port) - 1; 3073c2e53b2cSYishai Hadas 3074c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3075c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3076c2e53b2cSYishai Hadas port_num = 0; 3077c2e53b2cSYishai Hadas 3078eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 30790837e86aSMark Bloch context->qp_counter_set_usr_page |= 3080e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 30810837e86aSMark Bloch } 30820837e86aSMark Bloch 3083e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3084e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3085e126ba97SEli Cohen 3086b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3087b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3088e126ba97SEli Cohen 3089e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3090e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3091c32a4f29SMoni Shoua mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 3092c32a4f29SMoni Shoua qp->qp_sub_type : ibqp->qp_type); 309307c9113fSEli Cohen if (mlx5_st < 0) 3094e126ba97SEli Cohen goto out; 3095e126ba97SEli Cohen 3096427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 3097427c1e7bSmajd@mellanox.com !optab[mlx5_cur][mlx5_new]) 3098427c1e7bSmajd@mellanox.com goto out; 3099427c1e7bSmajd@mellanox.com 3100427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3101e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3102e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3103ad5f8e96Smajd@mellanox.com 3104c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3105c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 31060680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 31070680efa2SAlex Vesker 31080680efa2SAlex Vesker raw_qp_param.operation = op; 3109eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3110e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3111eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3112eb49ab0cSAlex Vesker } 31137d29f349SBodong Wang 31147d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 31157d29f349SBodong Wang raw_qp_param.rate_limit = attr->rate_limit; 31167d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 31177d29f349SBodong Wang } 31187d29f349SBodong Wang 311913eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 31200680efa2SAlex Vesker } else { 31211a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 312219098df2Smajd@mellanox.com &base->mqp); 31230680efa2SAlex Vesker } 31240680efa2SAlex Vesker 3125e126ba97SEli Cohen if (err) 3126e126ba97SEli Cohen goto out; 3127e126ba97SEli Cohen 3128e126ba97SEli Cohen qp->state = new_state; 3129e126ba97SEli Cohen 3130e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 313119098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3132e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 313319098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3134e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3135e126ba97SEli Cohen qp->port = attr->port_num; 3136e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 313719098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3138e126ba97SEli Cohen 3139e126ba97SEli Cohen /* 3140e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3141e126ba97SEli Cohen * entries and reinitialize the QP. 3142e126ba97SEli Cohen */ 3143e126ba97SEli Cohen if (new_state == IB_QPS_RESET && !ibqp->uobject) { 314419098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3145e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3146e126ba97SEli Cohen if (send_cq != recv_cq) 314719098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3148e126ba97SEli Cohen 3149e126ba97SEli Cohen qp->rq.head = 0; 3150e126ba97SEli Cohen qp->rq.tail = 0; 3151e126ba97SEli Cohen qp->sq.head = 0; 3152e126ba97SEli Cohen qp->sq.tail = 0; 3153e126ba97SEli Cohen qp->sq.cur_post = 0; 3154e126ba97SEli Cohen qp->sq.last_poll = 0; 3155e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3156e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3157e126ba97SEli Cohen } 3158e126ba97SEli Cohen 3159e126ba97SEli Cohen out: 31601a412fb1SSaeed Mahameed kfree(context); 3161e126ba97SEli Cohen return err; 3162e126ba97SEli Cohen } 3163e126ba97SEli Cohen 3164c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3165c32a4f29SMoni Shoua { 3166c32a4f29SMoni Shoua if ((mask & req) != req) 3167c32a4f29SMoni Shoua return false; 3168c32a4f29SMoni Shoua 3169c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3170c32a4f29SMoni Shoua return false; 3171c32a4f29SMoni Shoua 3172c32a4f29SMoni Shoua return true; 3173c32a4f29SMoni Shoua } 3174c32a4f29SMoni Shoua 3175c32a4f29SMoni Shoua /* check valid transition for driver QP types 3176c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3177c32a4f29SMoni Shoua */ 3178c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3179c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3180c32a4f29SMoni Shoua { 3181c32a4f29SMoni Shoua int req = IB_QP_STATE; 3182c32a4f29SMoni Shoua int opt = 0; 3183c32a4f29SMoni Shoua 3184c32a4f29SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3185c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3186c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3187c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3188c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3189c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3190c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3191c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3192c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3193c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3194c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3195c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3196c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3197c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3198c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3199c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3200c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3201c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3202c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3203c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3204c32a4f29SMoni Shoua } 3205c32a4f29SMoni Shoua return false; 3206c32a4f29SMoni Shoua } 3207c32a4f29SMoni Shoua 3208776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3209776a3906SMoni Shoua * valid transitions are: 3210776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3211776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3212776a3906SMoni Shoua * mtu, gid_index and hop_limit 3213776a3906SMoni Shoua * Other transitions and attributes are illegal 3214776a3906SMoni Shoua */ 3215776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3216776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3217776a3906SMoni Shoua { 3218776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3219776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3220776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3221776a3906SMoni Shoua int err = 0; 3222776a3906SMoni Shoua int required = IB_QP_STATE; 3223776a3906SMoni Shoua void *dctc; 3224776a3906SMoni Shoua 3225776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3226776a3906SMoni Shoua return -EINVAL; 3227776a3906SMoni Shoua 3228776a3906SMoni Shoua cur_state = qp->state; 3229776a3906SMoni Shoua new_state = attr->qp_state; 3230776a3906SMoni Shoua 3231776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3232776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3233776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3234776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3235776a3906SMoni Shoua return -EINVAL; 3236776a3906SMoni Shoua 3237776a3906SMoni Shoua if (attr->port_num == 0 || 3238776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3239776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3240776a3906SMoni Shoua attr->port_num, dev->num_ports); 3241776a3906SMoni Shoua return -EINVAL; 3242776a3906SMoni Shoua } 3243776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3244776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3245776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3246776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3247776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3248776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3249776a3906SMoni Shoua return -EOPNOTSUPP; 3250776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3251776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3252776a3906SMoni Shoua } 3253776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3254776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3255776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3256776a3906SMoni Shoua 3257776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3258776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3259776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3260776a3906SMoni Shoua sizeof(resp.dctn); 3261776a3906SMoni Shoua 3262776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3263776a3906SMoni Shoua return -EINVAL; 3264776a3906SMoni Shoua resp.response_length = min_resp_len; 3265776a3906SMoni Shoua 3266776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3267776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3268776a3906SMoni Shoua return -EINVAL; 3269776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3270776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3271776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3272776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3273776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3274776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3275776a3906SMoni Shoua 3276776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3277776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3278776a3906SMoni Shoua if (err) 3279776a3906SMoni Shoua return err; 3280776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3281776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3282776a3906SMoni Shoua if (err) { 3283776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3284776a3906SMoni Shoua return err; 3285776a3906SMoni Shoua } 3286776a3906SMoni Shoua } else { 3287776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3288776a3906SMoni Shoua return -EINVAL; 3289776a3906SMoni Shoua } 3290776a3906SMoni Shoua if (err) 3291776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3292776a3906SMoni Shoua else 3293776a3906SMoni Shoua qp->state = new_state; 3294776a3906SMoni Shoua return err; 3295776a3906SMoni Shoua } 3296776a3906SMoni Shoua 3297e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3298e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3299e126ba97SEli Cohen { 3300e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3301e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 3302d16e91daSHaggai Eran enum ib_qp_type qp_type; 3303e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 3304e126ba97SEli Cohen int err = -EINVAL; 3305e126ba97SEli Cohen int port; 33062811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 3307e126ba97SEli Cohen 330828d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 330928d61370SYishai Hadas return -ENOSYS; 331028d61370SYishai Hadas 3311d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3312d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3313d16e91daSHaggai Eran 3314c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3315c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3316c32a4f29SMoni Shoua else 3317d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3318d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3319d16e91daSHaggai Eran 3320776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3321776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3322c32a4f29SMoni Shoua 3323e126ba97SEli Cohen mutex_lock(&qp->mutex); 3324e126ba97SEli Cohen 3325e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3326e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3327e126ba97SEli Cohen 33282811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 33292811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 33302811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 33312811ba51SAchiad Shochat } 33322811ba51SAchiad Shochat 3333c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3334c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3335c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3336c2e53b2cSYishai Hadas attr_mask); 3337c2e53b2cSYishai Hadas goto out; 3338c2e53b2cSYishai Hadas } 3339c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3340c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3341d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 3342158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3343158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3344e126ba97SEli Cohen goto out; 3345c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3346c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3347c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3348c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3349c32a4f29SMoni Shoua goto out; 3350158abf86SHaggai Eran } 3351e126ba97SEli Cohen 3352e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3353938fe83cSSaeed Mahameed (attr->port_num == 0 || 3354158abf86SHaggai Eran attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports))) { 3355158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3356158abf86SHaggai Eran attr->port_num, dev->num_ports); 3357e126ba97SEli Cohen goto out; 3358158abf86SHaggai Eran } 3359e126ba97SEli Cohen 3360e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3361e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3362938fe83cSSaeed Mahameed if (attr->pkey_index >= 3363158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3364158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3365158abf86SHaggai Eran attr->pkey_index); 3366e126ba97SEli Cohen goto out; 3367e126ba97SEli Cohen } 3368158abf86SHaggai Eran } 3369e126ba97SEli Cohen 3370e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3371938fe83cSSaeed Mahameed attr->max_rd_atomic > 3372158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3373158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3374158abf86SHaggai Eran attr->max_rd_atomic); 3375e126ba97SEli Cohen goto out; 3376158abf86SHaggai Eran } 3377e126ba97SEli Cohen 3378e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3379938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3380158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3381158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3382158abf86SHaggai Eran attr->max_dest_rd_atomic); 3383e126ba97SEli Cohen goto out; 3384158abf86SHaggai Eran } 3385e126ba97SEli Cohen 3386e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3387e126ba97SEli Cohen err = 0; 3388e126ba97SEli Cohen goto out; 3389e126ba97SEli Cohen } 3390e126ba97SEli Cohen 3391e126ba97SEli Cohen err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); 3392e126ba97SEli Cohen 3393e126ba97SEli Cohen out: 3394e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3395e126ba97SEli Cohen return err; 3396e126ba97SEli Cohen } 3397e126ba97SEli Cohen 3398e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3399e126ba97SEli Cohen { 3400e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3401e126ba97SEli Cohen unsigned cur; 3402e126ba97SEli Cohen 3403e126ba97SEli Cohen cur = wq->head - wq->tail; 3404e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3405e126ba97SEli Cohen return 0; 3406e126ba97SEli Cohen 3407e126ba97SEli Cohen cq = to_mcq(ib_cq); 3408e126ba97SEli Cohen spin_lock(&cq->lock); 3409e126ba97SEli Cohen cur = wq->head - wq->tail; 3410e126ba97SEli Cohen spin_unlock(&cq->lock); 3411e126ba97SEli Cohen 3412e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3413e126ba97SEli Cohen } 3414e126ba97SEli Cohen 3415e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3416e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3417e126ba97SEli Cohen { 3418e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3419e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3420e126ba97SEli Cohen rseg->reserved = 0; 3421e126ba97SEli Cohen } 3422e126ba97SEli Cohen 3423f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3424f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 3425f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3426f0313965SErez Shitrit { 3427f0313965SErez Shitrit void *seg = eseg; 3428f0313965SErez Shitrit 3429f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3430f0313965SErez Shitrit 3431f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3432f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3433f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3434f0313965SErez Shitrit 3435f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3436f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3437f0313965SErez Shitrit 3438f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3439f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 34402b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3441f0313965SErez Shitrit u64 left, leftlen, copysz; 3442f0313965SErez Shitrit void *pdata = ud_wr->header; 3443f0313965SErez Shitrit 3444f0313965SErez Shitrit left = ud_wr->hlen; 3445f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 34462b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3447f0313965SErez Shitrit 3448f0313965SErez Shitrit /* 3449f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3450f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3451f0313965SErez Shitrit * rollback and than the copy the left 3452f0313965SErez Shitrit */ 34532b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3454f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3455f0313965SErez Shitrit 3456f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3457f0313965SErez Shitrit 3458f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3459f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3460f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3461f0313965SErez Shitrit } 3462f0313965SErez Shitrit 3463f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3464f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3465f0313965SErez Shitrit left -= copysz; 3466f0313965SErez Shitrit pdata += copysz; 3467f0313965SErez Shitrit memcpy(seg, pdata, left); 3468f0313965SErez Shitrit seg += ALIGN(left, 16); 3469f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3470f0313965SErez Shitrit } 3471f0313965SErez Shitrit } 3472f0313965SErez Shitrit 3473f0313965SErez Shitrit return seg; 3474f0313965SErez Shitrit } 3475f0313965SErez Shitrit 3476e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3477e126ba97SEli Cohen struct ib_send_wr *wr) 3478e126ba97SEli Cohen { 3479e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3480e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3481e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3482e126ba97SEli Cohen } 3483e126ba97SEli Cohen 3484e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3485e126ba97SEli Cohen { 3486e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3487e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3488e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3489e126ba97SEli Cohen } 3490e126ba97SEli Cohen 349131616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3492e126ba97SEli Cohen { 349331616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 349431616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3495e126ba97SEli Cohen } 3496e126ba97SEli Cohen 3497e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3498e126ba97SEli Cohen { 3499e126ba97SEli Cohen u64 result; 3500e126ba97SEli Cohen 3501e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3502e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3503e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3504e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3505e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3506e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3507e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3508e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3509e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3510e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3511e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3512e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3513e126ba97SEli Cohen 3514e126ba97SEli Cohen return cpu_to_be64(result); 3515e126ba97SEli Cohen } 3516e126ba97SEli Cohen 3517e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3518e6631814SSagi Grimberg { 3519e6631814SSagi Grimberg u64 result; 3520e6631814SSagi Grimberg 3521e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3522e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3523e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3524d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3525e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3526e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3527e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3528e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3529e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3530e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3531e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3532e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3533e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3534e6631814SSagi Grimberg 3535e6631814SSagi Grimberg return cpu_to_be64(result); 3536e6631814SSagi Grimberg } 3537e6631814SSagi Grimberg 35388a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 35398a187ee5SSagi Grimberg struct mlx5_ib_mr *mr) 35408a187ee5SSagi Grimberg { 354131616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 35428a187ee5SSagi Grimberg 35438a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3544b005d316SSagi Grimberg 35458a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 354631616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 35478a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 35488a187ee5SSagi Grimberg } 35498a187ee5SSagi Grimberg 3550dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3551e126ba97SEli Cohen { 3552e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3553e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 35542d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3555e126ba97SEli Cohen } 3556e126ba97SEli Cohen 355731616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3558e126ba97SEli Cohen { 3559968e78ddSHaggai Eran u64 result; 3560e126ba97SEli Cohen 356131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3562e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3563968e78ddSHaggai Eran 3564968e78ddSHaggai Eran return cpu_to_be64(result); 3565968e78ddSHaggai Eran } 3566968e78ddSHaggai Eran 356731616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3568968e78ddSHaggai Eran { 3569968e78ddSHaggai Eran u64 result; 3570968e78ddSHaggai Eran 3571968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3572968e78ddSHaggai Eran 3573968e78ddSHaggai Eran return cpu_to_be64(result); 3574968e78ddSHaggai Eran } 3575968e78ddSHaggai Eran 357656e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 357756e11d62SNoa Osherovich { 357856e11d62SNoa Osherovich u64 result; 357956e11d62SNoa Osherovich 358056e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 358156e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 358231616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 358356e11d62SNoa Osherovich 358456e11d62SNoa Osherovich return cpu_to_be64(result); 358556e11d62SNoa Osherovich } 358656e11d62SNoa Osherovich 358731616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 358856e11d62SNoa Osherovich { 358956e11d62SNoa Osherovich u64 result; 359056e11d62SNoa Osherovich 359131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 359231616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 359356e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 359431616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 359531616255SArtemy Kovalyov 359631616255SArtemy Kovalyov if (atomic) 359731616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 359856e11d62SNoa Osherovich 359956e11d62SNoa Osherovich return cpu_to_be64(result); 360056e11d62SNoa Osherovich } 360156e11d62SNoa Osherovich 360256e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 360356e11d62SNoa Osherovich { 360456e11d62SNoa Osherovich u64 result; 360556e11d62SNoa Osherovich 360631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 360756e11d62SNoa Osherovich 360856e11d62SNoa Osherovich return cpu_to_be64(result); 360956e11d62SNoa Osherovich } 361056e11d62SNoa Osherovich 3611968e78ddSHaggai Eran static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 3612578e7264SMaor Gottlieb struct ib_send_wr *wr, int atomic) 3613968e78ddSHaggai Eran { 3614e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3615968e78ddSHaggai Eran 3616968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3617968e78ddSHaggai Eran 3618968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3619968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3620968e78ddSHaggai Eran else 3621968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3622968e78ddSHaggai Eran 362331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 362431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 362531616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 362631616255SArtemy Kovalyov 362731616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 362831616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3629968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3630968e78ddSHaggai Eran } 363156e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 363256e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 363331616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 363431616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 363556e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3636e126ba97SEli Cohen } 363731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 363831616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 363931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 364031616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3641e126ba97SEli Cohen 3642e126ba97SEli Cohen if (!wr->num_sge) 3643968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3644e126ba97SEli Cohen } 3645e126ba97SEli Cohen 3646e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3647e126ba97SEli Cohen { 3648e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3649e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3650e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3651e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 36522ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3653e126ba97SEli Cohen } 3654e126ba97SEli Cohen 36558a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 36568a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 36578a187ee5SSagi Grimberg u32 key, int access) 36588a187ee5SSagi Grimberg { 36598a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 36608a187ee5SSagi Grimberg 36618a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3662b005d316SSagi Grimberg 3663ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3664b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3665ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3666b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3667b005d316SSagi Grimberg ndescs *= 2; 3668b005d316SSagi Grimberg 3669b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 36708a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 36718a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 36728a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 36738a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 36748a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 36758a187ee5SSagi Grimberg } 36768a187ee5SSagi Grimberg 3677dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3678e126ba97SEli Cohen { 3679e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3680968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3681e126ba97SEli Cohen } 3682e126ba97SEli Cohen 3683e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 3684e126ba97SEli Cohen { 3685e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3686968e78ddSHaggai Eran 3687e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 368831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3689968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3690e126ba97SEli Cohen 3691968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 369256e11d62SNoa Osherovich if (umrwr->pd) 3693968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 369431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 369531616255SArtemy Kovalyov !umrwr->length) 369631616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 369731616255SArtemy Kovalyov 369831616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3699968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3700968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3701746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3702968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3703e126ba97SEli Cohen } 3704e126ba97SEli Cohen 37058a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 37068a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 37078a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 37088a187ee5SSagi Grimberg { 37098a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 37108a187ee5SSagi Grimberg 37118a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 37128a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 37138a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 37148a187ee5SSagi Grimberg } 37158a187ee5SSagi Grimberg 3716e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 3717e126ba97SEli Cohen { 3718e126ba97SEli Cohen switch (wr->opcode) { 3719e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3720e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3721e126ba97SEli Cohen return wr->ex.imm_data; 3722e126ba97SEli Cohen 3723e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3724e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3725e126ba97SEli Cohen 3726e126ba97SEli Cohen default: 3727e126ba97SEli Cohen return 0; 3728e126ba97SEli Cohen } 3729e126ba97SEli Cohen } 3730e126ba97SEli Cohen 3731e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3732e126ba97SEli Cohen { 3733e126ba97SEli Cohen u8 *p = wqe; 3734e126ba97SEli Cohen u8 res = 0; 3735e126ba97SEli Cohen int i; 3736e126ba97SEli Cohen 3737e126ba97SEli Cohen for (i = 0; i < size; i++) 3738e126ba97SEli Cohen res ^= p[i]; 3739e126ba97SEli Cohen 3740e126ba97SEli Cohen return ~res; 3741e126ba97SEli Cohen } 3742e126ba97SEli Cohen 3743e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3744e126ba97SEli Cohen { 3745e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3746e126ba97SEli Cohen } 3747e126ba97SEli Cohen 3748e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 3749e126ba97SEli Cohen void *wqe, int *sz) 3750e126ba97SEli Cohen { 3751e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3752e126ba97SEli Cohen void *qend = qp->sq.qend; 3753e126ba97SEli Cohen void *addr; 3754e126ba97SEli Cohen int inl = 0; 3755e126ba97SEli Cohen int copy; 3756e126ba97SEli Cohen int len; 3757e126ba97SEli Cohen int i; 3758e126ba97SEli Cohen 3759e126ba97SEli Cohen seg = wqe; 3760e126ba97SEli Cohen wqe += sizeof(*seg); 3761e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3762e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3763e126ba97SEli Cohen len = wr->sg_list[i].length; 3764e126ba97SEli Cohen inl += len; 3765e126ba97SEli Cohen 3766e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3767e126ba97SEli Cohen return -ENOMEM; 3768e126ba97SEli Cohen 3769e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3770e126ba97SEli Cohen copy = qend - wqe; 3771e126ba97SEli Cohen memcpy(wqe, addr, copy); 3772e126ba97SEli Cohen addr += copy; 3773e126ba97SEli Cohen len -= copy; 3774e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 3775e126ba97SEli Cohen } 3776e126ba97SEli Cohen memcpy(wqe, addr, len); 3777e126ba97SEli Cohen wqe += len; 3778e126ba97SEli Cohen } 3779e126ba97SEli Cohen 3780e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 3781e126ba97SEli Cohen 3782e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 3783e126ba97SEli Cohen 3784e126ba97SEli Cohen return 0; 3785e126ba97SEli Cohen } 3786e126ba97SEli Cohen 3787e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 3788e6631814SSagi Grimberg { 3789e6631814SSagi Grimberg switch (type) { 3790e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3791e6631814SSagi Grimberg return MLX5_DIF_SIZE; 3792e6631814SSagi Grimberg default: 3793e6631814SSagi Grimberg return 0; 3794e6631814SSagi Grimberg } 3795e6631814SSagi Grimberg } 3796e6631814SSagi Grimberg 3797e6631814SSagi Grimberg static u8 bs_selector(int block_size) 3798e6631814SSagi Grimberg { 3799e6631814SSagi Grimberg switch (block_size) { 3800e6631814SSagi Grimberg case 512: return 0x1; 3801e6631814SSagi Grimberg case 520: return 0x2; 3802e6631814SSagi Grimberg case 4096: return 0x3; 3803e6631814SSagi Grimberg case 4160: return 0x4; 3804e6631814SSagi Grimberg case 1073741824: return 0x5; 3805e6631814SSagi Grimberg default: return 0; 3806e6631814SSagi Grimberg } 3807e6631814SSagi Grimberg } 3808e6631814SSagi Grimberg 380978eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 3810142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 3811e6631814SSagi Grimberg { 3812142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 3813142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 3814142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 3815142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 3816142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 3817142537f4SSagi Grimberg /* repeating block */ 3818142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 3819142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 3820142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 3821e6631814SSagi Grimberg 382278eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 382378eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 3824e6631814SSagi Grimberg 382578eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 382678eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 382778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 382878eda2bbSSagi Grimberg else 382978eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 3830e6631814SSagi Grimberg } 3831e6631814SSagi Grimberg 383278eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 383378eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 3834e6631814SSagi Grimberg } 3835e6631814SSagi Grimberg 3836e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 3837e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 3838e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 3839e6631814SSagi Grimberg { 3840e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 3841e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 3842e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 3843e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 3844e6631814SSagi Grimberg 3845c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 3846e6631814SSagi Grimberg 3847142537f4SSagi Grimberg /* Basic + Extended + Inline */ 3848142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 3849e6631814SSagi Grimberg /* Input domain check byte mask */ 3850e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 385178eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 385278eda2bbSSagi Grimberg 385378eda2bbSSagi Grimberg /* Memory domain */ 385478eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 385578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 385678eda2bbSSagi Grimberg break; 385778eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 385878eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 385978eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 386078eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 386178eda2bbSSagi Grimberg break; 386278eda2bbSSagi Grimberg default: 386378eda2bbSSagi Grimberg return -EINVAL; 386478eda2bbSSagi Grimberg } 386578eda2bbSSagi Grimberg 386678eda2bbSSagi Grimberg /* Wire domain */ 386778eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 386878eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 386978eda2bbSSagi Grimberg break; 387078eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3871e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 387278eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 3873e6631814SSagi Grimberg /* Same block structure */ 3874142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 3875e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 3876fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 3877c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 3878fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 3879c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 3880fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 3881e6631814SSagi Grimberg } else 3882e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 3883e6631814SSagi Grimberg 3884142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 388578eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 3886e6631814SSagi Grimberg break; 3887e6631814SSagi Grimberg default: 3888e6631814SSagi Grimberg return -EINVAL; 3889e6631814SSagi Grimberg } 3890e6631814SSagi Grimberg 3891e6631814SSagi Grimberg return 0; 3892e6631814SSagi Grimberg } 3893e6631814SSagi Grimberg 3894e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 3895e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 3896e6631814SSagi Grimberg { 3897e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 3898e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 3899e6631814SSagi Grimberg struct mlx5_bsf *bsf; 3900e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 3901e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 3902e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 3903e6631814SSagi Grimberg int ret; 3904e6631814SSagi Grimberg int wqe_size; 3905e6631814SSagi Grimberg 3906e622f2f4SChristoph Hellwig if (!wr->prot || 3907e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 3908e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 3909e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 3910e6631814SSagi Grimberg /** 3911e6631814SSagi Grimberg * Source domain doesn't contain signature information 39125c273b16SSagi Grimberg * or data and protection are interleaved in memory. 3913e6631814SSagi Grimberg * So need construct: 3914e6631814SSagi Grimberg * ------------------ 3915e6631814SSagi Grimberg * | data_klm | 3916e6631814SSagi Grimberg * ------------------ 3917e6631814SSagi Grimberg * | BSF | 3918e6631814SSagi Grimberg * ------------------ 3919e6631814SSagi Grimberg **/ 3920e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 3921e6631814SSagi Grimberg 3922e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 3923e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 3924e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 3925e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 3926e6631814SSagi Grimberg } else { 3927e6631814SSagi Grimberg /** 3928e6631814SSagi Grimberg * Source domain contains signature information 3929e6631814SSagi Grimberg * So need construct a strided block format: 3930e6631814SSagi Grimberg * --------------------------- 3931e6631814SSagi Grimberg * | stride_block_ctrl | 3932e6631814SSagi Grimberg * --------------------------- 3933e6631814SSagi Grimberg * | data_klm | 3934e6631814SSagi Grimberg * --------------------------- 3935e6631814SSagi Grimberg * | prot_klm | 3936e6631814SSagi Grimberg * --------------------------- 3937e6631814SSagi Grimberg * | BSF | 3938e6631814SSagi Grimberg * --------------------------- 3939e6631814SSagi Grimberg **/ 3940e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 3941e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 3942e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 3943e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 3944e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 3945e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 3946e6631814SSagi Grimberg int prot_size; 3947e6631814SSagi Grimberg 3948e6631814SSagi Grimberg sblock_ctrl = *seg; 3949e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 3950e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 3951e6631814SSagi Grimberg 3952e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 3953e6631814SSagi Grimberg if (!prot_size) { 3954e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 3955e6631814SSagi Grimberg return -EINVAL; 3956e6631814SSagi Grimberg } 3957e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 3958e6631814SSagi Grimberg prot_size); 3959e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 3960e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 3961e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 3962e6631814SSagi Grimberg 3963e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 3964e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 3965e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 39665c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 39675c273b16SSagi Grimberg 3968e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 3969e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 3970e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 3971e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 39725c273b16SSagi Grimberg 3973e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 3974e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 3975e6631814SSagi Grimberg } 3976e6631814SSagi Grimberg 3977e6631814SSagi Grimberg *seg += wqe_size; 3978e6631814SSagi Grimberg *size += wqe_size / 16; 3979e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3980e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3981e6631814SSagi Grimberg 3982e6631814SSagi Grimberg bsf = *seg; 3983e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 3984e6631814SSagi Grimberg if (ret) 3985e6631814SSagi Grimberg return -EINVAL; 3986e6631814SSagi Grimberg 3987e6631814SSagi Grimberg *seg += sizeof(*bsf); 3988e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 3989e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3990e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3991e6631814SSagi Grimberg 3992e6631814SSagi Grimberg return 0; 3993e6631814SSagi Grimberg } 3994e6631814SSagi Grimberg 3995e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 399631616255SArtemy Kovalyov struct ib_sig_handover_wr *wr, u32 size, 3997e6631814SSagi Grimberg u32 length, u32 pdn) 3998e6631814SSagi Grimberg { 3999e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4000e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4001d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4002e6631814SSagi Grimberg 4003e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4004e6631814SSagi Grimberg 4005e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4006ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4007e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4008d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4009e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4010e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 401131616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4012e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4013e6631814SSagi Grimberg } 4014e6631814SSagi Grimberg 4015e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 401631616255SArtemy Kovalyov u32 size) 4017e6631814SSagi Grimberg { 4018e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4019e6631814SSagi Grimberg 4020e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 402131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4022e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4023e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4024e6631814SSagi Grimberg } 4025e6631814SSagi Grimberg 4026e6631814SSagi Grimberg 4027e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 4028e6631814SSagi Grimberg void **seg, int *size) 4029e6631814SSagi Grimberg { 4030e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4031e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4032e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 403331616255SArtemy Kovalyov u32 xlt_size; 4034e6631814SSagi Grimberg int region_len, ret; 4035e6631814SSagi Grimberg 4036e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4037e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4038d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4039d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4040e6631814SSagi Grimberg return -EINVAL; 4041e6631814SSagi Grimberg 4042e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4043e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4044e622f2f4SChristoph Hellwig if (wr->prot && 4045e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4046e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4047e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4048e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4049e6631814SSagi Grimberg 4050e6631814SSagi Grimberg /** 4051e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4052e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4053e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4054e6631814SSagi Grimberg **/ 405531616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4056e6631814SSagi Grimberg 405731616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4058e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4059e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4060e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4061e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4062e6631814SSagi Grimberg 406331616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4064e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4065e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4066e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4067e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4068e6631814SSagi Grimberg 4069e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4070e6631814SSagi Grimberg if (ret) 4071e6631814SSagi Grimberg return ret; 4072e6631814SSagi Grimberg 4073d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4074e6631814SSagi Grimberg return 0; 4075e6631814SSagi Grimberg } 4076e6631814SSagi Grimberg 4077e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4078e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4079e6631814SSagi Grimberg { 4080e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4081e6631814SSagi Grimberg 4082e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4083e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4084e6631814SSagi Grimberg switch (domain->sig_type) { 408578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 408678eda2bbSSagi Grimberg break; 4087e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4088e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4089e6631814SSagi Grimberg domain->sig.dif.app_tag); 4090e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4091e6631814SSagi Grimberg break; 4092e6631814SSagi Grimberg default: 409312bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 409412bbf1eaSLeon Romanovsky domain->sig_type); 409512bbf1eaSLeon Romanovsky return -EINVAL; 4096e6631814SSagi Grimberg } 4097e6631814SSagi Grimberg 409878eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 409978eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 410078eda2bbSSagi Grimberg 4101e6631814SSagi Grimberg return 0; 4102e6631814SSagi Grimberg } 4103e6631814SSagi Grimberg 41048a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 41058a187ee5SSagi Grimberg struct ib_reg_wr *wr, 41068a187ee5SSagi Grimberg void **seg, int *size) 41078a187ee5SSagi Grimberg { 41088a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 41098a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 41108a187ee5SSagi Grimberg 41118a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 41128a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 41138a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 41148a187ee5SSagi Grimberg return -EINVAL; 41158a187ee5SSagi Grimberg } 41168a187ee5SSagi Grimberg 41178a187ee5SSagi Grimberg set_reg_umr_seg(*seg, mr); 41188a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 41198a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 41208a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 41218a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 41228a187ee5SSagi Grimberg 41238a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 41248a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 41258a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 41268a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 41278a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 41288a187ee5SSagi Grimberg 41298a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 41308a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 41318a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 41328a187ee5SSagi Grimberg 41338a187ee5SSagi Grimberg return 0; 41348a187ee5SSagi Grimberg } 41358a187ee5SSagi Grimberg 4136dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4137e126ba97SEli Cohen { 4138dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4139e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4140e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4141e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4142e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4143dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4144e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4145e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4146e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4147e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4148e126ba97SEli Cohen } 4149e126ba97SEli Cohen 4150e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4151e126ba97SEli Cohen { 4152e126ba97SEli Cohen __be32 *p = NULL; 4153e126ba97SEli Cohen int tidx = idx; 4154e126ba97SEli Cohen int i, j; 4155e126ba97SEli Cohen 4156e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4157e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4158e126ba97SEli Cohen if ((i & 0xf) == 0) { 4159e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4160e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4161e126ba97SEli Cohen p = buf; 4162e126ba97SEli Cohen j = 0; 4163e126ba97SEli Cohen } 4164e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4165e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4166e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4167e126ba97SEli Cohen } 4168e126ba97SEli Cohen } 4169e126ba97SEli Cohen 41706e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 41716e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 41726a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 41736e5eadacSSagi Grimberg int *size, int nreq) 41746e5eadacSSagi Grimberg { 4175b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4176b2a232d2SLeon Romanovsky return -ENOMEM; 41776e5eadacSSagi Grimberg 41786e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 41796e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 41806e5eadacSSagi Grimberg *ctrl = *seg; 41816e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 41826e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 41836e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 41846e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 41856e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 41866e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 41876e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 41886e5eadacSSagi Grimberg 41896e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 41906e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 41916e5eadacSSagi Grimberg 4192b2a232d2SLeon Romanovsky return 0; 41936e5eadacSSagi Grimberg } 41946e5eadacSSagi Grimberg 41956e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 41966e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 41976e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 41986e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 41996e5eadacSSagi Grimberg { 42006e5eadacSSagi Grimberg u8 opmod = 0; 42016e5eadacSSagi Grimberg 42026e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 42036e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 420419098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 42056e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 42066e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 42076e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 42086e5eadacSSagi Grimberg 42096e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 42106e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 42116e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 42126e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 42136e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 42146e5eadacSSagi Grimberg } 42156e5eadacSSagi Grimberg 42166e5eadacSSagi Grimberg 4217e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 4218e126ba97SEli Cohen struct ib_send_wr **bad_wr) 4219e126ba97SEli Cohen { 4220e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4221e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 422289ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4223d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4224e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4225e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4226e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4227d16e91daSHaggai Eran struct mlx5_bf *bf; 4228e126ba97SEli Cohen int uninitialized_var(size); 4229d16e91daSHaggai Eran void *qend; 4230e126ba97SEli Cohen unsigned long flags; 4231e126ba97SEli Cohen unsigned idx; 4232e126ba97SEli Cohen int err = 0; 4233e126ba97SEli Cohen int num_sge; 4234e126ba97SEli Cohen void *seg; 4235e126ba97SEli Cohen int nreq; 4236e126ba97SEli Cohen int i; 4237e126ba97SEli Cohen u8 next_fence = 0; 4238e126ba97SEli Cohen u8 fence; 4239e126ba97SEli Cohen 4240d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4241d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4242d16e91daSHaggai Eran 4243d16e91daSHaggai Eran qp = to_mqp(ibqp); 42445fe9dec0SEli Cohen bf = &qp->bf; 4245d16e91daSHaggai Eran qend = qp->sq.qend; 4246d16e91daSHaggai Eran 4247e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4248e126ba97SEli Cohen 424989ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 425089ea94a7SMaor Gottlieb err = -EIO; 425189ea94a7SMaor Gottlieb *bad_wr = wr; 425289ea94a7SMaor Gottlieb nreq = 0; 425389ea94a7SMaor Gottlieb goto out; 425489ea94a7SMaor Gottlieb } 425589ea94a7SMaor Gottlieb 4256e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4257a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4258e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4259e126ba97SEli Cohen err = -EINVAL; 4260e126ba97SEli Cohen *bad_wr = wr; 4261e126ba97SEli Cohen goto out; 4262e126ba97SEli Cohen } 4263e126ba97SEli Cohen 4264e126ba97SEli Cohen num_sge = wr->num_sge; 4265e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4266e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 426724be409bSChuck Lever err = -EINVAL; 4268e126ba97SEli Cohen *bad_wr = wr; 4269e126ba97SEli Cohen goto out; 4270e126ba97SEli Cohen } 4271e126ba97SEli Cohen 42726e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 42736e5eadacSSagi Grimberg if (err) { 42746e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 42756e5eadacSSagi Grimberg err = -ENOMEM; 42766e5eadacSSagi Grimberg *bad_wr = wr; 42776e5eadacSSagi Grimberg goto out; 42786e5eadacSSagi Grimberg } 4279e126ba97SEli Cohen 42806e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 42816e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 42826e8484c5SMax Gurtovoy fence = dev->umr_fence; 42836e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 42846e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 42856e8484c5SMax Gurtovoy if (qp->next_fence) 42866e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 42876e8484c5SMax Gurtovoy else 42886e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 42896e8484c5SMax Gurtovoy } else { 42906e8484c5SMax Gurtovoy fence = qp->next_fence; 42916e8484c5SMax Gurtovoy } 42926e8484c5SMax Gurtovoy 4293e126ba97SEli Cohen switch (ibqp->qp_type) { 4294e126ba97SEli Cohen case IB_QPT_XRC_INI: 4295e126ba97SEli Cohen xrc = seg; 4296e126ba97SEli Cohen seg += sizeof(*xrc); 4297e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4298e126ba97SEli Cohen /* fall through */ 4299e126ba97SEli Cohen case IB_QPT_RC: 4300e126ba97SEli Cohen switch (wr->opcode) { 4301e126ba97SEli Cohen case IB_WR_RDMA_READ: 4302e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4303e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4304e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4305e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4306e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4307e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4308e126ba97SEli Cohen break; 4309e126ba97SEli Cohen 4310e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4311e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4312e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 431381bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 431481bea28fSEli Cohen err = -ENOSYS; 431581bea28fSEli Cohen *bad_wr = wr; 431681bea28fSEli Cohen goto out; 4317e126ba97SEli Cohen 4318e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4319e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4320e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4321dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4322e126ba97SEli Cohen num_sge = 0; 4323e126ba97SEli Cohen break; 4324e126ba97SEli Cohen 43258a187ee5SSagi Grimberg case IB_WR_REG_MR: 43268a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 43278a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 43288a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 43298a187ee5SSagi Grimberg if (err) { 43308a187ee5SSagi Grimberg *bad_wr = wr; 43318a187ee5SSagi Grimberg goto out; 43328a187ee5SSagi Grimberg } 43338a187ee5SSagi Grimberg num_sge = 0; 43348a187ee5SSagi Grimberg break; 43358a187ee5SSagi Grimberg 4336e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4337e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4338e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4339e6631814SSagi Grimberg 4340e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4341e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4342e6631814SSagi Grimberg if (err) { 4343e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4344e6631814SSagi Grimberg *bad_wr = wr; 4345e6631814SSagi Grimberg goto out; 4346e6631814SSagi Grimberg } 4347e6631814SSagi Grimberg 43486e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 43496e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4350e6631814SSagi Grimberg /* 4351e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4352e6631814SSagi Grimberg * on error 4353e6631814SSagi Grimberg */ 4354e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 4355e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 4356e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4357e6631814SSagi Grimberg &idx, &size, nreq); 4358e6631814SSagi Grimberg if (err) { 4359e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4360e6631814SSagi Grimberg err = -ENOMEM; 4361e6631814SSagi Grimberg *bad_wr = wr; 4362e6631814SSagi Grimberg goto out; 4363e6631814SSagi Grimberg } 4364e6631814SSagi Grimberg 4365e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4366e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4367e6631814SSagi Grimberg &size); 4368e6631814SSagi Grimberg if (err) { 4369e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4370e6631814SSagi Grimberg *bad_wr = wr; 4371e6631814SSagi Grimberg goto out; 4372e6631814SSagi Grimberg } 4373e6631814SSagi Grimberg 43746e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 43756e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 4376e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4377e6631814SSagi Grimberg &idx, &size, nreq); 4378e6631814SSagi Grimberg if (err) { 4379e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4380e6631814SSagi Grimberg err = -ENOMEM; 4381e6631814SSagi Grimberg *bad_wr = wr; 4382e6631814SSagi Grimberg goto out; 4383e6631814SSagi Grimberg } 4384e6631814SSagi Grimberg 4385e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4386e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4387e6631814SSagi Grimberg &size); 4388e6631814SSagi Grimberg if (err) { 4389e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4390e6631814SSagi Grimberg *bad_wr = wr; 4391e6631814SSagi Grimberg goto out; 4392e6631814SSagi Grimberg } 4393e6631814SSagi Grimberg 43946e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 43956e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 43966e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4397e6631814SSagi Grimberg num_sge = 0; 4398e6631814SSagi Grimberg goto skip_psv; 4399e6631814SSagi Grimberg 4400e126ba97SEli Cohen default: 4401e126ba97SEli Cohen break; 4402e126ba97SEli Cohen } 4403e126ba97SEli Cohen break; 4404e126ba97SEli Cohen 4405e126ba97SEli Cohen case IB_QPT_UC: 4406e126ba97SEli Cohen switch (wr->opcode) { 4407e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4408e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4409e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4410e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4411e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4412e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4413e126ba97SEli Cohen break; 4414e126ba97SEli Cohen 4415e126ba97SEli Cohen default: 4416e126ba97SEli Cohen break; 4417e126ba97SEli Cohen } 4418e126ba97SEli Cohen break; 4419e126ba97SEli Cohen 4420e126ba97SEli Cohen case IB_QPT_SMI: 44211e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 44221e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 44231e0e50b6SMaor Gottlieb err = -EPERM; 44241e0e50b6SMaor Gottlieb *bad_wr = wr; 44251e0e50b6SMaor Gottlieb goto out; 44261e0e50b6SMaor Gottlieb } 4427f6b1ee34SBart Van Assche /* fall through */ 4428d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4429e126ba97SEli Cohen set_datagram_seg(seg, wr); 4430e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4431e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4432e126ba97SEli Cohen if (unlikely((seg == qend))) 4433e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4434e126ba97SEli Cohen break; 4435f0313965SErez Shitrit case IB_QPT_UD: 4436f0313965SErez Shitrit set_datagram_seg(seg, wr); 4437f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4438f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4439e126ba97SEli Cohen 4440f0313965SErez Shitrit if (unlikely((seg == qend))) 4441f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4442f0313965SErez Shitrit 4443f0313965SErez Shitrit /* handle qp that supports ud offload */ 4444f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4445f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4446f0313965SErez Shitrit 4447f0313965SErez Shitrit pad = seg; 4448f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4449f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4450f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4451f0313965SErez Shitrit 4452f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4453f0313965SErez Shitrit 4454f0313965SErez Shitrit if (unlikely((seg == qend))) 4455f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4456f0313965SErez Shitrit } 4457f0313965SErez Shitrit break; 4458e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4459e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4460e126ba97SEli Cohen err = -EINVAL; 4461e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4462e126ba97SEli Cohen goto out; 4463e126ba97SEli Cohen } 4464e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4465e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4466578e7264SMaor Gottlieb set_reg_umr_segment(seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4467e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4468e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4469e126ba97SEli Cohen if (unlikely((seg == qend))) 4470e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4471e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4472e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4473e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4474e126ba97SEli Cohen if (unlikely((seg == qend))) 4475e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4476e126ba97SEli Cohen break; 4477e126ba97SEli Cohen 4478e126ba97SEli Cohen default: 4479e126ba97SEli Cohen break; 4480e126ba97SEli Cohen } 4481e126ba97SEli Cohen 4482e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4483e126ba97SEli Cohen int uninitialized_var(sz); 4484e126ba97SEli Cohen 4485e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4486e126ba97SEli Cohen if (unlikely(err)) { 4487e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4488e126ba97SEli Cohen *bad_wr = wr; 4489e126ba97SEli Cohen goto out; 4490e126ba97SEli Cohen } 4491e126ba97SEli Cohen size += sz; 4492e126ba97SEli Cohen } else { 4493e126ba97SEli Cohen dpseg = seg; 4494e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4495e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4496e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4497e126ba97SEli Cohen dpseg = seg; 4498e126ba97SEli Cohen } 4499e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4500e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4501e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4502e126ba97SEli Cohen dpseg++; 4503e126ba97SEli Cohen } 4504e126ba97SEli Cohen } 4505e126ba97SEli Cohen } 4506e126ba97SEli Cohen 45076e8484c5SMax Gurtovoy qp->next_fence = next_fence; 45086e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 45096e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4510e6631814SSagi Grimberg skip_psv: 4511e126ba97SEli Cohen if (0) 4512e126ba97SEli Cohen dump_wqe(qp, idx, size); 4513e126ba97SEli Cohen } 4514e126ba97SEli Cohen 4515e126ba97SEli Cohen out: 4516e126ba97SEli Cohen if (likely(nreq)) { 4517e126ba97SEli Cohen qp->sq.head += nreq; 4518e126ba97SEli Cohen 4519e126ba97SEli Cohen /* Make sure that descriptors are written before 4520e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4521e126ba97SEli Cohen */ 4522e126ba97SEli Cohen wmb(); 4523e126ba97SEli Cohen 4524e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4525e126ba97SEli Cohen 4526ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4527ada388f7SEli Cohen * we hit doorbell */ 4528ada388f7SEli Cohen wmb(); 4529ada388f7SEli Cohen 45305fe9dec0SEli Cohen /* currently we support only regular doorbells */ 45315fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4532e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4533e126ba97SEli Cohen * and reach the HCA out of order. 4534e126ba97SEli Cohen */ 4535e126ba97SEli Cohen mmiowb(); 4536e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4537e126ba97SEli Cohen } 4538e126ba97SEli Cohen 4539e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4540e126ba97SEli Cohen 4541e126ba97SEli Cohen return err; 4542e126ba97SEli Cohen } 4543e126ba97SEli Cohen 4544e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4545e126ba97SEli Cohen { 4546e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4547e126ba97SEli Cohen } 4548e126ba97SEli Cohen 4549e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 4550e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 4551e126ba97SEli Cohen { 4552e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4553e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4554e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 455589ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 455689ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4557e126ba97SEli Cohen unsigned long flags; 4558e126ba97SEli Cohen int err = 0; 4559e126ba97SEli Cohen int nreq; 4560e126ba97SEli Cohen int ind; 4561e126ba97SEli Cohen int i; 4562e126ba97SEli Cohen 4563d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4564d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4565d16e91daSHaggai Eran 4566e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4567e126ba97SEli Cohen 456889ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 456989ea94a7SMaor Gottlieb err = -EIO; 457089ea94a7SMaor Gottlieb *bad_wr = wr; 457189ea94a7SMaor Gottlieb nreq = 0; 457289ea94a7SMaor Gottlieb goto out; 457389ea94a7SMaor Gottlieb } 457489ea94a7SMaor Gottlieb 4575e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4576e126ba97SEli Cohen 4577e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4578e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4579e126ba97SEli Cohen err = -ENOMEM; 4580e126ba97SEli Cohen *bad_wr = wr; 4581e126ba97SEli Cohen goto out; 4582e126ba97SEli Cohen } 4583e126ba97SEli Cohen 4584e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4585e126ba97SEli Cohen err = -EINVAL; 4586e126ba97SEli Cohen *bad_wr = wr; 4587e126ba97SEli Cohen goto out; 4588e126ba97SEli Cohen } 4589e126ba97SEli Cohen 4590e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4591e126ba97SEli Cohen if (qp->wq_sig) 4592e126ba97SEli Cohen scat++; 4593e126ba97SEli Cohen 4594e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4595e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4596e126ba97SEli Cohen 4597e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4598e126ba97SEli Cohen scat[i].byte_count = 0; 4599e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4600e126ba97SEli Cohen scat[i].addr = 0; 4601e126ba97SEli Cohen } 4602e126ba97SEli Cohen 4603e126ba97SEli Cohen if (qp->wq_sig) { 4604e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4605e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4606e126ba97SEli Cohen } 4607e126ba97SEli Cohen 4608e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4609e126ba97SEli Cohen 4610e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4611e126ba97SEli Cohen } 4612e126ba97SEli Cohen 4613e126ba97SEli Cohen out: 4614e126ba97SEli Cohen if (likely(nreq)) { 4615e126ba97SEli Cohen qp->rq.head += nreq; 4616e126ba97SEli Cohen 4617e126ba97SEli Cohen /* Make sure that descriptors are written before 4618e126ba97SEli Cohen * doorbell record. 4619e126ba97SEli Cohen */ 4620e126ba97SEli Cohen wmb(); 4621e126ba97SEli Cohen 4622e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4623e126ba97SEli Cohen } 4624e126ba97SEli Cohen 4625e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4626e126ba97SEli Cohen 4627e126ba97SEli Cohen return err; 4628e126ba97SEli Cohen } 4629e126ba97SEli Cohen 4630e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4631e126ba97SEli Cohen { 4632e126ba97SEli Cohen switch (mlx5_state) { 4633e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4634e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4635e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4636e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4637e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4638e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4639e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4640e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4641e126ba97SEli Cohen default: return -1; 4642e126ba97SEli Cohen } 4643e126ba97SEli Cohen } 4644e126ba97SEli Cohen 4645e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4646e126ba97SEli Cohen { 4647e126ba97SEli Cohen switch (mlx5_mig_state) { 4648e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4649e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4650e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4651e126ba97SEli Cohen default: return -1; 4652e126ba97SEli Cohen } 4653e126ba97SEli Cohen } 4654e126ba97SEli Cohen 4655e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4656e126ba97SEli Cohen { 4657e126ba97SEli Cohen int ib_flags = 0; 4658e126ba97SEli Cohen 4659e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4660e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4661e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4662e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4663e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4664e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4665e126ba97SEli Cohen 4666e126ba97SEli Cohen return ib_flags; 4667e126ba97SEli Cohen } 4668e126ba97SEli Cohen 466938349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4670d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4671e126ba97SEli Cohen struct mlx5_qp_path *path) 4672e126ba97SEli Cohen { 46739603b61dSJack Morgenstein struct mlx5_core_dev *dev = ibdev->mdev; 4674e126ba97SEli Cohen 4675d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4676e126ba97SEli Cohen 467744c58487SDasaratharaman Chandramouli ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4678d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4679d8966fcdSDasaratharaman Chandramouli if (rdma_ah_get_port_num(ah_attr) == 0 || 4680d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(ah_attr) > MLX5_CAP_GEN(dev, num_ports)) 4681e126ba97SEli Cohen return; 4682e126ba97SEli Cohen 4683d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4684d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4685e126ba97SEli Cohen 4686d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4687d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4688d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4689d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4690d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4691d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4692d8966fcdSDasaratharaman Chandramouli 4693d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4694d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4695d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4696d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4697d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4698d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4699e126ba97SEli Cohen } 4700e126ba97SEli Cohen } 4701e126ba97SEli Cohen 47026d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 47036d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 47046d2f89dfSmajd@mellanox.com u8 *sq_state) 4705e126ba97SEli Cohen { 47066d2f89dfSmajd@mellanox.com void *out; 47076d2f89dfSmajd@mellanox.com void *sqc; 47086d2f89dfSmajd@mellanox.com int inlen; 47096d2f89dfSmajd@mellanox.com int err; 47106d2f89dfSmajd@mellanox.com 47116d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_sq_out); 47121b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 47136d2f89dfSmajd@mellanox.com if (!out) 47146d2f89dfSmajd@mellanox.com return -ENOMEM; 47156d2f89dfSmajd@mellanox.com 47166d2f89dfSmajd@mellanox.com err = mlx5_core_query_sq(dev->mdev, sq->base.mqp.qpn, out); 47176d2f89dfSmajd@mellanox.com if (err) 47186d2f89dfSmajd@mellanox.com goto out; 47196d2f89dfSmajd@mellanox.com 47206d2f89dfSmajd@mellanox.com sqc = MLX5_ADDR_OF(query_sq_out, out, sq_context); 47216d2f89dfSmajd@mellanox.com *sq_state = MLX5_GET(sqc, sqc, state); 47226d2f89dfSmajd@mellanox.com sq->state = *sq_state; 47236d2f89dfSmajd@mellanox.com 47246d2f89dfSmajd@mellanox.com out: 47256d2f89dfSmajd@mellanox.com kvfree(out); 47266d2f89dfSmajd@mellanox.com return err; 47276d2f89dfSmajd@mellanox.com } 47286d2f89dfSmajd@mellanox.com 47296d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 47306d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 47316d2f89dfSmajd@mellanox.com u8 *rq_state) 47326d2f89dfSmajd@mellanox.com { 47336d2f89dfSmajd@mellanox.com void *out; 47346d2f89dfSmajd@mellanox.com void *rqc; 47356d2f89dfSmajd@mellanox.com int inlen; 47366d2f89dfSmajd@mellanox.com int err; 47376d2f89dfSmajd@mellanox.com 47386d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 47391b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 47406d2f89dfSmajd@mellanox.com if (!out) 47416d2f89dfSmajd@mellanox.com return -ENOMEM; 47426d2f89dfSmajd@mellanox.com 47436d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 47446d2f89dfSmajd@mellanox.com if (err) 47456d2f89dfSmajd@mellanox.com goto out; 47466d2f89dfSmajd@mellanox.com 47476d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 47486d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 47496d2f89dfSmajd@mellanox.com rq->state = *rq_state; 47506d2f89dfSmajd@mellanox.com 47516d2f89dfSmajd@mellanox.com out: 47526d2f89dfSmajd@mellanox.com kvfree(out); 47536d2f89dfSmajd@mellanox.com return err; 47546d2f89dfSmajd@mellanox.com } 47556d2f89dfSmajd@mellanox.com 47566d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 47576d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 47586d2f89dfSmajd@mellanox.com { 47596d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 47606d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 47616d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 47626d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 47636d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 47646d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 47656d2f89dfSmajd@mellanox.com }, 47666d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 47676d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 47686d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 47696d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 47706d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 47716d2f89dfSmajd@mellanox.com }, 47726d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 47736d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 47746d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 47756d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 47766d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 47776d2f89dfSmajd@mellanox.com }, 47786d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 47796d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 47806d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 47816d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 47826d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 47836d2f89dfSmajd@mellanox.com }, 47846d2f89dfSmajd@mellanox.com }; 47856d2f89dfSmajd@mellanox.com 47866d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 47876d2f89dfSmajd@mellanox.com 47886d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 47896d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 47906d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 47916d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 47926d2f89dfSmajd@mellanox.com return -EINVAL; 47936d2f89dfSmajd@mellanox.com } 47946d2f89dfSmajd@mellanox.com 47956d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 47966d2f89dfSmajd@mellanox.com *qp_state = qp->state; 47976d2f89dfSmajd@mellanox.com 47986d2f89dfSmajd@mellanox.com return 0; 47996d2f89dfSmajd@mellanox.com } 48006d2f89dfSmajd@mellanox.com 48016d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 48026d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 48036d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 48046d2f89dfSmajd@mellanox.com { 48056d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 48066d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 48076d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 48086d2f89dfSmajd@mellanox.com int err; 48096d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 48106d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 48116d2f89dfSmajd@mellanox.com 48126d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 48136d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 48146d2f89dfSmajd@mellanox.com if (err) 48156d2f89dfSmajd@mellanox.com return err; 48166d2f89dfSmajd@mellanox.com } 48176d2f89dfSmajd@mellanox.com 48186d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 48196d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 48206d2f89dfSmajd@mellanox.com if (err) 48216d2f89dfSmajd@mellanox.com return err; 48226d2f89dfSmajd@mellanox.com } 48236d2f89dfSmajd@mellanox.com 48246d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 48256d2f89dfSmajd@mellanox.com raw_packet_qp_state); 48266d2f89dfSmajd@mellanox.com } 48276d2f89dfSmajd@mellanox.com 48286d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 48296d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 48306d2f89dfSmajd@mellanox.com { 483109a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 4832e126ba97SEli Cohen struct mlx5_qp_context *context; 4833e126ba97SEli Cohen int mlx5_state; 483409a7d9ecSSaeed Mahameed u32 *outb; 4835e126ba97SEli Cohen int err = 0; 4836e126ba97SEli Cohen 483709a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 48386d2f89dfSmajd@mellanox.com if (!outb) 48396d2f89dfSmajd@mellanox.com return -ENOMEM; 48406d2f89dfSmajd@mellanox.com 484119098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 484209a7d9ecSSaeed Mahameed outlen); 4843e126ba97SEli Cohen if (err) 48446d2f89dfSmajd@mellanox.com goto out; 4845e126ba97SEli Cohen 484609a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 484709a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 484809a7d9ecSSaeed Mahameed 4849e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 4850e126ba97SEli Cohen 4851e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 4852e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 4853e126ba97SEli Cohen qp_attr->path_mig_state = 4854e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 4855e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 4856e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 4857e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 4858e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 4859e126ba97SEli Cohen qp_attr->qp_access_flags = 4860e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 4861e126ba97SEli Cohen 4862e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 486338349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 486438349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 4865d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 4866d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 4867d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 4868d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 4869e126ba97SEli Cohen } 4870e126ba97SEli Cohen 4871d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 4872e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 4873e126ba97SEli Cohen 4874e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 4875e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 4876e126ba97SEli Cohen 4877e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 4878e126ba97SEli Cohen 4879e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 4880e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 4881e126ba97SEli Cohen qp_attr->min_rnr_timer = 4882e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 4883e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 4884e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 4885e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 4886e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 48876d2f89dfSmajd@mellanox.com 48886d2f89dfSmajd@mellanox.com out: 48896d2f89dfSmajd@mellanox.com kfree(outb); 48906d2f89dfSmajd@mellanox.com return err; 48916d2f89dfSmajd@mellanox.com } 48926d2f89dfSmajd@mellanox.com 4893776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 4894776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 4895776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 4896776a3906SMoni Shoua { 4897776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 4898776a3906SMoni Shoua u32 *out; 4899776a3906SMoni Shoua u32 access_flags = 0; 4900776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 4901776a3906SMoni Shoua void *dctc; 4902776a3906SMoni Shoua int err; 4903776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 4904776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 4905776a3906SMoni Shoua IB_QP_PORT | 4906776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 4907776a3906SMoni Shoua IB_QP_AV | 4908776a3906SMoni Shoua IB_QP_PATH_MTU | 4909776a3906SMoni Shoua IB_QP_PKEY_INDEX; 4910776a3906SMoni Shoua 4911776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 4912776a3906SMoni Shoua return -EINVAL; 4913776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 4914776a3906SMoni Shoua return -EINVAL; 4915776a3906SMoni Shoua 4916776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 4917776a3906SMoni Shoua if (!out) 4918776a3906SMoni Shoua return -ENOMEM; 4919776a3906SMoni Shoua 4920776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 4921776a3906SMoni Shoua if (err) 4922776a3906SMoni Shoua goto out; 4923776a3906SMoni Shoua 4924776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 4925776a3906SMoni Shoua 4926776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 4927776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 4928776a3906SMoni Shoua 4929776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 4930776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 4931776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 4932776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 4933776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 4934776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 4935776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 4936776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 4937776a3906SMoni Shoua } 4938776a3906SMoni Shoua 4939776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 4940776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 4941776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 4942776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 4943776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 4944776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 4945776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 4946776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 4947776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 4948776a3906SMoni Shoua } 4949776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 4950776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 4951776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 4952776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 4953776a3906SMoni Shoua out: 4954776a3906SMoni Shoua kfree(out); 4955776a3906SMoni Shoua return err; 4956776a3906SMoni Shoua } 4957776a3906SMoni Shoua 49586d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 49596d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 49606d2f89dfSmajd@mellanox.com { 49616d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 49626d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 49636d2f89dfSmajd@mellanox.com int err = 0; 49646d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 49656d2f89dfSmajd@mellanox.com 496628d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 496728d61370SYishai Hadas return -ENOSYS; 496828d61370SYishai Hadas 4969d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4970d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 4971d16e91daSHaggai Eran qp_init_attr); 4972d16e91daSHaggai Eran 4973c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 4974c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 4975c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 4976c2e53b2cSYishai Hadas 4977776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 4978776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 4979776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 4980776a3906SMoni Shoua 49816d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 49826d2f89dfSmajd@mellanox.com 4983c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 4984c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 49856d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 49866d2f89dfSmajd@mellanox.com if (err) 49876d2f89dfSmajd@mellanox.com goto out; 49886d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 49896d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 49906d2f89dfSmajd@mellanox.com } else { 49916d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 49926d2f89dfSmajd@mellanox.com if (err) 49936d2f89dfSmajd@mellanox.com goto out; 49946d2f89dfSmajd@mellanox.com } 49956d2f89dfSmajd@mellanox.com 49966d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 4997e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 4998e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 4999e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5000e126ba97SEli Cohen 5001e126ba97SEli Cohen if (!ibqp->uobject) { 50020540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5003e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 50040540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5005e126ba97SEli Cohen } else { 5006e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5007e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5008e126ba97SEli Cohen } 5009e126ba97SEli Cohen 50100540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 50110540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 50120540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 50130540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 50140540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5015e126ba97SEli Cohen 5016e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5017e126ba97SEli Cohen 5018e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5019e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5020e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5021e126ba97SEli Cohen 5022051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5023051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5024051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5025051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5026051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5027051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5028b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5029b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5030051f2630SLeon Romanovsky 5031e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5032e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5033e126ba97SEli Cohen 5034e126ba97SEli Cohen out: 5035e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5036e126ba97SEli Cohen return err; 5037e126ba97SEli Cohen } 5038e126ba97SEli Cohen 5039e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5040e126ba97SEli Cohen struct ib_ucontext *context, 5041e126ba97SEli Cohen struct ib_udata *udata) 5042e126ba97SEli Cohen { 5043e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5044e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5045e126ba97SEli Cohen int err; 5046e126ba97SEli Cohen 5047938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5048e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5049e126ba97SEli Cohen 5050e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5051e126ba97SEli Cohen if (!xrcd) 5052e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5053e126ba97SEli Cohen 50549603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 5055e126ba97SEli Cohen if (err) { 5056e126ba97SEli Cohen kfree(xrcd); 5057e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5058e126ba97SEli Cohen } 5059e126ba97SEli Cohen 5060e126ba97SEli Cohen return &xrcd->ibxrcd; 5061e126ba97SEli Cohen } 5062e126ba97SEli Cohen 5063e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5064e126ba97SEli Cohen { 5065e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5066e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5067e126ba97SEli Cohen int err; 5068e126ba97SEli Cohen 50699603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 5070e126ba97SEli Cohen if (err) { 5071e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5072e126ba97SEli Cohen return err; 5073e126ba97SEli Cohen } 5074e126ba97SEli Cohen 5075e126ba97SEli Cohen kfree(xrcd); 5076e126ba97SEli Cohen 5077e126ba97SEli Cohen return 0; 5078e126ba97SEli Cohen } 507979b20a6cSYishai Hadas 5080350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5081350d0e4cSYishai Hadas { 5082350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5083350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5084350d0e4cSYishai Hadas struct ib_event event; 5085350d0e4cSYishai Hadas 5086350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5087350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5088350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5089350d0e4cSYishai Hadas switch (type) { 5090350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5091350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5092350d0e4cSYishai Hadas break; 5093350d0e4cSYishai Hadas default: 5094350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5095350d0e4cSYishai Hadas return; 5096350d0e4cSYishai Hadas } 5097350d0e4cSYishai Hadas 5098350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5099350d0e4cSYishai Hadas } 5100350d0e4cSYishai Hadas } 5101350d0e4cSYishai Hadas 510203404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 510303404e8aSMaor Gottlieb { 510403404e8aSMaor Gottlieb int err = 0; 510503404e8aSMaor Gottlieb 510603404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 510703404e8aSMaor Gottlieb if (dev->delay_drop.activate) 510803404e8aSMaor Gottlieb goto out; 510903404e8aSMaor Gottlieb 511003404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 511103404e8aSMaor Gottlieb if (err) 511203404e8aSMaor Gottlieb goto out; 511303404e8aSMaor Gottlieb 511403404e8aSMaor Gottlieb dev->delay_drop.activate = true; 511503404e8aSMaor Gottlieb out: 511603404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5117fe248c3aSMaor Gottlieb 5118fe248c3aSMaor Gottlieb if (!err) 5119fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 512003404e8aSMaor Gottlieb return err; 512103404e8aSMaor Gottlieb } 512203404e8aSMaor Gottlieb 512379b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 512479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 512579b20a6cSYishai Hadas { 512679b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 51274be6da1eSNoa Osherovich int has_net_offloads; 512879b20a6cSYishai Hadas __be64 *rq_pas0; 512979b20a6cSYishai Hadas void *in; 513079b20a6cSYishai Hadas void *rqc; 513179b20a6cSYishai Hadas void *wq; 513279b20a6cSYishai Hadas int inlen; 513379b20a6cSYishai Hadas int err; 513479b20a6cSYishai Hadas 513579b20a6cSYishai Hadas dev = to_mdev(pd->device); 513679b20a6cSYishai Hadas 513779b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 51381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 513979b20a6cSYishai Hadas if (!in) 514079b20a6cSYishai Hadas return -ENOMEM; 514179b20a6cSYishai Hadas 514279b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 514379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 514479b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 514579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 514679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 514779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 514879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 514979b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5150ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5151ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5152ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5153b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5154b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5155b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5156b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5157b1383aa6SNoa Osherovich goto out; 5158b1383aa6SNoa Osherovich } else { 515979b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5160b1383aa6SNoa Osherovich } 5161b1383aa6SNoa Osherovich } 516279b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5163ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5164ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5165ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5166ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5167ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5168ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5169ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5170ccc87087SNoa Osherovich } 517179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 517279b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 517379b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 517479b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 517579b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 517679b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 51774be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5178b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 51794be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5180b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5181b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5182b1f74a84SNoa Osherovich goto out; 5183b1f74a84SNoa Osherovich } 5184b1f74a84SNoa Osherovich } else { 5185b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5186b1f74a84SNoa Osherovich } 51874be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 51884be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 51894be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 51904be6da1eSNoa Osherovich err = -EOPNOTSUPP; 51914be6da1eSNoa Osherovich goto out; 51924be6da1eSNoa Osherovich } 51934be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 51944be6da1eSNoa Osherovich } 519503404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 519603404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 519703404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 519803404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 519903404e8aSMaor Gottlieb err = -EOPNOTSUPP; 520003404e8aSMaor Gottlieb goto out; 520103404e8aSMaor Gottlieb } 520203404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 520303404e8aSMaor Gottlieb } 520479b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 520579b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5206350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 520703404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 520803404e8aSMaor Gottlieb err = set_delay_drop(dev); 520903404e8aSMaor Gottlieb if (err) { 521003404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 521103404e8aSMaor Gottlieb err); 521203404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 521303404e8aSMaor Gottlieb } else { 521403404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 521503404e8aSMaor Gottlieb } 521603404e8aSMaor Gottlieb } 5217b1f74a84SNoa Osherovich out: 521879b20a6cSYishai Hadas kvfree(in); 521979b20a6cSYishai Hadas return err; 522079b20a6cSYishai Hadas } 522179b20a6cSYishai Hadas 522279b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 522379b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 522479b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 522579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 522679b20a6cSYishai Hadas { 522779b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 522879b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 522979b20a6cSYishai Hadas return -EINVAL; 523079b20a6cSYishai Hadas 523179b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 523279b20a6cSYishai Hadas return -EINVAL; 523379b20a6cSYishai Hadas 523479b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 523579b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 523679b20a6cSYishai Hadas rwq->buf_size = (rwq->wqe_count << rwq->wqe_shift); 523779b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 523879b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 523979b20a6cSYishai Hadas return 0; 524079b20a6cSYishai Hadas } 524179b20a6cSYishai Hadas 524279b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 524379b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 524479b20a6cSYishai Hadas struct ib_udata *udata, 524579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 524679b20a6cSYishai Hadas { 524779b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 524879b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 524979b20a6cSYishai Hadas int err; 525079b20a6cSYishai Hadas size_t required_cmd_sz; 525179b20a6cSYishai Hadas 5252ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5253ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 525479b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 525579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 525679b20a6cSYishai Hadas return -EINVAL; 525779b20a6cSYishai Hadas } 525879b20a6cSYishai Hadas 525979b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 526079b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 526179b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 526279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 526379b20a6cSYishai Hadas return -EOPNOTSUPP; 526479b20a6cSYishai Hadas } 526579b20a6cSYishai Hadas 526679b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 526779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 526879b20a6cSYishai Hadas return -EFAULT; 526979b20a6cSYishai Hadas } 527079b20a6cSYishai Hadas 5271ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 527279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 527379b20a6cSYishai Hadas return -EOPNOTSUPP; 5274ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5275ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5276ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 527779b20a6cSYishai Hadas return -EOPNOTSUPP; 527879b20a6cSYishai Hadas } 5279ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5280ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5281ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5282ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5283ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5284ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5285ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5286ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5287ccc87087SNoa Osherovich return -EINVAL; 5288ccc87087SNoa Osherovich } 5289ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5290ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5291ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5292ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5293ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5294ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5295ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5296ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5297ccc87087SNoa Osherovich return -EINVAL; 5298ccc87087SNoa Osherovich } 5299ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5300ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5301ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5302ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5303ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5304ccc87087SNoa Osherovich } 530579b20a6cSYishai Hadas 530679b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 530779b20a6cSYishai Hadas if (err) { 530879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 530979b20a6cSYishai Hadas return err; 531079b20a6cSYishai Hadas } 531179b20a6cSYishai Hadas 531279b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 531379b20a6cSYishai Hadas if (err) { 531479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 531579b20a6cSYishai Hadas if (err) 531679b20a6cSYishai Hadas return err; 531779b20a6cSYishai Hadas } 531879b20a6cSYishai Hadas 531979b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 532079b20a6cSYishai Hadas return 0; 532179b20a6cSYishai Hadas } 532279b20a6cSYishai Hadas 532379b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 532479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 532579b20a6cSYishai Hadas struct ib_udata *udata) 532679b20a6cSYishai Hadas { 532779b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 532879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 532979b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 533079b20a6cSYishai Hadas size_t min_resp_len; 533179b20a6cSYishai Hadas int err; 533279b20a6cSYishai Hadas 533379b20a6cSYishai Hadas if (!udata) 533479b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 533579b20a6cSYishai Hadas 533679b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 533779b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 533879b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 533979b20a6cSYishai Hadas 534079b20a6cSYishai Hadas dev = to_mdev(pd->device); 534179b20a6cSYishai Hadas switch (init_attr->wq_type) { 534279b20a6cSYishai Hadas case IB_WQT_RQ: 534379b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 534479b20a6cSYishai Hadas if (!rwq) 534579b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 534679b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 534779b20a6cSYishai Hadas if (err) 534879b20a6cSYishai Hadas goto err; 534979b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 535079b20a6cSYishai Hadas if (err) 535179b20a6cSYishai Hadas goto err_user_rq; 535279b20a6cSYishai Hadas break; 535379b20a6cSYishai Hadas default: 535479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 535579b20a6cSYishai Hadas init_attr->wq_type); 535679b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 535779b20a6cSYishai Hadas } 535879b20a6cSYishai Hadas 5359350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 536079b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 536179b20a6cSYishai Hadas if (udata->outlen) { 536279b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 536379b20a6cSYishai Hadas sizeof(resp.response_length); 536479b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 536579b20a6cSYishai Hadas if (err) 536679b20a6cSYishai Hadas goto err_copy; 536779b20a6cSYishai Hadas } 536879b20a6cSYishai Hadas 5369350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5370350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 537179b20a6cSYishai Hadas return &rwq->ibwq; 537279b20a6cSYishai Hadas 537379b20a6cSYishai Hadas err_copy: 5374350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 537579b20a6cSYishai Hadas err_user_rq: 5376fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 537779b20a6cSYishai Hadas err: 537879b20a6cSYishai Hadas kfree(rwq); 537979b20a6cSYishai Hadas return ERR_PTR(err); 538079b20a6cSYishai Hadas } 538179b20a6cSYishai Hadas 538279b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 538379b20a6cSYishai Hadas { 538479b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 538579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 538679b20a6cSYishai Hadas 5387350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5388fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 538979b20a6cSYishai Hadas kfree(rwq); 539079b20a6cSYishai Hadas 539179b20a6cSYishai Hadas return 0; 539279b20a6cSYishai Hadas } 539379b20a6cSYishai Hadas 5394c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5395c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5396c5f90929SYishai Hadas struct ib_udata *udata) 5397c5f90929SYishai Hadas { 5398c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5399c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5400c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5401c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5402c5f90929SYishai Hadas size_t min_resp_len; 5403c5f90929SYishai Hadas int inlen; 5404c5f90929SYishai Hadas int err; 5405c5f90929SYishai Hadas int i; 5406c5f90929SYishai Hadas u32 *in; 5407c5f90929SYishai Hadas void *rqtc; 5408c5f90929SYishai Hadas 5409c5f90929SYishai Hadas if (udata->inlen > 0 && 5410c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5411c5f90929SYishai Hadas udata->inlen)) 5412c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5413c5f90929SYishai Hadas 5414efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5415efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5416efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5417efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5418efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5419efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5420efd7f400SMaor Gottlieb } 5421efd7f400SMaor Gottlieb 5422c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5423c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5424c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5425c5f90929SYishai Hadas 5426c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5427c5f90929SYishai Hadas if (!rwq_ind_tbl) 5428c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5429c5f90929SYishai Hadas 5430c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 54311b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5432c5f90929SYishai Hadas if (!in) { 5433c5f90929SYishai Hadas err = -ENOMEM; 5434c5f90929SYishai Hadas goto err; 5435c5f90929SYishai Hadas } 5436c5f90929SYishai Hadas 5437c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5438c5f90929SYishai Hadas 5439c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5440c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5441c5f90929SYishai Hadas 5442c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5443c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5444c5f90929SYishai Hadas 5445c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5446c5f90929SYishai Hadas kvfree(in); 5447c5f90929SYishai Hadas 5448c5f90929SYishai Hadas if (err) 5449c5f90929SYishai Hadas goto err; 5450c5f90929SYishai Hadas 5451c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5452c5f90929SYishai Hadas if (udata->outlen) { 5453c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5454c5f90929SYishai Hadas sizeof(resp.response_length); 5455c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5456c5f90929SYishai Hadas if (err) 5457c5f90929SYishai Hadas goto err_copy; 5458c5f90929SYishai Hadas } 5459c5f90929SYishai Hadas 5460c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5461c5f90929SYishai Hadas 5462c5f90929SYishai Hadas err_copy: 5463c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5464c5f90929SYishai Hadas err: 5465c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5466c5f90929SYishai Hadas return ERR_PTR(err); 5467c5f90929SYishai Hadas } 5468c5f90929SYishai Hadas 5469c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5470c5f90929SYishai Hadas { 5471c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5472c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5473c5f90929SYishai Hadas 5474c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5475c5f90929SYishai Hadas 5476c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5477c5f90929SYishai Hadas return 0; 5478c5f90929SYishai Hadas } 5479c5f90929SYishai Hadas 548079b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 548179b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 548279b20a6cSYishai Hadas { 548379b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 548479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 548579b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 548679b20a6cSYishai Hadas size_t required_cmd_sz; 548779b20a6cSYishai Hadas int curr_wq_state; 548879b20a6cSYishai Hadas int wq_state; 548979b20a6cSYishai Hadas int inlen; 549079b20a6cSYishai Hadas int err; 549179b20a6cSYishai Hadas void *rqc; 549279b20a6cSYishai Hadas void *in; 549379b20a6cSYishai Hadas 549479b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 549579b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 549679b20a6cSYishai Hadas return -EINVAL; 549779b20a6cSYishai Hadas 549879b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 549979b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 550079b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 550179b20a6cSYishai Hadas return -EOPNOTSUPP; 550279b20a6cSYishai Hadas 550379b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 550479b20a6cSYishai Hadas return -EFAULT; 550579b20a6cSYishai Hadas 550679b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 550779b20a6cSYishai Hadas return -EOPNOTSUPP; 550879b20a6cSYishai Hadas 550979b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 55101b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 551179b20a6cSYishai Hadas if (!in) 551279b20a6cSYishai Hadas return -ENOMEM; 551379b20a6cSYishai Hadas 551479b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 551579b20a6cSYishai Hadas 551679b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 551779b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 551879b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 551979b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 552079b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 552179b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 552279b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 552379b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 552479b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 552579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 552679b20a6cSYishai Hadas 5527b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5528b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5529b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5530b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5531b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5532b1f74a84SNoa Osherovich "supported\n"); 5533b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5534b1f74a84SNoa Osherovich goto out; 5535b1f74a84SNoa Osherovich } 5536b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5537b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5538b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5539b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5540b1f74a84SNoa Osherovich } 5541b1383aa6SNoa Osherovich 5542b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5543b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5544b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5545b1383aa6SNoa Osherovich goto out; 5546b1383aa6SNoa Osherovich } 5547b1f74a84SNoa Osherovich } 5548b1f74a84SNoa Osherovich 554923a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 555023a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 555123a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 555223a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5553e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5554e1f24a79SParav Pandit dev->port->cnts.set_id); 555523a6964eSMajd Dibbiny } else 555623a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 555723a6964eSMajd Dibbiny dev->ib_dev.name); 555823a6964eSMajd Dibbiny } 555923a6964eSMajd Dibbiny 5560350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 556179b20a6cSYishai Hadas if (!err) 556279b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 556379b20a6cSYishai Hadas 5564b1f74a84SNoa Osherovich out: 5565b1f74a84SNoa Osherovich kvfree(in); 556679b20a6cSYishai Hadas return err; 556779b20a6cSYishai Hadas } 5568