1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40e126ba97SEli Cohen 41e126ba97SEli Cohen /* not supported currently */ 42e126ba97SEli Cohen static int wq_signature; 43e126ba97SEli Cohen 44e126ba97SEli Cohen enum { 45e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 46e126ba97SEli Cohen }; 47e126ba97SEli Cohen 48e126ba97SEli Cohen enum { 49e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 50e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 53e126ba97SEli Cohen }; 54e126ba97SEli Cohen 55e126ba97SEli Cohen enum { 56e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 57e126ba97SEli Cohen }; 58e126ba97SEli Cohen 59e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 60e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 61f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 62e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 63e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 64e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 66e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 67e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 68e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 69e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 708a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 71e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 72e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 73e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 74e126ba97SEli Cohen }; 75e126ba97SEli Cohen 76f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 77f0313965SErez Shitrit u8 rsvd0[16]; 78f0313965SErez Shitrit }; 79e126ba97SEli Cohen 80eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 81eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 827d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 83eb49ab0cSAlex Vesker }; 84eb49ab0cSAlex Vesker 850680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 860680efa2SAlex Vesker u16 operation; 87eb49ab0cSAlex Vesker 88eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 897d29f349SBodong Wang u32 rate_limit; 90eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 910680efa2SAlex Vesker }; 920680efa2SAlex Vesker 9389ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9489ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9589ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 9689ea94a7SMaor Gottlieb 97e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 98e126ba97SEli Cohen { 99e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 100e126ba97SEli Cohen } 101e126ba97SEli Cohen 102e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 103e126ba97SEli Cohen { 104e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 105e126ba97SEli Cohen } 106e126ba97SEli Cohen 107e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 108e126ba97SEli Cohen { 109e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 110e126ba97SEli Cohen } 111e126ba97SEli Cohen 112e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 113e126ba97SEli Cohen { 114e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 115e126ba97SEli Cohen } 116e126ba97SEli Cohen 117e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 118e126ba97SEli Cohen { 119e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 120e126ba97SEli Cohen } 121e126ba97SEli Cohen 122c1395a2aSHaggai Eran /** 123c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 124c1395a2aSHaggai Eran * 125c1395a2aSHaggai Eran * @qp: QP to copy from. 126c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 127c1395a2aSHaggai Eran * otherwise. 128c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 129c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 130c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 131c1395a2aSHaggai Eran * element in the queue. 132c1395a2aSHaggai Eran * @buffer: destination buffer. 133c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 134c1395a2aSHaggai Eran * 135c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 136c1395a2aSHaggai Eran * 137c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 138c1395a2aSHaggai Eran */ 139c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14019098df2Smajd@mellanox.com void *buffer, u32 length, 14119098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 142c1395a2aSHaggai Eran { 143c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 144c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 145c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 146c1395a2aSHaggai Eran size_t offset; 147c1395a2aSHaggai Eran size_t wq_end; 14819098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 149c1395a2aSHaggai Eran u32 first_copy_length; 150c1395a2aSHaggai Eran int wqe_length; 151c1395a2aSHaggai Eran int ret; 152c1395a2aSHaggai Eran 153c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 154c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 155c1395a2aSHaggai Eran qp->ibqp.qp_type); 156c1395a2aSHaggai Eran return -EINVAL; 157c1395a2aSHaggai Eran } 158c1395a2aSHaggai Eran 159c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 160c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 161c1395a2aSHaggai Eran 162c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 163c1395a2aSHaggai Eran return -EINVAL; 164c1395a2aSHaggai Eran 165c1395a2aSHaggai Eran if (offset > umem->length || 166c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 167c1395a2aSHaggai Eran return -EINVAL; 168c1395a2aSHaggai Eran 169c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 170c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 171c1395a2aSHaggai Eran if (ret) 172c1395a2aSHaggai Eran return ret; 173c1395a2aSHaggai Eran 174c1395a2aSHaggai Eran if (send) { 175c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 176c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 177c1395a2aSHaggai Eran 178c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 179c1395a2aSHaggai Eran } else { 180c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 181c1395a2aSHaggai Eran } 182c1395a2aSHaggai Eran 183c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 184c1395a2aSHaggai Eran return first_copy_length; 185c1395a2aSHaggai Eran 186c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 187c1395a2aSHaggai Eran wqe_length - first_copy_length); 188c1395a2aSHaggai Eran if (ret) 189c1395a2aSHaggai Eran return ret; 190c1395a2aSHaggai Eran 191c1395a2aSHaggai Eran return wqe_length; 192c1395a2aSHaggai Eran } 193c1395a2aSHaggai Eran 194e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 195e126ba97SEli Cohen { 196e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 197e126ba97SEli Cohen struct ib_event event; 198e126ba97SEli Cohen 19919098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20019098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20119098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20219098df2Smajd@mellanox.com } 203e126ba97SEli Cohen 204e126ba97SEli Cohen if (ibqp->event_handler) { 205e126ba97SEli Cohen event.device = ibqp->device; 206e126ba97SEli Cohen event.element.qp = ibqp; 207e126ba97SEli Cohen switch (type) { 208e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 209e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 210e126ba97SEli Cohen break; 211e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 212e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 213e126ba97SEli Cohen break; 214e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 215e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 216e126ba97SEli Cohen break; 217e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 218e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 219e126ba97SEli Cohen break; 220e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 221e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 222e126ba97SEli Cohen break; 223e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 224e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 225e126ba97SEli Cohen break; 226e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 227e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 228e126ba97SEli Cohen break; 229e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 230e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 231e126ba97SEli Cohen break; 232e126ba97SEli Cohen default: 233e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 234e126ba97SEli Cohen return; 235e126ba97SEli Cohen } 236e126ba97SEli Cohen 237e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 238e126ba97SEli Cohen } 239e126ba97SEli Cohen } 240e126ba97SEli Cohen 241e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 242e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 243e126ba97SEli Cohen { 244e126ba97SEli Cohen int wqe_size; 245e126ba97SEli Cohen int wq_size; 246e126ba97SEli Cohen 247e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 248938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 249e126ba97SEli Cohen return -EINVAL; 250e126ba97SEli Cohen 251e126ba97SEli Cohen if (!has_rq) { 252e126ba97SEli Cohen qp->rq.max_gs = 0; 253e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 254e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2550540d814SNoa Osherovich cap->max_recv_wr = 0; 2560540d814SNoa Osherovich cap->max_recv_sge = 0; 257e126ba97SEli Cohen } else { 258e126ba97SEli Cohen if (ucmd) { 259e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 260e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 261e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 262e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 263e126ba97SEli Cohen } else { 264e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 265e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 266e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 267e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 268e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 269e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 270938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 271e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 272e126ba97SEli Cohen wqe_size, 273938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 274938fe83cSSaeed Mahameed max_wqe_sz_rq)); 275e126ba97SEli Cohen return -EINVAL; 276e126ba97SEli Cohen } 277e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 278e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 279e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 280e126ba97SEli Cohen } 281e126ba97SEli Cohen } 282e126ba97SEli Cohen 283e126ba97SEli Cohen return 0; 284e126ba97SEli Cohen } 285e126ba97SEli Cohen 286f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 287e126ba97SEli Cohen { 288618af384SAndi Shyti int size = 0; 289e126ba97SEli Cohen 290f0313965SErez Shitrit switch (attr->qp_type) { 291e126ba97SEli Cohen case IB_QPT_XRC_INI: 292b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 293e126ba97SEli Cohen /* fall through */ 294e126ba97SEli Cohen case IB_QPT_RC: 295e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 29675c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 29775c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 29875c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 29975c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 300e126ba97SEli Cohen break; 301e126ba97SEli Cohen 302b125a54bSEli Cohen case IB_QPT_XRC_TGT: 303b125a54bSEli Cohen return 0; 304b125a54bSEli Cohen 305e126ba97SEli Cohen case IB_QPT_UC: 306b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3089e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 30975c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen 312e126ba97SEli Cohen case IB_QPT_UD: 313f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 314f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 315f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 316f0313965SErez Shitrit /* fall through */ 317e126ba97SEli Cohen case IB_QPT_SMI: 318d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 319b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 320e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 321e126ba97SEli Cohen break; 322e126ba97SEli Cohen 323e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 324b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 325e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 326e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 327e126ba97SEli Cohen break; 328e126ba97SEli Cohen 329e126ba97SEli Cohen default: 330e126ba97SEli Cohen return -EINVAL; 331e126ba97SEli Cohen } 332e126ba97SEli Cohen 333e126ba97SEli Cohen return size; 334e126ba97SEli Cohen } 335e126ba97SEli Cohen 336e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 337e126ba97SEli Cohen { 338e126ba97SEli Cohen int inl_size = 0; 339e126ba97SEli Cohen int size; 340e126ba97SEli Cohen 341f0313965SErez Shitrit size = sq_overhead(attr); 342e126ba97SEli Cohen if (size < 0) 343e126ba97SEli Cohen return size; 344e126ba97SEli Cohen 345e126ba97SEli Cohen if (attr->cap.max_inline_data) { 346e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 347e126ba97SEli Cohen attr->cap.max_inline_data; 348e126ba97SEli Cohen } 349e126ba97SEli Cohen 350e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 351e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 352e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 353e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 354e1e66cc2SSagi Grimberg else 355e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 356e126ba97SEli Cohen } 357e126ba97SEli Cohen 358288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 359288c01b7SEli Cohen { 360288c01b7SEli Cohen int max_sge; 361288c01b7SEli Cohen 362288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 363288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 364288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 365288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 366288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 367288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 368288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 369288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 370288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 371288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 372288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 373288c01b7SEli Cohen else 374288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 376288c01b7SEli Cohen 377288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 378288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 379288c01b7SEli Cohen } 380288c01b7SEli Cohen 381e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 382e126ba97SEli Cohen struct mlx5_ib_qp *qp) 383e126ba97SEli Cohen { 384e126ba97SEli Cohen int wqe_size; 385e126ba97SEli Cohen int wq_size; 386e126ba97SEli Cohen 387e126ba97SEli Cohen if (!attr->cap.max_send_wr) 388e126ba97SEli Cohen return 0; 389e126ba97SEli Cohen 390e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 391e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 392e126ba97SEli Cohen if (wqe_size < 0) 393e126ba97SEli Cohen return wqe_size; 394e126ba97SEli Cohen 395938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 396b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 397938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 398e126ba97SEli Cohen return -EINVAL; 399e126ba97SEli Cohen } 400e126ba97SEli Cohen 401f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 402e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 403e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 404e126ba97SEli Cohen 405e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 406e1e66cc2SSagi Grimberg qp->signature_en = true; 407e1e66cc2SSagi Grimberg 408e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 409e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 410938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4111974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4121974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 413938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 414938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 415b125a54bSEli Cohen return -ENOMEM; 416b125a54bSEli Cohen } 417e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 418288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 419288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 420288c01b7SEli Cohen return -ENOMEM; 421288c01b7SEli Cohen 422288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 423b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 424b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 425e126ba97SEli Cohen 426e126ba97SEli Cohen return wq_size; 427e126ba97SEli Cohen } 428e126ba97SEli Cohen 429e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 430e126ba97SEli Cohen struct mlx5_ib_qp *qp, 43119098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4320fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4330fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 434e126ba97SEli Cohen { 435e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 436e126ba97SEli Cohen 437938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 438e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 439938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 440e126ba97SEli Cohen return -EINVAL; 441e126ba97SEli Cohen } 442e126ba97SEli Cohen 443e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 444e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 445e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 446e126ba97SEli Cohen return -EINVAL; 447e126ba97SEli Cohen } 448e126ba97SEli Cohen 449e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 450e126ba97SEli Cohen 451938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 452e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 453938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 454938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 455e126ba97SEli Cohen return -EINVAL; 456e126ba97SEli Cohen } 457e126ba97SEli Cohen 458c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 459c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4600fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4610fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4620fb2ed66Smajd@mellanox.com } else { 46319098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 464e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4650fb2ed66Smajd@mellanox.com } 466e126ba97SEli Cohen 467e126ba97SEli Cohen return 0; 468e126ba97SEli Cohen } 469e126ba97SEli Cohen 470e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 471e126ba97SEli Cohen { 472e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 473e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 474e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 475e126ba97SEli Cohen !attr->cap.max_recv_wr) 476e126ba97SEli Cohen return 0; 477e126ba97SEli Cohen 478e126ba97SEli Cohen return 1; 479e126ba97SEli Cohen } 480e126ba97SEli Cohen 4812f5ff264SEli Cohen static int first_med_bfreg(void) 482c1be5232SEli Cohen { 483c1be5232SEli Cohen return 1; 484c1be5232SEli Cohen } 485c1be5232SEli Cohen 4860b80c14fSEli Cohen enum { 4870b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4880b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4890b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4900b80c14fSEli Cohen * "odd/even" order 4910b80c14fSEli Cohen */ 4920b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4930b80c14fSEli Cohen }; 4940b80c14fSEli Cohen 495b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 496b037c29aSEli Cohen { 49731a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 498b037c29aSEli Cohen } 499b037c29aSEli Cohen 500b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 501b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 502c1be5232SEli Cohen { 503c1be5232SEli Cohen int n; 504c1be5232SEli Cohen 505b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 506b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 507c1be5232SEli Cohen 508c1be5232SEli Cohen return n >= 0 ? n : 0; 509c1be5232SEli Cohen } 510c1be5232SEli Cohen 511b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 512b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 513c1be5232SEli Cohen { 514c1be5232SEli Cohen int med; 515c1be5232SEli Cohen 516b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 517b037c29aSEli Cohen return ++med; 518c1be5232SEli Cohen } 519c1be5232SEli Cohen 520b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 521b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 522e126ba97SEli Cohen { 523e126ba97SEli Cohen int i; 524e126ba97SEli Cohen 525b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 526b037c29aSEli Cohen if (!bfregi->count[i]) { 5272f5ff264SEli Cohen bfregi->count[i]++; 528e126ba97SEli Cohen return i; 529e126ba97SEli Cohen } 530e126ba97SEli Cohen } 531e126ba97SEli Cohen 532e126ba97SEli Cohen return -ENOMEM; 533e126ba97SEli Cohen } 534e126ba97SEli Cohen 535b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 536b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 537e126ba97SEli Cohen { 5382f5ff264SEli Cohen int minidx = first_med_bfreg(); 539e126ba97SEli Cohen int i; 540e126ba97SEli Cohen 541b037c29aSEli Cohen for (i = first_med_bfreg(); i < first_hi_bfreg(dev, bfregi); i++) { 5422f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 543e126ba97SEli Cohen minidx = i; 5440b80c14fSEli Cohen if (!bfregi->count[minidx]) 5450b80c14fSEli Cohen break; 546e126ba97SEli Cohen } 547e126ba97SEli Cohen 5482f5ff264SEli Cohen bfregi->count[minidx]++; 549e126ba97SEli Cohen return minidx; 550e126ba97SEli Cohen } 551e126ba97SEli Cohen 552b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 553b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, 554e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 555e126ba97SEli Cohen { 5562f5ff264SEli Cohen int bfregn = -EINVAL; 557e126ba97SEli Cohen 5582f5ff264SEli Cohen mutex_lock(&bfregi->lock); 559e126ba97SEli Cohen switch (lat) { 560e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 5610b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5622f5ff264SEli Cohen bfregn = 0; 5632f5ff264SEli Cohen bfregi->count[bfregn]++; 564e126ba97SEli Cohen break; 565e126ba97SEli Cohen 566e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 5672f5ff264SEli Cohen if (bfregi->ver < 2) 5682f5ff264SEli Cohen bfregn = -ENOMEM; 56978c0f98cSEli Cohen else 570b037c29aSEli Cohen bfregn = alloc_med_class_bfreg(dev, bfregi); 571e126ba97SEli Cohen break; 572e126ba97SEli Cohen 573e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 5742f5ff264SEli Cohen if (bfregi->ver < 2) 5752f5ff264SEli Cohen bfregn = -ENOMEM; 57678c0f98cSEli Cohen else 577b037c29aSEli Cohen bfregn = alloc_high_class_bfreg(dev, bfregi); 578e126ba97SEli Cohen break; 579e126ba97SEli Cohen } 5802f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 581e126ba97SEli Cohen 5822f5ff264SEli Cohen return bfregn; 583e126ba97SEli Cohen } 584e126ba97SEli Cohen 5854ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 586e126ba97SEli Cohen { 5872f5ff264SEli Cohen mutex_lock(&bfregi->lock); 588b037c29aSEli Cohen bfregi->count[bfregn]--; 5892f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 590e126ba97SEli Cohen } 591e126ba97SEli Cohen 592e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 593e126ba97SEli Cohen { 594e126ba97SEli Cohen switch (state) { 595e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 596e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 597e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 598e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 599e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 600e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 601e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 602e126ba97SEli Cohen default: return -1; 603e126ba97SEli Cohen } 604e126ba97SEli Cohen } 605e126ba97SEli Cohen 606e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 607e126ba97SEli Cohen { 608e126ba97SEli Cohen switch (type) { 609e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 610e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 611e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 612e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 613e126ba97SEli Cohen case IB_QPT_XRC_INI: 614e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 615e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 616d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 617c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 618e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 619e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6200fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 621e126ba97SEli Cohen case IB_QPT_MAX: 622e126ba97SEli Cohen default: return -EINVAL; 623e126ba97SEli Cohen } 624e126ba97SEli Cohen } 625e126ba97SEli Cohen 62689ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 62789ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 62889ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 62989ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63089ea94a7SMaor Gottlieb 631b037c29aSEli Cohen static int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 6321ee47ab3SYishai Hadas struct mlx5_bfreg_info *bfregi, int bfregn, 6331ee47ab3SYishai Hadas bool dyn_bfreg) 634e126ba97SEli Cohen { 635b037c29aSEli Cohen int bfregs_per_sys_page; 636b037c29aSEli Cohen int index_of_sys_page; 637b037c29aSEli Cohen int offset; 638b037c29aSEli Cohen 639b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 640b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 641b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 642b037c29aSEli Cohen 6431ee47ab3SYishai Hadas if (dyn_bfreg) { 6441ee47ab3SYishai Hadas index_of_sys_page += bfregi->num_static_sys_pages; 6451ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6461ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6471ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6481ee47ab3SYishai Hadas return -EINVAL; 6491ee47ab3SYishai Hadas } 6501ee47ab3SYishai Hadas } 651b037c29aSEli Cohen 6521ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 653b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 654e126ba97SEli Cohen } 655e126ba97SEli Cohen 65619098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 65719098df2Smajd@mellanox.com struct ib_pd *pd, 65819098df2Smajd@mellanox.com unsigned long addr, size_t size, 65919098df2Smajd@mellanox.com struct ib_umem **umem, 66019098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66119098df2Smajd@mellanox.com u32 *offset) 66219098df2Smajd@mellanox.com { 66319098df2Smajd@mellanox.com int err; 66419098df2Smajd@mellanox.com 66519098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 66619098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 66719098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 66819098df2Smajd@mellanox.com return PTR_ERR(*umem); 66919098df2Smajd@mellanox.com } 67019098df2Smajd@mellanox.com 671762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67219098df2Smajd@mellanox.com 67319098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 67419098df2Smajd@mellanox.com if (err) { 67519098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 67619098df2Smajd@mellanox.com goto err_umem; 67719098df2Smajd@mellanox.com } 67819098df2Smajd@mellanox.com 67919098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68019098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68119098df2Smajd@mellanox.com 68219098df2Smajd@mellanox.com return 0; 68319098df2Smajd@mellanox.com 68419098df2Smajd@mellanox.com err_umem: 68519098df2Smajd@mellanox.com ib_umem_release(*umem); 68619098df2Smajd@mellanox.com *umem = NULL; 68719098df2Smajd@mellanox.com 68819098df2Smajd@mellanox.com return err; 68919098df2Smajd@mellanox.com } 69019098df2Smajd@mellanox.com 691fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 692fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 69379b20a6cSYishai Hadas { 69479b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 69579b20a6cSYishai Hadas 696fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 697fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 698fe248c3aSMaor Gottlieb 69979b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70079b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70179b20a6cSYishai Hadas if (rwq->umem) 70279b20a6cSYishai Hadas ib_umem_release(rwq->umem); 70379b20a6cSYishai Hadas } 70479b20a6cSYishai Hadas 70579b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 70679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 70779b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 70879b20a6cSYishai Hadas { 70979b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71079b20a6cSYishai Hadas int page_shift = 0; 71179b20a6cSYishai Hadas int npages; 71279b20a6cSYishai Hadas u32 offset = 0; 71379b20a6cSYishai Hadas int ncont = 0; 71479b20a6cSYishai Hadas int err; 71579b20a6cSYishai Hadas 71679b20a6cSYishai Hadas if (!ucmd->buf_addr) 71779b20a6cSYishai Hadas return -EINVAL; 71879b20a6cSYishai Hadas 71979b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72079b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72179b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72279b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 72379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 72479b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 72579b20a6cSYishai Hadas return err; 72679b20a6cSYishai Hadas } 72779b20a6cSYishai Hadas 728762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 72979b20a6cSYishai Hadas &ncont, NULL); 73079b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73179b20a6cSYishai Hadas &rwq->rq_page_offset); 73279b20a6cSYishai Hadas if (err) { 73379b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 73479b20a6cSYishai Hadas goto err_umem; 73579b20a6cSYishai Hadas } 73679b20a6cSYishai Hadas 73779b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 73879b20a6cSYishai Hadas rwq->page_shift = page_shift; 73979b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74079b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74179b20a6cSYishai Hadas 74279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 74379b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 74479b20a6cSYishai Hadas npages, page_shift, ncont, offset); 74579b20a6cSYishai Hadas 74679b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 74779b20a6cSYishai Hadas if (err) { 74879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 74979b20a6cSYishai Hadas goto err_umem; 75079b20a6cSYishai Hadas } 75179b20a6cSYishai Hadas 75279b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 75379b20a6cSYishai Hadas return 0; 75479b20a6cSYishai Hadas 75579b20a6cSYishai Hadas err_umem: 75679b20a6cSYishai Hadas ib_umem_release(rwq->umem); 75779b20a6cSYishai Hadas return err; 75879b20a6cSYishai Hadas } 75979b20a6cSYishai Hadas 760b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 761b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 762b037c29aSEli Cohen { 763b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 764b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 765b037c29aSEli Cohen } 766b037c29aSEli Cohen 767e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 768e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7690fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77009a7d9ecSSaeed Mahameed u32 **in, 77119098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77219098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 773e126ba97SEli Cohen { 774e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 775e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 77619098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7779e9c47d0SEli Cohen int page_shift = 0; 7781ee47ab3SYishai Hadas int uar_index = 0; 779e126ba97SEli Cohen int npages; 7809e9c47d0SEli Cohen u32 offset = 0; 7812f5ff264SEli Cohen int bfregn; 7829e9c47d0SEli Cohen int ncont = 0; 78309a7d9ecSSaeed Mahameed __be64 *pas; 78409a7d9ecSSaeed Mahameed void *qpc; 785e126ba97SEli Cohen int err; 786e126ba97SEli Cohen 787e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 788e126ba97SEli Cohen if (err) { 789e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 790e126ba97SEli Cohen return err; 791e126ba97SEli Cohen } 792e126ba97SEli Cohen 793e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 7941ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 7951ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 7961ee47ab3SYishai Hadas ucmd.bfreg_index, true); 7971ee47ab3SYishai Hadas if (uar_index < 0) 7981ee47ab3SYishai Hadas return uar_index; 7991ee47ab3SYishai Hadas 8001ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8011ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 802e126ba97SEli Cohen /* 803e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 804e126ba97SEli Cohen */ 805051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8062f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8071ee47ab3SYishai Hadas } 808051f2630SLeon Romanovsky else { 809b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_HIGH); 8102f5ff264SEli Cohen if (bfregn < 0) { 8112f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency BFREG\n"); 812c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 813b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_MEDIUM); 8142f5ff264SEli Cohen if (bfregn < 0) { 8152f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency BFREG\n"); 816e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 817b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_LOW); 8182f5ff264SEli Cohen if (bfregn < 0) { 8192f5ff264SEli Cohen mlx5_ib_warn(dev, "bfreg allocation failed\n"); 8202f5ff264SEli Cohen return bfregn; 821e126ba97SEli Cohen } 822e126ba97SEli Cohen } 823c1be5232SEli Cohen } 824051f2630SLeon Romanovsky } 825e126ba97SEli Cohen 8262f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8271ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8281ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8291ee47ab3SYishai Hadas false); 830e126ba97SEli Cohen 83148fea837SHaggai Eran qp->rq.offset = 0; 83248fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 83348fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 83448fea837SHaggai Eran 8350fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 836e126ba97SEli Cohen if (err) 8372f5ff264SEli Cohen goto err_bfreg; 838e126ba97SEli Cohen 83919098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 84019098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 84119098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 84219098df2Smajd@mellanox.com ubuffer->buf_size, 84319098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 84419098df2Smajd@mellanox.com &ncont, &offset); 84519098df2Smajd@mellanox.com if (err) 8462f5ff264SEli Cohen goto err_bfreg; 8479e9c47d0SEli Cohen } else { 84819098df2Smajd@mellanox.com ubuffer->umem = NULL; 8499e9c47d0SEli Cohen } 850e126ba97SEli Cohen 85109a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 85209a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8531b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 854e126ba97SEli Cohen if (!*in) { 855e126ba97SEli Cohen err = -ENOMEM; 856e126ba97SEli Cohen goto err_umem; 857e126ba97SEli Cohen } 858e126ba97SEli Cohen 85909a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 86009a7d9ecSSaeed Mahameed if (ubuffer->umem) 86109a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 86209a7d9ecSSaeed Mahameed 86309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86409a7d9ecSSaeed Mahameed 86509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86709a7d9ecSSaeed Mahameed 86809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8691ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 870b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8711ee47ab3SYishai Hadas else 8721ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8732f5ff264SEli Cohen qp->bfregn = bfregn; 874e126ba97SEli Cohen 875e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 876e126ba97SEli Cohen if (err) { 877e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 878e126ba97SEli Cohen goto err_free; 879e126ba97SEli Cohen } 880e126ba97SEli Cohen 881e126ba97SEli Cohen err = ib_copy_to_udata(udata, resp, sizeof(*resp)); 882e126ba97SEli Cohen if (err) { 883e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 884e126ba97SEli Cohen goto err_unmap; 885e126ba97SEli Cohen } 886e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 887e126ba97SEli Cohen 888e126ba97SEli Cohen return 0; 889e126ba97SEli Cohen 890e126ba97SEli Cohen err_unmap: 891e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 892e126ba97SEli Cohen 893e126ba97SEli Cohen err_free: 894479163f4SAl Viro kvfree(*in); 895e126ba97SEli Cohen 896e126ba97SEli Cohen err_umem: 89719098df2Smajd@mellanox.com if (ubuffer->umem) 89819098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 899e126ba97SEli Cohen 9002f5ff264SEli Cohen err_bfreg: 9011ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9024ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 903e126ba97SEli Cohen return err; 904e126ba97SEli Cohen } 905e126ba97SEli Cohen 906b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 907b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 908e126ba97SEli Cohen { 909e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 910e126ba97SEli Cohen 911e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 912e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 91319098df2Smajd@mellanox.com if (base->ubuffer.umem) 91419098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9151ee47ab3SYishai Hadas 9161ee47ab3SYishai Hadas /* 9171ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9181ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9191ee47ab3SYishai Hadas */ 9201ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9214ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 922e126ba97SEli Cohen } 923e126ba97SEli Cohen 924e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 925e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 926e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92709a7d9ecSSaeed Mahameed u32 **in, int *inlen, 92819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 929e126ba97SEli Cohen { 930e126ba97SEli Cohen int uar_index; 93109a7d9ecSSaeed Mahameed void *qpc; 932e126ba97SEli Cohen int err; 933e126ba97SEli Cohen 934f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 935f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 936b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93793d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 938b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9391a4c3a3dSEli Cohen return -EINVAL; 940e126ba97SEli Cohen 941e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9425fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9435fe9dec0SEli Cohen else 9445fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 945e126ba97SEli Cohen 946d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 947d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 948d8030b0dSEli Cohen */ 949d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9505fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 951e126ba97SEli Cohen 952e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 953e126ba97SEli Cohen if (err < 0) { 954e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9555fe9dec0SEli Cohen return err; 956e126ba97SEli Cohen } 957e126ba97SEli Cohen 958e126ba97SEli Cohen qp->rq.offset = 0; 959e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 96019098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 961e126ba97SEli Cohen 96219098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 963e126ba97SEli Cohen if (err) { 964e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9655fe9dec0SEli Cohen return err; 966e126ba97SEli Cohen } 967e126ba97SEli Cohen 968e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 96909a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 97009a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9711b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 972e126ba97SEli Cohen if (!*in) { 973e126ba97SEli Cohen err = -ENOMEM; 974e126ba97SEli Cohen goto err_buf; 975e126ba97SEli Cohen } 97609a7d9ecSSaeed Mahameed 97709a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 97809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 97909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 98009a7d9ecSSaeed Mahameed 981e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 98209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 98309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 984e126ba97SEli Cohen 985b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 987b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 988b11a4f9cSHaggai Eran } 989b11a4f9cSHaggai Eran 99009a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 99109a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 992e126ba97SEli Cohen 9939603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 994e126ba97SEli Cohen if (err) { 995e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 996e126ba97SEli Cohen goto err_free; 997e126ba97SEli Cohen } 998e126ba97SEli Cohen 999b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1000b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1001b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1002b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1003b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1004b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1005b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1006b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1007b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1008b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1009e126ba97SEli Cohen 1010e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1011e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1012e126ba97SEli Cohen err = -ENOMEM; 1013e126ba97SEli Cohen goto err_wrid; 1014e126ba97SEli Cohen } 1015e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1016e126ba97SEli Cohen 1017e126ba97SEli Cohen return 0; 1018e126ba97SEli Cohen 1019e126ba97SEli Cohen err_wrid: 1020b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1021b5883008SLi Dongyang kvfree(qp->sq.w_list); 1022b5883008SLi Dongyang kvfree(qp->sq.wrid); 1023b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1024b5883008SLi Dongyang kvfree(qp->rq.wrid); 1025f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1026e126ba97SEli Cohen 1027e126ba97SEli Cohen err_free: 1028479163f4SAl Viro kvfree(*in); 1029e126ba97SEli Cohen 1030e126ba97SEli Cohen err_buf: 10319603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1032e126ba97SEli Cohen return err; 1033e126ba97SEli Cohen } 1034e126ba97SEli Cohen 1035e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1036e126ba97SEli Cohen { 1037b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1038b5883008SLi Dongyang kvfree(qp->sq.w_list); 1039b5883008SLi Dongyang kvfree(qp->sq.wrid); 1040b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1041b5883008SLi Dongyang kvfree(qp->rq.wrid); 1042f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10439603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1044e126ba97SEli Cohen } 1045e126ba97SEli Cohen 104609a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1047e126ba97SEli Cohen { 1048e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1049c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1050e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 105109a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1052e126ba97SEli Cohen else if (!qp->has_rq) 105309a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1054e126ba97SEli Cohen else 105509a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1056e126ba97SEli Cohen } 1057e126ba97SEli Cohen 1058e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1059e126ba97SEli Cohen { 1060e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1061e126ba97SEli Cohen return 1; 1062e126ba97SEli Cohen 1063e126ba97SEli Cohen return 0; 1064e126ba97SEli Cohen } 1065e126ba97SEli Cohen 10660fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1067c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10680fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 10690fb2ed66Smajd@mellanox.com { 1070c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10710fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10720fb2ed66Smajd@mellanox.com 10730fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1074c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1075c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1076c2e53b2cSYishai Hadas 10770fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10780fb2ed66Smajd@mellanox.com } 10790fb2ed66Smajd@mellanox.com 10800fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10810fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10820fb2ed66Smajd@mellanox.com { 10830fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 10840fb2ed66Smajd@mellanox.com } 10850fb2ed66Smajd@mellanox.com 1086b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1087b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1088b96c9ddeSMark Bloch { 1089b96c9ddeSMark Bloch if (sq->flow_rule) 1090b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1091b96c9ddeSMark Bloch } 1092b96c9ddeSMark Bloch 10930fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10940fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10950fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10960fb2ed66Smajd@mellanox.com { 10970fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10980fb2ed66Smajd@mellanox.com __be64 *pas; 10990fb2ed66Smajd@mellanox.com void *in; 11000fb2ed66Smajd@mellanox.com void *sqc; 11010fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11020fb2ed66Smajd@mellanox.com void *wq; 11030fb2ed66Smajd@mellanox.com int inlen; 11040fb2ed66Smajd@mellanox.com int err; 11050fb2ed66Smajd@mellanox.com int page_shift = 0; 11060fb2ed66Smajd@mellanox.com int npages; 11070fb2ed66Smajd@mellanox.com int ncont = 0; 11080fb2ed66Smajd@mellanox.com u32 offset = 0; 11090fb2ed66Smajd@mellanox.com 11100fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11110fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11120fb2ed66Smajd@mellanox.com &ncont, &offset); 11130fb2ed66Smajd@mellanox.com if (err) 11140fb2ed66Smajd@mellanox.com return err; 11150fb2ed66Smajd@mellanox.com 11160fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11171b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11180fb2ed66Smajd@mellanox.com if (!in) { 11190fb2ed66Smajd@mellanox.com err = -ENOMEM; 11200fb2ed66Smajd@mellanox.com goto err_umem; 11210fb2ed66Smajd@mellanox.com } 11220fb2ed66Smajd@mellanox.com 11230fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11240fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1125795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1126795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11270fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11280fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11290fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11310fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113296dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113396dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 113496dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11350fb2ed66Smajd@mellanox.com 11360fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11400fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11420fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11450fb2ed66Smajd@mellanox.com 11460fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11470fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11480fb2ed66Smajd@mellanox.com 11490fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11500fb2ed66Smajd@mellanox.com 11510fb2ed66Smajd@mellanox.com kvfree(in); 11520fb2ed66Smajd@mellanox.com 11530fb2ed66Smajd@mellanox.com if (err) 11540fb2ed66Smajd@mellanox.com goto err_umem; 11550fb2ed66Smajd@mellanox.com 1156b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1157b96c9ddeSMark Bloch if (err) 1158b96c9ddeSMark Bloch goto err_flow; 1159b96c9ddeSMark Bloch 11600fb2ed66Smajd@mellanox.com return 0; 11610fb2ed66Smajd@mellanox.com 1162b96c9ddeSMark Bloch err_flow: 1163b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1164b96c9ddeSMark Bloch 11650fb2ed66Smajd@mellanox.com err_umem: 11660fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11670fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11680fb2ed66Smajd@mellanox.com 11690fb2ed66Smajd@mellanox.com return err; 11700fb2ed66Smajd@mellanox.com } 11710fb2ed66Smajd@mellanox.com 11720fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11730fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11740fb2ed66Smajd@mellanox.com { 1175b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11760fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11770fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11780fb2ed66Smajd@mellanox.com } 11790fb2ed66Smajd@mellanox.com 11800fb2ed66Smajd@mellanox.com static int get_rq_pas_size(void *qpc) 11810fb2ed66Smajd@mellanox.com { 11820fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11830fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11840fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11850fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11860fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11870fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11880fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11890fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11900fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11910fb2ed66Smajd@mellanox.com 11920fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11930fb2ed66Smajd@mellanox.com } 11940fb2ed66Smajd@mellanox.com 11950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11960fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq, void *qpin) 11970fb2ed66Smajd@mellanox.com { 1198358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 11990fb2ed66Smajd@mellanox.com __be64 *pas; 12000fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12010fb2ed66Smajd@mellanox.com void *in; 12020fb2ed66Smajd@mellanox.com void *rqc; 12030fb2ed66Smajd@mellanox.com void *wq; 12040fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12050fb2ed66Smajd@mellanox.com int inlen; 12060fb2ed66Smajd@mellanox.com int err; 12070fb2ed66Smajd@mellanox.com u32 rq_pas_size = get_rq_pas_size(qpc); 12080fb2ed66Smajd@mellanox.com 12090fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12101b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12110fb2ed66Smajd@mellanox.com if (!in) 12120fb2ed66Smajd@mellanox.com return -ENOMEM; 12130fb2ed66Smajd@mellanox.com 12140fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1215e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12160fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12170fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12180fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12190fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12200fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12210fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12220fb2ed66Smajd@mellanox.com 1223358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1224358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1225358e42eaSMajd Dibbiny 12260fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12270fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1228b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1229b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12300fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12310fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12320fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12330fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12340fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12350fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12360fb2ed66Smajd@mellanox.com 12370fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12380fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12390fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12400fb2ed66Smajd@mellanox.com 12410fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12420fb2ed66Smajd@mellanox.com 12430fb2ed66Smajd@mellanox.com kvfree(in); 12440fb2ed66Smajd@mellanox.com 12450fb2ed66Smajd@mellanox.com return err; 12460fb2ed66Smajd@mellanox.com } 12470fb2ed66Smajd@mellanox.com 12480fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12490fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12500fb2ed66Smajd@mellanox.com { 12510fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12520fb2ed66Smajd@mellanox.com } 12530fb2ed66Smajd@mellanox.com 1254f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1255f95ef6cbSMaor Gottlieb { 1256f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1257f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1258f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1259f95ef6cbSMaor Gottlieb } 1260f95ef6cbSMaor Gottlieb 12610fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1262f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1263f95ef6cbSMaor Gottlieb bool tunnel_offload_en) 12640fb2ed66Smajd@mellanox.com { 12650fb2ed66Smajd@mellanox.com u32 *in; 12660fb2ed66Smajd@mellanox.com void *tirc; 12670fb2ed66Smajd@mellanox.com int inlen; 12680fb2ed66Smajd@mellanox.com int err; 12690fb2ed66Smajd@mellanox.com 12700fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12711b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12720fb2ed66Smajd@mellanox.com if (!in) 12730fb2ed66Smajd@mellanox.com return -ENOMEM; 12740fb2ed66Smajd@mellanox.com 12750fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12760fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12770fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12780fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1279f95ef6cbSMaor Gottlieb if (tunnel_offload_en) 1280f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 12810fb2ed66Smajd@mellanox.com 1282ec9c2fb8SMark Bloch if (dev->rep) 1283ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1284ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1285ec9c2fb8SMark Bloch 12860fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 12870fb2ed66Smajd@mellanox.com 12880fb2ed66Smajd@mellanox.com kvfree(in); 12890fb2ed66Smajd@mellanox.com 12900fb2ed66Smajd@mellanox.com return err; 12910fb2ed66Smajd@mellanox.com } 12920fb2ed66Smajd@mellanox.com 12930fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12940fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12950fb2ed66Smajd@mellanox.com { 12960fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 12970fb2ed66Smajd@mellanox.com } 12980fb2ed66Smajd@mellanox.com 12990fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 130009a7d9ecSSaeed Mahameed u32 *in, 13010fb2ed66Smajd@mellanox.com struct ib_pd *pd) 13020fb2ed66Smajd@mellanox.com { 13030fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13040fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13050fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13060fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13070fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13080fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13090fb2ed66Smajd@mellanox.com int err; 13100fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13110fb2ed66Smajd@mellanox.com 13120fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 1313c2e53b2cSYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn); 13140fb2ed66Smajd@mellanox.com if (err) 13150fb2ed66Smajd@mellanox.com return err; 13160fb2ed66Smajd@mellanox.com 13170fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13180fb2ed66Smajd@mellanox.com if (err) 13190fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13200fb2ed66Smajd@mellanox.com 13210fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13221d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13230fb2ed66Smajd@mellanox.com } 13240fb2ed66Smajd@mellanox.com 13250fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1326358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1327358e42eaSMajd Dibbiny 1328e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1329e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1330b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1331b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 13320fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_rq(dev, rq, in); 13330fb2ed66Smajd@mellanox.com if (err) 13340fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13350fb2ed66Smajd@mellanox.com 13360fb2ed66Smajd@mellanox.com 1337f95ef6cbSMaor Gottlieb err = create_raw_packet_qp_tir(dev, rq, tdn, 1338f95ef6cbSMaor Gottlieb qp->tunnel_offload_en); 13390fb2ed66Smajd@mellanox.com if (err) 13400fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13410fb2ed66Smajd@mellanox.com } 13420fb2ed66Smajd@mellanox.com 13430fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13440fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13450fb2ed66Smajd@mellanox.com 13460fb2ed66Smajd@mellanox.com return 0; 13470fb2ed66Smajd@mellanox.com 13480fb2ed66Smajd@mellanox.com err_destroy_rq: 13490fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13500fb2ed66Smajd@mellanox.com err_destroy_sq: 13510fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 13520fb2ed66Smajd@mellanox.com return err; 13530fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13540fb2ed66Smajd@mellanox.com err_destroy_tis: 13550fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13560fb2ed66Smajd@mellanox.com 13570fb2ed66Smajd@mellanox.com return err; 13580fb2ed66Smajd@mellanox.com } 13590fb2ed66Smajd@mellanox.com 13600fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 13610fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 13620fb2ed66Smajd@mellanox.com { 13630fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13640fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13650fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13660fb2ed66Smajd@mellanox.com 13670fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 13680fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 13690fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13700fb2ed66Smajd@mellanox.com } 13710fb2ed66Smajd@mellanox.com 13720fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13730fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13740fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13750fb2ed66Smajd@mellanox.com } 13760fb2ed66Smajd@mellanox.com } 13770fb2ed66Smajd@mellanox.com 13780fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 13790fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 13800fb2ed66Smajd@mellanox.com { 13810fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13820fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13830fb2ed66Smajd@mellanox.com 13840fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 13850fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 13860fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 13870fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 13880fb2ed66Smajd@mellanox.com } 13890fb2ed66Smajd@mellanox.com 139028d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 139128d61370SYishai Hadas { 139228d61370SYishai Hadas mlx5_core_destroy_tir(dev->mdev, qp->rss_qp.tirn); 139328d61370SYishai Hadas } 139428d61370SYishai Hadas 139528d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 139628d61370SYishai Hadas struct ib_pd *pd, 139728d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 139828d61370SYishai Hadas struct ib_udata *udata) 139928d61370SYishai Hadas { 140028d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 140128d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 140228d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 140328d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 140428d61370SYishai Hadas int inlen; 140528d61370SYishai Hadas int err; 140628d61370SYishai Hadas u32 *in; 140728d61370SYishai Hadas void *tirc; 140828d61370SYishai Hadas void *hfso; 140928d61370SYishai Hadas u32 selected_fields = 0; 141028d61370SYishai Hadas size_t min_resp_len; 141128d61370SYishai Hadas u32 tdn = mucontext->tdn; 141228d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 141328d61370SYishai Hadas size_t required_cmd_sz; 141428d61370SYishai Hadas 141528d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 141628d61370SYishai Hadas return -EOPNOTSUPP; 141728d61370SYishai Hadas 141828d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 141928d61370SYishai Hadas return -EINVAL; 142028d61370SYishai Hadas 14212f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 142228d61370SYishai Hadas if (udata->outlen < min_resp_len) 142328d61370SYishai Hadas return -EINVAL; 142428d61370SYishai Hadas 1425f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 142628d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 142728d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 142828d61370SYishai Hadas return -EINVAL; 142928d61370SYishai Hadas } 143028d61370SYishai Hadas 143128d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 143228d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 143328d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 143428d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 143528d61370SYishai Hadas return -EOPNOTSUPP; 143628d61370SYishai Hadas } 143728d61370SYishai Hadas 143828d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 143928d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 144028d61370SYishai Hadas return -EFAULT; 144128d61370SYishai Hadas } 144228d61370SYishai Hadas 144328d61370SYishai Hadas if (ucmd.comp_mask) { 144428d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 144528d61370SYishai Hadas return -EOPNOTSUPP; 144628d61370SYishai Hadas } 144728d61370SYishai Hadas 1448f95ef6cbSMaor Gottlieb if (ucmd.flags & ~MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1449f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1450f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1451f95ef6cbSMaor Gottlieb } 1452f95ef6cbSMaor Gottlieb 1453f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1454f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1455f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 145628d61370SYishai Hadas return -EOPNOTSUPP; 145728d61370SYishai Hadas } 145828d61370SYishai Hadas 1459309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1460309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1461309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1462309fa347SMaor Gottlieb return -EOPNOTSUPP; 1463309fa347SMaor Gottlieb } 1464309fa347SMaor Gottlieb 146528d61370SYishai Hadas err = ib_copy_to_udata(udata, &resp, min_resp_len); 146628d61370SYishai Hadas if (err) { 146728d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 146828d61370SYishai Hadas return -EINVAL; 146928d61370SYishai Hadas } 147028d61370SYishai Hadas 147128d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14721b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 147328d61370SYishai Hadas if (!in) 147428d61370SYishai Hadas return -ENOMEM; 147528d61370SYishai Hadas 147628d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 147728d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 147828d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 147928d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 148028d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 148128d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 148228d61370SYishai Hadas 148328d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1484f95ef6cbSMaor Gottlieb 1485f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1486f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1487f95ef6cbSMaor Gottlieb 1488309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1489309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1490309fa347SMaor Gottlieb else 1491309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1492309fa347SMaor Gottlieb 149328d61370SYishai Hadas switch (ucmd.rx_hash_function) { 149428d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 149528d61370SYishai Hadas { 149628d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 149728d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 149828d61370SYishai Hadas 149928d61370SYishai Hadas if (len != ucmd.rx_key_len) { 150028d61370SYishai Hadas err = -EINVAL; 150128d61370SYishai Hadas goto err; 150228d61370SYishai Hadas } 150328d61370SYishai Hadas 150428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 150528d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 150628d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 150728d61370SYishai Hadas break; 150828d61370SYishai Hadas } 150928d61370SYishai Hadas default: 151028d61370SYishai Hadas err = -EOPNOTSUPP; 151128d61370SYishai Hadas goto err; 151228d61370SYishai Hadas } 151328d61370SYishai Hadas 151428d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 151528d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 151628d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 151728d61370SYishai Hadas goto create_tir; 151828d61370SYishai Hadas err = -EINVAL; 151928d61370SYishai Hadas goto err; 152028d61370SYishai Hadas } 152128d61370SYishai Hadas 152228d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 152328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 152428d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 152528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 152628d61370SYishai Hadas err = -EINVAL; 152728d61370SYishai Hadas goto err; 152828d61370SYishai Hadas } 152928d61370SYishai Hadas 153028d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 153128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 153228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 153328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 153428d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 153528d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 153628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 153728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 153828d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 153928d61370SYishai Hadas 154028d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 154128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) && 154228d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 154328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))) { 154428d61370SYishai Hadas err = -EINVAL; 154528d61370SYishai Hadas goto err; 154628d61370SYishai Hadas } 154728d61370SYishai Hadas 154828d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 154928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 155028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 155128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 155228d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 155328d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 155428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 155528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 155628d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 155728d61370SYishai Hadas 155828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 155928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 156028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 156128d61370SYishai Hadas 156228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 156328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 156428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 156528d61370SYishai Hadas 156628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 156728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 156828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 156928d61370SYishai Hadas 157028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 157128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 157228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 157328d61370SYishai Hadas 157428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 157528d61370SYishai Hadas 157628d61370SYishai Hadas create_tir: 1577ec9c2fb8SMark Bloch if (dev->rep) 1578ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1579ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1580ec9c2fb8SMark Bloch 158128d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 158228d61370SYishai Hadas 158328d61370SYishai Hadas if (err) 158428d61370SYishai Hadas goto err; 158528d61370SYishai Hadas 158628d61370SYishai Hadas kvfree(in); 158728d61370SYishai Hadas /* qpn is reserved for that QP */ 158828d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1589d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 159028d61370SYishai Hadas return 0; 159128d61370SYishai Hadas 159228d61370SYishai Hadas err: 159328d61370SYishai Hadas kvfree(in); 159428d61370SYishai Hadas return err; 159528d61370SYishai Hadas } 159628d61370SYishai Hadas 1597e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1598e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1599e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1600e126ba97SEli Cohen { 1601e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 160209a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1603938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 1604e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 160589ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 160689ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 160789ea94a7SMaor Gottlieb unsigned long flags; 1608cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 160909a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 161009a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1611cfb5e088SHaggai Abramovsky void *qpc; 161209a7d9ecSSaeed Mahameed u32 *in; 161309a7d9ecSSaeed Mahameed int err; 1614e126ba97SEli Cohen 1615e126ba97SEli Cohen mutex_init(&qp->mutex); 1616e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1617e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1618e126ba97SEli Cohen 161928d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 162028d61370SYishai Hadas if (!udata) 162128d61370SYishai Hadas return -ENOSYS; 162228d61370SYishai Hadas 162328d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 162428d61370SYishai Hadas return err; 162528d61370SYishai Hadas } 162628d61370SYishai Hadas 1627f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1628938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1629f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1630f360d88aSEli Cohen return -EINVAL; 1631f360d88aSEli Cohen } else { 1632f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1633f360d88aSEli Cohen } 1634f360d88aSEli Cohen } 1635f360d88aSEli Cohen 1636051f2630SLeon Romanovsky if (init_attr->create_flags & 1637051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1638051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1639051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1640051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1641051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1642051f2630SLeon Romanovsky return -EINVAL; 1643051f2630SLeon Romanovsky } 1644051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1645051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1646051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1647051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1648051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1649051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1650051f2630SLeon Romanovsky } 1651f0313965SErez Shitrit 1652f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1653f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1654f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1655f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1656f0313965SErez Shitrit return -EOPNOTSUPP; 1657f0313965SErez Shitrit } 1658f0313965SErez Shitrit 1659358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1660358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1661358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1662358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1663358e42eaSMajd Dibbiny } 1664358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1665358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1666358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1667358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1668358e42eaSMajd Dibbiny } 1669358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1670358e42eaSMajd Dibbiny } 1671358e42eaSMajd Dibbiny 1672e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1673e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1674e126ba97SEli Cohen 1675e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1676e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1677e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1678e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1679e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1680e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1681e4cc4fa7SNoa Osherovich } 1682e4cc4fa7SNoa Osherovich 1683e126ba97SEli Cohen if (pd && pd->uobject) { 1684e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1685e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1686e126ba97SEli Cohen return -EFAULT; 1687e126ba97SEli Cohen } 1688e126ba97SEli Cohen 1689cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1690cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1691cfb5e088SHaggai Abramovsky if (err) 1692cfb5e088SHaggai Abramovsky return err; 1693cfb5e088SHaggai Abramovsky 1694e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1695e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1696f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1697f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1698f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1699f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1700f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1701f95ef6cbSMaor Gottlieb } 1702f95ef6cbSMaor Gottlieb qp->tunnel_offload_en = true; 1703f95ef6cbSMaor Gottlieb } 1704c2e53b2cSYishai Hadas 1705c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1706c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1707c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1708c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1709c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1710c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1711c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1712c2e53b2cSYishai Hadas } 1713c2e53b2cSYishai Hadas 1714c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1715c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1716c2e53b2cSYishai Hadas } 1717e126ba97SEli Cohen } else { 1718e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1719e126ba97SEli Cohen } 1720e126ba97SEli Cohen 1721c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1722c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1723c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1724c2e53b2cSYishai Hadas &qp->trans_qp.base; 1725c2e53b2cSYishai Hadas 1726e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1727e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1728e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1729e126ba97SEli Cohen if (err) { 1730e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1731e126ba97SEli Cohen return err; 1732e126ba97SEli Cohen } 1733e126ba97SEli Cohen 1734e126ba97SEli Cohen if (pd) { 1735e126ba97SEli Cohen if (pd->uobject) { 1736938fe83cSSaeed Mahameed __u32 max_wqes = 1737938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1738e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1739e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1740e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1741e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1742e126ba97SEli Cohen return -EINVAL; 1743e126ba97SEli Cohen } 1744938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1745e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1746938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1747e126ba97SEli Cohen return -EINVAL; 1748e126ba97SEli Cohen } 1749b11a4f9cSHaggai Eran if (init_attr->create_flags & 1750b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1751b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1752b11a4f9cSHaggai Eran return -EINVAL; 1753b11a4f9cSHaggai Eran } 17540fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 17550fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1756e126ba97SEli Cohen if (err) 1757e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1758e126ba97SEli Cohen } else { 175919098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 176019098df2Smajd@mellanox.com base); 1761e126ba97SEli Cohen if (err) 1762e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1763e126ba97SEli Cohen } 1764e126ba97SEli Cohen 1765e126ba97SEli Cohen if (err) 1766e126ba97SEli Cohen return err; 1767e126ba97SEli Cohen } else { 17681b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1769e126ba97SEli Cohen if (!in) 1770e126ba97SEli Cohen return -ENOMEM; 1771e126ba97SEli Cohen 1772e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1773e126ba97SEli Cohen } 1774e126ba97SEli Cohen 1775e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1776e126ba97SEli Cohen qp->port = init_attr->port_num; 1777e126ba97SEli Cohen 177809a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 177909a7d9ecSSaeed Mahameed 178009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, st, to_mlx5_st(init_attr->qp_type)); 178109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1782e126ba97SEli Cohen 1783e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 178409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1785e126ba97SEli Cohen else 178609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 178709a7d9ecSSaeed Mahameed 1788e126ba97SEli Cohen 1789e126ba97SEli Cohen if (qp->wq_sig) 179009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1791e126ba97SEli Cohen 1792f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 179309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1794f360d88aSEli Cohen 1795051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 179609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1797051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 179809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1799051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 180009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1801051f2630SLeon Romanovsky 1802e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1803e126ba97SEli Cohen int rcqe_sz; 1804e126ba97SEli Cohen int scqe_sz; 1805e126ba97SEli Cohen 1806e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1807e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1808e126ba97SEli Cohen 1809e126ba97SEli Cohen if (rcqe_sz == 128) 181009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1811e126ba97SEli Cohen else 181209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1813e126ba97SEli Cohen 1814e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1815e126ba97SEli Cohen if (scqe_sz == 128) 181609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1817e126ba97SEli Cohen else 181809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1819e126ba97SEli Cohen } 1820e126ba97SEli Cohen } 1821e126ba97SEli Cohen 1822e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 182309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 182409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1825e126ba97SEli Cohen } 1826e126ba97SEli Cohen 182709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1828e126ba97SEli Cohen 18293fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 183009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 18313fd3307eSArtemy Kovalyov } else { 183209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 18333fd3307eSArtemy Kovalyov if (init_attr->srq && 18343fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 18353fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 18363fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 18373fd3307eSArtemy Kovalyov } 1838e126ba97SEli Cohen 1839e126ba97SEli Cohen /* Set default resources */ 1840e126ba97SEli Cohen switch (init_attr->qp_type) { 1841e126ba97SEli Cohen case IB_QPT_XRC_TGT: 184209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 184309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 184409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 184509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1846e126ba97SEli Cohen break; 1847e126ba97SEli Cohen case IB_QPT_XRC_INI: 184809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 184909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 185009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1851e126ba97SEli Cohen break; 1852e126ba97SEli Cohen default: 1853e126ba97SEli Cohen if (init_attr->srq) { 185409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 185509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1856e126ba97SEli Cohen } else { 185709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 185809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1859e126ba97SEli Cohen } 1860e126ba97SEli Cohen } 1861e126ba97SEli Cohen 1862e126ba97SEli Cohen if (init_attr->send_cq) 186309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1864e126ba97SEli Cohen 1865e126ba97SEli Cohen if (init_attr->recv_cq) 186609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1867e126ba97SEli Cohen 186809a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1869e126ba97SEli Cohen 1870cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 187109a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1872cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 187309a7d9ecSSaeed Mahameed 1874f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1875f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1876f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1877f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1878f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1879f0313965SErez Shitrit } 1880cfb5e088SHaggai Abramovsky 1881b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 1882b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 1883b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 1884b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 1885b1383aa6SNoa Osherovich goto err; 1886b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1887b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 1888b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 1889b1383aa6SNoa Osherovich } else { 1890b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 1891b1383aa6SNoa Osherovich } 1892b1383aa6SNoa Osherovich } 1893b1383aa6SNoa Osherovich 1894c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 1895c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 18960fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 18970fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 18980fb2ed66Smajd@mellanox.com err = create_raw_packet_qp(dev, qp, in, pd); 18990fb2ed66Smajd@mellanox.com } else { 190019098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 19010fb2ed66Smajd@mellanox.com } 19020fb2ed66Smajd@mellanox.com 1903e126ba97SEli Cohen if (err) { 1904e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1905e126ba97SEli Cohen goto err_create; 1906e126ba97SEli Cohen } 1907e126ba97SEli Cohen 1908479163f4SAl Viro kvfree(in); 1909e126ba97SEli Cohen 191019098df2Smajd@mellanox.com base->container_mibqp = qp; 191119098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1912e126ba97SEli Cohen 191389ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 191489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 191589ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 191689ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 191789ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 191889ea94a7SMaor Gottlieb * flow 191989ea94a7SMaor Gottlieb */ 192089ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 192189ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 192289ea94a7SMaor Gottlieb */ 192389ea94a7SMaor Gottlieb if (send_cq) 192489ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 192589ea94a7SMaor Gottlieb if (recv_cq) 192689ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 192789ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 192889ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 192989ea94a7SMaor Gottlieb 1930e126ba97SEli Cohen return 0; 1931e126ba97SEli Cohen 1932e126ba97SEli Cohen err_create: 1933e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 1934b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 1935e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1936e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1937e126ba97SEli Cohen 1938b1383aa6SNoa Osherovich err: 1939479163f4SAl Viro kvfree(in); 1940e126ba97SEli Cohen return err; 1941e126ba97SEli Cohen } 1942e126ba97SEli Cohen 1943e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1944e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1945e126ba97SEli Cohen { 1946e126ba97SEli Cohen if (send_cq) { 1947e126ba97SEli Cohen if (recv_cq) { 1948e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 194989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1950e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1951e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1952e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 195389ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1954e126ba97SEli Cohen __acquire(&recv_cq->lock); 1955e126ba97SEli Cohen } else { 195689ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 1957e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1958e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1959e126ba97SEli Cohen } 1960e126ba97SEli Cohen } else { 196189ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 19626a4f139aSEli Cohen __acquire(&recv_cq->lock); 1963e126ba97SEli Cohen } 1964e126ba97SEli Cohen } else if (recv_cq) { 196589ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 19666a4f139aSEli Cohen __acquire(&send_cq->lock); 19676a4f139aSEli Cohen } else { 19686a4f139aSEli Cohen __acquire(&send_cq->lock); 19696a4f139aSEli Cohen __acquire(&recv_cq->lock); 1970e126ba97SEli Cohen } 1971e126ba97SEli Cohen } 1972e126ba97SEli Cohen 1973e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1974e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 1975e126ba97SEli Cohen { 1976e126ba97SEli Cohen if (send_cq) { 1977e126ba97SEli Cohen if (recv_cq) { 1978e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 1979e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 198089ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1981e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 1982e126ba97SEli Cohen __release(&recv_cq->lock); 198389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1984e126ba97SEli Cohen } else { 1985e126ba97SEli Cohen spin_unlock(&send_cq->lock); 198689ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 1987e126ba97SEli Cohen } 1988e126ba97SEli Cohen } else { 19896a4f139aSEli Cohen __release(&recv_cq->lock); 199089ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1991e126ba97SEli Cohen } 1992e126ba97SEli Cohen } else if (recv_cq) { 19936a4f139aSEli Cohen __release(&send_cq->lock); 199489ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 19956a4f139aSEli Cohen } else { 19966a4f139aSEli Cohen __release(&recv_cq->lock); 19976a4f139aSEli Cohen __release(&send_cq->lock); 1998e126ba97SEli Cohen } 1999e126ba97SEli Cohen } 2000e126ba97SEli Cohen 2001e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2002e126ba97SEli Cohen { 2003e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2004e126ba97SEli Cohen } 2005e126ba97SEli Cohen 200689ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 200789ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2008e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2009e126ba97SEli Cohen { 201089ea94a7SMaor Gottlieb switch (qp_type) { 2011e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2012e126ba97SEli Cohen *send_cq = NULL; 2013e126ba97SEli Cohen *recv_cq = NULL; 2014e126ba97SEli Cohen break; 2015e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2016e126ba97SEli Cohen case IB_QPT_XRC_INI: 201789ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2018e126ba97SEli Cohen *recv_cq = NULL; 2019e126ba97SEli Cohen break; 2020e126ba97SEli Cohen 2021e126ba97SEli Cohen case IB_QPT_SMI: 2022d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2023e126ba97SEli Cohen case IB_QPT_RC: 2024e126ba97SEli Cohen case IB_QPT_UC: 2025e126ba97SEli Cohen case IB_QPT_UD: 2026e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2027e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 20280fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 202989ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 203089ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2031e126ba97SEli Cohen break; 2032e126ba97SEli Cohen 2033e126ba97SEli Cohen case IB_QPT_MAX: 2034e126ba97SEli Cohen default: 2035e126ba97SEli Cohen *send_cq = NULL; 2036e126ba97SEli Cohen *recv_cq = NULL; 2037e126ba97SEli Cohen break; 2038e126ba97SEli Cohen } 2039e126ba97SEli Cohen } 2040e126ba97SEli Cohen 2041ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 204213eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 204313eab21fSAviv Heller u8 lag_tx_affinity); 2044ad5f8e96Smajd@mellanox.com 2045e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2046e126ba97SEli Cohen { 2047e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2048c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 204989ea94a7SMaor Gottlieb unsigned long flags; 2050e126ba97SEli Cohen int err; 2051e126ba97SEli Cohen 205228d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 205328d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 205428d61370SYishai Hadas return; 205528d61370SYishai Hadas } 205628d61370SYishai Hadas 2057c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2058c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 20590fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 20600fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 20610fb2ed66Smajd@mellanox.com 20626aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2063c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2064c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2065ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 20661a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 20671a412fb1SSaeed Mahameed NULL, &base->mqp); 2068ad5f8e96Smajd@mellanox.com } else { 20690680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 20700680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 20710680efa2SAlex Vesker }; 20720680efa2SAlex Vesker 207313eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2074ad5f8e96Smajd@mellanox.com } 2075ad5f8e96Smajd@mellanox.com if (err) 2076427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 207719098df2Smajd@mellanox.com base->mqp.qpn); 20786aec21f6SHaggai Eran } 2079e126ba97SEli Cohen 208089ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 208189ea94a7SMaor Gottlieb &send_cq, &recv_cq); 208289ea94a7SMaor Gottlieb 208389ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 208489ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 208589ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 208689ea94a7SMaor Gottlieb list_del(&qp->qps_list); 208789ea94a7SMaor Gottlieb if (send_cq) 208889ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 208989ea94a7SMaor Gottlieb 209089ea94a7SMaor Gottlieb if (recv_cq) 209189ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2092e126ba97SEli Cohen 2093e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 209419098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2095e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2096e126ba97SEli Cohen if (send_cq != recv_cq) 209719098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 209819098df2Smajd@mellanox.com NULL); 2099e126ba97SEli Cohen } 210089ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 210189ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2102e126ba97SEli Cohen 2103c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2104c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21050fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 21060fb2ed66Smajd@mellanox.com } else { 210719098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2108e126ba97SEli Cohen if (err) 21090fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 21100fb2ed66Smajd@mellanox.com base->mqp.qpn); 21110fb2ed66Smajd@mellanox.com } 2112e126ba97SEli Cohen 2113e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2114e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2115e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2116b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2117e126ba97SEli Cohen } 2118e126ba97SEli Cohen 2119e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2120e126ba97SEli Cohen { 2121e126ba97SEli Cohen switch (type) { 2122e126ba97SEli Cohen case IB_QPT_SMI: 2123e126ba97SEli Cohen return "IB_QPT_SMI"; 2124e126ba97SEli Cohen case IB_QPT_GSI: 2125e126ba97SEli Cohen return "IB_QPT_GSI"; 2126e126ba97SEli Cohen case IB_QPT_RC: 2127e126ba97SEli Cohen return "IB_QPT_RC"; 2128e126ba97SEli Cohen case IB_QPT_UC: 2129e126ba97SEli Cohen return "IB_QPT_UC"; 2130e126ba97SEli Cohen case IB_QPT_UD: 2131e126ba97SEli Cohen return "IB_QPT_UD"; 2132e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2133e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2134e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2135e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2136e126ba97SEli Cohen case IB_QPT_XRC_INI: 2137e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2138e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2139e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2140e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2141e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2142e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2143e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2144b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2145b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2146e126ba97SEli Cohen case IB_QPT_MAX: 2147e126ba97SEli Cohen default: 2148e126ba97SEli Cohen return "Invalid QP type"; 2149e126ba97SEli Cohen } 2150e126ba97SEli Cohen } 2151e126ba97SEli Cohen 2152b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2153b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2154b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2155b4aaa1f0SMoni Shoua { 2156b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2157b4aaa1f0SMoni Shoua int err = 0; 2158b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2159b4aaa1f0SMoni Shoua void *dctc; 2160b4aaa1f0SMoni Shoua 2161b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2162b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2163b4aaa1f0SMoni Shoua 2164b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2165b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2166b4aaa1f0SMoni Shoua if (err) 2167b4aaa1f0SMoni Shoua return ERR_PTR(err); 2168b4aaa1f0SMoni Shoua 2169b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2170b4aaa1f0SMoni Shoua if (!qp) 2171b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2172b4aaa1f0SMoni Shoua 2173b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2174b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2175b4aaa1f0SMoni Shoua err = -ENOMEM; 2176b4aaa1f0SMoni Shoua goto err_free; 2177b4aaa1f0SMoni Shoua } 2178b4aaa1f0SMoni Shoua 2179b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2180776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2181b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2182b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2183b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2184b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2185b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2186b4aaa1f0SMoni Shoua 2187b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2188b4aaa1f0SMoni Shoua 2189b4aaa1f0SMoni Shoua return &qp->ibqp; 2190b4aaa1f0SMoni Shoua err_free: 2191b4aaa1f0SMoni Shoua kfree(qp); 2192b4aaa1f0SMoni Shoua return ERR_PTR(err); 2193b4aaa1f0SMoni Shoua } 2194b4aaa1f0SMoni Shoua 2195b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2196e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2197b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2198b4aaa1f0SMoni Shoua struct ib_udata *udata) 2199b4aaa1f0SMoni Shoua { 2200b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2201b4aaa1f0SMoni Shoua int err; 2202b4aaa1f0SMoni Shoua 2203b4aaa1f0SMoni Shoua if (!udata) 2204b4aaa1f0SMoni Shoua return -EINVAL; 2205b4aaa1f0SMoni Shoua 2206b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2207b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2208b4aaa1f0SMoni Shoua return -EINVAL; 2209b4aaa1f0SMoni Shoua } 2210b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2211b4aaa1f0SMoni Shoua if (err) 2212b4aaa1f0SMoni Shoua return err; 2213b4aaa1f0SMoni Shoua 2214b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2215b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2216b4aaa1f0SMoni Shoua } else { 2217b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2218b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2219b4aaa1f0SMoni Shoua } else { 2220b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2221b4aaa1f0SMoni Shoua return -EINVAL; 2222b4aaa1f0SMoni Shoua } 2223b4aaa1f0SMoni Shoua } 2224b4aaa1f0SMoni Shoua 2225b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2226b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2227b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2228b4aaa1f0SMoni Shoua } 2229b4aaa1f0SMoni Shoua 2230b4aaa1f0SMoni Shoua return 0; 2231b4aaa1f0SMoni Shoua } 2232b4aaa1f0SMoni Shoua 2233b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2234b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2235e126ba97SEli Cohen struct ib_udata *udata) 2236e126ba97SEli Cohen { 2237e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2238e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2239e126ba97SEli Cohen u16 xrcdn = 0; 2240e126ba97SEli Cohen int err; 2241b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2242b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2243e126ba97SEli Cohen 2244e126ba97SEli Cohen if (pd) { 2245e126ba97SEli Cohen dev = to_mdev(pd->device); 22460fb2ed66Smajd@mellanox.com 22470fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 22480fb2ed66Smajd@mellanox.com if (!pd->uobject) { 22490fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 22500fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22510fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 22520fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 22530fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22540fb2ed66Smajd@mellanox.com } 22550fb2ed66Smajd@mellanox.com } 225609f16cf5SMajd Dibbiny } else { 225709f16cf5SMajd Dibbiny /* being cautious here */ 225809f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 225909f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 226009f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 226109f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 226209f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 226309f16cf5SMajd Dibbiny } 226409f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2265e126ba97SEli Cohen } 2266e126ba97SEli Cohen 2267b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2268b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2269b4aaa1f0SMoni Shoua 2270b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2271b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2272b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2273b4aaa1f0SMoni Shoua if (err) 2274b4aaa1f0SMoni Shoua return ERR_PTR(err); 2275c32a4f29SMoni Shoua 2276c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2277c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2278c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2279c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2280c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2281c32a4f29SMoni Shoua } 2282776a3906SMoni Shoua } else { 2283776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2284c32a4f29SMoni Shoua } 2285b4aaa1f0SMoni Shoua } 2286b4aaa1f0SMoni Shoua 2287e126ba97SEli Cohen switch (init_attr->qp_type) { 2288e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2289e126ba97SEli Cohen case IB_QPT_XRC_INI: 2290938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2291e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2292e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2293e126ba97SEli Cohen } 2294e126ba97SEli Cohen init_attr->recv_cq = NULL; 2295e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2296e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2297e126ba97SEli Cohen init_attr->send_cq = NULL; 2298e126ba97SEli Cohen } 2299e126ba97SEli Cohen 2300e126ba97SEli Cohen /* fall through */ 23010fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2302e126ba97SEli Cohen case IB_QPT_RC: 2303e126ba97SEli Cohen case IB_QPT_UC: 2304e126ba97SEli Cohen case IB_QPT_UD: 2305e126ba97SEli Cohen case IB_QPT_SMI: 2306d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2307e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2308c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2309e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2310e126ba97SEli Cohen if (!qp) 2311e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2312e126ba97SEli Cohen 2313e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2314e126ba97SEli Cohen if (err) { 2315e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2316e126ba97SEli Cohen kfree(qp); 2317e126ba97SEli Cohen return ERR_PTR(err); 2318e126ba97SEli Cohen } 2319e126ba97SEli Cohen 2320e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2321e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2322e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2323e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2324e126ba97SEli Cohen else 232519098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2326e126ba97SEli Cohen 2327e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 232819098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2329a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2330a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2331e126ba97SEli Cohen 233219098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2333e126ba97SEli Cohen 2334e126ba97SEli Cohen break; 2335e126ba97SEli Cohen 2336d16e91daSHaggai Eran case IB_QPT_GSI: 2337d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2338d16e91daSHaggai Eran 2339e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2340e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2341e126ba97SEli Cohen case IB_QPT_MAX: 2342e126ba97SEli Cohen default: 2343e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2344e126ba97SEli Cohen init_attr->qp_type); 2345e126ba97SEli Cohen /* Don't support raw QPs */ 2346e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2347e126ba97SEli Cohen } 2348e126ba97SEli Cohen 2349b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2350b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2351b4aaa1f0SMoni Shoua 2352e126ba97SEli Cohen return &qp->ibqp; 2353e126ba97SEli Cohen } 2354e126ba97SEli Cohen 2355776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2356776a3906SMoni Shoua { 2357776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2358776a3906SMoni Shoua 2359776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2360776a3906SMoni Shoua int err; 2361776a3906SMoni Shoua 2362776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2363776a3906SMoni Shoua if (err) { 2364776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2365776a3906SMoni Shoua return err; 2366776a3906SMoni Shoua } 2367776a3906SMoni Shoua } 2368776a3906SMoni Shoua 2369776a3906SMoni Shoua kfree(mqp->dct.in); 2370776a3906SMoni Shoua kfree(mqp); 2371776a3906SMoni Shoua return 0; 2372776a3906SMoni Shoua } 2373776a3906SMoni Shoua 2374e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2375e126ba97SEli Cohen { 2376e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2377e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2378e126ba97SEli Cohen 2379d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2380d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2381d16e91daSHaggai Eran 2382776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2383776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2384776a3906SMoni Shoua 2385e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2386e126ba97SEli Cohen 2387e126ba97SEli Cohen kfree(mqp); 2388e126ba97SEli Cohen 2389e126ba97SEli Cohen return 0; 2390e126ba97SEli Cohen } 2391e126ba97SEli Cohen 2392e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2393e126ba97SEli Cohen int attr_mask) 2394e126ba97SEli Cohen { 2395e126ba97SEli Cohen u32 hw_access_flags = 0; 2396e126ba97SEli Cohen u8 dest_rd_atomic; 2397e126ba97SEli Cohen u32 access_flags; 2398e126ba97SEli Cohen 2399e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2400e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2401e126ba97SEli Cohen else 240219098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2403e126ba97SEli Cohen 2404e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2405e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2406e126ba97SEli Cohen else 240719098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2408e126ba97SEli Cohen 2409e126ba97SEli Cohen if (!dest_rd_atomic) 2410e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2411e126ba97SEli Cohen 2412e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2413e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2414e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2415e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2416e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2417e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2418e126ba97SEli Cohen 2419e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2420e126ba97SEli Cohen } 2421e126ba97SEli Cohen 2422e126ba97SEli Cohen enum { 2423e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2424e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2425e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2426e126ba97SEli Cohen }; 2427e126ba97SEli Cohen 2428e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2429e126ba97SEli Cohen { 2430e126ba97SEli Cohen if (rate == IB_RATE_PORT_CURRENT) { 2431e126ba97SEli Cohen return 0; 2432e126ba97SEli Cohen } else if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) { 2433e126ba97SEli Cohen return -EINVAL; 2434e126ba97SEli Cohen } else { 2435e126ba97SEli Cohen while (rate != IB_RATE_2_5_GBPS && 2436e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2437938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2438e126ba97SEli Cohen --rate; 2439e126ba97SEli Cohen } 2440e126ba97SEli Cohen 2441e126ba97SEli Cohen return rate + MLX5_STAT_RATE_OFFSET; 2442e126ba97SEli Cohen } 2443e126ba97SEli Cohen 244475850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 244575850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 244675850d0bSmajd@mellanox.com { 244775850d0bSmajd@mellanox.com void *in; 244875850d0bSmajd@mellanox.com void *tisc; 244975850d0bSmajd@mellanox.com int inlen; 245075850d0bSmajd@mellanox.com int err; 245175850d0bSmajd@mellanox.com 245275850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24531b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 245475850d0bSmajd@mellanox.com if (!in) 245575850d0bSmajd@mellanox.com return -ENOMEM; 245675850d0bSmajd@mellanox.com 245775850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 245875850d0bSmajd@mellanox.com 245975850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 246075850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 246175850d0bSmajd@mellanox.com 246275850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 246375850d0bSmajd@mellanox.com 246475850d0bSmajd@mellanox.com kvfree(in); 246575850d0bSmajd@mellanox.com 246675850d0bSmajd@mellanox.com return err; 246775850d0bSmajd@mellanox.com } 246875850d0bSmajd@mellanox.com 246913eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 247013eab21fSAviv Heller struct mlx5_ib_sq *sq, u8 tx_affinity) 247113eab21fSAviv Heller { 247213eab21fSAviv Heller void *in; 247313eab21fSAviv Heller void *tisc; 247413eab21fSAviv Heller int inlen; 247513eab21fSAviv Heller int err; 247613eab21fSAviv Heller 247713eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24781b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 247913eab21fSAviv Heller if (!in) 248013eab21fSAviv Heller return -ENOMEM; 248113eab21fSAviv Heller 248213eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 248313eab21fSAviv Heller 248413eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 248513eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 248613eab21fSAviv Heller 248713eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 248813eab21fSAviv Heller 248913eab21fSAviv Heller kvfree(in); 249013eab21fSAviv Heller 249113eab21fSAviv Heller return err; 249213eab21fSAviv Heller } 249313eab21fSAviv Heller 249475850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 249590898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2496e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2497f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2498f879ee8dSAchiad Shochat bool alt) 2499e126ba97SEli Cohen { 2500d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2501e126ba97SEli Cohen int err; 2502ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2503d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2504d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2505e126ba97SEli Cohen 2506e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2507f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2508f879ee8dSAchiad Shochat attr->pkey_index); 2509e126ba97SEli Cohen 2510d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2511d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2512938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2513f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2514d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2515938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2516f83b4263SEli Cohen return -EINVAL; 2517f83b4263SEli Cohen } 25182811ba51SAchiad Shochat } 251944c58487SDasaratharaman Chandramouli 252044c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2521d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 25222811ba51SAchiad Shochat return -EINVAL; 2523d8966fcdSDasaratharaman Chandramouli err = mlx5_get_roce_gid_type(dev, port, grh->sgid_index, 2524ed88451eSMajd Dibbiny &gid_type); 2525ed88451eSMajd Dibbiny if (err) 2526ed88451eSMajd Dibbiny return err; 252744c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 25282b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 25292b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 25302b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 25312b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 25322811ba51SAchiad Shochat path->udp_sport = mlx5_get_roce_udp_sport(dev, port, 2533d8966fcdSDasaratharaman Chandramouli grh->sgid_index); 2534d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 2535ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2536d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 25372811ba51SAchiad Shochat } else { 2538d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2539d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2540d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2541d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2542d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2543d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2544e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2545d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 25462811ba51SAchiad Shochat } 25472811ba51SAchiad Shochat 2548d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2549d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2550d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2551e126ba97SEli Cohen path->tclass_flowlabel = 2552d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2553d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2554d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2555e126ba97SEli Cohen } 2556e126ba97SEli Cohen 2557d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2558e126ba97SEli Cohen if (err < 0) 2559e126ba97SEli Cohen return err; 2560e126ba97SEli Cohen path->static_rate = err; 2561e126ba97SEli Cohen path->port = port; 2562e126ba97SEli Cohen 2563e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2564f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2565e126ba97SEli Cohen 256675850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 256775850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 256875850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 2569d8966fcdSDasaratharaman Chandramouli sl & 0xf); 257075850d0bSmajd@mellanox.com 2571e126ba97SEli Cohen return 0; 2572e126ba97SEli Cohen } 2573e126ba97SEli Cohen 2574e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2575e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2576e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2577e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2578e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2579e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2580e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2581e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2582e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2583e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2584e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2585e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2586e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2587e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2588e126ba97SEli Cohen }, 2589e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2590e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2591e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2592e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2593e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2594e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2595e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2596e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2597e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2598e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2599e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2600e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2601e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2602a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2603a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2604a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2605a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2606a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2607e126ba97SEli Cohen }, 2608e126ba97SEli Cohen }, 2609e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2610e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2611e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2612e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2613e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2614e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2615e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2616e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2617e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2618e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2619e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2620e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2621e126ba97SEli Cohen }, 2622e126ba97SEli Cohen }, 2623e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2624e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2625e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2626e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2627e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2628e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2629c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2630c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2631e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2632c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2633c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2634e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2635e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2636e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2637e126ba97SEli Cohen }, 2638e126ba97SEli Cohen }, 2639e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2640e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2641e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2642e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 264375959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2644a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2645a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2646a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2647a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2648e126ba97SEli Cohen }, 2649e126ba97SEli Cohen }, 2650e126ba97SEli Cohen }; 2651e126ba97SEli Cohen 2652e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2653e126ba97SEli Cohen { 2654e126ba97SEli Cohen switch (ib_mask) { 2655e126ba97SEli Cohen case IB_QP_STATE: 2656e126ba97SEli Cohen return 0; 2657e126ba97SEli Cohen case IB_QP_CUR_STATE: 2658e126ba97SEli Cohen return 0; 2659e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2660e126ba97SEli Cohen return 0; 2661e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2662e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2663e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2664e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2665e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2666e126ba97SEli Cohen case IB_QP_PORT: 2667e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2668e126ba97SEli Cohen case IB_QP_QKEY: 2669e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2670e126ba97SEli Cohen case IB_QP_AV: 2671e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2672e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2673e126ba97SEli Cohen case IB_QP_PATH_MTU: 2674e126ba97SEli Cohen return 0; 2675e126ba97SEli Cohen case IB_QP_TIMEOUT: 2676e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2677e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2678e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2679e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2680e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2681e126ba97SEli Cohen case IB_QP_RQ_PSN: 2682e126ba97SEli Cohen return 0; 2683e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2684e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2685e126ba97SEli Cohen case IB_QP_ALT_PATH: 2686e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2687e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2688e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2689e126ba97SEli Cohen case IB_QP_SQ_PSN: 2690e126ba97SEli Cohen return 0; 2691e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2692e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2693e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2694e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2695e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2696e126ba97SEli Cohen case IB_QP_CAP: 2697e126ba97SEli Cohen return 0; 2698e126ba97SEli Cohen case IB_QP_DEST_QPN: 2699e126ba97SEli Cohen return 0; 2700e126ba97SEli Cohen } 2701e126ba97SEli Cohen return 0; 2702e126ba97SEli Cohen } 2703e126ba97SEli Cohen 2704e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2705e126ba97SEli Cohen { 2706e126ba97SEli Cohen int result = 0; 2707e126ba97SEli Cohen int i; 2708e126ba97SEli Cohen 2709e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2710e126ba97SEli Cohen if ((1 << i) & ib_mask) 2711e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2712e126ba97SEli Cohen } 2713e126ba97SEli Cohen 2714e126ba97SEli Cohen return result; 2715e126ba97SEli Cohen } 2716e126ba97SEli Cohen 2717eb49ab0cSAlex Vesker static int modify_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 2718eb49ab0cSAlex Vesker struct mlx5_ib_rq *rq, int new_state, 2719eb49ab0cSAlex Vesker const struct mlx5_modify_raw_qp_param *raw_qp_param) 2720ad5f8e96Smajd@mellanox.com { 2721ad5f8e96Smajd@mellanox.com void *in; 2722ad5f8e96Smajd@mellanox.com void *rqc; 2723ad5f8e96Smajd@mellanox.com int inlen; 2724ad5f8e96Smajd@mellanox.com int err; 2725ad5f8e96Smajd@mellanox.com 2726ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 27271b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2728ad5f8e96Smajd@mellanox.com if (!in) 2729ad5f8e96Smajd@mellanox.com return -ENOMEM; 2730ad5f8e96Smajd@mellanox.com 2731ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2732ad5f8e96Smajd@mellanox.com 2733ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2734ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2735ad5f8e96Smajd@mellanox.com 2736eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2737eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2738eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 273923a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2740eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2741eb49ab0cSAlex Vesker } else 2742eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2743eb49ab0cSAlex Vesker dev->ib_dev.name); 2744eb49ab0cSAlex Vesker } 2745eb49ab0cSAlex Vesker 2746eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2747ad5f8e96Smajd@mellanox.com if (err) 2748ad5f8e96Smajd@mellanox.com goto out; 2749ad5f8e96Smajd@mellanox.com 2750ad5f8e96Smajd@mellanox.com rq->state = new_state; 2751ad5f8e96Smajd@mellanox.com 2752ad5f8e96Smajd@mellanox.com out: 2753ad5f8e96Smajd@mellanox.com kvfree(in); 2754ad5f8e96Smajd@mellanox.com return err; 2755ad5f8e96Smajd@mellanox.com } 2756ad5f8e96Smajd@mellanox.com 2757ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 27587d29f349SBodong Wang struct mlx5_ib_sq *sq, 27597d29f349SBodong Wang int new_state, 27607d29f349SBodong Wang const struct mlx5_modify_raw_qp_param *raw_qp_param) 2761ad5f8e96Smajd@mellanox.com { 27627d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 27637d29f349SBodong Wang u32 old_rate = ibqp->rate_limit; 27647d29f349SBodong Wang u32 new_rate = old_rate; 27657d29f349SBodong Wang u16 rl_index = 0; 2766ad5f8e96Smajd@mellanox.com void *in; 2767ad5f8e96Smajd@mellanox.com void *sqc; 2768ad5f8e96Smajd@mellanox.com int inlen; 2769ad5f8e96Smajd@mellanox.com int err; 2770ad5f8e96Smajd@mellanox.com 2771ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 27721b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2773ad5f8e96Smajd@mellanox.com if (!in) 2774ad5f8e96Smajd@mellanox.com return -ENOMEM; 2775ad5f8e96Smajd@mellanox.com 2776ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2777ad5f8e96Smajd@mellanox.com 2778ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2779ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2780ad5f8e96Smajd@mellanox.com 27817d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 27827d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 27837d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 27847d29f349SBodong Wang __func__); 27857d29f349SBodong Wang else 27867d29f349SBodong Wang new_rate = raw_qp_param->rate_limit; 27877d29f349SBodong Wang } 2788ad5f8e96Smajd@mellanox.com 27897d29f349SBodong Wang if (old_rate != new_rate) { 27907d29f349SBodong Wang if (new_rate) { 27917d29f349SBodong Wang err = mlx5_rl_add_rate(dev, new_rate, &rl_index); 27927d29f349SBodong Wang if (err) { 27937d29f349SBodong Wang pr_err("Failed configuring rate %u: %d\n", 27947d29f349SBodong Wang new_rate, err); 27957d29f349SBodong Wang goto out; 27967d29f349SBodong Wang } 27977d29f349SBodong Wang } 27987d29f349SBodong Wang 27997d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 28007d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 28017d29f349SBodong Wang } 28027d29f349SBodong Wang 28037d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 28047d29f349SBodong Wang if (err) { 28057d29f349SBodong Wang /* Remove new rate from table if failed */ 28067d29f349SBodong Wang if (new_rate && 28077d29f349SBodong Wang old_rate != new_rate) 28087d29f349SBodong Wang mlx5_rl_remove_rate(dev, new_rate); 28097d29f349SBodong Wang goto out; 28107d29f349SBodong Wang } 28117d29f349SBodong Wang 28127d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 28137d29f349SBodong Wang if ((old_rate && 28147d29f349SBodong Wang (old_rate != new_rate)) || 28157d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 28167d29f349SBodong Wang mlx5_rl_remove_rate(dev, old_rate); 28177d29f349SBodong Wang 28187d29f349SBodong Wang ibqp->rate_limit = new_rate; 2819ad5f8e96Smajd@mellanox.com sq->state = new_state; 2820ad5f8e96Smajd@mellanox.com 2821ad5f8e96Smajd@mellanox.com out: 2822ad5f8e96Smajd@mellanox.com kvfree(in); 2823ad5f8e96Smajd@mellanox.com return err; 2824ad5f8e96Smajd@mellanox.com } 2825ad5f8e96Smajd@mellanox.com 2826ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 282713eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 282813eab21fSAviv Heller u8 tx_affinity) 2829ad5f8e96Smajd@mellanox.com { 2830ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2831ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2832ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 28337d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 28347d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2835ad5f8e96Smajd@mellanox.com int rq_state; 2836ad5f8e96Smajd@mellanox.com int sq_state; 2837ad5f8e96Smajd@mellanox.com int err; 2838ad5f8e96Smajd@mellanox.com 28390680efa2SAlex Vesker switch (raw_qp_param->operation) { 2840ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2841ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2842ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2843ad5f8e96Smajd@mellanox.com break; 2844ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2845ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2846ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2847ad5f8e96Smajd@mellanox.com break; 2848ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2849ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2850ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2851ad5f8e96Smajd@mellanox.com break; 2852ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2853ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 28547d29f349SBodong Wang if (raw_qp_param->set_mask == 28557d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 28567d29f349SBodong Wang modify_rq = 0; 28577d29f349SBodong Wang sq_state = sq->state; 28587d29f349SBodong Wang } else { 28597d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 28607d29f349SBodong Wang } 28617d29f349SBodong Wang break; 28627d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 28637d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2864eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2865eb49ab0cSAlex Vesker return -EINVAL; 2866eb49ab0cSAlex Vesker else 2867ad5f8e96Smajd@mellanox.com return 0; 2868ad5f8e96Smajd@mellanox.com default: 2869ad5f8e96Smajd@mellanox.com WARN_ON(1); 2870ad5f8e96Smajd@mellanox.com return -EINVAL; 2871ad5f8e96Smajd@mellanox.com } 2872ad5f8e96Smajd@mellanox.com 28737d29f349SBodong Wang if (modify_rq) { 2874eb49ab0cSAlex Vesker err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param); 2875ad5f8e96Smajd@mellanox.com if (err) 2876ad5f8e96Smajd@mellanox.com return err; 2877ad5f8e96Smajd@mellanox.com } 2878ad5f8e96Smajd@mellanox.com 28797d29f349SBodong Wang if (modify_sq) { 288013eab21fSAviv Heller if (tx_affinity) { 288113eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 288213eab21fSAviv Heller tx_affinity); 288313eab21fSAviv Heller if (err) 288413eab21fSAviv Heller return err; 288513eab21fSAviv Heller } 288613eab21fSAviv Heller 28877d29f349SBodong Wang return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, raw_qp_param); 288813eab21fSAviv Heller } 2889ad5f8e96Smajd@mellanox.com 2890ad5f8e96Smajd@mellanox.com return 0; 2891ad5f8e96Smajd@mellanox.com } 2892ad5f8e96Smajd@mellanox.com 2893e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2894e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 2895e126ba97SEli Cohen enum ib_qp_state cur_state, enum ib_qp_state new_state) 2896e126ba97SEli Cohen { 2897427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2898427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2899427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2900427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2901427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2902427c1e7bSmajd@mellanox.com }, 2903427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2904427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2905427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2906427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2907427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2908427c1e7bSmajd@mellanox.com }, 2909427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2910427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2911427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2912427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2913427c1e7bSmajd@mellanox.com }, 2914427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2915427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2916427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2917427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2918427c1e7bSmajd@mellanox.com }, 2919427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2920427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2921427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2922427c1e7bSmajd@mellanox.com }, 2923427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2924427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2925427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2926427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2927427c1e7bSmajd@mellanox.com }, 2928427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2929427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2930427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2931427c1e7bSmajd@mellanox.com } 2932427c1e7bSmajd@mellanox.com }; 2933427c1e7bSmajd@mellanox.com 2934e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2935e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 293619098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2937e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2938e126ba97SEli Cohen struct mlx5_qp_context *context; 2939e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2940eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 2941e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2942e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2943e126ba97SEli Cohen int mlx5_st; 2944e126ba97SEli Cohen int err; 2945427c1e7bSmajd@mellanox.com u16 op; 294613eab21fSAviv Heller u8 tx_affinity = 0; 2947e126ba97SEli Cohen 294855de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 294955de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 295055de9a77SLeon Romanovsky if (mlx5_st < 0) 295155de9a77SLeon Romanovsky return -EINVAL; 295255de9a77SLeon Romanovsky 29531a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 29541a412fb1SSaeed Mahameed if (!context) 2955e126ba97SEli Cohen return -ENOMEM; 2956e126ba97SEli Cohen 295755de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 2958e126ba97SEli Cohen 2959e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 2960e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2961e126ba97SEli Cohen } else { 2962e126ba97SEli Cohen switch (attr->path_mig_state) { 2963e126ba97SEli Cohen case IB_MIG_MIGRATED: 2964e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2965e126ba97SEli Cohen break; 2966e126ba97SEli Cohen case IB_MIG_REARM: 2967e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 2968e126ba97SEli Cohen break; 2969e126ba97SEli Cohen case IB_MIG_ARMED: 2970e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 2971e126ba97SEli Cohen break; 2972e126ba97SEli Cohen } 2973e126ba97SEli Cohen } 2974e126ba97SEli Cohen 297513eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 297613eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 297713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 297813eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 297913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 298013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 298113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 298213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 298313eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 29847fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 298513eab21fSAviv Heller tx_affinity = (unsigned int)atomic_add_return(1, 29867fd8aefbSDaniel Jurgens &dev->roce[p].next_port) % 298713eab21fSAviv Heller MLX5_MAX_PORTS + 1; 298813eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 298913eab21fSAviv Heller } 299013eab21fSAviv Heller } 299113eab21fSAviv Heller } 299213eab21fSAviv Heller 2993d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 2994e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 2995c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 2996c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 2997e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 2998e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 2999e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3000e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3001e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3002e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3003e126ba97SEli Cohen err = -EINVAL; 3004e126ba97SEli Cohen goto out; 3005e126ba97SEli Cohen } 3006938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3007938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3008e126ba97SEli Cohen } 3009e126ba97SEli Cohen 3010e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3011e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3012e126ba97SEli Cohen 3013e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3014d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3015e126ba97SEli Cohen 3016e126ba97SEli Cohen /* todo implement counter_index functionality */ 3017e126ba97SEli Cohen 3018e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3019e126ba97SEli Cohen context->pri_path.port = qp->port; 3020e126ba97SEli Cohen 3021e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3022e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3023e126ba97SEli Cohen 3024e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 302575850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3026e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3027f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3028e126ba97SEli Cohen if (err) 3029e126ba97SEli Cohen goto out; 3030e126ba97SEli Cohen } 3031e126ba97SEli Cohen 3032e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3033e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3034e126ba97SEli Cohen 3035e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 303675850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 303775850d0bSmajd@mellanox.com &context->alt_path, 3038f879ee8dSAchiad Shochat attr->alt_port_num, 3039f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3040f879ee8dSAchiad Shochat 0, attr, true); 3041e126ba97SEli Cohen if (err) 3042e126ba97SEli Cohen goto out; 3043e126ba97SEli Cohen } 3044e126ba97SEli Cohen 3045e126ba97SEli Cohen pd = get_pd(qp); 304689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 304789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3048e126ba97SEli Cohen 3049e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3050e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3051e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3052e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3053e126ba97SEli Cohen 3054e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3055e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3056e126ba97SEli Cohen 3057e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3058e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3059e126ba97SEli Cohen 3060e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3061e126ba97SEli Cohen if (attr->max_rd_atomic) 3062e126ba97SEli Cohen context->params1 |= 3063e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3064e126ba97SEli Cohen } 3065e126ba97SEli Cohen 3066e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3067e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3068e126ba97SEli Cohen 3069e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3070e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3071e126ba97SEli Cohen context->params2 |= 3072e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3073e126ba97SEli Cohen } 3074e126ba97SEli Cohen 3075e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3076e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3077e126ba97SEli Cohen 3078e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3079e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3080e126ba97SEli Cohen 3081e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3082e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3083e126ba97SEli Cohen 3084e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3085e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3086e126ba97SEli Cohen 3087e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3088e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3089e126ba97SEli Cohen 30900837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 30910837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 30920837e86aSMark Bloch qp->port) - 1; 3093c2e53b2cSYishai Hadas 3094c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3095c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3096c2e53b2cSYishai Hadas port_num = 0; 3097c2e53b2cSYishai Hadas 3098eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 30990837e86aSMark Bloch context->qp_counter_set_usr_page |= 3100e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 31010837e86aSMark Bloch } 31020837e86aSMark Bloch 3103e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3104e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3105e126ba97SEli Cohen 3106b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3107b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3108e126ba97SEli Cohen 3109e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3110e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3111e126ba97SEli Cohen 3112427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 3113427c1e7bSmajd@mellanox.com !optab[mlx5_cur][mlx5_new]) 3114427c1e7bSmajd@mellanox.com goto out; 3115427c1e7bSmajd@mellanox.com 3116427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3117e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3118e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3119ad5f8e96Smajd@mellanox.com 3120c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3121c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 31220680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 31230680efa2SAlex Vesker 31240680efa2SAlex Vesker raw_qp_param.operation = op; 3125eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3126e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3127eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3128eb49ab0cSAlex Vesker } 31297d29f349SBodong Wang 31307d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 31317d29f349SBodong Wang raw_qp_param.rate_limit = attr->rate_limit; 31327d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 31337d29f349SBodong Wang } 31347d29f349SBodong Wang 313513eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 31360680efa2SAlex Vesker } else { 31371a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 313819098df2Smajd@mellanox.com &base->mqp); 31390680efa2SAlex Vesker } 31400680efa2SAlex Vesker 3141e126ba97SEli Cohen if (err) 3142e126ba97SEli Cohen goto out; 3143e126ba97SEli Cohen 3144e126ba97SEli Cohen qp->state = new_state; 3145e126ba97SEli Cohen 3146e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 314719098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3148e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 314919098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3150e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3151e126ba97SEli Cohen qp->port = attr->port_num; 3152e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 315319098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3154e126ba97SEli Cohen 3155e126ba97SEli Cohen /* 3156e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3157e126ba97SEli Cohen * entries and reinitialize the QP. 3158e126ba97SEli Cohen */ 315975a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 316075a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 316119098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3162e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3163e126ba97SEli Cohen if (send_cq != recv_cq) 316419098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3165e126ba97SEli Cohen 3166e126ba97SEli Cohen qp->rq.head = 0; 3167e126ba97SEli Cohen qp->rq.tail = 0; 3168e126ba97SEli Cohen qp->sq.head = 0; 3169e126ba97SEli Cohen qp->sq.tail = 0; 3170e126ba97SEli Cohen qp->sq.cur_post = 0; 3171e126ba97SEli Cohen qp->sq.last_poll = 0; 3172e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3173e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3174e126ba97SEli Cohen } 3175e126ba97SEli Cohen 3176e126ba97SEli Cohen out: 31771a412fb1SSaeed Mahameed kfree(context); 3178e126ba97SEli Cohen return err; 3179e126ba97SEli Cohen } 3180e126ba97SEli Cohen 3181c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3182c32a4f29SMoni Shoua { 3183c32a4f29SMoni Shoua if ((mask & req) != req) 3184c32a4f29SMoni Shoua return false; 3185c32a4f29SMoni Shoua 3186c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3187c32a4f29SMoni Shoua return false; 3188c32a4f29SMoni Shoua 3189c32a4f29SMoni Shoua return true; 3190c32a4f29SMoni Shoua } 3191c32a4f29SMoni Shoua 3192c32a4f29SMoni Shoua /* check valid transition for driver QP types 3193c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3194c32a4f29SMoni Shoua */ 3195c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3196c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3197c32a4f29SMoni Shoua { 3198c32a4f29SMoni Shoua int req = IB_QP_STATE; 3199c32a4f29SMoni Shoua int opt = 0; 3200c32a4f29SMoni Shoua 3201c32a4f29SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3202c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3203c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3204c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3205c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3206c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3207c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3208c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3209c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3210c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3211c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3212c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3213c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3214c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3215c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3216c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3217c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3218c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3219c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3220c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3221c32a4f29SMoni Shoua } 3222c32a4f29SMoni Shoua return false; 3223c32a4f29SMoni Shoua } 3224c32a4f29SMoni Shoua 3225776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3226776a3906SMoni Shoua * valid transitions are: 3227776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3228776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3229776a3906SMoni Shoua * mtu, gid_index and hop_limit 3230776a3906SMoni Shoua * Other transitions and attributes are illegal 3231776a3906SMoni Shoua */ 3232776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3233776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3234776a3906SMoni Shoua { 3235776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3236776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3237776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3238776a3906SMoni Shoua int err = 0; 3239776a3906SMoni Shoua int required = IB_QP_STATE; 3240776a3906SMoni Shoua void *dctc; 3241776a3906SMoni Shoua 3242776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3243776a3906SMoni Shoua return -EINVAL; 3244776a3906SMoni Shoua 3245776a3906SMoni Shoua cur_state = qp->state; 3246776a3906SMoni Shoua new_state = attr->qp_state; 3247776a3906SMoni Shoua 3248776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3249776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3250776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3251776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3252776a3906SMoni Shoua return -EINVAL; 3253776a3906SMoni Shoua 3254776a3906SMoni Shoua if (attr->port_num == 0 || 3255776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3256776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3257776a3906SMoni Shoua attr->port_num, dev->num_ports); 3258776a3906SMoni Shoua return -EINVAL; 3259776a3906SMoni Shoua } 3260776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3261776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3262776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3263776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3264776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3265776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3266776a3906SMoni Shoua return -EOPNOTSUPP; 3267776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3268776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3269776a3906SMoni Shoua } 3270776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3271776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3272776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3273776a3906SMoni Shoua 3274776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3275776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3276776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3277776a3906SMoni Shoua sizeof(resp.dctn); 3278776a3906SMoni Shoua 3279776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3280776a3906SMoni Shoua return -EINVAL; 3281776a3906SMoni Shoua resp.response_length = min_resp_len; 3282776a3906SMoni Shoua 3283776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3284776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3285776a3906SMoni Shoua return -EINVAL; 3286776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3287776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3288776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3289776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3290776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3291776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3292776a3906SMoni Shoua 3293776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3294776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3295776a3906SMoni Shoua if (err) 3296776a3906SMoni Shoua return err; 3297776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3298776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3299776a3906SMoni Shoua if (err) { 3300776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3301776a3906SMoni Shoua return err; 3302776a3906SMoni Shoua } 3303776a3906SMoni Shoua } else { 3304776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3305776a3906SMoni Shoua return -EINVAL; 3306776a3906SMoni Shoua } 3307776a3906SMoni Shoua if (err) 3308776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3309776a3906SMoni Shoua else 3310776a3906SMoni Shoua qp->state = new_state; 3311776a3906SMoni Shoua return err; 3312776a3906SMoni Shoua } 3313776a3906SMoni Shoua 3314e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3315e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3316e126ba97SEli Cohen { 3317e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3318e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 3319d16e91daSHaggai Eran enum ib_qp_type qp_type; 3320e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 3321e126ba97SEli Cohen int err = -EINVAL; 3322e126ba97SEli Cohen int port; 33232811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 3324e126ba97SEli Cohen 332528d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 332628d61370SYishai Hadas return -ENOSYS; 332728d61370SYishai Hadas 3328d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3329d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3330d16e91daSHaggai Eran 3331c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3332c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3333c32a4f29SMoni Shoua else 3334d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3335d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3336d16e91daSHaggai Eran 3337776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3338776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3339c32a4f29SMoni Shoua 3340e126ba97SEli Cohen mutex_lock(&qp->mutex); 3341e126ba97SEli Cohen 3342e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3343e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3344e126ba97SEli Cohen 33452811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 33462811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 33472811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 33482811ba51SAchiad Shochat } 33492811ba51SAchiad Shochat 3350c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3351c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3352c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3353c2e53b2cSYishai Hadas attr_mask); 3354c2e53b2cSYishai Hadas goto out; 3355c2e53b2cSYishai Hadas } 3356c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3357c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3358d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 3359158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3360158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3361e126ba97SEli Cohen goto out; 3362c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3363c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3364c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3365c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3366c32a4f29SMoni Shoua goto out; 3367158abf86SHaggai Eran } 3368e126ba97SEli Cohen 3369e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3370938fe83cSSaeed Mahameed (attr->port_num == 0 || 3371508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3372158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3373158abf86SHaggai Eran attr->port_num, dev->num_ports); 3374e126ba97SEli Cohen goto out; 3375158abf86SHaggai Eran } 3376e126ba97SEli Cohen 3377e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3378e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3379938fe83cSSaeed Mahameed if (attr->pkey_index >= 3380158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3381158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3382158abf86SHaggai Eran attr->pkey_index); 3383e126ba97SEli Cohen goto out; 3384e126ba97SEli Cohen } 3385158abf86SHaggai Eran } 3386e126ba97SEli Cohen 3387e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3388938fe83cSSaeed Mahameed attr->max_rd_atomic > 3389158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3390158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3391158abf86SHaggai Eran attr->max_rd_atomic); 3392e126ba97SEli Cohen goto out; 3393158abf86SHaggai Eran } 3394e126ba97SEli Cohen 3395e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3396938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3397158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3398158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3399158abf86SHaggai Eran attr->max_dest_rd_atomic); 3400e126ba97SEli Cohen goto out; 3401158abf86SHaggai Eran } 3402e126ba97SEli Cohen 3403e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3404e126ba97SEli Cohen err = 0; 3405e126ba97SEli Cohen goto out; 3406e126ba97SEli Cohen } 3407e126ba97SEli Cohen 3408e126ba97SEli Cohen err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); 3409e126ba97SEli Cohen 3410e126ba97SEli Cohen out: 3411e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3412e126ba97SEli Cohen return err; 3413e126ba97SEli Cohen } 3414e126ba97SEli Cohen 3415e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3416e126ba97SEli Cohen { 3417e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3418e126ba97SEli Cohen unsigned cur; 3419e126ba97SEli Cohen 3420e126ba97SEli Cohen cur = wq->head - wq->tail; 3421e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3422e126ba97SEli Cohen return 0; 3423e126ba97SEli Cohen 3424e126ba97SEli Cohen cq = to_mcq(ib_cq); 3425e126ba97SEli Cohen spin_lock(&cq->lock); 3426e126ba97SEli Cohen cur = wq->head - wq->tail; 3427e126ba97SEli Cohen spin_unlock(&cq->lock); 3428e126ba97SEli Cohen 3429e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3430e126ba97SEli Cohen } 3431e126ba97SEli Cohen 3432e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3433e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3434e126ba97SEli Cohen { 3435e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3436e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3437e126ba97SEli Cohen rseg->reserved = 0; 3438e126ba97SEli Cohen } 3439e126ba97SEli Cohen 3440f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3441f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 3442f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3443f0313965SErez Shitrit { 3444f0313965SErez Shitrit void *seg = eseg; 3445f0313965SErez Shitrit 3446f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3447f0313965SErez Shitrit 3448f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3449f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3450f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3451f0313965SErez Shitrit 3452f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3453f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3454f0313965SErez Shitrit 3455f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3456f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 34572b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3458f0313965SErez Shitrit u64 left, leftlen, copysz; 3459f0313965SErez Shitrit void *pdata = ud_wr->header; 3460f0313965SErez Shitrit 3461f0313965SErez Shitrit left = ud_wr->hlen; 3462f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 34632b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3464f0313965SErez Shitrit 3465f0313965SErez Shitrit /* 3466f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3467f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3468f0313965SErez Shitrit * rollback and than the copy the left 3469f0313965SErez Shitrit */ 34702b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3471f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3472f0313965SErez Shitrit 3473f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3474f0313965SErez Shitrit 3475f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3476f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3477f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3478f0313965SErez Shitrit } 3479f0313965SErez Shitrit 3480f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3481f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3482f0313965SErez Shitrit left -= copysz; 3483f0313965SErez Shitrit pdata += copysz; 3484f0313965SErez Shitrit memcpy(seg, pdata, left); 3485f0313965SErez Shitrit seg += ALIGN(left, 16); 3486f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3487f0313965SErez Shitrit } 3488f0313965SErez Shitrit } 3489f0313965SErez Shitrit 3490f0313965SErez Shitrit return seg; 3491f0313965SErez Shitrit } 3492f0313965SErez Shitrit 3493e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3494e126ba97SEli Cohen struct ib_send_wr *wr) 3495e126ba97SEli Cohen { 3496e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3497e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3498e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3499e126ba97SEli Cohen } 3500e126ba97SEli Cohen 3501e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3502e126ba97SEli Cohen { 3503e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3504e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3505e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3506e126ba97SEli Cohen } 3507e126ba97SEli Cohen 350831616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3509e126ba97SEli Cohen { 351031616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 351131616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3512e126ba97SEli Cohen } 3513e126ba97SEli Cohen 3514e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3515e126ba97SEli Cohen { 3516e126ba97SEli Cohen u64 result; 3517e126ba97SEli Cohen 3518e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3519e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3520e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3521e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3522e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3523e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3524e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3525e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3526e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3527e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3528e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3529e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3530e126ba97SEli Cohen 3531e126ba97SEli Cohen return cpu_to_be64(result); 3532e126ba97SEli Cohen } 3533e126ba97SEli Cohen 3534e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3535e6631814SSagi Grimberg { 3536e6631814SSagi Grimberg u64 result; 3537e6631814SSagi Grimberg 3538e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3539e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3540e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3541d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3542e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3543e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3544e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3545e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3546e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3547e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3548e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3549e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3550e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3551e6631814SSagi Grimberg 3552e6631814SSagi Grimberg return cpu_to_be64(result); 3553e6631814SSagi Grimberg } 3554e6631814SSagi Grimberg 35558a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 35568a187ee5SSagi Grimberg struct mlx5_ib_mr *mr) 35578a187ee5SSagi Grimberg { 355831616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 35598a187ee5SSagi Grimberg 35608a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3561b005d316SSagi Grimberg 35628a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 356331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 35648a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 35658a187ee5SSagi Grimberg } 35668a187ee5SSagi Grimberg 3567dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3568e126ba97SEli Cohen { 3569e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3570e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 35712d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3572e126ba97SEli Cohen } 3573e126ba97SEli Cohen 357431616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3575e126ba97SEli Cohen { 3576968e78ddSHaggai Eran u64 result; 3577e126ba97SEli Cohen 357831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3579e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3580968e78ddSHaggai Eran 3581968e78ddSHaggai Eran return cpu_to_be64(result); 3582968e78ddSHaggai Eran } 3583968e78ddSHaggai Eran 358431616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3585968e78ddSHaggai Eran { 3586968e78ddSHaggai Eran u64 result; 3587968e78ddSHaggai Eran 3588968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3589968e78ddSHaggai Eran 3590968e78ddSHaggai Eran return cpu_to_be64(result); 3591968e78ddSHaggai Eran } 3592968e78ddSHaggai Eran 359356e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 359456e11d62SNoa Osherovich { 359556e11d62SNoa Osherovich u64 result; 359656e11d62SNoa Osherovich 359756e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 359856e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 359931616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 360056e11d62SNoa Osherovich 360156e11d62SNoa Osherovich return cpu_to_be64(result); 360256e11d62SNoa Osherovich } 360356e11d62SNoa Osherovich 360431616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 360556e11d62SNoa Osherovich { 360656e11d62SNoa Osherovich u64 result; 360756e11d62SNoa Osherovich 360831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 360931616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 361056e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 361131616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 361231616255SArtemy Kovalyov 361331616255SArtemy Kovalyov if (atomic) 361431616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 361556e11d62SNoa Osherovich 361656e11d62SNoa Osherovich return cpu_to_be64(result); 361756e11d62SNoa Osherovich } 361856e11d62SNoa Osherovich 361956e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 362056e11d62SNoa Osherovich { 362156e11d62SNoa Osherovich u64 result; 362256e11d62SNoa Osherovich 362331616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 362456e11d62SNoa Osherovich 362556e11d62SNoa Osherovich return cpu_to_be64(result); 362656e11d62SNoa Osherovich } 362756e11d62SNoa Osherovich 3628968e78ddSHaggai Eran static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 3629578e7264SMaor Gottlieb struct ib_send_wr *wr, int atomic) 3630968e78ddSHaggai Eran { 3631e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3632968e78ddSHaggai Eran 3633968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3634968e78ddSHaggai Eran 3635968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3636968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3637968e78ddSHaggai Eran else 3638968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3639968e78ddSHaggai Eran 364031616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 364131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 364231616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 364331616255SArtemy Kovalyov 364431616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 364531616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3646968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3647968e78ddSHaggai Eran } 364856e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 364956e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 365031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 365131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 365256e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3653e126ba97SEli Cohen } 365431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 365531616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 365631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 365731616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3658e126ba97SEli Cohen 3659e126ba97SEli Cohen if (!wr->num_sge) 3660968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3661e126ba97SEli Cohen } 3662e126ba97SEli Cohen 3663e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3664e126ba97SEli Cohen { 3665e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3666e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3667e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3668e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 36692ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3670e126ba97SEli Cohen } 3671e126ba97SEli Cohen 36728a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 36738a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 36748a187ee5SSagi Grimberg u32 key, int access) 36758a187ee5SSagi Grimberg { 36768a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 36778a187ee5SSagi Grimberg 36788a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3679b005d316SSagi Grimberg 3680ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3681b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3682ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3683b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3684b005d316SSagi Grimberg ndescs *= 2; 3685b005d316SSagi Grimberg 3686b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 36878a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 36888a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 36898a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 36908a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 36918a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 36928a187ee5SSagi Grimberg } 36938a187ee5SSagi Grimberg 3694dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3695e126ba97SEli Cohen { 3696e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3697968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3698e126ba97SEli Cohen } 3699e126ba97SEli Cohen 3700e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 3701e126ba97SEli Cohen { 3702e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3703968e78ddSHaggai Eran 3704e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 370531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3706968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3707e126ba97SEli Cohen 3708968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 370956e11d62SNoa Osherovich if (umrwr->pd) 3710968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 371131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 371231616255SArtemy Kovalyov !umrwr->length) 371331616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 371431616255SArtemy Kovalyov 371531616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3716968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3717968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3718746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3719968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3720e126ba97SEli Cohen } 3721e126ba97SEli Cohen 37228a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 37238a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 37248a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 37258a187ee5SSagi Grimberg { 37268a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 37278a187ee5SSagi Grimberg 37288a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 37298a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 37308a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 37318a187ee5SSagi Grimberg } 37328a187ee5SSagi Grimberg 3733e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 3734e126ba97SEli Cohen { 3735e126ba97SEli Cohen switch (wr->opcode) { 3736e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3737e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3738e126ba97SEli Cohen return wr->ex.imm_data; 3739e126ba97SEli Cohen 3740e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3741e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3742e126ba97SEli Cohen 3743e126ba97SEli Cohen default: 3744e126ba97SEli Cohen return 0; 3745e126ba97SEli Cohen } 3746e126ba97SEli Cohen } 3747e126ba97SEli Cohen 3748e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3749e126ba97SEli Cohen { 3750e126ba97SEli Cohen u8 *p = wqe; 3751e126ba97SEli Cohen u8 res = 0; 3752e126ba97SEli Cohen int i; 3753e126ba97SEli Cohen 3754e126ba97SEli Cohen for (i = 0; i < size; i++) 3755e126ba97SEli Cohen res ^= p[i]; 3756e126ba97SEli Cohen 3757e126ba97SEli Cohen return ~res; 3758e126ba97SEli Cohen } 3759e126ba97SEli Cohen 3760e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3761e126ba97SEli Cohen { 3762e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3763e126ba97SEli Cohen } 3764e126ba97SEli Cohen 3765e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 3766e126ba97SEli Cohen void *wqe, int *sz) 3767e126ba97SEli Cohen { 3768e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3769e126ba97SEli Cohen void *qend = qp->sq.qend; 3770e126ba97SEli Cohen void *addr; 3771e126ba97SEli Cohen int inl = 0; 3772e126ba97SEli Cohen int copy; 3773e126ba97SEli Cohen int len; 3774e126ba97SEli Cohen int i; 3775e126ba97SEli Cohen 3776e126ba97SEli Cohen seg = wqe; 3777e126ba97SEli Cohen wqe += sizeof(*seg); 3778e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3779e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3780e126ba97SEli Cohen len = wr->sg_list[i].length; 3781e126ba97SEli Cohen inl += len; 3782e126ba97SEli Cohen 3783e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3784e126ba97SEli Cohen return -ENOMEM; 3785e126ba97SEli Cohen 3786e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3787e126ba97SEli Cohen copy = qend - wqe; 3788e126ba97SEli Cohen memcpy(wqe, addr, copy); 3789e126ba97SEli Cohen addr += copy; 3790e126ba97SEli Cohen len -= copy; 3791e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 3792e126ba97SEli Cohen } 3793e126ba97SEli Cohen memcpy(wqe, addr, len); 3794e126ba97SEli Cohen wqe += len; 3795e126ba97SEli Cohen } 3796e126ba97SEli Cohen 3797e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 3798e126ba97SEli Cohen 3799e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 3800e126ba97SEli Cohen 3801e126ba97SEli Cohen return 0; 3802e126ba97SEli Cohen } 3803e126ba97SEli Cohen 3804e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 3805e6631814SSagi Grimberg { 3806e6631814SSagi Grimberg switch (type) { 3807e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3808e6631814SSagi Grimberg return MLX5_DIF_SIZE; 3809e6631814SSagi Grimberg default: 3810e6631814SSagi Grimberg return 0; 3811e6631814SSagi Grimberg } 3812e6631814SSagi Grimberg } 3813e6631814SSagi Grimberg 3814e6631814SSagi Grimberg static u8 bs_selector(int block_size) 3815e6631814SSagi Grimberg { 3816e6631814SSagi Grimberg switch (block_size) { 3817e6631814SSagi Grimberg case 512: return 0x1; 3818e6631814SSagi Grimberg case 520: return 0x2; 3819e6631814SSagi Grimberg case 4096: return 0x3; 3820e6631814SSagi Grimberg case 4160: return 0x4; 3821e6631814SSagi Grimberg case 1073741824: return 0x5; 3822e6631814SSagi Grimberg default: return 0; 3823e6631814SSagi Grimberg } 3824e6631814SSagi Grimberg } 3825e6631814SSagi Grimberg 382678eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 3827142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 3828e6631814SSagi Grimberg { 3829142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 3830142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 3831142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 3832142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 3833142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 3834142537f4SSagi Grimberg /* repeating block */ 3835142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 3836142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 3837142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 3838e6631814SSagi Grimberg 383978eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 384078eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 3841e6631814SSagi Grimberg 384278eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 384378eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 384478eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 384578eda2bbSSagi Grimberg else 384678eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 3847e6631814SSagi Grimberg } 3848e6631814SSagi Grimberg 384978eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 385078eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 3851e6631814SSagi Grimberg } 3852e6631814SSagi Grimberg 3853e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 3854e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 3855e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 3856e6631814SSagi Grimberg { 3857e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 3858e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 3859e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 3860e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 3861e6631814SSagi Grimberg 3862c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 3863e6631814SSagi Grimberg 3864142537f4SSagi Grimberg /* Basic + Extended + Inline */ 3865142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 3866e6631814SSagi Grimberg /* Input domain check byte mask */ 3867e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 386878eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 386978eda2bbSSagi Grimberg 387078eda2bbSSagi Grimberg /* Memory domain */ 387178eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 387278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 387378eda2bbSSagi Grimberg break; 387478eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 387578eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 387678eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 387778eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 387878eda2bbSSagi Grimberg break; 387978eda2bbSSagi Grimberg default: 388078eda2bbSSagi Grimberg return -EINVAL; 388178eda2bbSSagi Grimberg } 388278eda2bbSSagi Grimberg 388378eda2bbSSagi Grimberg /* Wire domain */ 388478eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 388578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 388678eda2bbSSagi Grimberg break; 388778eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3888e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 388978eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 3890e6631814SSagi Grimberg /* Same block structure */ 3891142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 3892e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 3893fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 3894c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 3895fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 3896c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 3897fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 3898e6631814SSagi Grimberg } else 3899e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 3900e6631814SSagi Grimberg 3901142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 390278eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 3903e6631814SSagi Grimberg break; 3904e6631814SSagi Grimberg default: 3905e6631814SSagi Grimberg return -EINVAL; 3906e6631814SSagi Grimberg } 3907e6631814SSagi Grimberg 3908e6631814SSagi Grimberg return 0; 3909e6631814SSagi Grimberg } 3910e6631814SSagi Grimberg 3911e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 3912e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 3913e6631814SSagi Grimberg { 3914e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 3915e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 3916e6631814SSagi Grimberg struct mlx5_bsf *bsf; 3917e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 3918e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 3919e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 3920e6631814SSagi Grimberg int ret; 3921e6631814SSagi Grimberg int wqe_size; 3922e6631814SSagi Grimberg 3923e622f2f4SChristoph Hellwig if (!wr->prot || 3924e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 3925e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 3926e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 3927e6631814SSagi Grimberg /** 3928e6631814SSagi Grimberg * Source domain doesn't contain signature information 39295c273b16SSagi Grimberg * or data and protection are interleaved in memory. 3930e6631814SSagi Grimberg * So need construct: 3931e6631814SSagi Grimberg * ------------------ 3932e6631814SSagi Grimberg * | data_klm | 3933e6631814SSagi Grimberg * ------------------ 3934e6631814SSagi Grimberg * | BSF | 3935e6631814SSagi Grimberg * ------------------ 3936e6631814SSagi Grimberg **/ 3937e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 3938e6631814SSagi Grimberg 3939e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 3940e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 3941e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 3942e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 3943e6631814SSagi Grimberg } else { 3944e6631814SSagi Grimberg /** 3945e6631814SSagi Grimberg * Source domain contains signature information 3946e6631814SSagi Grimberg * So need construct a strided block format: 3947e6631814SSagi Grimberg * --------------------------- 3948e6631814SSagi Grimberg * | stride_block_ctrl | 3949e6631814SSagi Grimberg * --------------------------- 3950e6631814SSagi Grimberg * | data_klm | 3951e6631814SSagi Grimberg * --------------------------- 3952e6631814SSagi Grimberg * | prot_klm | 3953e6631814SSagi Grimberg * --------------------------- 3954e6631814SSagi Grimberg * | BSF | 3955e6631814SSagi Grimberg * --------------------------- 3956e6631814SSagi Grimberg **/ 3957e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 3958e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 3959e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 3960e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 3961e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 3962e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 3963e6631814SSagi Grimberg int prot_size; 3964e6631814SSagi Grimberg 3965e6631814SSagi Grimberg sblock_ctrl = *seg; 3966e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 3967e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 3968e6631814SSagi Grimberg 3969e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 3970e6631814SSagi Grimberg if (!prot_size) { 3971e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 3972e6631814SSagi Grimberg return -EINVAL; 3973e6631814SSagi Grimberg } 3974e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 3975e6631814SSagi Grimberg prot_size); 3976e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 3977e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 3978e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 3979e6631814SSagi Grimberg 3980e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 3981e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 3982e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 39835c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 39845c273b16SSagi Grimberg 3985e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 3986e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 3987e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 3988e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 39895c273b16SSagi Grimberg 3990e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 3991e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 3992e6631814SSagi Grimberg } 3993e6631814SSagi Grimberg 3994e6631814SSagi Grimberg *seg += wqe_size; 3995e6631814SSagi Grimberg *size += wqe_size / 16; 3996e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3997e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3998e6631814SSagi Grimberg 3999e6631814SSagi Grimberg bsf = *seg; 4000e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4001e6631814SSagi Grimberg if (ret) 4002e6631814SSagi Grimberg return -EINVAL; 4003e6631814SSagi Grimberg 4004e6631814SSagi Grimberg *seg += sizeof(*bsf); 4005e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4006e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4007e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4008e6631814SSagi Grimberg 4009e6631814SSagi Grimberg return 0; 4010e6631814SSagi Grimberg } 4011e6631814SSagi Grimberg 4012e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 401331616255SArtemy Kovalyov struct ib_sig_handover_wr *wr, u32 size, 4014e6631814SSagi Grimberg u32 length, u32 pdn) 4015e6631814SSagi Grimberg { 4016e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4017e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4018d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4019e6631814SSagi Grimberg 4020e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4021e6631814SSagi Grimberg 4022e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4023ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4024e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4025d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4026e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4027e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 402831616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4029e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4030e6631814SSagi Grimberg } 4031e6631814SSagi Grimberg 4032e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 403331616255SArtemy Kovalyov u32 size) 4034e6631814SSagi Grimberg { 4035e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4036e6631814SSagi Grimberg 4037e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 403831616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4039e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4040e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4041e6631814SSagi Grimberg } 4042e6631814SSagi Grimberg 4043e6631814SSagi Grimberg 4044e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 4045e6631814SSagi Grimberg void **seg, int *size) 4046e6631814SSagi Grimberg { 4047e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4048e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4049e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 405031616255SArtemy Kovalyov u32 xlt_size; 4051e6631814SSagi Grimberg int region_len, ret; 4052e6631814SSagi Grimberg 4053e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4054e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4055d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4056d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4057e6631814SSagi Grimberg return -EINVAL; 4058e6631814SSagi Grimberg 4059e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4060e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4061e622f2f4SChristoph Hellwig if (wr->prot && 4062e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4063e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4064e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4065e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4066e6631814SSagi Grimberg 4067e6631814SSagi Grimberg /** 4068e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4069e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4070e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4071e6631814SSagi Grimberg **/ 407231616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4073e6631814SSagi Grimberg 407431616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4075e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4076e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4077e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4078e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4079e6631814SSagi Grimberg 408031616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4081e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4082e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4083e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4084e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4085e6631814SSagi Grimberg 4086e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4087e6631814SSagi Grimberg if (ret) 4088e6631814SSagi Grimberg return ret; 4089e6631814SSagi Grimberg 4090d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4091e6631814SSagi Grimberg return 0; 4092e6631814SSagi Grimberg } 4093e6631814SSagi Grimberg 4094e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4095e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4096e6631814SSagi Grimberg { 4097e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4098e6631814SSagi Grimberg 4099e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4100e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4101e6631814SSagi Grimberg switch (domain->sig_type) { 410278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 410378eda2bbSSagi Grimberg break; 4104e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4105e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4106e6631814SSagi Grimberg domain->sig.dif.app_tag); 4107e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4108e6631814SSagi Grimberg break; 4109e6631814SSagi Grimberg default: 411012bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 411112bbf1eaSLeon Romanovsky domain->sig_type); 411212bbf1eaSLeon Romanovsky return -EINVAL; 4113e6631814SSagi Grimberg } 4114e6631814SSagi Grimberg 411578eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 411678eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 411778eda2bbSSagi Grimberg 4118e6631814SSagi Grimberg return 0; 4119e6631814SSagi Grimberg } 4120e6631814SSagi Grimberg 41218a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 41228a187ee5SSagi Grimberg struct ib_reg_wr *wr, 41238a187ee5SSagi Grimberg void **seg, int *size) 41248a187ee5SSagi Grimberg { 41258a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 41268a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 41278a187ee5SSagi Grimberg 41288a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 41298a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 41308a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 41318a187ee5SSagi Grimberg return -EINVAL; 41328a187ee5SSagi Grimberg } 41338a187ee5SSagi Grimberg 41348a187ee5SSagi Grimberg set_reg_umr_seg(*seg, mr); 41358a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 41368a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 41378a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 41388a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 41398a187ee5SSagi Grimberg 41408a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 41418a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 41428a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 41438a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 41448a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 41458a187ee5SSagi Grimberg 41468a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 41478a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 41488a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 41498a187ee5SSagi Grimberg 41508a187ee5SSagi Grimberg return 0; 41518a187ee5SSagi Grimberg } 41528a187ee5SSagi Grimberg 4153dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4154e126ba97SEli Cohen { 4155dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4156e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4157e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4158e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4159e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4160dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4161e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4162e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4163e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4164e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4165e126ba97SEli Cohen } 4166e126ba97SEli Cohen 4167e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4168e126ba97SEli Cohen { 4169e126ba97SEli Cohen __be32 *p = NULL; 4170e126ba97SEli Cohen int tidx = idx; 4171e126ba97SEli Cohen int i, j; 4172e126ba97SEli Cohen 4173e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4174e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4175e126ba97SEli Cohen if ((i & 0xf) == 0) { 4176e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4177e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4178e126ba97SEli Cohen p = buf; 4179e126ba97SEli Cohen j = 0; 4180e126ba97SEli Cohen } 4181e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4182e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4183e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4184e126ba97SEli Cohen } 4185e126ba97SEli Cohen } 4186e126ba97SEli Cohen 41876e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 41886e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 41896a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 41906e5eadacSSagi Grimberg int *size, int nreq) 41916e5eadacSSagi Grimberg { 4192b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4193b2a232d2SLeon Romanovsky return -ENOMEM; 41946e5eadacSSagi Grimberg 41956e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 41966e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 41976e5eadacSSagi Grimberg *ctrl = *seg; 41986e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 41996e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 42006e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 42016e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 42026e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 42036e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 42046e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 42056e5eadacSSagi Grimberg 42066e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 42076e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 42086e5eadacSSagi Grimberg 4209b2a232d2SLeon Romanovsky return 0; 42106e5eadacSSagi Grimberg } 42116e5eadacSSagi Grimberg 42126e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 42136e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 42146e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 42156e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 42166e5eadacSSagi Grimberg { 42176e5eadacSSagi Grimberg u8 opmod = 0; 42186e5eadacSSagi Grimberg 42196e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 42206e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 422119098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 42226e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 42236e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 42246e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 42256e5eadacSSagi Grimberg 42266e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 42276e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 42286e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 42296e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 42306e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 42316e5eadacSSagi Grimberg } 42326e5eadacSSagi Grimberg 42336e5eadacSSagi Grimberg 4234e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 4235e126ba97SEli Cohen struct ib_send_wr **bad_wr) 4236e126ba97SEli Cohen { 4237e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4238e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 423989ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4240d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4241e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4242e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4243e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4244d16e91daSHaggai Eran struct mlx5_bf *bf; 4245e126ba97SEli Cohen int uninitialized_var(size); 4246d16e91daSHaggai Eran void *qend; 4247e126ba97SEli Cohen unsigned long flags; 4248e126ba97SEli Cohen unsigned idx; 4249e126ba97SEli Cohen int err = 0; 4250e126ba97SEli Cohen int num_sge; 4251e126ba97SEli Cohen void *seg; 4252e126ba97SEli Cohen int nreq; 4253e126ba97SEli Cohen int i; 4254e126ba97SEli Cohen u8 next_fence = 0; 4255e126ba97SEli Cohen u8 fence; 4256e126ba97SEli Cohen 4257d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4258d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4259d16e91daSHaggai Eran 4260d16e91daSHaggai Eran qp = to_mqp(ibqp); 42615fe9dec0SEli Cohen bf = &qp->bf; 4262d16e91daSHaggai Eran qend = qp->sq.qend; 4263d16e91daSHaggai Eran 4264e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4265e126ba97SEli Cohen 426689ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 426789ea94a7SMaor Gottlieb err = -EIO; 426889ea94a7SMaor Gottlieb *bad_wr = wr; 426989ea94a7SMaor Gottlieb nreq = 0; 427089ea94a7SMaor Gottlieb goto out; 427189ea94a7SMaor Gottlieb } 427289ea94a7SMaor Gottlieb 4273e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4274a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4275e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4276e126ba97SEli Cohen err = -EINVAL; 4277e126ba97SEli Cohen *bad_wr = wr; 4278e126ba97SEli Cohen goto out; 4279e126ba97SEli Cohen } 4280e126ba97SEli Cohen 4281e126ba97SEli Cohen num_sge = wr->num_sge; 4282e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4283e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 428424be409bSChuck Lever err = -EINVAL; 4285e126ba97SEli Cohen *bad_wr = wr; 4286e126ba97SEli Cohen goto out; 4287e126ba97SEli Cohen } 4288e126ba97SEli Cohen 42896e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 42906e5eadacSSagi Grimberg if (err) { 42916e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 42926e5eadacSSagi Grimberg err = -ENOMEM; 42936e5eadacSSagi Grimberg *bad_wr = wr; 42946e5eadacSSagi Grimberg goto out; 42956e5eadacSSagi Grimberg } 4296e126ba97SEli Cohen 42976e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 42986e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 42996e8484c5SMax Gurtovoy fence = dev->umr_fence; 43006e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 43016e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 43026e8484c5SMax Gurtovoy if (qp->next_fence) 43036e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 43046e8484c5SMax Gurtovoy else 43056e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 43066e8484c5SMax Gurtovoy } else { 43076e8484c5SMax Gurtovoy fence = qp->next_fence; 43086e8484c5SMax Gurtovoy } 43096e8484c5SMax Gurtovoy 4310e126ba97SEli Cohen switch (ibqp->qp_type) { 4311e126ba97SEli Cohen case IB_QPT_XRC_INI: 4312e126ba97SEli Cohen xrc = seg; 4313e126ba97SEli Cohen seg += sizeof(*xrc); 4314e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4315e126ba97SEli Cohen /* fall through */ 4316e126ba97SEli Cohen case IB_QPT_RC: 4317e126ba97SEli Cohen switch (wr->opcode) { 4318e126ba97SEli Cohen case IB_WR_RDMA_READ: 4319e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4320e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4321e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4322e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4323e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4324e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4325e126ba97SEli Cohen break; 4326e126ba97SEli Cohen 4327e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4328e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4329e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 433081bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 433181bea28fSEli Cohen err = -ENOSYS; 433281bea28fSEli Cohen *bad_wr = wr; 433381bea28fSEli Cohen goto out; 4334e126ba97SEli Cohen 4335e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4336e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4337e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4338dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4339e126ba97SEli Cohen num_sge = 0; 4340e126ba97SEli Cohen break; 4341e126ba97SEli Cohen 43428a187ee5SSagi Grimberg case IB_WR_REG_MR: 43438a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 43448a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 43458a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 43468a187ee5SSagi Grimberg if (err) { 43478a187ee5SSagi Grimberg *bad_wr = wr; 43488a187ee5SSagi Grimberg goto out; 43498a187ee5SSagi Grimberg } 43508a187ee5SSagi Grimberg num_sge = 0; 43518a187ee5SSagi Grimberg break; 43528a187ee5SSagi Grimberg 4353e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4354e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4355e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4356e6631814SSagi Grimberg 4357e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4358e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4359e6631814SSagi Grimberg if (err) { 4360e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4361e6631814SSagi Grimberg *bad_wr = wr; 4362e6631814SSagi Grimberg goto out; 4363e6631814SSagi Grimberg } 4364e6631814SSagi Grimberg 43656e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 43666e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4367e6631814SSagi Grimberg /* 4368e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4369e6631814SSagi Grimberg * on error 4370e6631814SSagi Grimberg */ 4371e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 4372e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 4373e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4374e6631814SSagi Grimberg &idx, &size, nreq); 4375e6631814SSagi Grimberg if (err) { 4376e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4377e6631814SSagi Grimberg err = -ENOMEM; 4378e6631814SSagi Grimberg *bad_wr = wr; 4379e6631814SSagi Grimberg goto out; 4380e6631814SSagi Grimberg } 4381e6631814SSagi Grimberg 4382e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4383e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4384e6631814SSagi Grimberg &size); 4385e6631814SSagi Grimberg if (err) { 4386e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4387e6631814SSagi Grimberg *bad_wr = wr; 4388e6631814SSagi Grimberg goto out; 4389e6631814SSagi Grimberg } 4390e6631814SSagi Grimberg 43916e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 43926e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 4393e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4394e6631814SSagi Grimberg &idx, &size, nreq); 4395e6631814SSagi Grimberg if (err) { 4396e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4397e6631814SSagi Grimberg err = -ENOMEM; 4398e6631814SSagi Grimberg *bad_wr = wr; 4399e6631814SSagi Grimberg goto out; 4400e6631814SSagi Grimberg } 4401e6631814SSagi Grimberg 4402e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4403e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4404e6631814SSagi Grimberg &size); 4405e6631814SSagi Grimberg if (err) { 4406e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4407e6631814SSagi Grimberg *bad_wr = wr; 4408e6631814SSagi Grimberg goto out; 4409e6631814SSagi Grimberg } 4410e6631814SSagi Grimberg 44116e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 44126e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 44136e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4414e6631814SSagi Grimberg num_sge = 0; 4415e6631814SSagi Grimberg goto skip_psv; 4416e6631814SSagi Grimberg 4417e126ba97SEli Cohen default: 4418e126ba97SEli Cohen break; 4419e126ba97SEli Cohen } 4420e126ba97SEli Cohen break; 4421e126ba97SEli Cohen 4422e126ba97SEli Cohen case IB_QPT_UC: 4423e126ba97SEli Cohen switch (wr->opcode) { 4424e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4425e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4426e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4427e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4428e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4429e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4430e126ba97SEli Cohen break; 4431e126ba97SEli Cohen 4432e126ba97SEli Cohen default: 4433e126ba97SEli Cohen break; 4434e126ba97SEli Cohen } 4435e126ba97SEli Cohen break; 4436e126ba97SEli Cohen 4437e126ba97SEli Cohen case IB_QPT_SMI: 44381e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 44391e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 44401e0e50b6SMaor Gottlieb err = -EPERM; 44411e0e50b6SMaor Gottlieb *bad_wr = wr; 44421e0e50b6SMaor Gottlieb goto out; 44431e0e50b6SMaor Gottlieb } 4444f6b1ee34SBart Van Assche /* fall through */ 4445d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4446e126ba97SEli Cohen set_datagram_seg(seg, wr); 4447e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4448e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4449e126ba97SEli Cohen if (unlikely((seg == qend))) 4450e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4451e126ba97SEli Cohen break; 4452f0313965SErez Shitrit case IB_QPT_UD: 4453f0313965SErez Shitrit set_datagram_seg(seg, wr); 4454f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4455f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4456e126ba97SEli Cohen 4457f0313965SErez Shitrit if (unlikely((seg == qend))) 4458f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4459f0313965SErez Shitrit 4460f0313965SErez Shitrit /* handle qp that supports ud offload */ 4461f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4462f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4463f0313965SErez Shitrit 4464f0313965SErez Shitrit pad = seg; 4465f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4466f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4467f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4468f0313965SErez Shitrit 4469f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4470f0313965SErez Shitrit 4471f0313965SErez Shitrit if (unlikely((seg == qend))) 4472f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4473f0313965SErez Shitrit } 4474f0313965SErez Shitrit break; 4475e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4476e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4477e126ba97SEli Cohen err = -EINVAL; 4478e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4479e126ba97SEli Cohen goto out; 4480e126ba97SEli Cohen } 4481e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4482e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4483578e7264SMaor Gottlieb set_reg_umr_segment(seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4484e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4485e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4486e126ba97SEli Cohen if (unlikely((seg == qend))) 4487e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4488e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4489e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4490e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4491e126ba97SEli Cohen if (unlikely((seg == qend))) 4492e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4493e126ba97SEli Cohen break; 4494e126ba97SEli Cohen 4495e126ba97SEli Cohen default: 4496e126ba97SEli Cohen break; 4497e126ba97SEli Cohen } 4498e126ba97SEli Cohen 4499e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4500e126ba97SEli Cohen int uninitialized_var(sz); 4501e126ba97SEli Cohen 4502e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4503e126ba97SEli Cohen if (unlikely(err)) { 4504e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4505e126ba97SEli Cohen *bad_wr = wr; 4506e126ba97SEli Cohen goto out; 4507e126ba97SEli Cohen } 4508e126ba97SEli Cohen size += sz; 4509e126ba97SEli Cohen } else { 4510e126ba97SEli Cohen dpseg = seg; 4511e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4512e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4513e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4514e126ba97SEli Cohen dpseg = seg; 4515e126ba97SEli Cohen } 4516e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4517e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4518e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4519e126ba97SEli Cohen dpseg++; 4520e126ba97SEli Cohen } 4521e126ba97SEli Cohen } 4522e126ba97SEli Cohen } 4523e126ba97SEli Cohen 45246e8484c5SMax Gurtovoy qp->next_fence = next_fence; 45256e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 45266e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4527e6631814SSagi Grimberg skip_psv: 4528e126ba97SEli Cohen if (0) 4529e126ba97SEli Cohen dump_wqe(qp, idx, size); 4530e126ba97SEli Cohen } 4531e126ba97SEli Cohen 4532e126ba97SEli Cohen out: 4533e126ba97SEli Cohen if (likely(nreq)) { 4534e126ba97SEli Cohen qp->sq.head += nreq; 4535e126ba97SEli Cohen 4536e126ba97SEli Cohen /* Make sure that descriptors are written before 4537e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4538e126ba97SEli Cohen */ 4539e126ba97SEli Cohen wmb(); 4540e126ba97SEli Cohen 4541e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4542e126ba97SEli Cohen 4543ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4544ada388f7SEli Cohen * we hit doorbell */ 4545ada388f7SEli Cohen wmb(); 4546ada388f7SEli Cohen 45475fe9dec0SEli Cohen /* currently we support only regular doorbells */ 45485fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4549e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4550e126ba97SEli Cohen * and reach the HCA out of order. 4551e126ba97SEli Cohen */ 4552e126ba97SEli Cohen mmiowb(); 4553e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4554e126ba97SEli Cohen } 4555e126ba97SEli Cohen 4556e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4557e126ba97SEli Cohen 4558e126ba97SEli Cohen return err; 4559e126ba97SEli Cohen } 4560e126ba97SEli Cohen 4561e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4562e126ba97SEli Cohen { 4563e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4564e126ba97SEli Cohen } 4565e126ba97SEli Cohen 4566e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 4567e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 4568e126ba97SEli Cohen { 4569e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4570e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4571e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 457289ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 457389ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4574e126ba97SEli Cohen unsigned long flags; 4575e126ba97SEli Cohen int err = 0; 4576e126ba97SEli Cohen int nreq; 4577e126ba97SEli Cohen int ind; 4578e126ba97SEli Cohen int i; 4579e126ba97SEli Cohen 4580d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4581d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4582d16e91daSHaggai Eran 4583e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4584e126ba97SEli Cohen 458589ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 458689ea94a7SMaor Gottlieb err = -EIO; 458789ea94a7SMaor Gottlieb *bad_wr = wr; 458889ea94a7SMaor Gottlieb nreq = 0; 458989ea94a7SMaor Gottlieb goto out; 459089ea94a7SMaor Gottlieb } 459189ea94a7SMaor Gottlieb 4592e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4593e126ba97SEli Cohen 4594e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4595e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4596e126ba97SEli Cohen err = -ENOMEM; 4597e126ba97SEli Cohen *bad_wr = wr; 4598e126ba97SEli Cohen goto out; 4599e126ba97SEli Cohen } 4600e126ba97SEli Cohen 4601e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4602e126ba97SEli Cohen err = -EINVAL; 4603e126ba97SEli Cohen *bad_wr = wr; 4604e126ba97SEli Cohen goto out; 4605e126ba97SEli Cohen } 4606e126ba97SEli Cohen 4607e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4608e126ba97SEli Cohen if (qp->wq_sig) 4609e126ba97SEli Cohen scat++; 4610e126ba97SEli Cohen 4611e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4612e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4613e126ba97SEli Cohen 4614e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4615e126ba97SEli Cohen scat[i].byte_count = 0; 4616e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4617e126ba97SEli Cohen scat[i].addr = 0; 4618e126ba97SEli Cohen } 4619e126ba97SEli Cohen 4620e126ba97SEli Cohen if (qp->wq_sig) { 4621e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4622e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4623e126ba97SEli Cohen } 4624e126ba97SEli Cohen 4625e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4626e126ba97SEli Cohen 4627e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4628e126ba97SEli Cohen } 4629e126ba97SEli Cohen 4630e126ba97SEli Cohen out: 4631e126ba97SEli Cohen if (likely(nreq)) { 4632e126ba97SEli Cohen qp->rq.head += nreq; 4633e126ba97SEli Cohen 4634e126ba97SEli Cohen /* Make sure that descriptors are written before 4635e126ba97SEli Cohen * doorbell record. 4636e126ba97SEli Cohen */ 4637e126ba97SEli Cohen wmb(); 4638e126ba97SEli Cohen 4639e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4640e126ba97SEli Cohen } 4641e126ba97SEli Cohen 4642e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4643e126ba97SEli Cohen 4644e126ba97SEli Cohen return err; 4645e126ba97SEli Cohen } 4646e126ba97SEli Cohen 4647e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4648e126ba97SEli Cohen { 4649e126ba97SEli Cohen switch (mlx5_state) { 4650e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4651e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4652e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4653e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4654e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4655e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4656e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4657e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4658e126ba97SEli Cohen default: return -1; 4659e126ba97SEli Cohen } 4660e126ba97SEli Cohen } 4661e126ba97SEli Cohen 4662e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4663e126ba97SEli Cohen { 4664e126ba97SEli Cohen switch (mlx5_mig_state) { 4665e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4666e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4667e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4668e126ba97SEli Cohen default: return -1; 4669e126ba97SEli Cohen } 4670e126ba97SEli Cohen } 4671e126ba97SEli Cohen 4672e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4673e126ba97SEli Cohen { 4674e126ba97SEli Cohen int ib_flags = 0; 4675e126ba97SEli Cohen 4676e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4677e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4678e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4679e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4680e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4681e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4682e126ba97SEli Cohen 4683e126ba97SEli Cohen return ib_flags; 4684e126ba97SEli Cohen } 4685e126ba97SEli Cohen 468638349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4687d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4688e126ba97SEli Cohen struct mlx5_qp_path *path) 4689e126ba97SEli Cohen { 4690e126ba97SEli Cohen 4691d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4692e126ba97SEli Cohen 4693e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 4694e126ba97SEli Cohen return; 4695e126ba97SEli Cohen 4696ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4697ae59c3f0SLeon Romanovsky 4698d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4699d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4700e126ba97SEli Cohen 4701d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4702d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4703d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4704d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4705d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4706d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4707d8966fcdSDasaratharaman Chandramouli 4708d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4709d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4710d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4711d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4712d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4713d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4714e126ba97SEli Cohen } 4715e126ba97SEli Cohen } 4716e126ba97SEli Cohen 47176d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 47186d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 47196d2f89dfSmajd@mellanox.com u8 *sq_state) 4720e126ba97SEli Cohen { 47216d2f89dfSmajd@mellanox.com void *out; 47226d2f89dfSmajd@mellanox.com void *sqc; 47236d2f89dfSmajd@mellanox.com int inlen; 47246d2f89dfSmajd@mellanox.com int err; 47256d2f89dfSmajd@mellanox.com 47266d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_sq_out); 47271b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 47286d2f89dfSmajd@mellanox.com if (!out) 47296d2f89dfSmajd@mellanox.com return -ENOMEM; 47306d2f89dfSmajd@mellanox.com 47316d2f89dfSmajd@mellanox.com err = mlx5_core_query_sq(dev->mdev, sq->base.mqp.qpn, out); 47326d2f89dfSmajd@mellanox.com if (err) 47336d2f89dfSmajd@mellanox.com goto out; 47346d2f89dfSmajd@mellanox.com 47356d2f89dfSmajd@mellanox.com sqc = MLX5_ADDR_OF(query_sq_out, out, sq_context); 47366d2f89dfSmajd@mellanox.com *sq_state = MLX5_GET(sqc, sqc, state); 47376d2f89dfSmajd@mellanox.com sq->state = *sq_state; 47386d2f89dfSmajd@mellanox.com 47396d2f89dfSmajd@mellanox.com out: 47406d2f89dfSmajd@mellanox.com kvfree(out); 47416d2f89dfSmajd@mellanox.com return err; 47426d2f89dfSmajd@mellanox.com } 47436d2f89dfSmajd@mellanox.com 47446d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 47456d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 47466d2f89dfSmajd@mellanox.com u8 *rq_state) 47476d2f89dfSmajd@mellanox.com { 47486d2f89dfSmajd@mellanox.com void *out; 47496d2f89dfSmajd@mellanox.com void *rqc; 47506d2f89dfSmajd@mellanox.com int inlen; 47516d2f89dfSmajd@mellanox.com int err; 47526d2f89dfSmajd@mellanox.com 47536d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 47541b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 47556d2f89dfSmajd@mellanox.com if (!out) 47566d2f89dfSmajd@mellanox.com return -ENOMEM; 47576d2f89dfSmajd@mellanox.com 47586d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 47596d2f89dfSmajd@mellanox.com if (err) 47606d2f89dfSmajd@mellanox.com goto out; 47616d2f89dfSmajd@mellanox.com 47626d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 47636d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 47646d2f89dfSmajd@mellanox.com rq->state = *rq_state; 47656d2f89dfSmajd@mellanox.com 47666d2f89dfSmajd@mellanox.com out: 47676d2f89dfSmajd@mellanox.com kvfree(out); 47686d2f89dfSmajd@mellanox.com return err; 47696d2f89dfSmajd@mellanox.com } 47706d2f89dfSmajd@mellanox.com 47716d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 47726d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 47736d2f89dfSmajd@mellanox.com { 47746d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 47756d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 47766d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 47776d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 47786d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 47796d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 47806d2f89dfSmajd@mellanox.com }, 47816d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 47826d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 47836d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 47846d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 47856d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 47866d2f89dfSmajd@mellanox.com }, 47876d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 47886d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 47896d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 47906d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 47916d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 47926d2f89dfSmajd@mellanox.com }, 47936d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 47946d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 47956d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 47966d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 47976d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 47986d2f89dfSmajd@mellanox.com }, 47996d2f89dfSmajd@mellanox.com }; 48006d2f89dfSmajd@mellanox.com 48016d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 48026d2f89dfSmajd@mellanox.com 48036d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 48046d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 48056d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 48066d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 48076d2f89dfSmajd@mellanox.com return -EINVAL; 48086d2f89dfSmajd@mellanox.com } 48096d2f89dfSmajd@mellanox.com 48106d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 48116d2f89dfSmajd@mellanox.com *qp_state = qp->state; 48126d2f89dfSmajd@mellanox.com 48136d2f89dfSmajd@mellanox.com return 0; 48146d2f89dfSmajd@mellanox.com } 48156d2f89dfSmajd@mellanox.com 48166d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 48176d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 48186d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 48196d2f89dfSmajd@mellanox.com { 48206d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 48216d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 48226d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 48236d2f89dfSmajd@mellanox.com int err; 48246d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 48256d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 48266d2f89dfSmajd@mellanox.com 48276d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 48286d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 48296d2f89dfSmajd@mellanox.com if (err) 48306d2f89dfSmajd@mellanox.com return err; 48316d2f89dfSmajd@mellanox.com } 48326d2f89dfSmajd@mellanox.com 48336d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 48346d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 48356d2f89dfSmajd@mellanox.com if (err) 48366d2f89dfSmajd@mellanox.com return err; 48376d2f89dfSmajd@mellanox.com } 48386d2f89dfSmajd@mellanox.com 48396d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 48406d2f89dfSmajd@mellanox.com raw_packet_qp_state); 48416d2f89dfSmajd@mellanox.com } 48426d2f89dfSmajd@mellanox.com 48436d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 48446d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 48456d2f89dfSmajd@mellanox.com { 484609a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 4847e126ba97SEli Cohen struct mlx5_qp_context *context; 4848e126ba97SEli Cohen int mlx5_state; 484909a7d9ecSSaeed Mahameed u32 *outb; 4850e126ba97SEli Cohen int err = 0; 4851e126ba97SEli Cohen 485209a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 48536d2f89dfSmajd@mellanox.com if (!outb) 48546d2f89dfSmajd@mellanox.com return -ENOMEM; 48556d2f89dfSmajd@mellanox.com 485619098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 485709a7d9ecSSaeed Mahameed outlen); 4858e126ba97SEli Cohen if (err) 48596d2f89dfSmajd@mellanox.com goto out; 4860e126ba97SEli Cohen 486109a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 486209a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 486309a7d9ecSSaeed Mahameed 4864e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 4865e126ba97SEli Cohen 4866e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 4867e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 4868e126ba97SEli Cohen qp_attr->path_mig_state = 4869e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 4870e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 4871e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 4872e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 4873e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 4874e126ba97SEli Cohen qp_attr->qp_access_flags = 4875e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 4876e126ba97SEli Cohen 4877e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 487838349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 487938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 4880d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 4881d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 4882d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 4883d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 4884e126ba97SEli Cohen } 4885e126ba97SEli Cohen 4886d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 4887e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 4888e126ba97SEli Cohen 4889e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 4890e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 4891e126ba97SEli Cohen 4892e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 4893e126ba97SEli Cohen 4894e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 4895e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 4896e126ba97SEli Cohen qp_attr->min_rnr_timer = 4897e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 4898e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 4899e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 4900e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 4901e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 49026d2f89dfSmajd@mellanox.com 49036d2f89dfSmajd@mellanox.com out: 49046d2f89dfSmajd@mellanox.com kfree(outb); 49056d2f89dfSmajd@mellanox.com return err; 49066d2f89dfSmajd@mellanox.com } 49076d2f89dfSmajd@mellanox.com 4908776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 4909776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 4910776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 4911776a3906SMoni Shoua { 4912776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 4913776a3906SMoni Shoua u32 *out; 4914776a3906SMoni Shoua u32 access_flags = 0; 4915776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 4916776a3906SMoni Shoua void *dctc; 4917776a3906SMoni Shoua int err; 4918776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 4919776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 4920776a3906SMoni Shoua IB_QP_PORT | 4921776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 4922776a3906SMoni Shoua IB_QP_AV | 4923776a3906SMoni Shoua IB_QP_PATH_MTU | 4924776a3906SMoni Shoua IB_QP_PKEY_INDEX; 4925776a3906SMoni Shoua 4926776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 4927776a3906SMoni Shoua return -EINVAL; 4928776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 4929776a3906SMoni Shoua return -EINVAL; 4930776a3906SMoni Shoua 4931776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 4932776a3906SMoni Shoua if (!out) 4933776a3906SMoni Shoua return -ENOMEM; 4934776a3906SMoni Shoua 4935776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 4936776a3906SMoni Shoua if (err) 4937776a3906SMoni Shoua goto out; 4938776a3906SMoni Shoua 4939776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 4940776a3906SMoni Shoua 4941776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 4942776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 4943776a3906SMoni Shoua 4944776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 4945776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 4946776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 4947776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 4948776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 4949776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 4950776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 4951776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 4952776a3906SMoni Shoua } 4953776a3906SMoni Shoua 4954776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 4955776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 4956776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 4957776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 4958776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 4959776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 4960776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 4961776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 4962776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 4963776a3906SMoni Shoua } 4964776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 4965776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 4966776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 4967776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 4968776a3906SMoni Shoua out: 4969776a3906SMoni Shoua kfree(out); 4970776a3906SMoni Shoua return err; 4971776a3906SMoni Shoua } 4972776a3906SMoni Shoua 49736d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 49746d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 49756d2f89dfSmajd@mellanox.com { 49766d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 49776d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 49786d2f89dfSmajd@mellanox.com int err = 0; 49796d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 49806d2f89dfSmajd@mellanox.com 498128d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 498228d61370SYishai Hadas return -ENOSYS; 498328d61370SYishai Hadas 4984d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4985d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 4986d16e91daSHaggai Eran qp_init_attr); 4987d16e91daSHaggai Eran 4988c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 4989c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 4990c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 4991c2e53b2cSYishai Hadas 4992776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 4993776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 4994776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 4995776a3906SMoni Shoua 49966d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 49976d2f89dfSmajd@mellanox.com 4998c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 4999c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 50006d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 50016d2f89dfSmajd@mellanox.com if (err) 50026d2f89dfSmajd@mellanox.com goto out; 50036d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 50046d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 50056d2f89dfSmajd@mellanox.com } else { 50066d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 50076d2f89dfSmajd@mellanox.com if (err) 50086d2f89dfSmajd@mellanox.com goto out; 50096d2f89dfSmajd@mellanox.com } 50106d2f89dfSmajd@mellanox.com 50116d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5012e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5013e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5014e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5015e126ba97SEli Cohen 5016e126ba97SEli Cohen if (!ibqp->uobject) { 50170540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5018e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 50190540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5020e126ba97SEli Cohen } else { 5021e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5022e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5023e126ba97SEli Cohen } 5024e126ba97SEli Cohen 50250540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 50260540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 50270540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 50280540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 50290540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5030e126ba97SEli Cohen 5031e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5032e126ba97SEli Cohen 5033e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5034e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5035e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5036e126ba97SEli Cohen 5037051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5038051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5039051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5040051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5041051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5042051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5043b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5044b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5045051f2630SLeon Romanovsky 5046e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5047e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5048e126ba97SEli Cohen 5049e126ba97SEli Cohen out: 5050e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5051e126ba97SEli Cohen return err; 5052e126ba97SEli Cohen } 5053e126ba97SEli Cohen 5054e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5055e126ba97SEli Cohen struct ib_ucontext *context, 5056e126ba97SEli Cohen struct ib_udata *udata) 5057e126ba97SEli Cohen { 5058e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5059e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5060e126ba97SEli Cohen int err; 5061e126ba97SEli Cohen 5062938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5063e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5064e126ba97SEli Cohen 5065e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5066e126ba97SEli Cohen if (!xrcd) 5067e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5068e126ba97SEli Cohen 50699603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 5070e126ba97SEli Cohen if (err) { 5071e126ba97SEli Cohen kfree(xrcd); 5072e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5073e126ba97SEli Cohen } 5074e126ba97SEli Cohen 5075e126ba97SEli Cohen return &xrcd->ibxrcd; 5076e126ba97SEli Cohen } 5077e126ba97SEli Cohen 5078e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5079e126ba97SEli Cohen { 5080e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5081e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5082e126ba97SEli Cohen int err; 5083e126ba97SEli Cohen 50849603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 5085b081808aSLeon Romanovsky if (err) 5086e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5087e126ba97SEli Cohen 5088e126ba97SEli Cohen kfree(xrcd); 5089e126ba97SEli Cohen return 0; 5090e126ba97SEli Cohen } 509179b20a6cSYishai Hadas 5092350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5093350d0e4cSYishai Hadas { 5094350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5095350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5096350d0e4cSYishai Hadas struct ib_event event; 5097350d0e4cSYishai Hadas 5098350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5099350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5100350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5101350d0e4cSYishai Hadas switch (type) { 5102350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5103350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5104350d0e4cSYishai Hadas break; 5105350d0e4cSYishai Hadas default: 5106350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5107350d0e4cSYishai Hadas return; 5108350d0e4cSYishai Hadas } 5109350d0e4cSYishai Hadas 5110350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5111350d0e4cSYishai Hadas } 5112350d0e4cSYishai Hadas } 5113350d0e4cSYishai Hadas 511403404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 511503404e8aSMaor Gottlieb { 511603404e8aSMaor Gottlieb int err = 0; 511703404e8aSMaor Gottlieb 511803404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 511903404e8aSMaor Gottlieb if (dev->delay_drop.activate) 512003404e8aSMaor Gottlieb goto out; 512103404e8aSMaor Gottlieb 512203404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 512303404e8aSMaor Gottlieb if (err) 512403404e8aSMaor Gottlieb goto out; 512503404e8aSMaor Gottlieb 512603404e8aSMaor Gottlieb dev->delay_drop.activate = true; 512703404e8aSMaor Gottlieb out: 512803404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5129fe248c3aSMaor Gottlieb 5130fe248c3aSMaor Gottlieb if (!err) 5131fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 513203404e8aSMaor Gottlieb return err; 513303404e8aSMaor Gottlieb } 513403404e8aSMaor Gottlieb 513579b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 513679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 513779b20a6cSYishai Hadas { 513879b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 51394be6da1eSNoa Osherovich int has_net_offloads; 514079b20a6cSYishai Hadas __be64 *rq_pas0; 514179b20a6cSYishai Hadas void *in; 514279b20a6cSYishai Hadas void *rqc; 514379b20a6cSYishai Hadas void *wq; 514479b20a6cSYishai Hadas int inlen; 514579b20a6cSYishai Hadas int err; 514679b20a6cSYishai Hadas 514779b20a6cSYishai Hadas dev = to_mdev(pd->device); 514879b20a6cSYishai Hadas 514979b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 51501b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 515179b20a6cSYishai Hadas if (!in) 515279b20a6cSYishai Hadas return -ENOMEM; 515379b20a6cSYishai Hadas 515479b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 515579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 515679b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 515779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 515879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 515979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 516079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 516179b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5162ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5163ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5164ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5165b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5166b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5167b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5168b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5169b1383aa6SNoa Osherovich goto out; 5170b1383aa6SNoa Osherovich } else { 517179b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5172b1383aa6SNoa Osherovich } 5173b1383aa6SNoa Osherovich } 517479b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5175ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5176ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5177ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5178ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5179ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5180ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5181ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5182ccc87087SNoa Osherovich } 518379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 518479b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 518579b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 518679b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 518779b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 518879b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 51894be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5190b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 51914be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5192b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5193b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5194b1f74a84SNoa Osherovich goto out; 5195b1f74a84SNoa Osherovich } 5196b1f74a84SNoa Osherovich } else { 5197b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5198b1f74a84SNoa Osherovich } 51994be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 52004be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 52014be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 52024be6da1eSNoa Osherovich err = -EOPNOTSUPP; 52034be6da1eSNoa Osherovich goto out; 52044be6da1eSNoa Osherovich } 52054be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 52064be6da1eSNoa Osherovich } 520703404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 520803404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 520903404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 521003404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 521103404e8aSMaor Gottlieb err = -EOPNOTSUPP; 521203404e8aSMaor Gottlieb goto out; 521303404e8aSMaor Gottlieb } 521403404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 521503404e8aSMaor Gottlieb } 521679b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 521779b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5218350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 521903404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 522003404e8aSMaor Gottlieb err = set_delay_drop(dev); 522103404e8aSMaor Gottlieb if (err) { 522203404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 522303404e8aSMaor Gottlieb err); 522403404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 522503404e8aSMaor Gottlieb } else { 522603404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 522703404e8aSMaor Gottlieb } 522803404e8aSMaor Gottlieb } 5229b1f74a84SNoa Osherovich out: 523079b20a6cSYishai Hadas kvfree(in); 523179b20a6cSYishai Hadas return err; 523279b20a6cSYishai Hadas } 523379b20a6cSYishai Hadas 523479b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 523579b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 523679b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 523779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 523879b20a6cSYishai Hadas { 523979b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 524079b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 524179b20a6cSYishai Hadas return -EINVAL; 524279b20a6cSYishai Hadas 524379b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 524479b20a6cSYishai Hadas return -EINVAL; 524579b20a6cSYishai Hadas 524679b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 524779b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 524879b20a6cSYishai Hadas rwq->buf_size = (rwq->wqe_count << rwq->wqe_shift); 524979b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 525079b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 525179b20a6cSYishai Hadas return 0; 525279b20a6cSYishai Hadas } 525379b20a6cSYishai Hadas 525479b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 525579b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 525679b20a6cSYishai Hadas struct ib_udata *udata, 525779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 525879b20a6cSYishai Hadas { 525979b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 526079b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 526179b20a6cSYishai Hadas int err; 526279b20a6cSYishai Hadas size_t required_cmd_sz; 526379b20a6cSYishai Hadas 5264ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5265ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 526679b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 526779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 526879b20a6cSYishai Hadas return -EINVAL; 526979b20a6cSYishai Hadas } 527079b20a6cSYishai Hadas 527179b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 527279b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 527379b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 527479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 527579b20a6cSYishai Hadas return -EOPNOTSUPP; 527679b20a6cSYishai Hadas } 527779b20a6cSYishai Hadas 527879b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 527979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 528079b20a6cSYishai Hadas return -EFAULT; 528179b20a6cSYishai Hadas } 528279b20a6cSYishai Hadas 5283ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 528479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 528579b20a6cSYishai Hadas return -EOPNOTSUPP; 5286ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5287ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5288ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 528979b20a6cSYishai Hadas return -EOPNOTSUPP; 529079b20a6cSYishai Hadas } 5291ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5292ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5293ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5294ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5295ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5296ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5297ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5298ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5299ccc87087SNoa Osherovich return -EINVAL; 5300ccc87087SNoa Osherovich } 5301ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5302ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5303ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5304ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5305ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5306ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5307ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5308ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5309ccc87087SNoa Osherovich return -EINVAL; 5310ccc87087SNoa Osherovich } 5311ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5312ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5313ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5314ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5315ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5316ccc87087SNoa Osherovich } 531779b20a6cSYishai Hadas 531879b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 531979b20a6cSYishai Hadas if (err) { 532079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 532179b20a6cSYishai Hadas return err; 532279b20a6cSYishai Hadas } 532379b20a6cSYishai Hadas 532479b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 532579b20a6cSYishai Hadas if (err) { 532679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 532779b20a6cSYishai Hadas if (err) 532879b20a6cSYishai Hadas return err; 532979b20a6cSYishai Hadas } 533079b20a6cSYishai Hadas 533179b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 533279b20a6cSYishai Hadas return 0; 533379b20a6cSYishai Hadas } 533479b20a6cSYishai Hadas 533579b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 533679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 533779b20a6cSYishai Hadas struct ib_udata *udata) 533879b20a6cSYishai Hadas { 533979b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 534079b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 534179b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 534279b20a6cSYishai Hadas size_t min_resp_len; 534379b20a6cSYishai Hadas int err; 534479b20a6cSYishai Hadas 534579b20a6cSYishai Hadas if (!udata) 534679b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 534779b20a6cSYishai Hadas 534879b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 534979b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 535079b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 535179b20a6cSYishai Hadas 535279b20a6cSYishai Hadas dev = to_mdev(pd->device); 535379b20a6cSYishai Hadas switch (init_attr->wq_type) { 535479b20a6cSYishai Hadas case IB_WQT_RQ: 535579b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 535679b20a6cSYishai Hadas if (!rwq) 535779b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 535879b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 535979b20a6cSYishai Hadas if (err) 536079b20a6cSYishai Hadas goto err; 536179b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 536279b20a6cSYishai Hadas if (err) 536379b20a6cSYishai Hadas goto err_user_rq; 536479b20a6cSYishai Hadas break; 536579b20a6cSYishai Hadas default: 536679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 536779b20a6cSYishai Hadas init_attr->wq_type); 536879b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 536979b20a6cSYishai Hadas } 537079b20a6cSYishai Hadas 5371350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 537279b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 537379b20a6cSYishai Hadas if (udata->outlen) { 537479b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 537579b20a6cSYishai Hadas sizeof(resp.response_length); 537679b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 537779b20a6cSYishai Hadas if (err) 537879b20a6cSYishai Hadas goto err_copy; 537979b20a6cSYishai Hadas } 538079b20a6cSYishai Hadas 5381350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5382350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 538379b20a6cSYishai Hadas return &rwq->ibwq; 538479b20a6cSYishai Hadas 538579b20a6cSYishai Hadas err_copy: 5386350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 538779b20a6cSYishai Hadas err_user_rq: 5388fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 538979b20a6cSYishai Hadas err: 539079b20a6cSYishai Hadas kfree(rwq); 539179b20a6cSYishai Hadas return ERR_PTR(err); 539279b20a6cSYishai Hadas } 539379b20a6cSYishai Hadas 539479b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 539579b20a6cSYishai Hadas { 539679b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 539779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 539879b20a6cSYishai Hadas 5399350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5400fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 540179b20a6cSYishai Hadas kfree(rwq); 540279b20a6cSYishai Hadas 540379b20a6cSYishai Hadas return 0; 540479b20a6cSYishai Hadas } 540579b20a6cSYishai Hadas 5406c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5407c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5408c5f90929SYishai Hadas struct ib_udata *udata) 5409c5f90929SYishai Hadas { 5410c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5411c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5412c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5413c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5414c5f90929SYishai Hadas size_t min_resp_len; 5415c5f90929SYishai Hadas int inlen; 5416c5f90929SYishai Hadas int err; 5417c5f90929SYishai Hadas int i; 5418c5f90929SYishai Hadas u32 *in; 5419c5f90929SYishai Hadas void *rqtc; 5420c5f90929SYishai Hadas 5421c5f90929SYishai Hadas if (udata->inlen > 0 && 5422c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5423c5f90929SYishai Hadas udata->inlen)) 5424c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5425c5f90929SYishai Hadas 5426efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5427efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5428efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5429efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5430efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5431efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5432efd7f400SMaor Gottlieb } 5433efd7f400SMaor Gottlieb 5434c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5435c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5436c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5437c5f90929SYishai Hadas 5438c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5439c5f90929SYishai Hadas if (!rwq_ind_tbl) 5440c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5441c5f90929SYishai Hadas 5442c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 54431b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5444c5f90929SYishai Hadas if (!in) { 5445c5f90929SYishai Hadas err = -ENOMEM; 5446c5f90929SYishai Hadas goto err; 5447c5f90929SYishai Hadas } 5448c5f90929SYishai Hadas 5449c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5450c5f90929SYishai Hadas 5451c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5452c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5453c5f90929SYishai Hadas 5454c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5455c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5456c5f90929SYishai Hadas 5457c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5458c5f90929SYishai Hadas kvfree(in); 5459c5f90929SYishai Hadas 5460c5f90929SYishai Hadas if (err) 5461c5f90929SYishai Hadas goto err; 5462c5f90929SYishai Hadas 5463c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5464c5f90929SYishai Hadas if (udata->outlen) { 5465c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5466c5f90929SYishai Hadas sizeof(resp.response_length); 5467c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5468c5f90929SYishai Hadas if (err) 5469c5f90929SYishai Hadas goto err_copy; 5470c5f90929SYishai Hadas } 5471c5f90929SYishai Hadas 5472c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5473c5f90929SYishai Hadas 5474c5f90929SYishai Hadas err_copy: 5475c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5476c5f90929SYishai Hadas err: 5477c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5478c5f90929SYishai Hadas return ERR_PTR(err); 5479c5f90929SYishai Hadas } 5480c5f90929SYishai Hadas 5481c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5482c5f90929SYishai Hadas { 5483c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5484c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5485c5f90929SYishai Hadas 5486c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5487c5f90929SYishai Hadas 5488c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5489c5f90929SYishai Hadas return 0; 5490c5f90929SYishai Hadas } 5491c5f90929SYishai Hadas 549279b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 549379b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 549479b20a6cSYishai Hadas { 549579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 549679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 549779b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 549879b20a6cSYishai Hadas size_t required_cmd_sz; 549979b20a6cSYishai Hadas int curr_wq_state; 550079b20a6cSYishai Hadas int wq_state; 550179b20a6cSYishai Hadas int inlen; 550279b20a6cSYishai Hadas int err; 550379b20a6cSYishai Hadas void *rqc; 550479b20a6cSYishai Hadas void *in; 550579b20a6cSYishai Hadas 550679b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 550779b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 550879b20a6cSYishai Hadas return -EINVAL; 550979b20a6cSYishai Hadas 551079b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 551179b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 551279b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 551379b20a6cSYishai Hadas return -EOPNOTSUPP; 551479b20a6cSYishai Hadas 551579b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 551679b20a6cSYishai Hadas return -EFAULT; 551779b20a6cSYishai Hadas 551879b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 551979b20a6cSYishai Hadas return -EOPNOTSUPP; 552079b20a6cSYishai Hadas 552179b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 55221b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 552379b20a6cSYishai Hadas if (!in) 552479b20a6cSYishai Hadas return -ENOMEM; 552579b20a6cSYishai Hadas 552679b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 552779b20a6cSYishai Hadas 552879b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 552979b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 553079b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 553179b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 553279b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 553379b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 553479b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 553579b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 553679b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 553779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 553879b20a6cSYishai Hadas 5539b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5540b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5541b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5542b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5543b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5544b1f74a84SNoa Osherovich "supported\n"); 5545b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5546b1f74a84SNoa Osherovich goto out; 5547b1f74a84SNoa Osherovich } 5548b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5549b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5550b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5551b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5552b1f74a84SNoa Osherovich } 5553b1383aa6SNoa Osherovich 5554b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5555b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5556b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5557b1383aa6SNoa Osherovich goto out; 5558b1383aa6SNoa Osherovich } 5559b1f74a84SNoa Osherovich } 5560b1f74a84SNoa Osherovich 556123a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 556223a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 556323a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 556423a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5565e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5566e1f24a79SParav Pandit dev->port->cnts.set_id); 556723a6964eSMajd Dibbiny } else 556823a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 556923a6964eSMajd Dibbiny dev->ib_dev.name); 557023a6964eSMajd Dibbiny } 557123a6964eSMajd Dibbiny 5572350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 557379b20a6cSYishai Hadas if (!err) 557479b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 557579b20a6cSYishai Hadas 5576b1f74a84SNoa Osherovich out: 5577b1f74a84SNoa Osherovich kvfree(in); 557879b20a6cSYishai Hadas return err; 557979b20a6cSYishai Hadas } 5580