1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 112e126ba97SEli Cohen { 113e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 114e126ba97SEli Cohen } 115e126ba97SEli Cohen 116e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 117e126ba97SEli Cohen { 118e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 119e126ba97SEli Cohen } 120e126ba97SEli Cohen 121e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 122e126ba97SEli Cohen { 123e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 124e126ba97SEli Cohen } 125e126ba97SEli Cohen 126c1395a2aSHaggai Eran /** 127c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 128c1395a2aSHaggai Eran * 129c1395a2aSHaggai Eran * @qp: QP to copy from. 130c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 131c1395a2aSHaggai Eran * otherwise. 132c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 133c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 134c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 135c1395a2aSHaggai Eran * element in the queue. 136c1395a2aSHaggai Eran * @buffer: destination buffer. 137c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 138c1395a2aSHaggai Eran * 139c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 140c1395a2aSHaggai Eran * 141c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 142c1395a2aSHaggai Eran */ 143c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14419098df2Smajd@mellanox.com void *buffer, u32 length, 14519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 146c1395a2aSHaggai Eran { 147c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 148c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 149c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 150c1395a2aSHaggai Eran size_t offset; 151c1395a2aSHaggai Eran size_t wq_end; 15219098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 153c1395a2aSHaggai Eran u32 first_copy_length; 154c1395a2aSHaggai Eran int wqe_length; 155c1395a2aSHaggai Eran int ret; 156c1395a2aSHaggai Eran 157c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 158c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 159c1395a2aSHaggai Eran qp->ibqp.qp_type); 160c1395a2aSHaggai Eran return -EINVAL; 161c1395a2aSHaggai Eran } 162c1395a2aSHaggai Eran 163c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 164c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 165c1395a2aSHaggai Eran 166c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 167c1395a2aSHaggai Eran return -EINVAL; 168c1395a2aSHaggai Eran 169c1395a2aSHaggai Eran if (offset > umem->length || 170c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 171c1395a2aSHaggai Eran return -EINVAL; 172c1395a2aSHaggai Eran 173c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 174c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 175c1395a2aSHaggai Eran if (ret) 176c1395a2aSHaggai Eran return ret; 177c1395a2aSHaggai Eran 178c1395a2aSHaggai Eran if (send) { 179c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 180c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 181c1395a2aSHaggai Eran 182c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 183c1395a2aSHaggai Eran } else { 184c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 185c1395a2aSHaggai Eran } 186c1395a2aSHaggai Eran 187c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 188c1395a2aSHaggai Eran return first_copy_length; 189c1395a2aSHaggai Eran 190c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 191c1395a2aSHaggai Eran wqe_length - first_copy_length); 192c1395a2aSHaggai Eran if (ret) 193c1395a2aSHaggai Eran return ret; 194c1395a2aSHaggai Eran 195c1395a2aSHaggai Eran return wqe_length; 196c1395a2aSHaggai Eran } 197c1395a2aSHaggai Eran 198e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 199e126ba97SEli Cohen { 200e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 201e126ba97SEli Cohen struct ib_event event; 202e126ba97SEli Cohen 20319098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20419098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20519098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20619098df2Smajd@mellanox.com } 207e126ba97SEli Cohen 208e126ba97SEli Cohen if (ibqp->event_handler) { 209e126ba97SEli Cohen event.device = ibqp->device; 210e126ba97SEli Cohen event.element.qp = ibqp; 211e126ba97SEli Cohen switch (type) { 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 213e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 216e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 217e126ba97SEli Cohen break; 218e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 219e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 220e126ba97SEli Cohen break; 221e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 222e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 223e126ba97SEli Cohen break; 224e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 225e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 226e126ba97SEli Cohen break; 227e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 228e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 229e126ba97SEli Cohen break; 230e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 231e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 232e126ba97SEli Cohen break; 233e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 234e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 235e126ba97SEli Cohen break; 236e126ba97SEli Cohen default: 237e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 238e126ba97SEli Cohen return; 239e126ba97SEli Cohen } 240e126ba97SEli Cohen 241e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 242e126ba97SEli Cohen } 243e126ba97SEli Cohen } 244e126ba97SEli Cohen 245e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 246e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 247e126ba97SEli Cohen { 248e126ba97SEli Cohen int wqe_size; 249e126ba97SEli Cohen int wq_size; 250e126ba97SEli Cohen 251e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 252938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 253e126ba97SEli Cohen return -EINVAL; 254e126ba97SEli Cohen 255e126ba97SEli Cohen if (!has_rq) { 256e126ba97SEli Cohen qp->rq.max_gs = 0; 257e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 258e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2590540d814SNoa Osherovich cap->max_recv_wr = 0; 2600540d814SNoa Osherovich cap->max_recv_sge = 0; 261e126ba97SEli Cohen } else { 262e126ba97SEli Cohen if (ucmd) { 263e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 264002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 265002bf228SLeon Romanovsky return -EINVAL; 266e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 267002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 268002bf228SLeon Romanovsky return -EINVAL; 269e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 270e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 271e126ba97SEli Cohen } else { 272e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 273e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 274e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 275e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 276e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 277e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 278938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 279e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 280e126ba97SEli Cohen wqe_size, 281938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 282938fe83cSSaeed Mahameed max_wqe_sz_rq)); 283e126ba97SEli Cohen return -EINVAL; 284e126ba97SEli Cohen } 285e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 286e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 287e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 288e126ba97SEli Cohen } 289e126ba97SEli Cohen } 290e126ba97SEli Cohen 291e126ba97SEli Cohen return 0; 292e126ba97SEli Cohen } 293e126ba97SEli Cohen 294f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 295e126ba97SEli Cohen { 296618af384SAndi Shyti int size = 0; 297e126ba97SEli Cohen 298f0313965SErez Shitrit switch (attr->qp_type) { 299e126ba97SEli Cohen case IB_QPT_XRC_INI: 300b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 301e126ba97SEli Cohen /* fall through */ 302e126ba97SEli Cohen case IB_QPT_RC: 303e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30475c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 30575c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30675c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 307064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 308064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 309064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen 312b125a54bSEli Cohen case IB_QPT_XRC_TGT: 313b125a54bSEli Cohen return 0; 314b125a54bSEli Cohen 315e126ba97SEli Cohen case IB_QPT_UC: 316b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 31775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3189e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31975c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 320e126ba97SEli Cohen break; 321e126ba97SEli Cohen 322e126ba97SEli Cohen case IB_QPT_UD: 323f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 324f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 325f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 326f0313965SErez Shitrit /* fall through */ 327e126ba97SEli Cohen case IB_QPT_SMI: 328d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 329b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 330e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 331e126ba97SEli Cohen break; 332e126ba97SEli Cohen 333e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 334b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 335e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 336e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 337e126ba97SEli Cohen break; 338e126ba97SEli Cohen 339e126ba97SEli Cohen default: 340e126ba97SEli Cohen return -EINVAL; 341e126ba97SEli Cohen } 342e126ba97SEli Cohen 343e126ba97SEli Cohen return size; 344e126ba97SEli Cohen } 345e126ba97SEli Cohen 346e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 347e126ba97SEli Cohen { 348e126ba97SEli Cohen int inl_size = 0; 349e126ba97SEli Cohen int size; 350e126ba97SEli Cohen 351f0313965SErez Shitrit size = sq_overhead(attr); 352e126ba97SEli Cohen if (size < 0) 353e126ba97SEli Cohen return size; 354e126ba97SEli Cohen 355e126ba97SEli Cohen if (attr->cap.max_inline_data) { 356e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 357e126ba97SEli Cohen attr->cap.max_inline_data; 358e126ba97SEli Cohen } 359e126ba97SEli Cohen 360e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 361e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 362e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 363e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 364e1e66cc2SSagi Grimberg else 365e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 366e126ba97SEli Cohen } 367e126ba97SEli Cohen 368288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 369288c01b7SEli Cohen { 370288c01b7SEli Cohen int max_sge; 371288c01b7SEli Cohen 372288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 373288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 376288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 377288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 378288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 379288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 380288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 381288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 382288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 383288c01b7SEli Cohen else 384288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 385288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 386288c01b7SEli Cohen 387288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 388288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 389288c01b7SEli Cohen } 390288c01b7SEli Cohen 391e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 392e126ba97SEli Cohen struct mlx5_ib_qp *qp) 393e126ba97SEli Cohen { 394e126ba97SEli Cohen int wqe_size; 395e126ba97SEli Cohen int wq_size; 396e126ba97SEli Cohen 397e126ba97SEli Cohen if (!attr->cap.max_send_wr) 398e126ba97SEli Cohen return 0; 399e126ba97SEli Cohen 400e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 401e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 402e126ba97SEli Cohen if (wqe_size < 0) 403e126ba97SEli Cohen return wqe_size; 404e126ba97SEli Cohen 405938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 406b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 407938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 408e126ba97SEli Cohen return -EINVAL; 409e126ba97SEli Cohen } 410e126ba97SEli Cohen 411f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 412e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 413e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 414e126ba97SEli Cohen 415e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 416e1e66cc2SSagi Grimberg qp->signature_en = true; 417e1e66cc2SSagi Grimberg 418e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 419e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 420938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4211974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4221974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 423938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 424938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 425b125a54bSEli Cohen return -ENOMEM; 426b125a54bSEli Cohen } 427e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 428288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 429288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 430288c01b7SEli Cohen return -ENOMEM; 431288c01b7SEli Cohen 432288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 433b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 434b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 435e126ba97SEli Cohen 436e126ba97SEli Cohen return wq_size; 437e126ba97SEli Cohen } 438e126ba97SEli Cohen 439e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 440e126ba97SEli Cohen struct mlx5_ib_qp *qp, 44119098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4420fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4430fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 444e126ba97SEli Cohen { 445e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 446e126ba97SEli Cohen 447938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 448e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 449938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 450e126ba97SEli Cohen return -EINVAL; 451e126ba97SEli Cohen } 452e126ba97SEli Cohen 453e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 454e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 455e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 456e126ba97SEli Cohen return -EINVAL; 457e126ba97SEli Cohen } 458e126ba97SEli Cohen 459e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 460e126ba97SEli Cohen 461938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 462e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 463938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 464938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 465e126ba97SEli Cohen return -EINVAL; 466e126ba97SEli Cohen } 467e126ba97SEli Cohen 468c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 469c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4700fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4710fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4720fb2ed66Smajd@mellanox.com } else { 47319098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 474e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4750fb2ed66Smajd@mellanox.com } 476e126ba97SEli Cohen 477e126ba97SEli Cohen return 0; 478e126ba97SEli Cohen } 479e126ba97SEli Cohen 480e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 481e126ba97SEli Cohen { 482e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 483e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 484e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 485e126ba97SEli Cohen !attr->cap.max_recv_wr) 486e126ba97SEli Cohen return 0; 487e126ba97SEli Cohen 488e126ba97SEli Cohen return 1; 489e126ba97SEli Cohen } 490e126ba97SEli Cohen 4910b80c14fSEli Cohen enum { 4920b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4930b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4940b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4950b80c14fSEli Cohen * "odd/even" order 4960b80c14fSEli Cohen */ 4970b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4980b80c14fSEli Cohen }; 4990b80c14fSEli Cohen 500b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 501b037c29aSEli Cohen { 50231a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 503b037c29aSEli Cohen } 504b037c29aSEli Cohen 505b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 506b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 507c1be5232SEli Cohen { 508c1be5232SEli Cohen int n; 509c1be5232SEli Cohen 510b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 511b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 512c1be5232SEli Cohen 513c1be5232SEli Cohen return n >= 0 ? n : 0; 514c1be5232SEli Cohen } 515c1be5232SEli Cohen 51618b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 51718b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 51818b0362eSYishai Hadas { 51918b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 52018b0362eSYishai Hadas } 52118b0362eSYishai Hadas 522b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 523b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 524c1be5232SEli Cohen { 525c1be5232SEli Cohen int med; 526c1be5232SEli Cohen 527b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 528b037c29aSEli Cohen return ++med; 529c1be5232SEli Cohen } 530c1be5232SEli Cohen 531b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 532b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 533e126ba97SEli Cohen { 534e126ba97SEli Cohen int i; 535e126ba97SEli Cohen 536b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 537b037c29aSEli Cohen if (!bfregi->count[i]) { 5382f5ff264SEli Cohen bfregi->count[i]++; 539e126ba97SEli Cohen return i; 540e126ba97SEli Cohen } 541e126ba97SEli Cohen } 542e126ba97SEli Cohen 543e126ba97SEli Cohen return -ENOMEM; 544e126ba97SEli Cohen } 545e126ba97SEli Cohen 546b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 547b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 548e126ba97SEli Cohen { 54918b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 550e126ba97SEli Cohen int i; 551e126ba97SEli Cohen 55218b0362eSYishai Hadas if (minidx < 0) 55318b0362eSYishai Hadas return minidx; 55418b0362eSYishai Hadas 55518b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 5562f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 557e126ba97SEli Cohen minidx = i; 5580b80c14fSEli Cohen if (!bfregi->count[minidx]) 5590b80c14fSEli Cohen break; 560e126ba97SEli Cohen } 561e126ba97SEli Cohen 5622f5ff264SEli Cohen bfregi->count[minidx]++; 563e126ba97SEli Cohen return minidx; 564e126ba97SEli Cohen } 565e126ba97SEli Cohen 566b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 567ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 568e126ba97SEli Cohen { 569ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 570e126ba97SEli Cohen 5712f5ff264SEli Cohen mutex_lock(&bfregi->lock); 572ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 573ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 574ffaf58deSLeon Romanovsky if (bfregn < 0) 575ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 576ffaf58deSLeon Romanovsky } 577ffaf58deSLeon Romanovsky 578ffaf58deSLeon Romanovsky if (bfregn < 0) { 5790b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5802f5ff264SEli Cohen bfregn = 0; 5812f5ff264SEli Cohen bfregi->count[bfregn]++; 582e126ba97SEli Cohen } 5832f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 584e126ba97SEli Cohen 5852f5ff264SEli Cohen return bfregn; 586e126ba97SEli Cohen } 587e126ba97SEli Cohen 5884ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 589e126ba97SEli Cohen { 5902f5ff264SEli Cohen mutex_lock(&bfregi->lock); 591b037c29aSEli Cohen bfregi->count[bfregn]--; 5922f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 593e126ba97SEli Cohen } 594e126ba97SEli Cohen 595e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 596e126ba97SEli Cohen { 597e126ba97SEli Cohen switch (state) { 598e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 599e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 600e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 601e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 602e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 603e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 604e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 605e126ba97SEli Cohen default: return -1; 606e126ba97SEli Cohen } 607e126ba97SEli Cohen } 608e126ba97SEli Cohen 609e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 610e126ba97SEli Cohen { 611e126ba97SEli Cohen switch (type) { 612e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 613e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 614e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 615e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 616e126ba97SEli Cohen case IB_QPT_XRC_INI: 617e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 618e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 619d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 620c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 621e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 622e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6230fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 624e126ba97SEli Cohen case IB_QPT_MAX: 625e126ba97SEli Cohen default: return -EINVAL; 626e126ba97SEli Cohen } 627e126ba97SEli Cohen } 628e126ba97SEli Cohen 62989ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 63089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63189ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 63289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63389ea94a7SMaor Gottlieb 6347c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 63505f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 6361ee47ab3SYishai Hadas bool dyn_bfreg) 637e126ba97SEli Cohen { 63805f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 63905f58cebSLeon Romanovsky u32 index_of_sys_page; 64005f58cebSLeon Romanovsky u32 offset; 641b037c29aSEli Cohen 642b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 643b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 644b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 645b037c29aSEli Cohen 64605f58cebSLeon Romanovsky if (dyn_bfreg) { 64705f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 64805f58cebSLeon Romanovsky 6497c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 6507c043e90SYishai Hadas return -EINVAL; 6517c043e90SYishai Hadas 6521ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6531ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6541ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6551ee47ab3SYishai Hadas return -EINVAL; 6561ee47ab3SYishai Hadas } 6571ee47ab3SYishai Hadas } 658b037c29aSEli Cohen 6591ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 660b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 661e126ba97SEli Cohen } 662e126ba97SEli Cohen 66319098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 66419098df2Smajd@mellanox.com struct ib_pd *pd, 66519098df2Smajd@mellanox.com unsigned long addr, size_t size, 66619098df2Smajd@mellanox.com struct ib_umem **umem, 66719098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66819098df2Smajd@mellanox.com u32 *offset) 66919098df2Smajd@mellanox.com { 67019098df2Smajd@mellanox.com int err; 67119098df2Smajd@mellanox.com 67219098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 67319098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 67419098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 67519098df2Smajd@mellanox.com return PTR_ERR(*umem); 67619098df2Smajd@mellanox.com } 67719098df2Smajd@mellanox.com 678762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67919098df2Smajd@mellanox.com 68019098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 68119098df2Smajd@mellanox.com if (err) { 68219098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 68319098df2Smajd@mellanox.com goto err_umem; 68419098df2Smajd@mellanox.com } 68519098df2Smajd@mellanox.com 68619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68719098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68819098df2Smajd@mellanox.com 68919098df2Smajd@mellanox.com return 0; 69019098df2Smajd@mellanox.com 69119098df2Smajd@mellanox.com err_umem: 69219098df2Smajd@mellanox.com ib_umem_release(*umem); 69319098df2Smajd@mellanox.com *umem = NULL; 69419098df2Smajd@mellanox.com 69519098df2Smajd@mellanox.com return err; 69619098df2Smajd@mellanox.com } 69719098df2Smajd@mellanox.com 698fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 699fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 70079b20a6cSYishai Hadas { 70179b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70279b20a6cSYishai Hadas 703fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 704fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 705fe248c3aSMaor Gottlieb 70679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70779b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70879b20a6cSYishai Hadas if (rwq->umem) 70979b20a6cSYishai Hadas ib_umem_release(rwq->umem); 71079b20a6cSYishai Hadas } 71179b20a6cSYishai Hadas 71279b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 71379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 71479b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 71579b20a6cSYishai Hadas { 71679b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71779b20a6cSYishai Hadas int page_shift = 0; 71879b20a6cSYishai Hadas int npages; 71979b20a6cSYishai Hadas u32 offset = 0; 72079b20a6cSYishai Hadas int ncont = 0; 72179b20a6cSYishai Hadas int err; 72279b20a6cSYishai Hadas 72379b20a6cSYishai Hadas if (!ucmd->buf_addr) 72479b20a6cSYishai Hadas return -EINVAL; 72579b20a6cSYishai Hadas 72679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72779b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72879b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72979b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 73079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 73179b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 73279b20a6cSYishai Hadas return err; 73379b20a6cSYishai Hadas } 73479b20a6cSYishai Hadas 735762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 73679b20a6cSYishai Hadas &ncont, NULL); 73779b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73879b20a6cSYishai Hadas &rwq->rq_page_offset); 73979b20a6cSYishai Hadas if (err) { 74079b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 74179b20a6cSYishai Hadas goto err_umem; 74279b20a6cSYishai Hadas } 74379b20a6cSYishai Hadas 74479b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 74579b20a6cSYishai Hadas rwq->page_shift = page_shift; 74679b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74779b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74879b20a6cSYishai Hadas 74979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 75079b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 75179b20a6cSYishai Hadas npages, page_shift, ncont, offset); 75279b20a6cSYishai Hadas 75379b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 75479b20a6cSYishai Hadas if (err) { 75579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 75679b20a6cSYishai Hadas goto err_umem; 75779b20a6cSYishai Hadas } 75879b20a6cSYishai Hadas 75979b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 76079b20a6cSYishai Hadas return 0; 76179b20a6cSYishai Hadas 76279b20a6cSYishai Hadas err_umem: 76379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 76479b20a6cSYishai Hadas return err; 76579b20a6cSYishai Hadas } 76679b20a6cSYishai Hadas 767b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 768b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 769b037c29aSEli Cohen { 770b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 771b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 772b037c29aSEli Cohen } 773b037c29aSEli Cohen 774e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 775e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7760fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77709a7d9ecSSaeed Mahameed u32 **in, 77819098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 780e126ba97SEli Cohen { 781e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 782e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 78319098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7849e9c47d0SEli Cohen int page_shift = 0; 7851ee47ab3SYishai Hadas int uar_index = 0; 786e126ba97SEli Cohen int npages; 7879e9c47d0SEli Cohen u32 offset = 0; 7882f5ff264SEli Cohen int bfregn; 7899e9c47d0SEli Cohen int ncont = 0; 79009a7d9ecSSaeed Mahameed __be64 *pas; 79109a7d9ecSSaeed Mahameed void *qpc; 792e126ba97SEli Cohen int err; 793e126ba97SEli Cohen 794e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 795e126ba97SEli Cohen if (err) { 796e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 797e126ba97SEli Cohen return err; 798e126ba97SEli Cohen } 799e126ba97SEli Cohen 800e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 8011ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8021ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8031ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8041ee47ab3SYishai Hadas if (uar_index < 0) 8051ee47ab3SYishai Hadas return uar_index; 8061ee47ab3SYishai Hadas 8071ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8081ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 809e126ba97SEli Cohen /* 810e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 811e126ba97SEli Cohen */ 812051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8132f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8141ee47ab3SYishai Hadas } 815051f2630SLeon Romanovsky else { 816ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 817ffaf58deSLeon Romanovsky if (bfregn < 0) 8182f5ff264SEli Cohen return bfregn; 819e126ba97SEli Cohen } 820e126ba97SEli Cohen 8212f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8221ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8231ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8241ee47ab3SYishai Hadas false); 825e126ba97SEli Cohen 82648fea837SHaggai Eran qp->rq.offset = 0; 82748fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 82848fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 82948fea837SHaggai Eran 8300fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 831e126ba97SEli Cohen if (err) 8322f5ff264SEli Cohen goto err_bfreg; 833e126ba97SEli Cohen 83419098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 83519098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 83619098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 83719098df2Smajd@mellanox.com ubuffer->buf_size, 83819098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 83919098df2Smajd@mellanox.com &ncont, &offset); 84019098df2Smajd@mellanox.com if (err) 8412f5ff264SEli Cohen goto err_bfreg; 8429e9c47d0SEli Cohen } else { 84319098df2Smajd@mellanox.com ubuffer->umem = NULL; 8449e9c47d0SEli Cohen } 845e126ba97SEli Cohen 84609a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 84709a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8481b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 849e126ba97SEli Cohen if (!*in) { 850e126ba97SEli Cohen err = -ENOMEM; 851e126ba97SEli Cohen goto err_umem; 852e126ba97SEli Cohen } 853e126ba97SEli Cohen 854991d2198SYishai Hadas MLX5_SET(create_qp_in, *in, uid, to_mpd(pd)->uid); 85509a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 85609a7d9ecSSaeed Mahameed if (ubuffer->umem) 85709a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 85809a7d9ecSSaeed Mahameed 85909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86009a7d9ecSSaeed Mahameed 86109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86309a7d9ecSSaeed Mahameed 86409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8651ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 866b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8671ee47ab3SYishai Hadas else 8681ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8692f5ff264SEli Cohen qp->bfregn = bfregn; 870e126ba97SEli Cohen 871e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 872e126ba97SEli Cohen if (err) { 873e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 874e126ba97SEli Cohen goto err_free; 875e126ba97SEli Cohen } 876e126ba97SEli Cohen 87741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 878e126ba97SEli Cohen if (err) { 879e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 880e126ba97SEli Cohen goto err_unmap; 881e126ba97SEli Cohen } 882e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 883e126ba97SEli Cohen 884e126ba97SEli Cohen return 0; 885e126ba97SEli Cohen 886e126ba97SEli Cohen err_unmap: 887e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 888e126ba97SEli Cohen 889e126ba97SEli Cohen err_free: 890479163f4SAl Viro kvfree(*in); 891e126ba97SEli Cohen 892e126ba97SEli Cohen err_umem: 89319098df2Smajd@mellanox.com if (ubuffer->umem) 89419098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 895e126ba97SEli Cohen 8962f5ff264SEli Cohen err_bfreg: 8971ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8984ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 899e126ba97SEli Cohen return err; 900e126ba97SEli Cohen } 901e126ba97SEli Cohen 902b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 903b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 904e126ba97SEli Cohen { 905e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 906e126ba97SEli Cohen 907e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 908e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 90919098df2Smajd@mellanox.com if (base->ubuffer.umem) 91019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9111ee47ab3SYishai Hadas 9121ee47ab3SYishai Hadas /* 9131ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9141ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9151ee47ab3SYishai Hadas */ 9161ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9174ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 918e126ba97SEli Cohen } 919e126ba97SEli Cohen 920e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 921e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 922e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 92419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 925e126ba97SEli Cohen { 926e126ba97SEli Cohen int uar_index; 92709a7d9ecSSaeed Mahameed void *qpc; 928e126ba97SEli Cohen int err; 929e126ba97SEli Cohen 930f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 931f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 932b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 934b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9351a4c3a3dSEli Cohen return -EINVAL; 936e126ba97SEli Cohen 937e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9385fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9395fe9dec0SEli Cohen else 9405fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 941e126ba97SEli Cohen 942d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 943d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 944d8030b0dSEli Cohen */ 945d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9465fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 947e126ba97SEli Cohen 948e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 949e126ba97SEli Cohen if (err < 0) { 950e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9515fe9dec0SEli Cohen return err; 952e126ba97SEli Cohen } 953e126ba97SEli Cohen 954e126ba97SEli Cohen qp->rq.offset = 0; 955e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 95619098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 957e126ba97SEli Cohen 95819098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 959e126ba97SEli Cohen if (err) { 960e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9615fe9dec0SEli Cohen return err; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 964e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 96509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 96609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9671b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 968e126ba97SEli Cohen if (!*in) { 969e126ba97SEli Cohen err = -ENOMEM; 970e126ba97SEli Cohen goto err_buf; 971e126ba97SEli Cohen } 97209a7d9ecSSaeed Mahameed 97309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 97409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 97509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 97609a7d9ecSSaeed Mahameed 977e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 97809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 97909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 980e126ba97SEli Cohen 981b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 983b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 984b11a4f9cSHaggai Eran } 985b11a4f9cSHaggai Eran 98609a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 98709a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 988e126ba97SEli Cohen 9899603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 990e126ba97SEli Cohen if (err) { 991e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 992e126ba97SEli Cohen goto err_free; 993e126ba97SEli Cohen } 994e126ba97SEli Cohen 995b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 996b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 997b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 998b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 999b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1000b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1001b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1002b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1003b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1004b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1005e126ba97SEli Cohen 1006e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1007e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1008e126ba97SEli Cohen err = -ENOMEM; 1009e126ba97SEli Cohen goto err_wrid; 1010e126ba97SEli Cohen } 1011e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1012e126ba97SEli Cohen 1013e126ba97SEli Cohen return 0; 1014e126ba97SEli Cohen 1015e126ba97SEli Cohen err_wrid: 1016b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1017b5883008SLi Dongyang kvfree(qp->sq.w_list); 1018b5883008SLi Dongyang kvfree(qp->sq.wrid); 1019b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1020b5883008SLi Dongyang kvfree(qp->rq.wrid); 1021f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1022e126ba97SEli Cohen 1023e126ba97SEli Cohen err_free: 1024479163f4SAl Viro kvfree(*in); 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen err_buf: 10279603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1028e126ba97SEli Cohen return err; 1029e126ba97SEli Cohen } 1030e126ba97SEli Cohen 1031e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1032e126ba97SEli Cohen { 1033b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1034b5883008SLi Dongyang kvfree(qp->sq.w_list); 1035b5883008SLi Dongyang kvfree(qp->sq.wrid); 1036b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1037b5883008SLi Dongyang kvfree(qp->rq.wrid); 1038f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10399603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1040e126ba97SEli Cohen } 1041e126ba97SEli Cohen 104209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1043e126ba97SEli Cohen { 1044e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1045c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1046e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 104709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1048e126ba97SEli Cohen else if (!qp->has_rq) 104909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1050e126ba97SEli Cohen else 105109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1052e126ba97SEli Cohen } 1053e126ba97SEli Cohen 1054e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1055e126ba97SEli Cohen { 10565d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 10575d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1058e126ba97SEli Cohen return 1; 1059e126ba97SEli Cohen 1060e126ba97SEli Cohen return 0; 1061e126ba97SEli Cohen } 1062e126ba97SEli Cohen 10630fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1064c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10651cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 10661cd6dbd3SYishai Hadas struct ib_pd *pd) 10670fb2ed66Smajd@mellanox.com { 1068c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10690fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10700fb2ed66Smajd@mellanox.com 10711cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 10720fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1073c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1074c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1075c2e53b2cSYishai Hadas 10760fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10770fb2ed66Smajd@mellanox.com } 10780fb2ed66Smajd@mellanox.com 10790fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10801cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 10810fb2ed66Smajd@mellanox.com { 10821cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 10830fb2ed66Smajd@mellanox.com } 10840fb2ed66Smajd@mellanox.com 1085b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1086b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1087b96c9ddeSMark Bloch { 1088b96c9ddeSMark Bloch if (sq->flow_rule) 1089b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1090b96c9ddeSMark Bloch } 1091b96c9ddeSMark Bloch 10920fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10930fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10940fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10950fb2ed66Smajd@mellanox.com { 10960fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10970fb2ed66Smajd@mellanox.com __be64 *pas; 10980fb2ed66Smajd@mellanox.com void *in; 10990fb2ed66Smajd@mellanox.com void *sqc; 11000fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11010fb2ed66Smajd@mellanox.com void *wq; 11020fb2ed66Smajd@mellanox.com int inlen; 11030fb2ed66Smajd@mellanox.com int err; 11040fb2ed66Smajd@mellanox.com int page_shift = 0; 11050fb2ed66Smajd@mellanox.com int npages; 11060fb2ed66Smajd@mellanox.com int ncont = 0; 11070fb2ed66Smajd@mellanox.com u32 offset = 0; 11080fb2ed66Smajd@mellanox.com 11090fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11100fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11110fb2ed66Smajd@mellanox.com &ncont, &offset); 11120fb2ed66Smajd@mellanox.com if (err) 11130fb2ed66Smajd@mellanox.com return err; 11140fb2ed66Smajd@mellanox.com 11150fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11170fb2ed66Smajd@mellanox.com if (!in) { 11180fb2ed66Smajd@mellanox.com err = -ENOMEM; 11190fb2ed66Smajd@mellanox.com goto err_umem; 11200fb2ed66Smajd@mellanox.com } 11210fb2ed66Smajd@mellanox.com 1122c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 11230fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11240fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1125795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1126795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11270fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11280fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11290fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11310fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113296dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113396dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 113496dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11350fb2ed66Smajd@mellanox.com 11360fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11400fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11420fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11450fb2ed66Smajd@mellanox.com 11460fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11470fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11480fb2ed66Smajd@mellanox.com 11490fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11500fb2ed66Smajd@mellanox.com 11510fb2ed66Smajd@mellanox.com kvfree(in); 11520fb2ed66Smajd@mellanox.com 11530fb2ed66Smajd@mellanox.com if (err) 11540fb2ed66Smajd@mellanox.com goto err_umem; 11550fb2ed66Smajd@mellanox.com 1156b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1157b96c9ddeSMark Bloch if (err) 1158b96c9ddeSMark Bloch goto err_flow; 1159b96c9ddeSMark Bloch 11600fb2ed66Smajd@mellanox.com return 0; 11610fb2ed66Smajd@mellanox.com 1162b96c9ddeSMark Bloch err_flow: 1163b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1164b96c9ddeSMark Bloch 11650fb2ed66Smajd@mellanox.com err_umem: 11660fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11670fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11680fb2ed66Smajd@mellanox.com 11690fb2ed66Smajd@mellanox.com return err; 11700fb2ed66Smajd@mellanox.com } 11710fb2ed66Smajd@mellanox.com 11720fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11730fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11740fb2ed66Smajd@mellanox.com { 1175b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11760fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11770fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11780fb2ed66Smajd@mellanox.com } 11790fb2ed66Smajd@mellanox.com 11802c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11810fb2ed66Smajd@mellanox.com { 11820fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11830fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11840fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11850fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11860fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11870fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11880fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11890fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11900fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11910fb2ed66Smajd@mellanox.com 11920fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11930fb2ed66Smajd@mellanox.com } 11940fb2ed66Smajd@mellanox.com 11950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11962c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 119734d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 11980fb2ed66Smajd@mellanox.com { 1199358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12000fb2ed66Smajd@mellanox.com __be64 *pas; 12010fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12020fb2ed66Smajd@mellanox.com void *in; 12030fb2ed66Smajd@mellanox.com void *rqc; 12040fb2ed66Smajd@mellanox.com void *wq; 12050fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12062c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12072c292dbbSBoris Pismenny size_t inlen; 12080fb2ed66Smajd@mellanox.com int err; 12092c292dbbSBoris Pismenny 12102c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12112c292dbbSBoris Pismenny return -EINVAL; 12120fb2ed66Smajd@mellanox.com 12130fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12141b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12150fb2ed66Smajd@mellanox.com if (!in) 12160fb2ed66Smajd@mellanox.com return -ENOMEM; 12170fb2ed66Smajd@mellanox.com 121834d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 12190fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1220e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12210fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12220fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12230fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12240fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12250fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12260fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12270fb2ed66Smajd@mellanox.com 1228358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1229358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1230358e42eaSMajd Dibbiny 12310fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12320fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1233b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1234b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12350fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12360fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12370fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12410fb2ed66Smajd@mellanox.com 12420fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12430fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12440fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12450fb2ed66Smajd@mellanox.com 12460fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12470fb2ed66Smajd@mellanox.com 12480fb2ed66Smajd@mellanox.com kvfree(in); 12490fb2ed66Smajd@mellanox.com 12500fb2ed66Smajd@mellanox.com return err; 12510fb2ed66Smajd@mellanox.com } 12520fb2ed66Smajd@mellanox.com 12530fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12540fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12550fb2ed66Smajd@mellanox.com { 12560fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12570fb2ed66Smajd@mellanox.com } 12580fb2ed66Smajd@mellanox.com 1259f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1260f95ef6cbSMaor Gottlieb { 1261f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1262f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1263f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1264f95ef6cbSMaor Gottlieb } 1265f95ef6cbSMaor Gottlieb 12660042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12670042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1268443c1cf9SYishai Hadas u32 qp_flags_en, 1269443c1cf9SYishai Hadas struct ib_pd *pd) 12700042f9e4SMark Bloch { 12710042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 12720042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 12730042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1274443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 12750042f9e4SMark Bloch } 12760042f9e4SMark Bloch 12770fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1278f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1279443c1cf9SYishai Hadas u32 *qp_flags_en, 1280443c1cf9SYishai Hadas struct ib_pd *pd) 12810fb2ed66Smajd@mellanox.com { 1282175edba8SMark Bloch u8 lb_flag = 0; 12830fb2ed66Smajd@mellanox.com u32 *in; 12840fb2ed66Smajd@mellanox.com void *tirc; 12850fb2ed66Smajd@mellanox.com int inlen; 12860fb2ed66Smajd@mellanox.com int err; 12870fb2ed66Smajd@mellanox.com 12880fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12891b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12900fb2ed66Smajd@mellanox.com if (!in) 12910fb2ed66Smajd@mellanox.com return -ENOMEM; 12920fb2ed66Smajd@mellanox.com 1293443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 12940fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12950fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12960fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12970fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1298175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1299f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 13000fb2ed66Smajd@mellanox.com 1301175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1302175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1303175edba8SMark Bloch 1304175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1305175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1306175edba8SMark Bloch 1307175edba8SMark Bloch if (dev->rep) { 1308175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1309175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1310175edba8SMark Bloch } 1311175edba8SMark Bloch 1312175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1313ec9c2fb8SMark Bloch 13140fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 13150fb2ed66Smajd@mellanox.com 13160042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 13170042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 13180042f9e4SMark Bloch 13190042f9e4SMark Bloch if (err) 1320443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 13210042f9e4SMark Bloch } 13220fb2ed66Smajd@mellanox.com kvfree(in); 13230fb2ed66Smajd@mellanox.com 13240fb2ed66Smajd@mellanox.com return err; 13250fb2ed66Smajd@mellanox.com } 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13282c292dbbSBoris Pismenny u32 *in, size_t inlen, 13297f72052cSYishai Hadas struct ib_pd *pd, 13307f72052cSYishai Hadas struct ib_udata *udata, 13317f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 13320fb2ed66Smajd@mellanox.com { 13330fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13340fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13350fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13360fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13370fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13380fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13390fb2ed66Smajd@mellanox.com int err; 13400fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13417f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 13420fb2ed66Smajd@mellanox.com 13430fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13441cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 13450fb2ed66Smajd@mellanox.com if (err) 13460fb2ed66Smajd@mellanox.com return err; 13470fb2ed66Smajd@mellanox.com 13480fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13490fb2ed66Smajd@mellanox.com if (err) 13500fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13510fb2ed66Smajd@mellanox.com 13527f72052cSYishai Hadas if (uid) { 13537f72052cSYishai Hadas resp->tisn = sq->tisn; 13547f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 13557f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 13567f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 13577f72052cSYishai Hadas } 13587f72052cSYishai Hadas 13590fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13601d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13610fb2ed66Smajd@mellanox.com } 13620fb2ed66Smajd@mellanox.com 13630fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1364358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1365358e42eaSMajd Dibbiny 1366e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1367e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1368b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1369b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 137034d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 13710fb2ed66Smajd@mellanox.com if (err) 13720fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13730fb2ed66Smajd@mellanox.com 1374443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 13750fb2ed66Smajd@mellanox.com if (err) 13760fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13777f72052cSYishai Hadas 13787f72052cSYishai Hadas if (uid) { 13797f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 13807f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 13817f72052cSYishai Hadas resp->tirn = rq->tirn; 13827f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 13837f72052cSYishai Hadas } 13840fb2ed66Smajd@mellanox.com } 13850fb2ed66Smajd@mellanox.com 13860fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13870fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13887f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 13897f72052cSYishai Hadas if (err) 13907f72052cSYishai Hadas goto err_destroy_tir; 13910fb2ed66Smajd@mellanox.com 13920fb2ed66Smajd@mellanox.com return 0; 13930fb2ed66Smajd@mellanox.com 13947f72052cSYishai Hadas err_destroy_tir: 13957f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 13960fb2ed66Smajd@mellanox.com err_destroy_rq: 13970fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13980fb2ed66Smajd@mellanox.com err_destroy_sq: 13990fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 14000fb2ed66Smajd@mellanox.com return err; 14010fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14020fb2ed66Smajd@mellanox.com err_destroy_tis: 14031cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 14040fb2ed66Smajd@mellanox.com 14050fb2ed66Smajd@mellanox.com return err; 14060fb2ed66Smajd@mellanox.com } 14070fb2ed66Smajd@mellanox.com 14080fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 14090fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 14100fb2ed66Smajd@mellanox.com { 14110fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14120fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14130fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14140fb2ed66Smajd@mellanox.com 14150fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1416443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 14170fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 14180fb2ed66Smajd@mellanox.com } 14190fb2ed66Smajd@mellanox.com 14200fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14210fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14221cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 14230fb2ed66Smajd@mellanox.com } 14240fb2ed66Smajd@mellanox.com } 14250fb2ed66Smajd@mellanox.com 14260fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 14270fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 14280fb2ed66Smajd@mellanox.com { 14290fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14300fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14310fb2ed66Smajd@mellanox.com 14320fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 14330fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 14340fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 14350fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 14360fb2ed66Smajd@mellanox.com } 14370fb2ed66Smajd@mellanox.com 143828d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 143928d61370SYishai Hadas { 14400042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14410042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14420042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1443443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1444443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 144528d61370SYishai Hadas } 144628d61370SYishai Hadas 144728d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 144828d61370SYishai Hadas struct ib_pd *pd, 144928d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 145028d61370SYishai Hadas struct ib_udata *udata) 145128d61370SYishai Hadas { 145228d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 145328d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 145428d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 145528d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 145628d61370SYishai Hadas int inlen; 145728d61370SYishai Hadas int err; 145828d61370SYishai Hadas u32 *in; 145928d61370SYishai Hadas void *tirc; 146028d61370SYishai Hadas void *hfso; 146128d61370SYishai Hadas u32 selected_fields = 0; 14622d93fc85SMatan Barak u32 outer_l4; 146328d61370SYishai Hadas size_t min_resp_len; 146428d61370SYishai Hadas u32 tdn = mucontext->tdn; 146528d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 146628d61370SYishai Hadas size_t required_cmd_sz; 1467175edba8SMark Bloch u8 lb_flag = 0; 146828d61370SYishai Hadas 146928d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 147028d61370SYishai Hadas return -EOPNOTSUPP; 147128d61370SYishai Hadas 147228d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 147328d61370SYishai Hadas return -EINVAL; 147428d61370SYishai Hadas 14752f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 147628d61370SYishai Hadas if (udata->outlen < min_resp_len) 147728d61370SYishai Hadas return -EINVAL; 147828d61370SYishai Hadas 1479f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 148028d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 148128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 148228d61370SYishai Hadas return -EINVAL; 148328d61370SYishai Hadas } 148428d61370SYishai Hadas 148528d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 148628d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 148728d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 148828d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 148928d61370SYishai Hadas return -EOPNOTSUPP; 149028d61370SYishai Hadas } 149128d61370SYishai Hadas 149228d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 149328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 149428d61370SYishai Hadas return -EFAULT; 149528d61370SYishai Hadas } 149628d61370SYishai Hadas 149728d61370SYishai Hadas if (ucmd.comp_mask) { 149828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 149928d61370SYishai Hadas return -EOPNOTSUPP; 150028d61370SYishai Hadas } 150128d61370SYishai Hadas 1502175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1503175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1504175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1505f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1506f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1507f95ef6cbSMaor Gottlieb } 1508f95ef6cbSMaor Gottlieb 1509f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1510f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1511f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 151228d61370SYishai Hadas return -EOPNOTSUPP; 151328d61370SYishai Hadas } 151428d61370SYishai Hadas 1515309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1516309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1517309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1518309fa347SMaor Gottlieb return -EOPNOTSUPP; 1519309fa347SMaor Gottlieb } 1520309fa347SMaor Gottlieb 1521175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1522175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1523175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1524175edba8SMark Bloch } 1525175edba8SMark Bloch 1526175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1527175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1528175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1529175edba8SMark Bloch } 1530175edba8SMark Bloch 153141d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 153228d61370SYishai Hadas if (err) { 153328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 153428d61370SYishai Hadas return -EINVAL; 153528d61370SYishai Hadas } 153628d61370SYishai Hadas 153728d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 15381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 153928d61370SYishai Hadas if (!in) 154028d61370SYishai Hadas return -ENOMEM; 154128d61370SYishai Hadas 1542443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 154328d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 154428d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 154528d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 154628d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 154728d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 154828d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 154928d61370SYishai Hadas 155028d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1551f95ef6cbSMaor Gottlieb 1552f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1553f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1554f95ef6cbSMaor Gottlieb 1555175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1556175edba8SMark Bloch 1557309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1558309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1559309fa347SMaor Gottlieb else 1560309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1561309fa347SMaor Gottlieb 156228d61370SYishai Hadas switch (ucmd.rx_hash_function) { 156328d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 156428d61370SYishai Hadas { 156528d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 156628d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 156728d61370SYishai Hadas 156828d61370SYishai Hadas if (len != ucmd.rx_key_len) { 156928d61370SYishai Hadas err = -EINVAL; 157028d61370SYishai Hadas goto err; 157128d61370SYishai Hadas } 157228d61370SYishai Hadas 157328d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 157428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 157528d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 157628d61370SYishai Hadas break; 157728d61370SYishai Hadas } 157828d61370SYishai Hadas default: 157928d61370SYishai Hadas err = -EOPNOTSUPP; 158028d61370SYishai Hadas goto err; 158128d61370SYishai Hadas } 158228d61370SYishai Hadas 158328d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 158428d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 158528d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 158628d61370SYishai Hadas goto create_tir; 158728d61370SYishai Hadas err = -EINVAL; 158828d61370SYishai Hadas goto err; 158928d61370SYishai Hadas } 159028d61370SYishai Hadas 159128d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 159228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 159328d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 159428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 159528d61370SYishai Hadas err = -EINVAL; 159628d61370SYishai Hadas goto err; 159728d61370SYishai Hadas } 159828d61370SYishai Hadas 159928d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 160028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 160128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 160228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 160328d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 160428d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 160528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 160628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 160728d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 160828d61370SYishai Hadas 16092d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 16102d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 161128d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 16122d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 16132d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 16142d93fc85SMatan Barak 16152d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 16162d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 161728d61370SYishai Hadas err = -EINVAL; 161828d61370SYishai Hadas goto err; 161928d61370SYishai Hadas } 162028d61370SYishai Hadas 162128d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 162228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 162328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 162428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 162528d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 162628d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 162728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 162828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 162928d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 163028d61370SYishai Hadas 163128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 163228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 163328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 163428d61370SYishai Hadas 163528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 163628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 163728d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 163828d61370SYishai Hadas 163928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 164028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 164128d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 164228d61370SYishai Hadas 164328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 164428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 164528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 164628d61370SYishai Hadas 16472d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 16482d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 16492d93fc85SMatan Barak 165028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 165128d61370SYishai Hadas 165228d61370SYishai Hadas create_tir: 165328d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 165428d61370SYishai Hadas 16550042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 16560042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 16570042f9e4SMark Bloch 16580042f9e4SMark Bloch if (err) 1659443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1660443c1cf9SYishai Hadas to_mpd(pd)->uid); 16610042f9e4SMark Bloch } 16620042f9e4SMark Bloch 166328d61370SYishai Hadas if (err) 166428d61370SYishai Hadas goto err; 166528d61370SYishai Hadas 16667f72052cSYishai Hadas if (mucontext->devx_uid) { 16677f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 16687f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 16697f72052cSYishai Hadas } 16707f72052cSYishai Hadas 16717f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 16727f72052cSYishai Hadas if (err) 16737f72052cSYishai Hadas goto err_copy; 16747f72052cSYishai Hadas 167528d61370SYishai Hadas kvfree(in); 167628d61370SYishai Hadas /* qpn is reserved for that QP */ 167728d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1678d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 167928d61370SYishai Hadas return 0; 168028d61370SYishai Hadas 16817f72052cSYishai Hadas err_copy: 16827f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 168328d61370SYishai Hadas err: 168428d61370SYishai Hadas kvfree(in); 168528d61370SYishai Hadas return err; 168628d61370SYishai Hadas } 168728d61370SYishai Hadas 16885d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 16895d6ff1baSYonatan Cohen void *qpc) 16905d6ff1baSYonatan Cohen { 16915d6ff1baSYonatan Cohen int rcqe_sz; 16925d6ff1baSYonatan Cohen 16935d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 16945d6ff1baSYonatan Cohen return; 16955d6ff1baSYonatan Cohen 16965d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 16975d6ff1baSYonatan Cohen 16985d6ff1baSYonatan Cohen if (rcqe_sz == 128) { 16995d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 17005d6ff1baSYonatan Cohen return; 17015d6ff1baSYonatan Cohen } 17025d6ff1baSYonatan Cohen 17035d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCT) 17045d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 17055d6ff1baSYonatan Cohen } 17065d6ff1baSYonatan Cohen 17075d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 17085d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 17096f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 17105d6ff1baSYonatan Cohen void *qpc) 17115d6ff1baSYonatan Cohen { 17125d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 17135d6ff1baSYonatan Cohen int scqe_sz; 17146f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 17155d6ff1baSYonatan Cohen 17165d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 17175d6ff1baSYonatan Cohen return; 17185d6ff1baSYonatan Cohen 17196f4bc0eaSYonatan Cohen if (ucmd) 17206f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 17216f4bc0eaSYonatan Cohen 17226f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 17235d6ff1baSYonatan Cohen return; 17245d6ff1baSYonatan Cohen 17255d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 17265d6ff1baSYonatan Cohen if (scqe_sz == 128) { 17275d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 17285d6ff1baSYonatan Cohen return; 17295d6ff1baSYonatan Cohen } 17305d6ff1baSYonatan Cohen 17315d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 17325d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 17335d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 17345d6ff1baSYonatan Cohen } 17355d6ff1baSYonatan Cohen 17362e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 17372e43bb31SYonatan Cohen { 17382e43bb31SYonatan Cohen return (input & ~supported) == 0; 17392e43bb31SYonatan Cohen } 17402e43bb31SYonatan Cohen 1741e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1742e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1743e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1744e126ba97SEli Cohen { 1745e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 174609a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1747938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 17480625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 174989ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 175089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 175189ea94a7SMaor Gottlieb unsigned long flags; 1752cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 175309a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 175409a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1755e7b169f3SNoa Osherovich int mlx5_st; 1756cfb5e088SHaggai Abramovsky void *qpc; 175709a7d9ecSSaeed Mahameed u32 *in; 175809a7d9ecSSaeed Mahameed int err; 1759e126ba97SEli Cohen 1760e126ba97SEli Cohen mutex_init(&qp->mutex); 1761e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1762e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1763e126ba97SEli Cohen 1764e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1765e7b169f3SNoa Osherovich if (mlx5_st < 0) 1766e7b169f3SNoa Osherovich return -EINVAL; 1767e7b169f3SNoa Osherovich 176828d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 176928d61370SYishai Hadas if (!udata) 177028d61370SYishai Hadas return -ENOSYS; 177128d61370SYishai Hadas 177228d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 177328d61370SYishai Hadas return err; 177428d61370SYishai Hadas } 177528d61370SYishai Hadas 1776f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1777938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1778f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1779f360d88aSEli Cohen return -EINVAL; 1780f360d88aSEli Cohen } else { 1781f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1782f360d88aSEli Cohen } 1783f360d88aSEli Cohen } 1784f360d88aSEli Cohen 1785051f2630SLeon Romanovsky if (init_attr->create_flags & 1786051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1787051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1788051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1789051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1790051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1791051f2630SLeon Romanovsky return -EINVAL; 1792051f2630SLeon Romanovsky } 1793051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1794051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1795051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1796051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1797051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1798051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1799051f2630SLeon Romanovsky } 1800f0313965SErez Shitrit 1801f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1802f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1803f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1804f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1805f0313965SErez Shitrit return -EOPNOTSUPP; 1806f0313965SErez Shitrit } 1807f0313965SErez Shitrit 1808358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1809358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1810358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1811358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1812358e42eaSMajd Dibbiny } 1813358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1814358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1815358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1816358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1817358e42eaSMajd Dibbiny } 1818358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1819358e42eaSMajd Dibbiny } 1820358e42eaSMajd Dibbiny 1821e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1822e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1823e126ba97SEli Cohen 1824e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1825e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1826e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1827e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1828e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1829e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1830e4cc4fa7SNoa Osherovich } 1831e4cc4fa7SNoa Osherovich 1832e126ba97SEli Cohen if (pd && pd->uobject) { 1833e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1834e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1835e126ba97SEli Cohen return -EFAULT; 1836e126ba97SEli Cohen } 1837e126ba97SEli Cohen 18382e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 18392e43bb31SYonatan Cohen MLX5_QP_FLAG_SIGNATURE | 18402e43bb31SYonatan Cohen MLX5_QP_FLAG_SCATTER_CQE | 18412e43bb31SYonatan Cohen MLX5_QP_FLAG_TUNNEL_OFFLOADS | 18422e43bb31SYonatan Cohen MLX5_QP_FLAG_BFREG_INDEX | 18432e43bb31SYonatan Cohen MLX5_QP_FLAG_TYPE_DCT | 18446f4bc0eaSYonatan Cohen MLX5_QP_FLAG_TYPE_DCI | 18456f4bc0eaSYonatan Cohen MLX5_QP_FLAG_ALLOW_SCATTER_CQE)) 18462e43bb31SYonatan Cohen return -EINVAL; 18472e43bb31SYonatan Cohen 1848cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1849cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1850cfb5e088SHaggai Abramovsky if (err) 1851cfb5e088SHaggai Abramovsky return err; 1852cfb5e088SHaggai Abramovsky 1853e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 18545d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 1855e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1856f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1857f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1858f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1859f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1860f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1861f95ef6cbSMaor Gottlieb } 1862175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 1863175edba8SMark Bloch } 1864175edba8SMark Bloch 1865175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 1866175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1867175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 1868175edba8SMark Bloch return -EOPNOTSUPP; 1869175edba8SMark Bloch } 1870175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1871175edba8SMark Bloch } 1872175edba8SMark Bloch 1873175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1874175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1875175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 1876175edba8SMark Bloch return -EOPNOTSUPP; 1877175edba8SMark Bloch } 1878175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1879f95ef6cbSMaor Gottlieb } 1880c2e53b2cSYishai Hadas 1881c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1882c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1883c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1884c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1885c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1886c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1887c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1888c2e53b2cSYishai Hadas } 1889c2e53b2cSYishai Hadas 1890c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1891c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1892c2e53b2cSYishai Hadas } 1893e126ba97SEli Cohen } else { 1894e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1895e126ba97SEli Cohen } 1896e126ba97SEli Cohen 1897c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1898c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1899c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1900c2e53b2cSYishai Hadas &qp->trans_qp.base; 1901c2e53b2cSYishai Hadas 1902e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1903e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1904e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1905e126ba97SEli Cohen if (err) { 1906e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1907e126ba97SEli Cohen return err; 1908e126ba97SEli Cohen } 1909e126ba97SEli Cohen 1910e126ba97SEli Cohen if (pd) { 1911e126ba97SEli Cohen if (pd->uobject) { 1912938fe83cSSaeed Mahameed __u32 max_wqes = 1913938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1914e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1915e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1916e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1917e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1918e126ba97SEli Cohen return -EINVAL; 1919e126ba97SEli Cohen } 1920938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1921e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1922938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1923e126ba97SEli Cohen return -EINVAL; 1924e126ba97SEli Cohen } 1925b11a4f9cSHaggai Eran if (init_attr->create_flags & 1926b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1927b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1928b11a4f9cSHaggai Eran return -EINVAL; 1929b11a4f9cSHaggai Eran } 19300fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 19310fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1932e126ba97SEli Cohen if (err) 1933e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1934e126ba97SEli Cohen } else { 193519098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 193619098df2Smajd@mellanox.com base); 1937e126ba97SEli Cohen if (err) 1938e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1939e126ba97SEli Cohen } 1940e126ba97SEli Cohen 1941e126ba97SEli Cohen if (err) 1942e126ba97SEli Cohen return err; 1943e126ba97SEli Cohen } else { 19441b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1945e126ba97SEli Cohen if (!in) 1946e126ba97SEli Cohen return -ENOMEM; 1947e126ba97SEli Cohen 1948e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1949e126ba97SEli Cohen } 1950e126ba97SEli Cohen 1951e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1952e126ba97SEli Cohen qp->port = init_attr->port_num; 1953e126ba97SEli Cohen 195409a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 195509a7d9ecSSaeed Mahameed 1956e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 195709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1958e126ba97SEli Cohen 1959e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 196009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1961e126ba97SEli Cohen else 196209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 196309a7d9ecSSaeed Mahameed 1964e126ba97SEli Cohen 1965e126ba97SEli Cohen if (qp->wq_sig) 196609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1967e126ba97SEli Cohen 1968f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 196909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1970f360d88aSEli Cohen 1971051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 197209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1973051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 197409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1975051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 197609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1977051f2630SLeon Romanovsky 1978e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 19795d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 19806f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 19816f4bc0eaSYonatan Cohen (pd && pd->uobject) ? &ucmd : NULL, 19826f4bc0eaSYonatan Cohen qpc); 1983e126ba97SEli Cohen } 1984e126ba97SEli Cohen 1985e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 198609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 198709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1988e126ba97SEli Cohen } 1989e126ba97SEli Cohen 199009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1991e126ba97SEli Cohen 19923fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 199309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 19943fd3307eSArtemy Kovalyov } else { 199509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 19963fd3307eSArtemy Kovalyov if (init_attr->srq && 19973fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 19983fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 19993fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 20003fd3307eSArtemy Kovalyov } 2001e126ba97SEli Cohen 2002e126ba97SEli Cohen /* Set default resources */ 2003e126ba97SEli Cohen switch (init_attr->qp_type) { 2004e126ba97SEli Cohen case IB_QPT_XRC_TGT: 200509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 200609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 200709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 200809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2009e126ba97SEli Cohen break; 2010e126ba97SEli Cohen case IB_QPT_XRC_INI: 201109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 201209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 201309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2014e126ba97SEli Cohen break; 2015e126ba97SEli Cohen default: 2016e126ba97SEli Cohen if (init_attr->srq) { 201709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 201809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2019e126ba97SEli Cohen } else { 202009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 202109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2022e126ba97SEli Cohen } 2023e126ba97SEli Cohen } 2024e126ba97SEli Cohen 2025e126ba97SEli Cohen if (init_attr->send_cq) 202609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2027e126ba97SEli Cohen 2028e126ba97SEli Cohen if (init_attr->recv_cq) 202909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2030e126ba97SEli Cohen 203109a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2032e126ba97SEli Cohen 2033cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 203409a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2035cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 203609a7d9ecSSaeed Mahameed 2037f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2038f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2039f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2040f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2041f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2042f0313965SErez Shitrit } 2043cfb5e088SHaggai Abramovsky 2044b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2045b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2046b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2047b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2048b1383aa6SNoa Osherovich goto err; 2049b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2050b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2051b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2052b1383aa6SNoa Osherovich } else { 2053b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2054b1383aa6SNoa Osherovich } 2055b1383aa6SNoa Osherovich } 2056b1383aa6SNoa Osherovich 20572c292dbbSBoris Pismenny if (inlen < 0) { 20582c292dbbSBoris Pismenny err = -EINVAL; 20592c292dbbSBoris Pismenny goto err; 20602c292dbbSBoris Pismenny } 20612c292dbbSBoris Pismenny 2062c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2063c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 20640fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 20650fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 20667f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 20677f72052cSYishai Hadas &resp); 20680fb2ed66Smajd@mellanox.com } else { 206919098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 20700fb2ed66Smajd@mellanox.com } 20710fb2ed66Smajd@mellanox.com 2072e126ba97SEli Cohen if (err) { 2073e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2074e126ba97SEli Cohen goto err_create; 2075e126ba97SEli Cohen } 2076e126ba97SEli Cohen 2077479163f4SAl Viro kvfree(in); 2078e126ba97SEli Cohen 207919098df2Smajd@mellanox.com base->container_mibqp = qp; 208019098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2081e126ba97SEli Cohen 208289ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 208389ea94a7SMaor Gottlieb &send_cq, &recv_cq); 208489ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 208589ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 208689ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 208789ea94a7SMaor Gottlieb * flow 208889ea94a7SMaor Gottlieb */ 208989ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 209089ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 209189ea94a7SMaor Gottlieb */ 209289ea94a7SMaor Gottlieb if (send_cq) 209389ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 209489ea94a7SMaor Gottlieb if (recv_cq) 209589ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 209689ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 209789ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 209889ea94a7SMaor Gottlieb 2099e126ba97SEli Cohen return 0; 2100e126ba97SEli Cohen 2101e126ba97SEli Cohen err_create: 2102e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2103b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 2104e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2105e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2106e126ba97SEli Cohen 2107b1383aa6SNoa Osherovich err: 2108479163f4SAl Viro kvfree(in); 2109e126ba97SEli Cohen return err; 2110e126ba97SEli Cohen } 2111e126ba97SEli Cohen 2112e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2113e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2114e126ba97SEli Cohen { 2115e126ba97SEli Cohen if (send_cq) { 2116e126ba97SEli Cohen if (recv_cq) { 2117e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 211889ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2119e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2120e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2121e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 212289ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2123e126ba97SEli Cohen __acquire(&recv_cq->lock); 2124e126ba97SEli Cohen } else { 212589ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2126e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2127e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2128e126ba97SEli Cohen } 2129e126ba97SEli Cohen } else { 213089ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 21316a4f139aSEli Cohen __acquire(&recv_cq->lock); 2132e126ba97SEli Cohen } 2133e126ba97SEli Cohen } else if (recv_cq) { 213489ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 21356a4f139aSEli Cohen __acquire(&send_cq->lock); 21366a4f139aSEli Cohen } else { 21376a4f139aSEli Cohen __acquire(&send_cq->lock); 21386a4f139aSEli Cohen __acquire(&recv_cq->lock); 2139e126ba97SEli Cohen } 2140e126ba97SEli Cohen } 2141e126ba97SEli Cohen 2142e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2143e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2144e126ba97SEli Cohen { 2145e126ba97SEli Cohen if (send_cq) { 2146e126ba97SEli Cohen if (recv_cq) { 2147e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2148e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 214989ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2150e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2151e126ba97SEli Cohen __release(&recv_cq->lock); 215289ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2153e126ba97SEli Cohen } else { 2154e126ba97SEli Cohen spin_unlock(&send_cq->lock); 215589ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2156e126ba97SEli Cohen } 2157e126ba97SEli Cohen } else { 21586a4f139aSEli Cohen __release(&recv_cq->lock); 215989ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2160e126ba97SEli Cohen } 2161e126ba97SEli Cohen } else if (recv_cq) { 21626a4f139aSEli Cohen __release(&send_cq->lock); 216389ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 21646a4f139aSEli Cohen } else { 21656a4f139aSEli Cohen __release(&recv_cq->lock); 21666a4f139aSEli Cohen __release(&send_cq->lock); 2167e126ba97SEli Cohen } 2168e126ba97SEli Cohen } 2169e126ba97SEli Cohen 2170e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2171e126ba97SEli Cohen { 2172e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2173e126ba97SEli Cohen } 2174e126ba97SEli Cohen 217589ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 217689ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2177e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2178e126ba97SEli Cohen { 217989ea94a7SMaor Gottlieb switch (qp_type) { 2180e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2181e126ba97SEli Cohen *send_cq = NULL; 2182e126ba97SEli Cohen *recv_cq = NULL; 2183e126ba97SEli Cohen break; 2184e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2185e126ba97SEli Cohen case IB_QPT_XRC_INI: 218689ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2187e126ba97SEli Cohen *recv_cq = NULL; 2188e126ba97SEli Cohen break; 2189e126ba97SEli Cohen 2190e126ba97SEli Cohen case IB_QPT_SMI: 2191d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2192e126ba97SEli Cohen case IB_QPT_RC: 2193e126ba97SEli Cohen case IB_QPT_UC: 2194e126ba97SEli Cohen case IB_QPT_UD: 2195e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2196e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 21970fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 219889ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 219989ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2200e126ba97SEli Cohen break; 2201e126ba97SEli Cohen 2202e126ba97SEli Cohen case IB_QPT_MAX: 2203e126ba97SEli Cohen default: 2204e126ba97SEli Cohen *send_cq = NULL; 2205e126ba97SEli Cohen *recv_cq = NULL; 2206e126ba97SEli Cohen break; 2207e126ba97SEli Cohen } 2208e126ba97SEli Cohen } 2209e126ba97SEli Cohen 2210ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 221113eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 221213eab21fSAviv Heller u8 lag_tx_affinity); 2213ad5f8e96Smajd@mellanox.com 2214e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2215e126ba97SEli Cohen { 2216e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2217c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 221889ea94a7SMaor Gottlieb unsigned long flags; 2219e126ba97SEli Cohen int err; 2220e126ba97SEli Cohen 222128d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 222228d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 222328d61370SYishai Hadas return; 222428d61370SYishai Hadas } 222528d61370SYishai Hadas 2226c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2227c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 22280fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 22290fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 22300fb2ed66Smajd@mellanox.com 22316aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2232c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2233c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2234ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 22351a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 22361a412fb1SSaeed Mahameed NULL, &base->mqp); 2237ad5f8e96Smajd@mellanox.com } else { 22380680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 22390680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 22400680efa2SAlex Vesker }; 22410680efa2SAlex Vesker 224213eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2243ad5f8e96Smajd@mellanox.com } 2244ad5f8e96Smajd@mellanox.com if (err) 2245427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 224619098df2Smajd@mellanox.com base->mqp.qpn); 22476aec21f6SHaggai Eran } 2248e126ba97SEli Cohen 224989ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 225089ea94a7SMaor Gottlieb &send_cq, &recv_cq); 225189ea94a7SMaor Gottlieb 225289ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 225389ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 225489ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 225589ea94a7SMaor Gottlieb list_del(&qp->qps_list); 225689ea94a7SMaor Gottlieb if (send_cq) 225789ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 225889ea94a7SMaor Gottlieb 225989ea94a7SMaor Gottlieb if (recv_cq) 226089ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2261e126ba97SEli Cohen 2262e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 226319098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2264e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2265e126ba97SEli Cohen if (send_cq != recv_cq) 226619098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 226719098df2Smajd@mellanox.com NULL); 2268e126ba97SEli Cohen } 226989ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 227089ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2271e126ba97SEli Cohen 2272c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2273c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 22740fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 22750fb2ed66Smajd@mellanox.com } else { 227619098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2277e126ba97SEli Cohen if (err) 22780fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 22790fb2ed66Smajd@mellanox.com base->mqp.qpn); 22800fb2ed66Smajd@mellanox.com } 2281e126ba97SEli Cohen 2282e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2283e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2284e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2285b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2286e126ba97SEli Cohen } 2287e126ba97SEli Cohen 2288e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2289e126ba97SEli Cohen { 2290e126ba97SEli Cohen switch (type) { 2291e126ba97SEli Cohen case IB_QPT_SMI: 2292e126ba97SEli Cohen return "IB_QPT_SMI"; 2293e126ba97SEli Cohen case IB_QPT_GSI: 2294e126ba97SEli Cohen return "IB_QPT_GSI"; 2295e126ba97SEli Cohen case IB_QPT_RC: 2296e126ba97SEli Cohen return "IB_QPT_RC"; 2297e126ba97SEli Cohen case IB_QPT_UC: 2298e126ba97SEli Cohen return "IB_QPT_UC"; 2299e126ba97SEli Cohen case IB_QPT_UD: 2300e126ba97SEli Cohen return "IB_QPT_UD"; 2301e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2302e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2303e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2304e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2305e126ba97SEli Cohen case IB_QPT_XRC_INI: 2306e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2307e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2308e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2309e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2310e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2311e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2312e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2313b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2314b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2315e126ba97SEli Cohen case IB_QPT_MAX: 2316e126ba97SEli Cohen default: 2317e126ba97SEli Cohen return "Invalid QP type"; 2318e126ba97SEli Cohen } 2319e126ba97SEli Cohen } 2320e126ba97SEli Cohen 2321b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2322b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2323b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2324b4aaa1f0SMoni Shoua { 2325b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2326b4aaa1f0SMoni Shoua int err = 0; 2327b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2328b4aaa1f0SMoni Shoua void *dctc; 2329b4aaa1f0SMoni Shoua 2330b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2331b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2332b4aaa1f0SMoni Shoua 2333b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2334b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2335b4aaa1f0SMoni Shoua if (err) 2336b4aaa1f0SMoni Shoua return ERR_PTR(err); 2337b4aaa1f0SMoni Shoua 2338b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2339b4aaa1f0SMoni Shoua if (!qp) 2340b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2341b4aaa1f0SMoni Shoua 2342b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2343b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2344b4aaa1f0SMoni Shoua err = -ENOMEM; 2345b4aaa1f0SMoni Shoua goto err_free; 2346b4aaa1f0SMoni Shoua } 2347b4aaa1f0SMoni Shoua 2348a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2349b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2350776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2351b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2352b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2353b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2354b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2355b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2356b4aaa1f0SMoni Shoua 23575d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 23585d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 23595d6ff1baSYonatan Cohen 2360b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2361b4aaa1f0SMoni Shoua 2362b4aaa1f0SMoni Shoua return &qp->ibqp; 2363b4aaa1f0SMoni Shoua err_free: 2364b4aaa1f0SMoni Shoua kfree(qp); 2365b4aaa1f0SMoni Shoua return ERR_PTR(err); 2366b4aaa1f0SMoni Shoua } 2367b4aaa1f0SMoni Shoua 2368b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2369e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2370b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2371b4aaa1f0SMoni Shoua struct ib_udata *udata) 2372b4aaa1f0SMoni Shoua { 2373b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2374b4aaa1f0SMoni Shoua int err; 2375b4aaa1f0SMoni Shoua 2376b4aaa1f0SMoni Shoua if (!udata) 2377b4aaa1f0SMoni Shoua return -EINVAL; 2378b4aaa1f0SMoni Shoua 2379b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2380b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2381b4aaa1f0SMoni Shoua return -EINVAL; 2382b4aaa1f0SMoni Shoua } 2383b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2384b4aaa1f0SMoni Shoua if (err) 2385b4aaa1f0SMoni Shoua return err; 2386b4aaa1f0SMoni Shoua 2387b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2388b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2389b4aaa1f0SMoni Shoua } else { 2390b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2391b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2392b4aaa1f0SMoni Shoua } else { 2393b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2394b4aaa1f0SMoni Shoua return -EINVAL; 2395b4aaa1f0SMoni Shoua } 2396b4aaa1f0SMoni Shoua } 2397b4aaa1f0SMoni Shoua 2398b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2399b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2400b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2401b4aaa1f0SMoni Shoua } 2402b4aaa1f0SMoni Shoua 2403b4aaa1f0SMoni Shoua return 0; 2404b4aaa1f0SMoni Shoua } 2405b4aaa1f0SMoni Shoua 2406b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2407b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2408e126ba97SEli Cohen struct ib_udata *udata) 2409e126ba97SEli Cohen { 2410e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2411e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2412e126ba97SEli Cohen u16 xrcdn = 0; 2413e126ba97SEli Cohen int err; 2414b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2415b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2416e126ba97SEli Cohen 2417e126ba97SEli Cohen if (pd) { 2418e126ba97SEli Cohen dev = to_mdev(pd->device); 24190fb2ed66Smajd@mellanox.com 24200fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 24210fb2ed66Smajd@mellanox.com if (!pd->uobject) { 24220fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 24230fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 24240fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 24250fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 24260fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 24270fb2ed66Smajd@mellanox.com } 24280fb2ed66Smajd@mellanox.com } 242909f16cf5SMajd Dibbiny } else { 243009f16cf5SMajd Dibbiny /* being cautious here */ 243109f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 243209f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 243309f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 243409f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 243509f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 243609f16cf5SMajd Dibbiny } 243709f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2438e126ba97SEli Cohen } 2439e126ba97SEli Cohen 2440b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2441b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2442b4aaa1f0SMoni Shoua 2443b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2444b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2445b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2446b4aaa1f0SMoni Shoua if (err) 2447b4aaa1f0SMoni Shoua return ERR_PTR(err); 2448c32a4f29SMoni Shoua 2449c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2450c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2451c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2452c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2453c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2454c32a4f29SMoni Shoua } 2455776a3906SMoni Shoua } else { 2456776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2457c32a4f29SMoni Shoua } 2458b4aaa1f0SMoni Shoua } 2459b4aaa1f0SMoni Shoua 2460e126ba97SEli Cohen switch (init_attr->qp_type) { 2461e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2462e126ba97SEli Cohen case IB_QPT_XRC_INI: 2463938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2464e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2465e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2466e126ba97SEli Cohen } 2467e126ba97SEli Cohen init_attr->recv_cq = NULL; 2468e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2469e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2470e126ba97SEli Cohen init_attr->send_cq = NULL; 2471e126ba97SEli Cohen } 2472e126ba97SEli Cohen 2473e126ba97SEli Cohen /* fall through */ 24740fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2475e126ba97SEli Cohen case IB_QPT_RC: 2476e126ba97SEli Cohen case IB_QPT_UC: 2477e126ba97SEli Cohen case IB_QPT_UD: 2478e126ba97SEli Cohen case IB_QPT_SMI: 2479d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2480e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2481c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2482e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2483e126ba97SEli Cohen if (!qp) 2484e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2485e126ba97SEli Cohen 2486e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2487e126ba97SEli Cohen if (err) { 2488e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2489e126ba97SEli Cohen kfree(qp); 2490e126ba97SEli Cohen return ERR_PTR(err); 2491e126ba97SEli Cohen } 2492e126ba97SEli Cohen 2493e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2494e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2495e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2496e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2497e126ba97SEli Cohen else 249819098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2499e126ba97SEli Cohen 2500e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 250119098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2502a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2503a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2504e126ba97SEli Cohen 250519098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2506e126ba97SEli Cohen 2507e126ba97SEli Cohen break; 2508e126ba97SEli Cohen 2509d16e91daSHaggai Eran case IB_QPT_GSI: 2510d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2511d16e91daSHaggai Eran 2512e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2513e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2514e126ba97SEli Cohen case IB_QPT_MAX: 2515e126ba97SEli Cohen default: 2516e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2517e126ba97SEli Cohen init_attr->qp_type); 2518e126ba97SEli Cohen /* Don't support raw QPs */ 2519e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2520e126ba97SEli Cohen } 2521e126ba97SEli Cohen 2522b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2523b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2524b4aaa1f0SMoni Shoua 2525e126ba97SEli Cohen return &qp->ibqp; 2526e126ba97SEli Cohen } 2527e126ba97SEli Cohen 2528776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2529776a3906SMoni Shoua { 2530776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2531776a3906SMoni Shoua 2532776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2533776a3906SMoni Shoua int err; 2534776a3906SMoni Shoua 2535776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2536776a3906SMoni Shoua if (err) { 2537776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2538776a3906SMoni Shoua return err; 2539776a3906SMoni Shoua } 2540776a3906SMoni Shoua } 2541776a3906SMoni Shoua 2542776a3906SMoni Shoua kfree(mqp->dct.in); 2543776a3906SMoni Shoua kfree(mqp); 2544776a3906SMoni Shoua return 0; 2545776a3906SMoni Shoua } 2546776a3906SMoni Shoua 2547e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2548e126ba97SEli Cohen { 2549e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2550e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2551e126ba97SEli Cohen 2552d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2553d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2554d16e91daSHaggai Eran 2555776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2556776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2557776a3906SMoni Shoua 2558e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2559e126ba97SEli Cohen 2560e126ba97SEli Cohen kfree(mqp); 2561e126ba97SEli Cohen 2562e126ba97SEli Cohen return 0; 2563e126ba97SEli Cohen } 2564e126ba97SEli Cohen 2565e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2566e126ba97SEli Cohen int attr_mask) 2567e126ba97SEli Cohen { 2568e126ba97SEli Cohen u32 hw_access_flags = 0; 2569e126ba97SEli Cohen u8 dest_rd_atomic; 2570e126ba97SEli Cohen u32 access_flags; 2571e126ba97SEli Cohen 2572e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2573e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2574e126ba97SEli Cohen else 257519098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2576e126ba97SEli Cohen 2577e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2578e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2579e126ba97SEli Cohen else 258019098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2581e126ba97SEli Cohen 2582e126ba97SEli Cohen if (!dest_rd_atomic) 2583e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2584e126ba97SEli Cohen 2585e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2586e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2587e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2588e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2589e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2590e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2591e126ba97SEli Cohen 2592e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2593e126ba97SEli Cohen } 2594e126ba97SEli Cohen 2595e126ba97SEli Cohen enum { 2596e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2597e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2598e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2599e126ba97SEli Cohen }; 2600e126ba97SEli Cohen 2601e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2602e126ba97SEli Cohen { 26034f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2604e126ba97SEli Cohen return 0; 26054f32ac2eSDanit Goldberg 26064f32ac2eSDanit Goldberg if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) 2607e126ba97SEli Cohen return -EINVAL; 26084f32ac2eSDanit Goldberg 26094f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2610e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2611938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2612e126ba97SEli Cohen --rate; 2613e126ba97SEli Cohen 26144f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2615e126ba97SEli Cohen } 2616e126ba97SEli Cohen 261775850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 26181cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 26191cd6dbd3SYishai Hadas struct ib_pd *pd) 262075850d0bSmajd@mellanox.com { 262175850d0bSmajd@mellanox.com void *in; 262275850d0bSmajd@mellanox.com void *tisc; 262375850d0bSmajd@mellanox.com int inlen; 262475850d0bSmajd@mellanox.com int err; 262575850d0bSmajd@mellanox.com 262675850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 26271b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 262875850d0bSmajd@mellanox.com if (!in) 262975850d0bSmajd@mellanox.com return -ENOMEM; 263075850d0bSmajd@mellanox.com 263175850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 26321cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 263375850d0bSmajd@mellanox.com 263475850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 263575850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 263675850d0bSmajd@mellanox.com 263775850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 263875850d0bSmajd@mellanox.com 263975850d0bSmajd@mellanox.com kvfree(in); 264075850d0bSmajd@mellanox.com 264175850d0bSmajd@mellanox.com return err; 264275850d0bSmajd@mellanox.com } 264375850d0bSmajd@mellanox.com 264413eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 26451cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 26461cd6dbd3SYishai Hadas struct ib_pd *pd) 264713eab21fSAviv Heller { 264813eab21fSAviv Heller void *in; 264913eab21fSAviv Heller void *tisc; 265013eab21fSAviv Heller int inlen; 265113eab21fSAviv Heller int err; 265213eab21fSAviv Heller 265313eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 26541b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 265513eab21fSAviv Heller if (!in) 265613eab21fSAviv Heller return -ENOMEM; 265713eab21fSAviv Heller 265813eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 26591cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 266013eab21fSAviv Heller 266113eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 266213eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 266313eab21fSAviv Heller 266413eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 266513eab21fSAviv Heller 266613eab21fSAviv Heller kvfree(in); 266713eab21fSAviv Heller 266813eab21fSAviv Heller return err; 266913eab21fSAviv Heller } 267013eab21fSAviv Heller 267175850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 267290898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2673e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2674f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2675f879ee8dSAchiad Shochat bool alt) 2676e126ba97SEli Cohen { 2677d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2678e126ba97SEli Cohen int err; 2679ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2680d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2681d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2682e126ba97SEli Cohen 2683e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2684f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2685f879ee8dSAchiad Shochat attr->pkey_index); 2686e126ba97SEli Cohen 2687d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2688d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2689938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2690f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2691d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2692938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2693f83b4263SEli Cohen return -EINVAL; 2694f83b4263SEli Cohen } 26952811ba51SAchiad Shochat } 269644c58487SDasaratharaman Chandramouli 269744c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2698d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 26992811ba51SAchiad Shochat return -EINVAL; 270047ec3866SParav Pandit 270144c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 27022b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 27032b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 27042b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 27052b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 270647ec3866SParav Pandit path->udp_sport = 270747ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2708d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 270947ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2710ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2711d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 27122811ba51SAchiad Shochat } else { 2713d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2714d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2715d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2716d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2717d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2718d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2719e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2720d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 27212811ba51SAchiad Shochat } 27222811ba51SAchiad Shochat 2723d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2724d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2725d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2726e126ba97SEli Cohen path->tclass_flowlabel = 2727d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2728d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2729d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2730e126ba97SEli Cohen } 2731e126ba97SEli Cohen 2732d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2733e126ba97SEli Cohen if (err < 0) 2734e126ba97SEli Cohen return err; 2735e126ba97SEli Cohen path->static_rate = err; 2736e126ba97SEli Cohen path->port = port; 2737e126ba97SEli Cohen 2738e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2739f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2740e126ba97SEli Cohen 274175850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 274275850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 274375850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 27441cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 274575850d0bSmajd@mellanox.com 2746e126ba97SEli Cohen return 0; 2747e126ba97SEli Cohen } 2748e126ba97SEli Cohen 2749e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2750e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2751e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2752e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2753e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2754e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2755e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2756e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2757e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2758e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2759e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2760e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2761e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2762e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2763e126ba97SEli Cohen }, 2764e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2765e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2766e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2767e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2768e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2769e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2770e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2771e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2772e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2773e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2774e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2775e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2776e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2777a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2778a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2779a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2780a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2781a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2782e126ba97SEli Cohen }, 2783e126ba97SEli Cohen }, 2784e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2785e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2786e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2787e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2788e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2789e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2790e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2791e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2792e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2793e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2794e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2795e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2796e126ba97SEli Cohen }, 2797e126ba97SEli Cohen }, 2798e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2799e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2800e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2801e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2802e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2803e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2804c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2805c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2806e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2807c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2808c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2809e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2810e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2811e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2812e126ba97SEli Cohen }, 2813e126ba97SEli Cohen }, 2814e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2815e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2816e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2817e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 281875959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2819a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2820a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2821a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2822a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2823e126ba97SEli Cohen }, 2824e126ba97SEli Cohen }, 2825e126ba97SEli Cohen }; 2826e126ba97SEli Cohen 2827e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2828e126ba97SEli Cohen { 2829e126ba97SEli Cohen switch (ib_mask) { 2830e126ba97SEli Cohen case IB_QP_STATE: 2831e126ba97SEli Cohen return 0; 2832e126ba97SEli Cohen case IB_QP_CUR_STATE: 2833e126ba97SEli Cohen return 0; 2834e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2835e126ba97SEli Cohen return 0; 2836e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2837e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2838e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2839e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2840e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2841e126ba97SEli Cohen case IB_QP_PORT: 2842e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2843e126ba97SEli Cohen case IB_QP_QKEY: 2844e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2845e126ba97SEli Cohen case IB_QP_AV: 2846e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2847e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2848e126ba97SEli Cohen case IB_QP_PATH_MTU: 2849e126ba97SEli Cohen return 0; 2850e126ba97SEli Cohen case IB_QP_TIMEOUT: 2851e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2852e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2853e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2854e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2855e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2856e126ba97SEli Cohen case IB_QP_RQ_PSN: 2857e126ba97SEli Cohen return 0; 2858e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2859e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2860e126ba97SEli Cohen case IB_QP_ALT_PATH: 2861e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2862e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2863e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2864e126ba97SEli Cohen case IB_QP_SQ_PSN: 2865e126ba97SEli Cohen return 0; 2866e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2867e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2868e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2869e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2870e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2871e126ba97SEli Cohen case IB_QP_CAP: 2872e126ba97SEli Cohen return 0; 2873e126ba97SEli Cohen case IB_QP_DEST_QPN: 2874e126ba97SEli Cohen return 0; 2875e126ba97SEli Cohen } 2876e126ba97SEli Cohen return 0; 2877e126ba97SEli Cohen } 2878e126ba97SEli Cohen 2879e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2880e126ba97SEli Cohen { 2881e126ba97SEli Cohen int result = 0; 2882e126ba97SEli Cohen int i; 2883e126ba97SEli Cohen 2884e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2885e126ba97SEli Cohen if ((1 << i) & ib_mask) 2886e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2887e126ba97SEli Cohen } 2888e126ba97SEli Cohen 2889e126ba97SEli Cohen return result; 2890e126ba97SEli Cohen } 2891e126ba97SEli Cohen 289234d57585SYishai Hadas static int modify_raw_packet_qp_rq( 289334d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 289434d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2895ad5f8e96Smajd@mellanox.com { 2896ad5f8e96Smajd@mellanox.com void *in; 2897ad5f8e96Smajd@mellanox.com void *rqc; 2898ad5f8e96Smajd@mellanox.com int inlen; 2899ad5f8e96Smajd@mellanox.com int err; 2900ad5f8e96Smajd@mellanox.com 2901ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 29021b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2903ad5f8e96Smajd@mellanox.com if (!in) 2904ad5f8e96Smajd@mellanox.com return -ENOMEM; 2905ad5f8e96Smajd@mellanox.com 2906ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 290734d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 2908ad5f8e96Smajd@mellanox.com 2909ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2910ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2911ad5f8e96Smajd@mellanox.com 2912eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2913eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2914eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 291523a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2916eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2917eb49ab0cSAlex Vesker } else 29185a738b5dSJason Gunthorpe dev_info_once( 29195a738b5dSJason Gunthorpe &dev->ib_dev.dev, 29205a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 2921eb49ab0cSAlex Vesker } 2922eb49ab0cSAlex Vesker 2923eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2924ad5f8e96Smajd@mellanox.com if (err) 2925ad5f8e96Smajd@mellanox.com goto out; 2926ad5f8e96Smajd@mellanox.com 2927ad5f8e96Smajd@mellanox.com rq->state = new_state; 2928ad5f8e96Smajd@mellanox.com 2929ad5f8e96Smajd@mellanox.com out: 2930ad5f8e96Smajd@mellanox.com kvfree(in); 2931ad5f8e96Smajd@mellanox.com return err; 2932ad5f8e96Smajd@mellanox.com } 2933ad5f8e96Smajd@mellanox.com 2934c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 2935c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 2936c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2937ad5f8e96Smajd@mellanox.com { 29387d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 293961147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 294061147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 294161147f39SBodong Wang bool new_rate_added = false; 29427d29f349SBodong Wang u16 rl_index = 0; 2943ad5f8e96Smajd@mellanox.com void *in; 2944ad5f8e96Smajd@mellanox.com void *sqc; 2945ad5f8e96Smajd@mellanox.com int inlen; 2946ad5f8e96Smajd@mellanox.com int err; 2947ad5f8e96Smajd@mellanox.com 2948ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 29491b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2950ad5f8e96Smajd@mellanox.com if (!in) 2951ad5f8e96Smajd@mellanox.com return -ENOMEM; 2952ad5f8e96Smajd@mellanox.com 2953c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 2954ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2955ad5f8e96Smajd@mellanox.com 2956ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2957ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2958ad5f8e96Smajd@mellanox.com 29597d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 29607d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 29617d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 29627d29f349SBodong Wang __func__); 29637d29f349SBodong Wang else 296461147f39SBodong Wang new_rl = raw_qp_param->rl; 29657d29f349SBodong Wang } 2966ad5f8e96Smajd@mellanox.com 296761147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 296861147f39SBodong Wang if (new_rl.rate) { 296961147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 29707d29f349SBodong Wang if (err) { 297161147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 297261147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 297361147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 297461147f39SBodong Wang new_rl.typical_pkt_sz); 297561147f39SBodong Wang 29767d29f349SBodong Wang goto out; 29777d29f349SBodong Wang } 297861147f39SBodong Wang new_rate_added = true; 29797d29f349SBodong Wang } 29807d29f349SBodong Wang 29817d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 298261147f39SBodong Wang /* index 0 means no limit */ 29837d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 29847d29f349SBodong Wang } 29857d29f349SBodong Wang 29867d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 29877d29f349SBodong Wang if (err) { 29887d29f349SBodong Wang /* Remove new rate from table if failed */ 298961147f39SBodong Wang if (new_rate_added) 299061147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 29917d29f349SBodong Wang goto out; 29927d29f349SBodong Wang } 29937d29f349SBodong Wang 29947d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 299561147f39SBodong Wang if ((old_rl.rate && 299661147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 29977d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 299861147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 29997d29f349SBodong Wang 300061147f39SBodong Wang ibqp->rl = new_rl; 3001ad5f8e96Smajd@mellanox.com sq->state = new_state; 3002ad5f8e96Smajd@mellanox.com 3003ad5f8e96Smajd@mellanox.com out: 3004ad5f8e96Smajd@mellanox.com kvfree(in); 3005ad5f8e96Smajd@mellanox.com return err; 3006ad5f8e96Smajd@mellanox.com } 3007ad5f8e96Smajd@mellanox.com 3008ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 300913eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 301013eab21fSAviv Heller u8 tx_affinity) 3011ad5f8e96Smajd@mellanox.com { 3012ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3013ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3014ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 30157d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 30167d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3017ad5f8e96Smajd@mellanox.com int rq_state; 3018ad5f8e96Smajd@mellanox.com int sq_state; 3019ad5f8e96Smajd@mellanox.com int err; 3020ad5f8e96Smajd@mellanox.com 30210680efa2SAlex Vesker switch (raw_qp_param->operation) { 3022ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3023ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3024ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3025ad5f8e96Smajd@mellanox.com break; 3026ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3027ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3028ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3029ad5f8e96Smajd@mellanox.com break; 3030ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3031ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3032ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3033ad5f8e96Smajd@mellanox.com break; 3034ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3035ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 30367d29f349SBodong Wang if (raw_qp_param->set_mask == 30377d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 30387d29f349SBodong Wang modify_rq = 0; 30397d29f349SBodong Wang sq_state = sq->state; 30407d29f349SBodong Wang } else { 30417d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 30427d29f349SBodong Wang } 30437d29f349SBodong Wang break; 30447d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 30457d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3046eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3047eb49ab0cSAlex Vesker return -EINVAL; 3048eb49ab0cSAlex Vesker else 3049ad5f8e96Smajd@mellanox.com return 0; 3050ad5f8e96Smajd@mellanox.com default: 3051ad5f8e96Smajd@mellanox.com WARN_ON(1); 3052ad5f8e96Smajd@mellanox.com return -EINVAL; 3053ad5f8e96Smajd@mellanox.com } 3054ad5f8e96Smajd@mellanox.com 30557d29f349SBodong Wang if (modify_rq) { 305634d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 305734d57585SYishai Hadas qp->ibqp.pd); 3058ad5f8e96Smajd@mellanox.com if (err) 3059ad5f8e96Smajd@mellanox.com return err; 3060ad5f8e96Smajd@mellanox.com } 3061ad5f8e96Smajd@mellanox.com 30627d29f349SBodong Wang if (modify_sq) { 306313eab21fSAviv Heller if (tx_affinity) { 306413eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 30651cd6dbd3SYishai Hadas tx_affinity, 30661cd6dbd3SYishai Hadas qp->ibqp.pd); 306713eab21fSAviv Heller if (err) 306813eab21fSAviv Heller return err; 306913eab21fSAviv Heller } 307013eab21fSAviv Heller 3071c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3072c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 307313eab21fSAviv Heller } 3074ad5f8e96Smajd@mellanox.com 3075ad5f8e96Smajd@mellanox.com return 0; 3076ad5f8e96Smajd@mellanox.com } 3077ad5f8e96Smajd@mellanox.com 3078c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3079c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3080c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 3081c6a21c38SMajd Dibbiny u8 port_num) 3082c6a21c38SMajd Dibbiny { 3083c6a21c38SMajd Dibbiny struct mlx5_ib_ucontext *ucontext = NULL; 3084c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3085c6a21c38SMajd Dibbiny 3086c6a21c38SMajd Dibbiny if (pd && pd->ibpd.uobject && pd->ibpd.uobject->context) 3087c6a21c38SMajd Dibbiny ucontext = to_mucontext(pd->ibpd.uobject->context); 3088c6a21c38SMajd Dibbiny 3089c6a21c38SMajd Dibbiny if (ucontext) { 3090c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3091c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3092c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3093c6a21c38SMajd Dibbiny 1; 3094c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3095c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3096c6a21c38SMajd Dibbiny } else { 3097c6a21c38SMajd Dibbiny tx_port_affinity = 3098c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 3099c6a21c38SMajd Dibbiny 1, &dev->roce[port_num].tx_port_affinity) % 3100c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3101c6a21c38SMajd Dibbiny 1; 3102c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3103c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3104c6a21c38SMajd Dibbiny } 3105c6a21c38SMajd Dibbiny 3106c6a21c38SMajd Dibbiny return tx_port_affinity; 3107c6a21c38SMajd Dibbiny } 3108c6a21c38SMajd Dibbiny 3109e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3110e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 311161147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 311261147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 3113e126ba97SEli Cohen { 3114427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3115427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3116427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3117427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3118427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3119427c1e7bSmajd@mellanox.com }, 3120427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3121427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3122427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3123427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3124427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3125427c1e7bSmajd@mellanox.com }, 3126427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3127427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3128427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3129427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3130427c1e7bSmajd@mellanox.com }, 3131427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3132427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3133427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3134427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3135427c1e7bSmajd@mellanox.com }, 3136427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3137427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3138427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3139427c1e7bSmajd@mellanox.com }, 3140427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3141427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3142427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3143427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3144427c1e7bSmajd@mellanox.com }, 3145427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3146427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3147427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3148427c1e7bSmajd@mellanox.com } 3149427c1e7bSmajd@mellanox.com }; 3150427c1e7bSmajd@mellanox.com 3151e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3152e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 315319098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3154e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3155e126ba97SEli Cohen struct mlx5_qp_context *context; 3156e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3157eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3158e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3159e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3160e126ba97SEli Cohen int mlx5_st; 3161e126ba97SEli Cohen int err; 3162427c1e7bSmajd@mellanox.com u16 op; 316313eab21fSAviv Heller u8 tx_affinity = 0; 3164e126ba97SEli Cohen 316555de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 316655de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 316755de9a77SLeon Romanovsky if (mlx5_st < 0) 316855de9a77SLeon Romanovsky return -EINVAL; 316955de9a77SLeon Romanovsky 31701a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 31711a412fb1SSaeed Mahameed if (!context) 3172e126ba97SEli Cohen return -ENOMEM; 3173e126ba97SEli Cohen 3174c6a21c38SMajd Dibbiny pd = get_pd(qp); 317555de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3176e126ba97SEli Cohen 3177e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3178e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3179e126ba97SEli Cohen } else { 3180e126ba97SEli Cohen switch (attr->path_mig_state) { 3181e126ba97SEli Cohen case IB_MIG_MIGRATED: 3182e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3183e126ba97SEli Cohen break; 3184e126ba97SEli Cohen case IB_MIG_REARM: 3185e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3186e126ba97SEli Cohen break; 3187e126ba97SEli Cohen case IB_MIG_ARMED: 3188e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3189e126ba97SEli Cohen break; 3190e126ba97SEli Cohen } 3191e126ba97SEli Cohen } 3192e126ba97SEli Cohen 319313eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 319413eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 319513eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 319613eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 319713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 319813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 319913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 320013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 320113eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 32027fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 3203c6a21c38SMajd Dibbiny tx_affinity = get_tx_affinity(dev, pd, base, p); 320413eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 320513eab21fSAviv Heller } 320613eab21fSAviv Heller } 320713eab21fSAviv Heller } 320813eab21fSAviv Heller 3209d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3210e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3211c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3212c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3213e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3214e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3215e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3216e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3217e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3218e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3219e126ba97SEli Cohen err = -EINVAL; 3220e126ba97SEli Cohen goto out; 3221e126ba97SEli Cohen } 3222938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3223938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3224e126ba97SEli Cohen } 3225e126ba97SEli Cohen 3226e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3227e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3228e126ba97SEli Cohen 3229e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3230d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3231e126ba97SEli Cohen 3232e126ba97SEli Cohen /* todo implement counter_index functionality */ 3233e126ba97SEli Cohen 3234e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3235e126ba97SEli Cohen context->pri_path.port = qp->port; 3236e126ba97SEli Cohen 3237e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3238e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3239e126ba97SEli Cohen 3240e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 324175850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3242e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3243f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3244e126ba97SEli Cohen if (err) 3245e126ba97SEli Cohen goto out; 3246e126ba97SEli Cohen } 3247e126ba97SEli Cohen 3248e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3249e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3250e126ba97SEli Cohen 3251e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 325275850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 325375850d0bSmajd@mellanox.com &context->alt_path, 3254f879ee8dSAchiad Shochat attr->alt_port_num, 3255f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3256f879ee8dSAchiad Shochat 0, attr, true); 3257e126ba97SEli Cohen if (err) 3258e126ba97SEli Cohen goto out; 3259e126ba97SEli Cohen } 3260e126ba97SEli Cohen 326189ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 326289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3263e126ba97SEli Cohen 3264e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3265e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3266e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3267e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3268e126ba97SEli Cohen 3269e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3270e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3271e126ba97SEli Cohen 3272e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3273e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3274e126ba97SEli Cohen 3275e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3276e126ba97SEli Cohen if (attr->max_rd_atomic) 3277e126ba97SEli Cohen context->params1 |= 3278e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3279e126ba97SEli Cohen } 3280e126ba97SEli Cohen 3281e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3282e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3283e126ba97SEli Cohen 3284e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3285e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3286e126ba97SEli Cohen context->params2 |= 3287e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3288e126ba97SEli Cohen } 3289e126ba97SEli Cohen 3290e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3291e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3292e126ba97SEli Cohen 3293e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3294e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3295e126ba97SEli Cohen 3296e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3297e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3298e126ba97SEli Cohen 3299e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3300e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3301e126ba97SEli Cohen 3302e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3303e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3304e126ba97SEli Cohen 33050837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 33060837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 33070837e86aSMark Bloch qp->port) - 1; 3308c2e53b2cSYishai Hadas 3309c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3310c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3311c2e53b2cSYishai Hadas port_num = 0; 3312c2e53b2cSYishai Hadas 3313eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 33140837e86aSMark Bloch context->qp_counter_set_usr_page |= 3315e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 33160837e86aSMark Bloch } 33170837e86aSMark Bloch 3318e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3319e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3320e126ba97SEli Cohen 3321b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3322b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3323e126ba97SEli Cohen 3324e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3325e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3326e126ba97SEli Cohen 3327427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 33285d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 33295d414b17SDan Carpenter err = -EINVAL; 3330427c1e7bSmajd@mellanox.com goto out; 33315d414b17SDan Carpenter } 3332427c1e7bSmajd@mellanox.com 3333427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3334e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3335e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3336ad5f8e96Smajd@mellanox.com 3337c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3338c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 33390680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 33400680efa2SAlex Vesker 33410680efa2SAlex Vesker raw_qp_param.operation = op; 3342eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3343e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3344eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3345eb49ab0cSAlex Vesker } 33467d29f349SBodong Wang 33477d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 334861147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 334961147f39SBodong Wang 335061147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 335161147f39SBodong Wang if (attr->rate_limit && 335261147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 335361147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 335461147f39SBodong Wang ucmd->burst_info.max_burst_sz; 335561147f39SBodong Wang } else { 335661147f39SBodong Wang err = -EINVAL; 335761147f39SBodong Wang goto out; 335861147f39SBodong Wang } 335961147f39SBodong Wang } 336061147f39SBodong Wang 336161147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 336261147f39SBodong Wang if (attr->rate_limit && 336361147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 336461147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 336561147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 336661147f39SBodong Wang } else { 336761147f39SBodong Wang err = -EINVAL; 336861147f39SBodong Wang goto out; 336961147f39SBodong Wang } 337061147f39SBodong Wang } 337161147f39SBodong Wang 33727d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 33737d29f349SBodong Wang } 33747d29f349SBodong Wang 337513eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 33760680efa2SAlex Vesker } else { 33771a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 337819098df2Smajd@mellanox.com &base->mqp); 33790680efa2SAlex Vesker } 33800680efa2SAlex Vesker 3381e126ba97SEli Cohen if (err) 3382e126ba97SEli Cohen goto out; 3383e126ba97SEli Cohen 3384e126ba97SEli Cohen qp->state = new_state; 3385e126ba97SEli Cohen 3386e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 338719098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3388e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 338919098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3390e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3391e126ba97SEli Cohen qp->port = attr->port_num; 3392e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 339319098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3394e126ba97SEli Cohen 3395e126ba97SEli Cohen /* 3396e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3397e126ba97SEli Cohen * entries and reinitialize the QP. 3398e126ba97SEli Cohen */ 339975a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 340075a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 340119098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3402e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3403e126ba97SEli Cohen if (send_cq != recv_cq) 340419098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3405e126ba97SEli Cohen 3406e126ba97SEli Cohen qp->rq.head = 0; 3407e126ba97SEli Cohen qp->rq.tail = 0; 3408e126ba97SEli Cohen qp->sq.head = 0; 3409e126ba97SEli Cohen qp->sq.tail = 0; 3410e126ba97SEli Cohen qp->sq.cur_post = 0; 3411e126ba97SEli Cohen qp->sq.last_poll = 0; 3412e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3413e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3414e126ba97SEli Cohen } 3415e126ba97SEli Cohen 3416e126ba97SEli Cohen out: 34171a412fb1SSaeed Mahameed kfree(context); 3418e126ba97SEli Cohen return err; 3419e126ba97SEli Cohen } 3420e126ba97SEli Cohen 3421c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3422c32a4f29SMoni Shoua { 3423c32a4f29SMoni Shoua if ((mask & req) != req) 3424c32a4f29SMoni Shoua return false; 3425c32a4f29SMoni Shoua 3426c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3427c32a4f29SMoni Shoua return false; 3428c32a4f29SMoni Shoua 3429c32a4f29SMoni Shoua return true; 3430c32a4f29SMoni Shoua } 3431c32a4f29SMoni Shoua 3432c32a4f29SMoni Shoua /* check valid transition for driver QP types 3433c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3434c32a4f29SMoni Shoua */ 3435c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3436c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3437c32a4f29SMoni Shoua { 3438c32a4f29SMoni Shoua int req = IB_QP_STATE; 3439c32a4f29SMoni Shoua int opt = 0; 3440c32a4f29SMoni Shoua 344199ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 344299ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 344399ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3444c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3445c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3446c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3447c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3448c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3449c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3450c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3451c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3452c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3453c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3454c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3455c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3456c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3457c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3458c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3459c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3460c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3461c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3462c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3463c32a4f29SMoni Shoua } 3464c32a4f29SMoni Shoua return false; 3465c32a4f29SMoni Shoua } 3466c32a4f29SMoni Shoua 3467776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3468776a3906SMoni Shoua * valid transitions are: 3469776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3470776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3471776a3906SMoni Shoua * mtu, gid_index and hop_limit 3472776a3906SMoni Shoua * Other transitions and attributes are illegal 3473776a3906SMoni Shoua */ 3474776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3475776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3476776a3906SMoni Shoua { 3477776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3478776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3479776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3480776a3906SMoni Shoua int err = 0; 3481776a3906SMoni Shoua int required = IB_QP_STATE; 3482776a3906SMoni Shoua void *dctc; 3483776a3906SMoni Shoua 3484776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3485776a3906SMoni Shoua return -EINVAL; 3486776a3906SMoni Shoua 3487776a3906SMoni Shoua cur_state = qp->state; 3488776a3906SMoni Shoua new_state = attr->qp_state; 3489776a3906SMoni Shoua 3490776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3491776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3492776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3493776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3494776a3906SMoni Shoua return -EINVAL; 3495776a3906SMoni Shoua 3496776a3906SMoni Shoua if (attr->port_num == 0 || 3497776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3498776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3499776a3906SMoni Shoua attr->port_num, dev->num_ports); 3500776a3906SMoni Shoua return -EINVAL; 3501776a3906SMoni Shoua } 3502776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3503776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3504776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3505776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3506776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3507776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3508776a3906SMoni Shoua return -EOPNOTSUPP; 3509776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3510776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3511776a3906SMoni Shoua } 3512776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3513776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3514776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3515776a3906SMoni Shoua 3516776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3517776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3518776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3519776a3906SMoni Shoua sizeof(resp.dctn); 3520776a3906SMoni Shoua 3521776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3522776a3906SMoni Shoua return -EINVAL; 3523776a3906SMoni Shoua resp.response_length = min_resp_len; 3524776a3906SMoni Shoua 3525776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3526776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3527776a3906SMoni Shoua return -EINVAL; 3528776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3529776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3530776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3531776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3532776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3533776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3534776a3906SMoni Shoua 3535776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3536776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3537776a3906SMoni Shoua if (err) 3538776a3906SMoni Shoua return err; 3539776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3540776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3541776a3906SMoni Shoua if (err) { 3542776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3543776a3906SMoni Shoua return err; 3544776a3906SMoni Shoua } 3545776a3906SMoni Shoua } else { 3546776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3547776a3906SMoni Shoua return -EINVAL; 3548776a3906SMoni Shoua } 3549776a3906SMoni Shoua if (err) 3550776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3551776a3906SMoni Shoua else 3552776a3906SMoni Shoua qp->state = new_state; 3553776a3906SMoni Shoua return err; 3554776a3906SMoni Shoua } 3555776a3906SMoni Shoua 3556e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3557e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3558e126ba97SEli Cohen { 3559e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3560e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 356161147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3562d16e91daSHaggai Eran enum ib_qp_type qp_type; 3563e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 356461147f39SBodong Wang size_t required_cmd_sz; 3565e126ba97SEli Cohen int err = -EINVAL; 3566e126ba97SEli Cohen int port; 3567e126ba97SEli Cohen 356828d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 356928d61370SYishai Hadas return -ENOSYS; 357028d61370SYishai Hadas 357161147f39SBodong Wang if (udata && udata->inlen) { 357261147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 357361147f39SBodong Wang sizeof(ucmd.reserved); 357461147f39SBodong Wang if (udata->inlen < required_cmd_sz) 357561147f39SBodong Wang return -EINVAL; 357661147f39SBodong Wang 357761147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 357861147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 357961147f39SBodong Wang udata->inlen - sizeof(ucmd))) 358061147f39SBodong Wang return -EOPNOTSUPP; 358161147f39SBodong Wang 358261147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 358361147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 358461147f39SBodong Wang return -EFAULT; 358561147f39SBodong Wang 358661147f39SBodong Wang if (ucmd.comp_mask || 358761147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 358861147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 358961147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 359061147f39SBodong Wang return -EOPNOTSUPP; 359161147f39SBodong Wang } 359261147f39SBodong Wang 3593d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3594d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3595d16e91daSHaggai Eran 3596c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3597c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3598c32a4f29SMoni Shoua else 3599d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3600d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3601d16e91daSHaggai Eran 3602776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3603776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3604c32a4f29SMoni Shoua 3605e126ba97SEli Cohen mutex_lock(&qp->mutex); 3606e126ba97SEli Cohen 3607e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3608e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3609e126ba97SEli Cohen 36102811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 36112811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 36122811ba51SAchiad Shochat } 36132811ba51SAchiad Shochat 3614c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3615c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3616c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3617c2e53b2cSYishai Hadas attr_mask); 3618c2e53b2cSYishai Hadas goto out; 3619c2e53b2cSYishai Hadas } 3620c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3621c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3622d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3623d31131bbSKamal Heib attr_mask)) { 3624158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3625158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3626e126ba97SEli Cohen goto out; 3627c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3628c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3629c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3630c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3631c32a4f29SMoni Shoua goto out; 3632158abf86SHaggai Eran } 3633e126ba97SEli Cohen 3634e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3635938fe83cSSaeed Mahameed (attr->port_num == 0 || 3636508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3637158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3638158abf86SHaggai Eran attr->port_num, dev->num_ports); 3639e126ba97SEli Cohen goto out; 3640158abf86SHaggai Eran } 3641e126ba97SEli Cohen 3642e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3643e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3644938fe83cSSaeed Mahameed if (attr->pkey_index >= 3645158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3646158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3647158abf86SHaggai Eran attr->pkey_index); 3648e126ba97SEli Cohen goto out; 3649e126ba97SEli Cohen } 3650158abf86SHaggai Eran } 3651e126ba97SEli Cohen 3652e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3653938fe83cSSaeed Mahameed attr->max_rd_atomic > 3654158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3655158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3656158abf86SHaggai Eran attr->max_rd_atomic); 3657e126ba97SEli Cohen goto out; 3658158abf86SHaggai Eran } 3659e126ba97SEli Cohen 3660e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3661938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3662158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3663158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3664158abf86SHaggai Eran attr->max_dest_rd_atomic); 3665e126ba97SEli Cohen goto out; 3666158abf86SHaggai Eran } 3667e126ba97SEli Cohen 3668e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3669e126ba97SEli Cohen err = 0; 3670e126ba97SEli Cohen goto out; 3671e126ba97SEli Cohen } 3672e126ba97SEli Cohen 367361147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 367461147f39SBodong Wang new_state, &ucmd); 3675e126ba97SEli Cohen 3676e126ba97SEli Cohen out: 3677e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3678e126ba97SEli Cohen return err; 3679e126ba97SEli Cohen } 3680e126ba97SEli Cohen 3681e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3682e126ba97SEli Cohen { 3683e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3684e126ba97SEli Cohen unsigned cur; 3685e126ba97SEli Cohen 3686e126ba97SEli Cohen cur = wq->head - wq->tail; 3687e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3688e126ba97SEli Cohen return 0; 3689e126ba97SEli Cohen 3690e126ba97SEli Cohen cq = to_mcq(ib_cq); 3691e126ba97SEli Cohen spin_lock(&cq->lock); 3692e126ba97SEli Cohen cur = wq->head - wq->tail; 3693e126ba97SEli Cohen spin_unlock(&cq->lock); 3694e126ba97SEli Cohen 3695e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3696e126ba97SEli Cohen } 3697e126ba97SEli Cohen 3698e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3699e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3700e126ba97SEli Cohen { 3701e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3702e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3703e126ba97SEli Cohen rseg->reserved = 0; 3704e126ba97SEli Cohen } 3705e126ba97SEli Cohen 3706f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3707f696bf6dSBart Van Assche const struct ib_send_wr *wr, void *qend, 3708f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3709f0313965SErez Shitrit { 3710f0313965SErez Shitrit void *seg = eseg; 3711f0313965SErez Shitrit 3712f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3713f0313965SErez Shitrit 3714f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3715f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3716f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3717f0313965SErez Shitrit 3718f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3719f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3720f0313965SErez Shitrit 3721f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3722f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 37232b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3724f0313965SErez Shitrit u64 left, leftlen, copysz; 3725f0313965SErez Shitrit void *pdata = ud_wr->header; 3726f0313965SErez Shitrit 3727f0313965SErez Shitrit left = ud_wr->hlen; 3728f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 37292b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3730f0313965SErez Shitrit 3731f0313965SErez Shitrit /* 3732f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3733f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3734f0313965SErez Shitrit * rollback and than the copy the left 3735f0313965SErez Shitrit */ 37362b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3737f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3738f0313965SErez Shitrit 3739f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3740f0313965SErez Shitrit 3741f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3742f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3743f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3744f0313965SErez Shitrit } 3745f0313965SErez Shitrit 3746f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3747f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3748f0313965SErez Shitrit left -= copysz; 3749f0313965SErez Shitrit pdata += copysz; 3750f0313965SErez Shitrit memcpy(seg, pdata, left); 3751f0313965SErez Shitrit seg += ALIGN(left, 16); 3752f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3753f0313965SErez Shitrit } 3754f0313965SErez Shitrit } 3755f0313965SErez Shitrit 3756f0313965SErez Shitrit return seg; 3757f0313965SErez Shitrit } 3758f0313965SErez Shitrit 3759e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3760f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3761e126ba97SEli Cohen { 3762e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3763e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3764e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3765e126ba97SEli Cohen } 3766e126ba97SEli Cohen 3767e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3768e126ba97SEli Cohen { 3769e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3770e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3771e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3772e126ba97SEli Cohen } 3773e126ba97SEli Cohen 377431616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3775e126ba97SEli Cohen { 377631616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 377731616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3778e126ba97SEli Cohen } 3779e126ba97SEli Cohen 3780e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3781e126ba97SEli Cohen { 3782e126ba97SEli Cohen u64 result; 3783e126ba97SEli Cohen 3784e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3785e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3786e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3787e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3788e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3789e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3790e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3791e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3792e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3793e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3794e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3795e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3796e126ba97SEli Cohen 3797e126ba97SEli Cohen return cpu_to_be64(result); 3798e126ba97SEli Cohen } 3799e126ba97SEli Cohen 3800e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3801e6631814SSagi Grimberg { 3802e6631814SSagi Grimberg u64 result; 3803e6631814SSagi Grimberg 3804e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3805e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3806e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3807d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3808e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3809e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3810e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3811e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3812e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3813e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3814e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3815e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3816e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3817e6631814SSagi Grimberg 3818e6631814SSagi Grimberg return cpu_to_be64(result); 3819e6631814SSagi Grimberg } 3820e6631814SSagi Grimberg 38218a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 3822064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 38238a187ee5SSagi Grimberg { 382431616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 38258a187ee5SSagi Grimberg 38268a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3827b005d316SSagi Grimberg 38288a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 3829064e5262SIdan Burstein if (umr_inline) 3830064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 383131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 38328a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 38338a187ee5SSagi Grimberg } 38348a187ee5SSagi Grimberg 3835dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3836e126ba97SEli Cohen { 3837e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3838e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 38392d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3840e126ba97SEli Cohen } 3841e126ba97SEli Cohen 384231616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3843e126ba97SEli Cohen { 3844968e78ddSHaggai Eran u64 result; 3845e126ba97SEli Cohen 384631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3847e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3848968e78ddSHaggai Eran 3849968e78ddSHaggai Eran return cpu_to_be64(result); 3850968e78ddSHaggai Eran } 3851968e78ddSHaggai Eran 385231616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3853968e78ddSHaggai Eran { 3854968e78ddSHaggai Eran u64 result; 3855968e78ddSHaggai Eran 3856968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3857968e78ddSHaggai Eran 3858968e78ddSHaggai Eran return cpu_to_be64(result); 3859968e78ddSHaggai Eran } 3860968e78ddSHaggai Eran 386156e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 386256e11d62SNoa Osherovich { 386356e11d62SNoa Osherovich u64 result; 386456e11d62SNoa Osherovich 386556e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 386656e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 386731616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 386856e11d62SNoa Osherovich 386956e11d62SNoa Osherovich return cpu_to_be64(result); 387056e11d62SNoa Osherovich } 387156e11d62SNoa Osherovich 387231616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 387356e11d62SNoa Osherovich { 387456e11d62SNoa Osherovich u64 result; 387556e11d62SNoa Osherovich 387631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 387731616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 387856e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 387931616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 388031616255SArtemy Kovalyov 388131616255SArtemy Kovalyov if (atomic) 388231616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 388356e11d62SNoa Osherovich 388456e11d62SNoa Osherovich return cpu_to_be64(result); 388556e11d62SNoa Osherovich } 388656e11d62SNoa Osherovich 388756e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 388856e11d62SNoa Osherovich { 388956e11d62SNoa Osherovich u64 result; 389056e11d62SNoa Osherovich 389131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 389256e11d62SNoa Osherovich 389356e11d62SNoa Osherovich return cpu_to_be64(result); 389456e11d62SNoa Osherovich } 389556e11d62SNoa Osherovich 3896c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3897c8d75a98SMajd Dibbiny { 3898c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3899c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3900c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3901c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3902c8d75a98SMajd Dibbiny return -EPERM; 3903c8d75a98SMajd Dibbiny return 0; 3904c8d75a98SMajd Dibbiny } 3905c8d75a98SMajd Dibbiny 3906c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3907c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3908f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 3909968e78ddSHaggai Eran { 3910f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3911968e78ddSHaggai Eran 3912968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3913968e78ddSHaggai Eran 3914968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3915968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3916968e78ddSHaggai Eran else 3917968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3918968e78ddSHaggai Eran 391931616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 392031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 392131616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 392231616255SArtemy Kovalyov 392331616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 392431616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3925968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3926968e78ddSHaggai Eran } 392756e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 392856e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 392931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 393031616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 393156e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3932e126ba97SEli Cohen } 393331616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 393431616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 393531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 393631616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3937e126ba97SEli Cohen 3938e126ba97SEli Cohen if (!wr->num_sge) 3939968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3940c8d75a98SMajd Dibbiny 3941c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 3942e126ba97SEli Cohen } 3943e126ba97SEli Cohen 3944e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3945e126ba97SEli Cohen { 3946e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3947e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3948e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3949e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 39502ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3951e126ba97SEli Cohen } 3952e126ba97SEli Cohen 39538a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 39548a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 39558a187ee5SSagi Grimberg u32 key, int access) 39568a187ee5SSagi Grimberg { 39578a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 39588a187ee5SSagi Grimberg 39598a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3960b005d316SSagi Grimberg 3961ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3962b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3963ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3964b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3965b005d316SSagi Grimberg ndescs *= 2; 3966b005d316SSagi Grimberg 3967b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 39688a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 39698a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 39708a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 39718a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 39728a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 39738a187ee5SSagi Grimberg } 39748a187ee5SSagi Grimberg 3975dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3976e126ba97SEli Cohen { 3977e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3978968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3979e126ba97SEli Cohen } 3980e126ba97SEli Cohen 3981f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 3982f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3983e126ba97SEli Cohen { 3984f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3985968e78ddSHaggai Eran 3986e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 398731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3988968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3989e126ba97SEli Cohen 3990968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 399156e11d62SNoa Osherovich if (umrwr->pd) 3992968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 399331616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 399431616255SArtemy Kovalyov !umrwr->length) 399531616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 399631616255SArtemy Kovalyov 399731616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3998968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3999968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4000746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4001968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4002e126ba97SEli Cohen } 4003e126ba97SEli Cohen 40048a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 40058a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 40068a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 40078a187ee5SSagi Grimberg { 40088a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 40098a187ee5SSagi Grimberg 40108a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 40118a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 40128a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 40138a187ee5SSagi Grimberg } 40148a187ee5SSagi Grimberg 4015064e5262SIdan Burstein static void set_reg_umr_inline_seg(void *seg, struct mlx5_ib_qp *qp, 4016064e5262SIdan Burstein struct mlx5_ib_mr *mr, int mr_list_size) 4017064e5262SIdan Burstein { 4018064e5262SIdan Burstein void *qend = qp->sq.qend; 4019064e5262SIdan Burstein void *addr = mr->descs; 4020064e5262SIdan Burstein int copy; 4021064e5262SIdan Burstein 4022064e5262SIdan Burstein if (unlikely(seg + mr_list_size > qend)) { 4023064e5262SIdan Burstein copy = qend - seg; 4024064e5262SIdan Burstein memcpy(seg, addr, copy); 4025064e5262SIdan Burstein addr += copy; 4026064e5262SIdan Burstein mr_list_size -= copy; 4027064e5262SIdan Burstein seg = mlx5_get_send_wqe(qp, 0); 4028064e5262SIdan Burstein } 4029064e5262SIdan Burstein memcpy(seg, addr, mr_list_size); 4030064e5262SIdan Burstein seg += mr_list_size; 4031064e5262SIdan Burstein } 4032064e5262SIdan Burstein 4033f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4034e126ba97SEli Cohen { 4035e126ba97SEli Cohen switch (wr->opcode) { 4036e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4037e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4038e126ba97SEli Cohen return wr->ex.imm_data; 4039e126ba97SEli Cohen 4040e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4041e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4042e126ba97SEli Cohen 4043e126ba97SEli Cohen default: 4044e126ba97SEli Cohen return 0; 4045e126ba97SEli Cohen } 4046e126ba97SEli Cohen } 4047e126ba97SEli Cohen 4048e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4049e126ba97SEli Cohen { 4050e126ba97SEli Cohen u8 *p = wqe; 4051e126ba97SEli Cohen u8 res = 0; 4052e126ba97SEli Cohen int i; 4053e126ba97SEli Cohen 4054e126ba97SEli Cohen for (i = 0; i < size; i++) 4055e126ba97SEli Cohen res ^= p[i]; 4056e126ba97SEli Cohen 4057e126ba97SEli Cohen return ~res; 4058e126ba97SEli Cohen } 4059e126ba97SEli Cohen 4060e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4061e126ba97SEli Cohen { 4062e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4063e126ba97SEli Cohen } 4064e126ba97SEli Cohen 4065f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 4066e126ba97SEli Cohen void *wqe, int *sz) 4067e126ba97SEli Cohen { 4068e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 4069e126ba97SEli Cohen void *qend = qp->sq.qend; 4070e126ba97SEli Cohen void *addr; 4071e126ba97SEli Cohen int inl = 0; 4072e126ba97SEli Cohen int copy; 4073e126ba97SEli Cohen int len; 4074e126ba97SEli Cohen int i; 4075e126ba97SEli Cohen 4076e126ba97SEli Cohen seg = wqe; 4077e126ba97SEli Cohen wqe += sizeof(*seg); 4078e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 4079e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 4080e126ba97SEli Cohen len = wr->sg_list[i].length; 4081e126ba97SEli Cohen inl += len; 4082e126ba97SEli Cohen 4083e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4084e126ba97SEli Cohen return -ENOMEM; 4085e126ba97SEli Cohen 4086e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 4087e126ba97SEli Cohen copy = qend - wqe; 4088e126ba97SEli Cohen memcpy(wqe, addr, copy); 4089e126ba97SEli Cohen addr += copy; 4090e126ba97SEli Cohen len -= copy; 4091e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 4092e126ba97SEli Cohen } 4093e126ba97SEli Cohen memcpy(wqe, addr, len); 4094e126ba97SEli Cohen wqe += len; 4095e126ba97SEli Cohen } 4096e126ba97SEli Cohen 4097e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4098e126ba97SEli Cohen 4099e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4100e126ba97SEli Cohen 4101e126ba97SEli Cohen return 0; 4102e126ba97SEli Cohen } 4103e126ba97SEli Cohen 4104e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4105e6631814SSagi Grimberg { 4106e6631814SSagi Grimberg switch (type) { 4107e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4108e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4109e6631814SSagi Grimberg default: 4110e6631814SSagi Grimberg return 0; 4111e6631814SSagi Grimberg } 4112e6631814SSagi Grimberg } 4113e6631814SSagi Grimberg 4114e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4115e6631814SSagi Grimberg { 4116e6631814SSagi Grimberg switch (block_size) { 4117e6631814SSagi Grimberg case 512: return 0x1; 4118e6631814SSagi Grimberg case 520: return 0x2; 4119e6631814SSagi Grimberg case 4096: return 0x3; 4120e6631814SSagi Grimberg case 4160: return 0x4; 4121e6631814SSagi Grimberg case 1073741824: return 0x5; 4122e6631814SSagi Grimberg default: return 0; 4123e6631814SSagi Grimberg } 4124e6631814SSagi Grimberg } 4125e6631814SSagi Grimberg 412678eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4127142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4128e6631814SSagi Grimberg { 4129142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4130142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4131142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4132142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4133142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4134142537f4SSagi Grimberg /* repeating block */ 4135142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4136142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4137142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4138e6631814SSagi Grimberg 413978eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 414078eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4141e6631814SSagi Grimberg 414278eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 414378eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 414478eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 414578eda2bbSSagi Grimberg else 414678eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4147e6631814SSagi Grimberg } 4148e6631814SSagi Grimberg 414978eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 415078eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4151e6631814SSagi Grimberg } 4152e6631814SSagi Grimberg 4153e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4154e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4155e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4156e6631814SSagi Grimberg { 4157e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4158e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4159e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4160e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4161e6631814SSagi Grimberg 4162c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4163e6631814SSagi Grimberg 4164142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4165142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4166e6631814SSagi Grimberg /* Input domain check byte mask */ 4167e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 416878eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 416978eda2bbSSagi Grimberg 417078eda2bbSSagi Grimberg /* Memory domain */ 417178eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 417278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 417378eda2bbSSagi Grimberg break; 417478eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 417578eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 417678eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 417778eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 417878eda2bbSSagi Grimberg break; 417978eda2bbSSagi Grimberg default: 418078eda2bbSSagi Grimberg return -EINVAL; 418178eda2bbSSagi Grimberg } 418278eda2bbSSagi Grimberg 418378eda2bbSSagi Grimberg /* Wire domain */ 418478eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 418578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 418678eda2bbSSagi Grimberg break; 418778eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4188e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 418978eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4190e6631814SSagi Grimberg /* Same block structure */ 4191142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4192e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4193fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4194c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4195fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4196c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4197fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4198e6631814SSagi Grimberg } else 4199e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4200e6631814SSagi Grimberg 4201142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 420278eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4203e6631814SSagi Grimberg break; 4204e6631814SSagi Grimberg default: 4205e6631814SSagi Grimberg return -EINVAL; 4206e6631814SSagi Grimberg } 4207e6631814SSagi Grimberg 4208e6631814SSagi Grimberg return 0; 4209e6631814SSagi Grimberg } 4210e6631814SSagi Grimberg 4211f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 4212e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4213e6631814SSagi Grimberg { 4214e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4215e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4216e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4217e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4218e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4219e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4220e6631814SSagi Grimberg int ret; 4221e6631814SSagi Grimberg int wqe_size; 4222e6631814SSagi Grimberg 4223e622f2f4SChristoph Hellwig if (!wr->prot || 4224e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4225e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4226e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4227e6631814SSagi Grimberg /** 4228e6631814SSagi Grimberg * Source domain doesn't contain signature information 42295c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4230e6631814SSagi Grimberg * So need construct: 4231e6631814SSagi Grimberg * ------------------ 4232e6631814SSagi Grimberg * | data_klm | 4233e6631814SSagi Grimberg * ------------------ 4234e6631814SSagi Grimberg * | BSF | 4235e6631814SSagi Grimberg * ------------------ 4236e6631814SSagi Grimberg **/ 4237e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4238e6631814SSagi Grimberg 4239e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4240e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4241e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4242e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4243e6631814SSagi Grimberg } else { 4244e6631814SSagi Grimberg /** 4245e6631814SSagi Grimberg * Source domain contains signature information 4246e6631814SSagi Grimberg * So need construct a strided block format: 4247e6631814SSagi Grimberg * --------------------------- 4248e6631814SSagi Grimberg * | stride_block_ctrl | 4249e6631814SSagi Grimberg * --------------------------- 4250e6631814SSagi Grimberg * | data_klm | 4251e6631814SSagi Grimberg * --------------------------- 4252e6631814SSagi Grimberg * | prot_klm | 4253e6631814SSagi Grimberg * --------------------------- 4254e6631814SSagi Grimberg * | BSF | 4255e6631814SSagi Grimberg * --------------------------- 4256e6631814SSagi Grimberg **/ 4257e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4258e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4259e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4260e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4261e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4262e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4263e6631814SSagi Grimberg int prot_size; 4264e6631814SSagi Grimberg 4265e6631814SSagi Grimberg sblock_ctrl = *seg; 4266e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4267e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4268e6631814SSagi Grimberg 4269e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4270e6631814SSagi Grimberg if (!prot_size) { 4271e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4272e6631814SSagi Grimberg return -EINVAL; 4273e6631814SSagi Grimberg } 4274e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4275e6631814SSagi Grimberg prot_size); 4276e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4277e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4278e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4279e6631814SSagi Grimberg 4280e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4281e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4282e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 42835c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 42845c273b16SSagi Grimberg 4285e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4286e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4287e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4288e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 42895c273b16SSagi Grimberg 4290e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4291e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4292e6631814SSagi Grimberg } 4293e6631814SSagi Grimberg 4294e6631814SSagi Grimberg *seg += wqe_size; 4295e6631814SSagi Grimberg *size += wqe_size / 16; 4296e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4297e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4298e6631814SSagi Grimberg 4299e6631814SSagi Grimberg bsf = *seg; 4300e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4301e6631814SSagi Grimberg if (ret) 4302e6631814SSagi Grimberg return -EINVAL; 4303e6631814SSagi Grimberg 4304e6631814SSagi Grimberg *seg += sizeof(*bsf); 4305e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4306e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4307e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4308e6631814SSagi Grimberg 4309e6631814SSagi Grimberg return 0; 4310e6631814SSagi Grimberg } 4311e6631814SSagi Grimberg 4312e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4313f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4314e6631814SSagi Grimberg u32 length, u32 pdn) 4315e6631814SSagi Grimberg { 4316e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4317e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4318d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4319e6631814SSagi Grimberg 4320e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4321e6631814SSagi Grimberg 4322e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4323ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4324e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4325d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4326e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4327e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 432831616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4329e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4330e6631814SSagi Grimberg } 4331e6631814SSagi Grimberg 4332e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 433331616255SArtemy Kovalyov u32 size) 4334e6631814SSagi Grimberg { 4335e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4336e6631814SSagi Grimberg 4337e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 433831616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4339e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4340e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4341e6631814SSagi Grimberg } 4342e6631814SSagi Grimberg 4343e6631814SSagi Grimberg 4344f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 4345f696bf6dSBart Van Assche struct mlx5_ib_qp *qp, void **seg, int *size) 4346e6631814SSagi Grimberg { 4347f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4348e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4349e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 435031616255SArtemy Kovalyov u32 xlt_size; 4351e6631814SSagi Grimberg int region_len, ret; 4352e6631814SSagi Grimberg 4353e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4354e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4355d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4356d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4357e6631814SSagi Grimberg return -EINVAL; 4358e6631814SSagi Grimberg 4359e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4360e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4361e622f2f4SChristoph Hellwig if (wr->prot && 4362e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4363e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4364e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4365e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4366e6631814SSagi Grimberg 4367e6631814SSagi Grimberg /** 4368e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4369e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4370e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4371e6631814SSagi Grimberg **/ 437231616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4373e6631814SSagi Grimberg 437431616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4375e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4376e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4377e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4378e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4379e6631814SSagi Grimberg 438031616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4381e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4382e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4383e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4384e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4385e6631814SSagi Grimberg 4386e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4387e6631814SSagi Grimberg if (ret) 4388e6631814SSagi Grimberg return ret; 4389e6631814SSagi Grimberg 4390d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4391e6631814SSagi Grimberg return 0; 4392e6631814SSagi Grimberg } 4393e6631814SSagi Grimberg 4394e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4395e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4396e6631814SSagi Grimberg { 4397e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4398e6631814SSagi Grimberg 4399e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4400e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4401e6631814SSagi Grimberg switch (domain->sig_type) { 440278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 440378eda2bbSSagi Grimberg break; 4404e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4405e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4406e6631814SSagi Grimberg domain->sig.dif.app_tag); 4407e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4408e6631814SSagi Grimberg break; 4409e6631814SSagi Grimberg default: 441012bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 441112bbf1eaSLeon Romanovsky domain->sig_type); 441212bbf1eaSLeon Romanovsky return -EINVAL; 4413e6631814SSagi Grimberg } 4414e6631814SSagi Grimberg 441578eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 441678eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 441778eda2bbSSagi Grimberg 4418e6631814SSagi Grimberg return 0; 4419e6631814SSagi Grimberg } 4420e6631814SSagi Grimberg 44218a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4422f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 44238a187ee5SSagi Grimberg void **seg, int *size) 44248a187ee5SSagi Grimberg { 44258a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 44268a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 4427064e5262SIdan Burstein int mr_list_size = mr->ndescs * mr->desc_size; 4428064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 44298a187ee5SSagi Grimberg 44308a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 44318a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 44328a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 44338a187ee5SSagi Grimberg return -EINVAL; 44348a187ee5SSagi Grimberg } 44358a187ee5SSagi Grimberg 4436064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 44378a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 44388a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 44398a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 44408a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 44418a187ee5SSagi Grimberg 44428a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 44438a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 44448a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 44458a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 44468a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 44478a187ee5SSagi Grimberg 4448064e5262SIdan Burstein if (umr_inline) { 4449064e5262SIdan Burstein set_reg_umr_inline_seg(*seg, qp, mr, mr_list_size); 4450064e5262SIdan Burstein *size += get_xlt_octo(mr_list_size); 4451064e5262SIdan Burstein } else { 44528a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 44538a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 44548a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4455064e5262SIdan Burstein } 44568a187ee5SSagi Grimberg return 0; 44578a187ee5SSagi Grimberg } 44588a187ee5SSagi Grimberg 4459dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4460e126ba97SEli Cohen { 4461dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4462e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4463e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4464e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4465e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4466dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4467e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4468e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4469e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4470e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4471e126ba97SEli Cohen } 4472e126ba97SEli Cohen 4473e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4474e126ba97SEli Cohen { 4475e126ba97SEli Cohen __be32 *p = NULL; 4476e126ba97SEli Cohen int tidx = idx; 4477e126ba97SEli Cohen int i, j; 4478e126ba97SEli Cohen 4479e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4480e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4481e126ba97SEli Cohen if ((i & 0xf) == 0) { 4482e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4483e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4484e126ba97SEli Cohen p = buf; 4485e126ba97SEli Cohen j = 0; 4486e126ba97SEli Cohen } 4487e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4488e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4489e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4490e126ba97SEli Cohen } 4491e126ba97SEli Cohen } 4492e126ba97SEli Cohen 44937bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 44946e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 4495f696bf6dSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 44967bb1fafcSBart Van Assche int *size, int nreq, bool send_signaled, bool solicited) 44976e5eadacSSagi Grimberg { 4498b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4499b2a232d2SLeon Romanovsky return -ENOMEM; 45006e5eadacSSagi Grimberg 45016e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 45026e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 45036e5eadacSSagi Grimberg *ctrl = *seg; 45046e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 45056e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 45066e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 45077bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 45087bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 45096e5eadacSSagi Grimberg 45106e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 45116e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 45126e5eadacSSagi Grimberg 4513b2a232d2SLeon Romanovsky return 0; 45146e5eadacSSagi Grimberg } 45156e5eadacSSagi Grimberg 45167bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 45177bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 45187bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 45197bb1fafcSBart Van Assche int *size, int nreq) 45207bb1fafcSBart Van Assche { 45217bb1fafcSBart Van Assche return __begin_wqe(qp, seg, ctrl, wr, idx, size, nreq, 45227bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 45237bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 45247bb1fafcSBart Van Assche } 45257bb1fafcSBart Van Assche 45266e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 45276e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 45286e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 45296e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 45306e5eadacSSagi Grimberg { 45316e5eadacSSagi Grimberg u8 opmod = 0; 45326e5eadacSSagi Grimberg 45336e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 45346e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 453519098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 45366e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 45376e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 45386e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 45396e5eadacSSagi Grimberg 45406e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 45416e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 45426e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 45436e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 45446e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 45456e5eadacSSagi Grimberg } 45466e5eadacSSagi Grimberg 4547d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4548d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4549e126ba97SEli Cohen { 4550e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4551e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 455289ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4553d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4554e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4555e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4556e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4557d16e91daSHaggai Eran struct mlx5_bf *bf; 4558e126ba97SEli Cohen int uninitialized_var(size); 4559d16e91daSHaggai Eran void *qend; 4560e126ba97SEli Cohen unsigned long flags; 4561e126ba97SEli Cohen unsigned idx; 4562e126ba97SEli Cohen int err = 0; 4563e126ba97SEli Cohen int num_sge; 4564e126ba97SEli Cohen void *seg; 4565e126ba97SEli Cohen int nreq; 4566e126ba97SEli Cohen int i; 4567e126ba97SEli Cohen u8 next_fence = 0; 4568e126ba97SEli Cohen u8 fence; 4569e126ba97SEli Cohen 45706c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 45716c75520fSParav Pandit !drain)) { 45726c75520fSParav Pandit *bad_wr = wr; 45736c75520fSParav Pandit return -EIO; 45746c75520fSParav Pandit } 45756c75520fSParav Pandit 4576d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4577d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4578d16e91daSHaggai Eran 4579d16e91daSHaggai Eran qp = to_mqp(ibqp); 45805fe9dec0SEli Cohen bf = &qp->bf; 4581d16e91daSHaggai Eran qend = qp->sq.qend; 4582d16e91daSHaggai Eran 4583e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4584e126ba97SEli Cohen 4585e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4586a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4587e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4588e126ba97SEli Cohen err = -EINVAL; 4589e126ba97SEli Cohen *bad_wr = wr; 4590e126ba97SEli Cohen goto out; 4591e126ba97SEli Cohen } 4592e126ba97SEli Cohen 4593e126ba97SEli Cohen num_sge = wr->num_sge; 4594e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4595e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 459624be409bSChuck Lever err = -EINVAL; 4597e126ba97SEli Cohen *bad_wr = wr; 4598e126ba97SEli Cohen goto out; 4599e126ba97SEli Cohen } 4600e126ba97SEli Cohen 46016e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 46026e5eadacSSagi Grimberg if (err) { 46036e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 46046e5eadacSSagi Grimberg err = -ENOMEM; 46056e5eadacSSagi Grimberg *bad_wr = wr; 46066e5eadacSSagi Grimberg goto out; 46076e5eadacSSagi Grimberg } 4608e126ba97SEli Cohen 46096e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 46106e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 46116e8484c5SMax Gurtovoy fence = dev->umr_fence; 46126e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 46136e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 46146e8484c5SMax Gurtovoy if (qp->next_fence) 46156e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 46166e8484c5SMax Gurtovoy else 46176e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 46186e8484c5SMax Gurtovoy } else { 46196e8484c5SMax Gurtovoy fence = qp->next_fence; 46206e8484c5SMax Gurtovoy } 46216e8484c5SMax Gurtovoy 4622e126ba97SEli Cohen switch (ibqp->qp_type) { 4623e126ba97SEli Cohen case IB_QPT_XRC_INI: 4624e126ba97SEli Cohen xrc = seg; 4625e126ba97SEli Cohen seg += sizeof(*xrc); 4626e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4627e126ba97SEli Cohen /* fall through */ 4628e126ba97SEli Cohen case IB_QPT_RC: 4629e126ba97SEli Cohen switch (wr->opcode) { 4630e126ba97SEli Cohen case IB_WR_RDMA_READ: 4631e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4632e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4633e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4634e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4635e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4636e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4637e126ba97SEli Cohen break; 4638e126ba97SEli Cohen 4639e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4640e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4641e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 464281bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 464381bea28fSEli Cohen err = -ENOSYS; 464481bea28fSEli Cohen *bad_wr = wr; 464581bea28fSEli Cohen goto out; 4646e126ba97SEli Cohen 4647e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4648e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4649e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4650dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4651e126ba97SEli Cohen num_sge = 0; 4652e126ba97SEli Cohen break; 4653e126ba97SEli Cohen 46548a187ee5SSagi Grimberg case IB_WR_REG_MR: 46558a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 46568a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 46578a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 46588a187ee5SSagi Grimberg if (err) { 46598a187ee5SSagi Grimberg *bad_wr = wr; 46608a187ee5SSagi Grimberg goto out; 46618a187ee5SSagi Grimberg } 46628a187ee5SSagi Grimberg num_sge = 0; 46638a187ee5SSagi Grimberg break; 46648a187ee5SSagi Grimberg 4665e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4666e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4667e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4668e6631814SSagi Grimberg 4669e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4670e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4671e6631814SSagi Grimberg if (err) { 4672e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4673e6631814SSagi Grimberg *bad_wr = wr; 4674e6631814SSagi Grimberg goto out; 4675e6631814SSagi Grimberg } 4676e6631814SSagi Grimberg 46776e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 46786e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4679e6631814SSagi Grimberg /* 4680e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4681e6631814SSagi Grimberg * on error 4682e6631814SSagi Grimberg */ 46837bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 46847bb1fafcSBart Van Assche &size, nreq, false, true); 4685e6631814SSagi Grimberg if (err) { 4686e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4687e6631814SSagi Grimberg err = -ENOMEM; 4688e6631814SSagi Grimberg *bad_wr = wr; 4689e6631814SSagi Grimberg goto out; 4690e6631814SSagi Grimberg } 4691e6631814SSagi Grimberg 4692e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4693e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4694e6631814SSagi Grimberg &size); 4695e6631814SSagi Grimberg if (err) { 4696e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4697e6631814SSagi Grimberg *bad_wr = wr; 4698e6631814SSagi Grimberg goto out; 4699e6631814SSagi Grimberg } 4700e6631814SSagi Grimberg 47016e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 47026e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 47037bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 47047bb1fafcSBart Van Assche &size, nreq, false, true); 4705e6631814SSagi Grimberg if (err) { 4706e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4707e6631814SSagi Grimberg err = -ENOMEM; 4708e6631814SSagi Grimberg *bad_wr = wr; 4709e6631814SSagi Grimberg goto out; 4710e6631814SSagi Grimberg } 4711e6631814SSagi Grimberg 4712e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4713e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4714e6631814SSagi Grimberg &size); 4715e6631814SSagi Grimberg if (err) { 4716e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4717e6631814SSagi Grimberg *bad_wr = wr; 4718e6631814SSagi Grimberg goto out; 4719e6631814SSagi Grimberg } 4720e6631814SSagi Grimberg 47216e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 47226e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 47236e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4724e6631814SSagi Grimberg num_sge = 0; 4725e6631814SSagi Grimberg goto skip_psv; 4726e6631814SSagi Grimberg 4727e126ba97SEli Cohen default: 4728e126ba97SEli Cohen break; 4729e126ba97SEli Cohen } 4730e126ba97SEli Cohen break; 4731e126ba97SEli Cohen 4732e126ba97SEli Cohen case IB_QPT_UC: 4733e126ba97SEli Cohen switch (wr->opcode) { 4734e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4735e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4736e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4737e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4738e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4739e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4740e126ba97SEli Cohen break; 4741e126ba97SEli Cohen 4742e126ba97SEli Cohen default: 4743e126ba97SEli Cohen break; 4744e126ba97SEli Cohen } 4745e126ba97SEli Cohen break; 4746e126ba97SEli Cohen 4747e126ba97SEli Cohen case IB_QPT_SMI: 47481e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 47491e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 47501e0e50b6SMaor Gottlieb err = -EPERM; 47511e0e50b6SMaor Gottlieb *bad_wr = wr; 47521e0e50b6SMaor Gottlieb goto out; 47531e0e50b6SMaor Gottlieb } 4754f6b1ee34SBart Van Assche /* fall through */ 4755d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4756e126ba97SEli Cohen set_datagram_seg(seg, wr); 4757e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4758e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4759e126ba97SEli Cohen if (unlikely((seg == qend))) 4760e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4761e126ba97SEli Cohen break; 4762f0313965SErez Shitrit case IB_QPT_UD: 4763f0313965SErez Shitrit set_datagram_seg(seg, wr); 4764f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4765f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4766e126ba97SEli Cohen 4767f0313965SErez Shitrit if (unlikely((seg == qend))) 4768f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4769f0313965SErez Shitrit 4770f0313965SErez Shitrit /* handle qp that supports ud offload */ 4771f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4772f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4773f0313965SErez Shitrit 4774f0313965SErez Shitrit pad = seg; 4775f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4776f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4777f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4778f0313965SErez Shitrit 4779f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4780f0313965SErez Shitrit 4781f0313965SErez Shitrit if (unlikely((seg == qend))) 4782f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4783f0313965SErez Shitrit } 4784f0313965SErez Shitrit break; 4785e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4786e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4787e126ba97SEli Cohen err = -EINVAL; 4788e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4789e126ba97SEli Cohen goto out; 4790e126ba97SEli Cohen } 4791e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4792e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4793c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4794c8d75a98SMajd Dibbiny if (unlikely(err)) 4795c8d75a98SMajd Dibbiny goto out; 4796e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4797e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4798e126ba97SEli Cohen if (unlikely((seg == qend))) 4799e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4800e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4801e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4802e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4803e126ba97SEli Cohen if (unlikely((seg == qend))) 4804e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4805e126ba97SEli Cohen break; 4806e126ba97SEli Cohen 4807e126ba97SEli Cohen default: 4808e126ba97SEli Cohen break; 4809e126ba97SEli Cohen } 4810e126ba97SEli Cohen 4811e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4812e126ba97SEli Cohen int uninitialized_var(sz); 4813e126ba97SEli Cohen 4814e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4815e126ba97SEli Cohen if (unlikely(err)) { 4816e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4817e126ba97SEli Cohen *bad_wr = wr; 4818e126ba97SEli Cohen goto out; 4819e126ba97SEli Cohen } 4820e126ba97SEli Cohen size += sz; 4821e126ba97SEli Cohen } else { 4822e126ba97SEli Cohen dpseg = seg; 4823e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4824e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4825e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4826e126ba97SEli Cohen dpseg = seg; 4827e126ba97SEli Cohen } 4828e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4829e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4830e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4831e126ba97SEli Cohen dpseg++; 4832e126ba97SEli Cohen } 4833e126ba97SEli Cohen } 4834e126ba97SEli Cohen } 4835e126ba97SEli Cohen 48366e8484c5SMax Gurtovoy qp->next_fence = next_fence; 48376e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 48386e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4839e6631814SSagi Grimberg skip_psv: 4840e126ba97SEli Cohen if (0) 4841e126ba97SEli Cohen dump_wqe(qp, idx, size); 4842e126ba97SEli Cohen } 4843e126ba97SEli Cohen 4844e126ba97SEli Cohen out: 4845e126ba97SEli Cohen if (likely(nreq)) { 4846e126ba97SEli Cohen qp->sq.head += nreq; 4847e126ba97SEli Cohen 4848e126ba97SEli Cohen /* Make sure that descriptors are written before 4849e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4850e126ba97SEli Cohen */ 4851e126ba97SEli Cohen wmb(); 4852e126ba97SEli Cohen 4853e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4854e126ba97SEli Cohen 4855ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4856ada388f7SEli Cohen * we hit doorbell */ 4857ada388f7SEli Cohen wmb(); 4858ada388f7SEli Cohen 48595fe9dec0SEli Cohen /* currently we support only regular doorbells */ 48605fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4861e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4862e126ba97SEli Cohen * and reach the HCA out of order. 4863e126ba97SEli Cohen */ 4864e126ba97SEli Cohen mmiowb(); 4865e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4866e126ba97SEli Cohen } 4867e126ba97SEli Cohen 4868e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4869e126ba97SEli Cohen 4870e126ba97SEli Cohen return err; 4871e126ba97SEli Cohen } 4872e126ba97SEli Cohen 4873d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4874d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 4875d0e84c0aSYishai Hadas { 4876d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 4877d0e84c0aSYishai Hadas } 4878d0e84c0aSYishai Hadas 4879e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4880e126ba97SEli Cohen { 4881e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4882e126ba97SEli Cohen } 4883e126ba97SEli Cohen 4884d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4885d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 4886e126ba97SEli Cohen { 4887e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4888e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4889e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 489089ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 489189ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4892e126ba97SEli Cohen unsigned long flags; 4893e126ba97SEli Cohen int err = 0; 4894e126ba97SEli Cohen int nreq; 4895e126ba97SEli Cohen int ind; 4896e126ba97SEli Cohen int i; 4897e126ba97SEli Cohen 48986c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 48996c75520fSParav Pandit !drain)) { 49006c75520fSParav Pandit *bad_wr = wr; 49016c75520fSParav Pandit return -EIO; 49026c75520fSParav Pandit } 49036c75520fSParav Pandit 4904d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4905d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4906d16e91daSHaggai Eran 4907e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4908e126ba97SEli Cohen 4909e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4910e126ba97SEli Cohen 4911e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4912e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4913e126ba97SEli Cohen err = -ENOMEM; 4914e126ba97SEli Cohen *bad_wr = wr; 4915e126ba97SEli Cohen goto out; 4916e126ba97SEli Cohen } 4917e126ba97SEli Cohen 4918e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4919e126ba97SEli Cohen err = -EINVAL; 4920e126ba97SEli Cohen *bad_wr = wr; 4921e126ba97SEli Cohen goto out; 4922e126ba97SEli Cohen } 4923e126ba97SEli Cohen 4924e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4925e126ba97SEli Cohen if (qp->wq_sig) 4926e126ba97SEli Cohen scat++; 4927e126ba97SEli Cohen 4928e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4929e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4930e126ba97SEli Cohen 4931e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4932e126ba97SEli Cohen scat[i].byte_count = 0; 4933e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4934e126ba97SEli Cohen scat[i].addr = 0; 4935e126ba97SEli Cohen } 4936e126ba97SEli Cohen 4937e126ba97SEli Cohen if (qp->wq_sig) { 4938e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4939e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4940e126ba97SEli Cohen } 4941e126ba97SEli Cohen 4942e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4943e126ba97SEli Cohen 4944e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4945e126ba97SEli Cohen } 4946e126ba97SEli Cohen 4947e126ba97SEli Cohen out: 4948e126ba97SEli Cohen if (likely(nreq)) { 4949e126ba97SEli Cohen qp->rq.head += nreq; 4950e126ba97SEli Cohen 4951e126ba97SEli Cohen /* Make sure that descriptors are written before 4952e126ba97SEli Cohen * doorbell record. 4953e126ba97SEli Cohen */ 4954e126ba97SEli Cohen wmb(); 4955e126ba97SEli Cohen 4956e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4957e126ba97SEli Cohen } 4958e126ba97SEli Cohen 4959e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4960e126ba97SEli Cohen 4961e126ba97SEli Cohen return err; 4962e126ba97SEli Cohen } 4963e126ba97SEli Cohen 4964d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4965d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 4966d0e84c0aSYishai Hadas { 4967d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 4968d0e84c0aSYishai Hadas } 4969d0e84c0aSYishai Hadas 4970e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4971e126ba97SEli Cohen { 4972e126ba97SEli Cohen switch (mlx5_state) { 4973e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4974e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4975e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4976e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4977e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4978e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4979e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4980e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4981e126ba97SEli Cohen default: return -1; 4982e126ba97SEli Cohen } 4983e126ba97SEli Cohen } 4984e126ba97SEli Cohen 4985e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4986e126ba97SEli Cohen { 4987e126ba97SEli Cohen switch (mlx5_mig_state) { 4988e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4989e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4990e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4991e126ba97SEli Cohen default: return -1; 4992e126ba97SEli Cohen } 4993e126ba97SEli Cohen } 4994e126ba97SEli Cohen 4995e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4996e126ba97SEli Cohen { 4997e126ba97SEli Cohen int ib_flags = 0; 4998e126ba97SEli Cohen 4999e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5000e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5001e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5002e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5003e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5004e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5005e126ba97SEli Cohen 5006e126ba97SEli Cohen return ib_flags; 5007e126ba97SEli Cohen } 5008e126ba97SEli Cohen 500938349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5010d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5011e126ba97SEli Cohen struct mlx5_qp_path *path) 5012e126ba97SEli Cohen { 5013e126ba97SEli Cohen 5014d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5015e126ba97SEli Cohen 5016e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5017e126ba97SEli Cohen return; 5018e126ba97SEli Cohen 5019ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5020ae59c3f0SLeon Romanovsky 5021d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5022d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5023e126ba97SEli Cohen 5024d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5025d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5026d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5027d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5028d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5029d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5030d8966fcdSDasaratharaman Chandramouli 5031d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5032d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5033d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5034d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5035d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5036d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5037e126ba97SEli Cohen } 5038e126ba97SEli Cohen } 5039e126ba97SEli Cohen 50406d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 50416d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 50426d2f89dfSmajd@mellanox.com u8 *sq_state) 5043e126ba97SEli Cohen { 50446d2f89dfSmajd@mellanox.com int err; 50456d2f89dfSmajd@mellanox.com 504628160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 50476d2f89dfSmajd@mellanox.com if (err) 50486d2f89dfSmajd@mellanox.com goto out; 50496d2f89dfSmajd@mellanox.com sq->state = *sq_state; 50506d2f89dfSmajd@mellanox.com 50516d2f89dfSmajd@mellanox.com out: 50526d2f89dfSmajd@mellanox.com return err; 50536d2f89dfSmajd@mellanox.com } 50546d2f89dfSmajd@mellanox.com 50556d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 50566d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 50576d2f89dfSmajd@mellanox.com u8 *rq_state) 50586d2f89dfSmajd@mellanox.com { 50596d2f89dfSmajd@mellanox.com void *out; 50606d2f89dfSmajd@mellanox.com void *rqc; 50616d2f89dfSmajd@mellanox.com int inlen; 50626d2f89dfSmajd@mellanox.com int err; 50636d2f89dfSmajd@mellanox.com 50646d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 50651b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 50666d2f89dfSmajd@mellanox.com if (!out) 50676d2f89dfSmajd@mellanox.com return -ENOMEM; 50686d2f89dfSmajd@mellanox.com 50696d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 50706d2f89dfSmajd@mellanox.com if (err) 50716d2f89dfSmajd@mellanox.com goto out; 50726d2f89dfSmajd@mellanox.com 50736d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 50746d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 50756d2f89dfSmajd@mellanox.com rq->state = *rq_state; 50766d2f89dfSmajd@mellanox.com 50776d2f89dfSmajd@mellanox.com out: 50786d2f89dfSmajd@mellanox.com kvfree(out); 50796d2f89dfSmajd@mellanox.com return err; 50806d2f89dfSmajd@mellanox.com } 50816d2f89dfSmajd@mellanox.com 50826d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 50836d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 50846d2f89dfSmajd@mellanox.com { 50856d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 50866d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 50876d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 50886d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 50896d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 50906d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 50916d2f89dfSmajd@mellanox.com }, 50926d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 50936d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 50946d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 50956d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 50966d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 50976d2f89dfSmajd@mellanox.com }, 50986d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 50996d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 51006d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 51016d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 51026d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 51036d2f89dfSmajd@mellanox.com }, 51046d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 51056d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 51066d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 51076d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 51086d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 51096d2f89dfSmajd@mellanox.com }, 51106d2f89dfSmajd@mellanox.com }; 51116d2f89dfSmajd@mellanox.com 51126d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 51136d2f89dfSmajd@mellanox.com 51146d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 51156d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 51166d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 51176d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 51186d2f89dfSmajd@mellanox.com return -EINVAL; 51196d2f89dfSmajd@mellanox.com } 51206d2f89dfSmajd@mellanox.com 51216d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 51226d2f89dfSmajd@mellanox.com *qp_state = qp->state; 51236d2f89dfSmajd@mellanox.com 51246d2f89dfSmajd@mellanox.com return 0; 51256d2f89dfSmajd@mellanox.com } 51266d2f89dfSmajd@mellanox.com 51276d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 51286d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 51296d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 51306d2f89dfSmajd@mellanox.com { 51316d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 51326d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 51336d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 51346d2f89dfSmajd@mellanox.com int err; 51356d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 51366d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 51376d2f89dfSmajd@mellanox.com 51386d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 51396d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 51406d2f89dfSmajd@mellanox.com if (err) 51416d2f89dfSmajd@mellanox.com return err; 51426d2f89dfSmajd@mellanox.com } 51436d2f89dfSmajd@mellanox.com 51446d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 51456d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 51466d2f89dfSmajd@mellanox.com if (err) 51476d2f89dfSmajd@mellanox.com return err; 51486d2f89dfSmajd@mellanox.com } 51496d2f89dfSmajd@mellanox.com 51506d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 51516d2f89dfSmajd@mellanox.com raw_packet_qp_state); 51526d2f89dfSmajd@mellanox.com } 51536d2f89dfSmajd@mellanox.com 51546d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 51556d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 51566d2f89dfSmajd@mellanox.com { 515709a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5158e126ba97SEli Cohen struct mlx5_qp_context *context; 5159e126ba97SEli Cohen int mlx5_state; 516009a7d9ecSSaeed Mahameed u32 *outb; 5161e126ba97SEli Cohen int err = 0; 5162e126ba97SEli Cohen 516309a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 51646d2f89dfSmajd@mellanox.com if (!outb) 51656d2f89dfSmajd@mellanox.com return -ENOMEM; 51666d2f89dfSmajd@mellanox.com 516719098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 516809a7d9ecSSaeed Mahameed outlen); 5169e126ba97SEli Cohen if (err) 51706d2f89dfSmajd@mellanox.com goto out; 5171e126ba97SEli Cohen 517209a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 517309a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 517409a7d9ecSSaeed Mahameed 5175e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5176e126ba97SEli Cohen 5177e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5178e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5179e126ba97SEli Cohen qp_attr->path_mig_state = 5180e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5181e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5182e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5183e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5184e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5185e126ba97SEli Cohen qp_attr->qp_access_flags = 5186e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5187e126ba97SEli Cohen 5188e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 518938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 519038349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5191d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5192d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5193d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5194d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5195e126ba97SEli Cohen } 5196e126ba97SEli Cohen 5197d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5198e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5199e126ba97SEli Cohen 5200e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5201e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5202e126ba97SEli Cohen 5203e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5204e126ba97SEli Cohen 5205e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5206e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5207e126ba97SEli Cohen qp_attr->min_rnr_timer = 5208e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5209e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5210e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5211e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5212e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 52136d2f89dfSmajd@mellanox.com 52146d2f89dfSmajd@mellanox.com out: 52156d2f89dfSmajd@mellanox.com kfree(outb); 52166d2f89dfSmajd@mellanox.com return err; 52176d2f89dfSmajd@mellanox.com } 52186d2f89dfSmajd@mellanox.com 5219776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5220776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5221776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5222776a3906SMoni Shoua { 5223776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5224776a3906SMoni Shoua u32 *out; 5225776a3906SMoni Shoua u32 access_flags = 0; 5226776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5227776a3906SMoni Shoua void *dctc; 5228776a3906SMoni Shoua int err; 5229776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5230776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5231776a3906SMoni Shoua IB_QP_PORT | 5232776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5233776a3906SMoni Shoua IB_QP_AV | 5234776a3906SMoni Shoua IB_QP_PATH_MTU | 5235776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5236776a3906SMoni Shoua 5237776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5238776a3906SMoni Shoua return -EINVAL; 5239776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5240776a3906SMoni Shoua return -EINVAL; 5241776a3906SMoni Shoua 5242776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5243776a3906SMoni Shoua if (!out) 5244776a3906SMoni Shoua return -ENOMEM; 5245776a3906SMoni Shoua 5246776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5247776a3906SMoni Shoua if (err) 5248776a3906SMoni Shoua goto out; 5249776a3906SMoni Shoua 5250776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5251776a3906SMoni Shoua 5252776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5253776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5254776a3906SMoni Shoua 5255776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5256776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5257776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5258776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5259776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5260776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5261776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5262776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5263776a3906SMoni Shoua } 5264776a3906SMoni Shoua 5265776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5266776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5267776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5268776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5269776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5270776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5271776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5272776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5273776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5274776a3906SMoni Shoua } 5275776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5276776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5277776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5278776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5279776a3906SMoni Shoua out: 5280776a3906SMoni Shoua kfree(out); 5281776a3906SMoni Shoua return err; 5282776a3906SMoni Shoua } 5283776a3906SMoni Shoua 52846d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 52856d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 52866d2f89dfSmajd@mellanox.com { 52876d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 52886d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 52896d2f89dfSmajd@mellanox.com int err = 0; 52906d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 52916d2f89dfSmajd@mellanox.com 529228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 529328d61370SYishai Hadas return -ENOSYS; 529428d61370SYishai Hadas 5295d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5296d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5297d16e91daSHaggai Eran qp_init_attr); 5298d16e91daSHaggai Eran 5299c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5300c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5301c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5302c2e53b2cSYishai Hadas 5303776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5304776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5305776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5306776a3906SMoni Shoua 53076d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 53086d2f89dfSmajd@mellanox.com 5309c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5310c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 53116d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 53126d2f89dfSmajd@mellanox.com if (err) 53136d2f89dfSmajd@mellanox.com goto out; 53146d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 53156d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 53166d2f89dfSmajd@mellanox.com } else { 53176d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 53186d2f89dfSmajd@mellanox.com if (err) 53196d2f89dfSmajd@mellanox.com goto out; 53206d2f89dfSmajd@mellanox.com } 53216d2f89dfSmajd@mellanox.com 53226d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5323e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5324e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5325e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5326e126ba97SEli Cohen 5327e126ba97SEli Cohen if (!ibqp->uobject) { 53280540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5329e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 53300540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5331e126ba97SEli Cohen } else { 5332e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5333e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5334e126ba97SEli Cohen } 5335e126ba97SEli Cohen 53360540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 53370540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 53380540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 53390540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 53400540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5341e126ba97SEli Cohen 5342e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5343e126ba97SEli Cohen 5344e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5345e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5346e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5347e126ba97SEli Cohen 5348051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5349051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5350051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5351051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5352051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5353051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5354b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5355b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5356051f2630SLeon Romanovsky 5357e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5358e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5359e126ba97SEli Cohen 5360e126ba97SEli Cohen out: 5361e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5362e126ba97SEli Cohen return err; 5363e126ba97SEli Cohen } 5364e126ba97SEli Cohen 5365e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5366e126ba97SEli Cohen struct ib_ucontext *context, 5367e126ba97SEli Cohen struct ib_udata *udata) 5368e126ba97SEli Cohen { 5369e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5370e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5371e126ba97SEli Cohen int err; 5372d00614c0SYishai Hadas u16 uid; 5373e126ba97SEli Cohen 5374938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5375e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5376e126ba97SEli Cohen 5377e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5378e126ba97SEli Cohen if (!xrcd) 5379e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5380e126ba97SEli Cohen 5381d00614c0SYishai Hadas uid = context ? to_mucontext(context)->devx_uid : 0; 5382d00614c0SYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, uid); 5383e126ba97SEli Cohen if (err) { 5384e126ba97SEli Cohen kfree(xrcd); 5385e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5386e126ba97SEli Cohen } 5387e126ba97SEli Cohen 5388d00614c0SYishai Hadas xrcd->uid = uid; 5389e126ba97SEli Cohen return &xrcd->ibxrcd; 5390e126ba97SEli Cohen } 5391e126ba97SEli Cohen 5392e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5393e126ba97SEli Cohen { 5394e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5395e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5396d00614c0SYishai Hadas u16 uid = to_mxrcd(xrcd)->uid; 5397e126ba97SEli Cohen int err; 5398e126ba97SEli Cohen 5399d00614c0SYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, uid); 5400b081808aSLeon Romanovsky if (err) 5401e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5402e126ba97SEli Cohen 5403e126ba97SEli Cohen kfree(xrcd); 5404e126ba97SEli Cohen return 0; 5405e126ba97SEli Cohen } 540679b20a6cSYishai Hadas 5407350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5408350d0e4cSYishai Hadas { 5409350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5410350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5411350d0e4cSYishai Hadas struct ib_event event; 5412350d0e4cSYishai Hadas 5413350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5414350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5415350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5416350d0e4cSYishai Hadas switch (type) { 5417350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5418350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5419350d0e4cSYishai Hadas break; 5420350d0e4cSYishai Hadas default: 5421350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5422350d0e4cSYishai Hadas return; 5423350d0e4cSYishai Hadas } 5424350d0e4cSYishai Hadas 5425350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5426350d0e4cSYishai Hadas } 5427350d0e4cSYishai Hadas } 5428350d0e4cSYishai Hadas 542903404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 543003404e8aSMaor Gottlieb { 543103404e8aSMaor Gottlieb int err = 0; 543203404e8aSMaor Gottlieb 543303404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 543403404e8aSMaor Gottlieb if (dev->delay_drop.activate) 543503404e8aSMaor Gottlieb goto out; 543603404e8aSMaor Gottlieb 543703404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 543803404e8aSMaor Gottlieb if (err) 543903404e8aSMaor Gottlieb goto out; 544003404e8aSMaor Gottlieb 544103404e8aSMaor Gottlieb dev->delay_drop.activate = true; 544203404e8aSMaor Gottlieb out: 544303404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5444fe248c3aSMaor Gottlieb 5445fe248c3aSMaor Gottlieb if (!err) 5446fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 544703404e8aSMaor Gottlieb return err; 544803404e8aSMaor Gottlieb } 544903404e8aSMaor Gottlieb 545079b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 545179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 545279b20a6cSYishai Hadas { 545379b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 54544be6da1eSNoa Osherovich int has_net_offloads; 545579b20a6cSYishai Hadas __be64 *rq_pas0; 545679b20a6cSYishai Hadas void *in; 545779b20a6cSYishai Hadas void *rqc; 545879b20a6cSYishai Hadas void *wq; 545979b20a6cSYishai Hadas int inlen; 546079b20a6cSYishai Hadas int err; 546179b20a6cSYishai Hadas 546279b20a6cSYishai Hadas dev = to_mdev(pd->device); 546379b20a6cSYishai Hadas 546479b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 54651b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 546679b20a6cSYishai Hadas if (!in) 546779b20a6cSYishai Hadas return -ENOMEM; 546879b20a6cSYishai Hadas 546934d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 547079b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 547179b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 547279b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 547379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 547479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 547579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 547679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 547779b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5478ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5479ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5480ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5481b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5482b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5483b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5484b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5485b1383aa6SNoa Osherovich goto out; 5486b1383aa6SNoa Osherovich } else { 548779b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5488b1383aa6SNoa Osherovich } 5489b1383aa6SNoa Osherovich } 549079b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5491ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5492ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5493ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5494ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5495ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5496ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5497ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5498ccc87087SNoa Osherovich } 549979b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 550079b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 550179b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 550279b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 550379b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 550479b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 55054be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5506b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 55074be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5508b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5509b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5510b1f74a84SNoa Osherovich goto out; 5511b1f74a84SNoa Osherovich } 5512b1f74a84SNoa Osherovich } else { 5513b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5514b1f74a84SNoa Osherovich } 55154be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 55164be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 55174be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 55184be6da1eSNoa Osherovich err = -EOPNOTSUPP; 55194be6da1eSNoa Osherovich goto out; 55204be6da1eSNoa Osherovich } 55214be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 55224be6da1eSNoa Osherovich } 552303404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 552403404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 552503404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 552603404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 552703404e8aSMaor Gottlieb err = -EOPNOTSUPP; 552803404e8aSMaor Gottlieb goto out; 552903404e8aSMaor Gottlieb } 553003404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 553103404e8aSMaor Gottlieb } 553279b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 553379b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5534350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 553503404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 553603404e8aSMaor Gottlieb err = set_delay_drop(dev); 553703404e8aSMaor Gottlieb if (err) { 553803404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 553903404e8aSMaor Gottlieb err); 554003404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 554103404e8aSMaor Gottlieb } else { 554203404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 554303404e8aSMaor Gottlieb } 554403404e8aSMaor Gottlieb } 5545b1f74a84SNoa Osherovich out: 554679b20a6cSYishai Hadas kvfree(in); 554779b20a6cSYishai Hadas return err; 554879b20a6cSYishai Hadas } 554979b20a6cSYishai Hadas 555079b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 555179b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 555279b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 555379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 555479b20a6cSYishai Hadas { 555579b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 555679b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 555779b20a6cSYishai Hadas return -EINVAL; 555879b20a6cSYishai Hadas 555979b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 556079b20a6cSYishai Hadas return -EINVAL; 556179b20a6cSYishai Hadas 556279b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 556379b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 55640dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 55650dfe4522SLeon Romanovsky return -EINVAL; 55660dfe4522SLeon Romanovsky 556779b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 556879b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 556979b20a6cSYishai Hadas return 0; 557079b20a6cSYishai Hadas } 557179b20a6cSYishai Hadas 557279b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 557379b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 557479b20a6cSYishai Hadas struct ib_udata *udata, 557579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 557679b20a6cSYishai Hadas { 557779b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 557879b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 557979b20a6cSYishai Hadas int err; 558079b20a6cSYishai Hadas size_t required_cmd_sz; 558179b20a6cSYishai Hadas 5582ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5583ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 558479b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 558579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 558679b20a6cSYishai Hadas return -EINVAL; 558779b20a6cSYishai Hadas } 558879b20a6cSYishai Hadas 558979b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 559079b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 559179b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 559279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 559379b20a6cSYishai Hadas return -EOPNOTSUPP; 559479b20a6cSYishai Hadas } 559579b20a6cSYishai Hadas 559679b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 559779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 559879b20a6cSYishai Hadas return -EFAULT; 559979b20a6cSYishai Hadas } 560079b20a6cSYishai Hadas 5601ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 560279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 560379b20a6cSYishai Hadas return -EOPNOTSUPP; 5604ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5605ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5606ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 560779b20a6cSYishai Hadas return -EOPNOTSUPP; 560879b20a6cSYishai Hadas } 5609ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5610ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5611ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5612ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5613ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5614ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5615ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5616ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5617ccc87087SNoa Osherovich return -EINVAL; 5618ccc87087SNoa Osherovich } 5619ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5620ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5621ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5622ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5623ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5624ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5625ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5626ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5627ccc87087SNoa Osherovich return -EINVAL; 5628ccc87087SNoa Osherovich } 5629ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5630ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5631ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5632ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5633ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5634ccc87087SNoa Osherovich } 563579b20a6cSYishai Hadas 563679b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 563779b20a6cSYishai Hadas if (err) { 563879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 563979b20a6cSYishai Hadas return err; 564079b20a6cSYishai Hadas } 564179b20a6cSYishai Hadas 564279b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 564379b20a6cSYishai Hadas if (err) { 564479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 564579b20a6cSYishai Hadas return err; 564679b20a6cSYishai Hadas } 564779b20a6cSYishai Hadas 564879b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 564979b20a6cSYishai Hadas return 0; 565079b20a6cSYishai Hadas } 565179b20a6cSYishai Hadas 565279b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 565379b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 565479b20a6cSYishai Hadas struct ib_udata *udata) 565579b20a6cSYishai Hadas { 565679b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 565779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 565879b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 565979b20a6cSYishai Hadas size_t min_resp_len; 566079b20a6cSYishai Hadas int err; 566179b20a6cSYishai Hadas 566279b20a6cSYishai Hadas if (!udata) 566379b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 566479b20a6cSYishai Hadas 566579b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 566679b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 566779b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 566879b20a6cSYishai Hadas 566979b20a6cSYishai Hadas dev = to_mdev(pd->device); 567079b20a6cSYishai Hadas switch (init_attr->wq_type) { 567179b20a6cSYishai Hadas case IB_WQT_RQ: 567279b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 567379b20a6cSYishai Hadas if (!rwq) 567479b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 567579b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 567679b20a6cSYishai Hadas if (err) 567779b20a6cSYishai Hadas goto err; 567879b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 567979b20a6cSYishai Hadas if (err) 568079b20a6cSYishai Hadas goto err_user_rq; 568179b20a6cSYishai Hadas break; 568279b20a6cSYishai Hadas default: 568379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 568479b20a6cSYishai Hadas init_attr->wq_type); 568579b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 568679b20a6cSYishai Hadas } 568779b20a6cSYishai Hadas 5688350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 568979b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 569079b20a6cSYishai Hadas if (udata->outlen) { 569179b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 569279b20a6cSYishai Hadas sizeof(resp.response_length); 569379b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 569479b20a6cSYishai Hadas if (err) 569579b20a6cSYishai Hadas goto err_copy; 569679b20a6cSYishai Hadas } 569779b20a6cSYishai Hadas 5698350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5699350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 570079b20a6cSYishai Hadas return &rwq->ibwq; 570179b20a6cSYishai Hadas 570279b20a6cSYishai Hadas err_copy: 5703350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 570479b20a6cSYishai Hadas err_user_rq: 5705fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 570679b20a6cSYishai Hadas err: 570779b20a6cSYishai Hadas kfree(rwq); 570879b20a6cSYishai Hadas return ERR_PTR(err); 570979b20a6cSYishai Hadas } 571079b20a6cSYishai Hadas 571179b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 571279b20a6cSYishai Hadas { 571379b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 571479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 571579b20a6cSYishai Hadas 5716350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5717fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 571879b20a6cSYishai Hadas kfree(rwq); 571979b20a6cSYishai Hadas 572079b20a6cSYishai Hadas return 0; 572179b20a6cSYishai Hadas } 572279b20a6cSYishai Hadas 5723c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5724c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5725c5f90929SYishai Hadas struct ib_udata *udata) 5726c5f90929SYishai Hadas { 5727c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5728c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5729c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5730c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5731c5f90929SYishai Hadas size_t min_resp_len; 5732c5f90929SYishai Hadas int inlen; 5733c5f90929SYishai Hadas int err; 5734c5f90929SYishai Hadas int i; 5735c5f90929SYishai Hadas u32 *in; 5736c5f90929SYishai Hadas void *rqtc; 5737c5f90929SYishai Hadas 5738c5f90929SYishai Hadas if (udata->inlen > 0 && 5739c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5740c5f90929SYishai Hadas udata->inlen)) 5741c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5742c5f90929SYishai Hadas 5743efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5744efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5745efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5746efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5747efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5748efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5749efd7f400SMaor Gottlieb } 5750efd7f400SMaor Gottlieb 5751c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5752c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5753c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5754c5f90929SYishai Hadas 5755c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5756c5f90929SYishai Hadas if (!rwq_ind_tbl) 5757c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5758c5f90929SYishai Hadas 5759c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 57601b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5761c5f90929SYishai Hadas if (!in) { 5762c5f90929SYishai Hadas err = -ENOMEM; 5763c5f90929SYishai Hadas goto err; 5764c5f90929SYishai Hadas } 5765c5f90929SYishai Hadas 5766c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5767c5f90929SYishai Hadas 5768c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5769c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5770c5f90929SYishai Hadas 5771c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5772c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5773c5f90929SYishai Hadas 57745deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 57755deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 57765deba86eSYishai Hadas 5777c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5778c5f90929SYishai Hadas kvfree(in); 5779c5f90929SYishai Hadas 5780c5f90929SYishai Hadas if (err) 5781c5f90929SYishai Hadas goto err; 5782c5f90929SYishai Hadas 5783c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5784c5f90929SYishai Hadas if (udata->outlen) { 5785c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5786c5f90929SYishai Hadas sizeof(resp.response_length); 5787c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5788c5f90929SYishai Hadas if (err) 5789c5f90929SYishai Hadas goto err_copy; 5790c5f90929SYishai Hadas } 5791c5f90929SYishai Hadas 5792c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5793c5f90929SYishai Hadas 5794c5f90929SYishai Hadas err_copy: 57955deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5796c5f90929SYishai Hadas err: 5797c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5798c5f90929SYishai Hadas return ERR_PTR(err); 5799c5f90929SYishai Hadas } 5800c5f90929SYishai Hadas 5801c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5802c5f90929SYishai Hadas { 5803c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5804c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5805c5f90929SYishai Hadas 58065deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5807c5f90929SYishai Hadas 5808c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5809c5f90929SYishai Hadas return 0; 5810c5f90929SYishai Hadas } 5811c5f90929SYishai Hadas 581279b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 581379b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 581479b20a6cSYishai Hadas { 581579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 581679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 581779b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 581879b20a6cSYishai Hadas size_t required_cmd_sz; 581979b20a6cSYishai Hadas int curr_wq_state; 582079b20a6cSYishai Hadas int wq_state; 582179b20a6cSYishai Hadas int inlen; 582279b20a6cSYishai Hadas int err; 582379b20a6cSYishai Hadas void *rqc; 582479b20a6cSYishai Hadas void *in; 582579b20a6cSYishai Hadas 582679b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 582779b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 582879b20a6cSYishai Hadas return -EINVAL; 582979b20a6cSYishai Hadas 583079b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 583179b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 583279b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 583379b20a6cSYishai Hadas return -EOPNOTSUPP; 583479b20a6cSYishai Hadas 583579b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 583679b20a6cSYishai Hadas return -EFAULT; 583779b20a6cSYishai Hadas 583879b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 583979b20a6cSYishai Hadas return -EOPNOTSUPP; 584079b20a6cSYishai Hadas 584179b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 58421b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 584379b20a6cSYishai Hadas if (!in) 584479b20a6cSYishai Hadas return -ENOMEM; 584579b20a6cSYishai Hadas 584679b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 584779b20a6cSYishai Hadas 584879b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 584979b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 585079b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 585179b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 585279b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 585379b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 585479b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 585579b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 585679b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 585734d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 585879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 585979b20a6cSYishai Hadas 5860b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5861b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5862b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5863b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5864b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5865b1f74a84SNoa Osherovich "supported\n"); 5866b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5867b1f74a84SNoa Osherovich goto out; 5868b1f74a84SNoa Osherovich } 5869b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5870b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5871b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5872b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5873b1f74a84SNoa Osherovich } 5874b1383aa6SNoa Osherovich 5875b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5876b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5877b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5878b1383aa6SNoa Osherovich goto out; 5879b1383aa6SNoa Osherovich } 5880b1f74a84SNoa Osherovich } 5881b1f74a84SNoa Osherovich 588223a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 588323a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 588423a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 588523a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5886e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5887e1f24a79SParav Pandit dev->port->cnts.set_id); 588823a6964eSMajd Dibbiny } else 58895a738b5dSJason Gunthorpe dev_info_once( 58905a738b5dSJason Gunthorpe &dev->ib_dev.dev, 58915a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 589223a6964eSMajd Dibbiny } 589323a6964eSMajd Dibbiny 5894350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 589579b20a6cSYishai Hadas if (!err) 589679b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 589779b20a6cSYishai Hadas 5898b1f74a84SNoa Osherovich out: 5899b1f74a84SNoa Osherovich kvfree(in); 590079b20a6cSYishai Hadas return err; 590179b20a6cSYishai Hadas } 5902d0e84c0aSYishai Hadas 5903d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 5904d0e84c0aSYishai Hadas struct ib_cqe cqe; 5905d0e84c0aSYishai Hadas struct completion done; 5906d0e84c0aSYishai Hadas }; 5907d0e84c0aSYishai Hadas 5908d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 5909d0e84c0aSYishai Hadas { 5910d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 5911d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 5912d0e84c0aSYishai Hadas cqe); 5913d0e84c0aSYishai Hadas 5914d0e84c0aSYishai Hadas complete(&cqe->done); 5915d0e84c0aSYishai Hadas } 5916d0e84c0aSYishai Hadas 5917d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 5918d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 5919d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 5920d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 5921d0e84c0aSYishai Hadas { 5922d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5923d0e84c0aSYishai Hadas 5924d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 5925d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 5926d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 5927d0e84c0aSYishai Hadas return; 5928d0e84c0aSYishai Hadas } 5929d0e84c0aSYishai Hadas 5930d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5931d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 5932d0e84c0aSYishai Hadas bool triggered = false; 5933d0e84c0aSYishai Hadas unsigned long flags; 5934d0e84c0aSYishai Hadas 5935d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 5936d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 5937d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 5938d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 5939d0e84c0aSYishai Hadas else 5940d0e84c0aSYishai Hadas triggered = true; 5941d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 5942d0e84c0aSYishai Hadas 5943d0e84c0aSYishai Hadas if (triggered) { 5944d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 5945d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 5946d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 5947d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 5948d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 5949d0e84c0aSYishai Hadas break; 5950d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 5951d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 5952d0e84c0aSYishai Hadas break; 5953d0e84c0aSYishai Hadas default: 5954d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 5955d0e84c0aSYishai Hadas } 5956d0e84c0aSYishai Hadas } 5957d0e84c0aSYishai Hadas 5958d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 5959d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 5960d0e84c0aSYishai Hadas */ 5961d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 5962d0e84c0aSYishai Hadas } 5963d0e84c0aSYishai Hadas 5964d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 5965d0e84c0aSYishai Hadas } 5966d0e84c0aSYishai Hadas 5967d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 5968d0e84c0aSYishai Hadas { 5969d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 5970d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 5971d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 5972d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 5973d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 5974d0e84c0aSYishai Hadas .wr = { 5975d0e84c0aSYishai Hadas .next = NULL, 5976d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 5977d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 5978d0e84c0aSYishai Hadas }, 5979d0e84c0aSYishai Hadas }; 5980d0e84c0aSYishai Hadas int ret; 5981d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 5982d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5983d0e84c0aSYishai Hadas 5984d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 5985d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5986d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 5987d0e84c0aSYishai Hadas return; 5988d0e84c0aSYishai Hadas } 5989d0e84c0aSYishai Hadas 5990d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 5991d0e84c0aSYishai Hadas init_completion(&sdrain.done); 5992d0e84c0aSYishai Hadas 5993d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 5994d0e84c0aSYishai Hadas if (ret) { 5995d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 5996d0e84c0aSYishai Hadas return; 5997d0e84c0aSYishai Hadas } 5998d0e84c0aSYishai Hadas 5999d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6000d0e84c0aSYishai Hadas } 6001d0e84c0aSYishai Hadas 6002d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6003d0e84c0aSYishai Hadas { 6004d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6005d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6006d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6007d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6008d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6009d0e84c0aSYishai Hadas int ret; 6010d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6011d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6012d0e84c0aSYishai Hadas 6013d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6014d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6015d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6016d0e84c0aSYishai Hadas return; 6017d0e84c0aSYishai Hadas } 6018d0e84c0aSYishai Hadas 6019d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6020d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6021d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6022d0e84c0aSYishai Hadas 6023d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6024d0e84c0aSYishai Hadas if (ret) { 6025d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6026d0e84c0aSYishai Hadas return; 6027d0e84c0aSYishai Hadas } 6028d0e84c0aSYishai Hadas 6029d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6030d0e84c0aSYishai Hadas } 6031