1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40e126ba97SEli Cohen 41e126ba97SEli Cohen /* not supported currently */ 42e126ba97SEli Cohen static int wq_signature; 43e126ba97SEli Cohen 44e126ba97SEli Cohen enum { 45e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 46e126ba97SEli Cohen }; 47e126ba97SEli Cohen 48e126ba97SEli Cohen enum { 49e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 50e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 53e126ba97SEli Cohen }; 54e126ba97SEli Cohen 55e126ba97SEli Cohen enum { 56e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 57e126ba97SEli Cohen }; 58e126ba97SEli Cohen 59e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 60e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 61f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 62e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 63e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 64e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 66e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 67e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 68e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 69e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 708a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 71e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 72e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 73e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 74e126ba97SEli Cohen }; 75e126ba97SEli Cohen 76f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 77f0313965SErez Shitrit u8 rsvd0[16]; 78f0313965SErez Shitrit }; 79e126ba97SEli Cohen 80eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 81eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 827d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 83eb49ab0cSAlex Vesker }; 84eb49ab0cSAlex Vesker 850680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 860680efa2SAlex Vesker u16 operation; 87eb49ab0cSAlex Vesker 88eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 8961147f39SBodong Wang 9061147f39SBodong Wang struct mlx5_rate_limit rl; 9161147f39SBodong Wang 92eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 930680efa2SAlex Vesker }; 940680efa2SAlex Vesker 9589ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9689ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9789ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 9889ea94a7SMaor Gottlieb 99e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 100e126ba97SEli Cohen { 101e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 102e126ba97SEli Cohen } 103e126ba97SEli Cohen 104e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 105e126ba97SEli Cohen { 106e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 107e126ba97SEli Cohen } 108e126ba97SEli Cohen 109e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 110e126ba97SEli Cohen { 111e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 112e126ba97SEli Cohen } 113e126ba97SEli Cohen 114e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 115e126ba97SEli Cohen { 116e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 117e126ba97SEli Cohen } 118e126ba97SEli Cohen 119e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 120e126ba97SEli Cohen { 121e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 122e126ba97SEli Cohen } 123e126ba97SEli Cohen 124c1395a2aSHaggai Eran /** 125c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 126c1395a2aSHaggai Eran * 127c1395a2aSHaggai Eran * @qp: QP to copy from. 128c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 129c1395a2aSHaggai Eran * otherwise. 130c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 131c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 132c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 133c1395a2aSHaggai Eran * element in the queue. 134c1395a2aSHaggai Eran * @buffer: destination buffer. 135c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 136c1395a2aSHaggai Eran * 137c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 138c1395a2aSHaggai Eran * 139c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 140c1395a2aSHaggai Eran */ 141c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14219098df2Smajd@mellanox.com void *buffer, u32 length, 14319098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 144c1395a2aSHaggai Eran { 145c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 146c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 147c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 148c1395a2aSHaggai Eran size_t offset; 149c1395a2aSHaggai Eran size_t wq_end; 15019098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 151c1395a2aSHaggai Eran u32 first_copy_length; 152c1395a2aSHaggai Eran int wqe_length; 153c1395a2aSHaggai Eran int ret; 154c1395a2aSHaggai Eran 155c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 156c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 157c1395a2aSHaggai Eran qp->ibqp.qp_type); 158c1395a2aSHaggai Eran return -EINVAL; 159c1395a2aSHaggai Eran } 160c1395a2aSHaggai Eran 161c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 162c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 163c1395a2aSHaggai Eran 164c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 165c1395a2aSHaggai Eran return -EINVAL; 166c1395a2aSHaggai Eran 167c1395a2aSHaggai Eran if (offset > umem->length || 168c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 169c1395a2aSHaggai Eran return -EINVAL; 170c1395a2aSHaggai Eran 171c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 172c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 173c1395a2aSHaggai Eran if (ret) 174c1395a2aSHaggai Eran return ret; 175c1395a2aSHaggai Eran 176c1395a2aSHaggai Eran if (send) { 177c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 178c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 179c1395a2aSHaggai Eran 180c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 181c1395a2aSHaggai Eran } else { 182c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 183c1395a2aSHaggai Eran } 184c1395a2aSHaggai Eran 185c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 186c1395a2aSHaggai Eran return first_copy_length; 187c1395a2aSHaggai Eran 188c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 189c1395a2aSHaggai Eran wqe_length - first_copy_length); 190c1395a2aSHaggai Eran if (ret) 191c1395a2aSHaggai Eran return ret; 192c1395a2aSHaggai Eran 193c1395a2aSHaggai Eran return wqe_length; 194c1395a2aSHaggai Eran } 195c1395a2aSHaggai Eran 196e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 197e126ba97SEli Cohen { 198e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 199e126ba97SEli Cohen struct ib_event event; 200e126ba97SEli Cohen 20119098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20219098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20319098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20419098df2Smajd@mellanox.com } 205e126ba97SEli Cohen 206e126ba97SEli Cohen if (ibqp->event_handler) { 207e126ba97SEli Cohen event.device = ibqp->device; 208e126ba97SEli Cohen event.element.qp = ibqp; 209e126ba97SEli Cohen switch (type) { 210e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 211e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 212e126ba97SEli Cohen break; 213e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 214e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 215e126ba97SEli Cohen break; 216e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 217e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 218e126ba97SEli Cohen break; 219e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 220e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 221e126ba97SEli Cohen break; 222e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 223e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 224e126ba97SEli Cohen break; 225e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 226e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 227e126ba97SEli Cohen break; 228e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 229e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 230e126ba97SEli Cohen break; 231e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 232e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 233e126ba97SEli Cohen break; 234e126ba97SEli Cohen default: 235e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 236e126ba97SEli Cohen return; 237e126ba97SEli Cohen } 238e126ba97SEli Cohen 239e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 240e126ba97SEli Cohen } 241e126ba97SEli Cohen } 242e126ba97SEli Cohen 243e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 244e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 245e126ba97SEli Cohen { 246e126ba97SEli Cohen int wqe_size; 247e126ba97SEli Cohen int wq_size; 248e126ba97SEli Cohen 249e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 250938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 251e126ba97SEli Cohen return -EINVAL; 252e126ba97SEli Cohen 253e126ba97SEli Cohen if (!has_rq) { 254e126ba97SEli Cohen qp->rq.max_gs = 0; 255e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 256e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2570540d814SNoa Osherovich cap->max_recv_wr = 0; 2580540d814SNoa Osherovich cap->max_recv_sge = 0; 259e126ba97SEli Cohen } else { 260e126ba97SEli Cohen if (ucmd) { 261e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 262002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 263002bf228SLeon Romanovsky return -EINVAL; 264e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 265002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 266002bf228SLeon Romanovsky return -EINVAL; 267e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 268e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 269e126ba97SEli Cohen } else { 270e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 271e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 272e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 273e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 274e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 275e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 276938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 277e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 278e126ba97SEli Cohen wqe_size, 279938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 280938fe83cSSaeed Mahameed max_wqe_sz_rq)); 281e126ba97SEli Cohen return -EINVAL; 282e126ba97SEli Cohen } 283e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 284e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 285e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 286e126ba97SEli Cohen } 287e126ba97SEli Cohen } 288e126ba97SEli Cohen 289e126ba97SEli Cohen return 0; 290e126ba97SEli Cohen } 291e126ba97SEli Cohen 292f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 293e126ba97SEli Cohen { 294618af384SAndi Shyti int size = 0; 295e126ba97SEli Cohen 296f0313965SErez Shitrit switch (attr->qp_type) { 297e126ba97SEli Cohen case IB_QPT_XRC_INI: 298b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 299e126ba97SEli Cohen /* fall through */ 300e126ba97SEli Cohen case IB_QPT_RC: 301e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30275c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 30375c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30475c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 30575c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 306e126ba97SEli Cohen break; 307e126ba97SEli Cohen 308b125a54bSEli Cohen case IB_QPT_XRC_TGT: 309b125a54bSEli Cohen return 0; 310b125a54bSEli Cohen 311e126ba97SEli Cohen case IB_QPT_UC: 312b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 31375c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3149e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31575c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 316e126ba97SEli Cohen break; 317e126ba97SEli Cohen 318e126ba97SEli Cohen case IB_QPT_UD: 319f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 320f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 321f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 322f0313965SErez Shitrit /* fall through */ 323e126ba97SEli Cohen case IB_QPT_SMI: 324d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 325b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 326e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 327e126ba97SEli Cohen break; 328e126ba97SEli Cohen 329e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 330b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 331e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 332e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 333e126ba97SEli Cohen break; 334e126ba97SEli Cohen 335e126ba97SEli Cohen default: 336e126ba97SEli Cohen return -EINVAL; 337e126ba97SEli Cohen } 338e126ba97SEli Cohen 339e126ba97SEli Cohen return size; 340e126ba97SEli Cohen } 341e126ba97SEli Cohen 342e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 343e126ba97SEli Cohen { 344e126ba97SEli Cohen int inl_size = 0; 345e126ba97SEli Cohen int size; 346e126ba97SEli Cohen 347f0313965SErez Shitrit size = sq_overhead(attr); 348e126ba97SEli Cohen if (size < 0) 349e126ba97SEli Cohen return size; 350e126ba97SEli Cohen 351e126ba97SEli Cohen if (attr->cap.max_inline_data) { 352e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 353e126ba97SEli Cohen attr->cap.max_inline_data; 354e126ba97SEli Cohen } 355e126ba97SEli Cohen 356e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 357e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 358e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 359e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 360e1e66cc2SSagi Grimberg else 361e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 362e126ba97SEli Cohen } 363e126ba97SEli Cohen 364288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 365288c01b7SEli Cohen { 366288c01b7SEli Cohen int max_sge; 367288c01b7SEli Cohen 368288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 369288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 370288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 371288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 372288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 373288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 374288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 376288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 377288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 378288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 379288c01b7SEli Cohen else 380288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 381288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 382288c01b7SEli Cohen 383288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 384288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 385288c01b7SEli Cohen } 386288c01b7SEli Cohen 387e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 388e126ba97SEli Cohen struct mlx5_ib_qp *qp) 389e126ba97SEli Cohen { 390e126ba97SEli Cohen int wqe_size; 391e126ba97SEli Cohen int wq_size; 392e126ba97SEli Cohen 393e126ba97SEli Cohen if (!attr->cap.max_send_wr) 394e126ba97SEli Cohen return 0; 395e126ba97SEli Cohen 396e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 397e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 398e126ba97SEli Cohen if (wqe_size < 0) 399e126ba97SEli Cohen return wqe_size; 400e126ba97SEli Cohen 401938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 402b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 403938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 404e126ba97SEli Cohen return -EINVAL; 405e126ba97SEli Cohen } 406e126ba97SEli Cohen 407f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 408e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 409e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 410e126ba97SEli Cohen 411e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 412e1e66cc2SSagi Grimberg qp->signature_en = true; 413e1e66cc2SSagi Grimberg 414e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 415e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 416938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4171974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4181974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 419938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 420938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 421b125a54bSEli Cohen return -ENOMEM; 422b125a54bSEli Cohen } 423e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 424288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 425288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 426288c01b7SEli Cohen return -ENOMEM; 427288c01b7SEli Cohen 428288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 429b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 430b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 431e126ba97SEli Cohen 432e126ba97SEli Cohen return wq_size; 433e126ba97SEli Cohen } 434e126ba97SEli Cohen 435e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 436e126ba97SEli Cohen struct mlx5_ib_qp *qp, 43719098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4380fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4390fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 440e126ba97SEli Cohen { 441e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 442e126ba97SEli Cohen 443938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 444e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 445938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 446e126ba97SEli Cohen return -EINVAL; 447e126ba97SEli Cohen } 448e126ba97SEli Cohen 449e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 450e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 451e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 452e126ba97SEli Cohen return -EINVAL; 453e126ba97SEli Cohen } 454e126ba97SEli Cohen 455e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 456e126ba97SEli Cohen 457938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 458e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 459938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 460938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 461e126ba97SEli Cohen return -EINVAL; 462e126ba97SEli Cohen } 463e126ba97SEli Cohen 464c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 465c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4660fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4670fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4680fb2ed66Smajd@mellanox.com } else { 46919098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 470e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4710fb2ed66Smajd@mellanox.com } 472e126ba97SEli Cohen 473e126ba97SEli Cohen return 0; 474e126ba97SEli Cohen } 475e126ba97SEli Cohen 476e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 477e126ba97SEli Cohen { 478e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 479e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 480e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 481e126ba97SEli Cohen !attr->cap.max_recv_wr) 482e126ba97SEli Cohen return 0; 483e126ba97SEli Cohen 484e126ba97SEli Cohen return 1; 485e126ba97SEli Cohen } 486e126ba97SEli Cohen 4872f5ff264SEli Cohen static int first_med_bfreg(void) 488c1be5232SEli Cohen { 489c1be5232SEli Cohen return 1; 490c1be5232SEli Cohen } 491c1be5232SEli Cohen 4920b80c14fSEli Cohen enum { 4930b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4940b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4950b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4960b80c14fSEli Cohen * "odd/even" order 4970b80c14fSEli Cohen */ 4980b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4990b80c14fSEli Cohen }; 5000b80c14fSEli Cohen 501b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 502b037c29aSEli Cohen { 50331a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 504b037c29aSEli Cohen } 505b037c29aSEli Cohen 506b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 507b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 508c1be5232SEli Cohen { 509c1be5232SEli Cohen int n; 510c1be5232SEli Cohen 511b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 512b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 513c1be5232SEli Cohen 514c1be5232SEli Cohen return n >= 0 ? n : 0; 515c1be5232SEli Cohen } 516c1be5232SEli Cohen 517b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 518b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 519c1be5232SEli Cohen { 520c1be5232SEli Cohen int med; 521c1be5232SEli Cohen 522b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 523b037c29aSEli Cohen return ++med; 524c1be5232SEli Cohen } 525c1be5232SEli Cohen 526b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 527b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 528e126ba97SEli Cohen { 529e126ba97SEli Cohen int i; 530e126ba97SEli Cohen 531b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 532b037c29aSEli Cohen if (!bfregi->count[i]) { 5332f5ff264SEli Cohen bfregi->count[i]++; 534e126ba97SEli Cohen return i; 535e126ba97SEli Cohen } 536e126ba97SEli Cohen } 537e126ba97SEli Cohen 538e126ba97SEli Cohen return -ENOMEM; 539e126ba97SEli Cohen } 540e126ba97SEli Cohen 541b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 542b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 543e126ba97SEli Cohen { 5442f5ff264SEli Cohen int minidx = first_med_bfreg(); 545e126ba97SEli Cohen int i; 546e126ba97SEli Cohen 547b037c29aSEli Cohen for (i = first_med_bfreg(); i < first_hi_bfreg(dev, bfregi); i++) { 5482f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 549e126ba97SEli Cohen minidx = i; 5500b80c14fSEli Cohen if (!bfregi->count[minidx]) 5510b80c14fSEli Cohen break; 552e126ba97SEli Cohen } 553e126ba97SEli Cohen 5542f5ff264SEli Cohen bfregi->count[minidx]++; 555e126ba97SEli Cohen return minidx; 556e126ba97SEli Cohen } 557e126ba97SEli Cohen 558b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 559b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, 560e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 561e126ba97SEli Cohen { 5622f5ff264SEli Cohen int bfregn = -EINVAL; 563e126ba97SEli Cohen 5642f5ff264SEli Cohen mutex_lock(&bfregi->lock); 565e126ba97SEli Cohen switch (lat) { 566e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 5670b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5682f5ff264SEli Cohen bfregn = 0; 5692f5ff264SEli Cohen bfregi->count[bfregn]++; 570e126ba97SEli Cohen break; 571e126ba97SEli Cohen 572e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 5732f5ff264SEli Cohen if (bfregi->ver < 2) 5742f5ff264SEli Cohen bfregn = -ENOMEM; 57578c0f98cSEli Cohen else 576b037c29aSEli Cohen bfregn = alloc_med_class_bfreg(dev, bfregi); 577e126ba97SEli Cohen break; 578e126ba97SEli Cohen 579e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 5802f5ff264SEli Cohen if (bfregi->ver < 2) 5812f5ff264SEli Cohen bfregn = -ENOMEM; 58278c0f98cSEli Cohen else 583b037c29aSEli Cohen bfregn = alloc_high_class_bfreg(dev, bfregi); 584e126ba97SEli Cohen break; 585e126ba97SEli Cohen } 5862f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 587e126ba97SEli Cohen 5882f5ff264SEli Cohen return bfregn; 589e126ba97SEli Cohen } 590e126ba97SEli Cohen 5914ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 592e126ba97SEli Cohen { 5932f5ff264SEli Cohen mutex_lock(&bfregi->lock); 594b037c29aSEli Cohen bfregi->count[bfregn]--; 5952f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 596e126ba97SEli Cohen } 597e126ba97SEli Cohen 598e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 599e126ba97SEli Cohen { 600e126ba97SEli Cohen switch (state) { 601e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 602e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 603e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 604e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 605e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 606e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 607e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 608e126ba97SEli Cohen default: return -1; 609e126ba97SEli Cohen } 610e126ba97SEli Cohen } 611e126ba97SEli Cohen 612e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 613e126ba97SEli Cohen { 614e126ba97SEli Cohen switch (type) { 615e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 616e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 617e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 618e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 619e126ba97SEli Cohen case IB_QPT_XRC_INI: 620e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 621e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 622d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 623c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 624e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 625e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6260fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 627e126ba97SEli Cohen case IB_QPT_MAX: 628e126ba97SEli Cohen default: return -EINVAL; 629e126ba97SEli Cohen } 630e126ba97SEli Cohen } 631e126ba97SEli Cohen 63289ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 63389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63489ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 63589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63689ea94a7SMaor Gottlieb 637b037c29aSEli Cohen static int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 6381ee47ab3SYishai Hadas struct mlx5_bfreg_info *bfregi, int bfregn, 6391ee47ab3SYishai Hadas bool dyn_bfreg) 640e126ba97SEli Cohen { 641b037c29aSEli Cohen int bfregs_per_sys_page; 642b037c29aSEli Cohen int index_of_sys_page; 643b037c29aSEli Cohen int offset; 644b037c29aSEli Cohen 645b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 646b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 647b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 648b037c29aSEli Cohen 6491ee47ab3SYishai Hadas if (dyn_bfreg) { 6501ee47ab3SYishai Hadas index_of_sys_page += bfregi->num_static_sys_pages; 6511ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6521ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6531ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6541ee47ab3SYishai Hadas return -EINVAL; 6551ee47ab3SYishai Hadas } 6561ee47ab3SYishai Hadas } 657b037c29aSEli Cohen 6581ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 659b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 660e126ba97SEli Cohen } 661e126ba97SEli Cohen 66219098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 66319098df2Smajd@mellanox.com struct ib_pd *pd, 66419098df2Smajd@mellanox.com unsigned long addr, size_t size, 66519098df2Smajd@mellanox.com struct ib_umem **umem, 66619098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66719098df2Smajd@mellanox.com u32 *offset) 66819098df2Smajd@mellanox.com { 66919098df2Smajd@mellanox.com int err; 67019098df2Smajd@mellanox.com 67119098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 67219098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 67319098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 67419098df2Smajd@mellanox.com return PTR_ERR(*umem); 67519098df2Smajd@mellanox.com } 67619098df2Smajd@mellanox.com 677762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67819098df2Smajd@mellanox.com 67919098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 68019098df2Smajd@mellanox.com if (err) { 68119098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 68219098df2Smajd@mellanox.com goto err_umem; 68319098df2Smajd@mellanox.com } 68419098df2Smajd@mellanox.com 68519098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68619098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68719098df2Smajd@mellanox.com 68819098df2Smajd@mellanox.com return 0; 68919098df2Smajd@mellanox.com 69019098df2Smajd@mellanox.com err_umem: 69119098df2Smajd@mellanox.com ib_umem_release(*umem); 69219098df2Smajd@mellanox.com *umem = NULL; 69319098df2Smajd@mellanox.com 69419098df2Smajd@mellanox.com return err; 69519098df2Smajd@mellanox.com } 69619098df2Smajd@mellanox.com 697fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 698fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 69979b20a6cSYishai Hadas { 70079b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70179b20a6cSYishai Hadas 702fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 703fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 704fe248c3aSMaor Gottlieb 70579b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70679b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70779b20a6cSYishai Hadas if (rwq->umem) 70879b20a6cSYishai Hadas ib_umem_release(rwq->umem); 70979b20a6cSYishai Hadas } 71079b20a6cSYishai Hadas 71179b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 71279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 71379b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 71479b20a6cSYishai Hadas { 71579b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71679b20a6cSYishai Hadas int page_shift = 0; 71779b20a6cSYishai Hadas int npages; 71879b20a6cSYishai Hadas u32 offset = 0; 71979b20a6cSYishai Hadas int ncont = 0; 72079b20a6cSYishai Hadas int err; 72179b20a6cSYishai Hadas 72279b20a6cSYishai Hadas if (!ucmd->buf_addr) 72379b20a6cSYishai Hadas return -EINVAL; 72479b20a6cSYishai Hadas 72579b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72679b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72779b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72879b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 72979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 73079b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 73179b20a6cSYishai Hadas return err; 73279b20a6cSYishai Hadas } 73379b20a6cSYishai Hadas 734762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 73579b20a6cSYishai Hadas &ncont, NULL); 73679b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73779b20a6cSYishai Hadas &rwq->rq_page_offset); 73879b20a6cSYishai Hadas if (err) { 73979b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 74079b20a6cSYishai Hadas goto err_umem; 74179b20a6cSYishai Hadas } 74279b20a6cSYishai Hadas 74379b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 74479b20a6cSYishai Hadas rwq->page_shift = page_shift; 74579b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74679b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74779b20a6cSYishai Hadas 74879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 74979b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 75079b20a6cSYishai Hadas npages, page_shift, ncont, offset); 75179b20a6cSYishai Hadas 75279b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 75379b20a6cSYishai Hadas if (err) { 75479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 75579b20a6cSYishai Hadas goto err_umem; 75679b20a6cSYishai Hadas } 75779b20a6cSYishai Hadas 75879b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 75979b20a6cSYishai Hadas return 0; 76079b20a6cSYishai Hadas 76179b20a6cSYishai Hadas err_umem: 76279b20a6cSYishai Hadas ib_umem_release(rwq->umem); 76379b20a6cSYishai Hadas return err; 76479b20a6cSYishai Hadas } 76579b20a6cSYishai Hadas 766b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 767b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 768b037c29aSEli Cohen { 769b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 770b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 771b037c29aSEli Cohen } 772b037c29aSEli Cohen 773e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 774e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7750fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77609a7d9ecSSaeed Mahameed u32 **in, 77719098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77819098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 779e126ba97SEli Cohen { 780e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 781e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 78219098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7839e9c47d0SEli Cohen int page_shift = 0; 7841ee47ab3SYishai Hadas int uar_index = 0; 785e126ba97SEli Cohen int npages; 7869e9c47d0SEli Cohen u32 offset = 0; 7872f5ff264SEli Cohen int bfregn; 7889e9c47d0SEli Cohen int ncont = 0; 78909a7d9ecSSaeed Mahameed __be64 *pas; 79009a7d9ecSSaeed Mahameed void *qpc; 791e126ba97SEli Cohen int err; 792e126ba97SEli Cohen 793e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 794e126ba97SEli Cohen if (err) { 795e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 796e126ba97SEli Cohen return err; 797e126ba97SEli Cohen } 798e126ba97SEli Cohen 799e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 8001ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8011ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8021ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8031ee47ab3SYishai Hadas if (uar_index < 0) 8041ee47ab3SYishai Hadas return uar_index; 8051ee47ab3SYishai Hadas 8061ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8071ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 808e126ba97SEli Cohen /* 809e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 810e126ba97SEli Cohen */ 811051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8122f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8131ee47ab3SYishai Hadas } 814051f2630SLeon Romanovsky else { 815b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_HIGH); 8162f5ff264SEli Cohen if (bfregn < 0) { 8172f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency BFREG\n"); 818c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 819b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_MEDIUM); 8202f5ff264SEli Cohen if (bfregn < 0) { 8212f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency BFREG\n"); 822e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 823b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_LOW); 8242f5ff264SEli Cohen if (bfregn < 0) { 8252f5ff264SEli Cohen mlx5_ib_warn(dev, "bfreg allocation failed\n"); 8262f5ff264SEli Cohen return bfregn; 827e126ba97SEli Cohen } 828e126ba97SEli Cohen } 829c1be5232SEli Cohen } 830051f2630SLeon Romanovsky } 831e126ba97SEli Cohen 8322f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8331ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8341ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8351ee47ab3SYishai Hadas false); 836e126ba97SEli Cohen 83748fea837SHaggai Eran qp->rq.offset = 0; 83848fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 83948fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 84048fea837SHaggai Eran 8410fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 842e126ba97SEli Cohen if (err) 8432f5ff264SEli Cohen goto err_bfreg; 844e126ba97SEli Cohen 84519098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 84619098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 84719098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 84819098df2Smajd@mellanox.com ubuffer->buf_size, 84919098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 85019098df2Smajd@mellanox.com &ncont, &offset); 85119098df2Smajd@mellanox.com if (err) 8522f5ff264SEli Cohen goto err_bfreg; 8539e9c47d0SEli Cohen } else { 85419098df2Smajd@mellanox.com ubuffer->umem = NULL; 8559e9c47d0SEli Cohen } 856e126ba97SEli Cohen 85709a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 85809a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8591b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 860e126ba97SEli Cohen if (!*in) { 861e126ba97SEli Cohen err = -ENOMEM; 862e126ba97SEli Cohen goto err_umem; 863e126ba97SEli Cohen } 864e126ba97SEli Cohen 86509a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 86609a7d9ecSSaeed Mahameed if (ubuffer->umem) 86709a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 86809a7d9ecSSaeed Mahameed 86909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 87009a7d9ecSSaeed Mahameed 87109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 87209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 87309a7d9ecSSaeed Mahameed 87409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8751ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 876b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8771ee47ab3SYishai Hadas else 8781ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8792f5ff264SEli Cohen qp->bfregn = bfregn; 880e126ba97SEli Cohen 881e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 882e126ba97SEli Cohen if (err) { 883e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 884e126ba97SEli Cohen goto err_free; 885e126ba97SEli Cohen } 886e126ba97SEli Cohen 88741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 888e126ba97SEli Cohen if (err) { 889e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 890e126ba97SEli Cohen goto err_unmap; 891e126ba97SEli Cohen } 892e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 893e126ba97SEli Cohen 894e126ba97SEli Cohen return 0; 895e126ba97SEli Cohen 896e126ba97SEli Cohen err_unmap: 897e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 898e126ba97SEli Cohen 899e126ba97SEli Cohen err_free: 900479163f4SAl Viro kvfree(*in); 901e126ba97SEli Cohen 902e126ba97SEli Cohen err_umem: 90319098df2Smajd@mellanox.com if (ubuffer->umem) 90419098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 905e126ba97SEli Cohen 9062f5ff264SEli Cohen err_bfreg: 9071ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9084ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 909e126ba97SEli Cohen return err; 910e126ba97SEli Cohen } 911e126ba97SEli Cohen 912b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 913b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 914e126ba97SEli Cohen { 915e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 916e126ba97SEli Cohen 917e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 918e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 91919098df2Smajd@mellanox.com if (base->ubuffer.umem) 92019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9211ee47ab3SYishai Hadas 9221ee47ab3SYishai Hadas /* 9231ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9241ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9251ee47ab3SYishai Hadas */ 9261ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9274ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 928e126ba97SEli Cohen } 929e126ba97SEli Cohen 930e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 931e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 932e126ba97SEli Cohen struct mlx5_ib_qp *qp, 93309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 93419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 935e126ba97SEli Cohen { 936e126ba97SEli Cohen int uar_index; 93709a7d9ecSSaeed Mahameed void *qpc; 938e126ba97SEli Cohen int err; 939e126ba97SEli Cohen 940f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 941f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 942b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 94393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 944b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9451a4c3a3dSEli Cohen return -EINVAL; 946e126ba97SEli Cohen 947e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9485fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9495fe9dec0SEli Cohen else 9505fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 951e126ba97SEli Cohen 952d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 953d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 954d8030b0dSEli Cohen */ 955d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9565fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 957e126ba97SEli Cohen 958e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 959e126ba97SEli Cohen if (err < 0) { 960e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9615fe9dec0SEli Cohen return err; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 964e126ba97SEli Cohen qp->rq.offset = 0; 965e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 96619098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 967e126ba97SEli Cohen 96819098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 969e126ba97SEli Cohen if (err) { 970e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9715fe9dec0SEli Cohen return err; 972e126ba97SEli Cohen } 973e126ba97SEli Cohen 974e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 97509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 97609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9771b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 978e126ba97SEli Cohen if (!*in) { 979e126ba97SEli Cohen err = -ENOMEM; 980e126ba97SEli Cohen goto err_buf; 981e126ba97SEli Cohen } 98209a7d9ecSSaeed Mahameed 98309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 98409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 98509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 98609a7d9ecSSaeed Mahameed 987e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 98809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 98909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 990e126ba97SEli Cohen 991b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 99209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 993b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 994b11a4f9cSHaggai Eran } 995b11a4f9cSHaggai Eran 99609a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 99709a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 998e126ba97SEli Cohen 9999603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1000e126ba97SEli Cohen if (err) { 1001e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1002e126ba97SEli Cohen goto err_free; 1003e126ba97SEli Cohen } 1004e126ba97SEli Cohen 1005b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1006b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1007b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1008b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1009b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1010b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1011b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1012b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1013b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1014b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1015e126ba97SEli Cohen 1016e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1017e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1018e126ba97SEli Cohen err = -ENOMEM; 1019e126ba97SEli Cohen goto err_wrid; 1020e126ba97SEli Cohen } 1021e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1022e126ba97SEli Cohen 1023e126ba97SEli Cohen return 0; 1024e126ba97SEli Cohen 1025e126ba97SEli Cohen err_wrid: 1026b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1027b5883008SLi Dongyang kvfree(qp->sq.w_list); 1028b5883008SLi Dongyang kvfree(qp->sq.wrid); 1029b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1030b5883008SLi Dongyang kvfree(qp->rq.wrid); 1031f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1032e126ba97SEli Cohen 1033e126ba97SEli Cohen err_free: 1034479163f4SAl Viro kvfree(*in); 1035e126ba97SEli Cohen 1036e126ba97SEli Cohen err_buf: 10379603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1038e126ba97SEli Cohen return err; 1039e126ba97SEli Cohen } 1040e126ba97SEli Cohen 1041e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1042e126ba97SEli Cohen { 1043b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1044b5883008SLi Dongyang kvfree(qp->sq.w_list); 1045b5883008SLi Dongyang kvfree(qp->sq.wrid); 1046b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1047b5883008SLi Dongyang kvfree(qp->rq.wrid); 1048f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10499603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1050e126ba97SEli Cohen } 1051e126ba97SEli Cohen 105209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1053e126ba97SEli Cohen { 1054e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1055c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1056e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 105709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1058e126ba97SEli Cohen else if (!qp->has_rq) 105909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1060e126ba97SEli Cohen else 106109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1062e126ba97SEli Cohen } 1063e126ba97SEli Cohen 1064e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1065e126ba97SEli Cohen { 1066e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1067e126ba97SEli Cohen return 1; 1068e126ba97SEli Cohen 1069e126ba97SEli Cohen return 0; 1070e126ba97SEli Cohen } 1071e126ba97SEli Cohen 10720fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1073c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10740fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 10750fb2ed66Smajd@mellanox.com { 1076c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10770fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10780fb2ed66Smajd@mellanox.com 10790fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1080c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1081c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1082c2e53b2cSYishai Hadas 10830fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10840fb2ed66Smajd@mellanox.com } 10850fb2ed66Smajd@mellanox.com 10860fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10870fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10880fb2ed66Smajd@mellanox.com { 10890fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 10900fb2ed66Smajd@mellanox.com } 10910fb2ed66Smajd@mellanox.com 1092b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1093b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1094b96c9ddeSMark Bloch { 1095b96c9ddeSMark Bloch if (sq->flow_rule) 1096b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1097b96c9ddeSMark Bloch } 1098b96c9ddeSMark Bloch 10990fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11000fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 11010fb2ed66Smajd@mellanox.com struct ib_pd *pd) 11020fb2ed66Smajd@mellanox.com { 11030fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 11040fb2ed66Smajd@mellanox.com __be64 *pas; 11050fb2ed66Smajd@mellanox.com void *in; 11060fb2ed66Smajd@mellanox.com void *sqc; 11070fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11080fb2ed66Smajd@mellanox.com void *wq; 11090fb2ed66Smajd@mellanox.com int inlen; 11100fb2ed66Smajd@mellanox.com int err; 11110fb2ed66Smajd@mellanox.com int page_shift = 0; 11120fb2ed66Smajd@mellanox.com int npages; 11130fb2ed66Smajd@mellanox.com int ncont = 0; 11140fb2ed66Smajd@mellanox.com u32 offset = 0; 11150fb2ed66Smajd@mellanox.com 11160fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11170fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11180fb2ed66Smajd@mellanox.com &ncont, &offset); 11190fb2ed66Smajd@mellanox.com if (err) 11200fb2ed66Smajd@mellanox.com return err; 11210fb2ed66Smajd@mellanox.com 11220fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11231b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11240fb2ed66Smajd@mellanox.com if (!in) { 11250fb2ed66Smajd@mellanox.com err = -ENOMEM; 11260fb2ed66Smajd@mellanox.com goto err_umem; 11270fb2ed66Smajd@mellanox.com } 11280fb2ed66Smajd@mellanox.com 11290fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1131795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1132795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11330fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11340fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11350fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11360fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11370fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113896dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113996dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 114096dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11410fb2ed66Smajd@mellanox.com 11420fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11450fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11460fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11470fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11480fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11490fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11500fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11510fb2ed66Smajd@mellanox.com 11520fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11530fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11540fb2ed66Smajd@mellanox.com 11550fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11560fb2ed66Smajd@mellanox.com 11570fb2ed66Smajd@mellanox.com kvfree(in); 11580fb2ed66Smajd@mellanox.com 11590fb2ed66Smajd@mellanox.com if (err) 11600fb2ed66Smajd@mellanox.com goto err_umem; 11610fb2ed66Smajd@mellanox.com 1162b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1163b96c9ddeSMark Bloch if (err) 1164b96c9ddeSMark Bloch goto err_flow; 1165b96c9ddeSMark Bloch 11660fb2ed66Smajd@mellanox.com return 0; 11670fb2ed66Smajd@mellanox.com 1168b96c9ddeSMark Bloch err_flow: 1169b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1170b96c9ddeSMark Bloch 11710fb2ed66Smajd@mellanox.com err_umem: 11720fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11730fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11740fb2ed66Smajd@mellanox.com 11750fb2ed66Smajd@mellanox.com return err; 11760fb2ed66Smajd@mellanox.com } 11770fb2ed66Smajd@mellanox.com 11780fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11790fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11800fb2ed66Smajd@mellanox.com { 1181b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11820fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11830fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11840fb2ed66Smajd@mellanox.com } 11850fb2ed66Smajd@mellanox.com 11862c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11870fb2ed66Smajd@mellanox.com { 11880fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11890fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11900fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11910fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11920fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11930fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11940fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11950fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11960fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11970fb2ed66Smajd@mellanox.com 11980fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11990fb2ed66Smajd@mellanox.com } 12000fb2ed66Smajd@mellanox.com 12010fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12022c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 12032c292dbbSBoris Pismenny size_t qpinlen) 12040fb2ed66Smajd@mellanox.com { 1205358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12060fb2ed66Smajd@mellanox.com __be64 *pas; 12070fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12080fb2ed66Smajd@mellanox.com void *in; 12090fb2ed66Smajd@mellanox.com void *rqc; 12100fb2ed66Smajd@mellanox.com void *wq; 12110fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12122c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12132c292dbbSBoris Pismenny size_t inlen; 12140fb2ed66Smajd@mellanox.com int err; 12152c292dbbSBoris Pismenny 12162c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12172c292dbbSBoris Pismenny return -EINVAL; 12180fb2ed66Smajd@mellanox.com 12190fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12201b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12210fb2ed66Smajd@mellanox.com if (!in) 12220fb2ed66Smajd@mellanox.com return -ENOMEM; 12230fb2ed66Smajd@mellanox.com 12240fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1225e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12260fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12270fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12280fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12290fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12300fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12310fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12320fb2ed66Smajd@mellanox.com 1233358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1234358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1235358e42eaSMajd Dibbiny 12360fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1238b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1239b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12420fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12450fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12460fb2ed66Smajd@mellanox.com 12470fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12480fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12490fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12500fb2ed66Smajd@mellanox.com 12510fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12520fb2ed66Smajd@mellanox.com 12530fb2ed66Smajd@mellanox.com kvfree(in); 12540fb2ed66Smajd@mellanox.com 12550fb2ed66Smajd@mellanox.com return err; 12560fb2ed66Smajd@mellanox.com } 12570fb2ed66Smajd@mellanox.com 12580fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12590fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12600fb2ed66Smajd@mellanox.com { 12610fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12620fb2ed66Smajd@mellanox.com } 12630fb2ed66Smajd@mellanox.com 1264f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1265f95ef6cbSMaor Gottlieb { 1266f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1267f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1268f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1269f95ef6cbSMaor Gottlieb } 1270f95ef6cbSMaor Gottlieb 12710fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1272f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1273f95ef6cbSMaor Gottlieb bool tunnel_offload_en) 12740fb2ed66Smajd@mellanox.com { 12750fb2ed66Smajd@mellanox.com u32 *in; 12760fb2ed66Smajd@mellanox.com void *tirc; 12770fb2ed66Smajd@mellanox.com int inlen; 12780fb2ed66Smajd@mellanox.com int err; 12790fb2ed66Smajd@mellanox.com 12800fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12811b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12820fb2ed66Smajd@mellanox.com if (!in) 12830fb2ed66Smajd@mellanox.com return -ENOMEM; 12840fb2ed66Smajd@mellanox.com 12850fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12860fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12870fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12880fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1289f95ef6cbSMaor Gottlieb if (tunnel_offload_en) 1290f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 12910fb2ed66Smajd@mellanox.com 1292ec9c2fb8SMark Bloch if (dev->rep) 1293ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1294ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1295ec9c2fb8SMark Bloch 12960fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 12970fb2ed66Smajd@mellanox.com 12980fb2ed66Smajd@mellanox.com kvfree(in); 12990fb2ed66Smajd@mellanox.com 13000fb2ed66Smajd@mellanox.com return err; 13010fb2ed66Smajd@mellanox.com } 13020fb2ed66Smajd@mellanox.com 13030fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13040fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13050fb2ed66Smajd@mellanox.com { 13060fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 13070fb2ed66Smajd@mellanox.com } 13080fb2ed66Smajd@mellanox.com 13090fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13102c292dbbSBoris Pismenny u32 *in, size_t inlen, 13110fb2ed66Smajd@mellanox.com struct ib_pd *pd) 13120fb2ed66Smajd@mellanox.com { 13130fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13140fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13150fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13160fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13170fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13180fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13190fb2ed66Smajd@mellanox.com int err; 13200fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13210fb2ed66Smajd@mellanox.com 13220fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 1323c2e53b2cSYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn); 13240fb2ed66Smajd@mellanox.com if (err) 13250fb2ed66Smajd@mellanox.com return err; 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13280fb2ed66Smajd@mellanox.com if (err) 13290fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13300fb2ed66Smajd@mellanox.com 13310fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13321d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13330fb2ed66Smajd@mellanox.com } 13340fb2ed66Smajd@mellanox.com 13350fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1336358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1337358e42eaSMajd Dibbiny 1338e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1339e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1340b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1341b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 13422c292dbbSBoris Pismenny err = create_raw_packet_qp_rq(dev, rq, in, inlen); 13430fb2ed66Smajd@mellanox.com if (err) 13440fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13450fb2ed66Smajd@mellanox.com 13460fb2ed66Smajd@mellanox.com 1347f95ef6cbSMaor Gottlieb err = create_raw_packet_qp_tir(dev, rq, tdn, 1348f95ef6cbSMaor Gottlieb qp->tunnel_offload_en); 13490fb2ed66Smajd@mellanox.com if (err) 13500fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13510fb2ed66Smajd@mellanox.com } 13520fb2ed66Smajd@mellanox.com 13530fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13540fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13550fb2ed66Smajd@mellanox.com 13560fb2ed66Smajd@mellanox.com return 0; 13570fb2ed66Smajd@mellanox.com 13580fb2ed66Smajd@mellanox.com err_destroy_rq: 13590fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13600fb2ed66Smajd@mellanox.com err_destroy_sq: 13610fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 13620fb2ed66Smajd@mellanox.com return err; 13630fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13640fb2ed66Smajd@mellanox.com err_destroy_tis: 13650fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13660fb2ed66Smajd@mellanox.com 13670fb2ed66Smajd@mellanox.com return err; 13680fb2ed66Smajd@mellanox.com } 13690fb2ed66Smajd@mellanox.com 13700fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 13710fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 13720fb2ed66Smajd@mellanox.com { 13730fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13740fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13750fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13760fb2ed66Smajd@mellanox.com 13770fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 13780fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 13790fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13800fb2ed66Smajd@mellanox.com } 13810fb2ed66Smajd@mellanox.com 13820fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13830fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13840fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13850fb2ed66Smajd@mellanox.com } 13860fb2ed66Smajd@mellanox.com } 13870fb2ed66Smajd@mellanox.com 13880fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 13890fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 13900fb2ed66Smajd@mellanox.com { 13910fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13920fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13930fb2ed66Smajd@mellanox.com 13940fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 13950fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 13960fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 13970fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 13980fb2ed66Smajd@mellanox.com } 13990fb2ed66Smajd@mellanox.com 140028d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 140128d61370SYishai Hadas { 140228d61370SYishai Hadas mlx5_core_destroy_tir(dev->mdev, qp->rss_qp.tirn); 140328d61370SYishai Hadas } 140428d61370SYishai Hadas 140528d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 140628d61370SYishai Hadas struct ib_pd *pd, 140728d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 140828d61370SYishai Hadas struct ib_udata *udata) 140928d61370SYishai Hadas { 141028d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 141128d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 141228d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 141328d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 141428d61370SYishai Hadas int inlen; 141528d61370SYishai Hadas int err; 141628d61370SYishai Hadas u32 *in; 141728d61370SYishai Hadas void *tirc; 141828d61370SYishai Hadas void *hfso; 141928d61370SYishai Hadas u32 selected_fields = 0; 14202d93fc85SMatan Barak u32 outer_l4; 142128d61370SYishai Hadas size_t min_resp_len; 142228d61370SYishai Hadas u32 tdn = mucontext->tdn; 142328d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 142428d61370SYishai Hadas size_t required_cmd_sz; 142528d61370SYishai Hadas 142628d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 142728d61370SYishai Hadas return -EOPNOTSUPP; 142828d61370SYishai Hadas 142928d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 143028d61370SYishai Hadas return -EINVAL; 143128d61370SYishai Hadas 14322f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 143328d61370SYishai Hadas if (udata->outlen < min_resp_len) 143428d61370SYishai Hadas return -EINVAL; 143528d61370SYishai Hadas 1436f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 143728d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 143828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 143928d61370SYishai Hadas return -EINVAL; 144028d61370SYishai Hadas } 144128d61370SYishai Hadas 144228d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 144328d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 144428d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 144528d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 144628d61370SYishai Hadas return -EOPNOTSUPP; 144728d61370SYishai Hadas } 144828d61370SYishai Hadas 144928d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 145028d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 145128d61370SYishai Hadas return -EFAULT; 145228d61370SYishai Hadas } 145328d61370SYishai Hadas 145428d61370SYishai Hadas if (ucmd.comp_mask) { 145528d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 145628d61370SYishai Hadas return -EOPNOTSUPP; 145728d61370SYishai Hadas } 145828d61370SYishai Hadas 1459f95ef6cbSMaor Gottlieb if (ucmd.flags & ~MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1460f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1461f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1462f95ef6cbSMaor Gottlieb } 1463f95ef6cbSMaor Gottlieb 1464f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1465f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1466f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 146728d61370SYishai Hadas return -EOPNOTSUPP; 146828d61370SYishai Hadas } 146928d61370SYishai Hadas 1470309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1471309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1472309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1473309fa347SMaor Gottlieb return -EOPNOTSUPP; 1474309fa347SMaor Gottlieb } 1475309fa347SMaor Gottlieb 147641d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 147728d61370SYishai Hadas if (err) { 147828d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 147928d61370SYishai Hadas return -EINVAL; 148028d61370SYishai Hadas } 148128d61370SYishai Hadas 148228d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14831b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 148428d61370SYishai Hadas if (!in) 148528d61370SYishai Hadas return -ENOMEM; 148628d61370SYishai Hadas 148728d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 148828d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 148928d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 149028d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 149128d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 149228d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 149328d61370SYishai Hadas 149428d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1495f95ef6cbSMaor Gottlieb 1496f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1497f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1498f95ef6cbSMaor Gottlieb 1499309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1500309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1501309fa347SMaor Gottlieb else 1502309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1503309fa347SMaor Gottlieb 150428d61370SYishai Hadas switch (ucmd.rx_hash_function) { 150528d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 150628d61370SYishai Hadas { 150728d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 150828d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 150928d61370SYishai Hadas 151028d61370SYishai Hadas if (len != ucmd.rx_key_len) { 151128d61370SYishai Hadas err = -EINVAL; 151228d61370SYishai Hadas goto err; 151328d61370SYishai Hadas } 151428d61370SYishai Hadas 151528d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 151628d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 151728d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 151828d61370SYishai Hadas break; 151928d61370SYishai Hadas } 152028d61370SYishai Hadas default: 152128d61370SYishai Hadas err = -EOPNOTSUPP; 152228d61370SYishai Hadas goto err; 152328d61370SYishai Hadas } 152428d61370SYishai Hadas 152528d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 152628d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 152728d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 152828d61370SYishai Hadas goto create_tir; 152928d61370SYishai Hadas err = -EINVAL; 153028d61370SYishai Hadas goto err; 153128d61370SYishai Hadas } 153228d61370SYishai Hadas 153328d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 153428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 153528d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 153628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 153728d61370SYishai Hadas err = -EINVAL; 153828d61370SYishai Hadas goto err; 153928d61370SYishai Hadas } 154028d61370SYishai Hadas 154128d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 154228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 154328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 154428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 154528d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 154628d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 154728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 154828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 154928d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 155028d61370SYishai Hadas 15512d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 15522d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 155328d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 15542d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 15552d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 15562d93fc85SMatan Barak 15572d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 15582d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 155928d61370SYishai Hadas err = -EINVAL; 156028d61370SYishai Hadas goto err; 156128d61370SYishai Hadas } 156228d61370SYishai Hadas 156328d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 156428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 156528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 156628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 156728d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 156828d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 156928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 157028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 157128d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 157228d61370SYishai Hadas 157328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 157428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 157528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 157628d61370SYishai Hadas 157728d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 157828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 157928d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 158028d61370SYishai Hadas 158128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 158228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 158328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 158428d61370SYishai Hadas 158528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 158628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 158728d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 158828d61370SYishai Hadas 15892d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 15902d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 15912d93fc85SMatan Barak 159228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 159328d61370SYishai Hadas 159428d61370SYishai Hadas create_tir: 1595ec9c2fb8SMark Bloch if (dev->rep) 1596ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1597ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1598ec9c2fb8SMark Bloch 159928d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 160028d61370SYishai Hadas 160128d61370SYishai Hadas if (err) 160228d61370SYishai Hadas goto err; 160328d61370SYishai Hadas 160428d61370SYishai Hadas kvfree(in); 160528d61370SYishai Hadas /* qpn is reserved for that QP */ 160628d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1607d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 160828d61370SYishai Hadas return 0; 160928d61370SYishai Hadas 161028d61370SYishai Hadas err: 161128d61370SYishai Hadas kvfree(in); 161228d61370SYishai Hadas return err; 161328d61370SYishai Hadas } 161428d61370SYishai Hadas 1615e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1616e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1617e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1618e126ba97SEli Cohen { 1619e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 162009a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1621938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 1622e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 162389ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 162489ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 162589ea94a7SMaor Gottlieb unsigned long flags; 1626cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 162709a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 162809a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1629e7b169f3SNoa Osherovich int mlx5_st; 1630cfb5e088SHaggai Abramovsky void *qpc; 163109a7d9ecSSaeed Mahameed u32 *in; 163209a7d9ecSSaeed Mahameed int err; 1633e126ba97SEli Cohen 1634e126ba97SEli Cohen mutex_init(&qp->mutex); 1635e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1636e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1637e126ba97SEli Cohen 1638e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1639e7b169f3SNoa Osherovich if (mlx5_st < 0) 1640e7b169f3SNoa Osherovich return -EINVAL; 1641e7b169f3SNoa Osherovich 164228d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 164328d61370SYishai Hadas if (!udata) 164428d61370SYishai Hadas return -ENOSYS; 164528d61370SYishai Hadas 164628d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 164728d61370SYishai Hadas return err; 164828d61370SYishai Hadas } 164928d61370SYishai Hadas 1650f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1651938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1652f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1653f360d88aSEli Cohen return -EINVAL; 1654f360d88aSEli Cohen } else { 1655f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1656f360d88aSEli Cohen } 1657f360d88aSEli Cohen } 1658f360d88aSEli Cohen 1659051f2630SLeon Romanovsky if (init_attr->create_flags & 1660051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1661051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1662051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1663051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1664051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1665051f2630SLeon Romanovsky return -EINVAL; 1666051f2630SLeon Romanovsky } 1667051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1668051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1669051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1670051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1671051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1672051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1673051f2630SLeon Romanovsky } 1674f0313965SErez Shitrit 1675f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1676f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1677f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1678f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1679f0313965SErez Shitrit return -EOPNOTSUPP; 1680f0313965SErez Shitrit } 1681f0313965SErez Shitrit 1682358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1683358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1684358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1685358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1686358e42eaSMajd Dibbiny } 1687358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1688358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1689358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1690358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1691358e42eaSMajd Dibbiny } 1692358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1693358e42eaSMajd Dibbiny } 1694358e42eaSMajd Dibbiny 1695e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1696e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1697e126ba97SEli Cohen 1698e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1699e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1700e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1701e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1702e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1703e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1704e4cc4fa7SNoa Osherovich } 1705e4cc4fa7SNoa Osherovich 1706e126ba97SEli Cohen if (pd && pd->uobject) { 1707e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1708e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1709e126ba97SEli Cohen return -EFAULT; 1710e126ba97SEli Cohen } 1711e126ba97SEli Cohen 1712cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1713cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1714cfb5e088SHaggai Abramovsky if (err) 1715cfb5e088SHaggai Abramovsky return err; 1716cfb5e088SHaggai Abramovsky 1717e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1718e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1719f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1720f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1721f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1722f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1723f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1724f95ef6cbSMaor Gottlieb } 1725f95ef6cbSMaor Gottlieb qp->tunnel_offload_en = true; 1726f95ef6cbSMaor Gottlieb } 1727c2e53b2cSYishai Hadas 1728c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1729c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1730c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1731c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1732c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1733c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1734c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1735c2e53b2cSYishai Hadas } 1736c2e53b2cSYishai Hadas 1737c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1738c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1739c2e53b2cSYishai Hadas } 1740e126ba97SEli Cohen } else { 1741e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1742e126ba97SEli Cohen } 1743e126ba97SEli Cohen 1744c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1745c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1746c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1747c2e53b2cSYishai Hadas &qp->trans_qp.base; 1748c2e53b2cSYishai Hadas 1749e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1750e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1751e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1752e126ba97SEli Cohen if (err) { 1753e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1754e126ba97SEli Cohen return err; 1755e126ba97SEli Cohen } 1756e126ba97SEli Cohen 1757e126ba97SEli Cohen if (pd) { 1758e126ba97SEli Cohen if (pd->uobject) { 1759938fe83cSSaeed Mahameed __u32 max_wqes = 1760938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1761e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1762e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1763e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1764e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1765e126ba97SEli Cohen return -EINVAL; 1766e126ba97SEli Cohen } 1767938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1768e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1769938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1770e126ba97SEli Cohen return -EINVAL; 1771e126ba97SEli Cohen } 1772b11a4f9cSHaggai Eran if (init_attr->create_flags & 1773b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1774b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1775b11a4f9cSHaggai Eran return -EINVAL; 1776b11a4f9cSHaggai Eran } 17770fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 17780fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1779e126ba97SEli Cohen if (err) 1780e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1781e126ba97SEli Cohen } else { 178219098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 178319098df2Smajd@mellanox.com base); 1784e126ba97SEli Cohen if (err) 1785e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1786e126ba97SEli Cohen } 1787e126ba97SEli Cohen 1788e126ba97SEli Cohen if (err) 1789e126ba97SEli Cohen return err; 1790e126ba97SEli Cohen } else { 17911b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1792e126ba97SEli Cohen if (!in) 1793e126ba97SEli Cohen return -ENOMEM; 1794e126ba97SEli Cohen 1795e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1796e126ba97SEli Cohen } 1797e126ba97SEli Cohen 1798e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1799e126ba97SEli Cohen qp->port = init_attr->port_num; 1800e126ba97SEli Cohen 180109a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 180209a7d9ecSSaeed Mahameed 1803e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 180409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1805e126ba97SEli Cohen 1806e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 180709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1808e126ba97SEli Cohen else 180909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 181009a7d9ecSSaeed Mahameed 1811e126ba97SEli Cohen 1812e126ba97SEli Cohen if (qp->wq_sig) 181309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1814e126ba97SEli Cohen 1815f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 181609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1817f360d88aSEli Cohen 1818051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 181909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1820051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 182109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1822051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 182309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1824051f2630SLeon Romanovsky 1825e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1826e126ba97SEli Cohen int rcqe_sz; 1827e126ba97SEli Cohen int scqe_sz; 1828e126ba97SEli Cohen 1829e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1830e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1831e126ba97SEli Cohen 1832e126ba97SEli Cohen if (rcqe_sz == 128) 183309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1834e126ba97SEli Cohen else 183509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1836e126ba97SEli Cohen 1837e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1838e126ba97SEli Cohen if (scqe_sz == 128) 183909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1840e126ba97SEli Cohen else 184109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1842e126ba97SEli Cohen } 1843e126ba97SEli Cohen } 1844e126ba97SEli Cohen 1845e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 184609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 184709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1848e126ba97SEli Cohen } 1849e126ba97SEli Cohen 185009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1851e126ba97SEli Cohen 18523fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 185309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 18543fd3307eSArtemy Kovalyov } else { 185509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 18563fd3307eSArtemy Kovalyov if (init_attr->srq && 18573fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 18583fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 18593fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 18603fd3307eSArtemy Kovalyov } 1861e126ba97SEli Cohen 1862e126ba97SEli Cohen /* Set default resources */ 1863e126ba97SEli Cohen switch (init_attr->qp_type) { 1864e126ba97SEli Cohen case IB_QPT_XRC_TGT: 186509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 186609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 186709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 186809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1869e126ba97SEli Cohen break; 1870e126ba97SEli Cohen case IB_QPT_XRC_INI: 187109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 187209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 187309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1874e126ba97SEli Cohen break; 1875e126ba97SEli Cohen default: 1876e126ba97SEli Cohen if (init_attr->srq) { 187709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 187809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1879e126ba97SEli Cohen } else { 188009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 188109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1882e126ba97SEli Cohen } 1883e126ba97SEli Cohen } 1884e126ba97SEli Cohen 1885e126ba97SEli Cohen if (init_attr->send_cq) 188609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1887e126ba97SEli Cohen 1888e126ba97SEli Cohen if (init_attr->recv_cq) 188909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1890e126ba97SEli Cohen 189109a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1892e126ba97SEli Cohen 1893cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 189409a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1895cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 189609a7d9ecSSaeed Mahameed 1897f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1898f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1899f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1900f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1901f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1902f0313965SErez Shitrit } 1903cfb5e088SHaggai Abramovsky 1904b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 1905b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 1906b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 1907b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 1908b1383aa6SNoa Osherovich goto err; 1909b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1910b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 1911b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 1912b1383aa6SNoa Osherovich } else { 1913b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 1914b1383aa6SNoa Osherovich } 1915b1383aa6SNoa Osherovich } 1916b1383aa6SNoa Osherovich 19172c292dbbSBoris Pismenny if (inlen < 0) { 19182c292dbbSBoris Pismenny err = -EINVAL; 19192c292dbbSBoris Pismenny goto err; 19202c292dbbSBoris Pismenny } 19212c292dbbSBoris Pismenny 1922c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 1923c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 19240fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 19250fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 19262c292dbbSBoris Pismenny err = create_raw_packet_qp(dev, qp, in, inlen, pd); 19270fb2ed66Smajd@mellanox.com } else { 192819098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 19290fb2ed66Smajd@mellanox.com } 19300fb2ed66Smajd@mellanox.com 1931e126ba97SEli Cohen if (err) { 1932e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1933e126ba97SEli Cohen goto err_create; 1934e126ba97SEli Cohen } 1935e126ba97SEli Cohen 1936479163f4SAl Viro kvfree(in); 1937e126ba97SEli Cohen 193819098df2Smajd@mellanox.com base->container_mibqp = qp; 193919098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1940e126ba97SEli Cohen 194189ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 194289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 194389ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 194489ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 194589ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 194689ea94a7SMaor Gottlieb * flow 194789ea94a7SMaor Gottlieb */ 194889ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 194989ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 195089ea94a7SMaor Gottlieb */ 195189ea94a7SMaor Gottlieb if (send_cq) 195289ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 195389ea94a7SMaor Gottlieb if (recv_cq) 195489ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 195589ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 195689ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 195789ea94a7SMaor Gottlieb 1958e126ba97SEli Cohen return 0; 1959e126ba97SEli Cohen 1960e126ba97SEli Cohen err_create: 1961e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 1962b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 1963e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1964e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1965e126ba97SEli Cohen 1966b1383aa6SNoa Osherovich err: 1967479163f4SAl Viro kvfree(in); 1968e126ba97SEli Cohen return err; 1969e126ba97SEli Cohen } 1970e126ba97SEli Cohen 1971e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1972e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1973e126ba97SEli Cohen { 1974e126ba97SEli Cohen if (send_cq) { 1975e126ba97SEli Cohen if (recv_cq) { 1976e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 197789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1978e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1979e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1980e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 198189ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1982e126ba97SEli Cohen __acquire(&recv_cq->lock); 1983e126ba97SEli Cohen } else { 198489ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 1985e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1986e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1987e126ba97SEli Cohen } 1988e126ba97SEli Cohen } else { 198989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 19906a4f139aSEli Cohen __acquire(&recv_cq->lock); 1991e126ba97SEli Cohen } 1992e126ba97SEli Cohen } else if (recv_cq) { 199389ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 19946a4f139aSEli Cohen __acquire(&send_cq->lock); 19956a4f139aSEli Cohen } else { 19966a4f139aSEli Cohen __acquire(&send_cq->lock); 19976a4f139aSEli Cohen __acquire(&recv_cq->lock); 1998e126ba97SEli Cohen } 1999e126ba97SEli Cohen } 2000e126ba97SEli Cohen 2001e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2002e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2003e126ba97SEli Cohen { 2004e126ba97SEli Cohen if (send_cq) { 2005e126ba97SEli Cohen if (recv_cq) { 2006e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2007e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 200889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2009e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2010e126ba97SEli Cohen __release(&recv_cq->lock); 201189ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2012e126ba97SEli Cohen } else { 2013e126ba97SEli Cohen spin_unlock(&send_cq->lock); 201489ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2015e126ba97SEli Cohen } 2016e126ba97SEli Cohen } else { 20176a4f139aSEli Cohen __release(&recv_cq->lock); 201889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2019e126ba97SEli Cohen } 2020e126ba97SEli Cohen } else if (recv_cq) { 20216a4f139aSEli Cohen __release(&send_cq->lock); 202289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 20236a4f139aSEli Cohen } else { 20246a4f139aSEli Cohen __release(&recv_cq->lock); 20256a4f139aSEli Cohen __release(&send_cq->lock); 2026e126ba97SEli Cohen } 2027e126ba97SEli Cohen } 2028e126ba97SEli Cohen 2029e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2030e126ba97SEli Cohen { 2031e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2032e126ba97SEli Cohen } 2033e126ba97SEli Cohen 203489ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 203589ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2036e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2037e126ba97SEli Cohen { 203889ea94a7SMaor Gottlieb switch (qp_type) { 2039e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2040e126ba97SEli Cohen *send_cq = NULL; 2041e126ba97SEli Cohen *recv_cq = NULL; 2042e126ba97SEli Cohen break; 2043e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2044e126ba97SEli Cohen case IB_QPT_XRC_INI: 204589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2046e126ba97SEli Cohen *recv_cq = NULL; 2047e126ba97SEli Cohen break; 2048e126ba97SEli Cohen 2049e126ba97SEli Cohen case IB_QPT_SMI: 2050d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2051e126ba97SEli Cohen case IB_QPT_RC: 2052e126ba97SEli Cohen case IB_QPT_UC: 2053e126ba97SEli Cohen case IB_QPT_UD: 2054e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2055e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 20560fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 205789ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 205889ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2059e126ba97SEli Cohen break; 2060e126ba97SEli Cohen 2061e126ba97SEli Cohen case IB_QPT_MAX: 2062e126ba97SEli Cohen default: 2063e126ba97SEli Cohen *send_cq = NULL; 2064e126ba97SEli Cohen *recv_cq = NULL; 2065e126ba97SEli Cohen break; 2066e126ba97SEli Cohen } 2067e126ba97SEli Cohen } 2068e126ba97SEli Cohen 2069ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 207013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 207113eab21fSAviv Heller u8 lag_tx_affinity); 2072ad5f8e96Smajd@mellanox.com 2073e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2074e126ba97SEli Cohen { 2075e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2076c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 207789ea94a7SMaor Gottlieb unsigned long flags; 2078e126ba97SEli Cohen int err; 2079e126ba97SEli Cohen 208028d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 208128d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 208228d61370SYishai Hadas return; 208328d61370SYishai Hadas } 208428d61370SYishai Hadas 2085c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2086c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 20870fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 20880fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 20890fb2ed66Smajd@mellanox.com 20906aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2091c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2092c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2093ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 20941a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 20951a412fb1SSaeed Mahameed NULL, &base->mqp); 2096ad5f8e96Smajd@mellanox.com } else { 20970680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 20980680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 20990680efa2SAlex Vesker }; 21000680efa2SAlex Vesker 210113eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2102ad5f8e96Smajd@mellanox.com } 2103ad5f8e96Smajd@mellanox.com if (err) 2104427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 210519098df2Smajd@mellanox.com base->mqp.qpn); 21066aec21f6SHaggai Eran } 2107e126ba97SEli Cohen 210889ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 210989ea94a7SMaor Gottlieb &send_cq, &recv_cq); 211089ea94a7SMaor Gottlieb 211189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 211289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 211389ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 211489ea94a7SMaor Gottlieb list_del(&qp->qps_list); 211589ea94a7SMaor Gottlieb if (send_cq) 211689ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 211789ea94a7SMaor Gottlieb 211889ea94a7SMaor Gottlieb if (recv_cq) 211989ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2120e126ba97SEli Cohen 2121e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 212219098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2123e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2124e126ba97SEli Cohen if (send_cq != recv_cq) 212519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 212619098df2Smajd@mellanox.com NULL); 2127e126ba97SEli Cohen } 212889ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 212989ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2130e126ba97SEli Cohen 2131c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2132c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21330fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 21340fb2ed66Smajd@mellanox.com } else { 213519098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2136e126ba97SEli Cohen if (err) 21370fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 21380fb2ed66Smajd@mellanox.com base->mqp.qpn); 21390fb2ed66Smajd@mellanox.com } 2140e126ba97SEli Cohen 2141e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2142e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2143e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2144b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2145e126ba97SEli Cohen } 2146e126ba97SEli Cohen 2147e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2148e126ba97SEli Cohen { 2149e126ba97SEli Cohen switch (type) { 2150e126ba97SEli Cohen case IB_QPT_SMI: 2151e126ba97SEli Cohen return "IB_QPT_SMI"; 2152e126ba97SEli Cohen case IB_QPT_GSI: 2153e126ba97SEli Cohen return "IB_QPT_GSI"; 2154e126ba97SEli Cohen case IB_QPT_RC: 2155e126ba97SEli Cohen return "IB_QPT_RC"; 2156e126ba97SEli Cohen case IB_QPT_UC: 2157e126ba97SEli Cohen return "IB_QPT_UC"; 2158e126ba97SEli Cohen case IB_QPT_UD: 2159e126ba97SEli Cohen return "IB_QPT_UD"; 2160e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2161e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2162e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2163e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2164e126ba97SEli Cohen case IB_QPT_XRC_INI: 2165e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2166e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2167e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2168e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2169e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2170e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2171e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2172b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2173b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2174e126ba97SEli Cohen case IB_QPT_MAX: 2175e126ba97SEli Cohen default: 2176e126ba97SEli Cohen return "Invalid QP type"; 2177e126ba97SEli Cohen } 2178e126ba97SEli Cohen } 2179e126ba97SEli Cohen 2180b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2181b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2182b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2183b4aaa1f0SMoni Shoua { 2184b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2185b4aaa1f0SMoni Shoua int err = 0; 2186b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2187b4aaa1f0SMoni Shoua void *dctc; 2188b4aaa1f0SMoni Shoua 2189b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2190b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2191b4aaa1f0SMoni Shoua 2192b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2193b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2194b4aaa1f0SMoni Shoua if (err) 2195b4aaa1f0SMoni Shoua return ERR_PTR(err); 2196b4aaa1f0SMoni Shoua 2197b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2198b4aaa1f0SMoni Shoua if (!qp) 2199b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2200b4aaa1f0SMoni Shoua 2201b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2202b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2203b4aaa1f0SMoni Shoua err = -ENOMEM; 2204b4aaa1f0SMoni Shoua goto err_free; 2205b4aaa1f0SMoni Shoua } 2206b4aaa1f0SMoni Shoua 2207b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2208776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2209b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2210b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2211b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2212b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2213b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2214b4aaa1f0SMoni Shoua 2215b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2216b4aaa1f0SMoni Shoua 2217b4aaa1f0SMoni Shoua return &qp->ibqp; 2218b4aaa1f0SMoni Shoua err_free: 2219b4aaa1f0SMoni Shoua kfree(qp); 2220b4aaa1f0SMoni Shoua return ERR_PTR(err); 2221b4aaa1f0SMoni Shoua } 2222b4aaa1f0SMoni Shoua 2223b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2224e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2225b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2226b4aaa1f0SMoni Shoua struct ib_udata *udata) 2227b4aaa1f0SMoni Shoua { 2228b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2229b4aaa1f0SMoni Shoua int err; 2230b4aaa1f0SMoni Shoua 2231b4aaa1f0SMoni Shoua if (!udata) 2232b4aaa1f0SMoni Shoua return -EINVAL; 2233b4aaa1f0SMoni Shoua 2234b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2235b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2236b4aaa1f0SMoni Shoua return -EINVAL; 2237b4aaa1f0SMoni Shoua } 2238b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2239b4aaa1f0SMoni Shoua if (err) 2240b4aaa1f0SMoni Shoua return err; 2241b4aaa1f0SMoni Shoua 2242b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2243b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2244b4aaa1f0SMoni Shoua } else { 2245b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2246b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2247b4aaa1f0SMoni Shoua } else { 2248b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2249b4aaa1f0SMoni Shoua return -EINVAL; 2250b4aaa1f0SMoni Shoua } 2251b4aaa1f0SMoni Shoua } 2252b4aaa1f0SMoni Shoua 2253b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2254b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2255b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2256b4aaa1f0SMoni Shoua } 2257b4aaa1f0SMoni Shoua 2258b4aaa1f0SMoni Shoua return 0; 2259b4aaa1f0SMoni Shoua } 2260b4aaa1f0SMoni Shoua 2261b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2262b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2263e126ba97SEli Cohen struct ib_udata *udata) 2264e126ba97SEli Cohen { 2265e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2266e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2267e126ba97SEli Cohen u16 xrcdn = 0; 2268e126ba97SEli Cohen int err; 2269b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2270b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2271e126ba97SEli Cohen 2272e126ba97SEli Cohen if (pd) { 2273e126ba97SEli Cohen dev = to_mdev(pd->device); 22740fb2ed66Smajd@mellanox.com 22750fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 22760fb2ed66Smajd@mellanox.com if (!pd->uobject) { 22770fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 22780fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22790fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 22800fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 22810fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22820fb2ed66Smajd@mellanox.com } 22830fb2ed66Smajd@mellanox.com } 228409f16cf5SMajd Dibbiny } else { 228509f16cf5SMajd Dibbiny /* being cautious here */ 228609f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 228709f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 228809f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 228909f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 229009f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 229109f16cf5SMajd Dibbiny } 229209f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2293e126ba97SEli Cohen } 2294e126ba97SEli Cohen 2295b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2296b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2297b4aaa1f0SMoni Shoua 2298b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2299b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2300b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2301b4aaa1f0SMoni Shoua if (err) 2302b4aaa1f0SMoni Shoua return ERR_PTR(err); 2303c32a4f29SMoni Shoua 2304c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2305c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2306c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2307c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2308c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2309c32a4f29SMoni Shoua } 2310776a3906SMoni Shoua } else { 2311776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2312c32a4f29SMoni Shoua } 2313b4aaa1f0SMoni Shoua } 2314b4aaa1f0SMoni Shoua 2315e126ba97SEli Cohen switch (init_attr->qp_type) { 2316e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2317e126ba97SEli Cohen case IB_QPT_XRC_INI: 2318938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2319e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2320e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2321e126ba97SEli Cohen } 2322e126ba97SEli Cohen init_attr->recv_cq = NULL; 2323e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2324e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2325e126ba97SEli Cohen init_attr->send_cq = NULL; 2326e126ba97SEli Cohen } 2327e126ba97SEli Cohen 2328e126ba97SEli Cohen /* fall through */ 23290fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2330e126ba97SEli Cohen case IB_QPT_RC: 2331e126ba97SEli Cohen case IB_QPT_UC: 2332e126ba97SEli Cohen case IB_QPT_UD: 2333e126ba97SEli Cohen case IB_QPT_SMI: 2334d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2335e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2336c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2337e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2338e126ba97SEli Cohen if (!qp) 2339e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2340e126ba97SEli Cohen 2341e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2342e126ba97SEli Cohen if (err) { 2343e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2344e126ba97SEli Cohen kfree(qp); 2345e126ba97SEli Cohen return ERR_PTR(err); 2346e126ba97SEli Cohen } 2347e126ba97SEli Cohen 2348e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2349e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2350e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2351e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2352e126ba97SEli Cohen else 235319098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2354e126ba97SEli Cohen 2355e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 235619098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2357a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2358a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2359e126ba97SEli Cohen 236019098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2361e126ba97SEli Cohen 2362e126ba97SEli Cohen break; 2363e126ba97SEli Cohen 2364d16e91daSHaggai Eran case IB_QPT_GSI: 2365d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2366d16e91daSHaggai Eran 2367e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2368e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2369e126ba97SEli Cohen case IB_QPT_MAX: 2370e126ba97SEli Cohen default: 2371e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2372e126ba97SEli Cohen init_attr->qp_type); 2373e126ba97SEli Cohen /* Don't support raw QPs */ 2374e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2375e126ba97SEli Cohen } 2376e126ba97SEli Cohen 2377b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2378b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2379b4aaa1f0SMoni Shoua 2380e126ba97SEli Cohen return &qp->ibqp; 2381e126ba97SEli Cohen } 2382e126ba97SEli Cohen 2383776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2384776a3906SMoni Shoua { 2385776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2386776a3906SMoni Shoua 2387776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2388776a3906SMoni Shoua int err; 2389776a3906SMoni Shoua 2390776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2391776a3906SMoni Shoua if (err) { 2392776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2393776a3906SMoni Shoua return err; 2394776a3906SMoni Shoua } 2395776a3906SMoni Shoua } 2396776a3906SMoni Shoua 2397776a3906SMoni Shoua kfree(mqp->dct.in); 2398776a3906SMoni Shoua kfree(mqp); 2399776a3906SMoni Shoua return 0; 2400776a3906SMoni Shoua } 2401776a3906SMoni Shoua 2402e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2403e126ba97SEli Cohen { 2404e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2405e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2406e126ba97SEli Cohen 2407d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2408d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2409d16e91daSHaggai Eran 2410776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2411776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2412776a3906SMoni Shoua 2413e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2414e126ba97SEli Cohen 2415e126ba97SEli Cohen kfree(mqp); 2416e126ba97SEli Cohen 2417e126ba97SEli Cohen return 0; 2418e126ba97SEli Cohen } 2419e126ba97SEli Cohen 2420e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2421e126ba97SEli Cohen int attr_mask) 2422e126ba97SEli Cohen { 2423e126ba97SEli Cohen u32 hw_access_flags = 0; 2424e126ba97SEli Cohen u8 dest_rd_atomic; 2425e126ba97SEli Cohen u32 access_flags; 2426e126ba97SEli Cohen 2427e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2428e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2429e126ba97SEli Cohen else 243019098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2431e126ba97SEli Cohen 2432e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2433e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2434e126ba97SEli Cohen else 243519098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2436e126ba97SEli Cohen 2437e126ba97SEli Cohen if (!dest_rd_atomic) 2438e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2439e126ba97SEli Cohen 2440e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2441e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2442e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2443e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2444e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2445e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2446e126ba97SEli Cohen 2447e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2448e126ba97SEli Cohen } 2449e126ba97SEli Cohen 2450e126ba97SEli Cohen enum { 2451e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2452e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2453e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2454e126ba97SEli Cohen }; 2455e126ba97SEli Cohen 2456e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2457e126ba97SEli Cohen { 24584f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2459e126ba97SEli Cohen return 0; 24604f32ac2eSDanit Goldberg 24614f32ac2eSDanit Goldberg if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) 2462e126ba97SEli Cohen return -EINVAL; 24634f32ac2eSDanit Goldberg 24644f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2465e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2466938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2467e126ba97SEli Cohen --rate; 2468e126ba97SEli Cohen 24694f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2470e126ba97SEli Cohen } 2471e126ba97SEli Cohen 247275850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 247375850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 247475850d0bSmajd@mellanox.com { 247575850d0bSmajd@mellanox.com void *in; 247675850d0bSmajd@mellanox.com void *tisc; 247775850d0bSmajd@mellanox.com int inlen; 247875850d0bSmajd@mellanox.com int err; 247975850d0bSmajd@mellanox.com 248075850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24811b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 248275850d0bSmajd@mellanox.com if (!in) 248375850d0bSmajd@mellanox.com return -ENOMEM; 248475850d0bSmajd@mellanox.com 248575850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 248675850d0bSmajd@mellanox.com 248775850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 248875850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 248975850d0bSmajd@mellanox.com 249075850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 249175850d0bSmajd@mellanox.com 249275850d0bSmajd@mellanox.com kvfree(in); 249375850d0bSmajd@mellanox.com 249475850d0bSmajd@mellanox.com return err; 249575850d0bSmajd@mellanox.com } 249675850d0bSmajd@mellanox.com 249713eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 249813eab21fSAviv Heller struct mlx5_ib_sq *sq, u8 tx_affinity) 249913eab21fSAviv Heller { 250013eab21fSAviv Heller void *in; 250113eab21fSAviv Heller void *tisc; 250213eab21fSAviv Heller int inlen; 250313eab21fSAviv Heller int err; 250413eab21fSAviv Heller 250513eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 25061b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 250713eab21fSAviv Heller if (!in) 250813eab21fSAviv Heller return -ENOMEM; 250913eab21fSAviv Heller 251013eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 251113eab21fSAviv Heller 251213eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 251313eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 251413eab21fSAviv Heller 251513eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 251613eab21fSAviv Heller 251713eab21fSAviv Heller kvfree(in); 251813eab21fSAviv Heller 251913eab21fSAviv Heller return err; 252013eab21fSAviv Heller } 252113eab21fSAviv Heller 252275850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 252390898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2524e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2525f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2526f879ee8dSAchiad Shochat bool alt) 2527e126ba97SEli Cohen { 2528d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2529e126ba97SEli Cohen int err; 2530ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2531d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2532d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2533e126ba97SEli Cohen 2534e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2535f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2536f879ee8dSAchiad Shochat attr->pkey_index); 2537e126ba97SEli Cohen 2538d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2539d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2540938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2541f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2542d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2543938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2544f83b4263SEli Cohen return -EINVAL; 2545f83b4263SEli Cohen } 25462811ba51SAchiad Shochat } 254744c58487SDasaratharaman Chandramouli 254844c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2549d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 25502811ba51SAchiad Shochat return -EINVAL; 2551d8966fcdSDasaratharaman Chandramouli err = mlx5_get_roce_gid_type(dev, port, grh->sgid_index, 2552ed88451eSMajd Dibbiny &gid_type); 2553ed88451eSMajd Dibbiny if (err) 2554ed88451eSMajd Dibbiny return err; 255544c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 25562b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 25572b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 25582b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 25592b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 25602811ba51SAchiad Shochat path->udp_sport = mlx5_get_roce_udp_sport(dev, port, 2561d8966fcdSDasaratharaman Chandramouli grh->sgid_index); 2562d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 2563ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2564d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 25652811ba51SAchiad Shochat } else { 2566d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2567d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2568d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2569d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2570d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2571d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2572e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2573d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 25742811ba51SAchiad Shochat } 25752811ba51SAchiad Shochat 2576d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2577d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2578d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2579e126ba97SEli Cohen path->tclass_flowlabel = 2580d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2581d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2582d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2583e126ba97SEli Cohen } 2584e126ba97SEli Cohen 2585d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2586e126ba97SEli Cohen if (err < 0) 2587e126ba97SEli Cohen return err; 2588e126ba97SEli Cohen path->static_rate = err; 2589e126ba97SEli Cohen path->port = port; 2590e126ba97SEli Cohen 2591e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2592f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2593e126ba97SEli Cohen 259475850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 259575850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 259675850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 2597d8966fcdSDasaratharaman Chandramouli sl & 0xf); 259875850d0bSmajd@mellanox.com 2599e126ba97SEli Cohen return 0; 2600e126ba97SEli Cohen } 2601e126ba97SEli Cohen 2602e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2603e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2604e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2605e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2606e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2607e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2608e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2609e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2610e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2611e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2612e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2613e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2614e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2615e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2616e126ba97SEli Cohen }, 2617e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2618e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2619e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2620e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2621e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2622e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2623e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2624e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2625e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2626e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2627e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2628e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2629e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2630a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2631a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2632a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2633a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2634a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2635e126ba97SEli Cohen }, 2636e126ba97SEli Cohen }, 2637e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2638e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2639e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2640e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2641e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2642e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2643e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2644e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2645e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2646e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2647e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2648e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2649e126ba97SEli Cohen }, 2650e126ba97SEli Cohen }, 2651e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2652e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2653e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2654e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2655e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2656e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2657c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2658c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2659e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2660c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2661c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2662e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2663e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2664e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2665e126ba97SEli Cohen }, 2666e126ba97SEli Cohen }, 2667e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2668e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2669e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2670e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 267175959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2672a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2673a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2674a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2675a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2676e126ba97SEli Cohen }, 2677e126ba97SEli Cohen }, 2678e126ba97SEli Cohen }; 2679e126ba97SEli Cohen 2680e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2681e126ba97SEli Cohen { 2682e126ba97SEli Cohen switch (ib_mask) { 2683e126ba97SEli Cohen case IB_QP_STATE: 2684e126ba97SEli Cohen return 0; 2685e126ba97SEli Cohen case IB_QP_CUR_STATE: 2686e126ba97SEli Cohen return 0; 2687e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2688e126ba97SEli Cohen return 0; 2689e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2690e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2691e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2692e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2693e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2694e126ba97SEli Cohen case IB_QP_PORT: 2695e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2696e126ba97SEli Cohen case IB_QP_QKEY: 2697e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2698e126ba97SEli Cohen case IB_QP_AV: 2699e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2700e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2701e126ba97SEli Cohen case IB_QP_PATH_MTU: 2702e126ba97SEli Cohen return 0; 2703e126ba97SEli Cohen case IB_QP_TIMEOUT: 2704e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2705e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2706e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2707e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2708e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2709e126ba97SEli Cohen case IB_QP_RQ_PSN: 2710e126ba97SEli Cohen return 0; 2711e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2712e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2713e126ba97SEli Cohen case IB_QP_ALT_PATH: 2714e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2715e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2716e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2717e126ba97SEli Cohen case IB_QP_SQ_PSN: 2718e126ba97SEli Cohen return 0; 2719e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2720e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2721e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2722e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2723e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2724e126ba97SEli Cohen case IB_QP_CAP: 2725e126ba97SEli Cohen return 0; 2726e126ba97SEli Cohen case IB_QP_DEST_QPN: 2727e126ba97SEli Cohen return 0; 2728e126ba97SEli Cohen } 2729e126ba97SEli Cohen return 0; 2730e126ba97SEli Cohen } 2731e126ba97SEli Cohen 2732e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2733e126ba97SEli Cohen { 2734e126ba97SEli Cohen int result = 0; 2735e126ba97SEli Cohen int i; 2736e126ba97SEli Cohen 2737e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2738e126ba97SEli Cohen if ((1 << i) & ib_mask) 2739e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2740e126ba97SEli Cohen } 2741e126ba97SEli Cohen 2742e126ba97SEli Cohen return result; 2743e126ba97SEli Cohen } 2744e126ba97SEli Cohen 2745eb49ab0cSAlex Vesker static int modify_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 2746eb49ab0cSAlex Vesker struct mlx5_ib_rq *rq, int new_state, 2747eb49ab0cSAlex Vesker const struct mlx5_modify_raw_qp_param *raw_qp_param) 2748ad5f8e96Smajd@mellanox.com { 2749ad5f8e96Smajd@mellanox.com void *in; 2750ad5f8e96Smajd@mellanox.com void *rqc; 2751ad5f8e96Smajd@mellanox.com int inlen; 2752ad5f8e96Smajd@mellanox.com int err; 2753ad5f8e96Smajd@mellanox.com 2754ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 27551b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2756ad5f8e96Smajd@mellanox.com if (!in) 2757ad5f8e96Smajd@mellanox.com return -ENOMEM; 2758ad5f8e96Smajd@mellanox.com 2759ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2760ad5f8e96Smajd@mellanox.com 2761ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2762ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2763ad5f8e96Smajd@mellanox.com 2764eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2765eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2766eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 276723a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2768eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2769eb49ab0cSAlex Vesker } else 2770eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2771eb49ab0cSAlex Vesker dev->ib_dev.name); 2772eb49ab0cSAlex Vesker } 2773eb49ab0cSAlex Vesker 2774eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2775ad5f8e96Smajd@mellanox.com if (err) 2776ad5f8e96Smajd@mellanox.com goto out; 2777ad5f8e96Smajd@mellanox.com 2778ad5f8e96Smajd@mellanox.com rq->state = new_state; 2779ad5f8e96Smajd@mellanox.com 2780ad5f8e96Smajd@mellanox.com out: 2781ad5f8e96Smajd@mellanox.com kvfree(in); 2782ad5f8e96Smajd@mellanox.com return err; 2783ad5f8e96Smajd@mellanox.com } 2784ad5f8e96Smajd@mellanox.com 2785ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 27867d29f349SBodong Wang struct mlx5_ib_sq *sq, 27877d29f349SBodong Wang int new_state, 27887d29f349SBodong Wang const struct mlx5_modify_raw_qp_param *raw_qp_param) 2789ad5f8e96Smajd@mellanox.com { 27907d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 279161147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 279261147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 279361147f39SBodong Wang bool new_rate_added = false; 27947d29f349SBodong Wang u16 rl_index = 0; 2795ad5f8e96Smajd@mellanox.com void *in; 2796ad5f8e96Smajd@mellanox.com void *sqc; 2797ad5f8e96Smajd@mellanox.com int inlen; 2798ad5f8e96Smajd@mellanox.com int err; 2799ad5f8e96Smajd@mellanox.com 2800ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 28011b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2802ad5f8e96Smajd@mellanox.com if (!in) 2803ad5f8e96Smajd@mellanox.com return -ENOMEM; 2804ad5f8e96Smajd@mellanox.com 2805ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2806ad5f8e96Smajd@mellanox.com 2807ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2808ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2809ad5f8e96Smajd@mellanox.com 28107d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 28117d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 28127d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 28137d29f349SBodong Wang __func__); 28147d29f349SBodong Wang else 281561147f39SBodong Wang new_rl = raw_qp_param->rl; 28167d29f349SBodong Wang } 2817ad5f8e96Smajd@mellanox.com 281861147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 281961147f39SBodong Wang if (new_rl.rate) { 282061147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 28217d29f349SBodong Wang if (err) { 282261147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 282361147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 282461147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 282561147f39SBodong Wang new_rl.typical_pkt_sz); 282661147f39SBodong Wang 28277d29f349SBodong Wang goto out; 28287d29f349SBodong Wang } 282961147f39SBodong Wang new_rate_added = true; 28307d29f349SBodong Wang } 28317d29f349SBodong Wang 28327d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 283361147f39SBodong Wang /* index 0 means no limit */ 28347d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 28357d29f349SBodong Wang } 28367d29f349SBodong Wang 28377d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 28387d29f349SBodong Wang if (err) { 28397d29f349SBodong Wang /* Remove new rate from table if failed */ 284061147f39SBodong Wang if (new_rate_added) 284161147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 28427d29f349SBodong Wang goto out; 28437d29f349SBodong Wang } 28447d29f349SBodong Wang 28457d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 284661147f39SBodong Wang if ((old_rl.rate && 284761147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 28487d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 284961147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 28507d29f349SBodong Wang 285161147f39SBodong Wang ibqp->rl = new_rl; 2852ad5f8e96Smajd@mellanox.com sq->state = new_state; 2853ad5f8e96Smajd@mellanox.com 2854ad5f8e96Smajd@mellanox.com out: 2855ad5f8e96Smajd@mellanox.com kvfree(in); 2856ad5f8e96Smajd@mellanox.com return err; 2857ad5f8e96Smajd@mellanox.com } 2858ad5f8e96Smajd@mellanox.com 2859ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 286013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 286113eab21fSAviv Heller u8 tx_affinity) 2862ad5f8e96Smajd@mellanox.com { 2863ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2864ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2865ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 28667d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 28677d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2868ad5f8e96Smajd@mellanox.com int rq_state; 2869ad5f8e96Smajd@mellanox.com int sq_state; 2870ad5f8e96Smajd@mellanox.com int err; 2871ad5f8e96Smajd@mellanox.com 28720680efa2SAlex Vesker switch (raw_qp_param->operation) { 2873ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2874ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2875ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2876ad5f8e96Smajd@mellanox.com break; 2877ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2878ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2879ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2880ad5f8e96Smajd@mellanox.com break; 2881ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2882ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2883ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2884ad5f8e96Smajd@mellanox.com break; 2885ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2886ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 28877d29f349SBodong Wang if (raw_qp_param->set_mask == 28887d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 28897d29f349SBodong Wang modify_rq = 0; 28907d29f349SBodong Wang sq_state = sq->state; 28917d29f349SBodong Wang } else { 28927d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 28937d29f349SBodong Wang } 28947d29f349SBodong Wang break; 28957d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 28967d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2897eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2898eb49ab0cSAlex Vesker return -EINVAL; 2899eb49ab0cSAlex Vesker else 2900ad5f8e96Smajd@mellanox.com return 0; 2901ad5f8e96Smajd@mellanox.com default: 2902ad5f8e96Smajd@mellanox.com WARN_ON(1); 2903ad5f8e96Smajd@mellanox.com return -EINVAL; 2904ad5f8e96Smajd@mellanox.com } 2905ad5f8e96Smajd@mellanox.com 29067d29f349SBodong Wang if (modify_rq) { 2907eb49ab0cSAlex Vesker err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param); 2908ad5f8e96Smajd@mellanox.com if (err) 2909ad5f8e96Smajd@mellanox.com return err; 2910ad5f8e96Smajd@mellanox.com } 2911ad5f8e96Smajd@mellanox.com 29127d29f349SBodong Wang if (modify_sq) { 291313eab21fSAviv Heller if (tx_affinity) { 291413eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 291513eab21fSAviv Heller tx_affinity); 291613eab21fSAviv Heller if (err) 291713eab21fSAviv Heller return err; 291813eab21fSAviv Heller } 291913eab21fSAviv Heller 29207d29f349SBodong Wang return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, raw_qp_param); 292113eab21fSAviv Heller } 2922ad5f8e96Smajd@mellanox.com 2923ad5f8e96Smajd@mellanox.com return 0; 2924ad5f8e96Smajd@mellanox.com } 2925ad5f8e96Smajd@mellanox.com 2926e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2927e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 292861147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 292961147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 2930e126ba97SEli Cohen { 2931427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2932427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2933427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2934427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2935427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2936427c1e7bSmajd@mellanox.com }, 2937427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2938427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2939427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2940427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2941427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2942427c1e7bSmajd@mellanox.com }, 2943427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2944427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2945427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2946427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2947427c1e7bSmajd@mellanox.com }, 2948427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2949427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2950427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2951427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2952427c1e7bSmajd@mellanox.com }, 2953427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2954427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2955427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2956427c1e7bSmajd@mellanox.com }, 2957427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2958427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2959427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2960427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2961427c1e7bSmajd@mellanox.com }, 2962427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2963427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2964427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2965427c1e7bSmajd@mellanox.com } 2966427c1e7bSmajd@mellanox.com }; 2967427c1e7bSmajd@mellanox.com 2968e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2969e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 297019098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2971e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2972e126ba97SEli Cohen struct mlx5_qp_context *context; 2973e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2974eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 2975e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2976e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2977e126ba97SEli Cohen int mlx5_st; 2978e126ba97SEli Cohen int err; 2979427c1e7bSmajd@mellanox.com u16 op; 298013eab21fSAviv Heller u8 tx_affinity = 0; 2981e126ba97SEli Cohen 298255de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 298355de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 298455de9a77SLeon Romanovsky if (mlx5_st < 0) 298555de9a77SLeon Romanovsky return -EINVAL; 298655de9a77SLeon Romanovsky 29871a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 29881a412fb1SSaeed Mahameed if (!context) 2989e126ba97SEli Cohen return -ENOMEM; 2990e126ba97SEli Cohen 299155de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 2992e126ba97SEli Cohen 2993e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 2994e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2995e126ba97SEli Cohen } else { 2996e126ba97SEli Cohen switch (attr->path_mig_state) { 2997e126ba97SEli Cohen case IB_MIG_MIGRATED: 2998e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2999e126ba97SEli Cohen break; 3000e126ba97SEli Cohen case IB_MIG_REARM: 3001e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3002e126ba97SEli Cohen break; 3003e126ba97SEli Cohen case IB_MIG_ARMED: 3004e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3005e126ba97SEli Cohen break; 3006e126ba97SEli Cohen } 3007e126ba97SEli Cohen } 3008e126ba97SEli Cohen 300913eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 301013eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 301113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 301213eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 301313eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 301413eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 301513eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 301613eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 301713eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 30187fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 301913eab21fSAviv Heller tx_affinity = (unsigned int)atomic_add_return(1, 30207fd8aefbSDaniel Jurgens &dev->roce[p].next_port) % 302113eab21fSAviv Heller MLX5_MAX_PORTS + 1; 302213eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 302313eab21fSAviv Heller } 302413eab21fSAviv Heller } 302513eab21fSAviv Heller } 302613eab21fSAviv Heller 3027d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3028e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3029c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3030c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3031e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3032e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3033e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3034e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3035e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3036e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3037e126ba97SEli Cohen err = -EINVAL; 3038e126ba97SEli Cohen goto out; 3039e126ba97SEli Cohen } 3040938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3041938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3042e126ba97SEli Cohen } 3043e126ba97SEli Cohen 3044e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3045e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3046e126ba97SEli Cohen 3047e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3048d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3049e126ba97SEli Cohen 3050e126ba97SEli Cohen /* todo implement counter_index functionality */ 3051e126ba97SEli Cohen 3052e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3053e126ba97SEli Cohen context->pri_path.port = qp->port; 3054e126ba97SEli Cohen 3055e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3056e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3057e126ba97SEli Cohen 3058e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 305975850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3060e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3061f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3062e126ba97SEli Cohen if (err) 3063e126ba97SEli Cohen goto out; 3064e126ba97SEli Cohen } 3065e126ba97SEli Cohen 3066e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3067e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3068e126ba97SEli Cohen 3069e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 307075850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 307175850d0bSmajd@mellanox.com &context->alt_path, 3072f879ee8dSAchiad Shochat attr->alt_port_num, 3073f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3074f879ee8dSAchiad Shochat 0, attr, true); 3075e126ba97SEli Cohen if (err) 3076e126ba97SEli Cohen goto out; 3077e126ba97SEli Cohen } 3078e126ba97SEli Cohen 3079e126ba97SEli Cohen pd = get_pd(qp); 308089ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 308189ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3082e126ba97SEli Cohen 3083e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3084e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3085e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3086e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3087e126ba97SEli Cohen 3088e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3089e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3090e126ba97SEli Cohen 3091e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3092e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3093e126ba97SEli Cohen 3094e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3095e126ba97SEli Cohen if (attr->max_rd_atomic) 3096e126ba97SEli Cohen context->params1 |= 3097e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3098e126ba97SEli Cohen } 3099e126ba97SEli Cohen 3100e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3101e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3102e126ba97SEli Cohen 3103e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3104e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3105e126ba97SEli Cohen context->params2 |= 3106e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3107e126ba97SEli Cohen } 3108e126ba97SEli Cohen 3109e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3110e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3111e126ba97SEli Cohen 3112e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3113e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3114e126ba97SEli Cohen 3115e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3116e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3117e126ba97SEli Cohen 3118e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3119e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3120e126ba97SEli Cohen 3121e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3122e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3123e126ba97SEli Cohen 31240837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 31250837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 31260837e86aSMark Bloch qp->port) - 1; 3127c2e53b2cSYishai Hadas 3128c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3129c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3130c2e53b2cSYishai Hadas port_num = 0; 3131c2e53b2cSYishai Hadas 3132eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 31330837e86aSMark Bloch context->qp_counter_set_usr_page |= 3134e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 31350837e86aSMark Bloch } 31360837e86aSMark Bloch 3137e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3138e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3139e126ba97SEli Cohen 3140b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3141b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3142e126ba97SEli Cohen 3143e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3144e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3145e126ba97SEli Cohen 3146427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 31475d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 31485d414b17SDan Carpenter err = -EINVAL; 3149427c1e7bSmajd@mellanox.com goto out; 31505d414b17SDan Carpenter } 3151427c1e7bSmajd@mellanox.com 3152427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3153e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3154e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3155ad5f8e96Smajd@mellanox.com 3156c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3157c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 31580680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 31590680efa2SAlex Vesker 31600680efa2SAlex Vesker raw_qp_param.operation = op; 3161eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3162e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3163eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3164eb49ab0cSAlex Vesker } 31657d29f349SBodong Wang 31667d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 316761147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 316861147f39SBodong Wang 316961147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 317061147f39SBodong Wang if (attr->rate_limit && 317161147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 317261147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 317361147f39SBodong Wang ucmd->burst_info.max_burst_sz; 317461147f39SBodong Wang } else { 317561147f39SBodong Wang err = -EINVAL; 317661147f39SBodong Wang goto out; 317761147f39SBodong Wang } 317861147f39SBodong Wang } 317961147f39SBodong Wang 318061147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 318161147f39SBodong Wang if (attr->rate_limit && 318261147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 318361147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 318461147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 318561147f39SBodong Wang } else { 318661147f39SBodong Wang err = -EINVAL; 318761147f39SBodong Wang goto out; 318861147f39SBodong Wang } 318961147f39SBodong Wang } 319061147f39SBodong Wang 31917d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 31927d29f349SBodong Wang } 31937d29f349SBodong Wang 319413eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 31950680efa2SAlex Vesker } else { 31961a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 319719098df2Smajd@mellanox.com &base->mqp); 31980680efa2SAlex Vesker } 31990680efa2SAlex Vesker 3200e126ba97SEli Cohen if (err) 3201e126ba97SEli Cohen goto out; 3202e126ba97SEli Cohen 3203e126ba97SEli Cohen qp->state = new_state; 3204e126ba97SEli Cohen 3205e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 320619098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3207e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 320819098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3209e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3210e126ba97SEli Cohen qp->port = attr->port_num; 3211e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 321219098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3213e126ba97SEli Cohen 3214e126ba97SEli Cohen /* 3215e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3216e126ba97SEli Cohen * entries and reinitialize the QP. 3217e126ba97SEli Cohen */ 321875a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 321975a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 322019098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3221e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3222e126ba97SEli Cohen if (send_cq != recv_cq) 322319098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3224e126ba97SEli Cohen 3225e126ba97SEli Cohen qp->rq.head = 0; 3226e126ba97SEli Cohen qp->rq.tail = 0; 3227e126ba97SEli Cohen qp->sq.head = 0; 3228e126ba97SEli Cohen qp->sq.tail = 0; 3229e126ba97SEli Cohen qp->sq.cur_post = 0; 3230e126ba97SEli Cohen qp->sq.last_poll = 0; 3231e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3232e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3233e126ba97SEli Cohen } 3234e126ba97SEli Cohen 3235e126ba97SEli Cohen out: 32361a412fb1SSaeed Mahameed kfree(context); 3237e126ba97SEli Cohen return err; 3238e126ba97SEli Cohen } 3239e126ba97SEli Cohen 3240c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3241c32a4f29SMoni Shoua { 3242c32a4f29SMoni Shoua if ((mask & req) != req) 3243c32a4f29SMoni Shoua return false; 3244c32a4f29SMoni Shoua 3245c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3246c32a4f29SMoni Shoua return false; 3247c32a4f29SMoni Shoua 3248c32a4f29SMoni Shoua return true; 3249c32a4f29SMoni Shoua } 3250c32a4f29SMoni Shoua 3251c32a4f29SMoni Shoua /* check valid transition for driver QP types 3252c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3253c32a4f29SMoni Shoua */ 3254c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3255c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3256c32a4f29SMoni Shoua { 3257c32a4f29SMoni Shoua int req = IB_QP_STATE; 3258c32a4f29SMoni Shoua int opt = 0; 3259c32a4f29SMoni Shoua 3260c32a4f29SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3261c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3262c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3263c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3264c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3265c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3266c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3267c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3268c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3269c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3270c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3271c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3272c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3273c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3274c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3275c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3276c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3277c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3278c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3279c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3280c32a4f29SMoni Shoua } 3281c32a4f29SMoni Shoua return false; 3282c32a4f29SMoni Shoua } 3283c32a4f29SMoni Shoua 3284776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3285776a3906SMoni Shoua * valid transitions are: 3286776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3287776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3288776a3906SMoni Shoua * mtu, gid_index and hop_limit 3289776a3906SMoni Shoua * Other transitions and attributes are illegal 3290776a3906SMoni Shoua */ 3291776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3292776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3293776a3906SMoni Shoua { 3294776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3295776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3296776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3297776a3906SMoni Shoua int err = 0; 3298776a3906SMoni Shoua int required = IB_QP_STATE; 3299776a3906SMoni Shoua void *dctc; 3300776a3906SMoni Shoua 3301776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3302776a3906SMoni Shoua return -EINVAL; 3303776a3906SMoni Shoua 3304776a3906SMoni Shoua cur_state = qp->state; 3305776a3906SMoni Shoua new_state = attr->qp_state; 3306776a3906SMoni Shoua 3307776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3308776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3309776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3310776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3311776a3906SMoni Shoua return -EINVAL; 3312776a3906SMoni Shoua 3313776a3906SMoni Shoua if (attr->port_num == 0 || 3314776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3315776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3316776a3906SMoni Shoua attr->port_num, dev->num_ports); 3317776a3906SMoni Shoua return -EINVAL; 3318776a3906SMoni Shoua } 3319776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3320776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3321776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3322776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3323776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3324776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3325776a3906SMoni Shoua return -EOPNOTSUPP; 3326776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3327776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3328776a3906SMoni Shoua } 3329776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3330776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3331776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3332776a3906SMoni Shoua 3333776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3334776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3335776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3336776a3906SMoni Shoua sizeof(resp.dctn); 3337776a3906SMoni Shoua 3338776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3339776a3906SMoni Shoua return -EINVAL; 3340776a3906SMoni Shoua resp.response_length = min_resp_len; 3341776a3906SMoni Shoua 3342776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3343776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3344776a3906SMoni Shoua return -EINVAL; 3345776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3346776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3347776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3348776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3349776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3350776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3351776a3906SMoni Shoua 3352776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3353776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3354776a3906SMoni Shoua if (err) 3355776a3906SMoni Shoua return err; 3356776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3357776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3358776a3906SMoni Shoua if (err) { 3359776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3360776a3906SMoni Shoua return err; 3361776a3906SMoni Shoua } 3362776a3906SMoni Shoua } else { 3363776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3364776a3906SMoni Shoua return -EINVAL; 3365776a3906SMoni Shoua } 3366776a3906SMoni Shoua if (err) 3367776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3368776a3906SMoni Shoua else 3369776a3906SMoni Shoua qp->state = new_state; 3370776a3906SMoni Shoua return err; 3371776a3906SMoni Shoua } 3372776a3906SMoni Shoua 3373e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3374e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3375e126ba97SEli Cohen { 3376e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3377e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 337861147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3379d16e91daSHaggai Eran enum ib_qp_type qp_type; 3380e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 338161147f39SBodong Wang size_t required_cmd_sz; 3382e126ba97SEli Cohen int err = -EINVAL; 3383e126ba97SEli Cohen int port; 33842811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 3385e126ba97SEli Cohen 338628d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 338728d61370SYishai Hadas return -ENOSYS; 338828d61370SYishai Hadas 338961147f39SBodong Wang if (udata && udata->inlen) { 339061147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 339161147f39SBodong Wang sizeof(ucmd.reserved); 339261147f39SBodong Wang if (udata->inlen < required_cmd_sz) 339361147f39SBodong Wang return -EINVAL; 339461147f39SBodong Wang 339561147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 339661147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 339761147f39SBodong Wang udata->inlen - sizeof(ucmd))) 339861147f39SBodong Wang return -EOPNOTSUPP; 339961147f39SBodong Wang 340061147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 340161147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 340261147f39SBodong Wang return -EFAULT; 340361147f39SBodong Wang 340461147f39SBodong Wang if (ucmd.comp_mask || 340561147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 340661147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 340761147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 340861147f39SBodong Wang return -EOPNOTSUPP; 340961147f39SBodong Wang } 341061147f39SBodong Wang 3411d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3412d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3413d16e91daSHaggai Eran 3414c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3415c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3416c32a4f29SMoni Shoua else 3417d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3418d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3419d16e91daSHaggai Eran 3420776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3421776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3422c32a4f29SMoni Shoua 3423e126ba97SEli Cohen mutex_lock(&qp->mutex); 3424e126ba97SEli Cohen 3425e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3426e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3427e126ba97SEli Cohen 34282811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 34292811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 34302811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 34312811ba51SAchiad Shochat } 34322811ba51SAchiad Shochat 3433c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3434c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3435c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3436c2e53b2cSYishai Hadas attr_mask); 3437c2e53b2cSYishai Hadas goto out; 3438c2e53b2cSYishai Hadas } 3439c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3440c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3441d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 3442158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3443158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3444e126ba97SEli Cohen goto out; 3445c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3446c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3447c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3448c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3449c32a4f29SMoni Shoua goto out; 3450158abf86SHaggai Eran } 3451e126ba97SEli Cohen 3452e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3453938fe83cSSaeed Mahameed (attr->port_num == 0 || 3454508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3455158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3456158abf86SHaggai Eran attr->port_num, dev->num_ports); 3457e126ba97SEli Cohen goto out; 3458158abf86SHaggai Eran } 3459e126ba97SEli Cohen 3460e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3461e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3462938fe83cSSaeed Mahameed if (attr->pkey_index >= 3463158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3464158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3465158abf86SHaggai Eran attr->pkey_index); 3466e126ba97SEli Cohen goto out; 3467e126ba97SEli Cohen } 3468158abf86SHaggai Eran } 3469e126ba97SEli Cohen 3470e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3471938fe83cSSaeed Mahameed attr->max_rd_atomic > 3472158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3473158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3474158abf86SHaggai Eran attr->max_rd_atomic); 3475e126ba97SEli Cohen goto out; 3476158abf86SHaggai Eran } 3477e126ba97SEli Cohen 3478e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3479938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3480158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3481158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3482158abf86SHaggai Eran attr->max_dest_rd_atomic); 3483e126ba97SEli Cohen goto out; 3484158abf86SHaggai Eran } 3485e126ba97SEli Cohen 3486e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3487e126ba97SEli Cohen err = 0; 3488e126ba97SEli Cohen goto out; 3489e126ba97SEli Cohen } 3490e126ba97SEli Cohen 349161147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 349261147f39SBodong Wang new_state, &ucmd); 3493e126ba97SEli Cohen 3494e126ba97SEli Cohen out: 3495e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3496e126ba97SEli Cohen return err; 3497e126ba97SEli Cohen } 3498e126ba97SEli Cohen 3499e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3500e126ba97SEli Cohen { 3501e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3502e126ba97SEli Cohen unsigned cur; 3503e126ba97SEli Cohen 3504e126ba97SEli Cohen cur = wq->head - wq->tail; 3505e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3506e126ba97SEli Cohen return 0; 3507e126ba97SEli Cohen 3508e126ba97SEli Cohen cq = to_mcq(ib_cq); 3509e126ba97SEli Cohen spin_lock(&cq->lock); 3510e126ba97SEli Cohen cur = wq->head - wq->tail; 3511e126ba97SEli Cohen spin_unlock(&cq->lock); 3512e126ba97SEli Cohen 3513e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3514e126ba97SEli Cohen } 3515e126ba97SEli Cohen 3516e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3517e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3518e126ba97SEli Cohen { 3519e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3520e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3521e126ba97SEli Cohen rseg->reserved = 0; 3522e126ba97SEli Cohen } 3523e126ba97SEli Cohen 3524f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3525f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 3526f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3527f0313965SErez Shitrit { 3528f0313965SErez Shitrit void *seg = eseg; 3529f0313965SErez Shitrit 3530f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3531f0313965SErez Shitrit 3532f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3533f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3534f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3535f0313965SErez Shitrit 3536f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3537f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3538f0313965SErez Shitrit 3539f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3540f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 35412b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3542f0313965SErez Shitrit u64 left, leftlen, copysz; 3543f0313965SErez Shitrit void *pdata = ud_wr->header; 3544f0313965SErez Shitrit 3545f0313965SErez Shitrit left = ud_wr->hlen; 3546f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 35472b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3548f0313965SErez Shitrit 3549f0313965SErez Shitrit /* 3550f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3551f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3552f0313965SErez Shitrit * rollback and than the copy the left 3553f0313965SErez Shitrit */ 35542b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3555f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3556f0313965SErez Shitrit 3557f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3558f0313965SErez Shitrit 3559f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3560f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3561f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3562f0313965SErez Shitrit } 3563f0313965SErez Shitrit 3564f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3565f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3566f0313965SErez Shitrit left -= copysz; 3567f0313965SErez Shitrit pdata += copysz; 3568f0313965SErez Shitrit memcpy(seg, pdata, left); 3569f0313965SErez Shitrit seg += ALIGN(left, 16); 3570f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3571f0313965SErez Shitrit } 3572f0313965SErez Shitrit } 3573f0313965SErez Shitrit 3574f0313965SErez Shitrit return seg; 3575f0313965SErez Shitrit } 3576f0313965SErez Shitrit 3577e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3578e126ba97SEli Cohen struct ib_send_wr *wr) 3579e126ba97SEli Cohen { 3580e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3581e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3582e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3583e126ba97SEli Cohen } 3584e126ba97SEli Cohen 3585e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3586e126ba97SEli Cohen { 3587e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3588e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3589e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3590e126ba97SEli Cohen } 3591e126ba97SEli Cohen 359231616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3593e126ba97SEli Cohen { 359431616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 359531616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3596e126ba97SEli Cohen } 3597e126ba97SEli Cohen 3598e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3599e126ba97SEli Cohen { 3600e126ba97SEli Cohen u64 result; 3601e126ba97SEli Cohen 3602e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3603e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3604e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3605e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3606e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3607e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3608e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3609e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3610e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3611e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3612e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3613e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3614e126ba97SEli Cohen 3615e126ba97SEli Cohen return cpu_to_be64(result); 3616e126ba97SEli Cohen } 3617e126ba97SEli Cohen 3618e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3619e6631814SSagi Grimberg { 3620e6631814SSagi Grimberg u64 result; 3621e6631814SSagi Grimberg 3622e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3623e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3624e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3625d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3626e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3627e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3628e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3629e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3630e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3631e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3632e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3633e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3634e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3635e6631814SSagi Grimberg 3636e6631814SSagi Grimberg return cpu_to_be64(result); 3637e6631814SSagi Grimberg } 3638e6631814SSagi Grimberg 36398a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 36408a187ee5SSagi Grimberg struct mlx5_ib_mr *mr) 36418a187ee5SSagi Grimberg { 364231616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 36438a187ee5SSagi Grimberg 36448a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3645b005d316SSagi Grimberg 36468a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 364731616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 36488a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 36498a187ee5SSagi Grimberg } 36508a187ee5SSagi Grimberg 3651dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3652e126ba97SEli Cohen { 3653e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3654e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 36552d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3656e126ba97SEli Cohen } 3657e126ba97SEli Cohen 365831616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3659e126ba97SEli Cohen { 3660968e78ddSHaggai Eran u64 result; 3661e126ba97SEli Cohen 366231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3663e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3664968e78ddSHaggai Eran 3665968e78ddSHaggai Eran return cpu_to_be64(result); 3666968e78ddSHaggai Eran } 3667968e78ddSHaggai Eran 366831616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3669968e78ddSHaggai Eran { 3670968e78ddSHaggai Eran u64 result; 3671968e78ddSHaggai Eran 3672968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3673968e78ddSHaggai Eran 3674968e78ddSHaggai Eran return cpu_to_be64(result); 3675968e78ddSHaggai Eran } 3676968e78ddSHaggai Eran 367756e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 367856e11d62SNoa Osherovich { 367956e11d62SNoa Osherovich u64 result; 368056e11d62SNoa Osherovich 368156e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 368256e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 368331616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 368456e11d62SNoa Osherovich 368556e11d62SNoa Osherovich return cpu_to_be64(result); 368656e11d62SNoa Osherovich } 368756e11d62SNoa Osherovich 368831616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 368956e11d62SNoa Osherovich { 369056e11d62SNoa Osherovich u64 result; 369156e11d62SNoa Osherovich 369231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 369331616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 369456e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 369531616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 369631616255SArtemy Kovalyov 369731616255SArtemy Kovalyov if (atomic) 369831616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 369956e11d62SNoa Osherovich 370056e11d62SNoa Osherovich return cpu_to_be64(result); 370156e11d62SNoa Osherovich } 370256e11d62SNoa Osherovich 370356e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 370456e11d62SNoa Osherovich { 370556e11d62SNoa Osherovich u64 result; 370656e11d62SNoa Osherovich 370731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 370856e11d62SNoa Osherovich 370956e11d62SNoa Osherovich return cpu_to_be64(result); 371056e11d62SNoa Osherovich } 371156e11d62SNoa Osherovich 3712c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3713c8d75a98SMajd Dibbiny { 3714c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3715c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3716c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3717c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3718c8d75a98SMajd Dibbiny return -EPERM; 3719c8d75a98SMajd Dibbiny return 0; 3720c8d75a98SMajd Dibbiny } 3721c8d75a98SMajd Dibbiny 3722c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3723c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3724578e7264SMaor Gottlieb struct ib_send_wr *wr, int atomic) 3725968e78ddSHaggai Eran { 3726e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3727968e78ddSHaggai Eran 3728968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3729968e78ddSHaggai Eran 3730968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3731968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3732968e78ddSHaggai Eran else 3733968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3734968e78ddSHaggai Eran 373531616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 373631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 373731616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 373831616255SArtemy Kovalyov 373931616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 374031616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3741968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3742968e78ddSHaggai Eran } 374356e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 374456e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 374531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 374631616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 374756e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3748e126ba97SEli Cohen } 374931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 375031616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 375131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 375231616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3753e126ba97SEli Cohen 3754e126ba97SEli Cohen if (!wr->num_sge) 3755968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3756c8d75a98SMajd Dibbiny 3757c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 3758e126ba97SEli Cohen } 3759e126ba97SEli Cohen 3760e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3761e126ba97SEli Cohen { 3762e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3763e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3764e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3765e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 37662ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3767e126ba97SEli Cohen } 3768e126ba97SEli Cohen 37698a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 37708a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 37718a187ee5SSagi Grimberg u32 key, int access) 37728a187ee5SSagi Grimberg { 37738a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 37748a187ee5SSagi Grimberg 37758a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3776b005d316SSagi Grimberg 3777ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3778b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3779ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3780b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3781b005d316SSagi Grimberg ndescs *= 2; 3782b005d316SSagi Grimberg 3783b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 37848a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 37858a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 37868a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 37878a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 37888a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 37898a187ee5SSagi Grimberg } 37908a187ee5SSagi Grimberg 3791dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3792e126ba97SEli Cohen { 3793e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3794968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3795e126ba97SEli Cohen } 3796e126ba97SEli Cohen 3797e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 3798e126ba97SEli Cohen { 3799e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3800968e78ddSHaggai Eran 3801e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 380231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3803968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3804e126ba97SEli Cohen 3805968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 380656e11d62SNoa Osherovich if (umrwr->pd) 3807968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 380831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 380931616255SArtemy Kovalyov !umrwr->length) 381031616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 381131616255SArtemy Kovalyov 381231616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3813968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3814968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3815746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3816968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3817e126ba97SEli Cohen } 3818e126ba97SEli Cohen 38198a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 38208a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 38218a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 38228a187ee5SSagi Grimberg { 38238a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 38248a187ee5SSagi Grimberg 38258a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 38268a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 38278a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 38288a187ee5SSagi Grimberg } 38298a187ee5SSagi Grimberg 3830e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 3831e126ba97SEli Cohen { 3832e126ba97SEli Cohen switch (wr->opcode) { 3833e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3834e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3835e126ba97SEli Cohen return wr->ex.imm_data; 3836e126ba97SEli Cohen 3837e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3838e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3839e126ba97SEli Cohen 3840e126ba97SEli Cohen default: 3841e126ba97SEli Cohen return 0; 3842e126ba97SEli Cohen } 3843e126ba97SEli Cohen } 3844e126ba97SEli Cohen 3845e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3846e126ba97SEli Cohen { 3847e126ba97SEli Cohen u8 *p = wqe; 3848e126ba97SEli Cohen u8 res = 0; 3849e126ba97SEli Cohen int i; 3850e126ba97SEli Cohen 3851e126ba97SEli Cohen for (i = 0; i < size; i++) 3852e126ba97SEli Cohen res ^= p[i]; 3853e126ba97SEli Cohen 3854e126ba97SEli Cohen return ~res; 3855e126ba97SEli Cohen } 3856e126ba97SEli Cohen 3857e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3858e126ba97SEli Cohen { 3859e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3860e126ba97SEli Cohen } 3861e126ba97SEli Cohen 3862e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 3863e126ba97SEli Cohen void *wqe, int *sz) 3864e126ba97SEli Cohen { 3865e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3866e126ba97SEli Cohen void *qend = qp->sq.qend; 3867e126ba97SEli Cohen void *addr; 3868e126ba97SEli Cohen int inl = 0; 3869e126ba97SEli Cohen int copy; 3870e126ba97SEli Cohen int len; 3871e126ba97SEli Cohen int i; 3872e126ba97SEli Cohen 3873e126ba97SEli Cohen seg = wqe; 3874e126ba97SEli Cohen wqe += sizeof(*seg); 3875e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3876e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3877e126ba97SEli Cohen len = wr->sg_list[i].length; 3878e126ba97SEli Cohen inl += len; 3879e126ba97SEli Cohen 3880e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3881e126ba97SEli Cohen return -ENOMEM; 3882e126ba97SEli Cohen 3883e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3884e126ba97SEli Cohen copy = qend - wqe; 3885e126ba97SEli Cohen memcpy(wqe, addr, copy); 3886e126ba97SEli Cohen addr += copy; 3887e126ba97SEli Cohen len -= copy; 3888e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 3889e126ba97SEli Cohen } 3890e126ba97SEli Cohen memcpy(wqe, addr, len); 3891e126ba97SEli Cohen wqe += len; 3892e126ba97SEli Cohen } 3893e126ba97SEli Cohen 3894e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 3895e126ba97SEli Cohen 3896e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 3897e126ba97SEli Cohen 3898e126ba97SEli Cohen return 0; 3899e126ba97SEli Cohen } 3900e126ba97SEli Cohen 3901e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 3902e6631814SSagi Grimberg { 3903e6631814SSagi Grimberg switch (type) { 3904e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3905e6631814SSagi Grimberg return MLX5_DIF_SIZE; 3906e6631814SSagi Grimberg default: 3907e6631814SSagi Grimberg return 0; 3908e6631814SSagi Grimberg } 3909e6631814SSagi Grimberg } 3910e6631814SSagi Grimberg 3911e6631814SSagi Grimberg static u8 bs_selector(int block_size) 3912e6631814SSagi Grimberg { 3913e6631814SSagi Grimberg switch (block_size) { 3914e6631814SSagi Grimberg case 512: return 0x1; 3915e6631814SSagi Grimberg case 520: return 0x2; 3916e6631814SSagi Grimberg case 4096: return 0x3; 3917e6631814SSagi Grimberg case 4160: return 0x4; 3918e6631814SSagi Grimberg case 1073741824: return 0x5; 3919e6631814SSagi Grimberg default: return 0; 3920e6631814SSagi Grimberg } 3921e6631814SSagi Grimberg } 3922e6631814SSagi Grimberg 392378eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 3924142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 3925e6631814SSagi Grimberg { 3926142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 3927142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 3928142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 3929142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 3930142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 3931142537f4SSagi Grimberg /* repeating block */ 3932142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 3933142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 3934142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 3935e6631814SSagi Grimberg 393678eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 393778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 3938e6631814SSagi Grimberg 393978eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 394078eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 394178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 394278eda2bbSSagi Grimberg else 394378eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 3944e6631814SSagi Grimberg } 3945e6631814SSagi Grimberg 394678eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 394778eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 3948e6631814SSagi Grimberg } 3949e6631814SSagi Grimberg 3950e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 3951e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 3952e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 3953e6631814SSagi Grimberg { 3954e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 3955e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 3956e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 3957e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 3958e6631814SSagi Grimberg 3959c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 3960e6631814SSagi Grimberg 3961142537f4SSagi Grimberg /* Basic + Extended + Inline */ 3962142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 3963e6631814SSagi Grimberg /* Input domain check byte mask */ 3964e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 396578eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 396678eda2bbSSagi Grimberg 396778eda2bbSSagi Grimberg /* Memory domain */ 396878eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 396978eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 397078eda2bbSSagi Grimberg break; 397178eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 397278eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 397378eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 397478eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 397578eda2bbSSagi Grimberg break; 397678eda2bbSSagi Grimberg default: 397778eda2bbSSagi Grimberg return -EINVAL; 397878eda2bbSSagi Grimberg } 397978eda2bbSSagi Grimberg 398078eda2bbSSagi Grimberg /* Wire domain */ 398178eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 398278eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 398378eda2bbSSagi Grimberg break; 398478eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3985e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 398678eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 3987e6631814SSagi Grimberg /* Same block structure */ 3988142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 3989e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 3990fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 3991c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 3992fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 3993c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 3994fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 3995e6631814SSagi Grimberg } else 3996e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 3997e6631814SSagi Grimberg 3998142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 399978eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4000e6631814SSagi Grimberg break; 4001e6631814SSagi Grimberg default: 4002e6631814SSagi Grimberg return -EINVAL; 4003e6631814SSagi Grimberg } 4004e6631814SSagi Grimberg 4005e6631814SSagi Grimberg return 0; 4006e6631814SSagi Grimberg } 4007e6631814SSagi Grimberg 4008e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 4009e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4010e6631814SSagi Grimberg { 4011e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4012e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4013e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4014e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4015e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4016e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4017e6631814SSagi Grimberg int ret; 4018e6631814SSagi Grimberg int wqe_size; 4019e6631814SSagi Grimberg 4020e622f2f4SChristoph Hellwig if (!wr->prot || 4021e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4022e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4023e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4024e6631814SSagi Grimberg /** 4025e6631814SSagi Grimberg * Source domain doesn't contain signature information 40265c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4027e6631814SSagi Grimberg * So need construct: 4028e6631814SSagi Grimberg * ------------------ 4029e6631814SSagi Grimberg * | data_klm | 4030e6631814SSagi Grimberg * ------------------ 4031e6631814SSagi Grimberg * | BSF | 4032e6631814SSagi Grimberg * ------------------ 4033e6631814SSagi Grimberg **/ 4034e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4035e6631814SSagi Grimberg 4036e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4037e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4038e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4039e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4040e6631814SSagi Grimberg } else { 4041e6631814SSagi Grimberg /** 4042e6631814SSagi Grimberg * Source domain contains signature information 4043e6631814SSagi Grimberg * So need construct a strided block format: 4044e6631814SSagi Grimberg * --------------------------- 4045e6631814SSagi Grimberg * | stride_block_ctrl | 4046e6631814SSagi Grimberg * --------------------------- 4047e6631814SSagi Grimberg * | data_klm | 4048e6631814SSagi Grimberg * --------------------------- 4049e6631814SSagi Grimberg * | prot_klm | 4050e6631814SSagi Grimberg * --------------------------- 4051e6631814SSagi Grimberg * | BSF | 4052e6631814SSagi Grimberg * --------------------------- 4053e6631814SSagi Grimberg **/ 4054e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4055e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4056e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4057e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4058e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4059e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4060e6631814SSagi Grimberg int prot_size; 4061e6631814SSagi Grimberg 4062e6631814SSagi Grimberg sblock_ctrl = *seg; 4063e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4064e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4065e6631814SSagi Grimberg 4066e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4067e6631814SSagi Grimberg if (!prot_size) { 4068e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4069e6631814SSagi Grimberg return -EINVAL; 4070e6631814SSagi Grimberg } 4071e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4072e6631814SSagi Grimberg prot_size); 4073e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4074e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4075e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4076e6631814SSagi Grimberg 4077e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4078e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4079e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 40805c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 40815c273b16SSagi Grimberg 4082e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4083e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4084e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4085e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 40865c273b16SSagi Grimberg 4087e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4088e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4089e6631814SSagi Grimberg } 4090e6631814SSagi Grimberg 4091e6631814SSagi Grimberg *seg += wqe_size; 4092e6631814SSagi Grimberg *size += wqe_size / 16; 4093e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4094e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4095e6631814SSagi Grimberg 4096e6631814SSagi Grimberg bsf = *seg; 4097e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4098e6631814SSagi Grimberg if (ret) 4099e6631814SSagi Grimberg return -EINVAL; 4100e6631814SSagi Grimberg 4101e6631814SSagi Grimberg *seg += sizeof(*bsf); 4102e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4103e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4104e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4105e6631814SSagi Grimberg 4106e6631814SSagi Grimberg return 0; 4107e6631814SSagi Grimberg } 4108e6631814SSagi Grimberg 4109e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 411031616255SArtemy Kovalyov struct ib_sig_handover_wr *wr, u32 size, 4111e6631814SSagi Grimberg u32 length, u32 pdn) 4112e6631814SSagi Grimberg { 4113e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4114e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4115d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4116e6631814SSagi Grimberg 4117e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4118e6631814SSagi Grimberg 4119e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4120ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4121e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4122d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4123e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4124e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 412531616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4126e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4127e6631814SSagi Grimberg } 4128e6631814SSagi Grimberg 4129e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 413031616255SArtemy Kovalyov u32 size) 4131e6631814SSagi Grimberg { 4132e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4133e6631814SSagi Grimberg 4134e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 413531616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4136e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4137e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4138e6631814SSagi Grimberg } 4139e6631814SSagi Grimberg 4140e6631814SSagi Grimberg 4141e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 4142e6631814SSagi Grimberg void **seg, int *size) 4143e6631814SSagi Grimberg { 4144e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4145e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4146e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 414731616255SArtemy Kovalyov u32 xlt_size; 4148e6631814SSagi Grimberg int region_len, ret; 4149e6631814SSagi Grimberg 4150e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4151e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4152d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4153d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4154e6631814SSagi Grimberg return -EINVAL; 4155e6631814SSagi Grimberg 4156e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4157e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4158e622f2f4SChristoph Hellwig if (wr->prot && 4159e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4160e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4161e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4162e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4163e6631814SSagi Grimberg 4164e6631814SSagi Grimberg /** 4165e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4166e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4167e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4168e6631814SSagi Grimberg **/ 416931616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4170e6631814SSagi Grimberg 417131616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4172e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4173e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4174e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4175e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4176e6631814SSagi Grimberg 417731616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4178e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4179e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4180e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4181e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4182e6631814SSagi Grimberg 4183e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4184e6631814SSagi Grimberg if (ret) 4185e6631814SSagi Grimberg return ret; 4186e6631814SSagi Grimberg 4187d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4188e6631814SSagi Grimberg return 0; 4189e6631814SSagi Grimberg } 4190e6631814SSagi Grimberg 4191e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4192e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4193e6631814SSagi Grimberg { 4194e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4195e6631814SSagi Grimberg 4196e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4197e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4198e6631814SSagi Grimberg switch (domain->sig_type) { 419978eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 420078eda2bbSSagi Grimberg break; 4201e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4202e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4203e6631814SSagi Grimberg domain->sig.dif.app_tag); 4204e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4205e6631814SSagi Grimberg break; 4206e6631814SSagi Grimberg default: 420712bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 420812bbf1eaSLeon Romanovsky domain->sig_type); 420912bbf1eaSLeon Romanovsky return -EINVAL; 4210e6631814SSagi Grimberg } 4211e6631814SSagi Grimberg 421278eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 421378eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 421478eda2bbSSagi Grimberg 4215e6631814SSagi Grimberg return 0; 4216e6631814SSagi Grimberg } 4217e6631814SSagi Grimberg 42188a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 42198a187ee5SSagi Grimberg struct ib_reg_wr *wr, 42208a187ee5SSagi Grimberg void **seg, int *size) 42218a187ee5SSagi Grimberg { 42228a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 42238a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 42248a187ee5SSagi Grimberg 42258a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 42268a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 42278a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 42288a187ee5SSagi Grimberg return -EINVAL; 42298a187ee5SSagi Grimberg } 42308a187ee5SSagi Grimberg 42318a187ee5SSagi Grimberg set_reg_umr_seg(*seg, mr); 42328a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 42338a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 42348a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 42358a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 42368a187ee5SSagi Grimberg 42378a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 42388a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 42398a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 42408a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 42418a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 42428a187ee5SSagi Grimberg 42438a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 42448a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 42458a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 42468a187ee5SSagi Grimberg 42478a187ee5SSagi Grimberg return 0; 42488a187ee5SSagi Grimberg } 42498a187ee5SSagi Grimberg 4250dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4251e126ba97SEli Cohen { 4252dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4253e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4254e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4255e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4256e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4257dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4258e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4259e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4260e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4261e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4262e126ba97SEli Cohen } 4263e126ba97SEli Cohen 4264e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4265e126ba97SEli Cohen { 4266e126ba97SEli Cohen __be32 *p = NULL; 4267e126ba97SEli Cohen int tidx = idx; 4268e126ba97SEli Cohen int i, j; 4269e126ba97SEli Cohen 4270e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4271e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4272e126ba97SEli Cohen if ((i & 0xf) == 0) { 4273e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4274e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4275e126ba97SEli Cohen p = buf; 4276e126ba97SEli Cohen j = 0; 4277e126ba97SEli Cohen } 4278e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4279e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4280e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4281e126ba97SEli Cohen } 4282e126ba97SEli Cohen } 4283e126ba97SEli Cohen 42846e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 42856e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 42866a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 42876e5eadacSSagi Grimberg int *size, int nreq) 42886e5eadacSSagi Grimberg { 4289b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4290b2a232d2SLeon Romanovsky return -ENOMEM; 42916e5eadacSSagi Grimberg 42926e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 42936e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 42946e5eadacSSagi Grimberg *ctrl = *seg; 42956e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 42966e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 42976e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 42986e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 42996e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 43006e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 43016e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 43026e5eadacSSagi Grimberg 43036e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 43046e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 43056e5eadacSSagi Grimberg 4306b2a232d2SLeon Romanovsky return 0; 43076e5eadacSSagi Grimberg } 43086e5eadacSSagi Grimberg 43096e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 43106e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 43116e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 43126e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 43136e5eadacSSagi Grimberg { 43146e5eadacSSagi Grimberg u8 opmod = 0; 43156e5eadacSSagi Grimberg 43166e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 43176e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 431819098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 43196e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 43206e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 43216e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 43226e5eadacSSagi Grimberg 43236e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 43246e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 43256e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 43266e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 43276e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 43286e5eadacSSagi Grimberg } 43296e5eadacSSagi Grimberg 43306e5eadacSSagi Grimberg 4331e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 4332e126ba97SEli Cohen struct ib_send_wr **bad_wr) 4333e126ba97SEli Cohen { 4334e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4335e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 433689ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4337d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4338e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4339e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4340e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4341d16e91daSHaggai Eran struct mlx5_bf *bf; 4342e126ba97SEli Cohen int uninitialized_var(size); 4343d16e91daSHaggai Eran void *qend; 4344e126ba97SEli Cohen unsigned long flags; 4345e126ba97SEli Cohen unsigned idx; 4346e126ba97SEli Cohen int err = 0; 4347e126ba97SEli Cohen int num_sge; 4348e126ba97SEli Cohen void *seg; 4349e126ba97SEli Cohen int nreq; 4350e126ba97SEli Cohen int i; 4351e126ba97SEli Cohen u8 next_fence = 0; 4352e126ba97SEli Cohen u8 fence; 4353e126ba97SEli Cohen 4354d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4355d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4356d16e91daSHaggai Eran 4357d16e91daSHaggai Eran qp = to_mqp(ibqp); 43585fe9dec0SEli Cohen bf = &qp->bf; 4359d16e91daSHaggai Eran qend = qp->sq.qend; 4360d16e91daSHaggai Eran 4361e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4362e126ba97SEli Cohen 436389ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 436489ea94a7SMaor Gottlieb err = -EIO; 436589ea94a7SMaor Gottlieb *bad_wr = wr; 436689ea94a7SMaor Gottlieb nreq = 0; 436789ea94a7SMaor Gottlieb goto out; 436889ea94a7SMaor Gottlieb } 436989ea94a7SMaor Gottlieb 4370e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4371a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4372e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4373e126ba97SEli Cohen err = -EINVAL; 4374e126ba97SEli Cohen *bad_wr = wr; 4375e126ba97SEli Cohen goto out; 4376e126ba97SEli Cohen } 4377e126ba97SEli Cohen 4378e126ba97SEli Cohen num_sge = wr->num_sge; 4379e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4380e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 438124be409bSChuck Lever err = -EINVAL; 4382e126ba97SEli Cohen *bad_wr = wr; 4383e126ba97SEli Cohen goto out; 4384e126ba97SEli Cohen } 4385e126ba97SEli Cohen 43866e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 43876e5eadacSSagi Grimberg if (err) { 43886e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 43896e5eadacSSagi Grimberg err = -ENOMEM; 43906e5eadacSSagi Grimberg *bad_wr = wr; 43916e5eadacSSagi Grimberg goto out; 43926e5eadacSSagi Grimberg } 4393e126ba97SEli Cohen 43946e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 43956e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 43966e8484c5SMax Gurtovoy fence = dev->umr_fence; 43976e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 43986e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 43996e8484c5SMax Gurtovoy if (qp->next_fence) 44006e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 44016e8484c5SMax Gurtovoy else 44026e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 44036e8484c5SMax Gurtovoy } else { 44046e8484c5SMax Gurtovoy fence = qp->next_fence; 44056e8484c5SMax Gurtovoy } 44066e8484c5SMax Gurtovoy 4407e126ba97SEli Cohen switch (ibqp->qp_type) { 4408e126ba97SEli Cohen case IB_QPT_XRC_INI: 4409e126ba97SEli Cohen xrc = seg; 4410e126ba97SEli Cohen seg += sizeof(*xrc); 4411e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4412e126ba97SEli Cohen /* fall through */ 4413e126ba97SEli Cohen case IB_QPT_RC: 4414e126ba97SEli Cohen switch (wr->opcode) { 4415e126ba97SEli Cohen case IB_WR_RDMA_READ: 4416e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4417e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4418e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4419e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4420e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4421e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4422e126ba97SEli Cohen break; 4423e126ba97SEli Cohen 4424e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4425e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4426e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 442781bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 442881bea28fSEli Cohen err = -ENOSYS; 442981bea28fSEli Cohen *bad_wr = wr; 443081bea28fSEli Cohen goto out; 4431e126ba97SEli Cohen 4432e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4433e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4434e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4435dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4436e126ba97SEli Cohen num_sge = 0; 4437e126ba97SEli Cohen break; 4438e126ba97SEli Cohen 44398a187ee5SSagi Grimberg case IB_WR_REG_MR: 44408a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 44418a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 44428a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 44438a187ee5SSagi Grimberg if (err) { 44448a187ee5SSagi Grimberg *bad_wr = wr; 44458a187ee5SSagi Grimberg goto out; 44468a187ee5SSagi Grimberg } 44478a187ee5SSagi Grimberg num_sge = 0; 44488a187ee5SSagi Grimberg break; 44498a187ee5SSagi Grimberg 4450e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4451e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4452e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4453e6631814SSagi Grimberg 4454e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4455e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4456e6631814SSagi Grimberg if (err) { 4457e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4458e6631814SSagi Grimberg *bad_wr = wr; 4459e6631814SSagi Grimberg goto out; 4460e6631814SSagi Grimberg } 4461e6631814SSagi Grimberg 44626e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 44636e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4464e6631814SSagi Grimberg /* 4465e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4466e6631814SSagi Grimberg * on error 4467e6631814SSagi Grimberg */ 4468e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 4469e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 4470e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4471e6631814SSagi Grimberg &idx, &size, nreq); 4472e6631814SSagi Grimberg if (err) { 4473e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4474e6631814SSagi Grimberg err = -ENOMEM; 4475e6631814SSagi Grimberg *bad_wr = wr; 4476e6631814SSagi Grimberg goto out; 4477e6631814SSagi Grimberg } 4478e6631814SSagi Grimberg 4479e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4480e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4481e6631814SSagi Grimberg &size); 4482e6631814SSagi Grimberg if (err) { 4483e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4484e6631814SSagi Grimberg *bad_wr = wr; 4485e6631814SSagi Grimberg goto out; 4486e6631814SSagi Grimberg } 4487e6631814SSagi Grimberg 44886e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 44896e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 4490e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4491e6631814SSagi Grimberg &idx, &size, nreq); 4492e6631814SSagi Grimberg if (err) { 4493e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4494e6631814SSagi Grimberg err = -ENOMEM; 4495e6631814SSagi Grimberg *bad_wr = wr; 4496e6631814SSagi Grimberg goto out; 4497e6631814SSagi Grimberg } 4498e6631814SSagi Grimberg 4499e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4500e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4501e6631814SSagi Grimberg &size); 4502e6631814SSagi Grimberg if (err) { 4503e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4504e6631814SSagi Grimberg *bad_wr = wr; 4505e6631814SSagi Grimberg goto out; 4506e6631814SSagi Grimberg } 4507e6631814SSagi Grimberg 45086e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 45096e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 45106e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4511e6631814SSagi Grimberg num_sge = 0; 4512e6631814SSagi Grimberg goto skip_psv; 4513e6631814SSagi Grimberg 4514e126ba97SEli Cohen default: 4515e126ba97SEli Cohen break; 4516e126ba97SEli Cohen } 4517e126ba97SEli Cohen break; 4518e126ba97SEli Cohen 4519e126ba97SEli Cohen case IB_QPT_UC: 4520e126ba97SEli Cohen switch (wr->opcode) { 4521e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4522e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4523e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4524e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4525e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4526e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4527e126ba97SEli Cohen break; 4528e126ba97SEli Cohen 4529e126ba97SEli Cohen default: 4530e126ba97SEli Cohen break; 4531e126ba97SEli Cohen } 4532e126ba97SEli Cohen break; 4533e126ba97SEli Cohen 4534e126ba97SEli Cohen case IB_QPT_SMI: 45351e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 45361e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 45371e0e50b6SMaor Gottlieb err = -EPERM; 45381e0e50b6SMaor Gottlieb *bad_wr = wr; 45391e0e50b6SMaor Gottlieb goto out; 45401e0e50b6SMaor Gottlieb } 4541f6b1ee34SBart Van Assche /* fall through */ 4542d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4543e126ba97SEli Cohen set_datagram_seg(seg, wr); 4544e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4545e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4546e126ba97SEli Cohen if (unlikely((seg == qend))) 4547e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4548e126ba97SEli Cohen break; 4549f0313965SErez Shitrit case IB_QPT_UD: 4550f0313965SErez Shitrit set_datagram_seg(seg, wr); 4551f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4552f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4553e126ba97SEli Cohen 4554f0313965SErez Shitrit if (unlikely((seg == qend))) 4555f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4556f0313965SErez Shitrit 4557f0313965SErez Shitrit /* handle qp that supports ud offload */ 4558f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4559f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4560f0313965SErez Shitrit 4561f0313965SErez Shitrit pad = seg; 4562f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4563f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4564f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4565f0313965SErez Shitrit 4566f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4567f0313965SErez Shitrit 4568f0313965SErez Shitrit if (unlikely((seg == qend))) 4569f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4570f0313965SErez Shitrit } 4571f0313965SErez Shitrit break; 4572e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4573e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4574e126ba97SEli Cohen err = -EINVAL; 4575e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4576e126ba97SEli Cohen goto out; 4577e126ba97SEli Cohen } 4578e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4579e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4580c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4581c8d75a98SMajd Dibbiny if (unlikely(err)) 4582c8d75a98SMajd Dibbiny goto out; 4583e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4584e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4585e126ba97SEli Cohen if (unlikely((seg == qend))) 4586e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4587e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4588e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4589e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4590e126ba97SEli Cohen if (unlikely((seg == qend))) 4591e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4592e126ba97SEli Cohen break; 4593e126ba97SEli Cohen 4594e126ba97SEli Cohen default: 4595e126ba97SEli Cohen break; 4596e126ba97SEli Cohen } 4597e126ba97SEli Cohen 4598e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4599e126ba97SEli Cohen int uninitialized_var(sz); 4600e126ba97SEli Cohen 4601e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4602e126ba97SEli Cohen if (unlikely(err)) { 4603e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4604e126ba97SEli Cohen *bad_wr = wr; 4605e126ba97SEli Cohen goto out; 4606e126ba97SEli Cohen } 4607e126ba97SEli Cohen size += sz; 4608e126ba97SEli Cohen } else { 4609e126ba97SEli Cohen dpseg = seg; 4610e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4611e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4612e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4613e126ba97SEli Cohen dpseg = seg; 4614e126ba97SEli Cohen } 4615e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4616e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4617e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4618e126ba97SEli Cohen dpseg++; 4619e126ba97SEli Cohen } 4620e126ba97SEli Cohen } 4621e126ba97SEli Cohen } 4622e126ba97SEli Cohen 46236e8484c5SMax Gurtovoy qp->next_fence = next_fence; 46246e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 46256e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4626e6631814SSagi Grimberg skip_psv: 4627e126ba97SEli Cohen if (0) 4628e126ba97SEli Cohen dump_wqe(qp, idx, size); 4629e126ba97SEli Cohen } 4630e126ba97SEli Cohen 4631e126ba97SEli Cohen out: 4632e126ba97SEli Cohen if (likely(nreq)) { 4633e126ba97SEli Cohen qp->sq.head += nreq; 4634e126ba97SEli Cohen 4635e126ba97SEli Cohen /* Make sure that descriptors are written before 4636e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4637e126ba97SEli Cohen */ 4638e126ba97SEli Cohen wmb(); 4639e126ba97SEli Cohen 4640e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4641e126ba97SEli Cohen 4642ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4643ada388f7SEli Cohen * we hit doorbell */ 4644ada388f7SEli Cohen wmb(); 4645ada388f7SEli Cohen 46465fe9dec0SEli Cohen /* currently we support only regular doorbells */ 46475fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4648e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4649e126ba97SEli Cohen * and reach the HCA out of order. 4650e126ba97SEli Cohen */ 4651e126ba97SEli Cohen mmiowb(); 4652e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4653e126ba97SEli Cohen } 4654e126ba97SEli Cohen 4655e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4656e126ba97SEli Cohen 4657e126ba97SEli Cohen return err; 4658e126ba97SEli Cohen } 4659e126ba97SEli Cohen 4660e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4661e126ba97SEli Cohen { 4662e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4663e126ba97SEli Cohen } 4664e126ba97SEli Cohen 4665e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 4666e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 4667e126ba97SEli Cohen { 4668e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4669e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4670e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 467189ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 467289ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4673e126ba97SEli Cohen unsigned long flags; 4674e126ba97SEli Cohen int err = 0; 4675e126ba97SEli Cohen int nreq; 4676e126ba97SEli Cohen int ind; 4677e126ba97SEli Cohen int i; 4678e126ba97SEli Cohen 4679d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4680d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4681d16e91daSHaggai Eran 4682e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4683e126ba97SEli Cohen 468489ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 468589ea94a7SMaor Gottlieb err = -EIO; 468689ea94a7SMaor Gottlieb *bad_wr = wr; 468789ea94a7SMaor Gottlieb nreq = 0; 468889ea94a7SMaor Gottlieb goto out; 468989ea94a7SMaor Gottlieb } 469089ea94a7SMaor Gottlieb 4691e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4692e126ba97SEli Cohen 4693e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4694e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4695e126ba97SEli Cohen err = -ENOMEM; 4696e126ba97SEli Cohen *bad_wr = wr; 4697e126ba97SEli Cohen goto out; 4698e126ba97SEli Cohen } 4699e126ba97SEli Cohen 4700e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4701e126ba97SEli Cohen err = -EINVAL; 4702e126ba97SEli Cohen *bad_wr = wr; 4703e126ba97SEli Cohen goto out; 4704e126ba97SEli Cohen } 4705e126ba97SEli Cohen 4706e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4707e126ba97SEli Cohen if (qp->wq_sig) 4708e126ba97SEli Cohen scat++; 4709e126ba97SEli Cohen 4710e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4711e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4712e126ba97SEli Cohen 4713e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4714e126ba97SEli Cohen scat[i].byte_count = 0; 4715e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4716e126ba97SEli Cohen scat[i].addr = 0; 4717e126ba97SEli Cohen } 4718e126ba97SEli Cohen 4719e126ba97SEli Cohen if (qp->wq_sig) { 4720e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4721e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4722e126ba97SEli Cohen } 4723e126ba97SEli Cohen 4724e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4725e126ba97SEli Cohen 4726e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4727e126ba97SEli Cohen } 4728e126ba97SEli Cohen 4729e126ba97SEli Cohen out: 4730e126ba97SEli Cohen if (likely(nreq)) { 4731e126ba97SEli Cohen qp->rq.head += nreq; 4732e126ba97SEli Cohen 4733e126ba97SEli Cohen /* Make sure that descriptors are written before 4734e126ba97SEli Cohen * doorbell record. 4735e126ba97SEli Cohen */ 4736e126ba97SEli Cohen wmb(); 4737e126ba97SEli Cohen 4738e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4739e126ba97SEli Cohen } 4740e126ba97SEli Cohen 4741e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4742e126ba97SEli Cohen 4743e126ba97SEli Cohen return err; 4744e126ba97SEli Cohen } 4745e126ba97SEli Cohen 4746e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4747e126ba97SEli Cohen { 4748e126ba97SEli Cohen switch (mlx5_state) { 4749e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4750e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4751e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4752e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4753e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4754e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4755e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4756e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4757e126ba97SEli Cohen default: return -1; 4758e126ba97SEli Cohen } 4759e126ba97SEli Cohen } 4760e126ba97SEli Cohen 4761e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4762e126ba97SEli Cohen { 4763e126ba97SEli Cohen switch (mlx5_mig_state) { 4764e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4765e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4766e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4767e126ba97SEli Cohen default: return -1; 4768e126ba97SEli Cohen } 4769e126ba97SEli Cohen } 4770e126ba97SEli Cohen 4771e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4772e126ba97SEli Cohen { 4773e126ba97SEli Cohen int ib_flags = 0; 4774e126ba97SEli Cohen 4775e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4776e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4777e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4778e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4779e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4780e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4781e126ba97SEli Cohen 4782e126ba97SEli Cohen return ib_flags; 4783e126ba97SEli Cohen } 4784e126ba97SEli Cohen 478538349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4786d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4787e126ba97SEli Cohen struct mlx5_qp_path *path) 4788e126ba97SEli Cohen { 4789e126ba97SEli Cohen 4790d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4791e126ba97SEli Cohen 4792e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 4793e126ba97SEli Cohen return; 4794e126ba97SEli Cohen 4795ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4796ae59c3f0SLeon Romanovsky 4797d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4798d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4799e126ba97SEli Cohen 4800d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4801d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4802d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4803d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4804d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4805d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4806d8966fcdSDasaratharaman Chandramouli 4807d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4808d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4809d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4810d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4811d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4812d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4813e126ba97SEli Cohen } 4814e126ba97SEli Cohen } 4815e126ba97SEli Cohen 48166d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 48176d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 48186d2f89dfSmajd@mellanox.com u8 *sq_state) 4819e126ba97SEli Cohen { 48206d2f89dfSmajd@mellanox.com int err; 48216d2f89dfSmajd@mellanox.com 482228160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 48236d2f89dfSmajd@mellanox.com if (err) 48246d2f89dfSmajd@mellanox.com goto out; 48256d2f89dfSmajd@mellanox.com sq->state = *sq_state; 48266d2f89dfSmajd@mellanox.com 48276d2f89dfSmajd@mellanox.com out: 48286d2f89dfSmajd@mellanox.com return err; 48296d2f89dfSmajd@mellanox.com } 48306d2f89dfSmajd@mellanox.com 48316d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 48326d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 48336d2f89dfSmajd@mellanox.com u8 *rq_state) 48346d2f89dfSmajd@mellanox.com { 48356d2f89dfSmajd@mellanox.com void *out; 48366d2f89dfSmajd@mellanox.com void *rqc; 48376d2f89dfSmajd@mellanox.com int inlen; 48386d2f89dfSmajd@mellanox.com int err; 48396d2f89dfSmajd@mellanox.com 48406d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 48411b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 48426d2f89dfSmajd@mellanox.com if (!out) 48436d2f89dfSmajd@mellanox.com return -ENOMEM; 48446d2f89dfSmajd@mellanox.com 48456d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 48466d2f89dfSmajd@mellanox.com if (err) 48476d2f89dfSmajd@mellanox.com goto out; 48486d2f89dfSmajd@mellanox.com 48496d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 48506d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 48516d2f89dfSmajd@mellanox.com rq->state = *rq_state; 48526d2f89dfSmajd@mellanox.com 48536d2f89dfSmajd@mellanox.com out: 48546d2f89dfSmajd@mellanox.com kvfree(out); 48556d2f89dfSmajd@mellanox.com return err; 48566d2f89dfSmajd@mellanox.com } 48576d2f89dfSmajd@mellanox.com 48586d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 48596d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 48606d2f89dfSmajd@mellanox.com { 48616d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 48626d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 48636d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 48646d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 48656d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 48666d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 48676d2f89dfSmajd@mellanox.com }, 48686d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 48696d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 48706d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 48716d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 48726d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 48736d2f89dfSmajd@mellanox.com }, 48746d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 48756d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 48766d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 48776d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 48786d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 48796d2f89dfSmajd@mellanox.com }, 48806d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 48816d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 48826d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 48836d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 48846d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 48856d2f89dfSmajd@mellanox.com }, 48866d2f89dfSmajd@mellanox.com }; 48876d2f89dfSmajd@mellanox.com 48886d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 48896d2f89dfSmajd@mellanox.com 48906d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 48916d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 48926d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 48936d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 48946d2f89dfSmajd@mellanox.com return -EINVAL; 48956d2f89dfSmajd@mellanox.com } 48966d2f89dfSmajd@mellanox.com 48976d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 48986d2f89dfSmajd@mellanox.com *qp_state = qp->state; 48996d2f89dfSmajd@mellanox.com 49006d2f89dfSmajd@mellanox.com return 0; 49016d2f89dfSmajd@mellanox.com } 49026d2f89dfSmajd@mellanox.com 49036d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 49046d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 49056d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 49066d2f89dfSmajd@mellanox.com { 49076d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 49086d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 49096d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 49106d2f89dfSmajd@mellanox.com int err; 49116d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 49126d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 49136d2f89dfSmajd@mellanox.com 49146d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 49156d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 49166d2f89dfSmajd@mellanox.com if (err) 49176d2f89dfSmajd@mellanox.com return err; 49186d2f89dfSmajd@mellanox.com } 49196d2f89dfSmajd@mellanox.com 49206d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 49216d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 49226d2f89dfSmajd@mellanox.com if (err) 49236d2f89dfSmajd@mellanox.com return err; 49246d2f89dfSmajd@mellanox.com } 49256d2f89dfSmajd@mellanox.com 49266d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 49276d2f89dfSmajd@mellanox.com raw_packet_qp_state); 49286d2f89dfSmajd@mellanox.com } 49296d2f89dfSmajd@mellanox.com 49306d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 49316d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 49326d2f89dfSmajd@mellanox.com { 493309a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 4934e126ba97SEli Cohen struct mlx5_qp_context *context; 4935e126ba97SEli Cohen int mlx5_state; 493609a7d9ecSSaeed Mahameed u32 *outb; 4937e126ba97SEli Cohen int err = 0; 4938e126ba97SEli Cohen 493909a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 49406d2f89dfSmajd@mellanox.com if (!outb) 49416d2f89dfSmajd@mellanox.com return -ENOMEM; 49426d2f89dfSmajd@mellanox.com 494319098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 494409a7d9ecSSaeed Mahameed outlen); 4945e126ba97SEli Cohen if (err) 49466d2f89dfSmajd@mellanox.com goto out; 4947e126ba97SEli Cohen 494809a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 494909a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 495009a7d9ecSSaeed Mahameed 4951e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 4952e126ba97SEli Cohen 4953e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 4954e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 4955e126ba97SEli Cohen qp_attr->path_mig_state = 4956e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 4957e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 4958e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 4959e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 4960e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 4961e126ba97SEli Cohen qp_attr->qp_access_flags = 4962e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 4963e126ba97SEli Cohen 4964e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 496538349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 496638349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 4967d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 4968d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 4969d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 4970d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 4971e126ba97SEli Cohen } 4972e126ba97SEli Cohen 4973d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 4974e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 4975e126ba97SEli Cohen 4976e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 4977e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 4978e126ba97SEli Cohen 4979e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 4980e126ba97SEli Cohen 4981e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 4982e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 4983e126ba97SEli Cohen qp_attr->min_rnr_timer = 4984e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 4985e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 4986e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 4987e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 4988e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 49896d2f89dfSmajd@mellanox.com 49906d2f89dfSmajd@mellanox.com out: 49916d2f89dfSmajd@mellanox.com kfree(outb); 49926d2f89dfSmajd@mellanox.com return err; 49936d2f89dfSmajd@mellanox.com } 49946d2f89dfSmajd@mellanox.com 4995776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 4996776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 4997776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 4998776a3906SMoni Shoua { 4999776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5000776a3906SMoni Shoua u32 *out; 5001776a3906SMoni Shoua u32 access_flags = 0; 5002776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5003776a3906SMoni Shoua void *dctc; 5004776a3906SMoni Shoua int err; 5005776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5006776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5007776a3906SMoni Shoua IB_QP_PORT | 5008776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5009776a3906SMoni Shoua IB_QP_AV | 5010776a3906SMoni Shoua IB_QP_PATH_MTU | 5011776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5012776a3906SMoni Shoua 5013776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5014776a3906SMoni Shoua return -EINVAL; 5015776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5016776a3906SMoni Shoua return -EINVAL; 5017776a3906SMoni Shoua 5018776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5019776a3906SMoni Shoua if (!out) 5020776a3906SMoni Shoua return -ENOMEM; 5021776a3906SMoni Shoua 5022776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5023776a3906SMoni Shoua if (err) 5024776a3906SMoni Shoua goto out; 5025776a3906SMoni Shoua 5026776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5027776a3906SMoni Shoua 5028776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5029776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5030776a3906SMoni Shoua 5031776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5032776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5033776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5034776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5035776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5036776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5037776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5038776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5039776a3906SMoni Shoua } 5040776a3906SMoni Shoua 5041776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5042776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5043776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5044776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5045776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5046776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5047776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5048776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5049776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5050776a3906SMoni Shoua } 5051776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5052776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5053776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5054776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5055776a3906SMoni Shoua out: 5056776a3906SMoni Shoua kfree(out); 5057776a3906SMoni Shoua return err; 5058776a3906SMoni Shoua } 5059776a3906SMoni Shoua 50606d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 50616d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 50626d2f89dfSmajd@mellanox.com { 50636d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 50646d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 50656d2f89dfSmajd@mellanox.com int err = 0; 50666d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 50676d2f89dfSmajd@mellanox.com 506828d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 506928d61370SYishai Hadas return -ENOSYS; 507028d61370SYishai Hadas 5071d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5072d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5073d16e91daSHaggai Eran qp_init_attr); 5074d16e91daSHaggai Eran 5075c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5076c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5077c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5078c2e53b2cSYishai Hadas 5079776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5080776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5081776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5082776a3906SMoni Shoua 50836d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 50846d2f89dfSmajd@mellanox.com 5085c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5086c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 50876d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 50886d2f89dfSmajd@mellanox.com if (err) 50896d2f89dfSmajd@mellanox.com goto out; 50906d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 50916d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 50926d2f89dfSmajd@mellanox.com } else { 50936d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 50946d2f89dfSmajd@mellanox.com if (err) 50956d2f89dfSmajd@mellanox.com goto out; 50966d2f89dfSmajd@mellanox.com } 50976d2f89dfSmajd@mellanox.com 50986d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5099e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5100e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5101e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5102e126ba97SEli Cohen 5103e126ba97SEli Cohen if (!ibqp->uobject) { 51040540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5105e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 51060540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5107e126ba97SEli Cohen } else { 5108e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5109e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5110e126ba97SEli Cohen } 5111e126ba97SEli Cohen 51120540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 51130540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 51140540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 51150540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 51160540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5117e126ba97SEli Cohen 5118e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5119e126ba97SEli Cohen 5120e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5121e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5122e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5123e126ba97SEli Cohen 5124051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5125051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5126051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5127051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5128051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5129051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5130b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5131b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5132051f2630SLeon Romanovsky 5133e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5134e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5135e126ba97SEli Cohen 5136e126ba97SEli Cohen out: 5137e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5138e126ba97SEli Cohen return err; 5139e126ba97SEli Cohen } 5140e126ba97SEli Cohen 5141e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5142e126ba97SEli Cohen struct ib_ucontext *context, 5143e126ba97SEli Cohen struct ib_udata *udata) 5144e126ba97SEli Cohen { 5145e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5146e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5147e126ba97SEli Cohen int err; 5148e126ba97SEli Cohen 5149938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5150e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5151e126ba97SEli Cohen 5152e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5153e126ba97SEli Cohen if (!xrcd) 5154e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5155e126ba97SEli Cohen 51569603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 5157e126ba97SEli Cohen if (err) { 5158e126ba97SEli Cohen kfree(xrcd); 5159e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5160e126ba97SEli Cohen } 5161e126ba97SEli Cohen 5162e126ba97SEli Cohen return &xrcd->ibxrcd; 5163e126ba97SEli Cohen } 5164e126ba97SEli Cohen 5165e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5166e126ba97SEli Cohen { 5167e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5168e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5169e126ba97SEli Cohen int err; 5170e126ba97SEli Cohen 51719603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 5172b081808aSLeon Romanovsky if (err) 5173e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5174e126ba97SEli Cohen 5175e126ba97SEli Cohen kfree(xrcd); 5176e126ba97SEli Cohen return 0; 5177e126ba97SEli Cohen } 517879b20a6cSYishai Hadas 5179350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5180350d0e4cSYishai Hadas { 5181350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5182350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5183350d0e4cSYishai Hadas struct ib_event event; 5184350d0e4cSYishai Hadas 5185350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5186350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5187350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5188350d0e4cSYishai Hadas switch (type) { 5189350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5190350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5191350d0e4cSYishai Hadas break; 5192350d0e4cSYishai Hadas default: 5193350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5194350d0e4cSYishai Hadas return; 5195350d0e4cSYishai Hadas } 5196350d0e4cSYishai Hadas 5197350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5198350d0e4cSYishai Hadas } 5199350d0e4cSYishai Hadas } 5200350d0e4cSYishai Hadas 520103404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 520203404e8aSMaor Gottlieb { 520303404e8aSMaor Gottlieb int err = 0; 520403404e8aSMaor Gottlieb 520503404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 520603404e8aSMaor Gottlieb if (dev->delay_drop.activate) 520703404e8aSMaor Gottlieb goto out; 520803404e8aSMaor Gottlieb 520903404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 521003404e8aSMaor Gottlieb if (err) 521103404e8aSMaor Gottlieb goto out; 521203404e8aSMaor Gottlieb 521303404e8aSMaor Gottlieb dev->delay_drop.activate = true; 521403404e8aSMaor Gottlieb out: 521503404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5216fe248c3aSMaor Gottlieb 5217fe248c3aSMaor Gottlieb if (!err) 5218fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 521903404e8aSMaor Gottlieb return err; 522003404e8aSMaor Gottlieb } 522103404e8aSMaor Gottlieb 522279b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 522379b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 522479b20a6cSYishai Hadas { 522579b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 52264be6da1eSNoa Osherovich int has_net_offloads; 522779b20a6cSYishai Hadas __be64 *rq_pas0; 522879b20a6cSYishai Hadas void *in; 522979b20a6cSYishai Hadas void *rqc; 523079b20a6cSYishai Hadas void *wq; 523179b20a6cSYishai Hadas int inlen; 523279b20a6cSYishai Hadas int err; 523379b20a6cSYishai Hadas 523479b20a6cSYishai Hadas dev = to_mdev(pd->device); 523579b20a6cSYishai Hadas 523679b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 52371b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 523879b20a6cSYishai Hadas if (!in) 523979b20a6cSYishai Hadas return -ENOMEM; 524079b20a6cSYishai Hadas 524179b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 524279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 524379b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 524479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 524579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 524679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 524779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 524879b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5249ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5250ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5251ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5252b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5253b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5254b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5255b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5256b1383aa6SNoa Osherovich goto out; 5257b1383aa6SNoa Osherovich } else { 525879b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5259b1383aa6SNoa Osherovich } 5260b1383aa6SNoa Osherovich } 526179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5262ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5263ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5264ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5265ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5266ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5267ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5268ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5269ccc87087SNoa Osherovich } 527079b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 527179b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 527279b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 527379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 527479b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 527579b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 52764be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5277b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 52784be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5279b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5280b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5281b1f74a84SNoa Osherovich goto out; 5282b1f74a84SNoa Osherovich } 5283b1f74a84SNoa Osherovich } else { 5284b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5285b1f74a84SNoa Osherovich } 52864be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 52874be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 52884be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 52894be6da1eSNoa Osherovich err = -EOPNOTSUPP; 52904be6da1eSNoa Osherovich goto out; 52914be6da1eSNoa Osherovich } 52924be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 52934be6da1eSNoa Osherovich } 529403404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 529503404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 529603404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 529703404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 529803404e8aSMaor Gottlieb err = -EOPNOTSUPP; 529903404e8aSMaor Gottlieb goto out; 530003404e8aSMaor Gottlieb } 530103404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 530203404e8aSMaor Gottlieb } 530379b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 530479b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5305350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 530603404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 530703404e8aSMaor Gottlieb err = set_delay_drop(dev); 530803404e8aSMaor Gottlieb if (err) { 530903404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 531003404e8aSMaor Gottlieb err); 531103404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 531203404e8aSMaor Gottlieb } else { 531303404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 531403404e8aSMaor Gottlieb } 531503404e8aSMaor Gottlieb } 5316b1f74a84SNoa Osherovich out: 531779b20a6cSYishai Hadas kvfree(in); 531879b20a6cSYishai Hadas return err; 531979b20a6cSYishai Hadas } 532079b20a6cSYishai Hadas 532179b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 532279b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 532379b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 532479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 532579b20a6cSYishai Hadas { 532679b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 532779b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 532879b20a6cSYishai Hadas return -EINVAL; 532979b20a6cSYishai Hadas 533079b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 533179b20a6cSYishai Hadas return -EINVAL; 533279b20a6cSYishai Hadas 533379b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 533479b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 533579b20a6cSYishai Hadas rwq->buf_size = (rwq->wqe_count << rwq->wqe_shift); 533679b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 533779b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 533879b20a6cSYishai Hadas return 0; 533979b20a6cSYishai Hadas } 534079b20a6cSYishai Hadas 534179b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 534279b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 534379b20a6cSYishai Hadas struct ib_udata *udata, 534479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 534579b20a6cSYishai Hadas { 534679b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 534779b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 534879b20a6cSYishai Hadas int err; 534979b20a6cSYishai Hadas size_t required_cmd_sz; 535079b20a6cSYishai Hadas 5351ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5352ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 535379b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 535479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 535579b20a6cSYishai Hadas return -EINVAL; 535679b20a6cSYishai Hadas } 535779b20a6cSYishai Hadas 535879b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 535979b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 536079b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 536179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 536279b20a6cSYishai Hadas return -EOPNOTSUPP; 536379b20a6cSYishai Hadas } 536479b20a6cSYishai Hadas 536579b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 536679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 536779b20a6cSYishai Hadas return -EFAULT; 536879b20a6cSYishai Hadas } 536979b20a6cSYishai Hadas 5370ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 537179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 537279b20a6cSYishai Hadas return -EOPNOTSUPP; 5373ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5374ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5375ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 537679b20a6cSYishai Hadas return -EOPNOTSUPP; 537779b20a6cSYishai Hadas } 5378ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5379ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5380ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5381ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5382ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5383ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5384ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5385ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5386ccc87087SNoa Osherovich return -EINVAL; 5387ccc87087SNoa Osherovich } 5388ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5389ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5390ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5391ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5392ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5393ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5394ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5395ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5396ccc87087SNoa Osherovich return -EINVAL; 5397ccc87087SNoa Osherovich } 5398ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5399ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5400ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5401ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5402ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5403ccc87087SNoa Osherovich } 540479b20a6cSYishai Hadas 540579b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 540679b20a6cSYishai Hadas if (err) { 540779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 540879b20a6cSYishai Hadas return err; 540979b20a6cSYishai Hadas } 541079b20a6cSYishai Hadas 541179b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 541279b20a6cSYishai Hadas if (err) { 541379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 541479b20a6cSYishai Hadas if (err) 541579b20a6cSYishai Hadas return err; 541679b20a6cSYishai Hadas } 541779b20a6cSYishai Hadas 541879b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 541979b20a6cSYishai Hadas return 0; 542079b20a6cSYishai Hadas } 542179b20a6cSYishai Hadas 542279b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 542379b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 542479b20a6cSYishai Hadas struct ib_udata *udata) 542579b20a6cSYishai Hadas { 542679b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 542779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 542879b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 542979b20a6cSYishai Hadas size_t min_resp_len; 543079b20a6cSYishai Hadas int err; 543179b20a6cSYishai Hadas 543279b20a6cSYishai Hadas if (!udata) 543379b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 543479b20a6cSYishai Hadas 543579b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 543679b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 543779b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 543879b20a6cSYishai Hadas 543979b20a6cSYishai Hadas dev = to_mdev(pd->device); 544079b20a6cSYishai Hadas switch (init_attr->wq_type) { 544179b20a6cSYishai Hadas case IB_WQT_RQ: 544279b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 544379b20a6cSYishai Hadas if (!rwq) 544479b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 544579b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 544679b20a6cSYishai Hadas if (err) 544779b20a6cSYishai Hadas goto err; 544879b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 544979b20a6cSYishai Hadas if (err) 545079b20a6cSYishai Hadas goto err_user_rq; 545179b20a6cSYishai Hadas break; 545279b20a6cSYishai Hadas default: 545379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 545479b20a6cSYishai Hadas init_attr->wq_type); 545579b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 545679b20a6cSYishai Hadas } 545779b20a6cSYishai Hadas 5458350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 545979b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 546079b20a6cSYishai Hadas if (udata->outlen) { 546179b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 546279b20a6cSYishai Hadas sizeof(resp.response_length); 546379b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 546479b20a6cSYishai Hadas if (err) 546579b20a6cSYishai Hadas goto err_copy; 546679b20a6cSYishai Hadas } 546779b20a6cSYishai Hadas 5468350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5469350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 547079b20a6cSYishai Hadas return &rwq->ibwq; 547179b20a6cSYishai Hadas 547279b20a6cSYishai Hadas err_copy: 5473350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 547479b20a6cSYishai Hadas err_user_rq: 5475fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 547679b20a6cSYishai Hadas err: 547779b20a6cSYishai Hadas kfree(rwq); 547879b20a6cSYishai Hadas return ERR_PTR(err); 547979b20a6cSYishai Hadas } 548079b20a6cSYishai Hadas 548179b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 548279b20a6cSYishai Hadas { 548379b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 548479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 548579b20a6cSYishai Hadas 5486350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5487fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 548879b20a6cSYishai Hadas kfree(rwq); 548979b20a6cSYishai Hadas 549079b20a6cSYishai Hadas return 0; 549179b20a6cSYishai Hadas } 549279b20a6cSYishai Hadas 5493c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5494c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5495c5f90929SYishai Hadas struct ib_udata *udata) 5496c5f90929SYishai Hadas { 5497c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5498c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5499c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5500c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5501c5f90929SYishai Hadas size_t min_resp_len; 5502c5f90929SYishai Hadas int inlen; 5503c5f90929SYishai Hadas int err; 5504c5f90929SYishai Hadas int i; 5505c5f90929SYishai Hadas u32 *in; 5506c5f90929SYishai Hadas void *rqtc; 5507c5f90929SYishai Hadas 5508c5f90929SYishai Hadas if (udata->inlen > 0 && 5509c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5510c5f90929SYishai Hadas udata->inlen)) 5511c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5512c5f90929SYishai Hadas 5513efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5514efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5515efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5516efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5517efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5518efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5519efd7f400SMaor Gottlieb } 5520efd7f400SMaor Gottlieb 5521c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5522c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5523c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5524c5f90929SYishai Hadas 5525c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5526c5f90929SYishai Hadas if (!rwq_ind_tbl) 5527c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5528c5f90929SYishai Hadas 5529c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 55301b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5531c5f90929SYishai Hadas if (!in) { 5532c5f90929SYishai Hadas err = -ENOMEM; 5533c5f90929SYishai Hadas goto err; 5534c5f90929SYishai Hadas } 5535c5f90929SYishai Hadas 5536c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5537c5f90929SYishai Hadas 5538c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5539c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5540c5f90929SYishai Hadas 5541c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5542c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5543c5f90929SYishai Hadas 5544c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5545c5f90929SYishai Hadas kvfree(in); 5546c5f90929SYishai Hadas 5547c5f90929SYishai Hadas if (err) 5548c5f90929SYishai Hadas goto err; 5549c5f90929SYishai Hadas 5550c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5551c5f90929SYishai Hadas if (udata->outlen) { 5552c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5553c5f90929SYishai Hadas sizeof(resp.response_length); 5554c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5555c5f90929SYishai Hadas if (err) 5556c5f90929SYishai Hadas goto err_copy; 5557c5f90929SYishai Hadas } 5558c5f90929SYishai Hadas 5559c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5560c5f90929SYishai Hadas 5561c5f90929SYishai Hadas err_copy: 5562c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5563c5f90929SYishai Hadas err: 5564c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5565c5f90929SYishai Hadas return ERR_PTR(err); 5566c5f90929SYishai Hadas } 5567c5f90929SYishai Hadas 5568c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5569c5f90929SYishai Hadas { 5570c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5571c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5572c5f90929SYishai Hadas 5573c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5574c5f90929SYishai Hadas 5575c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5576c5f90929SYishai Hadas return 0; 5577c5f90929SYishai Hadas } 5578c5f90929SYishai Hadas 557979b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 558079b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 558179b20a6cSYishai Hadas { 558279b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 558379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 558479b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 558579b20a6cSYishai Hadas size_t required_cmd_sz; 558679b20a6cSYishai Hadas int curr_wq_state; 558779b20a6cSYishai Hadas int wq_state; 558879b20a6cSYishai Hadas int inlen; 558979b20a6cSYishai Hadas int err; 559079b20a6cSYishai Hadas void *rqc; 559179b20a6cSYishai Hadas void *in; 559279b20a6cSYishai Hadas 559379b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 559479b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 559579b20a6cSYishai Hadas return -EINVAL; 559679b20a6cSYishai Hadas 559779b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 559879b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 559979b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 560079b20a6cSYishai Hadas return -EOPNOTSUPP; 560179b20a6cSYishai Hadas 560279b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 560379b20a6cSYishai Hadas return -EFAULT; 560479b20a6cSYishai Hadas 560579b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 560679b20a6cSYishai Hadas return -EOPNOTSUPP; 560779b20a6cSYishai Hadas 560879b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 56091b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 561079b20a6cSYishai Hadas if (!in) 561179b20a6cSYishai Hadas return -ENOMEM; 561279b20a6cSYishai Hadas 561379b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 561479b20a6cSYishai Hadas 561579b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 561679b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 561779b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 561879b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 561979b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 562079b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 562179b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 562279b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 562379b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 562479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 562579b20a6cSYishai Hadas 5626b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5627b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5628b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5629b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5630b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5631b1f74a84SNoa Osherovich "supported\n"); 5632b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5633b1f74a84SNoa Osherovich goto out; 5634b1f74a84SNoa Osherovich } 5635b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5636b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5637b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5638b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5639b1f74a84SNoa Osherovich } 5640b1383aa6SNoa Osherovich 5641b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5642b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5643b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5644b1383aa6SNoa Osherovich goto out; 5645b1383aa6SNoa Osherovich } 5646b1f74a84SNoa Osherovich } 5647b1f74a84SNoa Osherovich 564823a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 564923a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 565023a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 565123a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5652e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5653e1f24a79SParav Pandit dev->port->cnts.set_id); 565423a6964eSMajd Dibbiny } else 565523a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 565623a6964eSMajd Dibbiny dev->ib_dev.name); 565723a6964eSMajd Dibbiny } 565823a6964eSMajd Dibbiny 5659350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 566079b20a6cSYishai Hadas if (!err) 566179b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 566279b20a6cSYishai Hadas 5663b1f74a84SNoa Osherovich out: 5664b1f74a84SNoa Osherovich kvfree(in); 566579b20a6cSYishai Hadas return err; 566679b20a6cSYishai Hadas } 5667