1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 95d5ed8ac3SMark Bloch u16 port; 960680efa2SAlex Vesker }; 970680efa2SAlex Vesker 9889ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9989ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 10089ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10189ea94a7SMaor Gottlieb 102e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 103e126ba97SEli Cohen { 104e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 105e126ba97SEli Cohen } 106e126ba97SEli Cohen 107e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 108e126ba97SEli Cohen { 109e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 110e126ba97SEli Cohen } 111e126ba97SEli Cohen 112c1395a2aSHaggai Eran /** 113fbeb4075SMoni Shoua * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ 114fbeb4075SMoni Shoua * to kernel buffer 115c1395a2aSHaggai Eran * 116fbeb4075SMoni Shoua * @umem: User space memory where the WQ is 117fbeb4075SMoni Shoua * @buffer: buffer to copy to 118fbeb4075SMoni Shoua * @buflen: buffer length 119fbeb4075SMoni Shoua * @wqe_index: index of WQE to copy from 120fbeb4075SMoni Shoua * @wq_offset: offset to start of WQ 121fbeb4075SMoni Shoua * @wq_wqe_cnt: number of WQEs in WQ 122fbeb4075SMoni Shoua * @wq_wqe_shift: log2 of WQE size 123fbeb4075SMoni Shoua * @bcnt: number of bytes to copy 124fbeb4075SMoni Shoua * @bytes_copied: number of bytes to copy (return value) 125c1395a2aSHaggai Eran * 126fbeb4075SMoni Shoua * Copies from start of WQE bcnt or less bytes. 127fbeb4075SMoni Shoua * Does not gurantee to copy the entire WQE. 128c1395a2aSHaggai Eran * 129fbeb4075SMoni Shoua * Return: zero on success, or an error code. 130c1395a2aSHaggai Eran */ 131fbeb4075SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, 132fbeb4075SMoni Shoua void *buffer, 133fbeb4075SMoni Shoua u32 buflen, 134fbeb4075SMoni Shoua int wqe_index, 135fbeb4075SMoni Shoua int wq_offset, 136fbeb4075SMoni Shoua int wq_wqe_cnt, 137fbeb4075SMoni Shoua int wq_wqe_shift, 138fbeb4075SMoni Shoua int bcnt, 139fbeb4075SMoni Shoua size_t *bytes_copied) 140c1395a2aSHaggai Eran { 141fbeb4075SMoni Shoua size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift); 142fbeb4075SMoni Shoua size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift); 143fbeb4075SMoni Shoua size_t copy_length; 144c1395a2aSHaggai Eran int ret; 145c1395a2aSHaggai Eran 146fbeb4075SMoni Shoua /* don't copy more than requested, more than buffer length or 147fbeb4075SMoni Shoua * beyond WQ end 148fbeb4075SMoni Shoua */ 149fbeb4075SMoni Shoua copy_length = min_t(u32, buflen, wq_end - offset); 150fbeb4075SMoni Shoua copy_length = min_t(u32, copy_length, bcnt); 151c1395a2aSHaggai Eran 152fbeb4075SMoni Shoua ret = ib_umem_copy_from(buffer, umem, offset, copy_length); 153c1395a2aSHaggai Eran if (ret) 154c1395a2aSHaggai Eran return ret; 155c1395a2aSHaggai Eran 156fbeb4075SMoni Shoua if (!ret && bytes_copied) 157fbeb4075SMoni Shoua *bytes_copied = copy_length; 158c1395a2aSHaggai Eran 159fbeb4075SMoni Shoua return 0; 160fbeb4075SMoni Shoua } 161fbeb4075SMoni Shoua 162fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, 163fbeb4075SMoni Shoua int wqe_index, 164fbeb4075SMoni Shoua void *buffer, 165fbeb4075SMoni Shoua int buflen, 166fbeb4075SMoni Shoua size_t *bc) 167fbeb4075SMoni Shoua { 168fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 169fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 170fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->sq; 171fbeb4075SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 172fbeb4075SMoni Shoua size_t bytes_copied; 173fbeb4075SMoni Shoua size_t bytes_copied2; 174fbeb4075SMoni Shoua size_t wqe_length; 175fbeb4075SMoni Shoua int ret; 176fbeb4075SMoni Shoua int ds; 177fbeb4075SMoni Shoua 178fbeb4075SMoni Shoua if (buflen < sizeof(*ctrl)) 179fbeb4075SMoni Shoua return -EINVAL; 180fbeb4075SMoni Shoua 181fbeb4075SMoni Shoua /* at first read as much as possible */ 182fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 183fbeb4075SMoni Shoua buffer, 184fbeb4075SMoni Shoua buflen, 185fbeb4075SMoni Shoua wqe_index, 186fbeb4075SMoni Shoua wq->offset, 187fbeb4075SMoni Shoua wq->wqe_cnt, 188fbeb4075SMoni Shoua wq->wqe_shift, 189fbeb4075SMoni Shoua buflen, 190fbeb4075SMoni Shoua &bytes_copied); 191fbeb4075SMoni Shoua if (ret) 192fbeb4075SMoni Shoua return ret; 193fbeb4075SMoni Shoua 194fbeb4075SMoni Shoua /* we need at least control segment size to proceed */ 195fbeb4075SMoni Shoua if (bytes_copied < sizeof(*ctrl)) 196fbeb4075SMoni Shoua return -EINVAL; 197fbeb4075SMoni Shoua 198fbeb4075SMoni Shoua ctrl = buffer; 199fbeb4075SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 200c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 201fbeb4075SMoni Shoua 202fbeb4075SMoni Shoua /* if we copied enough then we are done */ 203fbeb4075SMoni Shoua if (bytes_copied >= wqe_length) { 204fbeb4075SMoni Shoua *bc = bytes_copied; 205fbeb4075SMoni Shoua return 0; 206c1395a2aSHaggai Eran } 207c1395a2aSHaggai Eran 208fbeb4075SMoni Shoua /* otherwise this a wrapped around wqe 209fbeb4075SMoni Shoua * so read the remaining bytes starting 210fbeb4075SMoni Shoua * from wqe_index 0 211fbeb4075SMoni Shoua */ 212fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 213fbeb4075SMoni Shoua buffer + bytes_copied, 214fbeb4075SMoni Shoua buflen - bytes_copied, 215fbeb4075SMoni Shoua 0, 216fbeb4075SMoni Shoua wq->offset, 217fbeb4075SMoni Shoua wq->wqe_cnt, 218fbeb4075SMoni Shoua wq->wqe_shift, 219fbeb4075SMoni Shoua wqe_length - bytes_copied, 220fbeb4075SMoni Shoua &bytes_copied2); 221c1395a2aSHaggai Eran 222c1395a2aSHaggai Eran if (ret) 223c1395a2aSHaggai Eran return ret; 224fbeb4075SMoni Shoua *bc = bytes_copied + bytes_copied2; 225fbeb4075SMoni Shoua return 0; 226fbeb4075SMoni Shoua } 227c1395a2aSHaggai Eran 228fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, 229fbeb4075SMoni Shoua int wqe_index, 230fbeb4075SMoni Shoua void *buffer, 231fbeb4075SMoni Shoua int buflen, 232fbeb4075SMoni Shoua size_t *bc) 233fbeb4075SMoni Shoua { 234fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 235fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 236fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 237fbeb4075SMoni Shoua size_t bytes_copied; 238fbeb4075SMoni Shoua int ret; 239fbeb4075SMoni Shoua 240fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 241fbeb4075SMoni Shoua buffer, 242fbeb4075SMoni Shoua buflen, 243fbeb4075SMoni Shoua wqe_index, 244fbeb4075SMoni Shoua wq->offset, 245fbeb4075SMoni Shoua wq->wqe_cnt, 246fbeb4075SMoni Shoua wq->wqe_shift, 247fbeb4075SMoni Shoua buflen, 248fbeb4075SMoni Shoua &bytes_copied); 249fbeb4075SMoni Shoua 250fbeb4075SMoni Shoua if (ret) 251fbeb4075SMoni Shoua return ret; 252fbeb4075SMoni Shoua *bc = bytes_copied; 253fbeb4075SMoni Shoua return 0; 254fbeb4075SMoni Shoua } 255fbeb4075SMoni Shoua 256fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, 257fbeb4075SMoni Shoua int wqe_index, 258fbeb4075SMoni Shoua void *buffer, 259fbeb4075SMoni Shoua int buflen, 260fbeb4075SMoni Shoua size_t *bc) 261fbeb4075SMoni Shoua { 262fbeb4075SMoni Shoua struct ib_umem *umem = srq->umem; 263fbeb4075SMoni Shoua size_t bytes_copied; 264fbeb4075SMoni Shoua int ret; 265fbeb4075SMoni Shoua 266fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 267fbeb4075SMoni Shoua buffer, 268fbeb4075SMoni Shoua buflen, 269fbeb4075SMoni Shoua wqe_index, 270fbeb4075SMoni Shoua 0, 271fbeb4075SMoni Shoua srq->msrq.max, 272fbeb4075SMoni Shoua srq->msrq.wqe_shift, 273fbeb4075SMoni Shoua buflen, 274fbeb4075SMoni Shoua &bytes_copied); 275fbeb4075SMoni Shoua 276fbeb4075SMoni Shoua if (ret) 277fbeb4075SMoni Shoua return ret; 278fbeb4075SMoni Shoua *bc = bytes_copied; 279fbeb4075SMoni Shoua return 0; 280c1395a2aSHaggai Eran } 281c1395a2aSHaggai Eran 282e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 283e126ba97SEli Cohen { 284e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 285e126ba97SEli Cohen struct ib_event event; 286e126ba97SEli Cohen 28719098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 28819098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 28919098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 29019098df2Smajd@mellanox.com } 291e126ba97SEli Cohen 292e126ba97SEli Cohen if (ibqp->event_handler) { 293e126ba97SEli Cohen event.device = ibqp->device; 294e126ba97SEli Cohen event.element.qp = ibqp; 295e126ba97SEli Cohen switch (type) { 296e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 297e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 298e126ba97SEli Cohen break; 299e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 300e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 301e126ba97SEli Cohen break; 302e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 303e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 304e126ba97SEli Cohen break; 305e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 306e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 307e126ba97SEli Cohen break; 308e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 309e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 312e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 313e126ba97SEli Cohen break; 314e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 315e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 316e126ba97SEli Cohen break; 317e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 318e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 319e126ba97SEli Cohen break; 320e126ba97SEli Cohen default: 321e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 322e126ba97SEli Cohen return; 323e126ba97SEli Cohen } 324e126ba97SEli Cohen 325e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 326e126ba97SEli Cohen } 327e126ba97SEli Cohen } 328e126ba97SEli Cohen 329e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 330e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 331e126ba97SEli Cohen { 332e126ba97SEli Cohen int wqe_size; 333e126ba97SEli Cohen int wq_size; 334e126ba97SEli Cohen 335e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 336938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 337e126ba97SEli Cohen return -EINVAL; 338e126ba97SEli Cohen 339e126ba97SEli Cohen if (!has_rq) { 340e126ba97SEli Cohen qp->rq.max_gs = 0; 341e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 342e126ba97SEli Cohen qp->rq.wqe_shift = 0; 3430540d814SNoa Osherovich cap->max_recv_wr = 0; 3440540d814SNoa Osherovich cap->max_recv_sge = 0; 345e126ba97SEli Cohen } else { 346e126ba97SEli Cohen if (ucmd) { 347e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 348002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 349002bf228SLeon Romanovsky return -EINVAL; 350e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 351002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 352002bf228SLeon Romanovsky return -EINVAL; 353e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 354e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 355e126ba97SEli Cohen } else { 356e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 357e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 358e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 359e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 360e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 361e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 362938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 363e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 364e126ba97SEli Cohen wqe_size, 365938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 366938fe83cSSaeed Mahameed max_wqe_sz_rq)); 367e126ba97SEli Cohen return -EINVAL; 368e126ba97SEli Cohen } 369e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 370e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 371e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 372e126ba97SEli Cohen } 373e126ba97SEli Cohen } 374e126ba97SEli Cohen 375e126ba97SEli Cohen return 0; 376e126ba97SEli Cohen } 377e126ba97SEli Cohen 378f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 379e126ba97SEli Cohen { 380618af384SAndi Shyti int size = 0; 381e126ba97SEli Cohen 382f0313965SErez Shitrit switch (attr->qp_type) { 383e126ba97SEli Cohen case IB_QPT_XRC_INI: 384b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 385e126ba97SEli Cohen /* fall through */ 386e126ba97SEli Cohen case IB_QPT_RC: 387e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 38875c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 38975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 39075c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 391064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 392064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 393064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 394e126ba97SEli Cohen break; 395e126ba97SEli Cohen 396b125a54bSEli Cohen case IB_QPT_XRC_TGT: 397b125a54bSEli Cohen return 0; 398b125a54bSEli Cohen 399e126ba97SEli Cohen case IB_QPT_UC: 400b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 40175c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 4029e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 40375c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 404e126ba97SEli Cohen break; 405e126ba97SEli Cohen 406e126ba97SEli Cohen case IB_QPT_UD: 407f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 408f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 409f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 410f0313965SErez Shitrit /* fall through */ 411e126ba97SEli Cohen case IB_QPT_SMI: 412d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 413b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 414e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 415e126ba97SEli Cohen break; 416e126ba97SEli Cohen 417e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 418b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 419e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 420e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 421e126ba97SEli Cohen break; 422e126ba97SEli Cohen 423e126ba97SEli Cohen default: 424e126ba97SEli Cohen return -EINVAL; 425e126ba97SEli Cohen } 426e126ba97SEli Cohen 427e126ba97SEli Cohen return size; 428e126ba97SEli Cohen } 429e126ba97SEli Cohen 430e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 431e126ba97SEli Cohen { 432e126ba97SEli Cohen int inl_size = 0; 433e126ba97SEli Cohen int size; 434e126ba97SEli Cohen 435f0313965SErez Shitrit size = sq_overhead(attr); 436e126ba97SEli Cohen if (size < 0) 437e126ba97SEli Cohen return size; 438e126ba97SEli Cohen 439e126ba97SEli Cohen if (attr->cap.max_inline_data) { 440e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 441e126ba97SEli Cohen attr->cap.max_inline_data; 442e126ba97SEli Cohen } 443e126ba97SEli Cohen 444e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 445e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 446e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 447e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 448e1e66cc2SSagi Grimberg else 449e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 450e126ba97SEli Cohen } 451e126ba97SEli Cohen 452288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 453288c01b7SEli Cohen { 454288c01b7SEli Cohen int max_sge; 455288c01b7SEli Cohen 456288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 457288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 458288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 459288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 460288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 461288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 462288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 463288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 464288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 465288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 466288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 467288c01b7SEli Cohen else 468288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 469288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 470288c01b7SEli Cohen 471288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 472288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 473288c01b7SEli Cohen } 474288c01b7SEli Cohen 475e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 476e126ba97SEli Cohen struct mlx5_ib_qp *qp) 477e126ba97SEli Cohen { 478e126ba97SEli Cohen int wqe_size; 479e126ba97SEli Cohen int wq_size; 480e126ba97SEli Cohen 481e126ba97SEli Cohen if (!attr->cap.max_send_wr) 482e126ba97SEli Cohen return 0; 483e126ba97SEli Cohen 484e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 485e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 486e126ba97SEli Cohen if (wqe_size < 0) 487e126ba97SEli Cohen return wqe_size; 488e126ba97SEli Cohen 489938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 490b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 491938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 492e126ba97SEli Cohen return -EINVAL; 493e126ba97SEli Cohen } 494e126ba97SEli Cohen 495f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 496e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 497e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 498e126ba97SEli Cohen 499e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 500e1e66cc2SSagi Grimberg qp->signature_en = true; 501e1e66cc2SSagi Grimberg 502e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 503e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 504938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 5051974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 5061974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 507938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 508938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 509b125a54bSEli Cohen return -ENOMEM; 510b125a54bSEli Cohen } 511e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 512288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 513288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 514288c01b7SEli Cohen return -ENOMEM; 515288c01b7SEli Cohen 516288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 517b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 518b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 519e126ba97SEli Cohen 520e126ba97SEli Cohen return wq_size; 521e126ba97SEli Cohen } 522e126ba97SEli Cohen 523e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 524e126ba97SEli Cohen struct mlx5_ib_qp *qp, 52519098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 5260fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 5270fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 528e126ba97SEli Cohen { 529e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 530e126ba97SEli Cohen 531938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 532e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 533938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 534e126ba97SEli Cohen return -EINVAL; 535e126ba97SEli Cohen } 536e126ba97SEli Cohen 537af8b38edSGal Pressman if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) { 538af8b38edSGal Pressman mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n", 539af8b38edSGal Pressman ucmd->sq_wqe_count); 540e126ba97SEli Cohen return -EINVAL; 541e126ba97SEli Cohen } 542e126ba97SEli Cohen 543e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 544e126ba97SEli Cohen 545938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 546e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 547938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 548938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 549e126ba97SEli Cohen return -EINVAL; 550e126ba97SEli Cohen } 551e126ba97SEli Cohen 552c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 553c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 5540fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 5550fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 5560fb2ed66Smajd@mellanox.com } else { 55719098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 558e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 5590fb2ed66Smajd@mellanox.com } 560e126ba97SEli Cohen 561e126ba97SEli Cohen return 0; 562e126ba97SEli Cohen } 563e126ba97SEli Cohen 564e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 565e126ba97SEli Cohen { 566e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 567e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 568e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 569e126ba97SEli Cohen !attr->cap.max_recv_wr) 570e126ba97SEli Cohen return 0; 571e126ba97SEli Cohen 572e126ba97SEli Cohen return 1; 573e126ba97SEli Cohen } 574e126ba97SEli Cohen 5750b80c14fSEli Cohen enum { 5760b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 5770b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 5780b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 5790b80c14fSEli Cohen * "odd/even" order 5800b80c14fSEli Cohen */ 5810b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 5820b80c14fSEli Cohen }; 5830b80c14fSEli Cohen 584b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 585b037c29aSEli Cohen { 58631a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 587b037c29aSEli Cohen } 588b037c29aSEli Cohen 589b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 590b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 591c1be5232SEli Cohen { 592c1be5232SEli Cohen int n; 593c1be5232SEli Cohen 594b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 595b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 596c1be5232SEli Cohen 597c1be5232SEli Cohen return n >= 0 ? n : 0; 598c1be5232SEli Cohen } 599c1be5232SEli Cohen 60018b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 60118b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 60218b0362eSYishai Hadas { 60318b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 60418b0362eSYishai Hadas } 60518b0362eSYishai Hadas 606b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 607b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 608c1be5232SEli Cohen { 609c1be5232SEli Cohen int med; 610c1be5232SEli Cohen 611b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 612b037c29aSEli Cohen return ++med; 613c1be5232SEli Cohen } 614c1be5232SEli Cohen 615b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 616b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 617e126ba97SEli Cohen { 618e126ba97SEli Cohen int i; 619e126ba97SEli Cohen 620b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 621b037c29aSEli Cohen if (!bfregi->count[i]) { 6222f5ff264SEli Cohen bfregi->count[i]++; 623e126ba97SEli Cohen return i; 624e126ba97SEli Cohen } 625e126ba97SEli Cohen } 626e126ba97SEli Cohen 627e126ba97SEli Cohen return -ENOMEM; 628e126ba97SEli Cohen } 629e126ba97SEli Cohen 630b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 631b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 632e126ba97SEli Cohen { 63318b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 634e126ba97SEli Cohen int i; 635e126ba97SEli Cohen 63618b0362eSYishai Hadas if (minidx < 0) 63718b0362eSYishai Hadas return minidx; 63818b0362eSYishai Hadas 63918b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 6402f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 641e126ba97SEli Cohen minidx = i; 6420b80c14fSEli Cohen if (!bfregi->count[minidx]) 6430b80c14fSEli Cohen break; 644e126ba97SEli Cohen } 645e126ba97SEli Cohen 6462f5ff264SEli Cohen bfregi->count[minidx]++; 647e126ba97SEli Cohen return minidx; 648e126ba97SEli Cohen } 649e126ba97SEli Cohen 650b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 651ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 652e126ba97SEli Cohen { 653ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 654e126ba97SEli Cohen 6552f5ff264SEli Cohen mutex_lock(&bfregi->lock); 656ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 657ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 658ffaf58deSLeon Romanovsky if (bfregn < 0) 659ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 660ffaf58deSLeon Romanovsky } 661ffaf58deSLeon Romanovsky 662ffaf58deSLeon Romanovsky if (bfregn < 0) { 6630b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 6642f5ff264SEli Cohen bfregn = 0; 6652f5ff264SEli Cohen bfregi->count[bfregn]++; 666e126ba97SEli Cohen } 6672f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 668e126ba97SEli Cohen 6692f5ff264SEli Cohen return bfregn; 670e126ba97SEli Cohen } 671e126ba97SEli Cohen 6724ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 673e126ba97SEli Cohen { 6742f5ff264SEli Cohen mutex_lock(&bfregi->lock); 675b037c29aSEli Cohen bfregi->count[bfregn]--; 6762f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 677e126ba97SEli Cohen } 678e126ba97SEli Cohen 679e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 680e126ba97SEli Cohen { 681e126ba97SEli Cohen switch (state) { 682e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 683e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 684e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 685e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 686e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 687e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 688e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 689e126ba97SEli Cohen default: return -1; 690e126ba97SEli Cohen } 691e126ba97SEli Cohen } 692e126ba97SEli Cohen 693e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 694e126ba97SEli Cohen { 695e126ba97SEli Cohen switch (type) { 696e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 697e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 698e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 699e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 700e126ba97SEli Cohen case IB_QPT_XRC_INI: 701e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 702e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 703d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 704c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 705e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 706e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 7070fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 708e126ba97SEli Cohen case IB_QPT_MAX: 709e126ba97SEli Cohen default: return -EINVAL; 710e126ba97SEli Cohen } 711e126ba97SEli Cohen } 712e126ba97SEli Cohen 71389ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 71489ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71589ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 71689ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71789ea94a7SMaor Gottlieb 7187c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 71905f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 7201ee47ab3SYishai Hadas bool dyn_bfreg) 721e126ba97SEli Cohen { 72205f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 72305f58cebSLeon Romanovsky u32 index_of_sys_page; 72405f58cebSLeon Romanovsky u32 offset; 725b037c29aSEli Cohen 726b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 727b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 728b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 729b037c29aSEli Cohen 73005f58cebSLeon Romanovsky if (dyn_bfreg) { 73105f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 73205f58cebSLeon Romanovsky 7337c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 7347c043e90SYishai Hadas return -EINVAL; 7357c043e90SYishai Hadas 7361ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 7371ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 7381ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 7391ee47ab3SYishai Hadas return -EINVAL; 7401ee47ab3SYishai Hadas } 7411ee47ab3SYishai Hadas } 742b037c29aSEli Cohen 7431ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 744b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 745e126ba97SEli Cohen } 746e126ba97SEli Cohen 747b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata, 74819098df2Smajd@mellanox.com unsigned long addr, size_t size, 749b0ea0fa5SJason Gunthorpe struct ib_umem **umem, int *npages, int *page_shift, 750b0ea0fa5SJason Gunthorpe int *ncont, u32 *offset) 75119098df2Smajd@mellanox.com { 75219098df2Smajd@mellanox.com int err; 75319098df2Smajd@mellanox.com 754b0ea0fa5SJason Gunthorpe *umem = ib_umem_get(udata, addr, size, 0, 0); 75519098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 75619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 75719098df2Smajd@mellanox.com return PTR_ERR(*umem); 75819098df2Smajd@mellanox.com } 75919098df2Smajd@mellanox.com 760762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 76119098df2Smajd@mellanox.com 76219098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 76319098df2Smajd@mellanox.com if (err) { 76419098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 76519098df2Smajd@mellanox.com goto err_umem; 76619098df2Smajd@mellanox.com } 76719098df2Smajd@mellanox.com 76819098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 76919098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 77019098df2Smajd@mellanox.com 77119098df2Smajd@mellanox.com return 0; 77219098df2Smajd@mellanox.com 77319098df2Smajd@mellanox.com err_umem: 77419098df2Smajd@mellanox.com ib_umem_release(*umem); 77519098df2Smajd@mellanox.com *umem = NULL; 77619098df2Smajd@mellanox.com 77719098df2Smajd@mellanox.com return err; 77819098df2Smajd@mellanox.com } 77919098df2Smajd@mellanox.com 780fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 781bdeacabdSShamir Rabinovitch struct mlx5_ib_rwq *rwq, struct ib_udata *udata) 78279b20a6cSYishai Hadas { 783bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 784bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 785bdeacabdSShamir Rabinovitch udata, 786bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 787bdeacabdSShamir Rabinovitch ibucontext); 78879b20a6cSYishai Hadas 789fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 790fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 791fe248c3aSMaor Gottlieb 79279b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 79379b20a6cSYishai Hadas if (rwq->umem) 79479b20a6cSYishai Hadas ib_umem_release(rwq->umem); 79579b20a6cSYishai Hadas } 79679b20a6cSYishai Hadas 79779b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 798b0ea0fa5SJason Gunthorpe struct ib_udata *udata, struct mlx5_ib_rwq *rwq, 79979b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 80079b20a6cSYishai Hadas { 80189944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 80289944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 80379b20a6cSYishai Hadas int page_shift = 0; 80479b20a6cSYishai Hadas int npages; 80579b20a6cSYishai Hadas u32 offset = 0; 80679b20a6cSYishai Hadas int ncont = 0; 80779b20a6cSYishai Hadas int err; 80879b20a6cSYishai Hadas 80979b20a6cSYishai Hadas if (!ucmd->buf_addr) 81079b20a6cSYishai Hadas return -EINVAL; 81179b20a6cSYishai Hadas 812b0ea0fa5SJason Gunthorpe rwq->umem = ib_umem_get(udata, ucmd->buf_addr, rwq->buf_size, 0, 0); 81379b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 81479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 81579b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 81679b20a6cSYishai Hadas return err; 81779b20a6cSYishai Hadas } 81879b20a6cSYishai Hadas 819762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 82079b20a6cSYishai Hadas &ncont, NULL); 82179b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 82279b20a6cSYishai Hadas &rwq->rq_page_offset); 82379b20a6cSYishai Hadas if (err) { 82479b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 82579b20a6cSYishai Hadas goto err_umem; 82679b20a6cSYishai Hadas } 82779b20a6cSYishai Hadas 82879b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 82979b20a6cSYishai Hadas rwq->page_shift = page_shift; 83079b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 83179b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 83279b20a6cSYishai Hadas 83379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 83479b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 83579b20a6cSYishai Hadas npages, page_shift, ncont, offset); 83679b20a6cSYishai Hadas 83789944450SShamir Rabinovitch err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db); 83879b20a6cSYishai Hadas if (err) { 83979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 84079b20a6cSYishai Hadas goto err_umem; 84179b20a6cSYishai Hadas } 84279b20a6cSYishai Hadas 84379b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 84479b20a6cSYishai Hadas return 0; 84579b20a6cSYishai Hadas 84679b20a6cSYishai Hadas err_umem: 84779b20a6cSYishai Hadas ib_umem_release(rwq->umem); 84879b20a6cSYishai Hadas return err; 84979b20a6cSYishai Hadas } 85079b20a6cSYishai Hadas 851b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 852b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 853b037c29aSEli Cohen { 854b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 855b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 856b037c29aSEli Cohen } 857b037c29aSEli Cohen 858e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 859e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 8600fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 86109a7d9ecSSaeed Mahameed u32 **in, 86219098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 86319098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 864e126ba97SEli Cohen { 865e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 866e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 86719098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 8689e9c47d0SEli Cohen int page_shift = 0; 8691ee47ab3SYishai Hadas int uar_index = 0; 870e126ba97SEli Cohen int npages; 8719e9c47d0SEli Cohen u32 offset = 0; 8722f5ff264SEli Cohen int bfregn; 8739e9c47d0SEli Cohen int ncont = 0; 87409a7d9ecSSaeed Mahameed __be64 *pas; 87509a7d9ecSSaeed Mahameed void *qpc; 876e126ba97SEli Cohen int err; 8775aa3771dSYishai Hadas u16 uid; 878e126ba97SEli Cohen 879e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 880e126ba97SEli Cohen if (err) { 881e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 882e126ba97SEli Cohen return err; 883e126ba97SEli Cohen } 884e126ba97SEli Cohen 88589944450SShamir Rabinovitch context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext, 88689944450SShamir Rabinovitch ibucontext); 8871ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8881ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8891ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8901ee47ab3SYishai Hadas if (uar_index < 0) 8911ee47ab3SYishai Hadas return uar_index; 8921ee47ab3SYishai Hadas 8931ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8941ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 895e126ba97SEli Cohen /* 896e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 897e126ba97SEli Cohen */ 898051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8992f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 9001ee47ab3SYishai Hadas } 901051f2630SLeon Romanovsky else { 902ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 903ffaf58deSLeon Romanovsky if (bfregn < 0) 9042f5ff264SEli Cohen return bfregn; 905e126ba97SEli Cohen } 906e126ba97SEli Cohen 9072f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 9081ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9091ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 9101ee47ab3SYishai Hadas false); 911e126ba97SEli Cohen 91248fea837SHaggai Eran qp->rq.offset = 0; 91348fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 91448fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 91548fea837SHaggai Eran 9160fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 917e126ba97SEli Cohen if (err) 9182f5ff264SEli Cohen goto err_bfreg; 919e126ba97SEli Cohen 92019098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 92119098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 922b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, 923b0ea0fa5SJason Gunthorpe ubuffer->buf_size, &ubuffer->umem, 924b0ea0fa5SJason Gunthorpe &npages, &page_shift, &ncont, &offset); 92519098df2Smajd@mellanox.com if (err) 9262f5ff264SEli Cohen goto err_bfreg; 9279e9c47d0SEli Cohen } else { 92819098df2Smajd@mellanox.com ubuffer->umem = NULL; 9299e9c47d0SEli Cohen } 930e126ba97SEli Cohen 93109a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 93209a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 9331b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 934e126ba97SEli Cohen if (!*in) { 935e126ba97SEli Cohen err = -ENOMEM; 936e126ba97SEli Cohen goto err_umem; 937e126ba97SEli Cohen } 938e126ba97SEli Cohen 9397422edceSYishai Hadas uid = (attr->qp_type != IB_QPT_XRC_TGT && 9407422edceSYishai Hadas attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 9415aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 94209a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 94309a7d9ecSSaeed Mahameed if (ubuffer->umem) 94409a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 94509a7d9ecSSaeed Mahameed 94609a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 94709a7d9ecSSaeed Mahameed 94809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 94909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 95009a7d9ecSSaeed Mahameed 95109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 9521ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 953b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 9541ee47ab3SYishai Hadas else 9551ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 9562f5ff264SEli Cohen qp->bfregn = bfregn; 957e126ba97SEli Cohen 958b0ea0fa5SJason Gunthorpe err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db); 959e126ba97SEli Cohen if (err) { 960e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 961e126ba97SEli Cohen goto err_free; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 96441d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 965e126ba97SEli Cohen if (err) { 966e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 967e126ba97SEli Cohen goto err_unmap; 968e126ba97SEli Cohen } 969e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 970e126ba97SEli Cohen 971e126ba97SEli Cohen return 0; 972e126ba97SEli Cohen 973e126ba97SEli Cohen err_unmap: 974e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 975e126ba97SEli Cohen 976e126ba97SEli Cohen err_free: 977479163f4SAl Viro kvfree(*in); 978e126ba97SEli Cohen 979e126ba97SEli Cohen err_umem: 98019098df2Smajd@mellanox.com if (ubuffer->umem) 98119098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 982e126ba97SEli Cohen 9832f5ff264SEli Cohen err_bfreg: 9841ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9854ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 986e126ba97SEli Cohen return err; 987e126ba97SEli Cohen } 988e126ba97SEli Cohen 989b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 990bdeacabdSShamir Rabinovitch struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base, 991bdeacabdSShamir Rabinovitch struct ib_udata *udata) 992e126ba97SEli Cohen { 993bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 994bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 995bdeacabdSShamir Rabinovitch udata, 996bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 997bdeacabdSShamir Rabinovitch ibucontext); 998e126ba97SEli Cohen 999e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 100019098df2Smajd@mellanox.com if (base->ubuffer.umem) 100119098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 10021ee47ab3SYishai Hadas 10031ee47ab3SYishai Hadas /* 10041ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 10051ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 10061ee47ab3SYishai Hadas */ 10071ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 10084ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 1009e126ba97SEli Cohen } 1010e126ba97SEli Cohen 101134f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 101234f4c955SGuy Levi * 101334f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 101434f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 101534f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 101634f4c955SGuy Levi * simply should check if it gets to an edge. 101734f4c955SGuy Levi * 101834f4c955SGuy Levi * @sq - SQ buffer. 101934f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 102034f4c955SGuy Levi * 102134f4c955SGuy Levi * Return: 102234f4c955SGuy Levi * The new edge. 102334f4c955SGuy Levi */ 102434f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 102534f4c955SGuy Levi { 102634f4c955SGuy Levi void *fragment_end; 102734f4c955SGuy Levi 102834f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 102934f4c955SGuy Levi (&sq->fbc, 103034f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 103134f4c955SGuy Levi 103234f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 103334f4c955SGuy Levi } 103434f4c955SGuy Levi 1035e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 1036e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1037e126ba97SEli Cohen struct mlx5_ib_qp *qp, 103809a7d9ecSSaeed Mahameed u32 **in, int *inlen, 103919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 1040e126ba97SEli Cohen { 1041e126ba97SEli Cohen int uar_index; 104209a7d9ecSSaeed Mahameed void *qpc; 1043e126ba97SEli Cohen int err; 1044e126ba97SEli Cohen 1045f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 1046f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 1047b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 104893d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 1049b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 10501a4c3a3dSEli Cohen return -EINVAL; 1051e126ba97SEli Cohen 1052e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 10535fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 10545fe9dec0SEli Cohen else 10555fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 1056e126ba97SEli Cohen 1057d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 1058d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 1059d8030b0dSEli Cohen */ 1060d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 10615fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 1062e126ba97SEli Cohen 1063e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 1064e126ba97SEli Cohen if (err < 0) { 1065e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10665fe9dec0SEli Cohen return err; 1067e126ba97SEli Cohen } 1068e126ba97SEli Cohen 1069e126ba97SEli Cohen qp->rq.offset = 0; 1070e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 107119098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 1072e126ba97SEli Cohen 107334f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 107434f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 1075e126ba97SEli Cohen if (err) { 1076e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10775fe9dec0SEli Cohen return err; 1078e126ba97SEli Cohen } 1079e126ba97SEli Cohen 108034f4c955SGuy Levi if (qp->rq.wqe_cnt) 108134f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 108234f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 108334f4c955SGuy Levi 108434f4c955SGuy Levi if (qp->sq.wqe_cnt) { 108534f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 108634f4c955SGuy Levi MLX5_SEND_WQE_BB; 108734f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 108834f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 108934f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 109034f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 109134f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 109234f4c955SGuy Levi 109334f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 109434f4c955SGuy Levi } 109534f4c955SGuy Levi 109609a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 109709a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 10981b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 1099e126ba97SEli Cohen if (!*in) { 1100e126ba97SEli Cohen err = -ENOMEM; 1101e126ba97SEli Cohen goto err_buf; 1102e126ba97SEli Cohen } 110309a7d9ecSSaeed Mahameed 110409a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 110509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 110609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 110709a7d9ecSSaeed Mahameed 1108e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 110909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 111009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1111e126ba97SEli Cohen 1112b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 111309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1114b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1115b11a4f9cSHaggai Eran } 1116b11a4f9cSHaggai Eran 111734f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 111834f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 111934f4c955SGuy Levi *in, pas)); 1120e126ba97SEli Cohen 11219603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1122e126ba97SEli Cohen if (err) { 1123e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1124e126ba97SEli Cohen goto err_free; 1125e126ba97SEli Cohen } 1126e126ba97SEli Cohen 1127b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1128b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1129b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1130b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1131b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1132b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1133b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1134b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1135b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1136b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1137e126ba97SEli Cohen 1138e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1139e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1140e126ba97SEli Cohen err = -ENOMEM; 1141e126ba97SEli Cohen goto err_wrid; 1142e126ba97SEli Cohen } 1143e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1144e126ba97SEli Cohen 1145e126ba97SEli Cohen return 0; 1146e126ba97SEli Cohen 1147e126ba97SEli Cohen err_wrid: 1148b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1149b5883008SLi Dongyang kvfree(qp->sq.w_list); 1150b5883008SLi Dongyang kvfree(qp->sq.wrid); 1151b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1152b5883008SLi Dongyang kvfree(qp->rq.wrid); 1153f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1154e126ba97SEli Cohen 1155e126ba97SEli Cohen err_free: 1156479163f4SAl Viro kvfree(*in); 1157e126ba97SEli Cohen 1158e126ba97SEli Cohen err_buf: 115934f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1160e126ba97SEli Cohen return err; 1161e126ba97SEli Cohen } 1162e126ba97SEli Cohen 1163e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1164e126ba97SEli Cohen { 1165b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1166b5883008SLi Dongyang kvfree(qp->sq.w_list); 1167b5883008SLi Dongyang kvfree(qp->sq.wrid); 1168b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1169b5883008SLi Dongyang kvfree(qp->rq.wrid); 1170f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 117134f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1172e126ba97SEli Cohen } 1173e126ba97SEli Cohen 117409a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1175e126ba97SEli Cohen { 1176e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1177c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1178e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 117909a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1180e126ba97SEli Cohen else if (!qp->has_rq) 118109a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1182e126ba97SEli Cohen else 118309a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1184e126ba97SEli Cohen } 1185e126ba97SEli Cohen 1186e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1187e126ba97SEli Cohen { 11885d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 11895d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1190e126ba97SEli Cohen return 1; 1191e126ba97SEli Cohen 1192e126ba97SEli Cohen return 0; 1193e126ba97SEli Cohen } 1194e126ba97SEli Cohen 11950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1196c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 11971cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 11981cd6dbd3SYishai Hadas struct ib_pd *pd) 11990fb2ed66Smajd@mellanox.com { 1200c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 12010fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 12020fb2ed66Smajd@mellanox.com 12031cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 12040fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1205c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1206c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1207c2e53b2cSYishai Hadas 12080fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 12090fb2ed66Smajd@mellanox.com } 12100fb2ed66Smajd@mellanox.com 12110fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 12121cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 12130fb2ed66Smajd@mellanox.com { 12141cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 12150fb2ed66Smajd@mellanox.com } 12160fb2ed66Smajd@mellanox.com 1217d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq) 1218b96c9ddeSMark Bloch { 1219b96c9ddeSMark Bloch if (sq->flow_rule) 1220b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1221d5ed8ac3SMark Bloch sq->flow_rule = NULL; 1222b96c9ddeSMark Bloch } 1223b96c9ddeSMark Bloch 12240fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 1225b0ea0fa5SJason Gunthorpe struct ib_udata *udata, 12260fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 12270fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12280fb2ed66Smajd@mellanox.com { 12290fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 12300fb2ed66Smajd@mellanox.com __be64 *pas; 12310fb2ed66Smajd@mellanox.com void *in; 12320fb2ed66Smajd@mellanox.com void *sqc; 12330fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12340fb2ed66Smajd@mellanox.com void *wq; 12350fb2ed66Smajd@mellanox.com int inlen; 12360fb2ed66Smajd@mellanox.com int err; 12370fb2ed66Smajd@mellanox.com int page_shift = 0; 12380fb2ed66Smajd@mellanox.com int npages; 12390fb2ed66Smajd@mellanox.com int ncont = 0; 12400fb2ed66Smajd@mellanox.com u32 offset = 0; 12410fb2ed66Smajd@mellanox.com 1242b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size, 1243b0ea0fa5SJason Gunthorpe &sq->ubuffer.umem, &npages, &page_shift, &ncont, 1244b0ea0fa5SJason Gunthorpe &offset); 12450fb2ed66Smajd@mellanox.com if (err) 12460fb2ed66Smajd@mellanox.com return err; 12470fb2ed66Smajd@mellanox.com 12480fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 12491b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12500fb2ed66Smajd@mellanox.com if (!in) { 12510fb2ed66Smajd@mellanox.com err = -ENOMEM; 12520fb2ed66Smajd@mellanox.com goto err_umem; 12530fb2ed66Smajd@mellanox.com } 12540fb2ed66Smajd@mellanox.com 1255c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 12560fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 12570fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1258795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1259795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 12600fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 12610fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12620fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 12630fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 12640fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 126596dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 126696dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 126796dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 12680fb2ed66Smajd@mellanox.com 12690fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 12700fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 12710fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12720fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 12730fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12740fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 12750fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 12760fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 12770fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 12780fb2ed66Smajd@mellanox.com 12790fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12800fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 12810fb2ed66Smajd@mellanox.com 12820fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 12830fb2ed66Smajd@mellanox.com 12840fb2ed66Smajd@mellanox.com kvfree(in); 12850fb2ed66Smajd@mellanox.com 12860fb2ed66Smajd@mellanox.com if (err) 12870fb2ed66Smajd@mellanox.com goto err_umem; 12880fb2ed66Smajd@mellanox.com 12890fb2ed66Smajd@mellanox.com return 0; 12900fb2ed66Smajd@mellanox.com 12910fb2ed66Smajd@mellanox.com err_umem: 12920fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 12930fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 12940fb2ed66Smajd@mellanox.com 12950fb2ed66Smajd@mellanox.com return err; 12960fb2ed66Smajd@mellanox.com } 12970fb2ed66Smajd@mellanox.com 12980fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 12990fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 13000fb2ed66Smajd@mellanox.com { 1301d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 13020fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 13030fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13040fb2ed66Smajd@mellanox.com } 13050fb2ed66Smajd@mellanox.com 13062c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 13070fb2ed66Smajd@mellanox.com { 13080fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 13090fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 13100fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 13110fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 13120fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 13130fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 13140fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 13150fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 13160fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 13170fb2ed66Smajd@mellanox.com 13180fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 13190fb2ed66Smajd@mellanox.com } 13200fb2ed66Smajd@mellanox.com 13210fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13222c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 132334d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 13240fb2ed66Smajd@mellanox.com { 1325358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 13260fb2ed66Smajd@mellanox.com __be64 *pas; 13270fb2ed66Smajd@mellanox.com __be64 *qp_pas; 13280fb2ed66Smajd@mellanox.com void *in; 13290fb2ed66Smajd@mellanox.com void *rqc; 13300fb2ed66Smajd@mellanox.com void *wq; 13310fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 13322c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 13332c292dbbSBoris Pismenny size_t inlen; 13340fb2ed66Smajd@mellanox.com int err; 13352c292dbbSBoris Pismenny 13362c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 13372c292dbbSBoris Pismenny return -EINVAL; 13380fb2ed66Smajd@mellanox.com 13390fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 13401b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13410fb2ed66Smajd@mellanox.com if (!in) 13420fb2ed66Smajd@mellanox.com return -ENOMEM; 13430fb2ed66Smajd@mellanox.com 134434d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 13450fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1346e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 13470fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 13480fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 13490fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 13500fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 13510fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 13520fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 13530fb2ed66Smajd@mellanox.com 1354358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1355358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1356358e42eaSMajd Dibbiny 13570fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 13580fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1359b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1360b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 13610fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 13620fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13630fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 13650fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 13660fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 13670fb2ed66Smajd@mellanox.com 13680fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 13690fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 13700fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 13710fb2ed66Smajd@mellanox.com 13720fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 13730fb2ed66Smajd@mellanox.com 13740fb2ed66Smajd@mellanox.com kvfree(in); 13750fb2ed66Smajd@mellanox.com 13760fb2ed66Smajd@mellanox.com return err; 13770fb2ed66Smajd@mellanox.com } 13780fb2ed66Smajd@mellanox.com 13790fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13800fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13810fb2ed66Smajd@mellanox.com { 13820fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 13830fb2ed66Smajd@mellanox.com } 13840fb2ed66Smajd@mellanox.com 1385f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1386f95ef6cbSMaor Gottlieb { 1387f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1388f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1389f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1390f95ef6cbSMaor Gottlieb } 1391f95ef6cbSMaor Gottlieb 13920042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13930042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1394443c1cf9SYishai Hadas u32 qp_flags_en, 1395443c1cf9SYishai Hadas struct ib_pd *pd) 13960042f9e4SMark Bloch { 13970042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 13980042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 13990042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1400443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 14010042f9e4SMark Bloch } 14020042f9e4SMark Bloch 14030fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1404f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1405443c1cf9SYishai Hadas u32 *qp_flags_en, 14061f1d6abbSAriel Levkovich struct ib_pd *pd, 14071f1d6abbSAriel Levkovich u32 *out, int outlen) 14080fb2ed66Smajd@mellanox.com { 1409175edba8SMark Bloch u8 lb_flag = 0; 14100fb2ed66Smajd@mellanox.com u32 *in; 14110fb2ed66Smajd@mellanox.com void *tirc; 14120fb2ed66Smajd@mellanox.com int inlen; 14130fb2ed66Smajd@mellanox.com int err; 14140fb2ed66Smajd@mellanox.com 14150fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 14170fb2ed66Smajd@mellanox.com if (!in) 14180fb2ed66Smajd@mellanox.com return -ENOMEM; 14190fb2ed66Smajd@mellanox.com 1420443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 14210fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 14220fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 14230fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 14240fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1425175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1426f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 14270fb2ed66Smajd@mellanox.com 1428175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1429175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1430175edba8SMark Bloch 1431175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1432175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1433175edba8SMark Bloch 14346a4d00beSMark Bloch if (dev->is_rep) { 1435175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1436175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1437175edba8SMark Bloch } 1438175edba8SMark Bloch 1439175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1440ec9c2fb8SMark Bloch 14411f1d6abbSAriel Levkovich err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen); 14420fb2ed66Smajd@mellanox.com 14431f1d6abbSAriel Levkovich rq->tirn = MLX5_GET(create_tir_out, out, tirn); 14440042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 14450042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 14460042f9e4SMark Bloch 14470042f9e4SMark Bloch if (err) 1448443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 14490042f9e4SMark Bloch } 14500fb2ed66Smajd@mellanox.com kvfree(in); 14510fb2ed66Smajd@mellanox.com 14520fb2ed66Smajd@mellanox.com return err; 14530fb2ed66Smajd@mellanox.com } 14540fb2ed66Smajd@mellanox.com 14550fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 14562c292dbbSBoris Pismenny u32 *in, size_t inlen, 14577f72052cSYishai Hadas struct ib_pd *pd, 14587f72052cSYishai Hadas struct ib_udata *udata, 14597f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 14600fb2ed66Smajd@mellanox.com { 14610fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14620fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14630fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 146489944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 146589944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 14660fb2ed66Smajd@mellanox.com int err; 14670fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 14687f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 14691f1d6abbSAriel Levkovich u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {}; 14700fb2ed66Smajd@mellanox.com 14710fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14721cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 14730fb2ed66Smajd@mellanox.com if (err) 14740fb2ed66Smajd@mellanox.com return err; 14750fb2ed66Smajd@mellanox.com 1476b0ea0fa5SJason Gunthorpe err = create_raw_packet_qp_sq(dev, udata, sq, in, pd); 14770fb2ed66Smajd@mellanox.com if (err) 14780fb2ed66Smajd@mellanox.com goto err_destroy_tis; 14790fb2ed66Smajd@mellanox.com 14807f72052cSYishai Hadas if (uid) { 14817f72052cSYishai Hadas resp->tisn = sq->tisn; 14827f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 14837f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 14847f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 14857f72052cSYishai Hadas } 14867f72052cSYishai Hadas 14870fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 14881d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 14890fb2ed66Smajd@mellanox.com } 14900fb2ed66Smajd@mellanox.com 14910fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1492358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1493358e42eaSMajd Dibbiny 1494e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1495e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1496b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1497b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 149834d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 14990fb2ed66Smajd@mellanox.com if (err) 15000fb2ed66Smajd@mellanox.com goto err_destroy_sq; 15010fb2ed66Smajd@mellanox.com 15021f1d6abbSAriel Levkovich err = create_raw_packet_qp_tir( 15031f1d6abbSAriel Levkovich dev, rq, tdn, &qp->flags_en, pd, out, 15041f1d6abbSAriel Levkovich MLX5_ST_SZ_BYTES(create_tir_out)); 15050fb2ed66Smajd@mellanox.com if (err) 15060fb2ed66Smajd@mellanox.com goto err_destroy_rq; 15077f72052cSYishai Hadas 15087f72052cSYishai Hadas if (uid) { 15097f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 15107f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 15117f72052cSYishai Hadas resp->tirn = rq->tirn; 15127f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 15131f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 15141f1d6abbSAriel Levkovich resp->tir_icm_addr = MLX5_GET( 15151f1d6abbSAriel Levkovich create_tir_out, out, icm_address_31_0); 15161f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15171f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15181f1d6abbSAriel Levkovich icm_address_39_32) 15191f1d6abbSAriel Levkovich << 32; 15201f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15211f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15221f1d6abbSAriel Levkovich icm_address_63_40) 15231f1d6abbSAriel Levkovich << 40; 15241f1d6abbSAriel Levkovich resp->comp_mask |= 15251f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 15261f1d6abbSAriel Levkovich } 15277f72052cSYishai Hadas } 15280fb2ed66Smajd@mellanox.com } 15290fb2ed66Smajd@mellanox.com 15300fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 15310fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 15327f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 15337f72052cSYishai Hadas if (err) 15347f72052cSYishai Hadas goto err_destroy_tir; 15350fb2ed66Smajd@mellanox.com 15360fb2ed66Smajd@mellanox.com return 0; 15370fb2ed66Smajd@mellanox.com 15387f72052cSYishai Hadas err_destroy_tir: 15397f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 15400fb2ed66Smajd@mellanox.com err_destroy_rq: 15410fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15420fb2ed66Smajd@mellanox.com err_destroy_sq: 15430fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 15440fb2ed66Smajd@mellanox.com return err; 15450fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15460fb2ed66Smajd@mellanox.com err_destroy_tis: 15471cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 15480fb2ed66Smajd@mellanox.com 15490fb2ed66Smajd@mellanox.com return err; 15500fb2ed66Smajd@mellanox.com } 15510fb2ed66Smajd@mellanox.com 15520fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 15530fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 15540fb2ed66Smajd@mellanox.com { 15550fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 15560fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15570fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15580fb2ed66Smajd@mellanox.com 15590fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1560443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 15610fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15620fb2ed66Smajd@mellanox.com } 15630fb2ed66Smajd@mellanox.com 15640fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 15650fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15661cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 15670fb2ed66Smajd@mellanox.com } 15680fb2ed66Smajd@mellanox.com } 15690fb2ed66Smajd@mellanox.com 15700fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 15710fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 15720fb2ed66Smajd@mellanox.com { 15730fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15740fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15750fb2ed66Smajd@mellanox.com 15760fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 15770fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 15780fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 15790fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 15800fb2ed66Smajd@mellanox.com } 15810fb2ed66Smajd@mellanox.com 158228d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 158328d61370SYishai Hadas { 15840042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 15850042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 15860042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1587443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1588443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 158928d61370SYishai Hadas } 159028d61370SYishai Hadas 159128d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 159228d61370SYishai Hadas struct ib_pd *pd, 159328d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 159428d61370SYishai Hadas struct ib_udata *udata) 159528d61370SYishai Hadas { 159689944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 159789944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 159828d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 159928d61370SYishai Hadas int inlen; 16001f1d6abbSAriel Levkovich int outlen; 160128d61370SYishai Hadas int err; 160228d61370SYishai Hadas u32 *in; 16031f1d6abbSAriel Levkovich u32 *out; 160428d61370SYishai Hadas void *tirc; 160528d61370SYishai Hadas void *hfso; 160628d61370SYishai Hadas u32 selected_fields = 0; 16072d93fc85SMatan Barak u32 outer_l4; 160828d61370SYishai Hadas size_t min_resp_len; 160928d61370SYishai Hadas u32 tdn = mucontext->tdn; 161028d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 161128d61370SYishai Hadas size_t required_cmd_sz; 1612175edba8SMark Bloch u8 lb_flag = 0; 161328d61370SYishai Hadas 161428d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 161528d61370SYishai Hadas return -EOPNOTSUPP; 161628d61370SYishai Hadas 161728d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 161828d61370SYishai Hadas return -EINVAL; 161928d61370SYishai Hadas 16202f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 162128d61370SYishai Hadas if (udata->outlen < min_resp_len) 162228d61370SYishai Hadas return -EINVAL; 162328d61370SYishai Hadas 1624f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 162528d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 162628d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 162728d61370SYishai Hadas return -EINVAL; 162828d61370SYishai Hadas } 162928d61370SYishai Hadas 163028d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 163128d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 163228d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 163328d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 163428d61370SYishai Hadas return -EOPNOTSUPP; 163528d61370SYishai Hadas } 163628d61370SYishai Hadas 163728d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 163828d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 163928d61370SYishai Hadas return -EFAULT; 164028d61370SYishai Hadas } 164128d61370SYishai Hadas 164228d61370SYishai Hadas if (ucmd.comp_mask) { 164328d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 164428d61370SYishai Hadas return -EOPNOTSUPP; 164528d61370SYishai Hadas } 164628d61370SYishai Hadas 1647175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1648175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1649175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1650f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1651f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1652f95ef6cbSMaor Gottlieb } 1653f95ef6cbSMaor Gottlieb 1654f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1655f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1656f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 165728d61370SYishai Hadas return -EOPNOTSUPP; 165828d61370SYishai Hadas } 165928d61370SYishai Hadas 1660309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1661309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1662309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1663309fa347SMaor Gottlieb return -EOPNOTSUPP; 1664309fa347SMaor Gottlieb } 1665309fa347SMaor Gottlieb 16666a4d00beSMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->is_rep) { 1667175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1668175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1669175edba8SMark Bloch } 1670175edba8SMark Bloch 1671175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1672175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1673175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1674175edba8SMark Bloch } 1675175edba8SMark Bloch 167641d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 167728d61370SYishai Hadas if (err) { 167828d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 167928d61370SYishai Hadas return -EINVAL; 168028d61370SYishai Hadas } 168128d61370SYishai Hadas 168228d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 16831f1d6abbSAriel Levkovich outlen = MLX5_ST_SZ_BYTES(create_tir_out); 16841f1d6abbSAriel Levkovich in = kvzalloc(inlen + outlen, GFP_KERNEL); 168528d61370SYishai Hadas if (!in) 168628d61370SYishai Hadas return -ENOMEM; 168728d61370SYishai Hadas 16881f1d6abbSAriel Levkovich out = in + MLX5_ST_SZ_DW(create_tir_in); 1689443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 169028d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 169128d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 169228d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 169328d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 169428d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 169528d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 169628d61370SYishai Hadas 169728d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1698f95ef6cbSMaor Gottlieb 1699f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1700f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1701f95ef6cbSMaor Gottlieb 1702175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1703175edba8SMark Bloch 1704309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1705309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1706309fa347SMaor Gottlieb else 1707309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1708309fa347SMaor Gottlieb 170928d61370SYishai Hadas switch (ucmd.rx_hash_function) { 171028d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 171128d61370SYishai Hadas { 171228d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 171328d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 171428d61370SYishai Hadas 171528d61370SYishai Hadas if (len != ucmd.rx_key_len) { 171628d61370SYishai Hadas err = -EINVAL; 171728d61370SYishai Hadas goto err; 171828d61370SYishai Hadas } 171928d61370SYishai Hadas 172028d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 172128d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 172228d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 172328d61370SYishai Hadas break; 172428d61370SYishai Hadas } 172528d61370SYishai Hadas default: 172628d61370SYishai Hadas err = -EOPNOTSUPP; 172728d61370SYishai Hadas goto err; 172828d61370SYishai Hadas } 172928d61370SYishai Hadas 173028d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 173128d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 173228d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 173328d61370SYishai Hadas goto create_tir; 173428d61370SYishai Hadas err = -EINVAL; 173528d61370SYishai Hadas goto err; 173628d61370SYishai Hadas } 173728d61370SYishai Hadas 173828d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 173928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 174028d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 174128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 174228d61370SYishai Hadas err = -EINVAL; 174328d61370SYishai Hadas goto err; 174428d61370SYishai Hadas } 174528d61370SYishai Hadas 174628d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 174728d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 174828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 174928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 175028d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 175128d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 175228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 175328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 175428d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 175528d61370SYishai Hadas 17562d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17572d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 175828d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 17592d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 17602d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 17612d93fc85SMatan Barak 17622d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 17632d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 176428d61370SYishai Hadas err = -EINVAL; 176528d61370SYishai Hadas goto err; 176628d61370SYishai Hadas } 176728d61370SYishai Hadas 176828d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 176928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 177028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 177128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 177228d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 177328d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 177428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 177528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 177628d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 177728d61370SYishai Hadas 177828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 177928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 178028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 178128d61370SYishai Hadas 178228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 178328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 178428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 178528d61370SYishai Hadas 178628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 178728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 178828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 178928d61370SYishai Hadas 179028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 179128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 179228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 179328d61370SYishai Hadas 17942d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 17952d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 17962d93fc85SMatan Barak 179728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 179828d61370SYishai Hadas 179928d61370SYishai Hadas create_tir: 18001f1d6abbSAriel Levkovich err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen); 180128d61370SYishai Hadas 18021f1d6abbSAriel Levkovich qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn); 18030042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 18040042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 18050042f9e4SMark Bloch 18060042f9e4SMark Bloch if (err) 1807443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1808443c1cf9SYishai Hadas to_mpd(pd)->uid); 18090042f9e4SMark Bloch } 18100042f9e4SMark Bloch 181128d61370SYishai Hadas if (err) 181228d61370SYishai Hadas goto err; 181328d61370SYishai Hadas 18147f72052cSYishai Hadas if (mucontext->devx_uid) { 18157f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 18167f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 18171f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 18181f1d6abbSAriel Levkovich resp.tir_icm_addr = 18191f1d6abbSAriel Levkovich MLX5_GET(create_tir_out, out, icm_address_31_0); 18201f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18211f1d6abbSAriel Levkovich icm_address_39_32) 18221f1d6abbSAriel Levkovich << 32; 18231f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18241f1d6abbSAriel Levkovich icm_address_63_40) 18251f1d6abbSAriel Levkovich << 40; 18261f1d6abbSAriel Levkovich resp.comp_mask |= 18271f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 18281f1d6abbSAriel Levkovich } 18297f72052cSYishai Hadas } 18307f72052cSYishai Hadas 18317f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 18327f72052cSYishai Hadas if (err) 18337f72052cSYishai Hadas goto err_copy; 18347f72052cSYishai Hadas 183528d61370SYishai Hadas kvfree(in); 183628d61370SYishai Hadas /* qpn is reserved for that QP */ 183728d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1838d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 183928d61370SYishai Hadas return 0; 184028d61370SYishai Hadas 18417f72052cSYishai Hadas err_copy: 18427f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 184328d61370SYishai Hadas err: 184428d61370SYishai Hadas kvfree(in); 184528d61370SYishai Hadas return err; 184628d61370SYishai Hadas } 184728d61370SYishai Hadas 18485d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 18495d6ff1baSYonatan Cohen void *qpc) 18505d6ff1baSYonatan Cohen { 18515d6ff1baSYonatan Cohen int rcqe_sz; 18525d6ff1baSYonatan Cohen 18535d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 18545d6ff1baSYonatan Cohen return; 18555d6ff1baSYonatan Cohen 18565d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 18575d6ff1baSYonatan Cohen 18587249c8eaSGuy Levi if (init_attr->qp_type == MLX5_IB_QPT_DCT) { 18597249c8eaSGuy Levi if (rcqe_sz == 128) 18607249c8eaSGuy Levi MLX5_SET(dctc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 18617249c8eaSGuy Levi 18625d6ff1baSYonatan Cohen return; 18635d6ff1baSYonatan Cohen } 18645d6ff1baSYonatan Cohen 18657249c8eaSGuy Levi MLX5_SET(qpc, qpc, cs_res, 18667249c8eaSGuy Levi rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE : 18677249c8eaSGuy Levi MLX5_RES_SCAT_DATA32_CQE); 18685d6ff1baSYonatan Cohen } 18695d6ff1baSYonatan Cohen 18705d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 18715d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 18726f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 18735d6ff1baSYonatan Cohen void *qpc) 18745d6ff1baSYonatan Cohen { 18755d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 18765d6ff1baSYonatan Cohen int scqe_sz; 18776f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 18785d6ff1baSYonatan Cohen 18795d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 18805d6ff1baSYonatan Cohen return; 18815d6ff1baSYonatan Cohen 18826f4bc0eaSYonatan Cohen if (ucmd) 18836f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 18846f4bc0eaSYonatan Cohen 18856f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 18865d6ff1baSYonatan Cohen return; 18875d6ff1baSYonatan Cohen 18885d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 18895d6ff1baSYonatan Cohen if (scqe_sz == 128) { 18905d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 18915d6ff1baSYonatan Cohen return; 18925d6ff1baSYonatan Cohen } 18935d6ff1baSYonatan Cohen 18945d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 18955d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 18965d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 18975d6ff1baSYonatan Cohen } 18985d6ff1baSYonatan Cohen 1899a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1900a60109dcSYonatan Cohen { 1901a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1902a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1903a60109dcSYonatan Cohen */ 1904a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1905a60109dcSYonatan Cohen int log_max_size; 1906a60109dcSYonatan Cohen 1907a60109dcSYonatan Cohen if (!supported_size_mask) 1908a60109dcSYonatan Cohen return -EOPNOTSUPP; 1909a60109dcSYonatan Cohen 1910a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1911a60109dcSYonatan Cohen 1912a60109dcSYonatan Cohen if (log_max_size > 3) 1913a60109dcSYonatan Cohen return log_max_size; 1914a60109dcSYonatan Cohen 1915a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1916a60109dcSYonatan Cohen } 1917a60109dcSYonatan Cohen 1918a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1919a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1920a60109dcSYonatan Cohen { 1921a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1922a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1923a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1924a60109dcSYonatan Cohen int atomic_size_mask; 1925a60109dcSYonatan Cohen 1926a60109dcSYonatan Cohen if (!atomic) 1927a60109dcSYonatan Cohen return -EOPNOTSUPP; 1928a60109dcSYonatan Cohen 1929a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1930a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1931a60109dcSYonatan Cohen else 1932a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1933a60109dcSYonatan Cohen 1934a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1935a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1936a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1937a60109dcSYonatan Cohen 1938a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1939a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1940a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1941a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1942a60109dcSYonatan Cohen 1943a60109dcSYonatan Cohen return atomic_mode; 1944a60109dcSYonatan Cohen } 1945a60109dcSYonatan Cohen 19462e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 19472e43bb31SYonatan Cohen { 19482e43bb31SYonatan Cohen return (input & ~supported) == 0; 19492e43bb31SYonatan Cohen } 19502e43bb31SYonatan Cohen 1951e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1952e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1953e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1954e126ba97SEli Cohen { 1955e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 195609a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1957938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 19580625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 195989944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 196089944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 196189ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 196289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 196389ea94a7SMaor Gottlieb unsigned long flags; 1964cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 196509a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 196609a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1967e7b169f3SNoa Osherovich int mlx5_st; 1968cfb5e088SHaggai Abramovsky void *qpc; 196909a7d9ecSSaeed Mahameed u32 *in; 197009a7d9ecSSaeed Mahameed int err; 1971e126ba97SEli Cohen 1972e126ba97SEli Cohen mutex_init(&qp->mutex); 1973e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1974e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1975e126ba97SEli Cohen 1976e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1977e7b169f3SNoa Osherovich if (mlx5_st < 0) 1978e7b169f3SNoa Osherovich return -EINVAL; 1979e7b169f3SNoa Osherovich 198028d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 198128d61370SYishai Hadas if (!udata) 198228d61370SYishai Hadas return -ENOSYS; 198328d61370SYishai Hadas 198428d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 198528d61370SYishai Hadas return err; 198628d61370SYishai Hadas } 198728d61370SYishai Hadas 1988f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1989938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1990f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1991f360d88aSEli Cohen return -EINVAL; 1992f360d88aSEli Cohen } else { 1993f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1994f360d88aSEli Cohen } 1995f360d88aSEli Cohen } 1996f360d88aSEli Cohen 1997051f2630SLeon Romanovsky if (init_attr->create_flags & 1998051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1999051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 2000051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 2001051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 2002051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 2003051f2630SLeon Romanovsky return -EINVAL; 2004051f2630SLeon Romanovsky } 2005051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 2006051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 2007051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 2008051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 2009051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 2010051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 2011051f2630SLeon Romanovsky } 2012f0313965SErez Shitrit 2013f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2014f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 2015f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 2016f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 2017f0313965SErez Shitrit return -EOPNOTSUPP; 2018f0313965SErez Shitrit } 2019f0313965SErez Shitrit 2020358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 2021358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2022358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 2023358e42eaSMajd Dibbiny return -EOPNOTSUPP; 2024358e42eaSMajd Dibbiny } 2025358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 2026358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 2027358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 2028358e42eaSMajd Dibbiny return -EOPNOTSUPP; 2029358e42eaSMajd Dibbiny } 2030358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 2031358e42eaSMajd Dibbiny } 2032358e42eaSMajd Dibbiny 2033e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 2034e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 2035e126ba97SEli Cohen 2036e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 2037e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 2038e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 2039e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 2040e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 2041e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 2042e4cc4fa7SNoa Osherovich } 2043e4cc4fa7SNoa Osherovich 2044e00b64f7SShamir Rabinovitch if (udata) { 2045e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 2046e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 2047e126ba97SEli Cohen return -EFAULT; 2048e126ba97SEli Cohen } 2049e126ba97SEli Cohen 20502e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 2051569c6651SDanit Goldberg MLX5_QP_FLAG_ALLOW_SCATTER_CQE | 20528af526e0SMark Bloch MLX5_QP_FLAG_BFREG_INDEX | 20538af526e0SMark Bloch MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE | 20548af526e0SMark Bloch MLX5_QP_FLAG_SCATTER_CQE | 20558af526e0SMark Bloch MLX5_QP_FLAG_SIGNATURE | 20568af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC | 20578af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 20588af526e0SMark Bloch MLX5_QP_FLAG_TUNNEL_OFFLOADS | 20598af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCI | 20608af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCT)) 20612e43bb31SYonatan Cohen return -EINVAL; 20622e43bb31SYonatan Cohen 206389944450SShamir Rabinovitch err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx); 2064cfb5e088SHaggai Abramovsky if (err) 2065cfb5e088SHaggai Abramovsky return err; 2066cfb5e088SHaggai Abramovsky 2067e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 20685d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 2069e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 2070f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 2071f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 2072f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 2073f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 2074f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 2075f95ef6cbSMaor Gottlieb } 2076175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 2077175edba8SMark Bloch } 2078175edba8SMark Bloch 2079175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 2080175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2081175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 2082175edba8SMark Bloch return -EOPNOTSUPP; 2083175edba8SMark Bloch } 2084175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 2085175edba8SMark Bloch } 2086175edba8SMark Bloch 2087175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 2088175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2089175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 2090175edba8SMark Bloch return -EOPNOTSUPP; 2091175edba8SMark Bloch } 2092175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 2093f95ef6cbSMaor Gottlieb } 2094c2e53b2cSYishai Hadas 2095569c6651SDanit Goldberg if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) { 2096569c6651SDanit Goldberg if (init_attr->qp_type != IB_QPT_RC || 2097569c6651SDanit Goldberg !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { 2098569c6651SDanit Goldberg mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n"); 2099569c6651SDanit Goldberg return -EOPNOTSUPP; 2100569c6651SDanit Goldberg } 2101569c6651SDanit Goldberg qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT; 2102569c6651SDanit Goldberg } 2103569c6651SDanit Goldberg 2104c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 2105c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 2106c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 2107c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 2108c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 2109c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 2110c2e53b2cSYishai Hadas return -EOPNOTSUPP; 2111c2e53b2cSYishai Hadas } 2112c2e53b2cSYishai Hadas 2113c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 2114c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 2115c2e53b2cSYishai Hadas } 2116e126ba97SEli Cohen } else { 2117e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 2118e126ba97SEli Cohen } 2119e126ba97SEli Cohen 2120c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 2121c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 2122c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 2123c2e53b2cSYishai Hadas &qp->trans_qp.base; 2124c2e53b2cSYishai Hadas 2125e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 2126e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 2127e00b64f7SShamir Rabinovitch qp, udata ? &ucmd : NULL); 2128e126ba97SEli Cohen if (err) { 2129e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2130e126ba97SEli Cohen return err; 2131e126ba97SEli Cohen } 2132e126ba97SEli Cohen 2133e126ba97SEli Cohen if (pd) { 2134e00b64f7SShamir Rabinovitch if (udata) { 2135938fe83cSSaeed Mahameed __u32 max_wqes = 2136938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 2137e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 2138e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 2139e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 2140e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 2141e126ba97SEli Cohen return -EINVAL; 2142e126ba97SEli Cohen } 2143938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 2144e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 2145938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 2146e126ba97SEli Cohen return -EINVAL; 2147e126ba97SEli Cohen } 2148b11a4f9cSHaggai Eran if (init_attr->create_flags & 2149b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 2150b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 2151b11a4f9cSHaggai Eran return -EINVAL; 2152b11a4f9cSHaggai Eran } 21530fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 21540fb2ed66Smajd@mellanox.com &resp, &inlen, base); 2155e126ba97SEli Cohen if (err) 2156e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2157e126ba97SEli Cohen } else { 215819098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 215919098df2Smajd@mellanox.com base); 2160e126ba97SEli Cohen if (err) 2161e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2162e126ba97SEli Cohen } 2163e126ba97SEli Cohen 2164e126ba97SEli Cohen if (err) 2165e126ba97SEli Cohen return err; 2166e126ba97SEli Cohen } else { 21671b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2168e126ba97SEli Cohen if (!in) 2169e126ba97SEli Cohen return -ENOMEM; 2170e126ba97SEli Cohen 2171e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 2172e126ba97SEli Cohen } 2173e126ba97SEli Cohen 2174e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2175e126ba97SEli Cohen qp->port = init_attr->port_num; 2176e126ba97SEli Cohen 217709a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 217809a7d9ecSSaeed Mahameed 2179e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 218009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2181e126ba97SEli Cohen 2182e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 218309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2184e126ba97SEli Cohen else 218509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 218609a7d9ecSSaeed Mahameed 2187e126ba97SEli Cohen 2188e126ba97SEli Cohen if (qp->wq_sig) 218909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2190e126ba97SEli Cohen 2191f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 219209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2193f360d88aSEli Cohen 2194051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 219509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2196051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 219709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2198051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 219909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2200569c6651SDanit Goldberg if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT) 2201569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 2202e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 22035d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 22046f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 2205e00b64f7SShamir Rabinovitch udata ? &ucmd : NULL, 22066f4bc0eaSYonatan Cohen qpc); 2207e126ba97SEli Cohen } 2208e126ba97SEli Cohen 2209e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 221009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 221109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2212e126ba97SEli Cohen } 2213e126ba97SEli Cohen 221409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2215e126ba97SEli Cohen 22163fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 221709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 22183fd3307eSArtemy Kovalyov } else { 221909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 22203fd3307eSArtemy Kovalyov if (init_attr->srq && 22213fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 22223fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 22233fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 22243fd3307eSArtemy Kovalyov } 2225e126ba97SEli Cohen 2226e126ba97SEli Cohen /* Set default resources */ 2227e126ba97SEli Cohen switch (init_attr->qp_type) { 2228e126ba97SEli Cohen case IB_QPT_XRC_TGT: 222909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 223009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 223109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 223209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2233e126ba97SEli Cohen break; 2234e126ba97SEli Cohen case IB_QPT_XRC_INI: 223509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 223609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 223709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2238e126ba97SEli Cohen break; 2239e126ba97SEli Cohen default: 2240e126ba97SEli Cohen if (init_attr->srq) { 224109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 224209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2243e126ba97SEli Cohen } else { 224409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 224509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2246e126ba97SEli Cohen } 2247e126ba97SEli Cohen } 2248e126ba97SEli Cohen 2249e126ba97SEli Cohen if (init_attr->send_cq) 225009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2251e126ba97SEli Cohen 2252e126ba97SEli Cohen if (init_attr->recv_cq) 225309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2254e126ba97SEli Cohen 225509a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2256e126ba97SEli Cohen 2257cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 225809a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2259cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 226009a7d9ecSSaeed Mahameed 2261f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2262f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2263f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2264f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2265f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2266f0313965SErez Shitrit } 2267cfb5e088SHaggai Abramovsky 2268b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2269b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2270b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2271b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2272b1383aa6SNoa Osherovich goto err; 2273b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2274b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2275b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2276b1383aa6SNoa Osherovich } else { 2277b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2278b1383aa6SNoa Osherovich } 2279b1383aa6SNoa Osherovich } 2280b1383aa6SNoa Osherovich 22812c292dbbSBoris Pismenny if (inlen < 0) { 22822c292dbbSBoris Pismenny err = -EINVAL; 22832c292dbbSBoris Pismenny goto err; 22842c292dbbSBoris Pismenny } 22852c292dbbSBoris Pismenny 2286c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2287c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 22880fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 22890fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 22907f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 22917f72052cSYishai Hadas &resp); 22920fb2ed66Smajd@mellanox.com } else { 229319098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 22940fb2ed66Smajd@mellanox.com } 22950fb2ed66Smajd@mellanox.com 2296e126ba97SEli Cohen if (err) { 2297e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2298e126ba97SEli Cohen goto err_create; 2299e126ba97SEli Cohen } 2300e126ba97SEli Cohen 2301479163f4SAl Viro kvfree(in); 2302e126ba97SEli Cohen 230319098df2Smajd@mellanox.com base->container_mibqp = qp; 230419098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2305e126ba97SEli Cohen 230689ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 230789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 230889ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 230989ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 231089ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 231189ea94a7SMaor Gottlieb * flow 231289ea94a7SMaor Gottlieb */ 231389ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 231489ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 231589ea94a7SMaor Gottlieb */ 231689ea94a7SMaor Gottlieb if (send_cq) 231789ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 231889ea94a7SMaor Gottlieb if (recv_cq) 231989ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 232089ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 232189ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 232289ea94a7SMaor Gottlieb 2323e126ba97SEli Cohen return 0; 2324e126ba97SEli Cohen 2325e126ba97SEli Cohen err_create: 2326e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2327bdeacabdSShamir Rabinovitch destroy_qp_user(dev, pd, qp, base, udata); 2328e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2329e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2330e126ba97SEli Cohen 2331b1383aa6SNoa Osherovich err: 2332479163f4SAl Viro kvfree(in); 2333e126ba97SEli Cohen return err; 2334e126ba97SEli Cohen } 2335e126ba97SEli Cohen 2336e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2337e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2338e126ba97SEli Cohen { 2339e126ba97SEli Cohen if (send_cq) { 2340e126ba97SEli Cohen if (recv_cq) { 2341e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 234289ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2343e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2344e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2345e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 234689ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2347e126ba97SEli Cohen __acquire(&recv_cq->lock); 2348e126ba97SEli Cohen } else { 234989ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2350e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2351e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2352e126ba97SEli Cohen } 2353e126ba97SEli Cohen } else { 235489ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 23556a4f139aSEli Cohen __acquire(&recv_cq->lock); 2356e126ba97SEli Cohen } 2357e126ba97SEli Cohen } else if (recv_cq) { 235889ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 23596a4f139aSEli Cohen __acquire(&send_cq->lock); 23606a4f139aSEli Cohen } else { 23616a4f139aSEli Cohen __acquire(&send_cq->lock); 23626a4f139aSEli Cohen __acquire(&recv_cq->lock); 2363e126ba97SEli Cohen } 2364e126ba97SEli Cohen } 2365e126ba97SEli Cohen 2366e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2367e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2368e126ba97SEli Cohen { 2369e126ba97SEli Cohen if (send_cq) { 2370e126ba97SEli Cohen if (recv_cq) { 2371e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2372e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 237389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2374e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2375e126ba97SEli Cohen __release(&recv_cq->lock); 237689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2377e126ba97SEli Cohen } else { 2378e126ba97SEli Cohen spin_unlock(&send_cq->lock); 237989ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2380e126ba97SEli Cohen } 2381e126ba97SEli Cohen } else { 23826a4f139aSEli Cohen __release(&recv_cq->lock); 238389ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2384e126ba97SEli Cohen } 2385e126ba97SEli Cohen } else if (recv_cq) { 23866a4f139aSEli Cohen __release(&send_cq->lock); 238789ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 23886a4f139aSEli Cohen } else { 23896a4f139aSEli Cohen __release(&recv_cq->lock); 23906a4f139aSEli Cohen __release(&send_cq->lock); 2391e126ba97SEli Cohen } 2392e126ba97SEli Cohen } 2393e126ba97SEli Cohen 2394e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2395e126ba97SEli Cohen { 2396e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2397e126ba97SEli Cohen } 2398e126ba97SEli Cohen 239989ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 240089ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2401e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2402e126ba97SEli Cohen { 240389ea94a7SMaor Gottlieb switch (qp_type) { 2404e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2405e126ba97SEli Cohen *send_cq = NULL; 2406e126ba97SEli Cohen *recv_cq = NULL; 2407e126ba97SEli Cohen break; 2408e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2409e126ba97SEli Cohen case IB_QPT_XRC_INI: 241089ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2411e126ba97SEli Cohen *recv_cq = NULL; 2412e126ba97SEli Cohen break; 2413e126ba97SEli Cohen 2414e126ba97SEli Cohen case IB_QPT_SMI: 2415d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2416e126ba97SEli Cohen case IB_QPT_RC: 2417e126ba97SEli Cohen case IB_QPT_UC: 2418e126ba97SEli Cohen case IB_QPT_UD: 2419e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2420e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 24210fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 242289ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 242389ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2424e126ba97SEli Cohen break; 2425e126ba97SEli Cohen 2426e126ba97SEli Cohen case IB_QPT_MAX: 2427e126ba97SEli Cohen default: 2428e126ba97SEli Cohen *send_cq = NULL; 2429e126ba97SEli Cohen *recv_cq = NULL; 2430e126ba97SEli Cohen break; 2431e126ba97SEli Cohen } 2432e126ba97SEli Cohen } 2433e126ba97SEli Cohen 2434ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 243513eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 243613eab21fSAviv Heller u8 lag_tx_affinity); 2437ad5f8e96Smajd@mellanox.com 2438bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 2439bdeacabdSShamir Rabinovitch struct ib_udata *udata) 2440e126ba97SEli Cohen { 2441e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2442c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 244389ea94a7SMaor Gottlieb unsigned long flags; 2444e126ba97SEli Cohen int err; 2445e126ba97SEli Cohen 244628d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 244728d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 244828d61370SYishai Hadas return; 244928d61370SYishai Hadas } 245028d61370SYishai Hadas 2451c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2452c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 24530fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 24540fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 24550fb2ed66Smajd@mellanox.com 24566aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2457c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2458c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2459ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 24601a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 24611a412fb1SSaeed Mahameed NULL, &base->mqp); 2462ad5f8e96Smajd@mellanox.com } else { 24630680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 24640680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 24650680efa2SAlex Vesker }; 24660680efa2SAlex Vesker 246713eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2468ad5f8e96Smajd@mellanox.com } 2469ad5f8e96Smajd@mellanox.com if (err) 2470427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 247119098df2Smajd@mellanox.com base->mqp.qpn); 24726aec21f6SHaggai Eran } 2473e126ba97SEli Cohen 247489ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 247589ea94a7SMaor Gottlieb &send_cq, &recv_cq); 247689ea94a7SMaor Gottlieb 247789ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 247889ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 247989ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 248089ea94a7SMaor Gottlieb list_del(&qp->qps_list); 248189ea94a7SMaor Gottlieb if (send_cq) 248289ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 248389ea94a7SMaor Gottlieb 248489ea94a7SMaor Gottlieb if (recv_cq) 248589ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2486e126ba97SEli Cohen 2487e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 248819098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2489e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2490e126ba97SEli Cohen if (send_cq != recv_cq) 249119098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 249219098df2Smajd@mellanox.com NULL); 2493e126ba97SEli Cohen } 249489ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 249589ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2496e126ba97SEli Cohen 2497c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2498c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 24990fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 25000fb2ed66Smajd@mellanox.com } else { 250119098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2502e126ba97SEli Cohen if (err) 25030fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 25040fb2ed66Smajd@mellanox.com base->mqp.qpn); 25050fb2ed66Smajd@mellanox.com } 2506e126ba97SEli Cohen 2507e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2508e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2509e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2510bdeacabdSShamir Rabinovitch destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata); 2511e126ba97SEli Cohen } 2512e126ba97SEli Cohen 2513e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2514e126ba97SEli Cohen { 2515e126ba97SEli Cohen switch (type) { 2516e126ba97SEli Cohen case IB_QPT_SMI: 2517e126ba97SEli Cohen return "IB_QPT_SMI"; 2518e126ba97SEli Cohen case IB_QPT_GSI: 2519e126ba97SEli Cohen return "IB_QPT_GSI"; 2520e126ba97SEli Cohen case IB_QPT_RC: 2521e126ba97SEli Cohen return "IB_QPT_RC"; 2522e126ba97SEli Cohen case IB_QPT_UC: 2523e126ba97SEli Cohen return "IB_QPT_UC"; 2524e126ba97SEli Cohen case IB_QPT_UD: 2525e126ba97SEli Cohen return "IB_QPT_UD"; 2526e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2527e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2528e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2529e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2530e126ba97SEli Cohen case IB_QPT_XRC_INI: 2531e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2532e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2533e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2534e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2535e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2536e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2537e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2538b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2539b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2540e126ba97SEli Cohen case IB_QPT_MAX: 2541e126ba97SEli Cohen default: 2542e126ba97SEli Cohen return "Invalid QP type"; 2543e126ba97SEli Cohen } 2544e126ba97SEli Cohen } 2545e126ba97SEli Cohen 2546b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2547b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 254889944450SShamir Rabinovitch struct mlx5_ib_create_qp *ucmd, 254989944450SShamir Rabinovitch struct ib_udata *udata) 2550b4aaa1f0SMoni Shoua { 255189944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 255289944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2553b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2554b4aaa1f0SMoni Shoua int err = 0; 2555b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2556b4aaa1f0SMoni Shoua void *dctc; 2557b4aaa1f0SMoni Shoua 2558b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2559b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2560b4aaa1f0SMoni Shoua 256189944450SShamir Rabinovitch err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx); 2562b4aaa1f0SMoni Shoua if (err) 2563b4aaa1f0SMoni Shoua return ERR_PTR(err); 2564b4aaa1f0SMoni Shoua 2565b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2566b4aaa1f0SMoni Shoua if (!qp) 2567b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2568b4aaa1f0SMoni Shoua 2569b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2570b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2571b4aaa1f0SMoni Shoua err = -ENOMEM; 2572b4aaa1f0SMoni Shoua goto err_free; 2573b4aaa1f0SMoni Shoua } 2574b4aaa1f0SMoni Shoua 2575a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2576b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2577776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2578b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2579b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2580b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2581b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2582b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2583b4aaa1f0SMoni Shoua 25845d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 25855d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 25865d6ff1baSYonatan Cohen 2587b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2588b4aaa1f0SMoni Shoua 2589b4aaa1f0SMoni Shoua return &qp->ibqp; 2590b4aaa1f0SMoni Shoua err_free: 2591b4aaa1f0SMoni Shoua kfree(qp); 2592b4aaa1f0SMoni Shoua return ERR_PTR(err); 2593b4aaa1f0SMoni Shoua } 2594b4aaa1f0SMoni Shoua 2595b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2596e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2597b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2598b4aaa1f0SMoni Shoua struct ib_udata *udata) 2599b4aaa1f0SMoni Shoua { 2600b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2601b4aaa1f0SMoni Shoua int err; 2602b4aaa1f0SMoni Shoua 2603b4aaa1f0SMoni Shoua if (!udata) 2604b4aaa1f0SMoni Shoua return -EINVAL; 2605b4aaa1f0SMoni Shoua 2606b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2607b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2608b4aaa1f0SMoni Shoua return -EINVAL; 2609b4aaa1f0SMoni Shoua } 2610b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2611b4aaa1f0SMoni Shoua if (err) 2612b4aaa1f0SMoni Shoua return err; 2613b4aaa1f0SMoni Shoua 2614b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2615b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2616b4aaa1f0SMoni Shoua } else { 2617b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2618b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2619b4aaa1f0SMoni Shoua } else { 2620b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2621b4aaa1f0SMoni Shoua return -EINVAL; 2622b4aaa1f0SMoni Shoua } 2623b4aaa1f0SMoni Shoua } 2624b4aaa1f0SMoni Shoua 2625b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2626b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2627b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2628b4aaa1f0SMoni Shoua } 2629b4aaa1f0SMoni Shoua 2630b4aaa1f0SMoni Shoua return 0; 2631b4aaa1f0SMoni Shoua } 2632b4aaa1f0SMoni Shoua 2633b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2634b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2635e126ba97SEli Cohen struct ib_udata *udata) 2636e126ba97SEli Cohen { 2637e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2638e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2639e126ba97SEli Cohen u16 xrcdn = 0; 2640e126ba97SEli Cohen int err; 2641b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2642b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 264389944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 264489944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2645e126ba97SEli Cohen 2646e126ba97SEli Cohen if (pd) { 2647e126ba97SEli Cohen dev = to_mdev(pd->device); 26480fb2ed66Smajd@mellanox.com 26490fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 265089944450SShamir Rabinovitch if (!ucontext) { 26510fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 26520fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 265389944450SShamir Rabinovitch } else if (!ucontext->cqe_version) { 26540fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 26550fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 26560fb2ed66Smajd@mellanox.com } 26570fb2ed66Smajd@mellanox.com } 265809f16cf5SMajd Dibbiny } else { 265909f16cf5SMajd Dibbiny /* being cautious here */ 266009f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 266109f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 266209f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 266309f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 266409f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 266509f16cf5SMajd Dibbiny } 266609f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2667e126ba97SEli Cohen } 2668e126ba97SEli Cohen 2669b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2670b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2671b4aaa1f0SMoni Shoua 2672b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2673b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2674b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2675b4aaa1f0SMoni Shoua if (err) 2676b4aaa1f0SMoni Shoua return ERR_PTR(err); 2677c32a4f29SMoni Shoua 2678c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2679c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2680c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2681c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2682c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2683c32a4f29SMoni Shoua } 2684776a3906SMoni Shoua } else { 268589944450SShamir Rabinovitch return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata); 2686c32a4f29SMoni Shoua } 2687b4aaa1f0SMoni Shoua } 2688b4aaa1f0SMoni Shoua 2689e126ba97SEli Cohen switch (init_attr->qp_type) { 2690e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2691e126ba97SEli Cohen case IB_QPT_XRC_INI: 2692938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2693e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2694e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2695e126ba97SEli Cohen } 2696e126ba97SEli Cohen init_attr->recv_cq = NULL; 2697e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2698e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2699e126ba97SEli Cohen init_attr->send_cq = NULL; 2700e126ba97SEli Cohen } 2701e126ba97SEli Cohen 2702e126ba97SEli Cohen /* fall through */ 27030fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2704e126ba97SEli Cohen case IB_QPT_RC: 2705e126ba97SEli Cohen case IB_QPT_UC: 2706e126ba97SEli Cohen case IB_QPT_UD: 2707e126ba97SEli Cohen case IB_QPT_SMI: 2708d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2709e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2710c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2711e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2712e126ba97SEli Cohen if (!qp) 2713e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2714e126ba97SEli Cohen 2715e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2716e126ba97SEli Cohen if (err) { 2717e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2718e126ba97SEli Cohen kfree(qp); 2719e126ba97SEli Cohen return ERR_PTR(err); 2720e126ba97SEli Cohen } 2721e126ba97SEli Cohen 2722e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2723e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2724e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2725e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2726e126ba97SEli Cohen else 272719098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2728e126ba97SEli Cohen 2729e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 273019098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2731a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2732a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2733e126ba97SEli Cohen 273419098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2735e126ba97SEli Cohen 2736e126ba97SEli Cohen break; 2737e126ba97SEli Cohen 2738d16e91daSHaggai Eran case IB_QPT_GSI: 2739d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2740d16e91daSHaggai Eran 2741e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2742e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2743e126ba97SEli Cohen case IB_QPT_MAX: 2744e126ba97SEli Cohen default: 2745e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2746e126ba97SEli Cohen init_attr->qp_type); 2747e126ba97SEli Cohen /* Don't support raw QPs */ 2748e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2749e126ba97SEli Cohen } 2750e126ba97SEli Cohen 2751b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2752b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2753b4aaa1f0SMoni Shoua 2754e126ba97SEli Cohen return &qp->ibqp; 2755e126ba97SEli Cohen } 2756e126ba97SEli Cohen 2757776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2758776a3906SMoni Shoua { 2759776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2760776a3906SMoni Shoua 2761776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2762776a3906SMoni Shoua int err; 2763776a3906SMoni Shoua 2764776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2765776a3906SMoni Shoua if (err) { 2766776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2767776a3906SMoni Shoua return err; 2768776a3906SMoni Shoua } 2769776a3906SMoni Shoua } 2770776a3906SMoni Shoua 2771776a3906SMoni Shoua kfree(mqp->dct.in); 2772776a3906SMoni Shoua kfree(mqp); 2773776a3906SMoni Shoua return 0; 2774776a3906SMoni Shoua } 2775776a3906SMoni Shoua 2776c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata) 2777e126ba97SEli Cohen { 2778e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2779e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2780e126ba97SEli Cohen 2781d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2782d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2783d16e91daSHaggai Eran 2784776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2785776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2786776a3906SMoni Shoua 2787bdeacabdSShamir Rabinovitch destroy_qp_common(dev, mqp, udata); 2788e126ba97SEli Cohen 2789e126ba97SEli Cohen kfree(mqp); 2790e126ba97SEli Cohen 2791e126ba97SEli Cohen return 0; 2792e126ba97SEli Cohen } 2793e126ba97SEli Cohen 2794a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2795a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2796bf3b4f06SBart Van Assche int attr_mask, __be32 *hw_access_flags_be) 2797e126ba97SEli Cohen { 2798e126ba97SEli Cohen u8 dest_rd_atomic; 2799bf3b4f06SBart Van Assche u32 access_flags, hw_access_flags = 0; 2800e126ba97SEli Cohen 2801a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2802a60109dcSYonatan Cohen 2803e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2804e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2805e126ba97SEli Cohen else 280619098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2807e126ba97SEli Cohen 2808e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2809e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2810e126ba97SEli Cohen else 281119098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2812e126ba97SEli Cohen 2813e126ba97SEli Cohen if (!dest_rd_atomic) 2814e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2815e126ba97SEli Cohen 2816e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2817bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RRE; 281813f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 2819a60109dcSYonatan Cohen int atomic_mode; 2820e126ba97SEli Cohen 2821a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2822a60109dcSYonatan Cohen if (atomic_mode < 0) 2823a60109dcSYonatan Cohen return -EOPNOTSUPP; 2824a60109dcSYonatan Cohen 2825bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RAE; 2826bf3b4f06SBart Van Assche hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2827a60109dcSYonatan Cohen } 2828a60109dcSYonatan Cohen 2829a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2830bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RWE; 2831a60109dcSYonatan Cohen 2832bf3b4f06SBart Van Assche *hw_access_flags_be = cpu_to_be32(hw_access_flags); 2833a60109dcSYonatan Cohen 2834a60109dcSYonatan Cohen return 0; 2835e126ba97SEli Cohen } 2836e126ba97SEli Cohen 2837e126ba97SEli Cohen enum { 2838e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2839e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2840e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2841e126ba97SEli Cohen }; 2842e126ba97SEli Cohen 2843e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2844e126ba97SEli Cohen { 28454f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2846e126ba97SEli Cohen return 0; 28474f32ac2eSDanit Goldberg 2848a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 2849e126ba97SEli Cohen return -EINVAL; 28504f32ac2eSDanit Goldberg 28514f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2852e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2853938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2854e126ba97SEli Cohen --rate; 2855e126ba97SEli Cohen 28564f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2857e126ba97SEli Cohen } 2858e126ba97SEli Cohen 285975850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 28601cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 28611cd6dbd3SYishai Hadas struct ib_pd *pd) 286275850d0bSmajd@mellanox.com { 286375850d0bSmajd@mellanox.com void *in; 286475850d0bSmajd@mellanox.com void *tisc; 286575850d0bSmajd@mellanox.com int inlen; 286675850d0bSmajd@mellanox.com int err; 286775850d0bSmajd@mellanox.com 286875850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28691b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 287075850d0bSmajd@mellanox.com if (!in) 287175850d0bSmajd@mellanox.com return -ENOMEM; 287275850d0bSmajd@mellanox.com 287375850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 28741cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 287575850d0bSmajd@mellanox.com 287675850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 287775850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 287875850d0bSmajd@mellanox.com 287975850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 288075850d0bSmajd@mellanox.com 288175850d0bSmajd@mellanox.com kvfree(in); 288275850d0bSmajd@mellanox.com 288375850d0bSmajd@mellanox.com return err; 288475850d0bSmajd@mellanox.com } 288575850d0bSmajd@mellanox.com 288613eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 28871cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 28881cd6dbd3SYishai Hadas struct ib_pd *pd) 288913eab21fSAviv Heller { 289013eab21fSAviv Heller void *in; 289113eab21fSAviv Heller void *tisc; 289213eab21fSAviv Heller int inlen; 289313eab21fSAviv Heller int err; 289413eab21fSAviv Heller 289513eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28961b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 289713eab21fSAviv Heller if (!in) 289813eab21fSAviv Heller return -ENOMEM; 289913eab21fSAviv Heller 290013eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 29011cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 290213eab21fSAviv Heller 290313eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 290413eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 290513eab21fSAviv Heller 290613eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 290713eab21fSAviv Heller 290813eab21fSAviv Heller kvfree(in); 290913eab21fSAviv Heller 291013eab21fSAviv Heller return err; 291113eab21fSAviv Heller } 291213eab21fSAviv Heller 291375850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 291490898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2915e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2916f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2917f879ee8dSAchiad Shochat bool alt) 2918e126ba97SEli Cohen { 2919d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2920e126ba97SEli Cohen int err; 2921ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2922d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2923d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2924e126ba97SEli Cohen 2925e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2926f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2927f879ee8dSAchiad Shochat attr->pkey_index); 2928e126ba97SEli Cohen 2929d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2930d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2931938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2932f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2933d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2934938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2935f83b4263SEli Cohen return -EINVAL; 2936f83b4263SEli Cohen } 29372811ba51SAchiad Shochat } 293844c58487SDasaratharaman Chandramouli 293944c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2940d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 29412811ba51SAchiad Shochat return -EINVAL; 294247ec3866SParav Pandit 294344c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 29442b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 29452b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 29462b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 29472b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 294847ec3866SParav Pandit path->udp_sport = 294947ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2950d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 295147ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2952ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2953d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 29542811ba51SAchiad Shochat } else { 2955d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2956d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2957d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2958d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2959d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2960d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2961e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2962d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 29632811ba51SAchiad Shochat } 29642811ba51SAchiad Shochat 2965d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2966d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2967d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2968e126ba97SEli Cohen path->tclass_flowlabel = 2969d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2970d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2971d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2972e126ba97SEli Cohen } 2973e126ba97SEli Cohen 2974d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2975e126ba97SEli Cohen if (err < 0) 2976e126ba97SEli Cohen return err; 2977e126ba97SEli Cohen path->static_rate = err; 2978e126ba97SEli Cohen path->port = port; 2979e126ba97SEli Cohen 2980e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2981f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2982e126ba97SEli Cohen 298375850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 298475850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 298575850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 29861cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 298775850d0bSmajd@mellanox.com 2988e126ba97SEli Cohen return 0; 2989e126ba97SEli Cohen } 2990e126ba97SEli Cohen 2991e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2992e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2993e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2994e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2995e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2996e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2997e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2998e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2999e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3000e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 3001e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 3002e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3003e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 3004e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 30058f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 30068f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30078f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30088f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PKEY_INDEX | 30098f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PRI_PORT, 3010e126ba97SEli Cohen }, 3011e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3012e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3013e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3014e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3015e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3016e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3017e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3018e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3019e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3020e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3021e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3022e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 3023e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3024a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3025a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 3026a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3027a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3028a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3029e126ba97SEli Cohen }, 3030e126ba97SEli Cohen }, 3031e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3032e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3033e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3034e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3035e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3036e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3037e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3038e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 3039e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3040e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3041e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 3042e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 30438f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 30448f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE | 30458f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30468f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30478f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 30488f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT, 3049e126ba97SEli Cohen }, 3050e126ba97SEli Cohen }, 3051e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3052e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3053e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3054e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3055e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3056e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 3057c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3058c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3059e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3060c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3061c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3062e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 3063e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 3064e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 30658f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 30668f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30678f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30688f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT | 30698f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 30708f4426aaSJack Morgenstein MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3071e126ba97SEli Cohen }, 3072e126ba97SEli Cohen }, 3073e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 3074e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3075e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3076e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 307775959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 3078a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 3079a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3080a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3081a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 30828f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 30838f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30848f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30858f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE, 3086e126ba97SEli Cohen }, 3087e126ba97SEli Cohen }, 3088e126ba97SEli Cohen }; 3089e126ba97SEli Cohen 3090e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 3091e126ba97SEli Cohen { 3092e126ba97SEli Cohen switch (ib_mask) { 3093e126ba97SEli Cohen case IB_QP_STATE: 3094e126ba97SEli Cohen return 0; 3095e126ba97SEli Cohen case IB_QP_CUR_STATE: 3096e126ba97SEli Cohen return 0; 3097e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 3098e126ba97SEli Cohen return 0; 3099e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 3100e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 3101e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 3102e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 3103e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 3104e126ba97SEli Cohen case IB_QP_PORT: 3105e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 3106e126ba97SEli Cohen case IB_QP_QKEY: 3107e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 3108e126ba97SEli Cohen case IB_QP_AV: 3109e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 3110e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 3111e126ba97SEli Cohen case IB_QP_PATH_MTU: 3112e126ba97SEli Cohen return 0; 3113e126ba97SEli Cohen case IB_QP_TIMEOUT: 3114e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 3115e126ba97SEli Cohen case IB_QP_RETRY_CNT: 3116e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 3117e126ba97SEli Cohen case IB_QP_RNR_RETRY: 3118e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 3119e126ba97SEli Cohen case IB_QP_RQ_PSN: 3120e126ba97SEli Cohen return 0; 3121e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 3122e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 3123e126ba97SEli Cohen case IB_QP_ALT_PATH: 3124e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 3125e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 3126e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 3127e126ba97SEli Cohen case IB_QP_SQ_PSN: 3128e126ba97SEli Cohen return 0; 3129e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 3130e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 3131e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 3132e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 3133e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 3134e126ba97SEli Cohen case IB_QP_CAP: 3135e126ba97SEli Cohen return 0; 3136e126ba97SEli Cohen case IB_QP_DEST_QPN: 3137e126ba97SEli Cohen return 0; 3138e126ba97SEli Cohen } 3139e126ba97SEli Cohen return 0; 3140e126ba97SEli Cohen } 3141e126ba97SEli Cohen 3142e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 3143e126ba97SEli Cohen { 3144e126ba97SEli Cohen int result = 0; 3145e126ba97SEli Cohen int i; 3146e126ba97SEli Cohen 3147e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 3148e126ba97SEli Cohen if ((1 << i) & ib_mask) 3149e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 3150e126ba97SEli Cohen } 3151e126ba97SEli Cohen 3152e126ba97SEli Cohen return result; 3153e126ba97SEli Cohen } 3154e126ba97SEli Cohen 315534d57585SYishai Hadas static int modify_raw_packet_qp_rq( 315634d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 315734d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3158ad5f8e96Smajd@mellanox.com { 3159ad5f8e96Smajd@mellanox.com void *in; 3160ad5f8e96Smajd@mellanox.com void *rqc; 3161ad5f8e96Smajd@mellanox.com int inlen; 3162ad5f8e96Smajd@mellanox.com int err; 3163ad5f8e96Smajd@mellanox.com 3164ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 31651b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3166ad5f8e96Smajd@mellanox.com if (!in) 3167ad5f8e96Smajd@mellanox.com return -ENOMEM; 3168ad5f8e96Smajd@mellanox.com 3169ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 317034d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3171ad5f8e96Smajd@mellanox.com 3172ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3173ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3174ad5f8e96Smajd@mellanox.com 3175eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3176eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3177eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 317823a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3179eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3180eb49ab0cSAlex Vesker } else 31815a738b5dSJason Gunthorpe dev_info_once( 31825a738b5dSJason Gunthorpe &dev->ib_dev.dev, 31835a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3184eb49ab0cSAlex Vesker } 3185eb49ab0cSAlex Vesker 3186eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 3187ad5f8e96Smajd@mellanox.com if (err) 3188ad5f8e96Smajd@mellanox.com goto out; 3189ad5f8e96Smajd@mellanox.com 3190ad5f8e96Smajd@mellanox.com rq->state = new_state; 3191ad5f8e96Smajd@mellanox.com 3192ad5f8e96Smajd@mellanox.com out: 3193ad5f8e96Smajd@mellanox.com kvfree(in); 3194ad5f8e96Smajd@mellanox.com return err; 3195ad5f8e96Smajd@mellanox.com } 3196ad5f8e96Smajd@mellanox.com 3197c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3198c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3199c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3200ad5f8e96Smajd@mellanox.com { 32017d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 320261147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 320361147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 320461147f39SBodong Wang bool new_rate_added = false; 32057d29f349SBodong Wang u16 rl_index = 0; 3206ad5f8e96Smajd@mellanox.com void *in; 3207ad5f8e96Smajd@mellanox.com void *sqc; 3208ad5f8e96Smajd@mellanox.com int inlen; 3209ad5f8e96Smajd@mellanox.com int err; 3210ad5f8e96Smajd@mellanox.com 3211ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 32121b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3213ad5f8e96Smajd@mellanox.com if (!in) 3214ad5f8e96Smajd@mellanox.com return -ENOMEM; 3215ad5f8e96Smajd@mellanox.com 3216c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3217ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3218ad5f8e96Smajd@mellanox.com 3219ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3220ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3221ad5f8e96Smajd@mellanox.com 32227d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 32237d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 32247d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 32257d29f349SBodong Wang __func__); 32267d29f349SBodong Wang else 322761147f39SBodong Wang new_rl = raw_qp_param->rl; 32287d29f349SBodong Wang } 3229ad5f8e96Smajd@mellanox.com 323061147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 323161147f39SBodong Wang if (new_rl.rate) { 323261147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 32337d29f349SBodong Wang if (err) { 323461147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 323561147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 323661147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 323761147f39SBodong Wang new_rl.typical_pkt_sz); 323861147f39SBodong Wang 32397d29f349SBodong Wang goto out; 32407d29f349SBodong Wang } 324161147f39SBodong Wang new_rate_added = true; 32427d29f349SBodong Wang } 32437d29f349SBodong Wang 32447d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 324561147f39SBodong Wang /* index 0 means no limit */ 32467d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 32477d29f349SBodong Wang } 32487d29f349SBodong Wang 32497d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 32507d29f349SBodong Wang if (err) { 32517d29f349SBodong Wang /* Remove new rate from table if failed */ 325261147f39SBodong Wang if (new_rate_added) 325361147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 32547d29f349SBodong Wang goto out; 32557d29f349SBodong Wang } 32567d29f349SBodong Wang 32577d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 325861147f39SBodong Wang if ((old_rl.rate && 325961147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 32607d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 326161147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 32627d29f349SBodong Wang 326361147f39SBodong Wang ibqp->rl = new_rl; 3264ad5f8e96Smajd@mellanox.com sq->state = new_state; 3265ad5f8e96Smajd@mellanox.com 3266ad5f8e96Smajd@mellanox.com out: 3267ad5f8e96Smajd@mellanox.com kvfree(in); 3268ad5f8e96Smajd@mellanox.com return err; 3269ad5f8e96Smajd@mellanox.com } 3270ad5f8e96Smajd@mellanox.com 3271ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 327213eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 327313eab21fSAviv Heller u8 tx_affinity) 3274ad5f8e96Smajd@mellanox.com { 3275ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3276ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3277ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 32787d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 32797d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3280ad5f8e96Smajd@mellanox.com int rq_state; 3281ad5f8e96Smajd@mellanox.com int sq_state; 3282ad5f8e96Smajd@mellanox.com int err; 3283ad5f8e96Smajd@mellanox.com 32840680efa2SAlex Vesker switch (raw_qp_param->operation) { 3285ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3286ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3287ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3288ad5f8e96Smajd@mellanox.com break; 3289ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3290ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3291ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3292ad5f8e96Smajd@mellanox.com break; 3293ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3294ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3295ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3296ad5f8e96Smajd@mellanox.com break; 3297ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3298ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 32997d29f349SBodong Wang if (raw_qp_param->set_mask == 33007d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 33017d29f349SBodong Wang modify_rq = 0; 33027d29f349SBodong Wang sq_state = sq->state; 33037d29f349SBodong Wang } else { 33047d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 33057d29f349SBodong Wang } 33067d29f349SBodong Wang break; 33077d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 33087d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3309eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3310eb49ab0cSAlex Vesker return -EINVAL; 3311eb49ab0cSAlex Vesker else 3312ad5f8e96Smajd@mellanox.com return 0; 3313ad5f8e96Smajd@mellanox.com default: 3314ad5f8e96Smajd@mellanox.com WARN_ON(1); 3315ad5f8e96Smajd@mellanox.com return -EINVAL; 3316ad5f8e96Smajd@mellanox.com } 3317ad5f8e96Smajd@mellanox.com 33187d29f349SBodong Wang if (modify_rq) { 331934d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 332034d57585SYishai Hadas qp->ibqp.pd); 3321ad5f8e96Smajd@mellanox.com if (err) 3322ad5f8e96Smajd@mellanox.com return err; 3323ad5f8e96Smajd@mellanox.com } 3324ad5f8e96Smajd@mellanox.com 33257d29f349SBodong Wang if (modify_sq) { 3326d5ed8ac3SMark Bloch struct mlx5_flow_handle *flow_rule; 3327d5ed8ac3SMark Bloch 332813eab21fSAviv Heller if (tx_affinity) { 332913eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 33301cd6dbd3SYishai Hadas tx_affinity, 33311cd6dbd3SYishai Hadas qp->ibqp.pd); 333213eab21fSAviv Heller if (err) 333313eab21fSAviv Heller return err; 333413eab21fSAviv Heller } 333513eab21fSAviv Heller 3336d5ed8ac3SMark Bloch flow_rule = create_flow_rule_vport_sq(dev, sq, 3337d5ed8ac3SMark Bloch raw_qp_param->port); 3338d5ed8ac3SMark Bloch if (IS_ERR(flow_rule)) 33391db86318SColin Ian King return PTR_ERR(flow_rule); 3340d5ed8ac3SMark Bloch 3341d5ed8ac3SMark Bloch err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3342c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 3343d5ed8ac3SMark Bloch if (err) { 3344d5ed8ac3SMark Bloch if (flow_rule) 3345d5ed8ac3SMark Bloch mlx5_del_flow_rules(flow_rule); 3346d5ed8ac3SMark Bloch return err; 3347d5ed8ac3SMark Bloch } 3348d5ed8ac3SMark Bloch 3349d5ed8ac3SMark Bloch if (flow_rule) { 3350d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 3351d5ed8ac3SMark Bloch sq->flow_rule = flow_rule; 3352d5ed8ac3SMark Bloch } 3353d5ed8ac3SMark Bloch 3354d5ed8ac3SMark Bloch return err; 335513eab21fSAviv Heller } 3356ad5f8e96Smajd@mellanox.com 3357ad5f8e96Smajd@mellanox.com return 0; 3358ad5f8e96Smajd@mellanox.com } 3359ad5f8e96Smajd@mellanox.com 3360c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3361c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3362c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 336389944450SShamir Rabinovitch u8 port_num, struct ib_udata *udata) 3364c6a21c38SMajd Dibbiny { 336589944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 336689944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 3367c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3368c6a21c38SMajd Dibbiny 3369c6a21c38SMajd Dibbiny if (ucontext) { 3370c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3371c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3372c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3373c6a21c38SMajd Dibbiny 1; 3374c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3375c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3376c6a21c38SMajd Dibbiny } else { 3377c6a21c38SMajd Dibbiny tx_port_affinity = 3378c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 337995579e78SMark Bloch 1, &dev->port[port_num].roce.tx_port_affinity) % 3380c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3381c6a21c38SMajd Dibbiny 1; 3382c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3383c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3384c6a21c38SMajd Dibbiny } 3385c6a21c38SMajd Dibbiny 3386c6a21c38SMajd Dibbiny return tx_port_affinity; 3387c6a21c38SMajd Dibbiny } 3388c6a21c38SMajd Dibbiny 3389e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3390e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 339189944450SShamir Rabinovitch enum ib_qp_state cur_state, 339289944450SShamir Rabinovitch enum ib_qp_state new_state, 339389944450SShamir Rabinovitch const struct mlx5_ib_modify_qp *ucmd, 339489944450SShamir Rabinovitch struct ib_udata *udata) 3395e126ba97SEli Cohen { 3396427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3397427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3398427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3399427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3400427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3401427c1e7bSmajd@mellanox.com }, 3402427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3403427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3404427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3405427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3406427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3407427c1e7bSmajd@mellanox.com }, 3408427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3409427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3410427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3411427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3412427c1e7bSmajd@mellanox.com }, 3413427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3414427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3415427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3416427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3417427c1e7bSmajd@mellanox.com }, 3418427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3419427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3420427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3421427c1e7bSmajd@mellanox.com }, 3422427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3423427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3424427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3425427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3426427c1e7bSmajd@mellanox.com }, 3427427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3428427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3429427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3430427c1e7bSmajd@mellanox.com } 3431427c1e7bSmajd@mellanox.com }; 3432427c1e7bSmajd@mellanox.com 3433e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3434e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 343519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3436e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3437e126ba97SEli Cohen struct mlx5_qp_context *context; 3438e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3439eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3440e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3441e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3442e126ba97SEli Cohen int mlx5_st; 3443e126ba97SEli Cohen int err; 3444427c1e7bSmajd@mellanox.com u16 op; 344513eab21fSAviv Heller u8 tx_affinity = 0; 3446e126ba97SEli Cohen 344755de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 344855de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 344955de9a77SLeon Romanovsky if (mlx5_st < 0) 345055de9a77SLeon Romanovsky return -EINVAL; 345155de9a77SLeon Romanovsky 34521a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 34531a412fb1SSaeed Mahameed if (!context) 3454e126ba97SEli Cohen return -ENOMEM; 3455e126ba97SEli Cohen 3456c6a21c38SMajd Dibbiny pd = get_pd(qp); 345755de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3458e126ba97SEli Cohen 3459e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3460e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3461e126ba97SEli Cohen } else { 3462e126ba97SEli Cohen switch (attr->path_mig_state) { 3463e126ba97SEli Cohen case IB_MIG_MIGRATED: 3464e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3465e126ba97SEli Cohen break; 3466e126ba97SEli Cohen case IB_MIG_REARM: 3467e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3468e126ba97SEli Cohen break; 3469e126ba97SEli Cohen case IB_MIG_ARMED: 3470e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3471e126ba97SEli Cohen break; 3472e126ba97SEli Cohen } 3473e126ba97SEli Cohen } 3474e126ba97SEli Cohen 347513eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 347613eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 347713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 347813eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 347913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 348013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 348113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 348213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 34837c34ec19SAviv Heller if (dev->lag_active) { 348495579e78SMark Bloch u8 p = mlx5_core_native_port_num(dev->mdev) - 1; 348589944450SShamir Rabinovitch tx_affinity = get_tx_affinity(dev, pd, base, p, 348689944450SShamir Rabinovitch udata); 348713eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 348813eab21fSAviv Heller } 348913eab21fSAviv Heller } 349013eab21fSAviv Heller } 349113eab21fSAviv Heller 3492d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3493e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3494c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3495c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3496e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3497e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3498e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3499e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3500e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3501e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3502e126ba97SEli Cohen err = -EINVAL; 3503e126ba97SEli Cohen goto out; 3504e126ba97SEli Cohen } 3505938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3506938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3507e126ba97SEli Cohen } 3508e126ba97SEli Cohen 3509e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3510e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3511e126ba97SEli Cohen 3512e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3513d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3514e126ba97SEli Cohen 3515e126ba97SEli Cohen /* todo implement counter_index functionality */ 3516e126ba97SEli Cohen 3517e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3518e126ba97SEli Cohen context->pri_path.port = qp->port; 3519e126ba97SEli Cohen 3520e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3521e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3522e126ba97SEli Cohen 3523e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 352475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3525e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3526f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3527e126ba97SEli Cohen if (err) 3528e126ba97SEli Cohen goto out; 3529e126ba97SEli Cohen } 3530e126ba97SEli Cohen 3531e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3532e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3533e126ba97SEli Cohen 3534e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 353575850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 353675850d0bSmajd@mellanox.com &context->alt_path, 3537f879ee8dSAchiad Shochat attr->alt_port_num, 3538f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3539f879ee8dSAchiad Shochat 0, attr, true); 3540e126ba97SEli Cohen if (err) 3541e126ba97SEli Cohen goto out; 3542e126ba97SEli Cohen } 3543e126ba97SEli Cohen 354489ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 354589ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3546e126ba97SEli Cohen 3547e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3548e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3549e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3550e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3551e126ba97SEli Cohen 3552e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3553e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3554e126ba97SEli Cohen 3555e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3556e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3557e126ba97SEli Cohen 3558e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3559e126ba97SEli Cohen if (attr->max_rd_atomic) 3560e126ba97SEli Cohen context->params1 |= 3561e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3562e126ba97SEli Cohen } 3563e126ba97SEli Cohen 3564e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3565e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3566e126ba97SEli Cohen 3567e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3568e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3569e126ba97SEli Cohen context->params2 |= 3570e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3571e126ba97SEli Cohen } 3572e126ba97SEli Cohen 3573a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3574bf3b4f06SBart Van Assche __be32 access_flags; 3575a60109dcSYonatan Cohen 3576a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3577a60109dcSYonatan Cohen if (err) 3578a60109dcSYonatan Cohen goto out; 3579a60109dcSYonatan Cohen 3580a60109dcSYonatan Cohen context->params2 |= access_flags; 3581a60109dcSYonatan Cohen } 3582e126ba97SEli Cohen 3583e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3584e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3585e126ba97SEli Cohen 3586e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3587e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3588e126ba97SEli Cohen 3589e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3590e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3591e126ba97SEli Cohen 3592e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3593e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3594e126ba97SEli Cohen 35950837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 35960837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 35970837e86aSMark Bloch qp->port) - 1; 3598c2e53b2cSYishai Hadas 3599c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3600c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3601c2e53b2cSYishai Hadas port_num = 0; 3602c2e53b2cSYishai Hadas 3603eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 36040837e86aSMark Bloch context->qp_counter_set_usr_page |= 3605e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 36060837e86aSMark Bloch } 36070837e86aSMark Bloch 3608e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3609e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3610e126ba97SEli Cohen 3611b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3612b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3613e126ba97SEli Cohen 3614e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3615e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3616e126ba97SEli Cohen 3617427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 36185d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 36195d414b17SDan Carpenter err = -EINVAL; 3620427c1e7bSmajd@mellanox.com goto out; 36215d414b17SDan Carpenter } 3622427c1e7bSmajd@mellanox.com 3623427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3624e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3625e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3626ad5f8e96Smajd@mellanox.com 3627c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3628c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 36290680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 36300680efa2SAlex Vesker 36310680efa2SAlex Vesker raw_qp_param.operation = op; 3632eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3633e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3634eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3635eb49ab0cSAlex Vesker } 36367d29f349SBodong Wang 3637d5ed8ac3SMark Bloch if (attr_mask & IB_QP_PORT) 3638d5ed8ac3SMark Bloch raw_qp_param.port = attr->port_num; 3639d5ed8ac3SMark Bloch 36407d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 364161147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 364261147f39SBodong Wang 364361147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 364461147f39SBodong Wang if (attr->rate_limit && 364561147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 364661147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 364761147f39SBodong Wang ucmd->burst_info.max_burst_sz; 364861147f39SBodong Wang } else { 364961147f39SBodong Wang err = -EINVAL; 365061147f39SBodong Wang goto out; 365161147f39SBodong Wang } 365261147f39SBodong Wang } 365361147f39SBodong Wang 365461147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 365561147f39SBodong Wang if (attr->rate_limit && 365661147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 365761147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 365861147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 365961147f39SBodong Wang } else { 366061147f39SBodong Wang err = -EINVAL; 366161147f39SBodong Wang goto out; 366261147f39SBodong Wang } 366361147f39SBodong Wang } 366461147f39SBodong Wang 36657d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 36667d29f349SBodong Wang } 36677d29f349SBodong Wang 366813eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 36690680efa2SAlex Vesker } else { 36701a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 367119098df2Smajd@mellanox.com &base->mqp); 36720680efa2SAlex Vesker } 36730680efa2SAlex Vesker 3674e126ba97SEli Cohen if (err) 3675e126ba97SEli Cohen goto out; 3676e126ba97SEli Cohen 3677e126ba97SEli Cohen qp->state = new_state; 3678e126ba97SEli Cohen 3679e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 368019098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3681e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 368219098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3683e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3684e126ba97SEli Cohen qp->port = attr->port_num; 3685e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 368619098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3687e126ba97SEli Cohen 3688e126ba97SEli Cohen /* 3689e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3690e126ba97SEli Cohen * entries and reinitialize the QP. 3691e126ba97SEli Cohen */ 369275a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 369375a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 369419098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3695e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3696e126ba97SEli Cohen if (send_cq != recv_cq) 369719098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3698e126ba97SEli Cohen 3699e126ba97SEli Cohen qp->rq.head = 0; 3700e126ba97SEli Cohen qp->rq.tail = 0; 3701e126ba97SEli Cohen qp->sq.head = 0; 3702e126ba97SEli Cohen qp->sq.tail = 0; 3703e126ba97SEli Cohen qp->sq.cur_post = 0; 370434f4c955SGuy Levi if (qp->sq.wqe_cnt) 370534f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3706e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3707e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3708e126ba97SEli Cohen } 3709e126ba97SEli Cohen 3710e126ba97SEli Cohen out: 37111a412fb1SSaeed Mahameed kfree(context); 3712e126ba97SEli Cohen return err; 3713e126ba97SEli Cohen } 3714e126ba97SEli Cohen 3715c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3716c32a4f29SMoni Shoua { 3717c32a4f29SMoni Shoua if ((mask & req) != req) 3718c32a4f29SMoni Shoua return false; 3719c32a4f29SMoni Shoua 3720c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3721c32a4f29SMoni Shoua return false; 3722c32a4f29SMoni Shoua 3723c32a4f29SMoni Shoua return true; 3724c32a4f29SMoni Shoua } 3725c32a4f29SMoni Shoua 3726c32a4f29SMoni Shoua /* check valid transition for driver QP types 3727c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3728c32a4f29SMoni Shoua */ 3729c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3730c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3731c32a4f29SMoni Shoua { 3732c32a4f29SMoni Shoua int req = IB_QP_STATE; 3733c32a4f29SMoni Shoua int opt = 0; 3734c32a4f29SMoni Shoua 373599ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 373699ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 373799ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3738c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3739c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3740c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3741c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3742c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3743c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3744c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 37455ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3746c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3747c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3748c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3749c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3750c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3751c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3752c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3753c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3754c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3755c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3756c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3757c32a4f29SMoni Shoua } 3758c32a4f29SMoni Shoua return false; 3759c32a4f29SMoni Shoua } 3760c32a4f29SMoni Shoua 3761776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3762776a3906SMoni Shoua * valid transitions are: 3763776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3764776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3765776a3906SMoni Shoua * mtu, gid_index and hop_limit 3766776a3906SMoni Shoua * Other transitions and attributes are illegal 3767776a3906SMoni Shoua */ 3768776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3769776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3770776a3906SMoni Shoua { 3771776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3772776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3773776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3774776a3906SMoni Shoua int err = 0; 3775776a3906SMoni Shoua int required = IB_QP_STATE; 3776776a3906SMoni Shoua void *dctc; 3777776a3906SMoni Shoua 3778776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3779776a3906SMoni Shoua return -EINVAL; 3780776a3906SMoni Shoua 3781776a3906SMoni Shoua cur_state = qp->state; 3782776a3906SMoni Shoua new_state = attr->qp_state; 3783776a3906SMoni Shoua 3784776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3785776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3786776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3787776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3788776a3906SMoni Shoua return -EINVAL; 3789776a3906SMoni Shoua 3790776a3906SMoni Shoua if (attr->port_num == 0 || 3791776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3792776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3793776a3906SMoni Shoua attr->port_num, dev->num_ports); 3794776a3906SMoni Shoua return -EINVAL; 3795776a3906SMoni Shoua } 3796776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3797776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3798776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3799776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3800776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3801a60109dcSYonatan Cohen int atomic_mode; 3802a60109dcSYonatan Cohen 3803a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3804a60109dcSYonatan Cohen if (atomic_mode < 0) 3805776a3906SMoni Shoua return -EOPNOTSUPP; 3806a60109dcSYonatan Cohen 3807a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3808776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3809776a3906SMoni Shoua } 3810776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3811776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3812776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3813776a3906SMoni Shoua 3814776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3815776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3816c5ae1954SYishai Hadas u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; 3817776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3818776a3906SMoni Shoua sizeof(resp.dctn); 3819776a3906SMoni Shoua 3820776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3821776a3906SMoni Shoua return -EINVAL; 3822776a3906SMoni Shoua resp.response_length = min_resp_len; 3823776a3906SMoni Shoua 3824776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3825776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3826776a3906SMoni Shoua return -EINVAL; 3827776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3828776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3829776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3830776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3831776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3832776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3833776a3906SMoni Shoua 3834776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3835c5ae1954SYishai Hadas MLX5_ST_SZ_BYTES(create_dct_in), out, 3836c5ae1954SYishai Hadas sizeof(out)); 3837776a3906SMoni Shoua if (err) 3838776a3906SMoni Shoua return err; 3839776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3840776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3841776a3906SMoni Shoua if (err) { 3842776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3843776a3906SMoni Shoua return err; 3844776a3906SMoni Shoua } 3845776a3906SMoni Shoua } else { 3846776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3847776a3906SMoni Shoua return -EINVAL; 3848776a3906SMoni Shoua } 3849776a3906SMoni Shoua if (err) 3850776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3851776a3906SMoni Shoua else 3852776a3906SMoni Shoua qp->state = new_state; 3853776a3906SMoni Shoua return err; 3854776a3906SMoni Shoua } 3855776a3906SMoni Shoua 3856e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3857e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3858e126ba97SEli Cohen { 3859e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3860e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 386161147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3862d16e91daSHaggai Eran enum ib_qp_type qp_type; 3863e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 386461147f39SBodong Wang size_t required_cmd_sz; 3865e126ba97SEli Cohen int err = -EINVAL; 3866e126ba97SEli Cohen int port; 3867e126ba97SEli Cohen 386828d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 386928d61370SYishai Hadas return -ENOSYS; 387028d61370SYishai Hadas 387161147f39SBodong Wang if (udata && udata->inlen) { 387261147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 387361147f39SBodong Wang sizeof(ucmd.reserved); 387461147f39SBodong Wang if (udata->inlen < required_cmd_sz) 387561147f39SBodong Wang return -EINVAL; 387661147f39SBodong Wang 387761147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 387861147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 387961147f39SBodong Wang udata->inlen - sizeof(ucmd))) 388061147f39SBodong Wang return -EOPNOTSUPP; 388161147f39SBodong Wang 388261147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 388361147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 388461147f39SBodong Wang return -EFAULT; 388561147f39SBodong Wang 388661147f39SBodong Wang if (ucmd.comp_mask || 388761147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 388861147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 388961147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 389061147f39SBodong Wang return -EOPNOTSUPP; 389161147f39SBodong Wang } 389261147f39SBodong Wang 3893d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3894d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3895d16e91daSHaggai Eran 3896c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3897c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3898c32a4f29SMoni Shoua else 3899d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3900d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3901d16e91daSHaggai Eran 3902776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3903776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3904c32a4f29SMoni Shoua 3905e126ba97SEli Cohen mutex_lock(&qp->mutex); 3906e126ba97SEli Cohen 3907e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3908e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3909e126ba97SEli Cohen 39102811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 39112811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 39122811ba51SAchiad Shochat } 39132811ba51SAchiad Shochat 3914c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3915c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3916c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3917c2e53b2cSYishai Hadas attr_mask); 3918c2e53b2cSYishai Hadas goto out; 3919c2e53b2cSYishai Hadas } 3920c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3921c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3922d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3923d31131bbSKamal Heib attr_mask)) { 3924158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3925158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3926e126ba97SEli Cohen goto out; 3927c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3928c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3929c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3930c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3931c32a4f29SMoni Shoua goto out; 3932158abf86SHaggai Eran } 3933e126ba97SEli Cohen 3934e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3935938fe83cSSaeed Mahameed (attr->port_num == 0 || 3936508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3937158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3938158abf86SHaggai Eran attr->port_num, dev->num_ports); 3939e126ba97SEli Cohen goto out; 3940158abf86SHaggai Eran } 3941e126ba97SEli Cohen 3942e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3943e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3944938fe83cSSaeed Mahameed if (attr->pkey_index >= 3945158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3946158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3947158abf86SHaggai Eran attr->pkey_index); 3948e126ba97SEli Cohen goto out; 3949e126ba97SEli Cohen } 3950158abf86SHaggai Eran } 3951e126ba97SEli Cohen 3952e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3953938fe83cSSaeed Mahameed attr->max_rd_atomic > 3954158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3955158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3956158abf86SHaggai Eran attr->max_rd_atomic); 3957e126ba97SEli Cohen goto out; 3958158abf86SHaggai Eran } 3959e126ba97SEli Cohen 3960e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3961938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3962158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3963158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3964158abf86SHaggai Eran attr->max_dest_rd_atomic); 3965e126ba97SEli Cohen goto out; 3966158abf86SHaggai Eran } 3967e126ba97SEli Cohen 3968e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3969e126ba97SEli Cohen err = 0; 3970e126ba97SEli Cohen goto out; 3971e126ba97SEli Cohen } 3972e126ba97SEli Cohen 397361147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 397489944450SShamir Rabinovitch new_state, &ucmd, udata); 3975e126ba97SEli Cohen 3976e126ba97SEli Cohen out: 3977e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3978e126ba97SEli Cohen return err; 3979e126ba97SEli Cohen } 3980e126ba97SEli Cohen 398134f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 398234f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 398334f4c955SGuy Levi { 398434f4c955SGuy Levi u32 idx; 398534f4c955SGuy Levi 398634f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 398734f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 398834f4c955SGuy Levi 398934f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 399034f4c955SGuy Levi } 399134f4c955SGuy Levi 399234f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 399334f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 399434f4c955SGuy Levi * @sq - SQ buffer. 399534f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 399634f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 399734f4c955SGuy Levi * @cur_edge: Updated current edge. 399834f4c955SGuy Levi */ 399934f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 400034f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 400134f4c955SGuy Levi { 400234f4c955SGuy Levi if (likely(*seg != *cur_edge)) 400334f4c955SGuy Levi return; 400434f4c955SGuy Levi 400534f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 400634f4c955SGuy Levi } 400734f4c955SGuy Levi 400834f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 400934f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 401034f4c955SGuy Levi * @sq - SQ buffer. 401134f4c955SGuy Levi * @cur_edge: Updated current edge. 401234f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 401334f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 401434f4c955SGuy Levi * @src: Pointer to copy from. 401534f4c955SGuy Levi * @n: Number of bytes to copy. 401634f4c955SGuy Levi */ 401734f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 401834f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 401934f4c955SGuy Levi size_t n) 402034f4c955SGuy Levi { 402134f4c955SGuy Levi while (likely(n)) { 402234f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 402334f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 402434f4c955SGuy Levi size_t stride; 402534f4c955SGuy Levi 402634f4c955SGuy Levi memcpy(*seg, src, copysz); 402734f4c955SGuy Levi 402834f4c955SGuy Levi n -= copysz; 402934f4c955SGuy Levi src += copysz; 403034f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 403134f4c955SGuy Levi *seg += stride; 403234f4c955SGuy Levi *wqe_sz += stride >> 4; 403334f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 403434f4c955SGuy Levi } 403534f4c955SGuy Levi } 403634f4c955SGuy Levi 4037e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 4038e126ba97SEli Cohen { 4039e126ba97SEli Cohen struct mlx5_ib_cq *cq; 4040e126ba97SEli Cohen unsigned cur; 4041e126ba97SEli Cohen 4042e126ba97SEli Cohen cur = wq->head - wq->tail; 4043e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 4044e126ba97SEli Cohen return 0; 4045e126ba97SEli Cohen 4046e126ba97SEli Cohen cq = to_mcq(ib_cq); 4047e126ba97SEli Cohen spin_lock(&cq->lock); 4048e126ba97SEli Cohen cur = wq->head - wq->tail; 4049e126ba97SEli Cohen spin_unlock(&cq->lock); 4050e126ba97SEli Cohen 4051e126ba97SEli Cohen return cur + nreq >= wq->max_post; 4052e126ba97SEli Cohen } 4053e126ba97SEli Cohen 4054e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 4055e126ba97SEli Cohen u64 remote_addr, u32 rkey) 4056e126ba97SEli Cohen { 4057e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 4058e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 4059e126ba97SEli Cohen rseg->reserved = 0; 4060e126ba97SEli Cohen } 4061e126ba97SEli Cohen 406234f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 406334f4c955SGuy Levi void **seg, int *size, void **cur_edge) 4064f0313965SErez Shitrit { 406534f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 4066f0313965SErez Shitrit 4067f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 4068f0313965SErez Shitrit 4069f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 4070f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 4071f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 4072f0313965SErez Shitrit 4073f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 4074f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 407534f4c955SGuy Levi size_t left, copysz; 4076f0313965SErez Shitrit void *pdata = ud_wr->header; 407734f4c955SGuy Levi size_t stride; 4078f0313965SErez Shitrit 4079f0313965SErez Shitrit left = ud_wr->hlen; 4080f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 40812b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 4082f0313965SErez Shitrit 408334f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 408434f4c955SGuy Levi * first copy up to the current edge and then, if needed, 408534f4c955SGuy Levi * fall-through to memcpy_send_wqe. 4086f0313965SErez Shitrit */ 408734f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 408834f4c955SGuy Levi left); 408934f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 409034f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 409134f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 409234f4c955SGuy Levi *size += stride / 16; 409334f4c955SGuy Levi *seg += stride; 4094f0313965SErez Shitrit 409534f4c955SGuy Levi if (copysz < left) { 409634f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4097f0313965SErez Shitrit left -= copysz; 4098f0313965SErez Shitrit pdata += copysz; 409934f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 410034f4c955SGuy Levi left); 4101f0313965SErez Shitrit } 4102f0313965SErez Shitrit 410334f4c955SGuy Levi return; 410434f4c955SGuy Levi } 410534f4c955SGuy Levi 410634f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 410734f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 4108f0313965SErez Shitrit } 4109f0313965SErez Shitrit 4110e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 4111f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4112e126ba97SEli Cohen { 4113e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 4114e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 4115e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 4116e126ba97SEli Cohen } 4117e126ba97SEli Cohen 4118e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 4119e126ba97SEli Cohen { 4120e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 4121e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 4122e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 4123e126ba97SEli Cohen } 4124e126ba97SEli Cohen 412531616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 4126e126ba97SEli Cohen { 412731616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 412831616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 4129e126ba97SEli Cohen } 4130e126ba97SEli Cohen 4131e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 4132e126ba97SEli Cohen { 4133e126ba97SEli Cohen u64 result; 4134e126ba97SEli Cohen 4135e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 4136e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 4137e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 4138e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 4139e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 4140e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 4141e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 4142e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 4143e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 4144e126ba97SEli Cohen MLX5_MKEY_MASK_A | 4145e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 4146e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4147e126ba97SEli Cohen 4148e126ba97SEli Cohen return cpu_to_be64(result); 4149e126ba97SEli Cohen } 4150e126ba97SEli Cohen 4151e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 4152e6631814SSagi Grimberg { 4153e6631814SSagi Grimberg u64 result; 4154e6631814SSagi Grimberg 4155e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 4156e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 4157e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 4158d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 4159e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 4160e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 4161e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 4162e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 4163e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 4164e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 4165e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 4166e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 4167e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 4168e6631814SSagi Grimberg 4169e6631814SSagi Grimberg return cpu_to_be64(result); 4170e6631814SSagi Grimberg } 4171e6631814SSagi Grimberg 41728a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 4173064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 41748a187ee5SSagi Grimberg { 417531616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 41768a187ee5SSagi Grimberg 41778a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4178b005d316SSagi Grimberg 41798a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 4180064e5262SIdan Burstein if (umr_inline) 4181064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 418231616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 41838a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 41848a187ee5SSagi Grimberg } 41858a187ee5SSagi Grimberg 4186dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4187e126ba97SEli Cohen { 4188e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4189e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 41902d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4191e126ba97SEli Cohen } 4192e126ba97SEli Cohen 419331616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4194e126ba97SEli Cohen { 4195968e78ddSHaggai Eran u64 result; 4196e126ba97SEli Cohen 419731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4198e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4199968e78ddSHaggai Eran 4200968e78ddSHaggai Eran return cpu_to_be64(result); 4201968e78ddSHaggai Eran } 4202968e78ddSHaggai Eran 420331616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4204968e78ddSHaggai Eran { 4205968e78ddSHaggai Eran u64 result; 4206968e78ddSHaggai Eran 4207968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4208968e78ddSHaggai Eran 4209968e78ddSHaggai Eran return cpu_to_be64(result); 4210968e78ddSHaggai Eran } 4211968e78ddSHaggai Eran 421256e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 421356e11d62SNoa Osherovich { 421456e11d62SNoa Osherovich u64 result; 421556e11d62SNoa Osherovich 421656e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 421756e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 421831616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 421956e11d62SNoa Osherovich 422056e11d62SNoa Osherovich return cpu_to_be64(result); 422156e11d62SNoa Osherovich } 422256e11d62SNoa Osherovich 422331616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 422456e11d62SNoa Osherovich { 422556e11d62SNoa Osherovich u64 result; 422656e11d62SNoa Osherovich 422731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 422831616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 422956e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 423031616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 423131616255SArtemy Kovalyov 423231616255SArtemy Kovalyov if (atomic) 423331616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 423456e11d62SNoa Osherovich 423556e11d62SNoa Osherovich return cpu_to_be64(result); 423656e11d62SNoa Osherovich } 423756e11d62SNoa Osherovich 423856e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 423956e11d62SNoa Osherovich { 424056e11d62SNoa Osherovich u64 result; 424156e11d62SNoa Osherovich 424231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 424356e11d62SNoa Osherovich 424456e11d62SNoa Osherovich return cpu_to_be64(result); 424556e11d62SNoa Osherovich } 424656e11d62SNoa Osherovich 4247c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4248c8d75a98SMajd Dibbiny { 4249c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4250c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4251c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4252c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4253c8d75a98SMajd Dibbiny return -EPERM; 4254c8d75a98SMajd Dibbiny return 0; 4255c8d75a98SMajd Dibbiny } 4256c8d75a98SMajd Dibbiny 4257c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4258c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4259f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4260968e78ddSHaggai Eran { 4261f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4262968e78ddSHaggai Eran 4263968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4264968e78ddSHaggai Eran 4265968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 4266968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 4267968e78ddSHaggai Eran else 4268968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 4269968e78ddSHaggai Eran 427031616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 427131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 427231616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 427331616255SArtemy Kovalyov 427431616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 427531616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4276968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4277968e78ddSHaggai Eran } 427856e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 427956e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 428031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 428131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 428256e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4283e126ba97SEli Cohen } 428431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 428531616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 428631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 428731616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4288e126ba97SEli Cohen 4289e126ba97SEli Cohen if (!wr->num_sge) 4290968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4291c8d75a98SMajd Dibbiny 4292c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4293e126ba97SEli Cohen } 4294e126ba97SEli Cohen 4295e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4296e126ba97SEli Cohen { 4297e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4298e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4299e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4300e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 43012ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4302e126ba97SEli Cohen } 4303e126ba97SEli Cohen 43048a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 43058a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 43068a187ee5SSagi Grimberg u32 key, int access) 43078a187ee5SSagi Grimberg { 43088a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 43098a187ee5SSagi Grimberg 43108a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4311b005d316SSagi Grimberg 4312ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4313b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4314ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4315b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4316b005d316SSagi Grimberg ndescs *= 2; 4317b005d316SSagi Grimberg 4318b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 43198a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 43208a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 43218a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 43228a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 43238a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 43248a187ee5SSagi Grimberg } 43258a187ee5SSagi Grimberg 4326dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4327e126ba97SEli Cohen { 4328e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4329968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4330e126ba97SEli Cohen } 4331e126ba97SEli Cohen 4332f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4333f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4334e126ba97SEli Cohen { 4335f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4336968e78ddSHaggai Eran 4337e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 433831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4339968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4340e126ba97SEli Cohen 4341968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 434256e11d62SNoa Osherovich if (umrwr->pd) 4343968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 434431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 434531616255SArtemy Kovalyov !umrwr->length) 434631616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 434731616255SArtemy Kovalyov 434831616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4349968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4350968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4351746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4352968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4353e126ba97SEli Cohen } 4354e126ba97SEli Cohen 43558a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 43568a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 43578a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 43588a187ee5SSagi Grimberg { 43598a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 43608a187ee5SSagi Grimberg 43618a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 43628a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 43638a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 43648a187ee5SSagi Grimberg } 43658a187ee5SSagi Grimberg 4366f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4367e126ba97SEli Cohen { 4368e126ba97SEli Cohen switch (wr->opcode) { 4369e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4370e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4371e126ba97SEli Cohen return wr->ex.imm_data; 4372e126ba97SEli Cohen 4373e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4374e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4375e126ba97SEli Cohen 4376e126ba97SEli Cohen default: 4377e126ba97SEli Cohen return 0; 4378e126ba97SEli Cohen } 4379e126ba97SEli Cohen } 4380e126ba97SEli Cohen 4381e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4382e126ba97SEli Cohen { 4383e126ba97SEli Cohen u8 *p = wqe; 4384e126ba97SEli Cohen u8 res = 0; 4385e126ba97SEli Cohen int i; 4386e126ba97SEli Cohen 4387e126ba97SEli Cohen for (i = 0; i < size; i++) 4388e126ba97SEli Cohen res ^= p[i]; 4389e126ba97SEli Cohen 4390e126ba97SEli Cohen return ~res; 4391e126ba97SEli Cohen } 4392e126ba97SEli Cohen 4393e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4394e126ba97SEli Cohen { 4395e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4396e126ba97SEli Cohen } 4397e126ba97SEli Cohen 4398f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 439934f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4400e126ba97SEli Cohen { 4401e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 440234f4c955SGuy Levi size_t offset; 4403e126ba97SEli Cohen int inl = 0; 4404e126ba97SEli Cohen int i; 4405e126ba97SEli Cohen 440634f4c955SGuy Levi seg = *wqe; 440734f4c955SGuy Levi *wqe += sizeof(*seg); 440834f4c955SGuy Levi offset = sizeof(*seg); 440934f4c955SGuy Levi 4410e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 441134f4c955SGuy Levi size_t len = wr->sg_list[i].length; 441234f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 441334f4c955SGuy Levi 4414e126ba97SEli Cohen inl += len; 4415e126ba97SEli Cohen 4416e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4417e126ba97SEli Cohen return -ENOMEM; 4418e126ba97SEli Cohen 441934f4c955SGuy Levi while (likely(len)) { 442034f4c955SGuy Levi size_t leftlen; 442134f4c955SGuy Levi size_t copysz; 442234f4c955SGuy Levi 442334f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 442434f4c955SGuy Levi *wqe_sz + (offset >> 4), 442534f4c955SGuy Levi cur_edge); 442634f4c955SGuy Levi 442734f4c955SGuy Levi leftlen = *cur_edge - *wqe; 442834f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 442934f4c955SGuy Levi 443034f4c955SGuy Levi memcpy(*wqe, addr, copysz); 443134f4c955SGuy Levi len -= copysz; 443234f4c955SGuy Levi addr += copysz; 443334f4c955SGuy Levi *wqe += copysz; 443434f4c955SGuy Levi offset += copysz; 4435e126ba97SEli Cohen } 4436e126ba97SEli Cohen } 4437e126ba97SEli Cohen 4438e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4439e126ba97SEli Cohen 444034f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4441e126ba97SEli Cohen 4442e126ba97SEli Cohen return 0; 4443e126ba97SEli Cohen } 4444e126ba97SEli Cohen 4445e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4446e6631814SSagi Grimberg { 4447e6631814SSagi Grimberg switch (type) { 4448e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4449e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4450e6631814SSagi Grimberg default: 4451e6631814SSagi Grimberg return 0; 4452e6631814SSagi Grimberg } 4453e6631814SSagi Grimberg } 4454e6631814SSagi Grimberg 4455e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4456e6631814SSagi Grimberg { 4457e6631814SSagi Grimberg switch (block_size) { 4458e6631814SSagi Grimberg case 512: return 0x1; 4459e6631814SSagi Grimberg case 520: return 0x2; 4460e6631814SSagi Grimberg case 4096: return 0x3; 4461e6631814SSagi Grimberg case 4160: return 0x4; 4462e6631814SSagi Grimberg case 1073741824: return 0x5; 4463e6631814SSagi Grimberg default: return 0; 4464e6631814SSagi Grimberg } 4465e6631814SSagi Grimberg } 4466e6631814SSagi Grimberg 446778eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4468142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4469e6631814SSagi Grimberg { 4470142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4471142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4472142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4473142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4474142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4475142537f4SSagi Grimberg /* repeating block */ 4476142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4477142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4478142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4479e6631814SSagi Grimberg 448078eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 448178eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4482e6631814SSagi Grimberg 448378eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 448478eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 448578eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 448678eda2bbSSagi Grimberg else 448778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4488e6631814SSagi Grimberg } 4489e6631814SSagi Grimberg 449078eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 449178eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4492e6631814SSagi Grimberg } 4493e6631814SSagi Grimberg 4494e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4495e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4496e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4497e6631814SSagi Grimberg { 4498e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4499e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4500e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4501e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4502e6631814SSagi Grimberg 4503c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4504e6631814SSagi Grimberg 4505142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4506142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4507e6631814SSagi Grimberg /* Input domain check byte mask */ 4508e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 450978eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 451078eda2bbSSagi Grimberg 451178eda2bbSSagi Grimberg /* Memory domain */ 451278eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 451378eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 451478eda2bbSSagi Grimberg break; 451578eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 451678eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 451778eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 451878eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 451978eda2bbSSagi Grimberg break; 452078eda2bbSSagi Grimberg default: 452178eda2bbSSagi Grimberg return -EINVAL; 452278eda2bbSSagi Grimberg } 452378eda2bbSSagi Grimberg 452478eda2bbSSagi Grimberg /* Wire domain */ 452578eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 452678eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 452778eda2bbSSagi Grimberg break; 452878eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4529e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 453078eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4531e6631814SSagi Grimberg /* Same block structure */ 4532142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4533e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4534fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4535c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4536fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4537c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4538fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4539e6631814SSagi Grimberg } else 4540e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4541e6631814SSagi Grimberg 4542142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 454378eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4544e6631814SSagi Grimberg break; 4545e6631814SSagi Grimberg default: 4546e6631814SSagi Grimberg return -EINVAL; 4547e6631814SSagi Grimberg } 4548e6631814SSagi Grimberg 4549e6631814SSagi Grimberg return 0; 4550e6631814SSagi Grimberg } 4551e6631814SSagi Grimberg 4552f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 455334f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, 455434f4c955SGuy Levi int *size, void **cur_edge) 4555e6631814SSagi Grimberg { 4556e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4557e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4558e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4559e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4560e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4561e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4562e6631814SSagi Grimberg int ret; 4563e6631814SSagi Grimberg int wqe_size; 4564e6631814SSagi Grimberg 4565e622f2f4SChristoph Hellwig if (!wr->prot || 4566e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4567e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4568e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4569e6631814SSagi Grimberg /** 4570e6631814SSagi Grimberg * Source domain doesn't contain signature information 45715c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4572e6631814SSagi Grimberg * So need construct: 4573e6631814SSagi Grimberg * ------------------ 4574e6631814SSagi Grimberg * | data_klm | 4575e6631814SSagi Grimberg * ------------------ 4576e6631814SSagi Grimberg * | BSF | 4577e6631814SSagi Grimberg * ------------------ 4578e6631814SSagi Grimberg **/ 4579e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4580e6631814SSagi Grimberg 4581e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4582e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4583e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4584e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4585e6631814SSagi Grimberg } else { 4586e6631814SSagi Grimberg /** 4587e6631814SSagi Grimberg * Source domain contains signature information 4588e6631814SSagi Grimberg * So need construct a strided block format: 4589e6631814SSagi Grimberg * --------------------------- 4590e6631814SSagi Grimberg * | stride_block_ctrl | 4591e6631814SSagi Grimberg * --------------------------- 4592e6631814SSagi Grimberg * | data_klm | 4593e6631814SSagi Grimberg * --------------------------- 4594e6631814SSagi Grimberg * | prot_klm | 4595e6631814SSagi Grimberg * --------------------------- 4596e6631814SSagi Grimberg * | BSF | 4597e6631814SSagi Grimberg * --------------------------- 4598e6631814SSagi Grimberg **/ 4599e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4600e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4601e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4602e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4603e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4604e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4605e6631814SSagi Grimberg int prot_size; 4606e6631814SSagi Grimberg 4607e6631814SSagi Grimberg sblock_ctrl = *seg; 4608e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4609e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4610e6631814SSagi Grimberg 4611e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4612e6631814SSagi Grimberg if (!prot_size) { 4613e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4614e6631814SSagi Grimberg return -EINVAL; 4615e6631814SSagi Grimberg } 4616e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4617e6631814SSagi Grimberg prot_size); 4618e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4619e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4620e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4621e6631814SSagi Grimberg 4622e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4623e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4624e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 46255c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 46265c273b16SSagi Grimberg 4627e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4628e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4629e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4630e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 46315c273b16SSagi Grimberg 4632e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4633e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4634e6631814SSagi Grimberg } 4635e6631814SSagi Grimberg 4636e6631814SSagi Grimberg *seg += wqe_size; 4637e6631814SSagi Grimberg *size += wqe_size / 16; 463834f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4639e6631814SSagi Grimberg 4640e6631814SSagi Grimberg bsf = *seg; 4641e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4642e6631814SSagi Grimberg if (ret) 4643e6631814SSagi Grimberg return -EINVAL; 4644e6631814SSagi Grimberg 4645e6631814SSagi Grimberg *seg += sizeof(*bsf); 4646e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 464734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4648e6631814SSagi Grimberg 4649e6631814SSagi Grimberg return 0; 4650e6631814SSagi Grimberg } 4651e6631814SSagi Grimberg 4652e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4653f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4654e6631814SSagi Grimberg u32 length, u32 pdn) 4655e6631814SSagi Grimberg { 4656e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4657e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4658d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4659e6631814SSagi Grimberg 4660e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4661e6631814SSagi Grimberg 4662e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4663ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4664e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4665d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4666e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4667e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 466831616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4669e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4670e6631814SSagi Grimberg } 4671e6631814SSagi Grimberg 4672e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 467331616255SArtemy Kovalyov u32 size) 4674e6631814SSagi Grimberg { 4675e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4676e6631814SSagi Grimberg 4677e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 467831616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4679e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4680e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4681e6631814SSagi Grimberg } 4682e6631814SSagi Grimberg 4683e6631814SSagi Grimberg 4684f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 468534f4c955SGuy Levi struct mlx5_ib_qp *qp, void **seg, int *size, 468634f4c955SGuy Levi void **cur_edge) 4687e6631814SSagi Grimberg { 4688f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4689e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4690e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 469131616255SArtemy Kovalyov u32 xlt_size; 4692e6631814SSagi Grimberg int region_len, ret; 4693e6631814SSagi Grimberg 4694e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4695e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4696d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4697d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4698e6631814SSagi Grimberg return -EINVAL; 4699e6631814SSagi Grimberg 4700e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4701e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4702e622f2f4SChristoph Hellwig if (wr->prot && 4703e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4704e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4705e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4706e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4707e6631814SSagi Grimberg 4708e6631814SSagi Grimberg /** 4709e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4710e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4711e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4712e6631814SSagi Grimberg **/ 471331616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4714e6631814SSagi Grimberg 471531616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4716e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4717e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 471834f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4719e6631814SSagi Grimberg 472031616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4721e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4722e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 472334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4724e6631814SSagi Grimberg 472534f4c955SGuy Levi ret = set_sig_data_segment(wr, qp, seg, size, cur_edge); 4726e6631814SSagi Grimberg if (ret) 4727e6631814SSagi Grimberg return ret; 4728e6631814SSagi Grimberg 4729d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4730e6631814SSagi Grimberg return 0; 4731e6631814SSagi Grimberg } 4732e6631814SSagi Grimberg 4733e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4734e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4735e6631814SSagi Grimberg { 4736e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4737e6631814SSagi Grimberg 4738e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4739e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4740e6631814SSagi Grimberg switch (domain->sig_type) { 474178eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 474278eda2bbSSagi Grimberg break; 4743e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4744e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4745e6631814SSagi Grimberg domain->sig.dif.app_tag); 4746e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4747e6631814SSagi Grimberg break; 4748e6631814SSagi Grimberg default: 474912bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 475012bbf1eaSLeon Romanovsky domain->sig_type); 475112bbf1eaSLeon Romanovsky return -EINVAL; 4752e6631814SSagi Grimberg } 4753e6631814SSagi Grimberg 475478eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 475578eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 475678eda2bbSSagi Grimberg 4757e6631814SSagi Grimberg return 0; 4758e6631814SSagi Grimberg } 4759e6631814SSagi Grimberg 47608a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4761f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 476234f4c955SGuy Levi void **seg, int *size, void **cur_edge) 47638a187ee5SSagi Grimberg { 47648a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 47658a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 476634f4c955SGuy Levi size_t mr_list_size = mr->ndescs * mr->desc_size; 4767064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 47688a187ee5SSagi Grimberg 47698a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 47708a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 47718a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 47728a187ee5SSagi Grimberg return -EINVAL; 47738a187ee5SSagi Grimberg } 47748a187ee5SSagi Grimberg 4775064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 47768a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 47778a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 477834f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47798a187ee5SSagi Grimberg 47808a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 47818a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 47828a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 478334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47848a187ee5SSagi Grimberg 4785064e5262SIdan Burstein if (umr_inline) { 478634f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 478734f4c955SGuy Levi mr_list_size); 478834f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 4789064e5262SIdan Burstein } else { 47908a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 47918a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 47928a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4793064e5262SIdan Burstein } 47948a187ee5SSagi Grimberg return 0; 47958a187ee5SSagi Grimberg } 47968a187ee5SSagi Grimberg 479734f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 479834f4c955SGuy Levi void **cur_edge) 4799e126ba97SEli Cohen { 4800dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4801e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4802e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 480334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4804dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4805e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4806e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 480734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4808e126ba97SEli Cohen } 4809e126ba97SEli Cohen 481034f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 4811e126ba97SEli Cohen { 4812e126ba97SEli Cohen __be32 *p = NULL; 4813e126ba97SEli Cohen int i, j; 4814e126ba97SEli Cohen 481534f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 4816e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4817e126ba97SEli Cohen if ((i & 0xf) == 0) { 48181e5887b7SArtemy Kovalyov p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx); 481934f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 4820e126ba97SEli Cohen j = 0; 48211e5887b7SArtemy Kovalyov idx = (idx + 1) & (qp->sq.wqe_cnt - 1); 4822e126ba97SEli Cohen } 4823e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4824e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4825e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4826e126ba97SEli Cohen } 4827e126ba97SEli Cohen } 4828e126ba97SEli Cohen 48297bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 48306e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 483134f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 483234f4c955SGuy Levi int *size, void **cur_edge, int nreq, 483334f4c955SGuy Levi bool send_signaled, bool solicited) 48346e5eadacSSagi Grimberg { 4835b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4836b2a232d2SLeon Romanovsky return -ENOMEM; 48376e5eadacSSagi Grimberg 48386e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 483934f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 48406e5eadacSSagi Grimberg *ctrl = *seg; 48416e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 48426e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 48436e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 48447bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 48457bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 48466e5eadacSSagi Grimberg 48476e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 48486e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 484934f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 48506e5eadacSSagi Grimberg 4851b2a232d2SLeon Romanovsky return 0; 48526e5eadacSSagi Grimberg } 48536e5eadacSSagi Grimberg 48547bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 48557bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 48567bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 485734f4c955SGuy Levi int *size, void **cur_edge, int nreq) 48587bb1fafcSBart Van Assche { 485934f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 48607bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 48617bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 48627bb1fafcSBart Van Assche } 48637bb1fafcSBart Van Assche 48646e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 48656e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 486634f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 486734f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 486834f4c955SGuy Levi u32 mlx5_opcode) 48696e5eadacSSagi Grimberg { 48706e5eadacSSagi Grimberg u8 opmod = 0; 48716e5eadacSSagi Grimberg 48726e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 48736e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 487419098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 48756e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 48766e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 48776e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 48786e5eadacSSagi Grimberg 48796e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 48806e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 48816e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 48826e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 48836e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 488434f4c955SGuy Levi 488534f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 488634f4c955SGuy Levi * construction, into SQ's cache. 488734f4c955SGuy Levi */ 488834f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 488934f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 489034f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 489134f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 489234f4c955SGuy Levi cur_edge; 48936e5eadacSSagi Grimberg } 48946e5eadacSSagi Grimberg 4895d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4896d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4897e126ba97SEli Cohen { 4898e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4899e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 490089ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4901d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4902e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4903e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4904d16e91daSHaggai Eran struct mlx5_bf *bf; 490534f4c955SGuy Levi void *cur_edge; 4906e126ba97SEli Cohen int uninitialized_var(size); 4907e126ba97SEli Cohen unsigned long flags; 4908e126ba97SEli Cohen unsigned idx; 4909e126ba97SEli Cohen int err = 0; 4910e126ba97SEli Cohen int num_sge; 4911e126ba97SEli Cohen void *seg; 4912e126ba97SEli Cohen int nreq; 4913e126ba97SEli Cohen int i; 4914e126ba97SEli Cohen u8 next_fence = 0; 4915e126ba97SEli Cohen u8 fence; 4916e126ba97SEli Cohen 49176c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 49186c75520fSParav Pandit !drain)) { 49196c75520fSParav Pandit *bad_wr = wr; 49206c75520fSParav Pandit return -EIO; 49216c75520fSParav Pandit } 49226c75520fSParav Pandit 4923d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4924d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4925d16e91daSHaggai Eran 4926d16e91daSHaggai Eran qp = to_mqp(ibqp); 49275fe9dec0SEli Cohen bf = &qp->bf; 4928d16e91daSHaggai Eran 4929e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4930e126ba97SEli Cohen 4931e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4932a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4933e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4934e126ba97SEli Cohen err = -EINVAL; 4935e126ba97SEli Cohen *bad_wr = wr; 4936e126ba97SEli Cohen goto out; 4937e126ba97SEli Cohen } 4938e126ba97SEli Cohen 4939e126ba97SEli Cohen num_sge = wr->num_sge; 4940e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4941e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 494224be409bSChuck Lever err = -EINVAL; 4943e126ba97SEli Cohen *bad_wr = wr; 4944e126ba97SEli Cohen goto out; 4945e126ba97SEli Cohen } 4946e126ba97SEli Cohen 494734f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 494834f4c955SGuy Levi nreq); 49496e5eadacSSagi Grimberg if (err) { 49506e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 49516e5eadacSSagi Grimberg err = -ENOMEM; 49526e5eadacSSagi Grimberg *bad_wr = wr; 49536e5eadacSSagi Grimberg goto out; 49546e5eadacSSagi Grimberg } 4955e126ba97SEli Cohen 4956074fca3aSMajd Dibbiny if (wr->opcode == IB_WR_REG_MR) { 49576e8484c5SMax Gurtovoy fence = dev->umr_fence; 49586e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4959074fca3aSMajd Dibbiny } else { 4960074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 49616e8484c5SMax Gurtovoy if (qp->next_fence) 49626e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 49636e8484c5SMax Gurtovoy else 49646e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 49656e8484c5SMax Gurtovoy } else { 49666e8484c5SMax Gurtovoy fence = qp->next_fence; 49676e8484c5SMax Gurtovoy } 4968074fca3aSMajd Dibbiny } 49696e8484c5SMax Gurtovoy 4970e126ba97SEli Cohen switch (ibqp->qp_type) { 4971e126ba97SEli Cohen case IB_QPT_XRC_INI: 4972e126ba97SEli Cohen xrc = seg; 4973e126ba97SEli Cohen seg += sizeof(*xrc); 4974e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4975e126ba97SEli Cohen /* fall through */ 4976e126ba97SEli Cohen case IB_QPT_RC: 4977e126ba97SEli Cohen switch (wr->opcode) { 4978e126ba97SEli Cohen case IB_WR_RDMA_READ: 4979e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4980e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4981e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4982e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4983e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4984e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4985e126ba97SEli Cohen break; 4986e126ba97SEli Cohen 4987e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4988e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4989e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 499081bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 499181bea28fSEli Cohen err = -ENOSYS; 499281bea28fSEli Cohen *bad_wr = wr; 499381bea28fSEli Cohen goto out; 4994e126ba97SEli Cohen 4995e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4996e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4997e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 499834f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 4999e126ba97SEli Cohen num_sge = 0; 5000e126ba97SEli Cohen break; 5001e126ba97SEli Cohen 50028a187ee5SSagi Grimberg case IB_WR_REG_MR: 50038a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 50048a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 500534f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 500634f4c955SGuy Levi &cur_edge); 50078a187ee5SSagi Grimberg if (err) { 50088a187ee5SSagi Grimberg *bad_wr = wr; 50098a187ee5SSagi Grimberg goto out; 50108a187ee5SSagi Grimberg } 50118a187ee5SSagi Grimberg num_sge = 0; 50128a187ee5SSagi Grimberg break; 50138a187ee5SSagi Grimberg 5014e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 5015e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 5016e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 5017e6631814SSagi Grimberg 5018e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 501934f4c955SGuy Levi err = set_sig_umr_wr(wr, qp, &seg, &size, 502034f4c955SGuy Levi &cur_edge); 5021e6631814SSagi Grimberg if (err) { 5022e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 5023e6631814SSagi Grimberg *bad_wr = wr; 5024e6631814SSagi Grimberg goto out; 5025e6631814SSagi Grimberg } 5026e6631814SSagi Grimberg 502734f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 502834f4c955SGuy Levi wr->wr_id, nreq, fence, 502934f4c955SGuy Levi MLX5_OPCODE_UMR); 5030e6631814SSagi Grimberg /* 5031e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 5032e6631814SSagi Grimberg * on error 5033e6631814SSagi Grimberg */ 50347bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 503534f4c955SGuy Levi &size, &cur_edge, nreq, false, 503634f4c955SGuy Levi true); 5037e6631814SSagi Grimberg if (err) { 5038e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 5039e6631814SSagi Grimberg err = -ENOMEM; 5040e6631814SSagi Grimberg *bad_wr = wr; 5041e6631814SSagi Grimberg goto out; 5042e6631814SSagi Grimberg } 5043e6631814SSagi Grimberg 5044e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 5045e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 5046e6631814SSagi Grimberg &size); 5047e6631814SSagi Grimberg if (err) { 5048e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 5049e6631814SSagi Grimberg *bad_wr = wr; 5050e6631814SSagi Grimberg goto out; 5051e6631814SSagi Grimberg } 5052e6631814SSagi Grimberg 505334f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 505434f4c955SGuy Levi wr->wr_id, nreq, fence, 505534f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 50567bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 505734f4c955SGuy Levi &size, &cur_edge, nreq, false, 505834f4c955SGuy Levi true); 5059e6631814SSagi Grimberg if (err) { 5060e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 5061e6631814SSagi Grimberg err = -ENOMEM; 5062e6631814SSagi Grimberg *bad_wr = wr; 5063e6631814SSagi Grimberg goto out; 5064e6631814SSagi Grimberg } 5065e6631814SSagi Grimberg 5066e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 5067e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 5068e6631814SSagi Grimberg &size); 5069e6631814SSagi Grimberg if (err) { 5070e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 5071e6631814SSagi Grimberg *bad_wr = wr; 5072e6631814SSagi Grimberg goto out; 5073e6631814SSagi Grimberg } 5074e6631814SSagi Grimberg 507534f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 507634f4c955SGuy Levi wr->wr_id, nreq, fence, 507734f4c955SGuy Levi MLX5_OPCODE_SET_PSV); 50786e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 5079e6631814SSagi Grimberg num_sge = 0; 5080e6631814SSagi Grimberg goto skip_psv; 5081e6631814SSagi Grimberg 5082e126ba97SEli Cohen default: 5083e126ba97SEli Cohen break; 5084e126ba97SEli Cohen } 5085e126ba97SEli Cohen break; 5086e126ba97SEli Cohen 5087e126ba97SEli Cohen case IB_QPT_UC: 5088e126ba97SEli Cohen switch (wr->opcode) { 5089e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5090e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5091e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5092e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5093e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5094e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5095e126ba97SEli Cohen break; 5096e126ba97SEli Cohen 5097e126ba97SEli Cohen default: 5098e126ba97SEli Cohen break; 5099e126ba97SEli Cohen } 5100e126ba97SEli Cohen break; 5101e126ba97SEli Cohen 5102e126ba97SEli Cohen case IB_QPT_SMI: 51031e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 51041e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 51051e0e50b6SMaor Gottlieb err = -EPERM; 51061e0e50b6SMaor Gottlieb *bad_wr = wr; 51071e0e50b6SMaor Gottlieb goto out; 51081e0e50b6SMaor Gottlieb } 5109f6b1ee34SBart Van Assche /* fall through */ 5110d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 5111e126ba97SEli Cohen set_datagram_seg(seg, wr); 5112e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 5113e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 511434f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 511534f4c955SGuy Levi 5116e126ba97SEli Cohen break; 5117f0313965SErez Shitrit case IB_QPT_UD: 5118f0313965SErez Shitrit set_datagram_seg(seg, wr); 5119f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 5120f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 512134f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5122f0313965SErez Shitrit 5123f0313965SErez Shitrit /* handle qp that supports ud offload */ 5124f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 5125f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 5126f0313965SErez Shitrit 5127f0313965SErez Shitrit pad = seg; 5128f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 5129f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 5130f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 513134f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 513234f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 513334f4c955SGuy Levi &cur_edge); 5134f0313965SErez Shitrit } 5135f0313965SErez Shitrit break; 5136e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 5137e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 5138e126ba97SEli Cohen err = -EINVAL; 5139e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 5140e126ba97SEli Cohen goto out; 5141e126ba97SEli Cohen } 5142e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 5143e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 5144c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 5145c8d75a98SMajd Dibbiny if (unlikely(err)) 5146c8d75a98SMajd Dibbiny goto out; 5147e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5148e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 514934f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5150e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 5151e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 5152e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 515334f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5154e126ba97SEli Cohen break; 5155e126ba97SEli Cohen 5156e126ba97SEli Cohen default: 5157e126ba97SEli Cohen break; 5158e126ba97SEli Cohen } 5159e126ba97SEli Cohen 5160e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 516134f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 5162e126ba97SEli Cohen if (unlikely(err)) { 5163e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5164e126ba97SEli Cohen *bad_wr = wr; 5165e126ba97SEli Cohen goto out; 5166e126ba97SEli Cohen } 5167e126ba97SEli Cohen } else { 5168e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 516934f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 517034f4c955SGuy Levi &cur_edge); 5171e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 517234f4c955SGuy Levi set_data_ptr_seg 517334f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 517434f4c955SGuy Levi wr->sg_list + i); 5175e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 517634f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 5177e126ba97SEli Cohen } 5178e126ba97SEli Cohen } 5179e126ba97SEli Cohen } 5180e126ba97SEli Cohen 51816e8484c5SMax Gurtovoy qp->next_fence = next_fence; 518234f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 518334f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 5184e6631814SSagi Grimberg skip_psv: 5185e126ba97SEli Cohen if (0) 5186e126ba97SEli Cohen dump_wqe(qp, idx, size); 5187e126ba97SEli Cohen } 5188e126ba97SEli Cohen 5189e126ba97SEli Cohen out: 5190e126ba97SEli Cohen if (likely(nreq)) { 5191e126ba97SEli Cohen qp->sq.head += nreq; 5192e126ba97SEli Cohen 5193e126ba97SEli Cohen /* Make sure that descriptors are written before 5194e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5195e126ba97SEli Cohen */ 5196e126ba97SEli Cohen wmb(); 5197e126ba97SEli Cohen 5198e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5199e126ba97SEli Cohen 5200ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5201ada388f7SEli Cohen * we hit doorbell */ 5202ada388f7SEli Cohen wmb(); 5203ada388f7SEli Cohen 52045fe9dec0SEli Cohen /* currently we support only regular doorbells */ 5205bbf29f61SMaxim Mikityanskiy mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset); 5206e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5207e126ba97SEli Cohen * and reach the HCA out of order. 5208e126ba97SEli Cohen */ 5209e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5210e126ba97SEli Cohen } 5211e126ba97SEli Cohen 5212e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5213e126ba97SEli Cohen 5214e126ba97SEli Cohen return err; 5215e126ba97SEli Cohen } 5216e126ba97SEli Cohen 5217d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5218d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5219d0e84c0aSYishai Hadas { 5220d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5221d0e84c0aSYishai Hadas } 5222d0e84c0aSYishai Hadas 5223e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5224e126ba97SEli Cohen { 5225e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5226e126ba97SEli Cohen } 5227e126ba97SEli Cohen 5228d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5229d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5230e126ba97SEli Cohen { 5231e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5232e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5233e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 523489ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 523589ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5236e126ba97SEli Cohen unsigned long flags; 5237e126ba97SEli Cohen int err = 0; 5238e126ba97SEli Cohen int nreq; 5239e126ba97SEli Cohen int ind; 5240e126ba97SEli Cohen int i; 5241e126ba97SEli Cohen 52426c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 52436c75520fSParav Pandit !drain)) { 52446c75520fSParav Pandit *bad_wr = wr; 52456c75520fSParav Pandit return -EIO; 52466c75520fSParav Pandit } 52476c75520fSParav Pandit 5248d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5249d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5250d16e91daSHaggai Eran 5251e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5252e126ba97SEli Cohen 5253e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5254e126ba97SEli Cohen 5255e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5256e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5257e126ba97SEli Cohen err = -ENOMEM; 5258e126ba97SEli Cohen *bad_wr = wr; 5259e126ba97SEli Cohen goto out; 5260e126ba97SEli Cohen } 5261e126ba97SEli Cohen 5262e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5263e126ba97SEli Cohen err = -EINVAL; 5264e126ba97SEli Cohen *bad_wr = wr; 5265e126ba97SEli Cohen goto out; 5266e126ba97SEli Cohen } 5267e126ba97SEli Cohen 526834f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5269e126ba97SEli Cohen if (qp->wq_sig) 5270e126ba97SEli Cohen scat++; 5271e126ba97SEli Cohen 5272e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5273e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5274e126ba97SEli Cohen 5275e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5276e126ba97SEli Cohen scat[i].byte_count = 0; 5277e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5278e126ba97SEli Cohen scat[i].addr = 0; 5279e126ba97SEli Cohen } 5280e126ba97SEli Cohen 5281e126ba97SEli Cohen if (qp->wq_sig) { 5282e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5283e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5284e126ba97SEli Cohen } 5285e126ba97SEli Cohen 5286e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5287e126ba97SEli Cohen 5288e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5289e126ba97SEli Cohen } 5290e126ba97SEli Cohen 5291e126ba97SEli Cohen out: 5292e126ba97SEli Cohen if (likely(nreq)) { 5293e126ba97SEli Cohen qp->rq.head += nreq; 5294e126ba97SEli Cohen 5295e126ba97SEli Cohen /* Make sure that descriptors are written before 5296e126ba97SEli Cohen * doorbell record. 5297e126ba97SEli Cohen */ 5298e126ba97SEli Cohen wmb(); 5299e126ba97SEli Cohen 5300e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5301e126ba97SEli Cohen } 5302e126ba97SEli Cohen 5303e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5304e126ba97SEli Cohen 5305e126ba97SEli Cohen return err; 5306e126ba97SEli Cohen } 5307e126ba97SEli Cohen 5308d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5309d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5310d0e84c0aSYishai Hadas { 5311d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5312d0e84c0aSYishai Hadas } 5313d0e84c0aSYishai Hadas 5314e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5315e126ba97SEli Cohen { 5316e126ba97SEli Cohen switch (mlx5_state) { 5317e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5318e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5319e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5320e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5321e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5322e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5323e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5324e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5325e126ba97SEli Cohen default: return -1; 5326e126ba97SEli Cohen } 5327e126ba97SEli Cohen } 5328e126ba97SEli Cohen 5329e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5330e126ba97SEli Cohen { 5331e126ba97SEli Cohen switch (mlx5_mig_state) { 5332e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5333e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5334e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5335e126ba97SEli Cohen default: return -1; 5336e126ba97SEli Cohen } 5337e126ba97SEli Cohen } 5338e126ba97SEli Cohen 5339e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5340e126ba97SEli Cohen { 5341e126ba97SEli Cohen int ib_flags = 0; 5342e126ba97SEli Cohen 5343e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5344e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5345e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5346e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5347e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5348e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5349e126ba97SEli Cohen 5350e126ba97SEli Cohen return ib_flags; 5351e126ba97SEli Cohen } 5352e126ba97SEli Cohen 535338349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5354d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5355e126ba97SEli Cohen struct mlx5_qp_path *path) 5356e126ba97SEli Cohen { 5357e126ba97SEli Cohen 5358d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5359e126ba97SEli Cohen 5360e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5361e126ba97SEli Cohen return; 5362e126ba97SEli Cohen 5363ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5364ae59c3f0SLeon Romanovsky 5365d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5366d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5367e126ba97SEli Cohen 5368d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5369d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5370d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5371d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5372d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5373d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5374d8966fcdSDasaratharaman Chandramouli 5375d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5376d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5377d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5378d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5379d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5380d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5381e126ba97SEli Cohen } 5382e126ba97SEli Cohen } 5383e126ba97SEli Cohen 53846d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 53856d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 53866d2f89dfSmajd@mellanox.com u8 *sq_state) 5387e126ba97SEli Cohen { 53886d2f89dfSmajd@mellanox.com int err; 53896d2f89dfSmajd@mellanox.com 539028160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 53916d2f89dfSmajd@mellanox.com if (err) 53926d2f89dfSmajd@mellanox.com goto out; 53936d2f89dfSmajd@mellanox.com sq->state = *sq_state; 53946d2f89dfSmajd@mellanox.com 53956d2f89dfSmajd@mellanox.com out: 53966d2f89dfSmajd@mellanox.com return err; 53976d2f89dfSmajd@mellanox.com } 53986d2f89dfSmajd@mellanox.com 53996d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 54006d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 54016d2f89dfSmajd@mellanox.com u8 *rq_state) 54026d2f89dfSmajd@mellanox.com { 54036d2f89dfSmajd@mellanox.com void *out; 54046d2f89dfSmajd@mellanox.com void *rqc; 54056d2f89dfSmajd@mellanox.com int inlen; 54066d2f89dfSmajd@mellanox.com int err; 54076d2f89dfSmajd@mellanox.com 54086d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 54091b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 54106d2f89dfSmajd@mellanox.com if (!out) 54116d2f89dfSmajd@mellanox.com return -ENOMEM; 54126d2f89dfSmajd@mellanox.com 54136d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 54146d2f89dfSmajd@mellanox.com if (err) 54156d2f89dfSmajd@mellanox.com goto out; 54166d2f89dfSmajd@mellanox.com 54176d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 54186d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 54196d2f89dfSmajd@mellanox.com rq->state = *rq_state; 54206d2f89dfSmajd@mellanox.com 54216d2f89dfSmajd@mellanox.com out: 54226d2f89dfSmajd@mellanox.com kvfree(out); 54236d2f89dfSmajd@mellanox.com return err; 54246d2f89dfSmajd@mellanox.com } 54256d2f89dfSmajd@mellanox.com 54266d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 54276d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 54286d2f89dfSmajd@mellanox.com { 54296d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 54306d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 54316d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 54326d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 54336d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 54346d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 54356d2f89dfSmajd@mellanox.com }, 54366d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 54376d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 54386d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 54396d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 54406d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 54416d2f89dfSmajd@mellanox.com }, 54426d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 54436d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 54446d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 54456d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 54466d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 54476d2f89dfSmajd@mellanox.com }, 54486d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 54496d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 54506d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 54516d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 54526d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 54536d2f89dfSmajd@mellanox.com }, 54546d2f89dfSmajd@mellanox.com }; 54556d2f89dfSmajd@mellanox.com 54566d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 54576d2f89dfSmajd@mellanox.com 54586d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 54596d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 54606d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 54616d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 54626d2f89dfSmajd@mellanox.com return -EINVAL; 54636d2f89dfSmajd@mellanox.com } 54646d2f89dfSmajd@mellanox.com 54656d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 54666d2f89dfSmajd@mellanox.com *qp_state = qp->state; 54676d2f89dfSmajd@mellanox.com 54686d2f89dfSmajd@mellanox.com return 0; 54696d2f89dfSmajd@mellanox.com } 54706d2f89dfSmajd@mellanox.com 54716d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 54726d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 54736d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 54746d2f89dfSmajd@mellanox.com { 54756d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 54766d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 54776d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 54786d2f89dfSmajd@mellanox.com int err; 54796d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 54806d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 54816d2f89dfSmajd@mellanox.com 54826d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 54836d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 54846d2f89dfSmajd@mellanox.com if (err) 54856d2f89dfSmajd@mellanox.com return err; 54866d2f89dfSmajd@mellanox.com } 54876d2f89dfSmajd@mellanox.com 54886d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 54896d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 54906d2f89dfSmajd@mellanox.com if (err) 54916d2f89dfSmajd@mellanox.com return err; 54926d2f89dfSmajd@mellanox.com } 54936d2f89dfSmajd@mellanox.com 54946d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 54956d2f89dfSmajd@mellanox.com raw_packet_qp_state); 54966d2f89dfSmajd@mellanox.com } 54976d2f89dfSmajd@mellanox.com 54986d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 54996d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 55006d2f89dfSmajd@mellanox.com { 550109a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5502e126ba97SEli Cohen struct mlx5_qp_context *context; 5503e126ba97SEli Cohen int mlx5_state; 550409a7d9ecSSaeed Mahameed u32 *outb; 5505e126ba97SEli Cohen int err = 0; 5506e126ba97SEli Cohen 550709a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 55086d2f89dfSmajd@mellanox.com if (!outb) 55096d2f89dfSmajd@mellanox.com return -ENOMEM; 55106d2f89dfSmajd@mellanox.com 551119098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 551209a7d9ecSSaeed Mahameed outlen); 5513e126ba97SEli Cohen if (err) 55146d2f89dfSmajd@mellanox.com goto out; 5515e126ba97SEli Cohen 551609a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 551709a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 551809a7d9ecSSaeed Mahameed 5519e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5520e126ba97SEli Cohen 5521e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5522e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5523e126ba97SEli Cohen qp_attr->path_mig_state = 5524e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5525e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5526e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5527e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5528e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5529e126ba97SEli Cohen qp_attr->qp_access_flags = 5530e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5531e126ba97SEli Cohen 5532e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 553338349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 553438349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5535d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5536d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5537d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5538d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5539e126ba97SEli Cohen } 5540e126ba97SEli Cohen 5541d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5542e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5543e126ba97SEli Cohen 5544e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5545e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5546e126ba97SEli Cohen 5547e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5548e126ba97SEli Cohen 5549e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5550e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5551e126ba97SEli Cohen qp_attr->min_rnr_timer = 5552e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5553e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5554e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5555e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5556e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 55576d2f89dfSmajd@mellanox.com 55586d2f89dfSmajd@mellanox.com out: 55596d2f89dfSmajd@mellanox.com kfree(outb); 55606d2f89dfSmajd@mellanox.com return err; 55616d2f89dfSmajd@mellanox.com } 55626d2f89dfSmajd@mellanox.com 5563776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5564776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5565776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5566776a3906SMoni Shoua { 5567776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5568776a3906SMoni Shoua u32 *out; 5569776a3906SMoni Shoua u32 access_flags = 0; 5570776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5571776a3906SMoni Shoua void *dctc; 5572776a3906SMoni Shoua int err; 5573776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5574776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5575776a3906SMoni Shoua IB_QP_PORT | 5576776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5577776a3906SMoni Shoua IB_QP_AV | 5578776a3906SMoni Shoua IB_QP_PATH_MTU | 5579776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5580776a3906SMoni Shoua 5581776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5582776a3906SMoni Shoua return -EINVAL; 5583776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5584776a3906SMoni Shoua return -EINVAL; 5585776a3906SMoni Shoua 5586776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5587776a3906SMoni Shoua if (!out) 5588776a3906SMoni Shoua return -ENOMEM; 5589776a3906SMoni Shoua 5590776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5591776a3906SMoni Shoua if (err) 5592776a3906SMoni Shoua goto out; 5593776a3906SMoni Shoua 5594776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5595776a3906SMoni Shoua 5596776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5597776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5598776a3906SMoni Shoua 5599776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5600776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5601776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5602776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5603776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5604776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5605776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5606776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5607776a3906SMoni Shoua } 5608776a3906SMoni Shoua 5609776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5610776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5611776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5612776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5613776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5614776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5615776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5616776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5617776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5618776a3906SMoni Shoua } 5619776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5620776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5621776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5622776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5623776a3906SMoni Shoua out: 5624776a3906SMoni Shoua kfree(out); 5625776a3906SMoni Shoua return err; 5626776a3906SMoni Shoua } 5627776a3906SMoni Shoua 56286d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 56296d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 56306d2f89dfSmajd@mellanox.com { 56316d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 56326d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 56336d2f89dfSmajd@mellanox.com int err = 0; 56346d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 56356d2f89dfSmajd@mellanox.com 563628d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 563728d61370SYishai Hadas return -ENOSYS; 563828d61370SYishai Hadas 5639d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5640d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5641d16e91daSHaggai Eran qp_init_attr); 5642d16e91daSHaggai Eran 5643c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5644c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5645c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5646c2e53b2cSYishai Hadas 5647776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5648776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5649776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5650776a3906SMoni Shoua 56516d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 56526d2f89dfSmajd@mellanox.com 5653c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5654c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 56556d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 56566d2f89dfSmajd@mellanox.com if (err) 56576d2f89dfSmajd@mellanox.com goto out; 56586d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 56596d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 56606d2f89dfSmajd@mellanox.com } else { 56616d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 56626d2f89dfSmajd@mellanox.com if (err) 56636d2f89dfSmajd@mellanox.com goto out; 56646d2f89dfSmajd@mellanox.com } 56656d2f89dfSmajd@mellanox.com 56666d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5667e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5668e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5669e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5670e126ba97SEli Cohen 5671e126ba97SEli Cohen if (!ibqp->uobject) { 56720540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5673e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 56740540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5675e126ba97SEli Cohen } else { 5676e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5677e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5678e126ba97SEli Cohen } 5679e126ba97SEli Cohen 56800540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 56810540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 56820540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 56830540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 56840540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5685e126ba97SEli Cohen 5686e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5687e126ba97SEli Cohen 5688e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5689e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5690e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5691e126ba97SEli Cohen 5692051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5693051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5694051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5695051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5696051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5697051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5698b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5699b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5700051f2630SLeon Romanovsky 5701e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5702e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5703e126ba97SEli Cohen 5704e126ba97SEli Cohen out: 5705e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5706e126ba97SEli Cohen return err; 5707e126ba97SEli Cohen } 5708e126ba97SEli Cohen 5709e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5710e126ba97SEli Cohen struct ib_udata *udata) 5711e126ba97SEli Cohen { 5712e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5713e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5714e126ba97SEli Cohen int err; 5715e126ba97SEli Cohen 5716938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5717e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5718e126ba97SEli Cohen 5719e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5720e126ba97SEli Cohen if (!xrcd) 5721e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5722e126ba97SEli Cohen 57235aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 5724e126ba97SEli Cohen if (err) { 5725e126ba97SEli Cohen kfree(xrcd); 5726e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5727e126ba97SEli Cohen } 5728e126ba97SEli Cohen 5729e126ba97SEli Cohen return &xrcd->ibxrcd; 5730e126ba97SEli Cohen } 5731e126ba97SEli Cohen 5732c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 5733e126ba97SEli Cohen { 5734e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5735e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5736e126ba97SEli Cohen int err; 5737e126ba97SEli Cohen 57385aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 5739b081808aSLeon Romanovsky if (err) 5740e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5741e126ba97SEli Cohen 5742e126ba97SEli Cohen kfree(xrcd); 5743e126ba97SEli Cohen return 0; 5744e126ba97SEli Cohen } 574579b20a6cSYishai Hadas 5746350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5747350d0e4cSYishai Hadas { 5748350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5749350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5750350d0e4cSYishai Hadas struct ib_event event; 5751350d0e4cSYishai Hadas 5752350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5753350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5754350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5755350d0e4cSYishai Hadas switch (type) { 5756350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5757350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5758350d0e4cSYishai Hadas break; 5759350d0e4cSYishai Hadas default: 5760350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5761350d0e4cSYishai Hadas return; 5762350d0e4cSYishai Hadas } 5763350d0e4cSYishai Hadas 5764350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5765350d0e4cSYishai Hadas } 5766350d0e4cSYishai Hadas } 5767350d0e4cSYishai Hadas 576803404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 576903404e8aSMaor Gottlieb { 577003404e8aSMaor Gottlieb int err = 0; 577103404e8aSMaor Gottlieb 577203404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 577303404e8aSMaor Gottlieb if (dev->delay_drop.activate) 577403404e8aSMaor Gottlieb goto out; 577503404e8aSMaor Gottlieb 577603404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 577703404e8aSMaor Gottlieb if (err) 577803404e8aSMaor Gottlieb goto out; 577903404e8aSMaor Gottlieb 578003404e8aSMaor Gottlieb dev->delay_drop.activate = true; 578103404e8aSMaor Gottlieb out: 578203404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5783fe248c3aSMaor Gottlieb 5784fe248c3aSMaor Gottlieb if (!err) 5785fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 578603404e8aSMaor Gottlieb return err; 578703404e8aSMaor Gottlieb } 578803404e8aSMaor Gottlieb 578979b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 579079b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 579179b20a6cSYishai Hadas { 579279b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 57934be6da1eSNoa Osherovich int has_net_offloads; 579479b20a6cSYishai Hadas __be64 *rq_pas0; 579579b20a6cSYishai Hadas void *in; 579679b20a6cSYishai Hadas void *rqc; 579779b20a6cSYishai Hadas void *wq; 579879b20a6cSYishai Hadas int inlen; 579979b20a6cSYishai Hadas int err; 580079b20a6cSYishai Hadas 580179b20a6cSYishai Hadas dev = to_mdev(pd->device); 580279b20a6cSYishai Hadas 580379b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 58041b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 580579b20a6cSYishai Hadas if (!in) 580679b20a6cSYishai Hadas return -ENOMEM; 580779b20a6cSYishai Hadas 580834d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 580979b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 581079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 581179b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 581279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 581379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 581479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 581579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 581679b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5817ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5818ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5819ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5820b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5821b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5822b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5823b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5824b1383aa6SNoa Osherovich goto out; 5825b1383aa6SNoa Osherovich } else { 582679b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5827b1383aa6SNoa Osherovich } 5828b1383aa6SNoa Osherovich } 582979b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5830ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5831ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5832ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5833ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5834ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5835ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5836ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5837ccc87087SNoa Osherovich } 583879b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 583979b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 584079b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 584179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 584279b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 584379b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 58444be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5845b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 58464be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5847b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5848b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5849b1f74a84SNoa Osherovich goto out; 5850b1f74a84SNoa Osherovich } 5851b1f74a84SNoa Osherovich } else { 5852b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5853b1f74a84SNoa Osherovich } 58544be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 58554be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 58564be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 58574be6da1eSNoa Osherovich err = -EOPNOTSUPP; 58584be6da1eSNoa Osherovich goto out; 58594be6da1eSNoa Osherovich } 58604be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 58614be6da1eSNoa Osherovich } 586203404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 586303404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 586403404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 586503404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 586603404e8aSMaor Gottlieb err = -EOPNOTSUPP; 586703404e8aSMaor Gottlieb goto out; 586803404e8aSMaor Gottlieb } 586903404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 587003404e8aSMaor Gottlieb } 587179b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 587279b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5873350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 587403404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 587503404e8aSMaor Gottlieb err = set_delay_drop(dev); 587603404e8aSMaor Gottlieb if (err) { 587703404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 587803404e8aSMaor Gottlieb err); 587903404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 588003404e8aSMaor Gottlieb } else { 588103404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 588203404e8aSMaor Gottlieb } 588303404e8aSMaor Gottlieb } 5884b1f74a84SNoa Osherovich out: 588579b20a6cSYishai Hadas kvfree(in); 588679b20a6cSYishai Hadas return err; 588779b20a6cSYishai Hadas } 588879b20a6cSYishai Hadas 588979b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 589079b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 589179b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 589279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 589379b20a6cSYishai Hadas { 589479b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 589579b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 589679b20a6cSYishai Hadas return -EINVAL; 589779b20a6cSYishai Hadas 589879b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 589979b20a6cSYishai Hadas return -EINVAL; 590079b20a6cSYishai Hadas 590179b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 590279b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 59030dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 59040dfe4522SLeon Romanovsky return -EINVAL; 59050dfe4522SLeon Romanovsky 590679b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 590779b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 590879b20a6cSYishai Hadas return 0; 590979b20a6cSYishai Hadas } 591079b20a6cSYishai Hadas 591179b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 591279b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 591379b20a6cSYishai Hadas struct ib_udata *udata, 591479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 591579b20a6cSYishai Hadas { 591679b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 591779b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 591879b20a6cSYishai Hadas int err; 591979b20a6cSYishai Hadas size_t required_cmd_sz; 592079b20a6cSYishai Hadas 5921ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5922ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 592379b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 592479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 592579b20a6cSYishai Hadas return -EINVAL; 592679b20a6cSYishai Hadas } 592779b20a6cSYishai Hadas 592879b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 592979b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 593079b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 593179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 593279b20a6cSYishai Hadas return -EOPNOTSUPP; 593379b20a6cSYishai Hadas } 593479b20a6cSYishai Hadas 593579b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 593679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 593779b20a6cSYishai Hadas return -EFAULT; 593879b20a6cSYishai Hadas } 593979b20a6cSYishai Hadas 5940ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 594179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 594279b20a6cSYishai Hadas return -EOPNOTSUPP; 5943ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5944ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5945ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 594679b20a6cSYishai Hadas return -EOPNOTSUPP; 594779b20a6cSYishai Hadas } 5948ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5949ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5950ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5951ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5952ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5953ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5954ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5955ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5956ccc87087SNoa Osherovich return -EINVAL; 5957ccc87087SNoa Osherovich } 5958ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5959ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5960ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5961ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5962ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5963ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5964ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5965ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5966ccc87087SNoa Osherovich return -EINVAL; 5967ccc87087SNoa Osherovich } 5968ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5969ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5970ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5971ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5972ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5973ccc87087SNoa Osherovich } 597479b20a6cSYishai Hadas 597579b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 597679b20a6cSYishai Hadas if (err) { 597779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 597879b20a6cSYishai Hadas return err; 597979b20a6cSYishai Hadas } 598079b20a6cSYishai Hadas 5981b0ea0fa5SJason Gunthorpe err = create_user_rq(dev, pd, udata, rwq, &ucmd); 598279b20a6cSYishai Hadas if (err) { 598379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 598479b20a6cSYishai Hadas return err; 598579b20a6cSYishai Hadas } 598679b20a6cSYishai Hadas 598779b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 598879b20a6cSYishai Hadas return 0; 598979b20a6cSYishai Hadas } 599079b20a6cSYishai Hadas 599179b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 599279b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 599379b20a6cSYishai Hadas struct ib_udata *udata) 599479b20a6cSYishai Hadas { 599579b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 599679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 599779b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 599879b20a6cSYishai Hadas size_t min_resp_len; 599979b20a6cSYishai Hadas int err; 600079b20a6cSYishai Hadas 600179b20a6cSYishai Hadas if (!udata) 600279b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 600379b20a6cSYishai Hadas 600479b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 600579b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 600679b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 600779b20a6cSYishai Hadas 600879b20a6cSYishai Hadas dev = to_mdev(pd->device); 600979b20a6cSYishai Hadas switch (init_attr->wq_type) { 601079b20a6cSYishai Hadas case IB_WQT_RQ: 601179b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 601279b20a6cSYishai Hadas if (!rwq) 601379b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 601479b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 601579b20a6cSYishai Hadas if (err) 601679b20a6cSYishai Hadas goto err; 601779b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 601879b20a6cSYishai Hadas if (err) 601979b20a6cSYishai Hadas goto err_user_rq; 602079b20a6cSYishai Hadas break; 602179b20a6cSYishai Hadas default: 602279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 602379b20a6cSYishai Hadas init_attr->wq_type); 602479b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 602579b20a6cSYishai Hadas } 602679b20a6cSYishai Hadas 6027350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 602879b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 602979b20a6cSYishai Hadas if (udata->outlen) { 603079b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 603179b20a6cSYishai Hadas sizeof(resp.response_length); 603279b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 603379b20a6cSYishai Hadas if (err) 603479b20a6cSYishai Hadas goto err_copy; 603579b20a6cSYishai Hadas } 603679b20a6cSYishai Hadas 6037350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 6038350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 603979b20a6cSYishai Hadas return &rwq->ibwq; 604079b20a6cSYishai Hadas 604179b20a6cSYishai Hadas err_copy: 6042350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 604379b20a6cSYishai Hadas err_user_rq: 6044bdeacabdSShamir Rabinovitch destroy_user_rq(dev, pd, rwq, udata); 604579b20a6cSYishai Hadas err: 604679b20a6cSYishai Hadas kfree(rwq); 604779b20a6cSYishai Hadas return ERR_PTR(err); 604879b20a6cSYishai Hadas } 604979b20a6cSYishai Hadas 6050c4367a26SShamir Rabinovitch int mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata) 605179b20a6cSYishai Hadas { 605279b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 605379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 605479b20a6cSYishai Hadas 6055350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 6056bdeacabdSShamir Rabinovitch destroy_user_rq(dev, wq->pd, rwq, udata); 605779b20a6cSYishai Hadas kfree(rwq); 605879b20a6cSYishai Hadas 605979b20a6cSYishai Hadas return 0; 606079b20a6cSYishai Hadas } 606179b20a6cSYishai Hadas 6062c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 6063c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 6064c5f90929SYishai Hadas struct ib_udata *udata) 6065c5f90929SYishai Hadas { 6066c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 6067c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 6068c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 6069c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 6070c5f90929SYishai Hadas size_t min_resp_len; 6071c5f90929SYishai Hadas int inlen; 6072c5f90929SYishai Hadas int err; 6073c5f90929SYishai Hadas int i; 6074c5f90929SYishai Hadas u32 *in; 6075c5f90929SYishai Hadas void *rqtc; 6076c5f90929SYishai Hadas 6077c5f90929SYishai Hadas if (udata->inlen > 0 && 6078c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 6079c5f90929SYishai Hadas udata->inlen)) 6080c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 6081c5f90929SYishai Hadas 6082efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 6083efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 6084efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 6085efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 6086efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 6087efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 6088efd7f400SMaor Gottlieb } 6089efd7f400SMaor Gottlieb 6090c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 6091c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 6092c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 6093c5f90929SYishai Hadas 6094c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 6095c5f90929SYishai Hadas if (!rwq_ind_tbl) 6096c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 6097c5f90929SYishai Hadas 6098c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 60991b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 6100c5f90929SYishai Hadas if (!in) { 6101c5f90929SYishai Hadas err = -ENOMEM; 6102c5f90929SYishai Hadas goto err; 6103c5f90929SYishai Hadas } 6104c5f90929SYishai Hadas 6105c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 6106c5f90929SYishai Hadas 6107c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 6108c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 6109c5f90929SYishai Hadas 6110c5f90929SYishai Hadas for (i = 0; i < sz; i++) 6111c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 6112c5f90929SYishai Hadas 61135deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 61145deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 61155deba86eSYishai Hadas 6116c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 6117c5f90929SYishai Hadas kvfree(in); 6118c5f90929SYishai Hadas 6119c5f90929SYishai Hadas if (err) 6120c5f90929SYishai Hadas goto err; 6121c5f90929SYishai Hadas 6122c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 6123c5f90929SYishai Hadas if (udata->outlen) { 6124c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 6125c5f90929SYishai Hadas sizeof(resp.response_length); 6126c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 6127c5f90929SYishai Hadas if (err) 6128c5f90929SYishai Hadas goto err_copy; 6129c5f90929SYishai Hadas } 6130c5f90929SYishai Hadas 6131c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 6132c5f90929SYishai Hadas 6133c5f90929SYishai Hadas err_copy: 61345deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6135c5f90929SYishai Hadas err: 6136c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6137c5f90929SYishai Hadas return ERR_PTR(err); 6138c5f90929SYishai Hadas } 6139c5f90929SYishai Hadas 6140c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 6141c5f90929SYishai Hadas { 6142c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 6143c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 6144c5f90929SYishai Hadas 61455deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6146c5f90929SYishai Hadas 6147c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6148c5f90929SYishai Hadas return 0; 6149c5f90929SYishai Hadas } 6150c5f90929SYishai Hadas 615179b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 615279b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 615379b20a6cSYishai Hadas { 615479b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 615579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 615679b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 615779b20a6cSYishai Hadas size_t required_cmd_sz; 615879b20a6cSYishai Hadas int curr_wq_state; 615979b20a6cSYishai Hadas int wq_state; 616079b20a6cSYishai Hadas int inlen; 616179b20a6cSYishai Hadas int err; 616279b20a6cSYishai Hadas void *rqc; 616379b20a6cSYishai Hadas void *in; 616479b20a6cSYishai Hadas 616579b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 616679b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 616779b20a6cSYishai Hadas return -EINVAL; 616879b20a6cSYishai Hadas 616979b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 617079b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 617179b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 617279b20a6cSYishai Hadas return -EOPNOTSUPP; 617379b20a6cSYishai Hadas 617479b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 617579b20a6cSYishai Hadas return -EFAULT; 617679b20a6cSYishai Hadas 617779b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 617879b20a6cSYishai Hadas return -EOPNOTSUPP; 617979b20a6cSYishai Hadas 618079b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 61811b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 618279b20a6cSYishai Hadas if (!in) 618379b20a6cSYishai Hadas return -ENOMEM; 618479b20a6cSYishai Hadas 618579b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 618679b20a6cSYishai Hadas 618779b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 618879b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 618979b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 619079b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 619179b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 619279b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 619379b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 619479b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 619579b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 619634d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 619779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 619879b20a6cSYishai Hadas 6199b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6200b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6201b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6202b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6203b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6204b1f74a84SNoa Osherovich "supported\n"); 6205b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6206b1f74a84SNoa Osherovich goto out; 6207b1f74a84SNoa Osherovich } 6208b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6209b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6210b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6211b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6212b1f74a84SNoa Osherovich } 6213b1383aa6SNoa Osherovich 6214b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6215b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6216b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6217b1383aa6SNoa Osherovich goto out; 6218b1383aa6SNoa Osherovich } 6219b1f74a84SNoa Osherovich } 6220b1f74a84SNoa Osherovich 622123a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 622223a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 622323a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 622423a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 6225e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 6226e1f24a79SParav Pandit dev->port->cnts.set_id); 622723a6964eSMajd Dibbiny } else 62285a738b5dSJason Gunthorpe dev_info_once( 62295a738b5dSJason Gunthorpe &dev->ib_dev.dev, 62305a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 623123a6964eSMajd Dibbiny } 623223a6964eSMajd Dibbiny 6233350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 623479b20a6cSYishai Hadas if (!err) 623579b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 623679b20a6cSYishai Hadas 6237b1f74a84SNoa Osherovich out: 6238b1f74a84SNoa Osherovich kvfree(in); 623979b20a6cSYishai Hadas return err; 624079b20a6cSYishai Hadas } 6241d0e84c0aSYishai Hadas 6242d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6243d0e84c0aSYishai Hadas struct ib_cqe cqe; 6244d0e84c0aSYishai Hadas struct completion done; 6245d0e84c0aSYishai Hadas }; 6246d0e84c0aSYishai Hadas 6247d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6248d0e84c0aSYishai Hadas { 6249d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6250d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6251d0e84c0aSYishai Hadas cqe); 6252d0e84c0aSYishai Hadas 6253d0e84c0aSYishai Hadas complete(&cqe->done); 6254d0e84c0aSYishai Hadas } 6255d0e84c0aSYishai Hadas 6256d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6257d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6258d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6259d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6260d0e84c0aSYishai Hadas { 6261d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6262d0e84c0aSYishai Hadas 6263d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6264d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6265d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6266d0e84c0aSYishai Hadas return; 6267d0e84c0aSYishai Hadas } 6268d0e84c0aSYishai Hadas 6269d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6270d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6271d0e84c0aSYishai Hadas bool triggered = false; 6272d0e84c0aSYishai Hadas unsigned long flags; 6273d0e84c0aSYishai Hadas 6274d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6275d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6276d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6277d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6278d0e84c0aSYishai Hadas else 6279d0e84c0aSYishai Hadas triggered = true; 6280d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6281d0e84c0aSYishai Hadas 6282d0e84c0aSYishai Hadas if (triggered) { 6283d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6284d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6285d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6286d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6287d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6288d0e84c0aSYishai Hadas break; 6289d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6290d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6291d0e84c0aSYishai Hadas break; 6292d0e84c0aSYishai Hadas default: 6293d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6294d0e84c0aSYishai Hadas } 6295d0e84c0aSYishai Hadas } 6296d0e84c0aSYishai Hadas 6297d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6298d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6299d0e84c0aSYishai Hadas */ 63004e0e2ea1SYishai Hadas mcq->mcq.comp(&mcq->mcq, NULL); 6301d0e84c0aSYishai Hadas } 6302d0e84c0aSYishai Hadas 6303d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6304d0e84c0aSYishai Hadas } 6305d0e84c0aSYishai Hadas 6306d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6307d0e84c0aSYishai Hadas { 6308d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6309d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6310d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6311d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6312d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6313d0e84c0aSYishai Hadas .wr = { 6314d0e84c0aSYishai Hadas .next = NULL, 6315d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6316d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6317d0e84c0aSYishai Hadas }, 6318d0e84c0aSYishai Hadas }; 6319d0e84c0aSYishai Hadas int ret; 6320d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6321d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6322d0e84c0aSYishai Hadas 6323d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6324d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6325d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6326d0e84c0aSYishai Hadas return; 6327d0e84c0aSYishai Hadas } 6328d0e84c0aSYishai Hadas 6329d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6330d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6331d0e84c0aSYishai Hadas 6332d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6333d0e84c0aSYishai Hadas if (ret) { 6334d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6335d0e84c0aSYishai Hadas return; 6336d0e84c0aSYishai Hadas } 6337d0e84c0aSYishai Hadas 6338d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6339d0e84c0aSYishai Hadas } 6340d0e84c0aSYishai Hadas 6341d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6342d0e84c0aSYishai Hadas { 6343d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6344d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6345d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6346d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6347d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6348d0e84c0aSYishai Hadas int ret; 6349d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6350d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6351d0e84c0aSYishai Hadas 6352d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6353d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6354d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6355d0e84c0aSYishai Hadas return; 6356d0e84c0aSYishai Hadas } 6357d0e84c0aSYishai Hadas 6358d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6359d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6360d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6361d0e84c0aSYishai Hadas 6362d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6363d0e84c0aSYishai Hadas if (ret) { 6364d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6365d0e84c0aSYishai Hadas return; 6366d0e84c0aSYishai Hadas } 6367d0e84c0aSYishai Hadas 6368d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6369d0e84c0aSYishai Hadas } 6370