1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37e126ba97SEli Cohen #include "mlx5_ib.h" 38e126ba97SEli Cohen 39e126ba97SEli Cohen /* not supported currently */ 40e126ba97SEli Cohen static int wq_signature; 41e126ba97SEli Cohen 42e126ba97SEli Cohen enum { 43e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 44e126ba97SEli Cohen }; 45e126ba97SEli Cohen 46e126ba97SEli Cohen enum { 47e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 48e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 49e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 50e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 51e126ba97SEli Cohen }; 52e126ba97SEli Cohen 53e126ba97SEli Cohen enum { 54e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 55e126ba97SEli Cohen }; 56e126ba97SEli Cohen 57e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 58e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 59f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 60e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 61e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 62e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 63e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 64e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 65e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 66e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 67e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 688a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 69e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 70e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 71e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 72e126ba97SEli Cohen }; 73e126ba97SEli Cohen 74f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 75f0313965SErez Shitrit u8 rsvd0[16]; 76f0313965SErez Shitrit }; 77e126ba97SEli Cohen 78eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 79eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 807d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 81eb49ab0cSAlex Vesker }; 82eb49ab0cSAlex Vesker 830680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 840680efa2SAlex Vesker u16 operation; 85eb49ab0cSAlex Vesker 86eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 877d29f349SBodong Wang u32 rate_limit; 88eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 890680efa2SAlex Vesker }; 900680efa2SAlex Vesker 9189ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9289ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9389ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 9489ea94a7SMaor Gottlieb 95e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 96e126ba97SEli Cohen { 97e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 98e126ba97SEli Cohen } 99e126ba97SEli Cohen 100e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 101e126ba97SEli Cohen { 102e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 103e126ba97SEli Cohen } 104e126ba97SEli Cohen 105e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 106e126ba97SEli Cohen { 107e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 108e126ba97SEli Cohen } 109e126ba97SEli Cohen 110e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 111e126ba97SEli Cohen { 112e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 113e126ba97SEli Cohen } 114e126ba97SEli Cohen 115e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 116e126ba97SEli Cohen { 117e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 118e126ba97SEli Cohen } 119e126ba97SEli Cohen 120c1395a2aSHaggai Eran /** 121c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 122c1395a2aSHaggai Eran * 123c1395a2aSHaggai Eran * @qp: QP to copy from. 124c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 125c1395a2aSHaggai Eran * otherwise. 126c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 127c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 128c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 129c1395a2aSHaggai Eran * element in the queue. 130c1395a2aSHaggai Eran * @buffer: destination buffer. 131c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 132c1395a2aSHaggai Eran * 133c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 134c1395a2aSHaggai Eran * 135c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 136c1395a2aSHaggai Eran */ 137c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 13819098df2Smajd@mellanox.com void *buffer, u32 length, 13919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 140c1395a2aSHaggai Eran { 141c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 142c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 143c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 144c1395a2aSHaggai Eran size_t offset; 145c1395a2aSHaggai Eran size_t wq_end; 14619098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 147c1395a2aSHaggai Eran u32 first_copy_length; 148c1395a2aSHaggai Eran int wqe_length; 149c1395a2aSHaggai Eran int ret; 150c1395a2aSHaggai Eran 151c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 152c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 153c1395a2aSHaggai Eran qp->ibqp.qp_type); 154c1395a2aSHaggai Eran return -EINVAL; 155c1395a2aSHaggai Eran } 156c1395a2aSHaggai Eran 157c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 158c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 159c1395a2aSHaggai Eran 160c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 161c1395a2aSHaggai Eran return -EINVAL; 162c1395a2aSHaggai Eran 163c1395a2aSHaggai Eran if (offset > umem->length || 164c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 165c1395a2aSHaggai Eran return -EINVAL; 166c1395a2aSHaggai Eran 167c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 168c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 169c1395a2aSHaggai Eran if (ret) 170c1395a2aSHaggai Eran return ret; 171c1395a2aSHaggai Eran 172c1395a2aSHaggai Eran if (send) { 173c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 174c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 175c1395a2aSHaggai Eran 176c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 177c1395a2aSHaggai Eran } else { 178c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 179c1395a2aSHaggai Eran } 180c1395a2aSHaggai Eran 181c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 182c1395a2aSHaggai Eran return first_copy_length; 183c1395a2aSHaggai Eran 184c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 185c1395a2aSHaggai Eran wqe_length - first_copy_length); 186c1395a2aSHaggai Eran if (ret) 187c1395a2aSHaggai Eran return ret; 188c1395a2aSHaggai Eran 189c1395a2aSHaggai Eran return wqe_length; 190c1395a2aSHaggai Eran } 191c1395a2aSHaggai Eran 192e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 193e126ba97SEli Cohen { 194e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 195e126ba97SEli Cohen struct ib_event event; 196e126ba97SEli Cohen 19719098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 19819098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 19919098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20019098df2Smajd@mellanox.com } 201e126ba97SEli Cohen 202e126ba97SEli Cohen if (ibqp->event_handler) { 203e126ba97SEli Cohen event.device = ibqp->device; 204e126ba97SEli Cohen event.element.qp = ibqp; 205e126ba97SEli Cohen switch (type) { 206e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 207e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 208e126ba97SEli Cohen break; 209e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 210e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 211e126ba97SEli Cohen break; 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 213e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 216e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 217e126ba97SEli Cohen break; 218e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 219e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 220e126ba97SEli Cohen break; 221e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 222e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 223e126ba97SEli Cohen break; 224e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 225e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 226e126ba97SEli Cohen break; 227e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 228e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 229e126ba97SEli Cohen break; 230e126ba97SEli Cohen default: 231e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 232e126ba97SEli Cohen return; 233e126ba97SEli Cohen } 234e126ba97SEli Cohen 235e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 236e126ba97SEli Cohen } 237e126ba97SEli Cohen } 238e126ba97SEli Cohen 239e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 240e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 241e126ba97SEli Cohen { 242e126ba97SEli Cohen int wqe_size; 243e126ba97SEli Cohen int wq_size; 244e126ba97SEli Cohen 245e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 246938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 247e126ba97SEli Cohen return -EINVAL; 248e126ba97SEli Cohen 249e126ba97SEli Cohen if (!has_rq) { 250e126ba97SEli Cohen qp->rq.max_gs = 0; 251e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 252e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2530540d814SNoa Osherovich cap->max_recv_wr = 0; 2540540d814SNoa Osherovich cap->max_recv_sge = 0; 255e126ba97SEli Cohen } else { 256e126ba97SEli Cohen if (ucmd) { 257e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 258e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 259e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 260e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 261e126ba97SEli Cohen } else { 262e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 263e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 264e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 265e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 266e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 267e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 268938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 269e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 270e126ba97SEli Cohen wqe_size, 271938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 272938fe83cSSaeed Mahameed max_wqe_sz_rq)); 273e126ba97SEli Cohen return -EINVAL; 274e126ba97SEli Cohen } 275e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 276e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 277e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 278e126ba97SEli Cohen } 279e126ba97SEli Cohen } 280e126ba97SEli Cohen 281e126ba97SEli Cohen return 0; 282e126ba97SEli Cohen } 283e126ba97SEli Cohen 284f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 285e126ba97SEli Cohen { 286618af384SAndi Shyti int size = 0; 287e126ba97SEli Cohen 288f0313965SErez Shitrit switch (attr->qp_type) { 289e126ba97SEli Cohen case IB_QPT_XRC_INI: 290b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 291e126ba97SEli Cohen /* fall through */ 292e126ba97SEli Cohen case IB_QPT_RC: 293e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 29475c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 29575c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 29675c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 29775c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 298e126ba97SEli Cohen break; 299e126ba97SEli Cohen 300b125a54bSEli Cohen case IB_QPT_XRC_TGT: 301b125a54bSEli Cohen return 0; 302b125a54bSEli Cohen 303e126ba97SEli Cohen case IB_QPT_UC: 304b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30575c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3069e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 30775c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 308e126ba97SEli Cohen break; 309e126ba97SEli Cohen 310e126ba97SEli Cohen case IB_QPT_UD: 311f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 312f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 313f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 314f0313965SErez Shitrit /* fall through */ 315e126ba97SEli Cohen case IB_QPT_SMI: 316d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 317b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 318e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 319e126ba97SEli Cohen break; 320e126ba97SEli Cohen 321e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 322b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 323e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 324e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 325e126ba97SEli Cohen break; 326e126ba97SEli Cohen 327e126ba97SEli Cohen default: 328e126ba97SEli Cohen return -EINVAL; 329e126ba97SEli Cohen } 330e126ba97SEli Cohen 331e126ba97SEli Cohen return size; 332e126ba97SEli Cohen } 333e126ba97SEli Cohen 334e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 335e126ba97SEli Cohen { 336e126ba97SEli Cohen int inl_size = 0; 337e126ba97SEli Cohen int size; 338e126ba97SEli Cohen 339f0313965SErez Shitrit size = sq_overhead(attr); 340e126ba97SEli Cohen if (size < 0) 341e126ba97SEli Cohen return size; 342e126ba97SEli Cohen 343e126ba97SEli Cohen if (attr->cap.max_inline_data) { 344e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 345e126ba97SEli Cohen attr->cap.max_inline_data; 346e126ba97SEli Cohen } 347e126ba97SEli Cohen 348e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 349e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 350e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 351e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 352e1e66cc2SSagi Grimberg else 353e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 354e126ba97SEli Cohen } 355e126ba97SEli Cohen 356288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 357288c01b7SEli Cohen { 358288c01b7SEli Cohen int max_sge; 359288c01b7SEli Cohen 360288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 361288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 362288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 363288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 364288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 365288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 366288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 367288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 368288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 369288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 370288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 371288c01b7SEli Cohen else 372288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 373288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 374288c01b7SEli Cohen 375288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 376288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 377288c01b7SEli Cohen } 378288c01b7SEli Cohen 379e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 380e126ba97SEli Cohen struct mlx5_ib_qp *qp) 381e126ba97SEli Cohen { 382e126ba97SEli Cohen int wqe_size; 383e126ba97SEli Cohen int wq_size; 384e126ba97SEli Cohen 385e126ba97SEli Cohen if (!attr->cap.max_send_wr) 386e126ba97SEli Cohen return 0; 387e126ba97SEli Cohen 388e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 389e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 390e126ba97SEli Cohen if (wqe_size < 0) 391e126ba97SEli Cohen return wqe_size; 392e126ba97SEli Cohen 393938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 394b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 395938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 396e126ba97SEli Cohen return -EINVAL; 397e126ba97SEli Cohen } 398e126ba97SEli Cohen 399f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 400e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 401e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 402e126ba97SEli Cohen 403e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 404e1e66cc2SSagi Grimberg qp->signature_en = true; 405e1e66cc2SSagi Grimberg 406e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 407e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 408938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4091974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4101974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 411938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 412938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 413b125a54bSEli Cohen return -ENOMEM; 414b125a54bSEli Cohen } 415e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 416288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 417288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 418288c01b7SEli Cohen return -ENOMEM; 419288c01b7SEli Cohen 420288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 421b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 422b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 423e126ba97SEli Cohen 424e126ba97SEli Cohen return wq_size; 425e126ba97SEli Cohen } 426e126ba97SEli Cohen 427e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 428e126ba97SEli Cohen struct mlx5_ib_qp *qp, 42919098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4300fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4310fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 432e126ba97SEli Cohen { 433e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 434e126ba97SEli Cohen 435938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 436e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 437938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 438e126ba97SEli Cohen return -EINVAL; 439e126ba97SEli Cohen } 440e126ba97SEli Cohen 441e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 442e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 443e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 444e126ba97SEli Cohen return -EINVAL; 445e126ba97SEli Cohen } 446e126ba97SEli Cohen 447e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 448e126ba97SEli Cohen 449938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 450e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 451938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 452938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 453e126ba97SEli Cohen return -EINVAL; 454e126ba97SEli Cohen } 455e126ba97SEli Cohen 4560fb2ed66Smajd@mellanox.com if (attr->qp_type == IB_QPT_RAW_PACKET) { 4570fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4580fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4590fb2ed66Smajd@mellanox.com } else { 46019098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 461e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4620fb2ed66Smajd@mellanox.com } 463e126ba97SEli Cohen 464e126ba97SEli Cohen return 0; 465e126ba97SEli Cohen } 466e126ba97SEli Cohen 467e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 468e126ba97SEli Cohen { 469e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 470e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 471e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 472e126ba97SEli Cohen !attr->cap.max_recv_wr) 473e126ba97SEli Cohen return 0; 474e126ba97SEli Cohen 475e126ba97SEli Cohen return 1; 476e126ba97SEli Cohen } 477e126ba97SEli Cohen 4782f5ff264SEli Cohen static int first_med_bfreg(void) 479c1be5232SEli Cohen { 480c1be5232SEli Cohen return 1; 481c1be5232SEli Cohen } 482c1be5232SEli Cohen 4830b80c14fSEli Cohen enum { 4840b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4850b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4860b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4870b80c14fSEli Cohen * "odd/even" order 4880b80c14fSEli Cohen */ 4890b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4900b80c14fSEli Cohen }; 4910b80c14fSEli Cohen 492b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 493b037c29aSEli Cohen { 494b037c29aSEli Cohen return get_num_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 495b037c29aSEli Cohen } 496b037c29aSEli Cohen 497b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 498b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 499c1be5232SEli Cohen { 500c1be5232SEli Cohen int n; 501c1be5232SEli Cohen 502b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 503b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 504c1be5232SEli Cohen 505c1be5232SEli Cohen return n >= 0 ? n : 0; 506c1be5232SEli Cohen } 507c1be5232SEli Cohen 508b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 509b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 510c1be5232SEli Cohen { 511c1be5232SEli Cohen int med; 512c1be5232SEli Cohen 513b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 514b037c29aSEli Cohen return ++med; 515c1be5232SEli Cohen } 516c1be5232SEli Cohen 517b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 518b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 519e126ba97SEli Cohen { 520e126ba97SEli Cohen int i; 521e126ba97SEli Cohen 522b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 523b037c29aSEli Cohen if (!bfregi->count[i]) { 5242f5ff264SEli Cohen bfregi->count[i]++; 525e126ba97SEli Cohen return i; 526e126ba97SEli Cohen } 527e126ba97SEli Cohen } 528e126ba97SEli Cohen 529e126ba97SEli Cohen return -ENOMEM; 530e126ba97SEli Cohen } 531e126ba97SEli Cohen 532b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 533b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 534e126ba97SEli Cohen { 5352f5ff264SEli Cohen int minidx = first_med_bfreg(); 536e126ba97SEli Cohen int i; 537e126ba97SEli Cohen 538b037c29aSEli Cohen for (i = first_med_bfreg(); i < first_hi_bfreg(dev, bfregi); i++) { 5392f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 540e126ba97SEli Cohen minidx = i; 5410b80c14fSEli Cohen if (!bfregi->count[minidx]) 5420b80c14fSEli Cohen break; 543e126ba97SEli Cohen } 544e126ba97SEli Cohen 5452f5ff264SEli Cohen bfregi->count[minidx]++; 546e126ba97SEli Cohen return minidx; 547e126ba97SEli Cohen } 548e126ba97SEli Cohen 549b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 550b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, 551e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 552e126ba97SEli Cohen { 5532f5ff264SEli Cohen int bfregn = -EINVAL; 554e126ba97SEli Cohen 5552f5ff264SEli Cohen mutex_lock(&bfregi->lock); 556e126ba97SEli Cohen switch (lat) { 557e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 5580b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5592f5ff264SEli Cohen bfregn = 0; 5602f5ff264SEli Cohen bfregi->count[bfregn]++; 561e126ba97SEli Cohen break; 562e126ba97SEli Cohen 563e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 5642f5ff264SEli Cohen if (bfregi->ver < 2) 5652f5ff264SEli Cohen bfregn = -ENOMEM; 56678c0f98cSEli Cohen else 567b037c29aSEli Cohen bfregn = alloc_med_class_bfreg(dev, bfregi); 568e126ba97SEli Cohen break; 569e126ba97SEli Cohen 570e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 5712f5ff264SEli Cohen if (bfregi->ver < 2) 5722f5ff264SEli Cohen bfregn = -ENOMEM; 57378c0f98cSEli Cohen else 574b037c29aSEli Cohen bfregn = alloc_high_class_bfreg(dev, bfregi); 575e126ba97SEli Cohen break; 576e126ba97SEli Cohen } 5772f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 578e126ba97SEli Cohen 5792f5ff264SEli Cohen return bfregn; 580e126ba97SEli Cohen } 581e126ba97SEli Cohen 582b037c29aSEli Cohen static void free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 583e126ba97SEli Cohen { 5842f5ff264SEli Cohen mutex_lock(&bfregi->lock); 585b037c29aSEli Cohen bfregi->count[bfregn]--; 5862f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 587e126ba97SEli Cohen } 588e126ba97SEli Cohen 589e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 590e126ba97SEli Cohen { 591e126ba97SEli Cohen switch (state) { 592e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 593e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 594e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 595e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 596e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 597e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 598e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 599e126ba97SEli Cohen default: return -1; 600e126ba97SEli Cohen } 601e126ba97SEli Cohen } 602e126ba97SEli Cohen 603e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 604e126ba97SEli Cohen { 605e126ba97SEli Cohen switch (type) { 606e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 607e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 608e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 609e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 610e126ba97SEli Cohen case IB_QPT_XRC_INI: 611e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 612e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 613d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 614e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 615e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6160fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 617e126ba97SEli Cohen case IB_QPT_MAX: 618e126ba97SEli Cohen default: return -EINVAL; 619e126ba97SEli Cohen } 620e126ba97SEli Cohen } 621e126ba97SEli Cohen 62289ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 62389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 62489ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 62589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 62689ea94a7SMaor Gottlieb 627b037c29aSEli Cohen static int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 628b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 629e126ba97SEli Cohen { 630b037c29aSEli Cohen int bfregs_per_sys_page; 631b037c29aSEli Cohen int index_of_sys_page; 632b037c29aSEli Cohen int offset; 633b037c29aSEli Cohen 634b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 635b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 636b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 637b037c29aSEli Cohen 638b037c29aSEli Cohen offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 639b037c29aSEli Cohen 640b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 641e126ba97SEli Cohen } 642e126ba97SEli Cohen 64319098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 64419098df2Smajd@mellanox.com struct ib_pd *pd, 64519098df2Smajd@mellanox.com unsigned long addr, size_t size, 64619098df2Smajd@mellanox.com struct ib_umem **umem, 64719098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 64819098df2Smajd@mellanox.com u32 *offset) 64919098df2Smajd@mellanox.com { 65019098df2Smajd@mellanox.com int err; 65119098df2Smajd@mellanox.com 65219098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 65319098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 65419098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 65519098df2Smajd@mellanox.com return PTR_ERR(*umem); 65619098df2Smajd@mellanox.com } 65719098df2Smajd@mellanox.com 658762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 65919098df2Smajd@mellanox.com 66019098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 66119098df2Smajd@mellanox.com if (err) { 66219098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 66319098df2Smajd@mellanox.com goto err_umem; 66419098df2Smajd@mellanox.com } 66519098df2Smajd@mellanox.com 66619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 66719098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 66819098df2Smajd@mellanox.com 66919098df2Smajd@mellanox.com return 0; 67019098df2Smajd@mellanox.com 67119098df2Smajd@mellanox.com err_umem: 67219098df2Smajd@mellanox.com ib_umem_release(*umem); 67319098df2Smajd@mellanox.com *umem = NULL; 67419098df2Smajd@mellanox.com 67519098df2Smajd@mellanox.com return err; 67619098df2Smajd@mellanox.com } 67719098df2Smajd@mellanox.com 67879b20a6cSYishai Hadas static void destroy_user_rq(struct ib_pd *pd, struct mlx5_ib_rwq *rwq) 67979b20a6cSYishai Hadas { 68079b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 68179b20a6cSYishai Hadas 68279b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 68379b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 68479b20a6cSYishai Hadas if (rwq->umem) 68579b20a6cSYishai Hadas ib_umem_release(rwq->umem); 68679b20a6cSYishai Hadas } 68779b20a6cSYishai Hadas 68879b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 68979b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 69079b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 69179b20a6cSYishai Hadas { 69279b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 69379b20a6cSYishai Hadas int page_shift = 0; 69479b20a6cSYishai Hadas int npages; 69579b20a6cSYishai Hadas u32 offset = 0; 69679b20a6cSYishai Hadas int ncont = 0; 69779b20a6cSYishai Hadas int err; 69879b20a6cSYishai Hadas 69979b20a6cSYishai Hadas if (!ucmd->buf_addr) 70079b20a6cSYishai Hadas return -EINVAL; 70179b20a6cSYishai Hadas 70279b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70379b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 70479b20a6cSYishai Hadas rwq->buf_size, 0, 0); 70579b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 70679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 70779b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 70879b20a6cSYishai Hadas return err; 70979b20a6cSYishai Hadas } 71079b20a6cSYishai Hadas 711762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 71279b20a6cSYishai Hadas &ncont, NULL); 71379b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 71479b20a6cSYishai Hadas &rwq->rq_page_offset); 71579b20a6cSYishai Hadas if (err) { 71679b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 71779b20a6cSYishai Hadas goto err_umem; 71879b20a6cSYishai Hadas } 71979b20a6cSYishai Hadas 72079b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 72179b20a6cSYishai Hadas rwq->page_shift = page_shift; 72279b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 72379b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 72479b20a6cSYishai Hadas 72579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 72679b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 72779b20a6cSYishai Hadas npages, page_shift, ncont, offset); 72879b20a6cSYishai Hadas 72979b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 73079b20a6cSYishai Hadas if (err) { 73179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 73279b20a6cSYishai Hadas goto err_umem; 73379b20a6cSYishai Hadas } 73479b20a6cSYishai Hadas 73579b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 73679b20a6cSYishai Hadas return 0; 73779b20a6cSYishai Hadas 73879b20a6cSYishai Hadas err_umem: 73979b20a6cSYishai Hadas ib_umem_release(rwq->umem); 74079b20a6cSYishai Hadas return err; 74179b20a6cSYishai Hadas } 74279b20a6cSYishai Hadas 743b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 744b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 745b037c29aSEli Cohen { 746b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 747b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 748b037c29aSEli Cohen } 749b037c29aSEli Cohen 750e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 751e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7520fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 75309a7d9ecSSaeed Mahameed u32 **in, 75419098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 75519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 756e126ba97SEli Cohen { 757e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 758e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 75919098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7609e9c47d0SEli Cohen int page_shift = 0; 761e126ba97SEli Cohen int uar_index; 762e126ba97SEli Cohen int npages; 7639e9c47d0SEli Cohen u32 offset = 0; 7642f5ff264SEli Cohen int bfregn; 7659e9c47d0SEli Cohen int ncont = 0; 76609a7d9ecSSaeed Mahameed __be64 *pas; 76709a7d9ecSSaeed Mahameed void *qpc; 768e126ba97SEli Cohen int err; 769e126ba97SEli Cohen 770e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 771e126ba97SEli Cohen if (err) { 772e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 773e126ba97SEli Cohen return err; 774e126ba97SEli Cohen } 775e126ba97SEli Cohen 776e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 777e126ba97SEli Cohen /* 778e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 779e126ba97SEli Cohen */ 780051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 781051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 7822f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 783051f2630SLeon Romanovsky else { 784b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_HIGH); 7852f5ff264SEli Cohen if (bfregn < 0) { 7862f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency BFREG\n"); 787c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 788b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_MEDIUM); 7892f5ff264SEli Cohen if (bfregn < 0) { 7902f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency BFREG\n"); 791e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 792b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_LOW); 7932f5ff264SEli Cohen if (bfregn < 0) { 7942f5ff264SEli Cohen mlx5_ib_warn(dev, "bfreg allocation failed\n"); 7952f5ff264SEli Cohen return bfregn; 796e126ba97SEli Cohen } 797e126ba97SEli Cohen } 798c1be5232SEli Cohen } 799051f2630SLeon Romanovsky } 800e126ba97SEli Cohen 801b037c29aSEli Cohen uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn); 8022f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 803e126ba97SEli Cohen 80448fea837SHaggai Eran qp->rq.offset = 0; 80548fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 80648fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 80748fea837SHaggai Eran 8080fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 809e126ba97SEli Cohen if (err) 8102f5ff264SEli Cohen goto err_bfreg; 811e126ba97SEli Cohen 81219098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 81319098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 81419098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 81519098df2Smajd@mellanox.com ubuffer->buf_size, 81619098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 81719098df2Smajd@mellanox.com &ncont, &offset); 81819098df2Smajd@mellanox.com if (err) 8192f5ff264SEli Cohen goto err_bfreg; 8209e9c47d0SEli Cohen } else { 82119098df2Smajd@mellanox.com ubuffer->umem = NULL; 8229e9c47d0SEli Cohen } 823e126ba97SEli Cohen 82409a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 82509a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 826e126ba97SEli Cohen *in = mlx5_vzalloc(*inlen); 827e126ba97SEli Cohen if (!*in) { 828e126ba97SEli Cohen err = -ENOMEM; 829e126ba97SEli Cohen goto err_umem; 830e126ba97SEli Cohen } 831e126ba97SEli Cohen 83209a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 83309a7d9ecSSaeed Mahameed if (ubuffer->umem) 83409a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 83509a7d9ecSSaeed Mahameed 83609a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 83709a7d9ecSSaeed Mahameed 83809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 83909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 84009a7d9ecSSaeed Mahameed 84109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 842b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8432f5ff264SEli Cohen qp->bfregn = bfregn; 844e126ba97SEli Cohen 845e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 846e126ba97SEli Cohen if (err) { 847e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 848e126ba97SEli Cohen goto err_free; 849e126ba97SEli Cohen } 850e126ba97SEli Cohen 851e126ba97SEli Cohen err = ib_copy_to_udata(udata, resp, sizeof(*resp)); 852e126ba97SEli Cohen if (err) { 853e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 854e126ba97SEli Cohen goto err_unmap; 855e126ba97SEli Cohen } 856e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 857e126ba97SEli Cohen 858e126ba97SEli Cohen return 0; 859e126ba97SEli Cohen 860e126ba97SEli Cohen err_unmap: 861e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 862e126ba97SEli Cohen 863e126ba97SEli Cohen err_free: 864479163f4SAl Viro kvfree(*in); 865e126ba97SEli Cohen 866e126ba97SEli Cohen err_umem: 86719098df2Smajd@mellanox.com if (ubuffer->umem) 86819098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 869e126ba97SEli Cohen 8702f5ff264SEli Cohen err_bfreg: 871b037c29aSEli Cohen free_bfreg(dev, &context->bfregi, bfregn); 872e126ba97SEli Cohen return err; 873e126ba97SEli Cohen } 874e126ba97SEli Cohen 875b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 876b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 877e126ba97SEli Cohen { 878e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 879e126ba97SEli Cohen 880e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 881e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 88219098df2Smajd@mellanox.com if (base->ubuffer.umem) 88319098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 884b037c29aSEli Cohen free_bfreg(dev, &context->bfregi, qp->bfregn); 885e126ba97SEli Cohen } 886e126ba97SEli Cohen 887e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 888e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 889e126ba97SEli Cohen struct mlx5_ib_qp *qp, 89009a7d9ecSSaeed Mahameed u32 **in, int *inlen, 89119098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 892e126ba97SEli Cohen { 893e126ba97SEli Cohen int uar_index; 89409a7d9ecSSaeed Mahameed void *qpc; 895e126ba97SEli Cohen int err; 896e126ba97SEli Cohen 897f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 898f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 899b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 90093d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 901b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9021a4c3a3dSEli Cohen return -EINVAL; 903e126ba97SEli Cohen 904e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9055fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9065fe9dec0SEli Cohen else 9075fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 908e126ba97SEli Cohen 909d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 910d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 911d8030b0dSEli Cohen */ 912d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9135fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 914e126ba97SEli Cohen 915e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 916e126ba97SEli Cohen if (err < 0) { 917e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9185fe9dec0SEli Cohen return err; 919e126ba97SEli Cohen } 920e126ba97SEli Cohen 921e126ba97SEli Cohen qp->rq.offset = 0; 922e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 92319098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 924e126ba97SEli Cohen 92519098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 926e126ba97SEli Cohen if (err) { 927e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9285fe9dec0SEli Cohen return err; 929e126ba97SEli Cohen } 930e126ba97SEli Cohen 931e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 93209a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 93309a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 934e126ba97SEli Cohen *in = mlx5_vzalloc(*inlen); 935e126ba97SEli Cohen if (!*in) { 936e126ba97SEli Cohen err = -ENOMEM; 937e126ba97SEli Cohen goto err_buf; 938e126ba97SEli Cohen } 93909a7d9ecSSaeed Mahameed 94009a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 94109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 94209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 94309a7d9ecSSaeed Mahameed 944e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 94509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 94609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 947e126ba97SEli Cohen 948b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 94909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 950b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 951b11a4f9cSHaggai Eran } 952b11a4f9cSHaggai Eran 95309a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 95409a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 955e126ba97SEli Cohen 9569603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 957e126ba97SEli Cohen if (err) { 958e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 959e126ba97SEli Cohen goto err_free; 960e126ba97SEli Cohen } 961e126ba97SEli Cohen 962e126ba97SEli Cohen qp->sq.wrid = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.wrid), GFP_KERNEL); 963e126ba97SEli Cohen qp->sq.wr_data = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.wr_data), GFP_KERNEL); 964e126ba97SEli Cohen qp->rq.wrid = kmalloc(qp->rq.wqe_cnt * sizeof(*qp->rq.wrid), GFP_KERNEL); 965e126ba97SEli Cohen qp->sq.w_list = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.w_list), GFP_KERNEL); 966e126ba97SEli Cohen qp->sq.wqe_head = kmalloc(qp->sq.wqe_cnt * sizeof(*qp->sq.wqe_head), GFP_KERNEL); 967e126ba97SEli Cohen 968e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 969e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 970e126ba97SEli Cohen err = -ENOMEM; 971e126ba97SEli Cohen goto err_wrid; 972e126ba97SEli Cohen } 973e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 974e126ba97SEli Cohen 975e126ba97SEli Cohen return 0; 976e126ba97SEli Cohen 977e126ba97SEli Cohen err_wrid: 978e126ba97SEli Cohen kfree(qp->sq.wqe_head); 979e126ba97SEli Cohen kfree(qp->sq.w_list); 980e126ba97SEli Cohen kfree(qp->sq.wrid); 981e126ba97SEli Cohen kfree(qp->sq.wr_data); 982e126ba97SEli Cohen kfree(qp->rq.wrid); 983f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 984e126ba97SEli Cohen 985e126ba97SEli Cohen err_free: 986479163f4SAl Viro kvfree(*in); 987e126ba97SEli Cohen 988e126ba97SEli Cohen err_buf: 9899603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 990e126ba97SEli Cohen return err; 991e126ba97SEli Cohen } 992e126ba97SEli Cohen 993e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 994e126ba97SEli Cohen { 995e126ba97SEli Cohen kfree(qp->sq.wqe_head); 996e126ba97SEli Cohen kfree(qp->sq.w_list); 997e126ba97SEli Cohen kfree(qp->sq.wrid); 998e126ba97SEli Cohen kfree(qp->sq.wr_data); 999e126ba97SEli Cohen kfree(qp->rq.wrid); 1000f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10019603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1002e126ba97SEli Cohen } 1003e126ba97SEli Cohen 100409a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1005e126ba97SEli Cohen { 1006e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1007e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 100809a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1009e126ba97SEli Cohen else if (!qp->has_rq) 101009a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1011e126ba97SEli Cohen else 101209a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1013e126ba97SEli Cohen } 1014e126ba97SEli Cohen 1015e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1016e126ba97SEli Cohen { 1017e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1018e126ba97SEli Cohen return 1; 1019e126ba97SEli Cohen 1020e126ba97SEli Cohen return 0; 1021e126ba97SEli Cohen } 1022e126ba97SEli Cohen 10230fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10240fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 10250fb2ed66Smajd@mellanox.com { 1026c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10270fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10280fb2ed66Smajd@mellanox.com 10290fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 10300fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10310fb2ed66Smajd@mellanox.com } 10320fb2ed66Smajd@mellanox.com 10330fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10340fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10350fb2ed66Smajd@mellanox.com { 10360fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 10370fb2ed66Smajd@mellanox.com } 10380fb2ed66Smajd@mellanox.com 10390fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10400fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10410fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10420fb2ed66Smajd@mellanox.com { 10430fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10440fb2ed66Smajd@mellanox.com __be64 *pas; 10450fb2ed66Smajd@mellanox.com void *in; 10460fb2ed66Smajd@mellanox.com void *sqc; 10470fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 10480fb2ed66Smajd@mellanox.com void *wq; 10490fb2ed66Smajd@mellanox.com int inlen; 10500fb2ed66Smajd@mellanox.com int err; 10510fb2ed66Smajd@mellanox.com int page_shift = 0; 10520fb2ed66Smajd@mellanox.com int npages; 10530fb2ed66Smajd@mellanox.com int ncont = 0; 10540fb2ed66Smajd@mellanox.com u32 offset = 0; 10550fb2ed66Smajd@mellanox.com 10560fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 10570fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 10580fb2ed66Smajd@mellanox.com &ncont, &offset); 10590fb2ed66Smajd@mellanox.com if (err) 10600fb2ed66Smajd@mellanox.com return err; 10610fb2ed66Smajd@mellanox.com 10620fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 10630fb2ed66Smajd@mellanox.com in = mlx5_vzalloc(inlen); 10640fb2ed66Smajd@mellanox.com if (!in) { 10650fb2ed66Smajd@mellanox.com err = -ENOMEM; 10660fb2ed66Smajd@mellanox.com goto err_umem; 10670fb2ed66Smajd@mellanox.com } 10680fb2ed66Smajd@mellanox.com 10690fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 10700fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 10710fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 10720fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 10730fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 10740fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 10750fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 10760fb2ed66Smajd@mellanox.com 10770fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 10780fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 10790fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 10800fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 10810fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 10820fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 10830fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 10840fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 10850fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 10860fb2ed66Smajd@mellanox.com 10870fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 10880fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 10890fb2ed66Smajd@mellanox.com 10900fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 10910fb2ed66Smajd@mellanox.com 10920fb2ed66Smajd@mellanox.com kvfree(in); 10930fb2ed66Smajd@mellanox.com 10940fb2ed66Smajd@mellanox.com if (err) 10950fb2ed66Smajd@mellanox.com goto err_umem; 10960fb2ed66Smajd@mellanox.com 10970fb2ed66Smajd@mellanox.com return 0; 10980fb2ed66Smajd@mellanox.com 10990fb2ed66Smajd@mellanox.com err_umem: 11000fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11010fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11020fb2ed66Smajd@mellanox.com 11030fb2ed66Smajd@mellanox.com return err; 11040fb2ed66Smajd@mellanox.com } 11050fb2ed66Smajd@mellanox.com 11060fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11070fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11080fb2ed66Smajd@mellanox.com { 11090fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11100fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11110fb2ed66Smajd@mellanox.com } 11120fb2ed66Smajd@mellanox.com 11130fb2ed66Smajd@mellanox.com static int get_rq_pas_size(void *qpc) 11140fb2ed66Smajd@mellanox.com { 11150fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11160fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11170fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11180fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11190fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11200fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11210fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11220fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11230fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11240fb2ed66Smajd@mellanox.com 11250fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11260fb2ed66Smajd@mellanox.com } 11270fb2ed66Smajd@mellanox.com 11280fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11290fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq, void *qpin) 11300fb2ed66Smajd@mellanox.com { 1131358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 11320fb2ed66Smajd@mellanox.com __be64 *pas; 11330fb2ed66Smajd@mellanox.com __be64 *qp_pas; 11340fb2ed66Smajd@mellanox.com void *in; 11350fb2ed66Smajd@mellanox.com void *rqc; 11360fb2ed66Smajd@mellanox.com void *wq; 11370fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11380fb2ed66Smajd@mellanox.com int inlen; 11390fb2ed66Smajd@mellanox.com int err; 11400fb2ed66Smajd@mellanox.com u32 rq_pas_size = get_rq_pas_size(qpc); 11410fb2ed66Smajd@mellanox.com 11420fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 11430fb2ed66Smajd@mellanox.com in = mlx5_vzalloc(inlen); 11440fb2ed66Smajd@mellanox.com if (!in) 11450fb2ed66Smajd@mellanox.com return -ENOMEM; 11460fb2ed66Smajd@mellanox.com 11470fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1148e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 11490fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 11500fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 11510fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 11520fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 11530fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11540fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 11550fb2ed66Smajd@mellanox.com 1156358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1157358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1158358e42eaSMajd Dibbiny 11590fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 11600fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11610fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, end_padding_mode, 116201581fb8SMaor Gottlieb MLX5_GET(qpc, qpc, end_padding_mode)); 11630fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 11640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11650fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11660fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 11670fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 11680fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 11690fb2ed66Smajd@mellanox.com 11700fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11710fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 11720fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 11730fb2ed66Smajd@mellanox.com 11740fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 11750fb2ed66Smajd@mellanox.com 11760fb2ed66Smajd@mellanox.com kvfree(in); 11770fb2ed66Smajd@mellanox.com 11780fb2ed66Smajd@mellanox.com return err; 11790fb2ed66Smajd@mellanox.com } 11800fb2ed66Smajd@mellanox.com 11810fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11820fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 11830fb2ed66Smajd@mellanox.com { 11840fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 11850fb2ed66Smajd@mellanox.com } 11860fb2ed66Smajd@mellanox.com 11870fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 11880fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq, u32 tdn) 11890fb2ed66Smajd@mellanox.com { 11900fb2ed66Smajd@mellanox.com u32 *in; 11910fb2ed66Smajd@mellanox.com void *tirc; 11920fb2ed66Smajd@mellanox.com int inlen; 11930fb2ed66Smajd@mellanox.com int err; 11940fb2ed66Smajd@mellanox.com 11950fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 11960fb2ed66Smajd@mellanox.com in = mlx5_vzalloc(inlen); 11970fb2ed66Smajd@mellanox.com if (!in) 11980fb2ed66Smajd@mellanox.com return -ENOMEM; 11990fb2ed66Smajd@mellanox.com 12000fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12010fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12020fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12030fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 12040fb2ed66Smajd@mellanox.com 12050fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 12060fb2ed66Smajd@mellanox.com 12070fb2ed66Smajd@mellanox.com kvfree(in); 12080fb2ed66Smajd@mellanox.com 12090fb2ed66Smajd@mellanox.com return err; 12100fb2ed66Smajd@mellanox.com } 12110fb2ed66Smajd@mellanox.com 12120fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12130fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12140fb2ed66Smajd@mellanox.com { 12150fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 12160fb2ed66Smajd@mellanox.com } 12170fb2ed66Smajd@mellanox.com 12180fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 121909a7d9ecSSaeed Mahameed u32 *in, 12200fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12210fb2ed66Smajd@mellanox.com { 12220fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 12230fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 12240fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 12250fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 12260fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 12270fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 12280fb2ed66Smajd@mellanox.com int err; 12290fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 12300fb2ed66Smajd@mellanox.com 12310fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 12320fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_tis(dev, sq, tdn); 12330fb2ed66Smajd@mellanox.com if (err) 12340fb2ed66Smajd@mellanox.com return err; 12350fb2ed66Smajd@mellanox.com 12360fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 12370fb2ed66Smajd@mellanox.com if (err) 12380fb2ed66Smajd@mellanox.com goto err_destroy_tis; 12390fb2ed66Smajd@mellanox.com 12400fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 12410fb2ed66Smajd@mellanox.com } 12420fb2ed66Smajd@mellanox.com 12430fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1244358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1245358e42eaSMajd Dibbiny 1246e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1247e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 12480fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_rq(dev, rq, in); 12490fb2ed66Smajd@mellanox.com if (err) 12500fb2ed66Smajd@mellanox.com goto err_destroy_sq; 12510fb2ed66Smajd@mellanox.com 12520fb2ed66Smajd@mellanox.com 12530fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_tir(dev, rq, tdn); 12540fb2ed66Smajd@mellanox.com if (err) 12550fb2ed66Smajd@mellanox.com goto err_destroy_rq; 12560fb2ed66Smajd@mellanox.com } 12570fb2ed66Smajd@mellanox.com 12580fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 12590fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 12600fb2ed66Smajd@mellanox.com 12610fb2ed66Smajd@mellanox.com return 0; 12620fb2ed66Smajd@mellanox.com 12630fb2ed66Smajd@mellanox.com err_destroy_rq: 12640fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 12650fb2ed66Smajd@mellanox.com err_destroy_sq: 12660fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 12670fb2ed66Smajd@mellanox.com return err; 12680fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 12690fb2ed66Smajd@mellanox.com err_destroy_tis: 12700fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 12710fb2ed66Smajd@mellanox.com 12720fb2ed66Smajd@mellanox.com return err; 12730fb2ed66Smajd@mellanox.com } 12740fb2ed66Smajd@mellanox.com 12750fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 12760fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 12770fb2ed66Smajd@mellanox.com { 12780fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 12790fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 12800fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 12810fb2ed66Smajd@mellanox.com 12820fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 12830fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 12840fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 12850fb2ed66Smajd@mellanox.com } 12860fb2ed66Smajd@mellanox.com 12870fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 12880fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 12890fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 12900fb2ed66Smajd@mellanox.com } 12910fb2ed66Smajd@mellanox.com } 12920fb2ed66Smajd@mellanox.com 12930fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 12940fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 12950fb2ed66Smajd@mellanox.com { 12960fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 12970fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 12980fb2ed66Smajd@mellanox.com 12990fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 13000fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 13010fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 13020fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 13030fb2ed66Smajd@mellanox.com } 13040fb2ed66Smajd@mellanox.com 130528d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 130628d61370SYishai Hadas { 130728d61370SYishai Hadas mlx5_core_destroy_tir(dev->mdev, qp->rss_qp.tirn); 130828d61370SYishai Hadas } 130928d61370SYishai Hadas 131028d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 131128d61370SYishai Hadas struct ib_pd *pd, 131228d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 131328d61370SYishai Hadas struct ib_udata *udata) 131428d61370SYishai Hadas { 131528d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 131628d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 131728d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 131828d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 131928d61370SYishai Hadas int inlen; 132028d61370SYishai Hadas int err; 132128d61370SYishai Hadas u32 *in; 132228d61370SYishai Hadas void *tirc; 132328d61370SYishai Hadas void *hfso; 132428d61370SYishai Hadas u32 selected_fields = 0; 132528d61370SYishai Hadas size_t min_resp_len; 132628d61370SYishai Hadas u32 tdn = mucontext->tdn; 132728d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 132828d61370SYishai Hadas size_t required_cmd_sz; 132928d61370SYishai Hadas 133028d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 133128d61370SYishai Hadas return -EOPNOTSUPP; 133228d61370SYishai Hadas 133328d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 133428d61370SYishai Hadas return -EINVAL; 133528d61370SYishai Hadas 13362f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 133728d61370SYishai Hadas if (udata->outlen < min_resp_len) 133828d61370SYishai Hadas return -EINVAL; 133928d61370SYishai Hadas 134028d61370SYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved1) + sizeof(ucmd.reserved1); 134128d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 134228d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 134328d61370SYishai Hadas return -EINVAL; 134428d61370SYishai Hadas } 134528d61370SYishai Hadas 134628d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 134728d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 134828d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 134928d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 135028d61370SYishai Hadas return -EOPNOTSUPP; 135128d61370SYishai Hadas } 135228d61370SYishai Hadas 135328d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 135428d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 135528d61370SYishai Hadas return -EFAULT; 135628d61370SYishai Hadas } 135728d61370SYishai Hadas 135828d61370SYishai Hadas if (ucmd.comp_mask) { 135928d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 136028d61370SYishai Hadas return -EOPNOTSUPP; 136128d61370SYishai Hadas } 136228d61370SYishai Hadas 136328d61370SYishai Hadas if (memchr_inv(ucmd.reserved, 0, sizeof(ucmd.reserved)) || ucmd.reserved1) { 136428d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid reserved\n"); 136528d61370SYishai Hadas return -EOPNOTSUPP; 136628d61370SYishai Hadas } 136728d61370SYishai Hadas 136828d61370SYishai Hadas err = ib_copy_to_udata(udata, &resp, min_resp_len); 136928d61370SYishai Hadas if (err) { 137028d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 137128d61370SYishai Hadas return -EINVAL; 137228d61370SYishai Hadas } 137328d61370SYishai Hadas 137428d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 137528d61370SYishai Hadas in = mlx5_vzalloc(inlen); 137628d61370SYishai Hadas if (!in) 137728d61370SYishai Hadas return -ENOMEM; 137828d61370SYishai Hadas 137928d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 138028d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 138128d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 138228d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 138328d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 138428d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 138528d61370SYishai Hadas 138628d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 138728d61370SYishai Hadas switch (ucmd.rx_hash_function) { 138828d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 138928d61370SYishai Hadas { 139028d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 139128d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 139228d61370SYishai Hadas 139328d61370SYishai Hadas if (len != ucmd.rx_key_len) { 139428d61370SYishai Hadas err = -EINVAL; 139528d61370SYishai Hadas goto err; 139628d61370SYishai Hadas } 139728d61370SYishai Hadas 139828d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 139928d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 140028d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 140128d61370SYishai Hadas break; 140228d61370SYishai Hadas } 140328d61370SYishai Hadas default: 140428d61370SYishai Hadas err = -EOPNOTSUPP; 140528d61370SYishai Hadas goto err; 140628d61370SYishai Hadas } 140728d61370SYishai Hadas 140828d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 140928d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 141028d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 141128d61370SYishai Hadas goto create_tir; 141228d61370SYishai Hadas err = -EINVAL; 141328d61370SYishai Hadas goto err; 141428d61370SYishai Hadas } 141528d61370SYishai Hadas 141628d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 141728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 141828d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 141928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 142028d61370SYishai Hadas err = -EINVAL; 142128d61370SYishai Hadas goto err; 142228d61370SYishai Hadas } 142328d61370SYishai Hadas 142428d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 142528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 142628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 142728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 142828d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 142928d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 143028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 143128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 143228d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 143328d61370SYishai Hadas 143428d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 143528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) && 143628d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 143728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))) { 143828d61370SYishai Hadas err = -EINVAL; 143928d61370SYishai Hadas goto err; 144028d61370SYishai Hadas } 144128d61370SYishai Hadas 144228d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 144328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 144428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 144528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 144628d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 144728d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 144828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 144928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 145028d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 145128d61370SYishai Hadas 145228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 145328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 145428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 145528d61370SYishai Hadas 145628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 145728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 145828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 145928d61370SYishai Hadas 146028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 146128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 146228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 146328d61370SYishai Hadas 146428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 146528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 146628d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 146728d61370SYishai Hadas 146828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 146928d61370SYishai Hadas 147028d61370SYishai Hadas create_tir: 147128d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 147228d61370SYishai Hadas 147328d61370SYishai Hadas if (err) 147428d61370SYishai Hadas goto err; 147528d61370SYishai Hadas 147628d61370SYishai Hadas kvfree(in); 147728d61370SYishai Hadas /* qpn is reserved for that QP */ 147828d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1479d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 148028d61370SYishai Hadas return 0; 148128d61370SYishai Hadas 148228d61370SYishai Hadas err: 148328d61370SYishai Hadas kvfree(in); 148428d61370SYishai Hadas return err; 148528d61370SYishai Hadas } 148628d61370SYishai Hadas 1487e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1488e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1489e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1490e126ba97SEli Cohen { 1491e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 149209a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1493938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 1494e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 149589ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 149689ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 149789ea94a7SMaor Gottlieb unsigned long flags; 1498cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 149909a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 150009a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1501cfb5e088SHaggai Abramovsky void *qpc; 150209a7d9ecSSaeed Mahameed u32 *in; 150309a7d9ecSSaeed Mahameed int err; 1504e126ba97SEli Cohen 15050fb2ed66Smajd@mellanox.com base = init_attr->qp_type == IB_QPT_RAW_PACKET ? 15060fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 15070fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 15080fb2ed66Smajd@mellanox.com 1509e126ba97SEli Cohen mutex_init(&qp->mutex); 1510e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1511e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1512e126ba97SEli Cohen 151328d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 151428d61370SYishai Hadas if (!udata) 151528d61370SYishai Hadas return -ENOSYS; 151628d61370SYishai Hadas 151728d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 151828d61370SYishai Hadas return err; 151928d61370SYishai Hadas } 152028d61370SYishai Hadas 1521f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1522938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1523f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1524f360d88aSEli Cohen return -EINVAL; 1525f360d88aSEli Cohen } else { 1526f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1527f360d88aSEli Cohen } 1528f360d88aSEli Cohen } 1529f360d88aSEli Cohen 1530051f2630SLeon Romanovsky if (init_attr->create_flags & 1531051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1532051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1533051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1534051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1535051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1536051f2630SLeon Romanovsky return -EINVAL; 1537051f2630SLeon Romanovsky } 1538051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1539051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1540051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1541051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1542051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1543051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1544051f2630SLeon Romanovsky } 1545f0313965SErez Shitrit 1546f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1547f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1548f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1549f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1550f0313965SErez Shitrit return -EOPNOTSUPP; 1551f0313965SErez Shitrit } 1552f0313965SErez Shitrit 1553358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1554358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1555358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1556358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1557358e42eaSMajd Dibbiny } 1558358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1559358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1560358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1561358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1562358e42eaSMajd Dibbiny } 1563358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1564358e42eaSMajd Dibbiny } 1565358e42eaSMajd Dibbiny 1566e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1567e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1568e126ba97SEli Cohen 1569e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1570e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1571e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1572e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1573e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1574e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1575e4cc4fa7SNoa Osherovich } 1576e4cc4fa7SNoa Osherovich 1577e126ba97SEli Cohen if (pd && pd->uobject) { 1578e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1579e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1580e126ba97SEli Cohen return -EFAULT; 1581e126ba97SEli Cohen } 1582e126ba97SEli Cohen 1583cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1584cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1585cfb5e088SHaggai Abramovsky if (err) 1586cfb5e088SHaggai Abramovsky return err; 1587cfb5e088SHaggai Abramovsky 1588e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1589e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1590e126ba97SEli Cohen } else { 1591e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1592e126ba97SEli Cohen } 1593e126ba97SEli Cohen 1594e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1595e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1596e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1597e126ba97SEli Cohen if (err) { 1598e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1599e126ba97SEli Cohen return err; 1600e126ba97SEli Cohen } 1601e126ba97SEli Cohen 1602e126ba97SEli Cohen if (pd) { 1603e126ba97SEli Cohen if (pd->uobject) { 1604938fe83cSSaeed Mahameed __u32 max_wqes = 1605938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1606e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1607e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1608e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1609e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1610e126ba97SEli Cohen return -EINVAL; 1611e126ba97SEli Cohen } 1612938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1613e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1614938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1615e126ba97SEli Cohen return -EINVAL; 1616e126ba97SEli Cohen } 1617b11a4f9cSHaggai Eran if (init_attr->create_flags & 1618b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1619b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1620b11a4f9cSHaggai Eran return -EINVAL; 1621b11a4f9cSHaggai Eran } 16220fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 16230fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1624e126ba97SEli Cohen if (err) 1625e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1626e126ba97SEli Cohen } else { 162719098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 162819098df2Smajd@mellanox.com base); 1629e126ba97SEli Cohen if (err) 1630e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1631e126ba97SEli Cohen } 1632e126ba97SEli Cohen 1633e126ba97SEli Cohen if (err) 1634e126ba97SEli Cohen return err; 1635e126ba97SEli Cohen } else { 163609a7d9ecSSaeed Mahameed in = mlx5_vzalloc(inlen); 1637e126ba97SEli Cohen if (!in) 1638e126ba97SEli Cohen return -ENOMEM; 1639e126ba97SEli Cohen 1640e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1641e126ba97SEli Cohen } 1642e126ba97SEli Cohen 1643e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1644e126ba97SEli Cohen qp->port = init_attr->port_num; 1645e126ba97SEli Cohen 164609a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 164709a7d9ecSSaeed Mahameed 164809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, st, to_mlx5_st(init_attr->qp_type)); 164909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1650e126ba97SEli Cohen 1651e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 165209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1653e126ba97SEli Cohen else 165409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 165509a7d9ecSSaeed Mahameed 1656e126ba97SEli Cohen 1657e126ba97SEli Cohen if (qp->wq_sig) 165809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1659e126ba97SEli Cohen 1660f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 166109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1662f360d88aSEli Cohen 1663051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 166409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1665051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 166609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1667051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 166809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1669051f2630SLeon Romanovsky 1670e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1671e126ba97SEli Cohen int rcqe_sz; 1672e126ba97SEli Cohen int scqe_sz; 1673e126ba97SEli Cohen 1674e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1675e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1676e126ba97SEli Cohen 1677e126ba97SEli Cohen if (rcqe_sz == 128) 167809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1679e126ba97SEli Cohen else 168009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1681e126ba97SEli Cohen 1682e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1683e126ba97SEli Cohen if (scqe_sz == 128) 168409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1685e126ba97SEli Cohen else 168609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1687e126ba97SEli Cohen } 1688e126ba97SEli Cohen } 1689e126ba97SEli Cohen 1690e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 169109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 169209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1693e126ba97SEli Cohen } 1694e126ba97SEli Cohen 169509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1696e126ba97SEli Cohen 1697e126ba97SEli Cohen if (qp->sq.wqe_cnt) 169809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 1699e126ba97SEli Cohen else 170009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 1701e126ba97SEli Cohen 1702e126ba97SEli Cohen /* Set default resources */ 1703e126ba97SEli Cohen switch (init_attr->qp_type) { 1704e126ba97SEli Cohen case IB_QPT_XRC_TGT: 170509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 170609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 170709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 170809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1709e126ba97SEli Cohen break; 1710e126ba97SEli Cohen case IB_QPT_XRC_INI: 171109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 171209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 171309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1714e126ba97SEli Cohen break; 1715e126ba97SEli Cohen default: 1716e126ba97SEli Cohen if (init_attr->srq) { 171709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 171809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1719e126ba97SEli Cohen } else { 172009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 172109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1722e126ba97SEli Cohen } 1723e126ba97SEli Cohen } 1724e126ba97SEli Cohen 1725e126ba97SEli Cohen if (init_attr->send_cq) 172609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1727e126ba97SEli Cohen 1728e126ba97SEli Cohen if (init_attr->recv_cq) 172909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1730e126ba97SEli Cohen 173109a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1732e126ba97SEli Cohen 1733cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 173409a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1735cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 173609a7d9ecSSaeed Mahameed 1737f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1738f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1739f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1740f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1741f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1742f0313965SErez Shitrit } 1743cfb5e088SHaggai Abramovsky 17440fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 17450fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 17460fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 17470fb2ed66Smajd@mellanox.com err = create_raw_packet_qp(dev, qp, in, pd); 17480fb2ed66Smajd@mellanox.com } else { 174919098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 17500fb2ed66Smajd@mellanox.com } 17510fb2ed66Smajd@mellanox.com 1752e126ba97SEli Cohen if (err) { 1753e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1754e126ba97SEli Cohen goto err_create; 1755e126ba97SEli Cohen } 1756e126ba97SEli Cohen 1757479163f4SAl Viro kvfree(in); 1758e126ba97SEli Cohen 175919098df2Smajd@mellanox.com base->container_mibqp = qp; 176019098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1761e126ba97SEli Cohen 176289ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 176389ea94a7SMaor Gottlieb &send_cq, &recv_cq); 176489ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 176589ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 176689ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 176789ea94a7SMaor Gottlieb * flow 176889ea94a7SMaor Gottlieb */ 176989ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 177089ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 177189ea94a7SMaor Gottlieb */ 177289ea94a7SMaor Gottlieb if (send_cq) 177389ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 177489ea94a7SMaor Gottlieb if (recv_cq) 177589ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 177689ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 177789ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 177889ea94a7SMaor Gottlieb 1779e126ba97SEli Cohen return 0; 1780e126ba97SEli Cohen 1781e126ba97SEli Cohen err_create: 1782e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 1783b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 1784e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1785e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1786e126ba97SEli Cohen 1787479163f4SAl Viro kvfree(in); 1788e126ba97SEli Cohen return err; 1789e126ba97SEli Cohen } 1790e126ba97SEli Cohen 1791e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1792e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1793e126ba97SEli Cohen { 1794e126ba97SEli Cohen if (send_cq) { 1795e126ba97SEli Cohen if (recv_cq) { 1796e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 179789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1798e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1799e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1800e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 180189ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1802e126ba97SEli Cohen __acquire(&recv_cq->lock); 1803e126ba97SEli Cohen } else { 180489ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 1805e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1806e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1807e126ba97SEli Cohen } 1808e126ba97SEli Cohen } else { 180989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 18106a4f139aSEli Cohen __acquire(&recv_cq->lock); 1811e126ba97SEli Cohen } 1812e126ba97SEli Cohen } else if (recv_cq) { 181389ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 18146a4f139aSEli Cohen __acquire(&send_cq->lock); 18156a4f139aSEli Cohen } else { 18166a4f139aSEli Cohen __acquire(&send_cq->lock); 18176a4f139aSEli Cohen __acquire(&recv_cq->lock); 1818e126ba97SEli Cohen } 1819e126ba97SEli Cohen } 1820e126ba97SEli Cohen 1821e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1822e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 1823e126ba97SEli Cohen { 1824e126ba97SEli Cohen if (send_cq) { 1825e126ba97SEli Cohen if (recv_cq) { 1826e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 1827e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 182889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1829e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 1830e126ba97SEli Cohen __release(&recv_cq->lock); 183189ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1832e126ba97SEli Cohen } else { 1833e126ba97SEli Cohen spin_unlock(&send_cq->lock); 183489ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 1835e126ba97SEli Cohen } 1836e126ba97SEli Cohen } else { 18376a4f139aSEli Cohen __release(&recv_cq->lock); 183889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 1839e126ba97SEli Cohen } 1840e126ba97SEli Cohen } else if (recv_cq) { 18416a4f139aSEli Cohen __release(&send_cq->lock); 184289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 18436a4f139aSEli Cohen } else { 18446a4f139aSEli Cohen __release(&recv_cq->lock); 18456a4f139aSEli Cohen __release(&send_cq->lock); 1846e126ba97SEli Cohen } 1847e126ba97SEli Cohen } 1848e126ba97SEli Cohen 1849e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 1850e126ba97SEli Cohen { 1851e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 1852e126ba97SEli Cohen } 1853e126ba97SEli Cohen 185489ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 185589ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 1856e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 1857e126ba97SEli Cohen { 185889ea94a7SMaor Gottlieb switch (qp_type) { 1859e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1860e126ba97SEli Cohen *send_cq = NULL; 1861e126ba97SEli Cohen *recv_cq = NULL; 1862e126ba97SEli Cohen break; 1863e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 1864e126ba97SEli Cohen case IB_QPT_XRC_INI: 186589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 1866e126ba97SEli Cohen *recv_cq = NULL; 1867e126ba97SEli Cohen break; 1868e126ba97SEli Cohen 1869e126ba97SEli Cohen case IB_QPT_SMI: 1870d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 1871e126ba97SEli Cohen case IB_QPT_RC: 1872e126ba97SEli Cohen case IB_QPT_UC: 1873e126ba97SEli Cohen case IB_QPT_UD: 1874e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 1875e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 18760fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 187789ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 187889ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 1879e126ba97SEli Cohen break; 1880e126ba97SEli Cohen 1881e126ba97SEli Cohen case IB_QPT_MAX: 1882e126ba97SEli Cohen default: 1883e126ba97SEli Cohen *send_cq = NULL; 1884e126ba97SEli Cohen *recv_cq = NULL; 1885e126ba97SEli Cohen break; 1886e126ba97SEli Cohen } 1887e126ba97SEli Cohen } 1888e126ba97SEli Cohen 1889ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 189013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 189113eab21fSAviv Heller u8 lag_tx_affinity); 1892ad5f8e96Smajd@mellanox.com 1893e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1894e126ba97SEli Cohen { 1895e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 189619098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 189789ea94a7SMaor Gottlieb unsigned long flags; 1898e126ba97SEli Cohen int err; 1899e126ba97SEli Cohen 190028d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 190128d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 190228d61370SYishai Hadas return; 190328d61370SYishai Hadas } 190428d61370SYishai Hadas 19050fb2ed66Smajd@mellanox.com base = qp->ibqp.qp_type == IB_QPT_RAW_PACKET ? 19060fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 19070fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 19080fb2ed66Smajd@mellanox.com 19096aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 1910ad5f8e96Smajd@mellanox.com if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET) { 1911ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 19121a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 19131a412fb1SSaeed Mahameed NULL, &base->mqp); 1914ad5f8e96Smajd@mellanox.com } else { 19150680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 19160680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 19170680efa2SAlex Vesker }; 19180680efa2SAlex Vesker 191913eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 1920ad5f8e96Smajd@mellanox.com } 1921ad5f8e96Smajd@mellanox.com if (err) 1922427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 192319098df2Smajd@mellanox.com base->mqp.qpn); 19246aec21f6SHaggai Eran } 1925e126ba97SEli Cohen 192689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 192789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 192889ea94a7SMaor Gottlieb 192989ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 193089ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 193189ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 193289ea94a7SMaor Gottlieb list_del(&qp->qps_list); 193389ea94a7SMaor Gottlieb if (send_cq) 193489ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 193589ea94a7SMaor Gottlieb 193689ea94a7SMaor Gottlieb if (recv_cq) 193789ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 1938e126ba97SEli Cohen 1939e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 194019098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 1941e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 1942e126ba97SEli Cohen if (send_cq != recv_cq) 194319098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 194419098df2Smajd@mellanox.com NULL); 1945e126ba97SEli Cohen } 194689ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 194789ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 1948e126ba97SEli Cohen 19490fb2ed66Smajd@mellanox.com if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET) { 19500fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 19510fb2ed66Smajd@mellanox.com } else { 195219098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 1953e126ba97SEli Cohen if (err) 19540fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 19550fb2ed66Smajd@mellanox.com base->mqp.qpn); 19560fb2ed66Smajd@mellanox.com } 1957e126ba97SEli Cohen 1958e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 1959e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1960e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 1961b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 1962e126ba97SEli Cohen } 1963e126ba97SEli Cohen 1964e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 1965e126ba97SEli Cohen { 1966e126ba97SEli Cohen switch (type) { 1967e126ba97SEli Cohen case IB_QPT_SMI: 1968e126ba97SEli Cohen return "IB_QPT_SMI"; 1969e126ba97SEli Cohen case IB_QPT_GSI: 1970e126ba97SEli Cohen return "IB_QPT_GSI"; 1971e126ba97SEli Cohen case IB_QPT_RC: 1972e126ba97SEli Cohen return "IB_QPT_RC"; 1973e126ba97SEli Cohen case IB_QPT_UC: 1974e126ba97SEli Cohen return "IB_QPT_UC"; 1975e126ba97SEli Cohen case IB_QPT_UD: 1976e126ba97SEli Cohen return "IB_QPT_UD"; 1977e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 1978e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 1979e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 1980e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 1981e126ba97SEli Cohen case IB_QPT_XRC_INI: 1982e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 1983e126ba97SEli Cohen case IB_QPT_XRC_TGT: 1984e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 1985e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 1986e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 1987e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 1988e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 1989e126ba97SEli Cohen case IB_QPT_MAX: 1990e126ba97SEli Cohen default: 1991e126ba97SEli Cohen return "Invalid QP type"; 1992e126ba97SEli Cohen } 1993e126ba97SEli Cohen } 1994e126ba97SEli Cohen 1995e126ba97SEli Cohen struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 1996e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1997e126ba97SEli Cohen struct ib_udata *udata) 1998e126ba97SEli Cohen { 1999e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2000e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2001e126ba97SEli Cohen u16 xrcdn = 0; 2002e126ba97SEli Cohen int err; 2003e126ba97SEli Cohen 2004e126ba97SEli Cohen if (pd) { 2005e126ba97SEli Cohen dev = to_mdev(pd->device); 20060fb2ed66Smajd@mellanox.com 20070fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 20080fb2ed66Smajd@mellanox.com if (!pd->uobject) { 20090fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 20100fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 20110fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 20120fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 20130fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 20140fb2ed66Smajd@mellanox.com } 20150fb2ed66Smajd@mellanox.com } 201609f16cf5SMajd Dibbiny } else { 201709f16cf5SMajd Dibbiny /* being cautious here */ 201809f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 201909f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 202009f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 202109f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 202209f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 202309f16cf5SMajd Dibbiny } 202409f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2025e126ba97SEli Cohen } 2026e126ba97SEli Cohen 2027e126ba97SEli Cohen switch (init_attr->qp_type) { 2028e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2029e126ba97SEli Cohen case IB_QPT_XRC_INI: 2030938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2031e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2032e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2033e126ba97SEli Cohen } 2034e126ba97SEli Cohen init_attr->recv_cq = NULL; 2035e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2036e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2037e126ba97SEli Cohen init_attr->send_cq = NULL; 2038e126ba97SEli Cohen } 2039e126ba97SEli Cohen 2040e126ba97SEli Cohen /* fall through */ 20410fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2042e126ba97SEli Cohen case IB_QPT_RC: 2043e126ba97SEli Cohen case IB_QPT_UC: 2044e126ba97SEli Cohen case IB_QPT_UD: 2045e126ba97SEli Cohen case IB_QPT_SMI: 2046d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2047e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2048e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2049e126ba97SEli Cohen if (!qp) 2050e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2051e126ba97SEli Cohen 2052e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2053e126ba97SEli Cohen if (err) { 2054e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2055e126ba97SEli Cohen kfree(qp); 2056e126ba97SEli Cohen return ERR_PTR(err); 2057e126ba97SEli Cohen } 2058e126ba97SEli Cohen 2059e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2060e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2061e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2062e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2063e126ba97SEli Cohen else 206419098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2065e126ba97SEli Cohen 2066e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 206719098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2068a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2069a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2070e126ba97SEli Cohen 207119098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2072e126ba97SEli Cohen 2073e126ba97SEli Cohen break; 2074e126ba97SEli Cohen 2075d16e91daSHaggai Eran case IB_QPT_GSI: 2076d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2077d16e91daSHaggai Eran 2078e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2079e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2080e126ba97SEli Cohen case IB_QPT_MAX: 2081e126ba97SEli Cohen default: 2082e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2083e126ba97SEli Cohen init_attr->qp_type); 2084e126ba97SEli Cohen /* Don't support raw QPs */ 2085e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2086e126ba97SEli Cohen } 2087e126ba97SEli Cohen 2088e126ba97SEli Cohen return &qp->ibqp; 2089e126ba97SEli Cohen } 2090e126ba97SEli Cohen 2091e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2092e126ba97SEli Cohen { 2093e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2094e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2095e126ba97SEli Cohen 2096d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2097d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2098d16e91daSHaggai Eran 2099e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2100e126ba97SEli Cohen 2101e126ba97SEli Cohen kfree(mqp); 2102e126ba97SEli Cohen 2103e126ba97SEli Cohen return 0; 2104e126ba97SEli Cohen } 2105e126ba97SEli Cohen 2106e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2107e126ba97SEli Cohen int attr_mask) 2108e126ba97SEli Cohen { 2109e126ba97SEli Cohen u32 hw_access_flags = 0; 2110e126ba97SEli Cohen u8 dest_rd_atomic; 2111e126ba97SEli Cohen u32 access_flags; 2112e126ba97SEli Cohen 2113e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2114e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2115e126ba97SEli Cohen else 211619098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2117e126ba97SEli Cohen 2118e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2119e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2120e126ba97SEli Cohen else 212119098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2122e126ba97SEli Cohen 2123e126ba97SEli Cohen if (!dest_rd_atomic) 2124e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2125e126ba97SEli Cohen 2126e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2127e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2128e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2129e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2130e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2131e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2132e126ba97SEli Cohen 2133e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2134e126ba97SEli Cohen } 2135e126ba97SEli Cohen 2136e126ba97SEli Cohen enum { 2137e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2138e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2139e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2140e126ba97SEli Cohen }; 2141e126ba97SEli Cohen 2142e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2143e126ba97SEli Cohen { 2144e126ba97SEli Cohen if (rate == IB_RATE_PORT_CURRENT) { 2145e126ba97SEli Cohen return 0; 2146e126ba97SEli Cohen } else if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) { 2147e126ba97SEli Cohen return -EINVAL; 2148e126ba97SEli Cohen } else { 2149e126ba97SEli Cohen while (rate != IB_RATE_2_5_GBPS && 2150e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2151938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2152e126ba97SEli Cohen --rate; 2153e126ba97SEli Cohen } 2154e126ba97SEli Cohen 2155e126ba97SEli Cohen return rate + MLX5_STAT_RATE_OFFSET; 2156e126ba97SEli Cohen } 2157e126ba97SEli Cohen 215875850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 215975850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 216075850d0bSmajd@mellanox.com { 216175850d0bSmajd@mellanox.com void *in; 216275850d0bSmajd@mellanox.com void *tisc; 216375850d0bSmajd@mellanox.com int inlen; 216475850d0bSmajd@mellanox.com int err; 216575850d0bSmajd@mellanox.com 216675850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 216775850d0bSmajd@mellanox.com in = mlx5_vzalloc(inlen); 216875850d0bSmajd@mellanox.com if (!in) 216975850d0bSmajd@mellanox.com return -ENOMEM; 217075850d0bSmajd@mellanox.com 217175850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 217275850d0bSmajd@mellanox.com 217375850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 217475850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 217575850d0bSmajd@mellanox.com 217675850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 217775850d0bSmajd@mellanox.com 217875850d0bSmajd@mellanox.com kvfree(in); 217975850d0bSmajd@mellanox.com 218075850d0bSmajd@mellanox.com return err; 218175850d0bSmajd@mellanox.com } 218275850d0bSmajd@mellanox.com 218313eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 218413eab21fSAviv Heller struct mlx5_ib_sq *sq, u8 tx_affinity) 218513eab21fSAviv Heller { 218613eab21fSAviv Heller void *in; 218713eab21fSAviv Heller void *tisc; 218813eab21fSAviv Heller int inlen; 218913eab21fSAviv Heller int err; 219013eab21fSAviv Heller 219113eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 219213eab21fSAviv Heller in = mlx5_vzalloc(inlen); 219313eab21fSAviv Heller if (!in) 219413eab21fSAviv Heller return -ENOMEM; 219513eab21fSAviv Heller 219613eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 219713eab21fSAviv Heller 219813eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 219913eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 220013eab21fSAviv Heller 220113eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 220213eab21fSAviv Heller 220313eab21fSAviv Heller kvfree(in); 220413eab21fSAviv Heller 220513eab21fSAviv Heller return err; 220613eab21fSAviv Heller } 220713eab21fSAviv Heller 220875850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 220990898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2210e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2211f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2212f879ee8dSAchiad Shochat bool alt) 2213e126ba97SEli Cohen { 2214d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2215e126ba97SEli Cohen int err; 2216ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2217d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2218d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2219e126ba97SEli Cohen 2220e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2221f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2222f879ee8dSAchiad Shochat attr->pkey_index); 2223e126ba97SEli Cohen 2224d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2225d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2226938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2227f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2228d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2229938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2230f83b4263SEli Cohen return -EINVAL; 2231f83b4263SEli Cohen } 22322811ba51SAchiad Shochat } 223344c58487SDasaratharaman Chandramouli 223444c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2235d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 22362811ba51SAchiad Shochat return -EINVAL; 2237d8966fcdSDasaratharaman Chandramouli err = mlx5_get_roce_gid_type(dev, port, grh->sgid_index, 2238ed88451eSMajd Dibbiny &gid_type); 2239ed88451eSMajd Dibbiny if (err) 2240ed88451eSMajd Dibbiny return err; 224144c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 22422811ba51SAchiad Shochat path->udp_sport = mlx5_get_roce_udp_sport(dev, port, 2243d8966fcdSDasaratharaman Chandramouli grh->sgid_index); 2244d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 2245ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2246d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 22472811ba51SAchiad Shochat } else { 2248d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2249d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2250d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2251d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2252d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2253d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2254e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2255d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 22562811ba51SAchiad Shochat } 22572811ba51SAchiad Shochat 2258d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2259d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2260d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2261e126ba97SEli Cohen path->tclass_flowlabel = 2262d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2263d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2264d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2265e126ba97SEli Cohen } 2266e126ba97SEli Cohen 2267d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2268e126ba97SEli Cohen if (err < 0) 2269e126ba97SEli Cohen return err; 2270e126ba97SEli Cohen path->static_rate = err; 2271e126ba97SEli Cohen path->port = port; 2272e126ba97SEli Cohen 2273e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2274f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2275e126ba97SEli Cohen 227675850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 227775850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 227875850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 2279d8966fcdSDasaratharaman Chandramouli sl & 0xf); 228075850d0bSmajd@mellanox.com 2281e126ba97SEli Cohen return 0; 2282e126ba97SEli Cohen } 2283e126ba97SEli Cohen 2284e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2285e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2286e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2287e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2288e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2289e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2290e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2291e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2292e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2293e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2294e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2295e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2296e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2297e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2298e126ba97SEli Cohen }, 2299e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2300e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2301e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2302e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2303e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2304e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2305e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2306e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2307e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2308e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2309e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2310e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2311e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2312a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2313a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2314a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2315a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2316a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2317e126ba97SEli Cohen }, 2318e126ba97SEli Cohen }, 2319e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2320e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2321e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2322e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2323e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2324e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2325e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2326e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2327e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2328e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2329e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2330e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2331e126ba97SEli Cohen }, 2332e126ba97SEli Cohen }, 2333e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2334e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2335e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2336e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2337e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2338e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2339c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2340c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2341e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2342c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2343c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2344e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2345e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2346e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2347e126ba97SEli Cohen }, 2348e126ba97SEli Cohen }, 2349e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2350e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2351e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2352e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 235375959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2354a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2355a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2356a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2357a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2358e126ba97SEli Cohen }, 2359e126ba97SEli Cohen }, 2360e126ba97SEli Cohen }; 2361e126ba97SEli Cohen 2362e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2363e126ba97SEli Cohen { 2364e126ba97SEli Cohen switch (ib_mask) { 2365e126ba97SEli Cohen case IB_QP_STATE: 2366e126ba97SEli Cohen return 0; 2367e126ba97SEli Cohen case IB_QP_CUR_STATE: 2368e126ba97SEli Cohen return 0; 2369e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2370e126ba97SEli Cohen return 0; 2371e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2372e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2373e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2374e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2375e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2376e126ba97SEli Cohen case IB_QP_PORT: 2377e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2378e126ba97SEli Cohen case IB_QP_QKEY: 2379e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2380e126ba97SEli Cohen case IB_QP_AV: 2381e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2382e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2383e126ba97SEli Cohen case IB_QP_PATH_MTU: 2384e126ba97SEli Cohen return 0; 2385e126ba97SEli Cohen case IB_QP_TIMEOUT: 2386e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2387e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2388e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2389e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2390e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2391e126ba97SEli Cohen case IB_QP_RQ_PSN: 2392e126ba97SEli Cohen return 0; 2393e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2394e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2395e126ba97SEli Cohen case IB_QP_ALT_PATH: 2396e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2397e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2398e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2399e126ba97SEli Cohen case IB_QP_SQ_PSN: 2400e126ba97SEli Cohen return 0; 2401e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2402e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2403e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2404e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2405e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2406e126ba97SEli Cohen case IB_QP_CAP: 2407e126ba97SEli Cohen return 0; 2408e126ba97SEli Cohen case IB_QP_DEST_QPN: 2409e126ba97SEli Cohen return 0; 2410e126ba97SEli Cohen } 2411e126ba97SEli Cohen return 0; 2412e126ba97SEli Cohen } 2413e126ba97SEli Cohen 2414e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2415e126ba97SEli Cohen { 2416e126ba97SEli Cohen int result = 0; 2417e126ba97SEli Cohen int i; 2418e126ba97SEli Cohen 2419e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2420e126ba97SEli Cohen if ((1 << i) & ib_mask) 2421e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2422e126ba97SEli Cohen } 2423e126ba97SEli Cohen 2424e126ba97SEli Cohen return result; 2425e126ba97SEli Cohen } 2426e126ba97SEli Cohen 2427eb49ab0cSAlex Vesker static int modify_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 2428eb49ab0cSAlex Vesker struct mlx5_ib_rq *rq, int new_state, 2429eb49ab0cSAlex Vesker const struct mlx5_modify_raw_qp_param *raw_qp_param) 2430ad5f8e96Smajd@mellanox.com { 2431ad5f8e96Smajd@mellanox.com void *in; 2432ad5f8e96Smajd@mellanox.com void *rqc; 2433ad5f8e96Smajd@mellanox.com int inlen; 2434ad5f8e96Smajd@mellanox.com int err; 2435ad5f8e96Smajd@mellanox.com 2436ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 2437ad5f8e96Smajd@mellanox.com in = mlx5_vzalloc(inlen); 2438ad5f8e96Smajd@mellanox.com if (!in) 2439ad5f8e96Smajd@mellanox.com return -ENOMEM; 2440ad5f8e96Smajd@mellanox.com 2441ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2442ad5f8e96Smajd@mellanox.com 2443ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2444ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2445ad5f8e96Smajd@mellanox.com 2446eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2447eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2448eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 244923a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2450eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2451eb49ab0cSAlex Vesker } else 2452eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2453eb49ab0cSAlex Vesker dev->ib_dev.name); 2454eb49ab0cSAlex Vesker } 2455eb49ab0cSAlex Vesker 2456eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2457ad5f8e96Smajd@mellanox.com if (err) 2458ad5f8e96Smajd@mellanox.com goto out; 2459ad5f8e96Smajd@mellanox.com 2460ad5f8e96Smajd@mellanox.com rq->state = new_state; 2461ad5f8e96Smajd@mellanox.com 2462ad5f8e96Smajd@mellanox.com out: 2463ad5f8e96Smajd@mellanox.com kvfree(in); 2464ad5f8e96Smajd@mellanox.com return err; 2465ad5f8e96Smajd@mellanox.com } 2466ad5f8e96Smajd@mellanox.com 2467ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 24687d29f349SBodong Wang struct mlx5_ib_sq *sq, 24697d29f349SBodong Wang int new_state, 24707d29f349SBodong Wang const struct mlx5_modify_raw_qp_param *raw_qp_param) 2471ad5f8e96Smajd@mellanox.com { 24727d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 24737d29f349SBodong Wang u32 old_rate = ibqp->rate_limit; 24747d29f349SBodong Wang u32 new_rate = old_rate; 24757d29f349SBodong Wang u16 rl_index = 0; 2476ad5f8e96Smajd@mellanox.com void *in; 2477ad5f8e96Smajd@mellanox.com void *sqc; 2478ad5f8e96Smajd@mellanox.com int inlen; 2479ad5f8e96Smajd@mellanox.com int err; 2480ad5f8e96Smajd@mellanox.com 2481ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 2482ad5f8e96Smajd@mellanox.com in = mlx5_vzalloc(inlen); 2483ad5f8e96Smajd@mellanox.com if (!in) 2484ad5f8e96Smajd@mellanox.com return -ENOMEM; 2485ad5f8e96Smajd@mellanox.com 2486ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2487ad5f8e96Smajd@mellanox.com 2488ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2489ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2490ad5f8e96Smajd@mellanox.com 24917d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 24927d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 24937d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 24947d29f349SBodong Wang __func__); 24957d29f349SBodong Wang else 24967d29f349SBodong Wang new_rate = raw_qp_param->rate_limit; 24977d29f349SBodong Wang } 2498ad5f8e96Smajd@mellanox.com 24997d29f349SBodong Wang if (old_rate != new_rate) { 25007d29f349SBodong Wang if (new_rate) { 25017d29f349SBodong Wang err = mlx5_rl_add_rate(dev, new_rate, &rl_index); 25027d29f349SBodong Wang if (err) { 25037d29f349SBodong Wang pr_err("Failed configuring rate %u: %d\n", 25047d29f349SBodong Wang new_rate, err); 25057d29f349SBodong Wang goto out; 25067d29f349SBodong Wang } 25077d29f349SBodong Wang } 25087d29f349SBodong Wang 25097d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 25107d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 25117d29f349SBodong Wang } 25127d29f349SBodong Wang 25137d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 25147d29f349SBodong Wang if (err) { 25157d29f349SBodong Wang /* Remove new rate from table if failed */ 25167d29f349SBodong Wang if (new_rate && 25177d29f349SBodong Wang old_rate != new_rate) 25187d29f349SBodong Wang mlx5_rl_remove_rate(dev, new_rate); 25197d29f349SBodong Wang goto out; 25207d29f349SBodong Wang } 25217d29f349SBodong Wang 25227d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 25237d29f349SBodong Wang if ((old_rate && 25247d29f349SBodong Wang (old_rate != new_rate)) || 25257d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 25267d29f349SBodong Wang mlx5_rl_remove_rate(dev, old_rate); 25277d29f349SBodong Wang 25287d29f349SBodong Wang ibqp->rate_limit = new_rate; 2529ad5f8e96Smajd@mellanox.com sq->state = new_state; 2530ad5f8e96Smajd@mellanox.com 2531ad5f8e96Smajd@mellanox.com out: 2532ad5f8e96Smajd@mellanox.com kvfree(in); 2533ad5f8e96Smajd@mellanox.com return err; 2534ad5f8e96Smajd@mellanox.com } 2535ad5f8e96Smajd@mellanox.com 2536ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 253713eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 253813eab21fSAviv Heller u8 tx_affinity) 2539ad5f8e96Smajd@mellanox.com { 2540ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2541ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2542ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 25437d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 25447d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2545ad5f8e96Smajd@mellanox.com int rq_state; 2546ad5f8e96Smajd@mellanox.com int sq_state; 2547ad5f8e96Smajd@mellanox.com int err; 2548ad5f8e96Smajd@mellanox.com 25490680efa2SAlex Vesker switch (raw_qp_param->operation) { 2550ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2551ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2552ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2553ad5f8e96Smajd@mellanox.com break; 2554ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2555ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2556ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2557ad5f8e96Smajd@mellanox.com break; 2558ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2559ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2560ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2561ad5f8e96Smajd@mellanox.com break; 2562ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2563ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 25647d29f349SBodong Wang if (raw_qp_param->set_mask == 25657d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 25667d29f349SBodong Wang modify_rq = 0; 25677d29f349SBodong Wang sq_state = sq->state; 25687d29f349SBodong Wang } else { 25697d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 25707d29f349SBodong Wang } 25717d29f349SBodong Wang break; 25727d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 25737d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2574eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2575eb49ab0cSAlex Vesker return -EINVAL; 2576eb49ab0cSAlex Vesker else 2577ad5f8e96Smajd@mellanox.com return 0; 2578ad5f8e96Smajd@mellanox.com default: 2579ad5f8e96Smajd@mellanox.com WARN_ON(1); 2580ad5f8e96Smajd@mellanox.com return -EINVAL; 2581ad5f8e96Smajd@mellanox.com } 2582ad5f8e96Smajd@mellanox.com 25837d29f349SBodong Wang if (modify_rq) { 2584eb49ab0cSAlex Vesker err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param); 2585ad5f8e96Smajd@mellanox.com if (err) 2586ad5f8e96Smajd@mellanox.com return err; 2587ad5f8e96Smajd@mellanox.com } 2588ad5f8e96Smajd@mellanox.com 25897d29f349SBodong Wang if (modify_sq) { 259013eab21fSAviv Heller if (tx_affinity) { 259113eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 259213eab21fSAviv Heller tx_affinity); 259313eab21fSAviv Heller if (err) 259413eab21fSAviv Heller return err; 259513eab21fSAviv Heller } 259613eab21fSAviv Heller 25977d29f349SBodong Wang return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, raw_qp_param); 259813eab21fSAviv Heller } 2599ad5f8e96Smajd@mellanox.com 2600ad5f8e96Smajd@mellanox.com return 0; 2601ad5f8e96Smajd@mellanox.com } 2602ad5f8e96Smajd@mellanox.com 2603e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2604e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 2605e126ba97SEli Cohen enum ib_qp_state cur_state, enum ib_qp_state new_state) 2606e126ba97SEli Cohen { 2607427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2608427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2609427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2610427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2611427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2612427c1e7bSmajd@mellanox.com }, 2613427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2614427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2615427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2616427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2617427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2618427c1e7bSmajd@mellanox.com }, 2619427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2620427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2621427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2622427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2623427c1e7bSmajd@mellanox.com }, 2624427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2625427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2626427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2627427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2628427c1e7bSmajd@mellanox.com }, 2629427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2630427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2631427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2632427c1e7bSmajd@mellanox.com }, 2633427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2634427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2635427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2636427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2637427c1e7bSmajd@mellanox.com }, 2638427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2639427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2640427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2641427c1e7bSmajd@mellanox.com } 2642427c1e7bSmajd@mellanox.com }; 2643427c1e7bSmajd@mellanox.com 2644e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2645e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 264619098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2647e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2648e126ba97SEli Cohen struct mlx5_qp_context *context; 2649e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2650eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 2651e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2652e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2653e126ba97SEli Cohen int mlx5_st; 2654e126ba97SEli Cohen int err; 2655427c1e7bSmajd@mellanox.com u16 op; 265613eab21fSAviv Heller u8 tx_affinity = 0; 2657e126ba97SEli Cohen 26581a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 26591a412fb1SSaeed Mahameed if (!context) 2660e126ba97SEli Cohen return -ENOMEM; 2661e126ba97SEli Cohen 2662e126ba97SEli Cohen err = to_mlx5_st(ibqp->qp_type); 2663158abf86SHaggai Eran if (err < 0) { 2664158abf86SHaggai Eran mlx5_ib_dbg(dev, "unsupported qp type %d\n", ibqp->qp_type); 2665e126ba97SEli Cohen goto out; 2666158abf86SHaggai Eran } 2667e126ba97SEli Cohen 2668e126ba97SEli Cohen context->flags = cpu_to_be32(err << 16); 2669e126ba97SEli Cohen 2670e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 2671e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2672e126ba97SEli Cohen } else { 2673e126ba97SEli Cohen switch (attr->path_mig_state) { 2674e126ba97SEli Cohen case IB_MIG_MIGRATED: 2675e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2676e126ba97SEli Cohen break; 2677e126ba97SEli Cohen case IB_MIG_REARM: 2678e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 2679e126ba97SEli Cohen break; 2680e126ba97SEli Cohen case IB_MIG_ARMED: 2681e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 2682e126ba97SEli Cohen break; 2683e126ba97SEli Cohen } 2684e126ba97SEli Cohen } 2685e126ba97SEli Cohen 268613eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 268713eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 268813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 268913eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 269013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 269113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 269213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 269313eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 269413eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 269513eab21fSAviv Heller tx_affinity = (unsigned int)atomic_add_return(1, 269613eab21fSAviv Heller &dev->roce.next_port) % 269713eab21fSAviv Heller MLX5_MAX_PORTS + 1; 269813eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 269913eab21fSAviv Heller } 270013eab21fSAviv Heller } 270113eab21fSAviv Heller } 270213eab21fSAviv Heller 2703d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 2704e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 2705e126ba97SEli Cohen } else if (ibqp->qp_type == IB_QPT_UD || 2706e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 2707e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 2708e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 2709e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 2710e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 2711e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 2712e126ba97SEli Cohen err = -EINVAL; 2713e126ba97SEli Cohen goto out; 2714e126ba97SEli Cohen } 2715938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 2716938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 2717e126ba97SEli Cohen } 2718e126ba97SEli Cohen 2719e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 2720e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 2721e126ba97SEli Cohen 2722e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2723d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 2724e126ba97SEli Cohen 2725e126ba97SEli Cohen /* todo implement counter_index functionality */ 2726e126ba97SEli Cohen 2727e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 2728e126ba97SEli Cohen context->pri_path.port = qp->port; 2729e126ba97SEli Cohen 2730e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 2731e126ba97SEli Cohen context->pri_path.port = attr->port_num; 2732e126ba97SEli Cohen 2733e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 273475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 2735e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 2736f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 2737e126ba97SEli Cohen if (err) 2738e126ba97SEli Cohen goto out; 2739e126ba97SEli Cohen } 2740e126ba97SEli Cohen 2741e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2742e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 2743e126ba97SEli Cohen 2744e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 274575850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 274675850d0bSmajd@mellanox.com &context->alt_path, 2747f879ee8dSAchiad Shochat attr->alt_port_num, 2748f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 2749f879ee8dSAchiad Shochat 0, attr, true); 2750e126ba97SEli Cohen if (err) 2751e126ba97SEli Cohen goto out; 2752e126ba97SEli Cohen } 2753e126ba97SEli Cohen 2754e126ba97SEli Cohen pd = get_pd(qp); 275589ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 275689ea94a7SMaor Gottlieb &send_cq, &recv_cq); 2757e126ba97SEli Cohen 2758e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 2759e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 2760e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 2761e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 2762e126ba97SEli Cohen 2763e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 2764e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 2765e126ba97SEli Cohen 2766e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 2767e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 2768e126ba97SEli Cohen 2769e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 2770e126ba97SEli Cohen if (attr->max_rd_atomic) 2771e126ba97SEli Cohen context->params1 |= 2772e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 2773e126ba97SEli Cohen } 2774e126ba97SEli Cohen 2775e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 2776e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 2777e126ba97SEli Cohen 2778e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 2779e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 2780e126ba97SEli Cohen context->params2 |= 2781e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 2782e126ba97SEli Cohen } 2783e126ba97SEli Cohen 2784e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 2785e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 2786e126ba97SEli Cohen 2787e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 2788e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 2789e126ba97SEli Cohen 2790e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 2791e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 2792e126ba97SEli Cohen 2793e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 2794e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 2795e126ba97SEli Cohen 2796e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 2797e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 2798e126ba97SEli Cohen 27990837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 28000837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 28010837e86aSMark Bloch qp->port) - 1; 2802eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 28030837e86aSMark Bloch context->qp_counter_set_usr_page |= 2804e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 28050837e86aSMark Bloch } 28060837e86aSMark Bloch 2807e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 2808e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 2809e126ba97SEli Cohen 2810b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 2811b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 2812e126ba97SEli Cohen 2813e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 2814e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 2815e126ba97SEli Cohen mlx5_st = to_mlx5_st(ibqp->qp_type); 281607c9113fSEli Cohen if (mlx5_st < 0) 2817e126ba97SEli Cohen goto out; 2818e126ba97SEli Cohen 2819427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 2820427c1e7bSmajd@mellanox.com !optab[mlx5_cur][mlx5_new]) 2821427c1e7bSmajd@mellanox.com goto out; 2822427c1e7bSmajd@mellanox.com 2823427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 2824e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 2825e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 2826ad5f8e96Smajd@mellanox.com 28270680efa2SAlex Vesker if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET) { 28280680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 28290680efa2SAlex Vesker 28300680efa2SAlex Vesker raw_qp_param.operation = op; 2831eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 2832e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 2833eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 2834eb49ab0cSAlex Vesker } 28357d29f349SBodong Wang 28367d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 28377d29f349SBodong Wang raw_qp_param.rate_limit = attr->rate_limit; 28387d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 28397d29f349SBodong Wang } 28407d29f349SBodong Wang 284113eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 28420680efa2SAlex Vesker } else { 28431a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 284419098df2Smajd@mellanox.com &base->mqp); 28450680efa2SAlex Vesker } 28460680efa2SAlex Vesker 2847e126ba97SEli Cohen if (err) 2848e126ba97SEli Cohen goto out; 2849e126ba97SEli Cohen 2850e126ba97SEli Cohen qp->state = new_state; 2851e126ba97SEli Cohen 2852e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 285319098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 2854e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 285519098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 2856e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 2857e126ba97SEli Cohen qp->port = attr->port_num; 2858e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 285919098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 2860e126ba97SEli Cohen 2861e126ba97SEli Cohen /* 2862e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 2863e126ba97SEli Cohen * entries and reinitialize the QP. 2864e126ba97SEli Cohen */ 2865e126ba97SEli Cohen if (new_state == IB_QPS_RESET && !ibqp->uobject) { 286619098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2867e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 2868e126ba97SEli Cohen if (send_cq != recv_cq) 286919098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 2870e126ba97SEli Cohen 2871e126ba97SEli Cohen qp->rq.head = 0; 2872e126ba97SEli Cohen qp->rq.tail = 0; 2873e126ba97SEli Cohen qp->sq.head = 0; 2874e126ba97SEli Cohen qp->sq.tail = 0; 2875e126ba97SEli Cohen qp->sq.cur_post = 0; 2876e126ba97SEli Cohen qp->sq.last_poll = 0; 2877e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 2878e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 2879e126ba97SEli Cohen } 2880e126ba97SEli Cohen 2881e126ba97SEli Cohen out: 28821a412fb1SSaeed Mahameed kfree(context); 2883e126ba97SEli Cohen return err; 2884e126ba97SEli Cohen } 2885e126ba97SEli Cohen 2886e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 2887e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 2888e126ba97SEli Cohen { 2889e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2890e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 2891d16e91daSHaggai Eran enum ib_qp_type qp_type; 2892e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 2893e126ba97SEli Cohen int err = -EINVAL; 2894e126ba97SEli Cohen int port; 28952811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 2896e126ba97SEli Cohen 289728d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 289828d61370SYishai Hadas return -ENOSYS; 289928d61370SYishai Hadas 2900d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 2901d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 2902d16e91daSHaggai Eran 2903d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 2904d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 2905d16e91daSHaggai Eran 2906e126ba97SEli Cohen mutex_lock(&qp->mutex); 2907e126ba97SEli Cohen 2908e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 2909e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 2910e126ba97SEli Cohen 29112811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 29122811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 29132811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 29142811ba51SAchiad Shochat } 29152811ba51SAchiad Shochat 2916d16e91daSHaggai Eran if (qp_type != MLX5_IB_QPT_REG_UMR && 2917d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 2918158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 2919158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 2920e126ba97SEli Cohen goto out; 2921158abf86SHaggai Eran } 2922e126ba97SEli Cohen 2923e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 2924938fe83cSSaeed Mahameed (attr->port_num == 0 || 2925158abf86SHaggai Eran attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports))) { 2926158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 2927158abf86SHaggai Eran attr->port_num, dev->num_ports); 2928e126ba97SEli Cohen goto out; 2929158abf86SHaggai Eran } 2930e126ba97SEli Cohen 2931e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 2932e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 2933938fe83cSSaeed Mahameed if (attr->pkey_index >= 2934158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 2935158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 2936158abf86SHaggai Eran attr->pkey_index); 2937e126ba97SEli Cohen goto out; 2938e126ba97SEli Cohen } 2939158abf86SHaggai Eran } 2940e126ba97SEli Cohen 2941e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 2942938fe83cSSaeed Mahameed attr->max_rd_atomic > 2943158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 2944158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 2945158abf86SHaggai Eran attr->max_rd_atomic); 2946e126ba97SEli Cohen goto out; 2947158abf86SHaggai Eran } 2948e126ba97SEli Cohen 2949e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 2950938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 2951158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 2952158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 2953158abf86SHaggai Eran attr->max_dest_rd_atomic); 2954e126ba97SEli Cohen goto out; 2955158abf86SHaggai Eran } 2956e126ba97SEli Cohen 2957e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 2958e126ba97SEli Cohen err = 0; 2959e126ba97SEli Cohen goto out; 2960e126ba97SEli Cohen } 2961e126ba97SEli Cohen 2962e126ba97SEli Cohen err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, new_state); 2963e126ba97SEli Cohen 2964e126ba97SEli Cohen out: 2965e126ba97SEli Cohen mutex_unlock(&qp->mutex); 2966e126ba97SEli Cohen return err; 2967e126ba97SEli Cohen } 2968e126ba97SEli Cohen 2969e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 2970e126ba97SEli Cohen { 2971e126ba97SEli Cohen struct mlx5_ib_cq *cq; 2972e126ba97SEli Cohen unsigned cur; 2973e126ba97SEli Cohen 2974e126ba97SEli Cohen cur = wq->head - wq->tail; 2975e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 2976e126ba97SEli Cohen return 0; 2977e126ba97SEli Cohen 2978e126ba97SEli Cohen cq = to_mcq(ib_cq); 2979e126ba97SEli Cohen spin_lock(&cq->lock); 2980e126ba97SEli Cohen cur = wq->head - wq->tail; 2981e126ba97SEli Cohen spin_unlock(&cq->lock); 2982e126ba97SEli Cohen 2983e126ba97SEli Cohen return cur + nreq >= wq->max_post; 2984e126ba97SEli Cohen } 2985e126ba97SEli Cohen 2986e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 2987e126ba97SEli Cohen u64 remote_addr, u32 rkey) 2988e126ba97SEli Cohen { 2989e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 2990e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 2991e126ba97SEli Cohen rseg->reserved = 0; 2992e126ba97SEli Cohen } 2993e126ba97SEli Cohen 2994f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 2995f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 2996f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 2997f0313965SErez Shitrit { 2998f0313965SErez Shitrit void *seg = eseg; 2999f0313965SErez Shitrit 3000f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3001f0313965SErez Shitrit 3002f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3003f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3004f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3005f0313965SErez Shitrit 3006f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3007f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3008f0313965SErez Shitrit 3009f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3010f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 30112b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3012f0313965SErez Shitrit u64 left, leftlen, copysz; 3013f0313965SErez Shitrit void *pdata = ud_wr->header; 3014f0313965SErez Shitrit 3015f0313965SErez Shitrit left = ud_wr->hlen; 3016f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 30172b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3018f0313965SErez Shitrit 3019f0313965SErez Shitrit /* 3020f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3021f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3022f0313965SErez Shitrit * rollback and than the copy the left 3023f0313965SErez Shitrit */ 30242b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3025f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3026f0313965SErez Shitrit 3027f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3028f0313965SErez Shitrit 3029f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3030f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3031f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3032f0313965SErez Shitrit } 3033f0313965SErez Shitrit 3034f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3035f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3036f0313965SErez Shitrit left -= copysz; 3037f0313965SErez Shitrit pdata += copysz; 3038f0313965SErez Shitrit memcpy(seg, pdata, left); 3039f0313965SErez Shitrit seg += ALIGN(left, 16); 3040f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3041f0313965SErez Shitrit } 3042f0313965SErez Shitrit } 3043f0313965SErez Shitrit 3044f0313965SErez Shitrit return seg; 3045f0313965SErez Shitrit } 3046f0313965SErez Shitrit 3047e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3048e126ba97SEli Cohen struct ib_send_wr *wr) 3049e126ba97SEli Cohen { 3050e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3051e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3052e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3053e126ba97SEli Cohen } 3054e126ba97SEli Cohen 3055e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3056e126ba97SEli Cohen { 3057e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3058e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3059e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3060e126ba97SEli Cohen } 3061e126ba97SEli Cohen 306231616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3063e126ba97SEli Cohen { 306431616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 306531616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3066e126ba97SEli Cohen } 3067e126ba97SEli Cohen 3068e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3069e126ba97SEli Cohen { 3070e126ba97SEli Cohen u64 result; 3071e126ba97SEli Cohen 3072e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3073e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3074e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3075e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3076e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3077e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3078e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3079e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3080e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3081e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3082e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3083e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3084e126ba97SEli Cohen 3085e126ba97SEli Cohen return cpu_to_be64(result); 3086e126ba97SEli Cohen } 3087e126ba97SEli Cohen 3088e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3089e6631814SSagi Grimberg { 3090e6631814SSagi Grimberg u64 result; 3091e6631814SSagi Grimberg 3092e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3093e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3094e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3095d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3096e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3097e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3098e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3099e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3100e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3101e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3102e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3103e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3104e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3105e6631814SSagi Grimberg 3106e6631814SSagi Grimberg return cpu_to_be64(result); 3107e6631814SSagi Grimberg } 3108e6631814SSagi Grimberg 31098a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 31108a187ee5SSagi Grimberg struct mlx5_ib_mr *mr) 31118a187ee5SSagi Grimberg { 311231616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 31138a187ee5SSagi Grimberg 31148a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3115b005d316SSagi Grimberg 31168a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 311731616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 31188a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 31198a187ee5SSagi Grimberg } 31208a187ee5SSagi Grimberg 3121dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3122e126ba97SEli Cohen { 3123e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3124e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 31252d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3126e126ba97SEli Cohen } 3127e126ba97SEli Cohen 312831616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3129e126ba97SEli Cohen { 3130968e78ddSHaggai Eran u64 result; 3131e126ba97SEli Cohen 313231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3133e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3134968e78ddSHaggai Eran 3135968e78ddSHaggai Eran return cpu_to_be64(result); 3136968e78ddSHaggai Eran } 3137968e78ddSHaggai Eran 313831616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3139968e78ddSHaggai Eran { 3140968e78ddSHaggai Eran u64 result; 3141968e78ddSHaggai Eran 3142968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3143968e78ddSHaggai Eran 3144968e78ddSHaggai Eran return cpu_to_be64(result); 3145968e78ddSHaggai Eran } 3146968e78ddSHaggai Eran 314756e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 314856e11d62SNoa Osherovich { 314956e11d62SNoa Osherovich u64 result; 315056e11d62SNoa Osherovich 315156e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 315256e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 315331616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 315456e11d62SNoa Osherovich 315556e11d62SNoa Osherovich return cpu_to_be64(result); 315656e11d62SNoa Osherovich } 315756e11d62SNoa Osherovich 315831616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 315956e11d62SNoa Osherovich { 316056e11d62SNoa Osherovich u64 result; 316156e11d62SNoa Osherovich 316231616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 316331616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 316456e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 316531616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 316631616255SArtemy Kovalyov 316731616255SArtemy Kovalyov if (atomic) 316831616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 316956e11d62SNoa Osherovich 317056e11d62SNoa Osherovich return cpu_to_be64(result); 317156e11d62SNoa Osherovich } 317256e11d62SNoa Osherovich 317356e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 317456e11d62SNoa Osherovich { 317556e11d62SNoa Osherovich u64 result; 317656e11d62SNoa Osherovich 317731616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 317856e11d62SNoa Osherovich 317956e11d62SNoa Osherovich return cpu_to_be64(result); 318056e11d62SNoa Osherovich } 318156e11d62SNoa Osherovich 3182968e78ddSHaggai Eran static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 3183578e7264SMaor Gottlieb struct ib_send_wr *wr, int atomic) 3184968e78ddSHaggai Eran { 3185e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3186968e78ddSHaggai Eran 3187968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3188968e78ddSHaggai Eran 3189968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3190968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3191968e78ddSHaggai Eran else 3192968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3193968e78ddSHaggai Eran 319431616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 319531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 319631616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 319731616255SArtemy Kovalyov 319831616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 319931616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3200968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3201968e78ddSHaggai Eran } 320256e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 320356e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 320431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 320531616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 320656e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3207e126ba97SEli Cohen } 320831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 320931616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 321031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 321131616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3212e126ba97SEli Cohen 3213e126ba97SEli Cohen if (!wr->num_sge) 3214968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3215e126ba97SEli Cohen } 3216e126ba97SEli Cohen 3217e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3218e126ba97SEli Cohen { 3219e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3220e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3221e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3222e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 32232ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3224e126ba97SEli Cohen } 3225e126ba97SEli Cohen 32268a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 32278a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 32288a187ee5SSagi Grimberg u32 key, int access) 32298a187ee5SSagi Grimberg { 32308a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 32318a187ee5SSagi Grimberg 32328a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3233b005d316SSagi Grimberg 3234ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3235b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3236ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3237b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3238b005d316SSagi Grimberg ndescs *= 2; 3239b005d316SSagi Grimberg 3240b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 32418a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 32428a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 32438a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 32448a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 32458a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 32468a187ee5SSagi Grimberg } 32478a187ee5SSagi Grimberg 3248dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3249e126ba97SEli Cohen { 3250e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3251968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3252e126ba97SEli Cohen } 3253e126ba97SEli Cohen 3254e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 3255e126ba97SEli Cohen { 3256e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3257968e78ddSHaggai Eran 3258e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 325931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3260968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3261e126ba97SEli Cohen 3262968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 326356e11d62SNoa Osherovich if (umrwr->pd) 3264968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 326531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 326631616255SArtemy Kovalyov !umrwr->length) 326731616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 326831616255SArtemy Kovalyov 326931616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3270968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3271968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3272746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3273968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3274e126ba97SEli Cohen } 3275e126ba97SEli Cohen 32768a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 32778a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 32788a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 32798a187ee5SSagi Grimberg { 32808a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 32818a187ee5SSagi Grimberg 32828a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 32838a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 32848a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 32858a187ee5SSagi Grimberg } 32868a187ee5SSagi Grimberg 3287e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 3288e126ba97SEli Cohen { 3289e126ba97SEli Cohen switch (wr->opcode) { 3290e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3291e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3292e126ba97SEli Cohen return wr->ex.imm_data; 3293e126ba97SEli Cohen 3294e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3295e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3296e126ba97SEli Cohen 3297e126ba97SEli Cohen default: 3298e126ba97SEli Cohen return 0; 3299e126ba97SEli Cohen } 3300e126ba97SEli Cohen } 3301e126ba97SEli Cohen 3302e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3303e126ba97SEli Cohen { 3304e126ba97SEli Cohen u8 *p = wqe; 3305e126ba97SEli Cohen u8 res = 0; 3306e126ba97SEli Cohen int i; 3307e126ba97SEli Cohen 3308e126ba97SEli Cohen for (i = 0; i < size; i++) 3309e126ba97SEli Cohen res ^= p[i]; 3310e126ba97SEli Cohen 3311e126ba97SEli Cohen return ~res; 3312e126ba97SEli Cohen } 3313e126ba97SEli Cohen 3314e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3315e126ba97SEli Cohen { 3316e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3317e126ba97SEli Cohen } 3318e126ba97SEli Cohen 3319e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 3320e126ba97SEli Cohen void *wqe, int *sz) 3321e126ba97SEli Cohen { 3322e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3323e126ba97SEli Cohen void *qend = qp->sq.qend; 3324e126ba97SEli Cohen void *addr; 3325e126ba97SEli Cohen int inl = 0; 3326e126ba97SEli Cohen int copy; 3327e126ba97SEli Cohen int len; 3328e126ba97SEli Cohen int i; 3329e126ba97SEli Cohen 3330e126ba97SEli Cohen seg = wqe; 3331e126ba97SEli Cohen wqe += sizeof(*seg); 3332e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3333e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3334e126ba97SEli Cohen len = wr->sg_list[i].length; 3335e126ba97SEli Cohen inl += len; 3336e126ba97SEli Cohen 3337e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3338e126ba97SEli Cohen return -ENOMEM; 3339e126ba97SEli Cohen 3340e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3341e126ba97SEli Cohen copy = qend - wqe; 3342e126ba97SEli Cohen memcpy(wqe, addr, copy); 3343e126ba97SEli Cohen addr += copy; 3344e126ba97SEli Cohen len -= copy; 3345e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 3346e126ba97SEli Cohen } 3347e126ba97SEli Cohen memcpy(wqe, addr, len); 3348e126ba97SEli Cohen wqe += len; 3349e126ba97SEli Cohen } 3350e126ba97SEli Cohen 3351e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 3352e126ba97SEli Cohen 3353e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 3354e126ba97SEli Cohen 3355e126ba97SEli Cohen return 0; 3356e126ba97SEli Cohen } 3357e126ba97SEli Cohen 3358e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 3359e6631814SSagi Grimberg { 3360e6631814SSagi Grimberg switch (type) { 3361e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3362e6631814SSagi Grimberg return MLX5_DIF_SIZE; 3363e6631814SSagi Grimberg default: 3364e6631814SSagi Grimberg return 0; 3365e6631814SSagi Grimberg } 3366e6631814SSagi Grimberg } 3367e6631814SSagi Grimberg 3368e6631814SSagi Grimberg static u8 bs_selector(int block_size) 3369e6631814SSagi Grimberg { 3370e6631814SSagi Grimberg switch (block_size) { 3371e6631814SSagi Grimberg case 512: return 0x1; 3372e6631814SSagi Grimberg case 520: return 0x2; 3373e6631814SSagi Grimberg case 4096: return 0x3; 3374e6631814SSagi Grimberg case 4160: return 0x4; 3375e6631814SSagi Grimberg case 1073741824: return 0x5; 3376e6631814SSagi Grimberg default: return 0; 3377e6631814SSagi Grimberg } 3378e6631814SSagi Grimberg } 3379e6631814SSagi Grimberg 338078eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 3381142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 3382e6631814SSagi Grimberg { 3383142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 3384142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 3385142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 3386142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 3387142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 3388142537f4SSagi Grimberg /* repeating block */ 3389142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 3390142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 3391142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 3392e6631814SSagi Grimberg 339378eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 339478eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 3395e6631814SSagi Grimberg 339678eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 339778eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 339878eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 339978eda2bbSSagi Grimberg else 340078eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 3401e6631814SSagi Grimberg } 3402e6631814SSagi Grimberg 340378eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 340478eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 3405e6631814SSagi Grimberg } 3406e6631814SSagi Grimberg 3407e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 3408e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 3409e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 3410e6631814SSagi Grimberg { 3411e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 3412e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 3413e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 3414e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 3415e6631814SSagi Grimberg 3416c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 3417e6631814SSagi Grimberg 3418142537f4SSagi Grimberg /* Basic + Extended + Inline */ 3419142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 3420e6631814SSagi Grimberg /* Input domain check byte mask */ 3421e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 342278eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 342378eda2bbSSagi Grimberg 342478eda2bbSSagi Grimberg /* Memory domain */ 342578eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 342678eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 342778eda2bbSSagi Grimberg break; 342878eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 342978eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 343078eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 343178eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 343278eda2bbSSagi Grimberg break; 343378eda2bbSSagi Grimberg default: 343478eda2bbSSagi Grimberg return -EINVAL; 343578eda2bbSSagi Grimberg } 343678eda2bbSSagi Grimberg 343778eda2bbSSagi Grimberg /* Wire domain */ 343878eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 343978eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 344078eda2bbSSagi Grimberg break; 344178eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3442e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 344378eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 3444e6631814SSagi Grimberg /* Same block structure */ 3445142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 3446e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 3447fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 3448c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 3449fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 3450c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 3451fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 3452e6631814SSagi Grimberg } else 3453e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 3454e6631814SSagi Grimberg 3455142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 345678eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 3457e6631814SSagi Grimberg break; 3458e6631814SSagi Grimberg default: 3459e6631814SSagi Grimberg return -EINVAL; 3460e6631814SSagi Grimberg } 3461e6631814SSagi Grimberg 3462e6631814SSagi Grimberg return 0; 3463e6631814SSagi Grimberg } 3464e6631814SSagi Grimberg 3465e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 3466e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 3467e6631814SSagi Grimberg { 3468e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 3469e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 3470e6631814SSagi Grimberg struct mlx5_bsf *bsf; 3471e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 3472e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 3473e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 3474e6631814SSagi Grimberg int ret; 3475e6631814SSagi Grimberg int wqe_size; 3476e6631814SSagi Grimberg 3477e622f2f4SChristoph Hellwig if (!wr->prot || 3478e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 3479e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 3480e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 3481e6631814SSagi Grimberg /** 3482e6631814SSagi Grimberg * Source domain doesn't contain signature information 34835c273b16SSagi Grimberg * or data and protection are interleaved in memory. 3484e6631814SSagi Grimberg * So need construct: 3485e6631814SSagi Grimberg * ------------------ 3486e6631814SSagi Grimberg * | data_klm | 3487e6631814SSagi Grimberg * ------------------ 3488e6631814SSagi Grimberg * | BSF | 3489e6631814SSagi Grimberg * ------------------ 3490e6631814SSagi Grimberg **/ 3491e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 3492e6631814SSagi Grimberg 3493e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 3494e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 3495e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 3496e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 3497e6631814SSagi Grimberg } else { 3498e6631814SSagi Grimberg /** 3499e6631814SSagi Grimberg * Source domain contains signature information 3500e6631814SSagi Grimberg * So need construct a strided block format: 3501e6631814SSagi Grimberg * --------------------------- 3502e6631814SSagi Grimberg * | stride_block_ctrl | 3503e6631814SSagi Grimberg * --------------------------- 3504e6631814SSagi Grimberg * | data_klm | 3505e6631814SSagi Grimberg * --------------------------- 3506e6631814SSagi Grimberg * | prot_klm | 3507e6631814SSagi Grimberg * --------------------------- 3508e6631814SSagi Grimberg * | BSF | 3509e6631814SSagi Grimberg * --------------------------- 3510e6631814SSagi Grimberg **/ 3511e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 3512e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 3513e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 3514e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 3515e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 3516e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 3517e6631814SSagi Grimberg int prot_size; 3518e6631814SSagi Grimberg 3519e6631814SSagi Grimberg sblock_ctrl = *seg; 3520e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 3521e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 3522e6631814SSagi Grimberg 3523e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 3524e6631814SSagi Grimberg if (!prot_size) { 3525e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 3526e6631814SSagi Grimberg return -EINVAL; 3527e6631814SSagi Grimberg } 3528e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 3529e6631814SSagi Grimberg prot_size); 3530e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 3531e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 3532e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 3533e6631814SSagi Grimberg 3534e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 3535e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 3536e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 35375c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 35385c273b16SSagi Grimberg 3539e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 3540e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 3541e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 3542e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 35435c273b16SSagi Grimberg 3544e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 3545e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 3546e6631814SSagi Grimberg } 3547e6631814SSagi Grimberg 3548e6631814SSagi Grimberg *seg += wqe_size; 3549e6631814SSagi Grimberg *size += wqe_size / 16; 3550e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3551e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3552e6631814SSagi Grimberg 3553e6631814SSagi Grimberg bsf = *seg; 3554e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 3555e6631814SSagi Grimberg if (ret) 3556e6631814SSagi Grimberg return -EINVAL; 3557e6631814SSagi Grimberg 3558e6631814SSagi Grimberg *seg += sizeof(*bsf); 3559e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 3560e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3561e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3562e6631814SSagi Grimberg 3563e6631814SSagi Grimberg return 0; 3564e6631814SSagi Grimberg } 3565e6631814SSagi Grimberg 3566e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 356731616255SArtemy Kovalyov struct ib_sig_handover_wr *wr, u32 size, 3568e6631814SSagi Grimberg u32 length, u32 pdn) 3569e6631814SSagi Grimberg { 3570e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 3571e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 3572d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 3573e6631814SSagi Grimberg 3574e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3575e6631814SSagi Grimberg 3576e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 3577ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 3578e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 3579d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 3580e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 3581e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 358231616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 3583e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 3584e6631814SSagi Grimberg } 3585e6631814SSagi Grimberg 3586e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 358731616255SArtemy Kovalyov u32 size) 3588e6631814SSagi Grimberg { 3589e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3590e6631814SSagi Grimberg 3591e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 359231616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 3593e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 3594e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 3595e6631814SSagi Grimberg } 3596e6631814SSagi Grimberg 3597e6631814SSagi Grimberg 3598e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 3599e6631814SSagi Grimberg void **seg, int *size) 3600e6631814SSagi Grimberg { 3601e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 3602e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 3603e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 360431616255SArtemy Kovalyov u32 xlt_size; 3605e6631814SSagi Grimberg int region_len, ret; 3606e6631814SSagi Grimberg 3607e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 3608e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 3609d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 3610d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 3611e6631814SSagi Grimberg return -EINVAL; 3612e6631814SSagi Grimberg 3613e6631814SSagi Grimberg /* length of the protected region, data + protection */ 3614e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 3615e622f2f4SChristoph Hellwig if (wr->prot && 3616e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 3617e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 3618e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 3619e622f2f4SChristoph Hellwig region_len += wr->prot->length; 3620e6631814SSagi Grimberg 3621e6631814SSagi Grimberg /** 3622e6631814SSagi Grimberg * KLM octoword size - if protection was provided 3623e6631814SSagi Grimberg * then we use strided block format (3 octowords), 3624e6631814SSagi Grimberg * else we use single KLM (1 octoword) 3625e6631814SSagi Grimberg **/ 362631616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 3627e6631814SSagi Grimberg 362831616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 3629e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 3630e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 3631e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3632e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3633e6631814SSagi Grimberg 363431616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 3635e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 3636e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 3637e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 3638e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 3639e6631814SSagi Grimberg 3640e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 3641e6631814SSagi Grimberg if (ret) 3642e6631814SSagi Grimberg return ret; 3643e6631814SSagi Grimberg 3644d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 3645e6631814SSagi Grimberg return 0; 3646e6631814SSagi Grimberg } 3647e6631814SSagi Grimberg 3648e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 3649e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 3650e6631814SSagi Grimberg { 3651e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 3652e6631814SSagi Grimberg 3653e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 3654e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 3655e6631814SSagi Grimberg switch (domain->sig_type) { 365678eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 365778eda2bbSSagi Grimberg break; 3658e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3659e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 3660e6631814SSagi Grimberg domain->sig.dif.app_tag); 3661e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 3662e6631814SSagi Grimberg break; 3663e6631814SSagi Grimberg default: 366412bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 366512bbf1eaSLeon Romanovsky domain->sig_type); 366612bbf1eaSLeon Romanovsky return -EINVAL; 3667e6631814SSagi Grimberg } 3668e6631814SSagi Grimberg 366978eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 367078eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 367178eda2bbSSagi Grimberg 3672e6631814SSagi Grimberg return 0; 3673e6631814SSagi Grimberg } 3674e6631814SSagi Grimberg 36758a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 36768a187ee5SSagi Grimberg struct ib_reg_wr *wr, 36778a187ee5SSagi Grimberg void **seg, int *size) 36788a187ee5SSagi Grimberg { 36798a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 36808a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 36818a187ee5SSagi Grimberg 36828a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 36838a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 36848a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 36858a187ee5SSagi Grimberg return -EINVAL; 36868a187ee5SSagi Grimberg } 36878a187ee5SSagi Grimberg 36888a187ee5SSagi Grimberg set_reg_umr_seg(*seg, mr); 36898a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 36908a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 36918a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 36928a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 36938a187ee5SSagi Grimberg 36948a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 36958a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 36968a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 36978a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 36988a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 36998a187ee5SSagi Grimberg 37008a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 37018a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 37028a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 37038a187ee5SSagi Grimberg 37048a187ee5SSagi Grimberg return 0; 37058a187ee5SSagi Grimberg } 37068a187ee5SSagi Grimberg 3707dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 3708e126ba97SEli Cohen { 3709dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 3710e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 3711e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 3712e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 3713e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 3714dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 3715e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 3716e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 3717e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 3718e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 3719e126ba97SEli Cohen } 3720e126ba97SEli Cohen 3721e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 3722e126ba97SEli Cohen { 3723e126ba97SEli Cohen __be32 *p = NULL; 3724e126ba97SEli Cohen int tidx = idx; 3725e126ba97SEli Cohen int i, j; 3726e126ba97SEli Cohen 3727e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 3728e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 3729e126ba97SEli Cohen if ((i & 0xf) == 0) { 3730e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 3731e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 3732e126ba97SEli Cohen p = buf; 3733e126ba97SEli Cohen j = 0; 3734e126ba97SEli Cohen } 3735e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 3736e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 3737e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 3738e126ba97SEli Cohen } 3739e126ba97SEli Cohen } 3740e126ba97SEli Cohen 3741e126ba97SEli Cohen static u8 get_fence(u8 fence, struct ib_send_wr *wr) 3742e126ba97SEli Cohen { 3743e126ba97SEli Cohen if (unlikely(wr->opcode == IB_WR_LOCAL_INV && 3744e126ba97SEli Cohen wr->send_flags & IB_SEND_FENCE)) 3745e126ba97SEli Cohen return MLX5_FENCE_MODE_STRONG_ORDERING; 3746e126ba97SEli Cohen 3747e126ba97SEli Cohen if (unlikely(fence)) { 3748e126ba97SEli Cohen if (wr->send_flags & IB_SEND_FENCE) 3749e126ba97SEli Cohen return MLX5_FENCE_MODE_SMALL_AND_FENCE; 3750e126ba97SEli Cohen else 3751e126ba97SEli Cohen return fence; 3752c9b25495SEli Cohen } else if (unlikely(wr->send_flags & IB_SEND_FENCE)) { 3753c9b25495SEli Cohen return MLX5_FENCE_MODE_FENCE; 3754e126ba97SEli Cohen } 3755c9b25495SEli Cohen 3756c9b25495SEli Cohen return 0; 3757e126ba97SEli Cohen } 3758e126ba97SEli Cohen 37596e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 37606e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 37616a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 37626e5eadacSSagi Grimberg int *size, int nreq) 37636e5eadacSSagi Grimberg { 3764b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 3765b2a232d2SLeon Romanovsky return -ENOMEM; 37666e5eadacSSagi Grimberg 37676e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 37686e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 37696e5eadacSSagi Grimberg *ctrl = *seg; 37706e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 37716e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 37726e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 37736e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 37746e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 37756e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 37766e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 37776e5eadacSSagi Grimberg 37786e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 37796e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 37806e5eadacSSagi Grimberg 3781b2a232d2SLeon Romanovsky return 0; 37826e5eadacSSagi Grimberg } 37836e5eadacSSagi Grimberg 37846e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 37856e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 37866e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 37876e5eadacSSagi Grimberg int nreq, u8 fence, u8 next_fence, 37886e5eadacSSagi Grimberg u32 mlx5_opcode) 37896e5eadacSSagi Grimberg { 37906e5eadacSSagi Grimberg u8 opmod = 0; 37916e5eadacSSagi Grimberg 37926e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 37936e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 379419098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 37956e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 37966e5eadacSSagi Grimberg qp->fm_cache = next_fence; 37976e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 37986e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 37996e5eadacSSagi Grimberg 38006e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 38016e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 38026e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 38036e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 38046e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 38056e5eadacSSagi Grimberg } 38066e5eadacSSagi Grimberg 38076e5eadacSSagi Grimberg 3808e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 3809e126ba97SEli Cohen struct ib_send_wr **bad_wr) 3810e126ba97SEli Cohen { 3811e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 3812e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 381389ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 3814d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 3815e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 3816e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 3817e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 3818d16e91daSHaggai Eran struct mlx5_bf *bf; 3819e126ba97SEli Cohen int uninitialized_var(size); 3820d16e91daSHaggai Eran void *qend; 3821e126ba97SEli Cohen unsigned long flags; 3822e126ba97SEli Cohen unsigned idx; 3823e126ba97SEli Cohen int err = 0; 3824e126ba97SEli Cohen int inl = 0; 3825e126ba97SEli Cohen int num_sge; 3826e126ba97SEli Cohen void *seg; 3827e126ba97SEli Cohen int nreq; 3828e126ba97SEli Cohen int i; 3829e126ba97SEli Cohen u8 next_fence = 0; 3830e126ba97SEli Cohen u8 fence; 3831e126ba97SEli Cohen 3832d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3833d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 3834d16e91daSHaggai Eran 3835d16e91daSHaggai Eran qp = to_mqp(ibqp); 38365fe9dec0SEli Cohen bf = &qp->bf; 3837d16e91daSHaggai Eran qend = qp->sq.qend; 3838d16e91daSHaggai Eran 3839e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 3840e126ba97SEli Cohen 384189ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 384289ea94a7SMaor Gottlieb err = -EIO; 384389ea94a7SMaor Gottlieb *bad_wr = wr; 384489ea94a7SMaor Gottlieb nreq = 0; 384589ea94a7SMaor Gottlieb goto out; 384689ea94a7SMaor Gottlieb } 384789ea94a7SMaor Gottlieb 3848e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 3849a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 3850e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 3851e126ba97SEli Cohen err = -EINVAL; 3852e126ba97SEli Cohen *bad_wr = wr; 3853e126ba97SEli Cohen goto out; 3854e126ba97SEli Cohen } 3855e126ba97SEli Cohen 3856e126ba97SEli Cohen fence = qp->fm_cache; 3857e126ba97SEli Cohen num_sge = wr->num_sge; 3858e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 3859e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 386024be409bSChuck Lever err = -EINVAL; 3861e126ba97SEli Cohen *bad_wr = wr; 3862e126ba97SEli Cohen goto out; 3863e126ba97SEli Cohen } 3864e126ba97SEli Cohen 38656e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 38666e5eadacSSagi Grimberg if (err) { 38676e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 38686e5eadacSSagi Grimberg err = -ENOMEM; 38696e5eadacSSagi Grimberg *bad_wr = wr; 38706e5eadacSSagi Grimberg goto out; 38716e5eadacSSagi Grimberg } 3872e126ba97SEli Cohen 3873e126ba97SEli Cohen switch (ibqp->qp_type) { 3874e126ba97SEli Cohen case IB_QPT_XRC_INI: 3875e126ba97SEli Cohen xrc = seg; 3876e126ba97SEli Cohen seg += sizeof(*xrc); 3877e126ba97SEli Cohen size += sizeof(*xrc) / 16; 3878e126ba97SEli Cohen /* fall through */ 3879e126ba97SEli Cohen case IB_QPT_RC: 3880e126ba97SEli Cohen switch (wr->opcode) { 3881e126ba97SEli Cohen case IB_WR_RDMA_READ: 3882e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 3883e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3884e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 3885e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 3886e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 3887e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 3888e126ba97SEli Cohen break; 3889e126ba97SEli Cohen 3890e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 3891e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 3892e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 389381bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 389481bea28fSEli Cohen err = -ENOSYS; 389581bea28fSEli Cohen *bad_wr = wr; 389681bea28fSEli Cohen goto out; 3897e126ba97SEli Cohen 3898e126ba97SEli Cohen case IB_WR_LOCAL_INV: 3899e126ba97SEli Cohen next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 3900e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 3901e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 3902dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 3903e126ba97SEli Cohen num_sge = 0; 3904e126ba97SEli Cohen break; 3905e126ba97SEli Cohen 39068a187ee5SSagi Grimberg case IB_WR_REG_MR: 39078a187ee5SSagi Grimberg next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 39088a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 39098a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 39108a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 39118a187ee5SSagi Grimberg if (err) { 39128a187ee5SSagi Grimberg *bad_wr = wr; 39138a187ee5SSagi Grimberg goto out; 39148a187ee5SSagi Grimberg } 39158a187ee5SSagi Grimberg num_sge = 0; 39168a187ee5SSagi Grimberg break; 39178a187ee5SSagi Grimberg 3918e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 3919e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 3920e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 3921e6631814SSagi Grimberg 3922e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 3923e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 3924e6631814SSagi Grimberg if (err) { 3925e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3926e6631814SSagi Grimberg *bad_wr = wr; 3927e6631814SSagi Grimberg goto out; 3928e6631814SSagi Grimberg } 3929e6631814SSagi Grimberg 3930e6631814SSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, 3931e6631814SSagi Grimberg nreq, get_fence(fence, wr), 3932e6631814SSagi Grimberg next_fence, MLX5_OPCODE_UMR); 3933e6631814SSagi Grimberg /* 3934e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 3935e6631814SSagi Grimberg * on error 3936e6631814SSagi Grimberg */ 3937e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 3938e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 3939e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 3940e6631814SSagi Grimberg &idx, &size, nreq); 3941e6631814SSagi Grimberg if (err) { 3942e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3943e6631814SSagi Grimberg err = -ENOMEM; 3944e6631814SSagi Grimberg *bad_wr = wr; 3945e6631814SSagi Grimberg goto out; 3946e6631814SSagi Grimberg } 3947e6631814SSagi Grimberg 3948e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 3949e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 3950e6631814SSagi Grimberg &size); 3951e6631814SSagi Grimberg if (err) { 3952e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3953e6631814SSagi Grimberg *bad_wr = wr; 3954e6631814SSagi Grimberg goto out; 3955e6631814SSagi Grimberg } 3956e6631814SSagi Grimberg 3957e6631814SSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, 3958e6631814SSagi Grimberg nreq, get_fence(fence, wr), 3959e6631814SSagi Grimberg next_fence, MLX5_OPCODE_SET_PSV); 3960e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 3961e6631814SSagi Grimberg &idx, &size, nreq); 3962e6631814SSagi Grimberg if (err) { 3963e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3964e6631814SSagi Grimberg err = -ENOMEM; 3965e6631814SSagi Grimberg *bad_wr = wr; 3966e6631814SSagi Grimberg goto out; 3967e6631814SSagi Grimberg } 3968e6631814SSagi Grimberg 3969e6631814SSagi Grimberg next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 3970e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 3971e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 3972e6631814SSagi Grimberg &size); 3973e6631814SSagi Grimberg if (err) { 3974e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 3975e6631814SSagi Grimberg *bad_wr = wr; 3976e6631814SSagi Grimberg goto out; 3977e6631814SSagi Grimberg } 3978e6631814SSagi Grimberg 3979e6631814SSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, 3980e6631814SSagi Grimberg nreq, get_fence(fence, wr), 3981e6631814SSagi Grimberg next_fence, MLX5_OPCODE_SET_PSV); 3982e6631814SSagi Grimberg num_sge = 0; 3983e6631814SSagi Grimberg goto skip_psv; 3984e6631814SSagi Grimberg 3985e126ba97SEli Cohen default: 3986e126ba97SEli Cohen break; 3987e126ba97SEli Cohen } 3988e126ba97SEli Cohen break; 3989e126ba97SEli Cohen 3990e126ba97SEli Cohen case IB_QPT_UC: 3991e126ba97SEli Cohen switch (wr->opcode) { 3992e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 3993e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3994e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 3995e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 3996e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 3997e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 3998e126ba97SEli Cohen break; 3999e126ba97SEli Cohen 4000e126ba97SEli Cohen default: 4001e126ba97SEli Cohen break; 4002e126ba97SEli Cohen } 4003e126ba97SEli Cohen break; 4004e126ba97SEli Cohen 4005e126ba97SEli Cohen case IB_QPT_SMI: 40061e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 40071e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 40081e0e50b6SMaor Gottlieb err = -EPERM; 40091e0e50b6SMaor Gottlieb *bad_wr = wr; 40101e0e50b6SMaor Gottlieb goto out; 40111e0e50b6SMaor Gottlieb } 4012d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4013e126ba97SEli Cohen set_datagram_seg(seg, wr); 4014e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4015e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4016e126ba97SEli Cohen if (unlikely((seg == qend))) 4017e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4018e126ba97SEli Cohen break; 4019f0313965SErez Shitrit case IB_QPT_UD: 4020f0313965SErez Shitrit set_datagram_seg(seg, wr); 4021f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4022f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4023e126ba97SEli Cohen 4024f0313965SErez Shitrit if (unlikely((seg == qend))) 4025f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4026f0313965SErez Shitrit 4027f0313965SErez Shitrit /* handle qp that supports ud offload */ 4028f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4029f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4030f0313965SErez Shitrit 4031f0313965SErez Shitrit pad = seg; 4032f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4033f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4034f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4035f0313965SErez Shitrit 4036f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4037f0313965SErez Shitrit 4038f0313965SErez Shitrit if (unlikely((seg == qend))) 4039f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4040f0313965SErez Shitrit } 4041f0313965SErez Shitrit break; 4042e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4043e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4044e126ba97SEli Cohen err = -EINVAL; 4045e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4046e126ba97SEli Cohen goto out; 4047e126ba97SEli Cohen } 4048e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4049e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4050578e7264SMaor Gottlieb set_reg_umr_segment(seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4051e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4052e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4053e126ba97SEli Cohen if (unlikely((seg == qend))) 4054e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4055e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4056e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4057e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4058e126ba97SEli Cohen if (unlikely((seg == qend))) 4059e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4060e126ba97SEli Cohen break; 4061e126ba97SEli Cohen 4062e126ba97SEli Cohen default: 4063e126ba97SEli Cohen break; 4064e126ba97SEli Cohen } 4065e126ba97SEli Cohen 4066e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4067e126ba97SEli Cohen int uninitialized_var(sz); 4068e126ba97SEli Cohen 4069e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4070e126ba97SEli Cohen if (unlikely(err)) { 4071e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4072e126ba97SEli Cohen *bad_wr = wr; 4073e126ba97SEli Cohen goto out; 4074e126ba97SEli Cohen } 4075e126ba97SEli Cohen inl = 1; 4076e126ba97SEli Cohen size += sz; 4077e126ba97SEli Cohen } else { 4078e126ba97SEli Cohen dpseg = seg; 4079e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4080e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4081e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4082e126ba97SEli Cohen dpseg = seg; 4083e126ba97SEli Cohen } 4084e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4085e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4086e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4087e126ba97SEli Cohen dpseg++; 4088e126ba97SEli Cohen } 4089e126ba97SEli Cohen } 4090e126ba97SEli Cohen } 4091e126ba97SEli Cohen 40926e5eadacSSagi Grimberg finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 40936e5eadacSSagi Grimberg get_fence(fence, wr), next_fence, 40946e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4095e6631814SSagi Grimberg skip_psv: 4096e126ba97SEli Cohen if (0) 4097e126ba97SEli Cohen dump_wqe(qp, idx, size); 4098e126ba97SEli Cohen } 4099e126ba97SEli Cohen 4100e126ba97SEli Cohen out: 4101e126ba97SEli Cohen if (likely(nreq)) { 4102e126ba97SEli Cohen qp->sq.head += nreq; 4103e126ba97SEli Cohen 4104e126ba97SEli Cohen /* Make sure that descriptors are written before 4105e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4106e126ba97SEli Cohen */ 4107e126ba97SEli Cohen wmb(); 4108e126ba97SEli Cohen 4109e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4110e126ba97SEli Cohen 4111ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4112ada388f7SEli Cohen * we hit doorbell */ 4113ada388f7SEli Cohen wmb(); 4114ada388f7SEli Cohen 41155fe9dec0SEli Cohen /* currently we support only regular doorbells */ 41165fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4117e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4118e126ba97SEli Cohen * and reach the HCA out of order. 4119e126ba97SEli Cohen */ 4120e126ba97SEli Cohen mmiowb(); 4121e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4122e126ba97SEli Cohen } 4123e126ba97SEli Cohen 4124e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4125e126ba97SEli Cohen 4126e126ba97SEli Cohen return err; 4127e126ba97SEli Cohen } 4128e126ba97SEli Cohen 4129e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4130e126ba97SEli Cohen { 4131e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4132e126ba97SEli Cohen } 4133e126ba97SEli Cohen 4134e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 4135e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 4136e126ba97SEli Cohen { 4137e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4138e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4139e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 414089ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 414189ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4142e126ba97SEli Cohen unsigned long flags; 4143e126ba97SEli Cohen int err = 0; 4144e126ba97SEli Cohen int nreq; 4145e126ba97SEli Cohen int ind; 4146e126ba97SEli Cohen int i; 4147e126ba97SEli Cohen 4148d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4149d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4150d16e91daSHaggai Eran 4151e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4152e126ba97SEli Cohen 415389ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 415489ea94a7SMaor Gottlieb err = -EIO; 415589ea94a7SMaor Gottlieb *bad_wr = wr; 415689ea94a7SMaor Gottlieb nreq = 0; 415789ea94a7SMaor Gottlieb goto out; 415889ea94a7SMaor Gottlieb } 415989ea94a7SMaor Gottlieb 4160e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4161e126ba97SEli Cohen 4162e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4163e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4164e126ba97SEli Cohen err = -ENOMEM; 4165e126ba97SEli Cohen *bad_wr = wr; 4166e126ba97SEli Cohen goto out; 4167e126ba97SEli Cohen } 4168e126ba97SEli Cohen 4169e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4170e126ba97SEli Cohen err = -EINVAL; 4171e126ba97SEli Cohen *bad_wr = wr; 4172e126ba97SEli Cohen goto out; 4173e126ba97SEli Cohen } 4174e126ba97SEli Cohen 4175e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4176e126ba97SEli Cohen if (qp->wq_sig) 4177e126ba97SEli Cohen scat++; 4178e126ba97SEli Cohen 4179e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4180e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4181e126ba97SEli Cohen 4182e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4183e126ba97SEli Cohen scat[i].byte_count = 0; 4184e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4185e126ba97SEli Cohen scat[i].addr = 0; 4186e126ba97SEli Cohen } 4187e126ba97SEli Cohen 4188e126ba97SEli Cohen if (qp->wq_sig) { 4189e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4190e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4191e126ba97SEli Cohen } 4192e126ba97SEli Cohen 4193e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4194e126ba97SEli Cohen 4195e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4196e126ba97SEli Cohen } 4197e126ba97SEli Cohen 4198e126ba97SEli Cohen out: 4199e126ba97SEli Cohen if (likely(nreq)) { 4200e126ba97SEli Cohen qp->rq.head += nreq; 4201e126ba97SEli Cohen 4202e126ba97SEli Cohen /* Make sure that descriptors are written before 4203e126ba97SEli Cohen * doorbell record. 4204e126ba97SEli Cohen */ 4205e126ba97SEli Cohen wmb(); 4206e126ba97SEli Cohen 4207e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4208e126ba97SEli Cohen } 4209e126ba97SEli Cohen 4210e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4211e126ba97SEli Cohen 4212e126ba97SEli Cohen return err; 4213e126ba97SEli Cohen } 4214e126ba97SEli Cohen 4215e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4216e126ba97SEli Cohen { 4217e126ba97SEli Cohen switch (mlx5_state) { 4218e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4219e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4220e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4221e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4222e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4223e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4224e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4225e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4226e126ba97SEli Cohen default: return -1; 4227e126ba97SEli Cohen } 4228e126ba97SEli Cohen } 4229e126ba97SEli Cohen 4230e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4231e126ba97SEli Cohen { 4232e126ba97SEli Cohen switch (mlx5_mig_state) { 4233e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4234e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4235e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4236e126ba97SEli Cohen default: return -1; 4237e126ba97SEli Cohen } 4238e126ba97SEli Cohen } 4239e126ba97SEli Cohen 4240e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4241e126ba97SEli Cohen { 4242e126ba97SEli Cohen int ib_flags = 0; 4243e126ba97SEli Cohen 4244e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4245e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4246e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4247e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4248e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4249e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4250e126ba97SEli Cohen 4251e126ba97SEli Cohen return ib_flags; 4252e126ba97SEli Cohen } 4253e126ba97SEli Cohen 425438349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4255d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4256e126ba97SEli Cohen struct mlx5_qp_path *path) 4257e126ba97SEli Cohen { 42589603b61dSJack Morgenstein struct mlx5_core_dev *dev = ibdev->mdev; 4259e126ba97SEli Cohen 4260d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4261e126ba97SEli Cohen 426244c58487SDasaratharaman Chandramouli ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4263d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4264d8966fcdSDasaratharaman Chandramouli if (rdma_ah_get_port_num(ah_attr) == 0 || 4265d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(ah_attr) > MLX5_CAP_GEN(dev, num_ports)) 4266e126ba97SEli Cohen return; 4267e126ba97SEli Cohen 4268d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4269d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4270e126ba97SEli Cohen 4271d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4272d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4273d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4274d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4275d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4276d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4277d8966fcdSDasaratharaman Chandramouli 4278d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4279d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4280d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4281d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4282d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4283d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4284e126ba97SEli Cohen } 4285e126ba97SEli Cohen } 4286e126ba97SEli Cohen 42876d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 42886d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 42896d2f89dfSmajd@mellanox.com u8 *sq_state) 4290e126ba97SEli Cohen { 42916d2f89dfSmajd@mellanox.com void *out; 42926d2f89dfSmajd@mellanox.com void *sqc; 42936d2f89dfSmajd@mellanox.com int inlen; 42946d2f89dfSmajd@mellanox.com int err; 42956d2f89dfSmajd@mellanox.com 42966d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_sq_out); 42976d2f89dfSmajd@mellanox.com out = mlx5_vzalloc(inlen); 42986d2f89dfSmajd@mellanox.com if (!out) 42996d2f89dfSmajd@mellanox.com return -ENOMEM; 43006d2f89dfSmajd@mellanox.com 43016d2f89dfSmajd@mellanox.com err = mlx5_core_query_sq(dev->mdev, sq->base.mqp.qpn, out); 43026d2f89dfSmajd@mellanox.com if (err) 43036d2f89dfSmajd@mellanox.com goto out; 43046d2f89dfSmajd@mellanox.com 43056d2f89dfSmajd@mellanox.com sqc = MLX5_ADDR_OF(query_sq_out, out, sq_context); 43066d2f89dfSmajd@mellanox.com *sq_state = MLX5_GET(sqc, sqc, state); 43076d2f89dfSmajd@mellanox.com sq->state = *sq_state; 43086d2f89dfSmajd@mellanox.com 43096d2f89dfSmajd@mellanox.com out: 43106d2f89dfSmajd@mellanox.com kvfree(out); 43116d2f89dfSmajd@mellanox.com return err; 43126d2f89dfSmajd@mellanox.com } 43136d2f89dfSmajd@mellanox.com 43146d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 43156d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 43166d2f89dfSmajd@mellanox.com u8 *rq_state) 43176d2f89dfSmajd@mellanox.com { 43186d2f89dfSmajd@mellanox.com void *out; 43196d2f89dfSmajd@mellanox.com void *rqc; 43206d2f89dfSmajd@mellanox.com int inlen; 43216d2f89dfSmajd@mellanox.com int err; 43226d2f89dfSmajd@mellanox.com 43236d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 43246d2f89dfSmajd@mellanox.com out = mlx5_vzalloc(inlen); 43256d2f89dfSmajd@mellanox.com if (!out) 43266d2f89dfSmajd@mellanox.com return -ENOMEM; 43276d2f89dfSmajd@mellanox.com 43286d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 43296d2f89dfSmajd@mellanox.com if (err) 43306d2f89dfSmajd@mellanox.com goto out; 43316d2f89dfSmajd@mellanox.com 43326d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 43336d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 43346d2f89dfSmajd@mellanox.com rq->state = *rq_state; 43356d2f89dfSmajd@mellanox.com 43366d2f89dfSmajd@mellanox.com out: 43376d2f89dfSmajd@mellanox.com kvfree(out); 43386d2f89dfSmajd@mellanox.com return err; 43396d2f89dfSmajd@mellanox.com } 43406d2f89dfSmajd@mellanox.com 43416d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 43426d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 43436d2f89dfSmajd@mellanox.com { 43446d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 43456d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 43466d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 43476d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 43486d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 43496d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 43506d2f89dfSmajd@mellanox.com }, 43516d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 43526d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 43536d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 43546d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 43556d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 43566d2f89dfSmajd@mellanox.com }, 43576d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 43586d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 43596d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 43606d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 43616d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 43626d2f89dfSmajd@mellanox.com }, 43636d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 43646d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 43656d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 43666d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 43676d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 43686d2f89dfSmajd@mellanox.com }, 43696d2f89dfSmajd@mellanox.com }; 43706d2f89dfSmajd@mellanox.com 43716d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 43726d2f89dfSmajd@mellanox.com 43736d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 43746d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 43756d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 43766d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 43776d2f89dfSmajd@mellanox.com return -EINVAL; 43786d2f89dfSmajd@mellanox.com } 43796d2f89dfSmajd@mellanox.com 43806d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 43816d2f89dfSmajd@mellanox.com *qp_state = qp->state; 43826d2f89dfSmajd@mellanox.com 43836d2f89dfSmajd@mellanox.com return 0; 43846d2f89dfSmajd@mellanox.com } 43856d2f89dfSmajd@mellanox.com 43866d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 43876d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 43886d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 43896d2f89dfSmajd@mellanox.com { 43906d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 43916d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 43926d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 43936d2f89dfSmajd@mellanox.com int err; 43946d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 43956d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 43966d2f89dfSmajd@mellanox.com 43976d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 43986d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 43996d2f89dfSmajd@mellanox.com if (err) 44006d2f89dfSmajd@mellanox.com return err; 44016d2f89dfSmajd@mellanox.com } 44026d2f89dfSmajd@mellanox.com 44036d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 44046d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 44056d2f89dfSmajd@mellanox.com if (err) 44066d2f89dfSmajd@mellanox.com return err; 44076d2f89dfSmajd@mellanox.com } 44086d2f89dfSmajd@mellanox.com 44096d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 44106d2f89dfSmajd@mellanox.com raw_packet_qp_state); 44116d2f89dfSmajd@mellanox.com } 44126d2f89dfSmajd@mellanox.com 44136d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 44146d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 44156d2f89dfSmajd@mellanox.com { 441609a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 4417e126ba97SEli Cohen struct mlx5_qp_context *context; 4418e126ba97SEli Cohen int mlx5_state; 441909a7d9ecSSaeed Mahameed u32 *outb; 4420e126ba97SEli Cohen int err = 0; 4421e126ba97SEli Cohen 442209a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 44236d2f89dfSmajd@mellanox.com if (!outb) 44246d2f89dfSmajd@mellanox.com return -ENOMEM; 44256d2f89dfSmajd@mellanox.com 442619098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 442709a7d9ecSSaeed Mahameed outlen); 4428e126ba97SEli Cohen if (err) 44296d2f89dfSmajd@mellanox.com goto out; 4430e126ba97SEli Cohen 443109a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 443209a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 443309a7d9ecSSaeed Mahameed 4434e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 4435e126ba97SEli Cohen 4436e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 4437e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 4438e126ba97SEli Cohen qp_attr->path_mig_state = 4439e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 4440e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 4441e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 4442e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 4443e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 4444e126ba97SEli Cohen qp_attr->qp_access_flags = 4445e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 4446e126ba97SEli Cohen 4447e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 444838349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 444938349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 4450d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 4451d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 4452d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 4453d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 4454e126ba97SEli Cohen } 4455e126ba97SEli Cohen 4456d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 4457e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 4458e126ba97SEli Cohen 4459e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 4460e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 4461e126ba97SEli Cohen 4462e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 4463e126ba97SEli Cohen 4464e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 4465e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 4466e126ba97SEli Cohen qp_attr->min_rnr_timer = 4467e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 4468e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 4469e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 4470e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 4471e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 44726d2f89dfSmajd@mellanox.com 44736d2f89dfSmajd@mellanox.com out: 44746d2f89dfSmajd@mellanox.com kfree(outb); 44756d2f89dfSmajd@mellanox.com return err; 44766d2f89dfSmajd@mellanox.com } 44776d2f89dfSmajd@mellanox.com 44786d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 44796d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 44806d2f89dfSmajd@mellanox.com { 44816d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 44826d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 44836d2f89dfSmajd@mellanox.com int err = 0; 44846d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 44856d2f89dfSmajd@mellanox.com 448628d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 448728d61370SYishai Hadas return -ENOSYS; 448828d61370SYishai Hadas 4489d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4490d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 4491d16e91daSHaggai Eran qp_init_attr); 4492d16e91daSHaggai Eran 44936d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 44946d2f89dfSmajd@mellanox.com 44956d2f89dfSmajd@mellanox.com if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET) { 44966d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 44976d2f89dfSmajd@mellanox.com if (err) 44986d2f89dfSmajd@mellanox.com goto out; 44996d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 45006d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 45016d2f89dfSmajd@mellanox.com } else { 45026d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 45036d2f89dfSmajd@mellanox.com if (err) 45046d2f89dfSmajd@mellanox.com goto out; 45056d2f89dfSmajd@mellanox.com } 45066d2f89dfSmajd@mellanox.com 45076d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 4508e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 4509e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 4510e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 4511e126ba97SEli Cohen 4512e126ba97SEli Cohen if (!ibqp->uobject) { 45130540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 4514e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 45150540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 4516e126ba97SEli Cohen } else { 4517e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 4518e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 4519e126ba97SEli Cohen } 4520e126ba97SEli Cohen 45210540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 45220540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 45230540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 45240540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 45250540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 4526e126ba97SEli Cohen 4527e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 4528e126ba97SEli Cohen 4529e126ba97SEli Cohen qp_init_attr->create_flags = 0; 4530e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 4531e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 4532e126ba97SEli Cohen 4533051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 4534051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 4535051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 4536051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 4537051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 4538051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 4539b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 4540b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 4541051f2630SLeon Romanovsky 4542e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 4543e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 4544e126ba97SEli Cohen 4545e126ba97SEli Cohen out: 4546e126ba97SEli Cohen mutex_unlock(&qp->mutex); 4547e126ba97SEli Cohen return err; 4548e126ba97SEli Cohen } 4549e126ba97SEli Cohen 4550e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 4551e126ba97SEli Cohen struct ib_ucontext *context, 4552e126ba97SEli Cohen struct ib_udata *udata) 4553e126ba97SEli Cohen { 4554e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 4555e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 4556e126ba97SEli Cohen int err; 4557e126ba97SEli Cohen 4558938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 4559e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 4560e126ba97SEli Cohen 4561e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 4562e126ba97SEli Cohen if (!xrcd) 4563e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 4564e126ba97SEli Cohen 45659603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 4566e126ba97SEli Cohen if (err) { 4567e126ba97SEli Cohen kfree(xrcd); 4568e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 4569e126ba97SEli Cohen } 4570e126ba97SEli Cohen 4571e126ba97SEli Cohen return &xrcd->ibxrcd; 4572e126ba97SEli Cohen } 4573e126ba97SEli Cohen 4574e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 4575e126ba97SEli Cohen { 4576e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 4577e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 4578e126ba97SEli Cohen int err; 4579e126ba97SEli Cohen 45809603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 4581e126ba97SEli Cohen if (err) { 4582e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 4583e126ba97SEli Cohen return err; 4584e126ba97SEli Cohen } 4585e126ba97SEli Cohen 4586e126ba97SEli Cohen kfree(xrcd); 4587e126ba97SEli Cohen 4588e126ba97SEli Cohen return 0; 4589e126ba97SEli Cohen } 459079b20a6cSYishai Hadas 4591350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 4592350d0e4cSYishai Hadas { 4593350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 4594350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 4595350d0e4cSYishai Hadas struct ib_event event; 4596350d0e4cSYishai Hadas 4597350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 4598350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 4599350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 4600350d0e4cSYishai Hadas switch (type) { 4601350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 4602350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 4603350d0e4cSYishai Hadas break; 4604350d0e4cSYishai Hadas default: 4605350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 4606350d0e4cSYishai Hadas return; 4607350d0e4cSYishai Hadas } 4608350d0e4cSYishai Hadas 4609350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 4610350d0e4cSYishai Hadas } 4611350d0e4cSYishai Hadas } 4612350d0e4cSYishai Hadas 461379b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 461479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 461579b20a6cSYishai Hadas { 461679b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 46174be6da1eSNoa Osherovich int has_net_offloads; 461879b20a6cSYishai Hadas __be64 *rq_pas0; 461979b20a6cSYishai Hadas void *in; 462079b20a6cSYishai Hadas void *rqc; 462179b20a6cSYishai Hadas void *wq; 462279b20a6cSYishai Hadas int inlen; 462379b20a6cSYishai Hadas int err; 462479b20a6cSYishai Hadas 462579b20a6cSYishai Hadas dev = to_mdev(pd->device); 462679b20a6cSYishai Hadas 462779b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 462879b20a6cSYishai Hadas in = mlx5_vzalloc(inlen); 462979b20a6cSYishai Hadas if (!in) 463079b20a6cSYishai Hadas return -ENOMEM; 463179b20a6cSYishai Hadas 463279b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 463379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 463479b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 463579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 463679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 463779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 463879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 463979b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 464079b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 464179b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 464279b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 464379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 464479b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 464579b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 464679b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 464779b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 464879b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 46494be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 4650b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 46514be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 4652b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 4653b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 4654b1f74a84SNoa Osherovich goto out; 4655b1f74a84SNoa Osherovich } 4656b1f74a84SNoa Osherovich } else { 4657b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 4658b1f74a84SNoa Osherovich } 46594be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 46604be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 46614be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 46624be6da1eSNoa Osherovich err = -EOPNOTSUPP; 46634be6da1eSNoa Osherovich goto out; 46644be6da1eSNoa Osherovich } 46654be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 46664be6da1eSNoa Osherovich } 466779b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 466879b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 4669350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 4670b1f74a84SNoa Osherovich out: 467179b20a6cSYishai Hadas kvfree(in); 467279b20a6cSYishai Hadas return err; 467379b20a6cSYishai Hadas } 467479b20a6cSYishai Hadas 467579b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 467679b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 467779b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 467879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 467979b20a6cSYishai Hadas { 468079b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 468179b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 468279b20a6cSYishai Hadas return -EINVAL; 468379b20a6cSYishai Hadas 468479b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 468579b20a6cSYishai Hadas return -EINVAL; 468679b20a6cSYishai Hadas 468779b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 468879b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 468979b20a6cSYishai Hadas rwq->buf_size = (rwq->wqe_count << rwq->wqe_shift); 469079b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 469179b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 469279b20a6cSYishai Hadas return 0; 469379b20a6cSYishai Hadas } 469479b20a6cSYishai Hadas 469579b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 469679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 469779b20a6cSYishai Hadas struct ib_udata *udata, 469879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 469979b20a6cSYishai Hadas { 470079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 470179b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 470279b20a6cSYishai Hadas int err; 470379b20a6cSYishai Hadas size_t required_cmd_sz; 470479b20a6cSYishai Hadas 470579b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 470679b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 470779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 470879b20a6cSYishai Hadas return -EINVAL; 470979b20a6cSYishai Hadas } 471079b20a6cSYishai Hadas 471179b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 471279b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 471379b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 471479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 471579b20a6cSYishai Hadas return -EOPNOTSUPP; 471679b20a6cSYishai Hadas } 471779b20a6cSYishai Hadas 471879b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 471979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 472079b20a6cSYishai Hadas return -EFAULT; 472179b20a6cSYishai Hadas } 472279b20a6cSYishai Hadas 472379b20a6cSYishai Hadas if (ucmd.comp_mask) { 472479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 472579b20a6cSYishai Hadas return -EOPNOTSUPP; 472679b20a6cSYishai Hadas } 472779b20a6cSYishai Hadas 472879b20a6cSYishai Hadas if (ucmd.reserved) { 472979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid reserved\n"); 473079b20a6cSYishai Hadas return -EOPNOTSUPP; 473179b20a6cSYishai Hadas } 473279b20a6cSYishai Hadas 473379b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 473479b20a6cSYishai Hadas if (err) { 473579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 473679b20a6cSYishai Hadas return err; 473779b20a6cSYishai Hadas } 473879b20a6cSYishai Hadas 473979b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 474079b20a6cSYishai Hadas if (err) { 474179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 474279b20a6cSYishai Hadas if (err) 474379b20a6cSYishai Hadas return err; 474479b20a6cSYishai Hadas } 474579b20a6cSYishai Hadas 474679b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 474779b20a6cSYishai Hadas return 0; 474879b20a6cSYishai Hadas } 474979b20a6cSYishai Hadas 475079b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 475179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 475279b20a6cSYishai Hadas struct ib_udata *udata) 475379b20a6cSYishai Hadas { 475479b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 475579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 475679b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 475779b20a6cSYishai Hadas size_t min_resp_len; 475879b20a6cSYishai Hadas int err; 475979b20a6cSYishai Hadas 476079b20a6cSYishai Hadas if (!udata) 476179b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 476279b20a6cSYishai Hadas 476379b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 476479b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 476579b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 476679b20a6cSYishai Hadas 476779b20a6cSYishai Hadas dev = to_mdev(pd->device); 476879b20a6cSYishai Hadas switch (init_attr->wq_type) { 476979b20a6cSYishai Hadas case IB_WQT_RQ: 477079b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 477179b20a6cSYishai Hadas if (!rwq) 477279b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 477379b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 477479b20a6cSYishai Hadas if (err) 477579b20a6cSYishai Hadas goto err; 477679b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 477779b20a6cSYishai Hadas if (err) 477879b20a6cSYishai Hadas goto err_user_rq; 477979b20a6cSYishai Hadas break; 478079b20a6cSYishai Hadas default: 478179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 478279b20a6cSYishai Hadas init_attr->wq_type); 478379b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 478479b20a6cSYishai Hadas } 478579b20a6cSYishai Hadas 4786350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 478779b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 478879b20a6cSYishai Hadas if (udata->outlen) { 478979b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 479079b20a6cSYishai Hadas sizeof(resp.response_length); 479179b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 479279b20a6cSYishai Hadas if (err) 479379b20a6cSYishai Hadas goto err_copy; 479479b20a6cSYishai Hadas } 479579b20a6cSYishai Hadas 4796350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 4797350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 479879b20a6cSYishai Hadas return &rwq->ibwq; 479979b20a6cSYishai Hadas 480079b20a6cSYishai Hadas err_copy: 4801350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 480279b20a6cSYishai Hadas err_user_rq: 480379b20a6cSYishai Hadas destroy_user_rq(pd, rwq); 480479b20a6cSYishai Hadas err: 480579b20a6cSYishai Hadas kfree(rwq); 480679b20a6cSYishai Hadas return ERR_PTR(err); 480779b20a6cSYishai Hadas } 480879b20a6cSYishai Hadas 480979b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 481079b20a6cSYishai Hadas { 481179b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 481279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 481379b20a6cSYishai Hadas 4814350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 481579b20a6cSYishai Hadas destroy_user_rq(wq->pd, rwq); 481679b20a6cSYishai Hadas kfree(rwq); 481779b20a6cSYishai Hadas 481879b20a6cSYishai Hadas return 0; 481979b20a6cSYishai Hadas } 482079b20a6cSYishai Hadas 4821c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 4822c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 4823c5f90929SYishai Hadas struct ib_udata *udata) 4824c5f90929SYishai Hadas { 4825c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 4826c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 4827c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 4828c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 4829c5f90929SYishai Hadas size_t min_resp_len; 4830c5f90929SYishai Hadas int inlen; 4831c5f90929SYishai Hadas int err; 4832c5f90929SYishai Hadas int i; 4833c5f90929SYishai Hadas u32 *in; 4834c5f90929SYishai Hadas void *rqtc; 4835c5f90929SYishai Hadas 4836c5f90929SYishai Hadas if (udata->inlen > 0 && 4837c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 4838c5f90929SYishai Hadas udata->inlen)) 4839c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 4840c5f90929SYishai Hadas 4841efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 4842efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 4843efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 4844efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 4845efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 4846efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 4847efd7f400SMaor Gottlieb } 4848efd7f400SMaor Gottlieb 4849c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 4850c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 4851c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 4852c5f90929SYishai Hadas 4853c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 4854c5f90929SYishai Hadas if (!rwq_ind_tbl) 4855c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 4856c5f90929SYishai Hadas 4857c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 4858c5f90929SYishai Hadas in = mlx5_vzalloc(inlen); 4859c5f90929SYishai Hadas if (!in) { 4860c5f90929SYishai Hadas err = -ENOMEM; 4861c5f90929SYishai Hadas goto err; 4862c5f90929SYishai Hadas } 4863c5f90929SYishai Hadas 4864c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 4865c5f90929SYishai Hadas 4866c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 4867c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 4868c5f90929SYishai Hadas 4869c5f90929SYishai Hadas for (i = 0; i < sz; i++) 4870c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 4871c5f90929SYishai Hadas 4872c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 4873c5f90929SYishai Hadas kvfree(in); 4874c5f90929SYishai Hadas 4875c5f90929SYishai Hadas if (err) 4876c5f90929SYishai Hadas goto err; 4877c5f90929SYishai Hadas 4878c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 4879c5f90929SYishai Hadas if (udata->outlen) { 4880c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 4881c5f90929SYishai Hadas sizeof(resp.response_length); 4882c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 4883c5f90929SYishai Hadas if (err) 4884c5f90929SYishai Hadas goto err_copy; 4885c5f90929SYishai Hadas } 4886c5f90929SYishai Hadas 4887c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 4888c5f90929SYishai Hadas 4889c5f90929SYishai Hadas err_copy: 4890c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 4891c5f90929SYishai Hadas err: 4892c5f90929SYishai Hadas kfree(rwq_ind_tbl); 4893c5f90929SYishai Hadas return ERR_PTR(err); 4894c5f90929SYishai Hadas } 4895c5f90929SYishai Hadas 4896c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 4897c5f90929SYishai Hadas { 4898c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 4899c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 4900c5f90929SYishai Hadas 4901c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 4902c5f90929SYishai Hadas 4903c5f90929SYishai Hadas kfree(rwq_ind_tbl); 4904c5f90929SYishai Hadas return 0; 4905c5f90929SYishai Hadas } 4906c5f90929SYishai Hadas 490779b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 490879b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 490979b20a6cSYishai Hadas { 491079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 491179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 491279b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 491379b20a6cSYishai Hadas size_t required_cmd_sz; 491479b20a6cSYishai Hadas int curr_wq_state; 491579b20a6cSYishai Hadas int wq_state; 491679b20a6cSYishai Hadas int inlen; 491779b20a6cSYishai Hadas int err; 491879b20a6cSYishai Hadas void *rqc; 491979b20a6cSYishai Hadas void *in; 492079b20a6cSYishai Hadas 492179b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 492279b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 492379b20a6cSYishai Hadas return -EINVAL; 492479b20a6cSYishai Hadas 492579b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 492679b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 492779b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 492879b20a6cSYishai Hadas return -EOPNOTSUPP; 492979b20a6cSYishai Hadas 493079b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 493179b20a6cSYishai Hadas return -EFAULT; 493279b20a6cSYishai Hadas 493379b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 493479b20a6cSYishai Hadas return -EOPNOTSUPP; 493579b20a6cSYishai Hadas 493679b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 493779b20a6cSYishai Hadas in = mlx5_vzalloc(inlen); 493879b20a6cSYishai Hadas if (!in) 493979b20a6cSYishai Hadas return -ENOMEM; 494079b20a6cSYishai Hadas 494179b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 494279b20a6cSYishai Hadas 494379b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 494479b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 494579b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 494679b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 494779b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 494879b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 494979b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 495079b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 495179b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 495279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 495379b20a6cSYishai Hadas 4954b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 4955b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 4956b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 4957b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 4958b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 4959b1f74a84SNoa Osherovich "supported\n"); 4960b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 4961b1f74a84SNoa Osherovich goto out; 4962b1f74a84SNoa Osherovich } 4963b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 4964b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 4965b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 4966b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 4967b1f74a84SNoa Osherovich } 4968b1f74a84SNoa Osherovich } 4969b1f74a84SNoa Osherovich 497023a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 497123a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 497223a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 497323a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 4974e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 4975e1f24a79SParav Pandit dev->port->cnts.set_id); 497623a6964eSMajd Dibbiny } else 497723a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 497823a6964eSMajd Dibbiny dev->ib_dev.name); 497923a6964eSMajd Dibbiny } 498023a6964eSMajd Dibbiny 4981350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 498279b20a6cSYishai Hadas if (!err) 498379b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 498479b20a6cSYishai Hadas 4985b1f74a84SNoa Osherovich out: 4986b1f74a84SNoa Osherovich kvfree(in); 498779b20a6cSYishai Hadas return err; 498879b20a6cSYishai Hadas } 4989