1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 112e126ba97SEli Cohen { 113e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 114e126ba97SEli Cohen } 115e126ba97SEli Cohen 116e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 117e126ba97SEli Cohen { 118e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 119e126ba97SEli Cohen } 120e126ba97SEli Cohen 121e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 122e126ba97SEli Cohen { 123e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 124e126ba97SEli Cohen } 125e126ba97SEli Cohen 126c1395a2aSHaggai Eran /** 127c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 128c1395a2aSHaggai Eran * 129c1395a2aSHaggai Eran * @qp: QP to copy from. 130c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 131c1395a2aSHaggai Eran * otherwise. 132c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 133c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 134c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 135c1395a2aSHaggai Eran * element in the queue. 136c1395a2aSHaggai Eran * @buffer: destination buffer. 137c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 138c1395a2aSHaggai Eran * 139c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 140c1395a2aSHaggai Eran * 141c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 142c1395a2aSHaggai Eran */ 143c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14419098df2Smajd@mellanox.com void *buffer, u32 length, 14519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 146c1395a2aSHaggai Eran { 147c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 148c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 149c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 150c1395a2aSHaggai Eran size_t offset; 151c1395a2aSHaggai Eran size_t wq_end; 15219098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 153c1395a2aSHaggai Eran u32 first_copy_length; 154c1395a2aSHaggai Eran int wqe_length; 155c1395a2aSHaggai Eran int ret; 156c1395a2aSHaggai Eran 157c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 158c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 159c1395a2aSHaggai Eran qp->ibqp.qp_type); 160c1395a2aSHaggai Eran return -EINVAL; 161c1395a2aSHaggai Eran } 162c1395a2aSHaggai Eran 163c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 164c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 165c1395a2aSHaggai Eran 166c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 167c1395a2aSHaggai Eran return -EINVAL; 168c1395a2aSHaggai Eran 169c1395a2aSHaggai Eran if (offset > umem->length || 170c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 171c1395a2aSHaggai Eran return -EINVAL; 172c1395a2aSHaggai Eran 173c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 174c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 175c1395a2aSHaggai Eran if (ret) 176c1395a2aSHaggai Eran return ret; 177c1395a2aSHaggai Eran 178c1395a2aSHaggai Eran if (send) { 179c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 180c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 181c1395a2aSHaggai Eran 182c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 183c1395a2aSHaggai Eran } else { 184c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 185c1395a2aSHaggai Eran } 186c1395a2aSHaggai Eran 187c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 188c1395a2aSHaggai Eran return first_copy_length; 189c1395a2aSHaggai Eran 190c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 191c1395a2aSHaggai Eran wqe_length - first_copy_length); 192c1395a2aSHaggai Eran if (ret) 193c1395a2aSHaggai Eran return ret; 194c1395a2aSHaggai Eran 195c1395a2aSHaggai Eran return wqe_length; 196c1395a2aSHaggai Eran } 197c1395a2aSHaggai Eran 198e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 199e126ba97SEli Cohen { 200e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 201e126ba97SEli Cohen struct ib_event event; 202e126ba97SEli Cohen 20319098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20419098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20519098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20619098df2Smajd@mellanox.com } 207e126ba97SEli Cohen 208e126ba97SEli Cohen if (ibqp->event_handler) { 209e126ba97SEli Cohen event.device = ibqp->device; 210e126ba97SEli Cohen event.element.qp = ibqp; 211e126ba97SEli Cohen switch (type) { 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 213e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 216e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 217e126ba97SEli Cohen break; 218e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 219e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 220e126ba97SEli Cohen break; 221e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 222e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 223e126ba97SEli Cohen break; 224e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 225e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 226e126ba97SEli Cohen break; 227e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 228e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 229e126ba97SEli Cohen break; 230e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 231e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 232e126ba97SEli Cohen break; 233e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 234e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 235e126ba97SEli Cohen break; 236e126ba97SEli Cohen default: 237e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 238e126ba97SEli Cohen return; 239e126ba97SEli Cohen } 240e126ba97SEli Cohen 241e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 242e126ba97SEli Cohen } 243e126ba97SEli Cohen } 244e126ba97SEli Cohen 245e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 246e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 247e126ba97SEli Cohen { 248e126ba97SEli Cohen int wqe_size; 249e126ba97SEli Cohen int wq_size; 250e126ba97SEli Cohen 251e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 252938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 253e126ba97SEli Cohen return -EINVAL; 254e126ba97SEli Cohen 255e126ba97SEli Cohen if (!has_rq) { 256e126ba97SEli Cohen qp->rq.max_gs = 0; 257e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 258e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2590540d814SNoa Osherovich cap->max_recv_wr = 0; 2600540d814SNoa Osherovich cap->max_recv_sge = 0; 261e126ba97SEli Cohen } else { 262e126ba97SEli Cohen if (ucmd) { 263e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 264002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 265002bf228SLeon Romanovsky return -EINVAL; 266e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 267002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 268002bf228SLeon Romanovsky return -EINVAL; 269e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 270e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 271e126ba97SEli Cohen } else { 272e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 273e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 274e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 275e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 276e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 277e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 278938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 279e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 280e126ba97SEli Cohen wqe_size, 281938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 282938fe83cSSaeed Mahameed max_wqe_sz_rq)); 283e126ba97SEli Cohen return -EINVAL; 284e126ba97SEli Cohen } 285e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 286e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 287e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 288e126ba97SEli Cohen } 289e126ba97SEli Cohen } 290e126ba97SEli Cohen 291e126ba97SEli Cohen return 0; 292e126ba97SEli Cohen } 293e126ba97SEli Cohen 294f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 295e126ba97SEli Cohen { 296618af384SAndi Shyti int size = 0; 297e126ba97SEli Cohen 298f0313965SErez Shitrit switch (attr->qp_type) { 299e126ba97SEli Cohen case IB_QPT_XRC_INI: 300b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 301e126ba97SEli Cohen /* fall through */ 302e126ba97SEli Cohen case IB_QPT_RC: 303e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30475c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 30575c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30675c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 307064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 308064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 309064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen 312b125a54bSEli Cohen case IB_QPT_XRC_TGT: 313b125a54bSEli Cohen return 0; 314b125a54bSEli Cohen 315e126ba97SEli Cohen case IB_QPT_UC: 316b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 31775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3189e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31975c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 320e126ba97SEli Cohen break; 321e126ba97SEli Cohen 322e126ba97SEli Cohen case IB_QPT_UD: 323f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 324f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 325f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 326f0313965SErez Shitrit /* fall through */ 327e126ba97SEli Cohen case IB_QPT_SMI: 328d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 329b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 330e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 331e126ba97SEli Cohen break; 332e126ba97SEli Cohen 333e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 334b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 335e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 336e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 337e126ba97SEli Cohen break; 338e126ba97SEli Cohen 339e126ba97SEli Cohen default: 340e126ba97SEli Cohen return -EINVAL; 341e126ba97SEli Cohen } 342e126ba97SEli Cohen 343e126ba97SEli Cohen return size; 344e126ba97SEli Cohen } 345e126ba97SEli Cohen 346e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 347e126ba97SEli Cohen { 348e126ba97SEli Cohen int inl_size = 0; 349e126ba97SEli Cohen int size; 350e126ba97SEli Cohen 351f0313965SErez Shitrit size = sq_overhead(attr); 352e126ba97SEli Cohen if (size < 0) 353e126ba97SEli Cohen return size; 354e126ba97SEli Cohen 355e126ba97SEli Cohen if (attr->cap.max_inline_data) { 356e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 357e126ba97SEli Cohen attr->cap.max_inline_data; 358e126ba97SEli Cohen } 359e126ba97SEli Cohen 360e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 361e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 362e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 363e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 364e1e66cc2SSagi Grimberg else 365e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 366e126ba97SEli Cohen } 367e126ba97SEli Cohen 368288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 369288c01b7SEli Cohen { 370288c01b7SEli Cohen int max_sge; 371288c01b7SEli Cohen 372288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 373288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 376288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 377288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 378288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 379288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 380288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 381288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 382288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 383288c01b7SEli Cohen else 384288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 385288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 386288c01b7SEli Cohen 387288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 388288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 389288c01b7SEli Cohen } 390288c01b7SEli Cohen 391e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 392e126ba97SEli Cohen struct mlx5_ib_qp *qp) 393e126ba97SEli Cohen { 394e126ba97SEli Cohen int wqe_size; 395e126ba97SEli Cohen int wq_size; 396e126ba97SEli Cohen 397e126ba97SEli Cohen if (!attr->cap.max_send_wr) 398e126ba97SEli Cohen return 0; 399e126ba97SEli Cohen 400e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 401e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 402e126ba97SEli Cohen if (wqe_size < 0) 403e126ba97SEli Cohen return wqe_size; 404e126ba97SEli Cohen 405938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 406b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 407938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 408e126ba97SEli Cohen return -EINVAL; 409e126ba97SEli Cohen } 410e126ba97SEli Cohen 411f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 412e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 413e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 414e126ba97SEli Cohen 415e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 416e1e66cc2SSagi Grimberg qp->signature_en = true; 417e1e66cc2SSagi Grimberg 418e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 419e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 420938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4211974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4221974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 423938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 424938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 425b125a54bSEli Cohen return -ENOMEM; 426b125a54bSEli Cohen } 427e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 428288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 429288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 430288c01b7SEli Cohen return -ENOMEM; 431288c01b7SEli Cohen 432288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 433b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 434b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 435e126ba97SEli Cohen 436e126ba97SEli Cohen return wq_size; 437e126ba97SEli Cohen } 438e126ba97SEli Cohen 439e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 440e126ba97SEli Cohen struct mlx5_ib_qp *qp, 44119098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4420fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4430fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 444e126ba97SEli Cohen { 445e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 446e126ba97SEli Cohen 447938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 448e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 449938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 450e126ba97SEli Cohen return -EINVAL; 451e126ba97SEli Cohen } 452e126ba97SEli Cohen 453e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 454e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 455e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 456e126ba97SEli Cohen return -EINVAL; 457e126ba97SEli Cohen } 458e126ba97SEli Cohen 459e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 460e126ba97SEli Cohen 461938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 462e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 463938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 464938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 465e126ba97SEli Cohen return -EINVAL; 466e126ba97SEli Cohen } 467e126ba97SEli Cohen 468c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 469c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4700fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4710fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4720fb2ed66Smajd@mellanox.com } else { 47319098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 474e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4750fb2ed66Smajd@mellanox.com } 476e126ba97SEli Cohen 477e126ba97SEli Cohen return 0; 478e126ba97SEli Cohen } 479e126ba97SEli Cohen 480e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 481e126ba97SEli Cohen { 482e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 483e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 484e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 485e126ba97SEli Cohen !attr->cap.max_recv_wr) 486e126ba97SEli Cohen return 0; 487e126ba97SEli Cohen 488e126ba97SEli Cohen return 1; 489e126ba97SEli Cohen } 490e126ba97SEli Cohen 4910b80c14fSEli Cohen enum { 4920b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4930b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4940b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4950b80c14fSEli Cohen * "odd/even" order 4960b80c14fSEli Cohen */ 4970b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4980b80c14fSEli Cohen }; 4990b80c14fSEli Cohen 500b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 501b037c29aSEli Cohen { 50231a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 503b037c29aSEli Cohen } 504b037c29aSEli Cohen 505b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 506b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 507c1be5232SEli Cohen { 508c1be5232SEli Cohen int n; 509c1be5232SEli Cohen 510b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 511b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 512c1be5232SEli Cohen 513c1be5232SEli Cohen return n >= 0 ? n : 0; 514c1be5232SEli Cohen } 515c1be5232SEli Cohen 51618b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 51718b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 51818b0362eSYishai Hadas { 51918b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 52018b0362eSYishai Hadas } 52118b0362eSYishai Hadas 522b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 523b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 524c1be5232SEli Cohen { 525c1be5232SEli Cohen int med; 526c1be5232SEli Cohen 527b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 528b037c29aSEli Cohen return ++med; 529c1be5232SEli Cohen } 530c1be5232SEli Cohen 531b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 532b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 533e126ba97SEli Cohen { 534e126ba97SEli Cohen int i; 535e126ba97SEli Cohen 536b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 537b037c29aSEli Cohen if (!bfregi->count[i]) { 5382f5ff264SEli Cohen bfregi->count[i]++; 539e126ba97SEli Cohen return i; 540e126ba97SEli Cohen } 541e126ba97SEli Cohen } 542e126ba97SEli Cohen 543e126ba97SEli Cohen return -ENOMEM; 544e126ba97SEli Cohen } 545e126ba97SEli Cohen 546b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 547b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 548e126ba97SEli Cohen { 54918b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 550e126ba97SEli Cohen int i; 551e126ba97SEli Cohen 55218b0362eSYishai Hadas if (minidx < 0) 55318b0362eSYishai Hadas return minidx; 55418b0362eSYishai Hadas 55518b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 5562f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 557e126ba97SEli Cohen minidx = i; 5580b80c14fSEli Cohen if (!bfregi->count[minidx]) 5590b80c14fSEli Cohen break; 560e126ba97SEli Cohen } 561e126ba97SEli Cohen 5622f5ff264SEli Cohen bfregi->count[minidx]++; 563e126ba97SEli Cohen return minidx; 564e126ba97SEli Cohen } 565e126ba97SEli Cohen 566b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 567ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 568e126ba97SEli Cohen { 569ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 570e126ba97SEli Cohen 5712f5ff264SEli Cohen mutex_lock(&bfregi->lock); 572ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 573ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 574ffaf58deSLeon Romanovsky if (bfregn < 0) 575ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 576ffaf58deSLeon Romanovsky } 577ffaf58deSLeon Romanovsky 578ffaf58deSLeon Romanovsky if (bfregn < 0) { 5790b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5802f5ff264SEli Cohen bfregn = 0; 5812f5ff264SEli Cohen bfregi->count[bfregn]++; 582e126ba97SEli Cohen } 5832f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 584e126ba97SEli Cohen 5852f5ff264SEli Cohen return bfregn; 586e126ba97SEli Cohen } 587e126ba97SEli Cohen 5884ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 589e126ba97SEli Cohen { 5902f5ff264SEli Cohen mutex_lock(&bfregi->lock); 591b037c29aSEli Cohen bfregi->count[bfregn]--; 5922f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 593e126ba97SEli Cohen } 594e126ba97SEli Cohen 595e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 596e126ba97SEli Cohen { 597e126ba97SEli Cohen switch (state) { 598e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 599e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 600e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 601e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 602e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 603e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 604e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 605e126ba97SEli Cohen default: return -1; 606e126ba97SEli Cohen } 607e126ba97SEli Cohen } 608e126ba97SEli Cohen 609e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 610e126ba97SEli Cohen { 611e126ba97SEli Cohen switch (type) { 612e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 613e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 614e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 615e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 616e126ba97SEli Cohen case IB_QPT_XRC_INI: 617e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 618e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 619d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 620c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 621e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 622e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6230fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 624e126ba97SEli Cohen case IB_QPT_MAX: 625e126ba97SEli Cohen default: return -EINVAL; 626e126ba97SEli Cohen } 627e126ba97SEli Cohen } 628e126ba97SEli Cohen 62989ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 63089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63189ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 63289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63389ea94a7SMaor Gottlieb 6347c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 63505f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 6361ee47ab3SYishai Hadas bool dyn_bfreg) 637e126ba97SEli Cohen { 63805f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 63905f58cebSLeon Romanovsky u32 index_of_sys_page; 64005f58cebSLeon Romanovsky u32 offset; 641b037c29aSEli Cohen 642b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 643b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 644b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 645b037c29aSEli Cohen 64605f58cebSLeon Romanovsky if (dyn_bfreg) { 64705f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 64805f58cebSLeon Romanovsky 6497c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 6507c043e90SYishai Hadas return -EINVAL; 6517c043e90SYishai Hadas 6521ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6531ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6541ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6551ee47ab3SYishai Hadas return -EINVAL; 6561ee47ab3SYishai Hadas } 6571ee47ab3SYishai Hadas } 658b037c29aSEli Cohen 6591ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 660b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 661e126ba97SEli Cohen } 662e126ba97SEli Cohen 66319098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 66419098df2Smajd@mellanox.com struct ib_pd *pd, 66519098df2Smajd@mellanox.com unsigned long addr, size_t size, 66619098df2Smajd@mellanox.com struct ib_umem **umem, 66719098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66819098df2Smajd@mellanox.com u32 *offset) 66919098df2Smajd@mellanox.com { 67019098df2Smajd@mellanox.com int err; 67119098df2Smajd@mellanox.com 67219098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 67319098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 67419098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 67519098df2Smajd@mellanox.com return PTR_ERR(*umem); 67619098df2Smajd@mellanox.com } 67719098df2Smajd@mellanox.com 678762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67919098df2Smajd@mellanox.com 68019098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 68119098df2Smajd@mellanox.com if (err) { 68219098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 68319098df2Smajd@mellanox.com goto err_umem; 68419098df2Smajd@mellanox.com } 68519098df2Smajd@mellanox.com 68619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68719098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68819098df2Smajd@mellanox.com 68919098df2Smajd@mellanox.com return 0; 69019098df2Smajd@mellanox.com 69119098df2Smajd@mellanox.com err_umem: 69219098df2Smajd@mellanox.com ib_umem_release(*umem); 69319098df2Smajd@mellanox.com *umem = NULL; 69419098df2Smajd@mellanox.com 69519098df2Smajd@mellanox.com return err; 69619098df2Smajd@mellanox.com } 69719098df2Smajd@mellanox.com 698fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 699fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 70079b20a6cSYishai Hadas { 70179b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70279b20a6cSYishai Hadas 703fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 704fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 705fe248c3aSMaor Gottlieb 70679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70779b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70879b20a6cSYishai Hadas if (rwq->umem) 70979b20a6cSYishai Hadas ib_umem_release(rwq->umem); 71079b20a6cSYishai Hadas } 71179b20a6cSYishai Hadas 71279b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 71379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 71479b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 71579b20a6cSYishai Hadas { 71679b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71779b20a6cSYishai Hadas int page_shift = 0; 71879b20a6cSYishai Hadas int npages; 71979b20a6cSYishai Hadas u32 offset = 0; 72079b20a6cSYishai Hadas int ncont = 0; 72179b20a6cSYishai Hadas int err; 72279b20a6cSYishai Hadas 72379b20a6cSYishai Hadas if (!ucmd->buf_addr) 72479b20a6cSYishai Hadas return -EINVAL; 72579b20a6cSYishai Hadas 72679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72779b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72879b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72979b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 73079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 73179b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 73279b20a6cSYishai Hadas return err; 73379b20a6cSYishai Hadas } 73479b20a6cSYishai Hadas 735762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 73679b20a6cSYishai Hadas &ncont, NULL); 73779b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73879b20a6cSYishai Hadas &rwq->rq_page_offset); 73979b20a6cSYishai Hadas if (err) { 74079b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 74179b20a6cSYishai Hadas goto err_umem; 74279b20a6cSYishai Hadas } 74379b20a6cSYishai Hadas 74479b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 74579b20a6cSYishai Hadas rwq->page_shift = page_shift; 74679b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74779b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74879b20a6cSYishai Hadas 74979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 75079b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 75179b20a6cSYishai Hadas npages, page_shift, ncont, offset); 75279b20a6cSYishai Hadas 75379b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 75479b20a6cSYishai Hadas if (err) { 75579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 75679b20a6cSYishai Hadas goto err_umem; 75779b20a6cSYishai Hadas } 75879b20a6cSYishai Hadas 75979b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 76079b20a6cSYishai Hadas return 0; 76179b20a6cSYishai Hadas 76279b20a6cSYishai Hadas err_umem: 76379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 76479b20a6cSYishai Hadas return err; 76579b20a6cSYishai Hadas } 76679b20a6cSYishai Hadas 767b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 768b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 769b037c29aSEli Cohen { 770b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 771b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 772b037c29aSEli Cohen } 773b037c29aSEli Cohen 774e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 775e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7760fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77709a7d9ecSSaeed Mahameed u32 **in, 77819098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 780e126ba97SEli Cohen { 781e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 782e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 78319098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7849e9c47d0SEli Cohen int page_shift = 0; 7851ee47ab3SYishai Hadas int uar_index = 0; 786e126ba97SEli Cohen int npages; 7879e9c47d0SEli Cohen u32 offset = 0; 7882f5ff264SEli Cohen int bfregn; 7899e9c47d0SEli Cohen int ncont = 0; 79009a7d9ecSSaeed Mahameed __be64 *pas; 79109a7d9ecSSaeed Mahameed void *qpc; 792e126ba97SEli Cohen int err; 793e126ba97SEli Cohen 794e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 795e126ba97SEli Cohen if (err) { 796e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 797e126ba97SEli Cohen return err; 798e126ba97SEli Cohen } 799e126ba97SEli Cohen 800e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 8011ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8021ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8031ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8041ee47ab3SYishai Hadas if (uar_index < 0) 8051ee47ab3SYishai Hadas return uar_index; 8061ee47ab3SYishai Hadas 8071ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8081ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 809e126ba97SEli Cohen /* 810e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 811e126ba97SEli Cohen */ 812051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8132f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8141ee47ab3SYishai Hadas } 815051f2630SLeon Romanovsky else { 816ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 817ffaf58deSLeon Romanovsky if (bfregn < 0) 8182f5ff264SEli Cohen return bfregn; 819e126ba97SEli Cohen } 820e126ba97SEli Cohen 8212f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8221ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8231ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8241ee47ab3SYishai Hadas false); 825e126ba97SEli Cohen 82648fea837SHaggai Eran qp->rq.offset = 0; 82748fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 82848fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 82948fea837SHaggai Eran 8300fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 831e126ba97SEli Cohen if (err) 8322f5ff264SEli Cohen goto err_bfreg; 833e126ba97SEli Cohen 83419098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 83519098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 83619098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 83719098df2Smajd@mellanox.com ubuffer->buf_size, 83819098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 83919098df2Smajd@mellanox.com &ncont, &offset); 84019098df2Smajd@mellanox.com if (err) 8412f5ff264SEli Cohen goto err_bfreg; 8429e9c47d0SEli Cohen } else { 84319098df2Smajd@mellanox.com ubuffer->umem = NULL; 8449e9c47d0SEli Cohen } 845e126ba97SEli Cohen 84609a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 84709a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8481b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 849e126ba97SEli Cohen if (!*in) { 850e126ba97SEli Cohen err = -ENOMEM; 851e126ba97SEli Cohen goto err_umem; 852e126ba97SEli Cohen } 853e126ba97SEli Cohen 854991d2198SYishai Hadas MLX5_SET(create_qp_in, *in, uid, to_mpd(pd)->uid); 85509a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 85609a7d9ecSSaeed Mahameed if (ubuffer->umem) 85709a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 85809a7d9ecSSaeed Mahameed 85909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86009a7d9ecSSaeed Mahameed 86109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86309a7d9ecSSaeed Mahameed 86409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8651ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 866b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8671ee47ab3SYishai Hadas else 8681ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8692f5ff264SEli Cohen qp->bfregn = bfregn; 870e126ba97SEli Cohen 871e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 872e126ba97SEli Cohen if (err) { 873e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 874e126ba97SEli Cohen goto err_free; 875e126ba97SEli Cohen } 876e126ba97SEli Cohen 87741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 878e126ba97SEli Cohen if (err) { 879e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 880e126ba97SEli Cohen goto err_unmap; 881e126ba97SEli Cohen } 882e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 883e126ba97SEli Cohen 884e126ba97SEli Cohen return 0; 885e126ba97SEli Cohen 886e126ba97SEli Cohen err_unmap: 887e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 888e126ba97SEli Cohen 889e126ba97SEli Cohen err_free: 890479163f4SAl Viro kvfree(*in); 891e126ba97SEli Cohen 892e126ba97SEli Cohen err_umem: 89319098df2Smajd@mellanox.com if (ubuffer->umem) 89419098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 895e126ba97SEli Cohen 8962f5ff264SEli Cohen err_bfreg: 8971ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8984ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 899e126ba97SEli Cohen return err; 900e126ba97SEli Cohen } 901e126ba97SEli Cohen 902b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 903b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 904e126ba97SEli Cohen { 905e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 906e126ba97SEli Cohen 907e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 908e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 90919098df2Smajd@mellanox.com if (base->ubuffer.umem) 91019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9111ee47ab3SYishai Hadas 9121ee47ab3SYishai Hadas /* 9131ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9141ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9151ee47ab3SYishai Hadas */ 9161ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9174ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 918e126ba97SEli Cohen } 919e126ba97SEli Cohen 920e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 921e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 922e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 92419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 925e126ba97SEli Cohen { 926e126ba97SEli Cohen int uar_index; 92709a7d9ecSSaeed Mahameed void *qpc; 928e126ba97SEli Cohen int err; 929e126ba97SEli Cohen 930f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 931f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 932b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 934b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9351a4c3a3dSEli Cohen return -EINVAL; 936e126ba97SEli Cohen 937e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9385fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9395fe9dec0SEli Cohen else 9405fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 941e126ba97SEli Cohen 942d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 943d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 944d8030b0dSEli Cohen */ 945d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9465fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 947e126ba97SEli Cohen 948e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 949e126ba97SEli Cohen if (err < 0) { 950e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9515fe9dec0SEli Cohen return err; 952e126ba97SEli Cohen } 953e126ba97SEli Cohen 954e126ba97SEli Cohen qp->rq.offset = 0; 955e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 95619098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 957e126ba97SEli Cohen 95819098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 959e126ba97SEli Cohen if (err) { 960e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9615fe9dec0SEli Cohen return err; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 964e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 96509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 96609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9671b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 968e126ba97SEli Cohen if (!*in) { 969e126ba97SEli Cohen err = -ENOMEM; 970e126ba97SEli Cohen goto err_buf; 971e126ba97SEli Cohen } 97209a7d9ecSSaeed Mahameed 97309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 97409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 97509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 97609a7d9ecSSaeed Mahameed 977e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 97809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 97909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 980e126ba97SEli Cohen 981b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 983b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 984b11a4f9cSHaggai Eran } 985b11a4f9cSHaggai Eran 98609a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 98709a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 988e126ba97SEli Cohen 9899603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 990e126ba97SEli Cohen if (err) { 991e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 992e126ba97SEli Cohen goto err_free; 993e126ba97SEli Cohen } 994e126ba97SEli Cohen 995b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 996b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 997b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 998b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 999b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1000b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1001b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1002b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1003b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1004b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1005e126ba97SEli Cohen 1006e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1007e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1008e126ba97SEli Cohen err = -ENOMEM; 1009e126ba97SEli Cohen goto err_wrid; 1010e126ba97SEli Cohen } 1011e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1012e126ba97SEli Cohen 1013e126ba97SEli Cohen return 0; 1014e126ba97SEli Cohen 1015e126ba97SEli Cohen err_wrid: 1016b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1017b5883008SLi Dongyang kvfree(qp->sq.w_list); 1018b5883008SLi Dongyang kvfree(qp->sq.wrid); 1019b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1020b5883008SLi Dongyang kvfree(qp->rq.wrid); 1021f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1022e126ba97SEli Cohen 1023e126ba97SEli Cohen err_free: 1024479163f4SAl Viro kvfree(*in); 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen err_buf: 10279603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1028e126ba97SEli Cohen return err; 1029e126ba97SEli Cohen } 1030e126ba97SEli Cohen 1031e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1032e126ba97SEli Cohen { 1033b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1034b5883008SLi Dongyang kvfree(qp->sq.w_list); 1035b5883008SLi Dongyang kvfree(qp->sq.wrid); 1036b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1037b5883008SLi Dongyang kvfree(qp->rq.wrid); 1038f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10399603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1040e126ba97SEli Cohen } 1041e126ba97SEli Cohen 104209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1043e126ba97SEli Cohen { 1044e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1045c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1046e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 104709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1048e126ba97SEli Cohen else if (!qp->has_rq) 104909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1050e126ba97SEli Cohen else 105109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1052e126ba97SEli Cohen } 1053e126ba97SEli Cohen 1054e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1055e126ba97SEli Cohen { 10565d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 10575d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1058e126ba97SEli Cohen return 1; 1059e126ba97SEli Cohen 1060e126ba97SEli Cohen return 0; 1061e126ba97SEli Cohen } 1062e126ba97SEli Cohen 10630fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1064c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10651cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 10661cd6dbd3SYishai Hadas struct ib_pd *pd) 10670fb2ed66Smajd@mellanox.com { 1068c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10690fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10700fb2ed66Smajd@mellanox.com 10711cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 10720fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1073c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1074c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1075c2e53b2cSYishai Hadas 10760fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10770fb2ed66Smajd@mellanox.com } 10780fb2ed66Smajd@mellanox.com 10790fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10801cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 10810fb2ed66Smajd@mellanox.com { 10821cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 10830fb2ed66Smajd@mellanox.com } 10840fb2ed66Smajd@mellanox.com 1085b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1086b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1087b96c9ddeSMark Bloch { 1088b96c9ddeSMark Bloch if (sq->flow_rule) 1089b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1090b96c9ddeSMark Bloch } 1091b96c9ddeSMark Bloch 10920fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10930fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10940fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10950fb2ed66Smajd@mellanox.com { 10960fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10970fb2ed66Smajd@mellanox.com __be64 *pas; 10980fb2ed66Smajd@mellanox.com void *in; 10990fb2ed66Smajd@mellanox.com void *sqc; 11000fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11010fb2ed66Smajd@mellanox.com void *wq; 11020fb2ed66Smajd@mellanox.com int inlen; 11030fb2ed66Smajd@mellanox.com int err; 11040fb2ed66Smajd@mellanox.com int page_shift = 0; 11050fb2ed66Smajd@mellanox.com int npages; 11060fb2ed66Smajd@mellanox.com int ncont = 0; 11070fb2ed66Smajd@mellanox.com u32 offset = 0; 11080fb2ed66Smajd@mellanox.com 11090fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11100fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11110fb2ed66Smajd@mellanox.com &ncont, &offset); 11120fb2ed66Smajd@mellanox.com if (err) 11130fb2ed66Smajd@mellanox.com return err; 11140fb2ed66Smajd@mellanox.com 11150fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11170fb2ed66Smajd@mellanox.com if (!in) { 11180fb2ed66Smajd@mellanox.com err = -ENOMEM; 11190fb2ed66Smajd@mellanox.com goto err_umem; 11200fb2ed66Smajd@mellanox.com } 11210fb2ed66Smajd@mellanox.com 1122c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 11230fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11240fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1125795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1126795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11270fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11280fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11290fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11310fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113296dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113396dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 113496dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11350fb2ed66Smajd@mellanox.com 11360fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11400fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11420fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11450fb2ed66Smajd@mellanox.com 11460fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11470fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11480fb2ed66Smajd@mellanox.com 11490fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11500fb2ed66Smajd@mellanox.com 11510fb2ed66Smajd@mellanox.com kvfree(in); 11520fb2ed66Smajd@mellanox.com 11530fb2ed66Smajd@mellanox.com if (err) 11540fb2ed66Smajd@mellanox.com goto err_umem; 11550fb2ed66Smajd@mellanox.com 1156b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1157b96c9ddeSMark Bloch if (err) 1158b96c9ddeSMark Bloch goto err_flow; 1159b96c9ddeSMark Bloch 11600fb2ed66Smajd@mellanox.com return 0; 11610fb2ed66Smajd@mellanox.com 1162b96c9ddeSMark Bloch err_flow: 1163b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1164b96c9ddeSMark Bloch 11650fb2ed66Smajd@mellanox.com err_umem: 11660fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11670fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11680fb2ed66Smajd@mellanox.com 11690fb2ed66Smajd@mellanox.com return err; 11700fb2ed66Smajd@mellanox.com } 11710fb2ed66Smajd@mellanox.com 11720fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11730fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11740fb2ed66Smajd@mellanox.com { 1175b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11760fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11770fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11780fb2ed66Smajd@mellanox.com } 11790fb2ed66Smajd@mellanox.com 11802c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11810fb2ed66Smajd@mellanox.com { 11820fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11830fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11840fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11850fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11860fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11870fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11880fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11890fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11900fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11910fb2ed66Smajd@mellanox.com 11920fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11930fb2ed66Smajd@mellanox.com } 11940fb2ed66Smajd@mellanox.com 11950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11962c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 119734d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 11980fb2ed66Smajd@mellanox.com { 1199358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12000fb2ed66Smajd@mellanox.com __be64 *pas; 12010fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12020fb2ed66Smajd@mellanox.com void *in; 12030fb2ed66Smajd@mellanox.com void *rqc; 12040fb2ed66Smajd@mellanox.com void *wq; 12050fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12062c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12072c292dbbSBoris Pismenny size_t inlen; 12080fb2ed66Smajd@mellanox.com int err; 12092c292dbbSBoris Pismenny 12102c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12112c292dbbSBoris Pismenny return -EINVAL; 12120fb2ed66Smajd@mellanox.com 12130fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12141b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12150fb2ed66Smajd@mellanox.com if (!in) 12160fb2ed66Smajd@mellanox.com return -ENOMEM; 12170fb2ed66Smajd@mellanox.com 121834d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 12190fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1220e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12210fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12220fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12230fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12240fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12250fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12260fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12270fb2ed66Smajd@mellanox.com 1228358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1229358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1230358e42eaSMajd Dibbiny 12310fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12320fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1233b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1234b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12350fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12360fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12370fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12410fb2ed66Smajd@mellanox.com 12420fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12430fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12440fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12450fb2ed66Smajd@mellanox.com 12460fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12470fb2ed66Smajd@mellanox.com 12480fb2ed66Smajd@mellanox.com kvfree(in); 12490fb2ed66Smajd@mellanox.com 12500fb2ed66Smajd@mellanox.com return err; 12510fb2ed66Smajd@mellanox.com } 12520fb2ed66Smajd@mellanox.com 12530fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12540fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12550fb2ed66Smajd@mellanox.com { 12560fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12570fb2ed66Smajd@mellanox.com } 12580fb2ed66Smajd@mellanox.com 1259f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1260f95ef6cbSMaor Gottlieb { 1261f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1262f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1263f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1264f95ef6cbSMaor Gottlieb } 1265f95ef6cbSMaor Gottlieb 12660042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12670042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1268443c1cf9SYishai Hadas u32 qp_flags_en, 1269443c1cf9SYishai Hadas struct ib_pd *pd) 12700042f9e4SMark Bloch { 12710042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 12720042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 12730042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1274443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 12750042f9e4SMark Bloch } 12760042f9e4SMark Bloch 12770fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1278f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1279443c1cf9SYishai Hadas u32 *qp_flags_en, 1280443c1cf9SYishai Hadas struct ib_pd *pd) 12810fb2ed66Smajd@mellanox.com { 1282175edba8SMark Bloch u8 lb_flag = 0; 12830fb2ed66Smajd@mellanox.com u32 *in; 12840fb2ed66Smajd@mellanox.com void *tirc; 12850fb2ed66Smajd@mellanox.com int inlen; 12860fb2ed66Smajd@mellanox.com int err; 12870fb2ed66Smajd@mellanox.com 12880fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12891b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12900fb2ed66Smajd@mellanox.com if (!in) 12910fb2ed66Smajd@mellanox.com return -ENOMEM; 12920fb2ed66Smajd@mellanox.com 1293443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 12940fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12950fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12960fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12970fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1298175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1299f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 13000fb2ed66Smajd@mellanox.com 1301175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1302175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1303175edba8SMark Bloch 1304175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1305175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1306175edba8SMark Bloch 1307175edba8SMark Bloch if (dev->rep) { 1308175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1309175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1310175edba8SMark Bloch } 1311175edba8SMark Bloch 1312175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1313ec9c2fb8SMark Bloch 13140fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 13150fb2ed66Smajd@mellanox.com 13160042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 13170042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 13180042f9e4SMark Bloch 13190042f9e4SMark Bloch if (err) 1320443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 13210042f9e4SMark Bloch } 13220fb2ed66Smajd@mellanox.com kvfree(in); 13230fb2ed66Smajd@mellanox.com 13240fb2ed66Smajd@mellanox.com return err; 13250fb2ed66Smajd@mellanox.com } 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13282c292dbbSBoris Pismenny u32 *in, size_t inlen, 13297f72052cSYishai Hadas struct ib_pd *pd, 13307f72052cSYishai Hadas struct ib_udata *udata, 13317f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 13320fb2ed66Smajd@mellanox.com { 13330fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13340fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13350fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13360fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13370fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13380fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13390fb2ed66Smajd@mellanox.com int err; 13400fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13417f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 13420fb2ed66Smajd@mellanox.com 13430fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13441cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 13450fb2ed66Smajd@mellanox.com if (err) 13460fb2ed66Smajd@mellanox.com return err; 13470fb2ed66Smajd@mellanox.com 13480fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13490fb2ed66Smajd@mellanox.com if (err) 13500fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13510fb2ed66Smajd@mellanox.com 13527f72052cSYishai Hadas if (uid) { 13537f72052cSYishai Hadas resp->tisn = sq->tisn; 13547f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 13557f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 13567f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 13577f72052cSYishai Hadas } 13587f72052cSYishai Hadas 13590fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13601d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13610fb2ed66Smajd@mellanox.com } 13620fb2ed66Smajd@mellanox.com 13630fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1364358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1365358e42eaSMajd Dibbiny 1366e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1367e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1368b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1369b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 137034d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 13710fb2ed66Smajd@mellanox.com if (err) 13720fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13730fb2ed66Smajd@mellanox.com 1374443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 13750fb2ed66Smajd@mellanox.com if (err) 13760fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13777f72052cSYishai Hadas 13787f72052cSYishai Hadas if (uid) { 13797f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 13807f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 13817f72052cSYishai Hadas resp->tirn = rq->tirn; 13827f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 13837f72052cSYishai Hadas } 13840fb2ed66Smajd@mellanox.com } 13850fb2ed66Smajd@mellanox.com 13860fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13870fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13887f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 13897f72052cSYishai Hadas if (err) 13907f72052cSYishai Hadas goto err_destroy_tir; 13910fb2ed66Smajd@mellanox.com 13920fb2ed66Smajd@mellanox.com return 0; 13930fb2ed66Smajd@mellanox.com 13947f72052cSYishai Hadas err_destroy_tir: 13957f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 13960fb2ed66Smajd@mellanox.com err_destroy_rq: 13970fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13980fb2ed66Smajd@mellanox.com err_destroy_sq: 13990fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 14000fb2ed66Smajd@mellanox.com return err; 14010fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14020fb2ed66Smajd@mellanox.com err_destroy_tis: 14031cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 14040fb2ed66Smajd@mellanox.com 14050fb2ed66Smajd@mellanox.com return err; 14060fb2ed66Smajd@mellanox.com } 14070fb2ed66Smajd@mellanox.com 14080fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 14090fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 14100fb2ed66Smajd@mellanox.com { 14110fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14120fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14130fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14140fb2ed66Smajd@mellanox.com 14150fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1416443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 14170fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 14180fb2ed66Smajd@mellanox.com } 14190fb2ed66Smajd@mellanox.com 14200fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14210fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14221cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 14230fb2ed66Smajd@mellanox.com } 14240fb2ed66Smajd@mellanox.com } 14250fb2ed66Smajd@mellanox.com 14260fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 14270fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 14280fb2ed66Smajd@mellanox.com { 14290fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14300fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14310fb2ed66Smajd@mellanox.com 14320fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 14330fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 14340fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 14350fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 14360fb2ed66Smajd@mellanox.com } 14370fb2ed66Smajd@mellanox.com 143828d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 143928d61370SYishai Hadas { 14400042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14410042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14420042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1443443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1444443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 144528d61370SYishai Hadas } 144628d61370SYishai Hadas 144728d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 144828d61370SYishai Hadas struct ib_pd *pd, 144928d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 145028d61370SYishai Hadas struct ib_udata *udata) 145128d61370SYishai Hadas { 145228d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 145328d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 145428d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 145528d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 145628d61370SYishai Hadas int inlen; 145728d61370SYishai Hadas int err; 145828d61370SYishai Hadas u32 *in; 145928d61370SYishai Hadas void *tirc; 146028d61370SYishai Hadas void *hfso; 146128d61370SYishai Hadas u32 selected_fields = 0; 14622d93fc85SMatan Barak u32 outer_l4; 146328d61370SYishai Hadas size_t min_resp_len; 146428d61370SYishai Hadas u32 tdn = mucontext->tdn; 146528d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 146628d61370SYishai Hadas size_t required_cmd_sz; 1467175edba8SMark Bloch u8 lb_flag = 0; 146828d61370SYishai Hadas 146928d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 147028d61370SYishai Hadas return -EOPNOTSUPP; 147128d61370SYishai Hadas 147228d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 147328d61370SYishai Hadas return -EINVAL; 147428d61370SYishai Hadas 14752f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 147628d61370SYishai Hadas if (udata->outlen < min_resp_len) 147728d61370SYishai Hadas return -EINVAL; 147828d61370SYishai Hadas 1479f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 148028d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 148128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 148228d61370SYishai Hadas return -EINVAL; 148328d61370SYishai Hadas } 148428d61370SYishai Hadas 148528d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 148628d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 148728d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 148828d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 148928d61370SYishai Hadas return -EOPNOTSUPP; 149028d61370SYishai Hadas } 149128d61370SYishai Hadas 149228d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 149328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 149428d61370SYishai Hadas return -EFAULT; 149528d61370SYishai Hadas } 149628d61370SYishai Hadas 149728d61370SYishai Hadas if (ucmd.comp_mask) { 149828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 149928d61370SYishai Hadas return -EOPNOTSUPP; 150028d61370SYishai Hadas } 150128d61370SYishai Hadas 1502175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1503175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1504175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1505f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1506f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1507f95ef6cbSMaor Gottlieb } 1508f95ef6cbSMaor Gottlieb 1509f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1510f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1511f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 151228d61370SYishai Hadas return -EOPNOTSUPP; 151328d61370SYishai Hadas } 151428d61370SYishai Hadas 1515309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1516309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1517309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1518309fa347SMaor Gottlieb return -EOPNOTSUPP; 1519309fa347SMaor Gottlieb } 1520309fa347SMaor Gottlieb 1521175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1522175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1523175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1524175edba8SMark Bloch } 1525175edba8SMark Bloch 1526175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1527175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1528175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1529175edba8SMark Bloch } 1530175edba8SMark Bloch 153141d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 153228d61370SYishai Hadas if (err) { 153328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 153428d61370SYishai Hadas return -EINVAL; 153528d61370SYishai Hadas } 153628d61370SYishai Hadas 153728d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 15381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 153928d61370SYishai Hadas if (!in) 154028d61370SYishai Hadas return -ENOMEM; 154128d61370SYishai Hadas 1542443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 154328d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 154428d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 154528d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 154628d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 154728d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 154828d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 154928d61370SYishai Hadas 155028d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1551f95ef6cbSMaor Gottlieb 1552f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1553f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1554f95ef6cbSMaor Gottlieb 1555175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1556175edba8SMark Bloch 1557309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1558309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1559309fa347SMaor Gottlieb else 1560309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1561309fa347SMaor Gottlieb 156228d61370SYishai Hadas switch (ucmd.rx_hash_function) { 156328d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 156428d61370SYishai Hadas { 156528d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 156628d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 156728d61370SYishai Hadas 156828d61370SYishai Hadas if (len != ucmd.rx_key_len) { 156928d61370SYishai Hadas err = -EINVAL; 157028d61370SYishai Hadas goto err; 157128d61370SYishai Hadas } 157228d61370SYishai Hadas 157328d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 157428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 157528d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 157628d61370SYishai Hadas break; 157728d61370SYishai Hadas } 157828d61370SYishai Hadas default: 157928d61370SYishai Hadas err = -EOPNOTSUPP; 158028d61370SYishai Hadas goto err; 158128d61370SYishai Hadas } 158228d61370SYishai Hadas 158328d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 158428d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 158528d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 158628d61370SYishai Hadas goto create_tir; 158728d61370SYishai Hadas err = -EINVAL; 158828d61370SYishai Hadas goto err; 158928d61370SYishai Hadas } 159028d61370SYishai Hadas 159128d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 159228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 159328d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 159428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 159528d61370SYishai Hadas err = -EINVAL; 159628d61370SYishai Hadas goto err; 159728d61370SYishai Hadas } 159828d61370SYishai Hadas 159928d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 160028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 160128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 160228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 160328d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 160428d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 160528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 160628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 160728d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 160828d61370SYishai Hadas 16092d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 16102d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 161128d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 16122d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 16132d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 16142d93fc85SMatan Barak 16152d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 16162d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 161728d61370SYishai Hadas err = -EINVAL; 161828d61370SYishai Hadas goto err; 161928d61370SYishai Hadas } 162028d61370SYishai Hadas 162128d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 162228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 162328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 162428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 162528d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 162628d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 162728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 162828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 162928d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 163028d61370SYishai Hadas 163128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 163228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 163328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 163428d61370SYishai Hadas 163528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 163628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 163728d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 163828d61370SYishai Hadas 163928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 164028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 164128d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 164228d61370SYishai Hadas 164328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 164428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 164528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 164628d61370SYishai Hadas 16472d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 16482d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 16492d93fc85SMatan Barak 165028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 165128d61370SYishai Hadas 165228d61370SYishai Hadas create_tir: 165328d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 165428d61370SYishai Hadas 16550042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 16560042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 16570042f9e4SMark Bloch 16580042f9e4SMark Bloch if (err) 1659443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1660443c1cf9SYishai Hadas to_mpd(pd)->uid); 16610042f9e4SMark Bloch } 16620042f9e4SMark Bloch 166328d61370SYishai Hadas if (err) 166428d61370SYishai Hadas goto err; 166528d61370SYishai Hadas 16667f72052cSYishai Hadas if (mucontext->devx_uid) { 16677f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 16687f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 16697f72052cSYishai Hadas } 16707f72052cSYishai Hadas 16717f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 16727f72052cSYishai Hadas if (err) 16737f72052cSYishai Hadas goto err_copy; 16747f72052cSYishai Hadas 167528d61370SYishai Hadas kvfree(in); 167628d61370SYishai Hadas /* qpn is reserved for that QP */ 167728d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1678d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 167928d61370SYishai Hadas return 0; 168028d61370SYishai Hadas 16817f72052cSYishai Hadas err_copy: 16827f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 168328d61370SYishai Hadas err: 168428d61370SYishai Hadas kvfree(in); 168528d61370SYishai Hadas return err; 168628d61370SYishai Hadas } 168728d61370SYishai Hadas 16885d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 16895d6ff1baSYonatan Cohen void *qpc) 16905d6ff1baSYonatan Cohen { 16915d6ff1baSYonatan Cohen int rcqe_sz; 16925d6ff1baSYonatan Cohen 16935d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 16945d6ff1baSYonatan Cohen return; 16955d6ff1baSYonatan Cohen 16965d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 16975d6ff1baSYonatan Cohen 16985d6ff1baSYonatan Cohen if (rcqe_sz == 128) { 16995d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 17005d6ff1baSYonatan Cohen return; 17015d6ff1baSYonatan Cohen } 17025d6ff1baSYonatan Cohen 17035d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCT) 17045d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 17055d6ff1baSYonatan Cohen } 17065d6ff1baSYonatan Cohen 17075d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 17085d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 17095d6ff1baSYonatan Cohen void *qpc) 17105d6ff1baSYonatan Cohen { 17115d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 17125d6ff1baSYonatan Cohen int scqe_sz; 17135d6ff1baSYonatan Cohen 17145d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 17155d6ff1baSYonatan Cohen return; 17165d6ff1baSYonatan Cohen 17175d6ff1baSYonatan Cohen if (init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 17185d6ff1baSYonatan Cohen return; 17195d6ff1baSYonatan Cohen 17205d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 17215d6ff1baSYonatan Cohen if (scqe_sz == 128) { 17225d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 17235d6ff1baSYonatan Cohen return; 17245d6ff1baSYonatan Cohen } 17255d6ff1baSYonatan Cohen 17265d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 17275d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 17285d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 17295d6ff1baSYonatan Cohen } 17305d6ff1baSYonatan Cohen 17312e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 17322e43bb31SYonatan Cohen { 17332e43bb31SYonatan Cohen return (input & ~supported) == 0; 17342e43bb31SYonatan Cohen } 17352e43bb31SYonatan Cohen 1736e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1737e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1738e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1739e126ba97SEli Cohen { 1740e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 174109a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1742938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 17430625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 174489ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 174589ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 174689ea94a7SMaor Gottlieb unsigned long flags; 1747cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 174809a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 174909a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1750e7b169f3SNoa Osherovich int mlx5_st; 1751cfb5e088SHaggai Abramovsky void *qpc; 175209a7d9ecSSaeed Mahameed u32 *in; 175309a7d9ecSSaeed Mahameed int err; 1754e126ba97SEli Cohen 1755e126ba97SEli Cohen mutex_init(&qp->mutex); 1756e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1757e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1758e126ba97SEli Cohen 1759e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1760e7b169f3SNoa Osherovich if (mlx5_st < 0) 1761e7b169f3SNoa Osherovich return -EINVAL; 1762e7b169f3SNoa Osherovich 176328d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 176428d61370SYishai Hadas if (!udata) 176528d61370SYishai Hadas return -ENOSYS; 176628d61370SYishai Hadas 176728d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 176828d61370SYishai Hadas return err; 176928d61370SYishai Hadas } 177028d61370SYishai Hadas 1771f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1772938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1773f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1774f360d88aSEli Cohen return -EINVAL; 1775f360d88aSEli Cohen } else { 1776f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1777f360d88aSEli Cohen } 1778f360d88aSEli Cohen } 1779f360d88aSEli Cohen 1780051f2630SLeon Romanovsky if (init_attr->create_flags & 1781051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1782051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1783051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1784051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1785051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1786051f2630SLeon Romanovsky return -EINVAL; 1787051f2630SLeon Romanovsky } 1788051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1789051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1790051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1791051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1792051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1793051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1794051f2630SLeon Romanovsky } 1795f0313965SErez Shitrit 1796f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1797f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1798f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1799f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1800f0313965SErez Shitrit return -EOPNOTSUPP; 1801f0313965SErez Shitrit } 1802f0313965SErez Shitrit 1803358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1804358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1805358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1806358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1807358e42eaSMajd Dibbiny } 1808358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1809358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1810358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1811358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1812358e42eaSMajd Dibbiny } 1813358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1814358e42eaSMajd Dibbiny } 1815358e42eaSMajd Dibbiny 1816e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1817e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1818e126ba97SEli Cohen 1819e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1820e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1821e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1822e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1823e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1824e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1825e4cc4fa7SNoa Osherovich } 1826e4cc4fa7SNoa Osherovich 1827e126ba97SEli Cohen if (pd && pd->uobject) { 1828e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1829e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1830e126ba97SEli Cohen return -EFAULT; 1831e126ba97SEli Cohen } 1832e126ba97SEli Cohen 18332e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 18342e43bb31SYonatan Cohen MLX5_QP_FLAG_SIGNATURE | 18352e43bb31SYonatan Cohen MLX5_QP_FLAG_SCATTER_CQE | 18362e43bb31SYonatan Cohen MLX5_QP_FLAG_TUNNEL_OFFLOADS | 18372e43bb31SYonatan Cohen MLX5_QP_FLAG_BFREG_INDEX | 18382e43bb31SYonatan Cohen MLX5_QP_FLAG_TYPE_DCT | 18392e43bb31SYonatan Cohen MLX5_QP_FLAG_TYPE_DCI)) 18402e43bb31SYonatan Cohen return -EINVAL; 18412e43bb31SYonatan Cohen 1842cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1843cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1844cfb5e088SHaggai Abramovsky if (err) 1845cfb5e088SHaggai Abramovsky return err; 1846cfb5e088SHaggai Abramovsky 1847e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 18485d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 1849e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1850f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1851f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1852f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1853f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1854f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1855f95ef6cbSMaor Gottlieb } 1856175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 1857175edba8SMark Bloch } 1858175edba8SMark Bloch 1859175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 1860175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1861175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 1862175edba8SMark Bloch return -EOPNOTSUPP; 1863175edba8SMark Bloch } 1864175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1865175edba8SMark Bloch } 1866175edba8SMark Bloch 1867175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1868175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1869175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 1870175edba8SMark Bloch return -EOPNOTSUPP; 1871175edba8SMark Bloch } 1872175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1873f95ef6cbSMaor Gottlieb } 1874c2e53b2cSYishai Hadas 1875c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1876c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1877c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1878c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1879c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1880c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1881c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1882c2e53b2cSYishai Hadas } 1883c2e53b2cSYishai Hadas 1884c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1885c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1886c2e53b2cSYishai Hadas } 1887e126ba97SEli Cohen } else { 1888e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1889e126ba97SEli Cohen } 1890e126ba97SEli Cohen 1891c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1892c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1893c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1894c2e53b2cSYishai Hadas &qp->trans_qp.base; 1895c2e53b2cSYishai Hadas 1896e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1897e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1898e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1899e126ba97SEli Cohen if (err) { 1900e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1901e126ba97SEli Cohen return err; 1902e126ba97SEli Cohen } 1903e126ba97SEli Cohen 1904e126ba97SEli Cohen if (pd) { 1905e126ba97SEli Cohen if (pd->uobject) { 1906938fe83cSSaeed Mahameed __u32 max_wqes = 1907938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1908e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1909e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1910e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1911e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1912e126ba97SEli Cohen return -EINVAL; 1913e126ba97SEli Cohen } 1914938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1915e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1916938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1917e126ba97SEli Cohen return -EINVAL; 1918e126ba97SEli Cohen } 1919b11a4f9cSHaggai Eran if (init_attr->create_flags & 1920b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1921b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1922b11a4f9cSHaggai Eran return -EINVAL; 1923b11a4f9cSHaggai Eran } 19240fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 19250fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1926e126ba97SEli Cohen if (err) 1927e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1928e126ba97SEli Cohen } else { 192919098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 193019098df2Smajd@mellanox.com base); 1931e126ba97SEli Cohen if (err) 1932e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1933e126ba97SEli Cohen } 1934e126ba97SEli Cohen 1935e126ba97SEli Cohen if (err) 1936e126ba97SEli Cohen return err; 1937e126ba97SEli Cohen } else { 19381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1939e126ba97SEli Cohen if (!in) 1940e126ba97SEli Cohen return -ENOMEM; 1941e126ba97SEli Cohen 1942e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1943e126ba97SEli Cohen } 1944e126ba97SEli Cohen 1945e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1946e126ba97SEli Cohen qp->port = init_attr->port_num; 1947e126ba97SEli Cohen 194809a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 194909a7d9ecSSaeed Mahameed 1950e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 195109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1952e126ba97SEli Cohen 1953e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 195409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1955e126ba97SEli Cohen else 195609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 195709a7d9ecSSaeed Mahameed 1958e126ba97SEli Cohen 1959e126ba97SEli Cohen if (qp->wq_sig) 196009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1961e126ba97SEli Cohen 1962f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 196309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1964f360d88aSEli Cohen 1965051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 196609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1967051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 196809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1969051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 197009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1971051f2630SLeon Romanovsky 1972e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 19735d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 19745d6ff1baSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, qpc); 1975e126ba97SEli Cohen } 1976e126ba97SEli Cohen 1977e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 197809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 197909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1980e126ba97SEli Cohen } 1981e126ba97SEli Cohen 198209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1983e126ba97SEli Cohen 19843fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 198509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 19863fd3307eSArtemy Kovalyov } else { 198709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 19883fd3307eSArtemy Kovalyov if (init_attr->srq && 19893fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 19903fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 19913fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 19923fd3307eSArtemy Kovalyov } 1993e126ba97SEli Cohen 1994e126ba97SEli Cohen /* Set default resources */ 1995e126ba97SEli Cohen switch (init_attr->qp_type) { 1996e126ba97SEli Cohen case IB_QPT_XRC_TGT: 199709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 199809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 199909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 200009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2001e126ba97SEli Cohen break; 2002e126ba97SEli Cohen case IB_QPT_XRC_INI: 200309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 200409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 200509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2006e126ba97SEli Cohen break; 2007e126ba97SEli Cohen default: 2008e126ba97SEli Cohen if (init_attr->srq) { 200909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 201009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2011e126ba97SEli Cohen } else { 201209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 201309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2014e126ba97SEli Cohen } 2015e126ba97SEli Cohen } 2016e126ba97SEli Cohen 2017e126ba97SEli Cohen if (init_attr->send_cq) 201809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2019e126ba97SEli Cohen 2020e126ba97SEli Cohen if (init_attr->recv_cq) 202109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2022e126ba97SEli Cohen 202309a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2024e126ba97SEli Cohen 2025cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 202609a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2027cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 202809a7d9ecSSaeed Mahameed 2029f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2030f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2031f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2032f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2033f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2034f0313965SErez Shitrit } 2035cfb5e088SHaggai Abramovsky 2036b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2037b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2038b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2039b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2040b1383aa6SNoa Osherovich goto err; 2041b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2042b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2043b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2044b1383aa6SNoa Osherovich } else { 2045b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2046b1383aa6SNoa Osherovich } 2047b1383aa6SNoa Osherovich } 2048b1383aa6SNoa Osherovich 20492c292dbbSBoris Pismenny if (inlen < 0) { 20502c292dbbSBoris Pismenny err = -EINVAL; 20512c292dbbSBoris Pismenny goto err; 20522c292dbbSBoris Pismenny } 20532c292dbbSBoris Pismenny 2054c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2055c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 20560fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 20570fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 20587f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 20597f72052cSYishai Hadas &resp); 20600fb2ed66Smajd@mellanox.com } else { 206119098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 20620fb2ed66Smajd@mellanox.com } 20630fb2ed66Smajd@mellanox.com 2064e126ba97SEli Cohen if (err) { 2065e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2066e126ba97SEli Cohen goto err_create; 2067e126ba97SEli Cohen } 2068e126ba97SEli Cohen 2069479163f4SAl Viro kvfree(in); 2070e126ba97SEli Cohen 207119098df2Smajd@mellanox.com base->container_mibqp = qp; 207219098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2073e126ba97SEli Cohen 207489ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 207589ea94a7SMaor Gottlieb &send_cq, &recv_cq); 207689ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 207789ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 207889ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 207989ea94a7SMaor Gottlieb * flow 208089ea94a7SMaor Gottlieb */ 208189ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 208289ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 208389ea94a7SMaor Gottlieb */ 208489ea94a7SMaor Gottlieb if (send_cq) 208589ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 208689ea94a7SMaor Gottlieb if (recv_cq) 208789ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 208889ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 208989ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 209089ea94a7SMaor Gottlieb 2091e126ba97SEli Cohen return 0; 2092e126ba97SEli Cohen 2093e126ba97SEli Cohen err_create: 2094e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2095b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 2096e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2097e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2098e126ba97SEli Cohen 2099b1383aa6SNoa Osherovich err: 2100479163f4SAl Viro kvfree(in); 2101e126ba97SEli Cohen return err; 2102e126ba97SEli Cohen } 2103e126ba97SEli Cohen 2104e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2105e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2106e126ba97SEli Cohen { 2107e126ba97SEli Cohen if (send_cq) { 2108e126ba97SEli Cohen if (recv_cq) { 2109e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 211089ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2111e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2112e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2113e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 211489ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2115e126ba97SEli Cohen __acquire(&recv_cq->lock); 2116e126ba97SEli Cohen } else { 211789ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2118e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2119e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2120e126ba97SEli Cohen } 2121e126ba97SEli Cohen } else { 212289ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 21236a4f139aSEli Cohen __acquire(&recv_cq->lock); 2124e126ba97SEli Cohen } 2125e126ba97SEli Cohen } else if (recv_cq) { 212689ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 21276a4f139aSEli Cohen __acquire(&send_cq->lock); 21286a4f139aSEli Cohen } else { 21296a4f139aSEli Cohen __acquire(&send_cq->lock); 21306a4f139aSEli Cohen __acquire(&recv_cq->lock); 2131e126ba97SEli Cohen } 2132e126ba97SEli Cohen } 2133e126ba97SEli Cohen 2134e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2135e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2136e126ba97SEli Cohen { 2137e126ba97SEli Cohen if (send_cq) { 2138e126ba97SEli Cohen if (recv_cq) { 2139e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2140e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 214189ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2142e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2143e126ba97SEli Cohen __release(&recv_cq->lock); 214489ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2145e126ba97SEli Cohen } else { 2146e126ba97SEli Cohen spin_unlock(&send_cq->lock); 214789ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2148e126ba97SEli Cohen } 2149e126ba97SEli Cohen } else { 21506a4f139aSEli Cohen __release(&recv_cq->lock); 215189ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2152e126ba97SEli Cohen } 2153e126ba97SEli Cohen } else if (recv_cq) { 21546a4f139aSEli Cohen __release(&send_cq->lock); 215589ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 21566a4f139aSEli Cohen } else { 21576a4f139aSEli Cohen __release(&recv_cq->lock); 21586a4f139aSEli Cohen __release(&send_cq->lock); 2159e126ba97SEli Cohen } 2160e126ba97SEli Cohen } 2161e126ba97SEli Cohen 2162e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2163e126ba97SEli Cohen { 2164e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2165e126ba97SEli Cohen } 2166e126ba97SEli Cohen 216789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 216889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2169e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2170e126ba97SEli Cohen { 217189ea94a7SMaor Gottlieb switch (qp_type) { 2172e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2173e126ba97SEli Cohen *send_cq = NULL; 2174e126ba97SEli Cohen *recv_cq = NULL; 2175e126ba97SEli Cohen break; 2176e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2177e126ba97SEli Cohen case IB_QPT_XRC_INI: 217889ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2179e126ba97SEli Cohen *recv_cq = NULL; 2180e126ba97SEli Cohen break; 2181e126ba97SEli Cohen 2182e126ba97SEli Cohen case IB_QPT_SMI: 2183d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2184e126ba97SEli Cohen case IB_QPT_RC: 2185e126ba97SEli Cohen case IB_QPT_UC: 2186e126ba97SEli Cohen case IB_QPT_UD: 2187e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2188e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 21890fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 219089ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 219189ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2192e126ba97SEli Cohen break; 2193e126ba97SEli Cohen 2194e126ba97SEli Cohen case IB_QPT_MAX: 2195e126ba97SEli Cohen default: 2196e126ba97SEli Cohen *send_cq = NULL; 2197e126ba97SEli Cohen *recv_cq = NULL; 2198e126ba97SEli Cohen break; 2199e126ba97SEli Cohen } 2200e126ba97SEli Cohen } 2201e126ba97SEli Cohen 2202ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 220313eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 220413eab21fSAviv Heller u8 lag_tx_affinity); 2205ad5f8e96Smajd@mellanox.com 2206e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2207e126ba97SEli Cohen { 2208e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2209c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 221089ea94a7SMaor Gottlieb unsigned long flags; 2211e126ba97SEli Cohen int err; 2212e126ba97SEli Cohen 221328d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 221428d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 221528d61370SYishai Hadas return; 221628d61370SYishai Hadas } 221728d61370SYishai Hadas 2218c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2219c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 22200fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 22210fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 22220fb2ed66Smajd@mellanox.com 22236aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2224c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2225c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2226ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 22271a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 22281a412fb1SSaeed Mahameed NULL, &base->mqp); 2229ad5f8e96Smajd@mellanox.com } else { 22300680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 22310680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 22320680efa2SAlex Vesker }; 22330680efa2SAlex Vesker 223413eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2235ad5f8e96Smajd@mellanox.com } 2236ad5f8e96Smajd@mellanox.com if (err) 2237427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 223819098df2Smajd@mellanox.com base->mqp.qpn); 22396aec21f6SHaggai Eran } 2240e126ba97SEli Cohen 224189ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 224289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 224389ea94a7SMaor Gottlieb 224489ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 224589ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 224689ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 224789ea94a7SMaor Gottlieb list_del(&qp->qps_list); 224889ea94a7SMaor Gottlieb if (send_cq) 224989ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 225089ea94a7SMaor Gottlieb 225189ea94a7SMaor Gottlieb if (recv_cq) 225289ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2253e126ba97SEli Cohen 2254e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 225519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2256e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2257e126ba97SEli Cohen if (send_cq != recv_cq) 225819098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 225919098df2Smajd@mellanox.com NULL); 2260e126ba97SEli Cohen } 226189ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 226289ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2263e126ba97SEli Cohen 2264c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2265c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 22660fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 22670fb2ed66Smajd@mellanox.com } else { 226819098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2269e126ba97SEli Cohen if (err) 22700fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 22710fb2ed66Smajd@mellanox.com base->mqp.qpn); 22720fb2ed66Smajd@mellanox.com } 2273e126ba97SEli Cohen 2274e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2275e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2276e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2277b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2278e126ba97SEli Cohen } 2279e126ba97SEli Cohen 2280e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2281e126ba97SEli Cohen { 2282e126ba97SEli Cohen switch (type) { 2283e126ba97SEli Cohen case IB_QPT_SMI: 2284e126ba97SEli Cohen return "IB_QPT_SMI"; 2285e126ba97SEli Cohen case IB_QPT_GSI: 2286e126ba97SEli Cohen return "IB_QPT_GSI"; 2287e126ba97SEli Cohen case IB_QPT_RC: 2288e126ba97SEli Cohen return "IB_QPT_RC"; 2289e126ba97SEli Cohen case IB_QPT_UC: 2290e126ba97SEli Cohen return "IB_QPT_UC"; 2291e126ba97SEli Cohen case IB_QPT_UD: 2292e126ba97SEli Cohen return "IB_QPT_UD"; 2293e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2294e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2295e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2296e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2297e126ba97SEli Cohen case IB_QPT_XRC_INI: 2298e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2299e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2300e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2301e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2302e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2303e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2304e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2305b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2306b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2307e126ba97SEli Cohen case IB_QPT_MAX: 2308e126ba97SEli Cohen default: 2309e126ba97SEli Cohen return "Invalid QP type"; 2310e126ba97SEli Cohen } 2311e126ba97SEli Cohen } 2312e126ba97SEli Cohen 2313b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2314b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2315b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2316b4aaa1f0SMoni Shoua { 2317b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2318b4aaa1f0SMoni Shoua int err = 0; 2319b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2320b4aaa1f0SMoni Shoua void *dctc; 2321b4aaa1f0SMoni Shoua 2322b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2323b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2324b4aaa1f0SMoni Shoua 2325b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2326b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2327b4aaa1f0SMoni Shoua if (err) 2328b4aaa1f0SMoni Shoua return ERR_PTR(err); 2329b4aaa1f0SMoni Shoua 2330b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2331b4aaa1f0SMoni Shoua if (!qp) 2332b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2333b4aaa1f0SMoni Shoua 2334b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2335b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2336b4aaa1f0SMoni Shoua err = -ENOMEM; 2337b4aaa1f0SMoni Shoua goto err_free; 2338b4aaa1f0SMoni Shoua } 2339b4aaa1f0SMoni Shoua 2340a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2341b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2342776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2343b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2344b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2345b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2346b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2347b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2348b4aaa1f0SMoni Shoua 23495d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 23505d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 23515d6ff1baSYonatan Cohen 2352b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2353b4aaa1f0SMoni Shoua 2354b4aaa1f0SMoni Shoua return &qp->ibqp; 2355b4aaa1f0SMoni Shoua err_free: 2356b4aaa1f0SMoni Shoua kfree(qp); 2357b4aaa1f0SMoni Shoua return ERR_PTR(err); 2358b4aaa1f0SMoni Shoua } 2359b4aaa1f0SMoni Shoua 2360b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2361e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2362b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2363b4aaa1f0SMoni Shoua struct ib_udata *udata) 2364b4aaa1f0SMoni Shoua { 2365b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2366b4aaa1f0SMoni Shoua int err; 2367b4aaa1f0SMoni Shoua 2368b4aaa1f0SMoni Shoua if (!udata) 2369b4aaa1f0SMoni Shoua return -EINVAL; 2370b4aaa1f0SMoni Shoua 2371b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2372b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2373b4aaa1f0SMoni Shoua return -EINVAL; 2374b4aaa1f0SMoni Shoua } 2375b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2376b4aaa1f0SMoni Shoua if (err) 2377b4aaa1f0SMoni Shoua return err; 2378b4aaa1f0SMoni Shoua 2379b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2380b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2381b4aaa1f0SMoni Shoua } else { 2382b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2383b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2384b4aaa1f0SMoni Shoua } else { 2385b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2386b4aaa1f0SMoni Shoua return -EINVAL; 2387b4aaa1f0SMoni Shoua } 2388b4aaa1f0SMoni Shoua } 2389b4aaa1f0SMoni Shoua 2390b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2391b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2392b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2393b4aaa1f0SMoni Shoua } 2394b4aaa1f0SMoni Shoua 2395b4aaa1f0SMoni Shoua return 0; 2396b4aaa1f0SMoni Shoua } 2397b4aaa1f0SMoni Shoua 2398b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2399b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2400e126ba97SEli Cohen struct ib_udata *udata) 2401e126ba97SEli Cohen { 2402e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2403e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2404e126ba97SEli Cohen u16 xrcdn = 0; 2405e126ba97SEli Cohen int err; 2406b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2407b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2408e126ba97SEli Cohen 2409e126ba97SEli Cohen if (pd) { 2410e126ba97SEli Cohen dev = to_mdev(pd->device); 24110fb2ed66Smajd@mellanox.com 24120fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 24130fb2ed66Smajd@mellanox.com if (!pd->uobject) { 24140fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 24150fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 24160fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 24170fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 24180fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 24190fb2ed66Smajd@mellanox.com } 24200fb2ed66Smajd@mellanox.com } 242109f16cf5SMajd Dibbiny } else { 242209f16cf5SMajd Dibbiny /* being cautious here */ 242309f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 242409f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 242509f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 242609f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 242709f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 242809f16cf5SMajd Dibbiny } 242909f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2430e126ba97SEli Cohen } 2431e126ba97SEli Cohen 2432b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2433b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2434b4aaa1f0SMoni Shoua 2435b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2436b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2437b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2438b4aaa1f0SMoni Shoua if (err) 2439b4aaa1f0SMoni Shoua return ERR_PTR(err); 2440c32a4f29SMoni Shoua 2441c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2442c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2443c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2444c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2445c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2446c32a4f29SMoni Shoua } 2447776a3906SMoni Shoua } else { 2448776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2449c32a4f29SMoni Shoua } 2450b4aaa1f0SMoni Shoua } 2451b4aaa1f0SMoni Shoua 2452e126ba97SEli Cohen switch (init_attr->qp_type) { 2453e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2454e126ba97SEli Cohen case IB_QPT_XRC_INI: 2455938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2456e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2457e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2458e126ba97SEli Cohen } 2459e126ba97SEli Cohen init_attr->recv_cq = NULL; 2460e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2461e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2462e126ba97SEli Cohen init_attr->send_cq = NULL; 2463e126ba97SEli Cohen } 2464e126ba97SEli Cohen 2465e126ba97SEli Cohen /* fall through */ 24660fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2467e126ba97SEli Cohen case IB_QPT_RC: 2468e126ba97SEli Cohen case IB_QPT_UC: 2469e126ba97SEli Cohen case IB_QPT_UD: 2470e126ba97SEli Cohen case IB_QPT_SMI: 2471d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2472e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2473c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2474e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2475e126ba97SEli Cohen if (!qp) 2476e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2477e126ba97SEli Cohen 2478e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2479e126ba97SEli Cohen if (err) { 2480e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2481e126ba97SEli Cohen kfree(qp); 2482e126ba97SEli Cohen return ERR_PTR(err); 2483e126ba97SEli Cohen } 2484e126ba97SEli Cohen 2485e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2486e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2487e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2488e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2489e126ba97SEli Cohen else 249019098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2491e126ba97SEli Cohen 2492e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 249319098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2494a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2495a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2496e126ba97SEli Cohen 249719098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2498e126ba97SEli Cohen 2499e126ba97SEli Cohen break; 2500e126ba97SEli Cohen 2501d16e91daSHaggai Eran case IB_QPT_GSI: 2502d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2503d16e91daSHaggai Eran 2504e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2505e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2506e126ba97SEli Cohen case IB_QPT_MAX: 2507e126ba97SEli Cohen default: 2508e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2509e126ba97SEli Cohen init_attr->qp_type); 2510e126ba97SEli Cohen /* Don't support raw QPs */ 2511e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2512e126ba97SEli Cohen } 2513e126ba97SEli Cohen 2514b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2515b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2516b4aaa1f0SMoni Shoua 2517e126ba97SEli Cohen return &qp->ibqp; 2518e126ba97SEli Cohen } 2519e126ba97SEli Cohen 2520776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2521776a3906SMoni Shoua { 2522776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2523776a3906SMoni Shoua 2524776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2525776a3906SMoni Shoua int err; 2526776a3906SMoni Shoua 2527776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2528776a3906SMoni Shoua if (err) { 2529776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2530776a3906SMoni Shoua return err; 2531776a3906SMoni Shoua } 2532776a3906SMoni Shoua } 2533776a3906SMoni Shoua 2534776a3906SMoni Shoua kfree(mqp->dct.in); 2535776a3906SMoni Shoua kfree(mqp); 2536776a3906SMoni Shoua return 0; 2537776a3906SMoni Shoua } 2538776a3906SMoni Shoua 2539e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2540e126ba97SEli Cohen { 2541e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2542e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2543e126ba97SEli Cohen 2544d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2545d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2546d16e91daSHaggai Eran 2547776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2548776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2549776a3906SMoni Shoua 2550e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2551e126ba97SEli Cohen 2552e126ba97SEli Cohen kfree(mqp); 2553e126ba97SEli Cohen 2554e126ba97SEli Cohen return 0; 2555e126ba97SEli Cohen } 2556e126ba97SEli Cohen 2557e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2558e126ba97SEli Cohen int attr_mask) 2559e126ba97SEli Cohen { 2560e126ba97SEli Cohen u32 hw_access_flags = 0; 2561e126ba97SEli Cohen u8 dest_rd_atomic; 2562e126ba97SEli Cohen u32 access_flags; 2563e126ba97SEli Cohen 2564e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2565e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2566e126ba97SEli Cohen else 256719098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2568e126ba97SEli Cohen 2569e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2570e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2571e126ba97SEli Cohen else 257219098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2573e126ba97SEli Cohen 2574e126ba97SEli Cohen if (!dest_rd_atomic) 2575e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2576e126ba97SEli Cohen 2577e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2578e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2579e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2580e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2581e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2582e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2583e126ba97SEli Cohen 2584e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2585e126ba97SEli Cohen } 2586e126ba97SEli Cohen 2587e126ba97SEli Cohen enum { 2588e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2589e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2590e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2591e126ba97SEli Cohen }; 2592e126ba97SEli Cohen 2593e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2594e126ba97SEli Cohen { 25954f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2596e126ba97SEli Cohen return 0; 25974f32ac2eSDanit Goldberg 25984f32ac2eSDanit Goldberg if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) 2599e126ba97SEli Cohen return -EINVAL; 26004f32ac2eSDanit Goldberg 26014f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2602e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2603938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2604e126ba97SEli Cohen --rate; 2605e126ba97SEli Cohen 26064f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2607e126ba97SEli Cohen } 2608e126ba97SEli Cohen 260975850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 26101cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 26111cd6dbd3SYishai Hadas struct ib_pd *pd) 261275850d0bSmajd@mellanox.com { 261375850d0bSmajd@mellanox.com void *in; 261475850d0bSmajd@mellanox.com void *tisc; 261575850d0bSmajd@mellanox.com int inlen; 261675850d0bSmajd@mellanox.com int err; 261775850d0bSmajd@mellanox.com 261875850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 26191b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 262075850d0bSmajd@mellanox.com if (!in) 262175850d0bSmajd@mellanox.com return -ENOMEM; 262275850d0bSmajd@mellanox.com 262375850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 26241cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 262575850d0bSmajd@mellanox.com 262675850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 262775850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 262875850d0bSmajd@mellanox.com 262975850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 263075850d0bSmajd@mellanox.com 263175850d0bSmajd@mellanox.com kvfree(in); 263275850d0bSmajd@mellanox.com 263375850d0bSmajd@mellanox.com return err; 263475850d0bSmajd@mellanox.com } 263575850d0bSmajd@mellanox.com 263613eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 26371cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 26381cd6dbd3SYishai Hadas struct ib_pd *pd) 263913eab21fSAviv Heller { 264013eab21fSAviv Heller void *in; 264113eab21fSAviv Heller void *tisc; 264213eab21fSAviv Heller int inlen; 264313eab21fSAviv Heller int err; 264413eab21fSAviv Heller 264513eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 26461b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 264713eab21fSAviv Heller if (!in) 264813eab21fSAviv Heller return -ENOMEM; 264913eab21fSAviv Heller 265013eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 26511cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 265213eab21fSAviv Heller 265313eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 265413eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 265513eab21fSAviv Heller 265613eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 265713eab21fSAviv Heller 265813eab21fSAviv Heller kvfree(in); 265913eab21fSAviv Heller 266013eab21fSAviv Heller return err; 266113eab21fSAviv Heller } 266213eab21fSAviv Heller 266375850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 266490898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2665e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2666f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2667f879ee8dSAchiad Shochat bool alt) 2668e126ba97SEli Cohen { 2669d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2670e126ba97SEli Cohen int err; 2671ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2672d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2673d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2674e126ba97SEli Cohen 2675e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2676f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2677f879ee8dSAchiad Shochat attr->pkey_index); 2678e126ba97SEli Cohen 2679d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2680d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2681938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2682f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2683d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2684938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2685f83b4263SEli Cohen return -EINVAL; 2686f83b4263SEli Cohen } 26872811ba51SAchiad Shochat } 268844c58487SDasaratharaman Chandramouli 268944c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2690d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 26912811ba51SAchiad Shochat return -EINVAL; 269247ec3866SParav Pandit 269344c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 26942b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 26952b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 26962b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 26972b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 269847ec3866SParav Pandit path->udp_sport = 269947ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2700d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 270147ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2702ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2703d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 27042811ba51SAchiad Shochat } else { 2705d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2706d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2707d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2708d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2709d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2710d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2711e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2712d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 27132811ba51SAchiad Shochat } 27142811ba51SAchiad Shochat 2715d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2716d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2717d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2718e126ba97SEli Cohen path->tclass_flowlabel = 2719d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2720d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2721d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2722e126ba97SEli Cohen } 2723e126ba97SEli Cohen 2724d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2725e126ba97SEli Cohen if (err < 0) 2726e126ba97SEli Cohen return err; 2727e126ba97SEli Cohen path->static_rate = err; 2728e126ba97SEli Cohen path->port = port; 2729e126ba97SEli Cohen 2730e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2731f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2732e126ba97SEli Cohen 273375850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 273475850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 273575850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 27361cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 273775850d0bSmajd@mellanox.com 2738e126ba97SEli Cohen return 0; 2739e126ba97SEli Cohen } 2740e126ba97SEli Cohen 2741e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2742e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2743e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2744e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2745e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2746e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2747e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2748e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2749e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2750e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2751e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2752e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2753e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2754e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2755e126ba97SEli Cohen }, 2756e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2757e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2758e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2759e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2760e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2761e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2762e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2763e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2764e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2765e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2766e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2767e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2768e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2769a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2770a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2771a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2772a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2773a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2774e126ba97SEli Cohen }, 2775e126ba97SEli Cohen }, 2776e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2777e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2778e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2779e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2780e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2781e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2782e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2783e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2784e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2785e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2786e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2787e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2788e126ba97SEli Cohen }, 2789e126ba97SEli Cohen }, 2790e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2791e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2792e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2793e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2794e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2795e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2796c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2797c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2798e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2799c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2800c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2801e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2802e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2803e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2804e126ba97SEli Cohen }, 2805e126ba97SEli Cohen }, 2806e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2807e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2808e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2809e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 281075959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2811a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2812a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2813a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2814a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2815e126ba97SEli Cohen }, 2816e126ba97SEli Cohen }, 2817e126ba97SEli Cohen }; 2818e126ba97SEli Cohen 2819e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2820e126ba97SEli Cohen { 2821e126ba97SEli Cohen switch (ib_mask) { 2822e126ba97SEli Cohen case IB_QP_STATE: 2823e126ba97SEli Cohen return 0; 2824e126ba97SEli Cohen case IB_QP_CUR_STATE: 2825e126ba97SEli Cohen return 0; 2826e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2827e126ba97SEli Cohen return 0; 2828e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2829e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2830e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2831e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2832e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2833e126ba97SEli Cohen case IB_QP_PORT: 2834e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2835e126ba97SEli Cohen case IB_QP_QKEY: 2836e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2837e126ba97SEli Cohen case IB_QP_AV: 2838e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2839e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2840e126ba97SEli Cohen case IB_QP_PATH_MTU: 2841e126ba97SEli Cohen return 0; 2842e126ba97SEli Cohen case IB_QP_TIMEOUT: 2843e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2844e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2845e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2846e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2847e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2848e126ba97SEli Cohen case IB_QP_RQ_PSN: 2849e126ba97SEli Cohen return 0; 2850e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2851e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2852e126ba97SEli Cohen case IB_QP_ALT_PATH: 2853e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2854e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2855e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2856e126ba97SEli Cohen case IB_QP_SQ_PSN: 2857e126ba97SEli Cohen return 0; 2858e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2859e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2860e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2861e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2862e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2863e126ba97SEli Cohen case IB_QP_CAP: 2864e126ba97SEli Cohen return 0; 2865e126ba97SEli Cohen case IB_QP_DEST_QPN: 2866e126ba97SEli Cohen return 0; 2867e126ba97SEli Cohen } 2868e126ba97SEli Cohen return 0; 2869e126ba97SEli Cohen } 2870e126ba97SEli Cohen 2871e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2872e126ba97SEli Cohen { 2873e126ba97SEli Cohen int result = 0; 2874e126ba97SEli Cohen int i; 2875e126ba97SEli Cohen 2876e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2877e126ba97SEli Cohen if ((1 << i) & ib_mask) 2878e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2879e126ba97SEli Cohen } 2880e126ba97SEli Cohen 2881e126ba97SEli Cohen return result; 2882e126ba97SEli Cohen } 2883e126ba97SEli Cohen 288434d57585SYishai Hadas static int modify_raw_packet_qp_rq( 288534d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 288634d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2887ad5f8e96Smajd@mellanox.com { 2888ad5f8e96Smajd@mellanox.com void *in; 2889ad5f8e96Smajd@mellanox.com void *rqc; 2890ad5f8e96Smajd@mellanox.com int inlen; 2891ad5f8e96Smajd@mellanox.com int err; 2892ad5f8e96Smajd@mellanox.com 2893ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 28941b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2895ad5f8e96Smajd@mellanox.com if (!in) 2896ad5f8e96Smajd@mellanox.com return -ENOMEM; 2897ad5f8e96Smajd@mellanox.com 2898ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 289934d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 2900ad5f8e96Smajd@mellanox.com 2901ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2902ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2903ad5f8e96Smajd@mellanox.com 2904eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2905eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2906eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 290723a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2908eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2909eb49ab0cSAlex Vesker } else 29105a738b5dSJason Gunthorpe dev_info_once( 29115a738b5dSJason Gunthorpe &dev->ib_dev.dev, 29125a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 2913eb49ab0cSAlex Vesker } 2914eb49ab0cSAlex Vesker 2915eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2916ad5f8e96Smajd@mellanox.com if (err) 2917ad5f8e96Smajd@mellanox.com goto out; 2918ad5f8e96Smajd@mellanox.com 2919ad5f8e96Smajd@mellanox.com rq->state = new_state; 2920ad5f8e96Smajd@mellanox.com 2921ad5f8e96Smajd@mellanox.com out: 2922ad5f8e96Smajd@mellanox.com kvfree(in); 2923ad5f8e96Smajd@mellanox.com return err; 2924ad5f8e96Smajd@mellanox.com } 2925ad5f8e96Smajd@mellanox.com 2926c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 2927c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 2928c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2929ad5f8e96Smajd@mellanox.com { 29307d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 293161147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 293261147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 293361147f39SBodong Wang bool new_rate_added = false; 29347d29f349SBodong Wang u16 rl_index = 0; 2935ad5f8e96Smajd@mellanox.com void *in; 2936ad5f8e96Smajd@mellanox.com void *sqc; 2937ad5f8e96Smajd@mellanox.com int inlen; 2938ad5f8e96Smajd@mellanox.com int err; 2939ad5f8e96Smajd@mellanox.com 2940ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 29411b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2942ad5f8e96Smajd@mellanox.com if (!in) 2943ad5f8e96Smajd@mellanox.com return -ENOMEM; 2944ad5f8e96Smajd@mellanox.com 2945c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 2946ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2947ad5f8e96Smajd@mellanox.com 2948ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2949ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2950ad5f8e96Smajd@mellanox.com 29517d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 29527d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 29537d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 29547d29f349SBodong Wang __func__); 29557d29f349SBodong Wang else 295661147f39SBodong Wang new_rl = raw_qp_param->rl; 29577d29f349SBodong Wang } 2958ad5f8e96Smajd@mellanox.com 295961147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 296061147f39SBodong Wang if (new_rl.rate) { 296161147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 29627d29f349SBodong Wang if (err) { 296361147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 296461147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 296561147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 296661147f39SBodong Wang new_rl.typical_pkt_sz); 296761147f39SBodong Wang 29687d29f349SBodong Wang goto out; 29697d29f349SBodong Wang } 297061147f39SBodong Wang new_rate_added = true; 29717d29f349SBodong Wang } 29727d29f349SBodong Wang 29737d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 297461147f39SBodong Wang /* index 0 means no limit */ 29757d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 29767d29f349SBodong Wang } 29777d29f349SBodong Wang 29787d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 29797d29f349SBodong Wang if (err) { 29807d29f349SBodong Wang /* Remove new rate from table if failed */ 298161147f39SBodong Wang if (new_rate_added) 298261147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 29837d29f349SBodong Wang goto out; 29847d29f349SBodong Wang } 29857d29f349SBodong Wang 29867d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 298761147f39SBodong Wang if ((old_rl.rate && 298861147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 29897d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 299061147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 29917d29f349SBodong Wang 299261147f39SBodong Wang ibqp->rl = new_rl; 2993ad5f8e96Smajd@mellanox.com sq->state = new_state; 2994ad5f8e96Smajd@mellanox.com 2995ad5f8e96Smajd@mellanox.com out: 2996ad5f8e96Smajd@mellanox.com kvfree(in); 2997ad5f8e96Smajd@mellanox.com return err; 2998ad5f8e96Smajd@mellanox.com } 2999ad5f8e96Smajd@mellanox.com 3000ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 300113eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 300213eab21fSAviv Heller u8 tx_affinity) 3003ad5f8e96Smajd@mellanox.com { 3004ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3005ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3006ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 30077d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 30087d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3009ad5f8e96Smajd@mellanox.com int rq_state; 3010ad5f8e96Smajd@mellanox.com int sq_state; 3011ad5f8e96Smajd@mellanox.com int err; 3012ad5f8e96Smajd@mellanox.com 30130680efa2SAlex Vesker switch (raw_qp_param->operation) { 3014ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3015ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3016ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3017ad5f8e96Smajd@mellanox.com break; 3018ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3019ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3020ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3021ad5f8e96Smajd@mellanox.com break; 3022ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3023ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3024ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3025ad5f8e96Smajd@mellanox.com break; 3026ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3027ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 30287d29f349SBodong Wang if (raw_qp_param->set_mask == 30297d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 30307d29f349SBodong Wang modify_rq = 0; 30317d29f349SBodong Wang sq_state = sq->state; 30327d29f349SBodong Wang } else { 30337d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 30347d29f349SBodong Wang } 30357d29f349SBodong Wang break; 30367d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 30377d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3038eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3039eb49ab0cSAlex Vesker return -EINVAL; 3040eb49ab0cSAlex Vesker else 3041ad5f8e96Smajd@mellanox.com return 0; 3042ad5f8e96Smajd@mellanox.com default: 3043ad5f8e96Smajd@mellanox.com WARN_ON(1); 3044ad5f8e96Smajd@mellanox.com return -EINVAL; 3045ad5f8e96Smajd@mellanox.com } 3046ad5f8e96Smajd@mellanox.com 30477d29f349SBodong Wang if (modify_rq) { 304834d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 304934d57585SYishai Hadas qp->ibqp.pd); 3050ad5f8e96Smajd@mellanox.com if (err) 3051ad5f8e96Smajd@mellanox.com return err; 3052ad5f8e96Smajd@mellanox.com } 3053ad5f8e96Smajd@mellanox.com 30547d29f349SBodong Wang if (modify_sq) { 305513eab21fSAviv Heller if (tx_affinity) { 305613eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 30571cd6dbd3SYishai Hadas tx_affinity, 30581cd6dbd3SYishai Hadas qp->ibqp.pd); 305913eab21fSAviv Heller if (err) 306013eab21fSAviv Heller return err; 306113eab21fSAviv Heller } 306213eab21fSAviv Heller 3063c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3064c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 306513eab21fSAviv Heller } 3066ad5f8e96Smajd@mellanox.com 3067ad5f8e96Smajd@mellanox.com return 0; 3068ad5f8e96Smajd@mellanox.com } 3069ad5f8e96Smajd@mellanox.com 3070c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3071c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3072c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 3073c6a21c38SMajd Dibbiny u8 port_num) 3074c6a21c38SMajd Dibbiny { 3075c6a21c38SMajd Dibbiny struct mlx5_ib_ucontext *ucontext = NULL; 3076c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3077c6a21c38SMajd Dibbiny 3078c6a21c38SMajd Dibbiny if (pd && pd->ibpd.uobject && pd->ibpd.uobject->context) 3079c6a21c38SMajd Dibbiny ucontext = to_mucontext(pd->ibpd.uobject->context); 3080c6a21c38SMajd Dibbiny 3081c6a21c38SMajd Dibbiny if (ucontext) { 3082c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3083c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3084c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3085c6a21c38SMajd Dibbiny 1; 3086c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3087c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3088c6a21c38SMajd Dibbiny } else { 3089c6a21c38SMajd Dibbiny tx_port_affinity = 3090c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 3091c6a21c38SMajd Dibbiny 1, &dev->roce[port_num].tx_port_affinity) % 3092c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3093c6a21c38SMajd Dibbiny 1; 3094c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3095c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3096c6a21c38SMajd Dibbiny } 3097c6a21c38SMajd Dibbiny 3098c6a21c38SMajd Dibbiny return tx_port_affinity; 3099c6a21c38SMajd Dibbiny } 3100c6a21c38SMajd Dibbiny 3101e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3102e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 310361147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 310461147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 3105e126ba97SEli Cohen { 3106427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3107427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3108427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3109427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3110427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3111427c1e7bSmajd@mellanox.com }, 3112427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3113427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3114427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3115427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3116427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3117427c1e7bSmajd@mellanox.com }, 3118427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3119427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3120427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3121427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3122427c1e7bSmajd@mellanox.com }, 3123427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3124427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3125427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3126427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3127427c1e7bSmajd@mellanox.com }, 3128427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3129427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3130427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3131427c1e7bSmajd@mellanox.com }, 3132427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3133427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3134427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3135427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3136427c1e7bSmajd@mellanox.com }, 3137427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3138427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3139427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3140427c1e7bSmajd@mellanox.com } 3141427c1e7bSmajd@mellanox.com }; 3142427c1e7bSmajd@mellanox.com 3143e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3144e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 314519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3146e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3147e126ba97SEli Cohen struct mlx5_qp_context *context; 3148e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3149eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3150e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3151e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3152e126ba97SEli Cohen int mlx5_st; 3153e126ba97SEli Cohen int err; 3154427c1e7bSmajd@mellanox.com u16 op; 315513eab21fSAviv Heller u8 tx_affinity = 0; 3156e126ba97SEli Cohen 315755de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 315855de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 315955de9a77SLeon Romanovsky if (mlx5_st < 0) 316055de9a77SLeon Romanovsky return -EINVAL; 316155de9a77SLeon Romanovsky 31621a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 31631a412fb1SSaeed Mahameed if (!context) 3164e126ba97SEli Cohen return -ENOMEM; 3165e126ba97SEli Cohen 3166c6a21c38SMajd Dibbiny pd = get_pd(qp); 316755de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3168e126ba97SEli Cohen 3169e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3170e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3171e126ba97SEli Cohen } else { 3172e126ba97SEli Cohen switch (attr->path_mig_state) { 3173e126ba97SEli Cohen case IB_MIG_MIGRATED: 3174e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3175e126ba97SEli Cohen break; 3176e126ba97SEli Cohen case IB_MIG_REARM: 3177e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3178e126ba97SEli Cohen break; 3179e126ba97SEli Cohen case IB_MIG_ARMED: 3180e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3181e126ba97SEli Cohen break; 3182e126ba97SEli Cohen } 3183e126ba97SEli Cohen } 3184e126ba97SEli Cohen 318513eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 318613eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 318713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 318813eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 318913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 319013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 319113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 319213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 319313eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 31947fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 3195c6a21c38SMajd Dibbiny tx_affinity = get_tx_affinity(dev, pd, base, p); 319613eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 319713eab21fSAviv Heller } 319813eab21fSAviv Heller } 319913eab21fSAviv Heller } 320013eab21fSAviv Heller 3201d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3202e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3203c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3204c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3205e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3206e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3207e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3208e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3209e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3210e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3211e126ba97SEli Cohen err = -EINVAL; 3212e126ba97SEli Cohen goto out; 3213e126ba97SEli Cohen } 3214938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3215938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3216e126ba97SEli Cohen } 3217e126ba97SEli Cohen 3218e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3219e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3220e126ba97SEli Cohen 3221e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3222d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3223e126ba97SEli Cohen 3224e126ba97SEli Cohen /* todo implement counter_index functionality */ 3225e126ba97SEli Cohen 3226e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3227e126ba97SEli Cohen context->pri_path.port = qp->port; 3228e126ba97SEli Cohen 3229e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3230e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3231e126ba97SEli Cohen 3232e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 323375850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3234e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3235f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3236e126ba97SEli Cohen if (err) 3237e126ba97SEli Cohen goto out; 3238e126ba97SEli Cohen } 3239e126ba97SEli Cohen 3240e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3241e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3242e126ba97SEli Cohen 3243e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 324475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 324575850d0bSmajd@mellanox.com &context->alt_path, 3246f879ee8dSAchiad Shochat attr->alt_port_num, 3247f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3248f879ee8dSAchiad Shochat 0, attr, true); 3249e126ba97SEli Cohen if (err) 3250e126ba97SEli Cohen goto out; 3251e126ba97SEli Cohen } 3252e126ba97SEli Cohen 325389ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 325489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3255e126ba97SEli Cohen 3256e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3257e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3258e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3259e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3260e126ba97SEli Cohen 3261e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3262e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3263e126ba97SEli Cohen 3264e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3265e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3266e126ba97SEli Cohen 3267e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3268e126ba97SEli Cohen if (attr->max_rd_atomic) 3269e126ba97SEli Cohen context->params1 |= 3270e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3271e126ba97SEli Cohen } 3272e126ba97SEli Cohen 3273e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3274e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3275e126ba97SEli Cohen 3276e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3277e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3278e126ba97SEli Cohen context->params2 |= 3279e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3280e126ba97SEli Cohen } 3281e126ba97SEli Cohen 3282e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3283e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3284e126ba97SEli Cohen 3285e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3286e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3287e126ba97SEli Cohen 3288e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3289e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3290e126ba97SEli Cohen 3291e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3292e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3293e126ba97SEli Cohen 3294e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3295e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3296e126ba97SEli Cohen 32970837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 32980837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 32990837e86aSMark Bloch qp->port) - 1; 3300c2e53b2cSYishai Hadas 3301c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3302c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3303c2e53b2cSYishai Hadas port_num = 0; 3304c2e53b2cSYishai Hadas 3305eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 33060837e86aSMark Bloch context->qp_counter_set_usr_page |= 3307e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 33080837e86aSMark Bloch } 33090837e86aSMark Bloch 3310e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3311e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3312e126ba97SEli Cohen 3313b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3314b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3315e126ba97SEli Cohen 3316e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3317e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3318e126ba97SEli Cohen 3319427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 33205d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 33215d414b17SDan Carpenter err = -EINVAL; 3322427c1e7bSmajd@mellanox.com goto out; 33235d414b17SDan Carpenter } 3324427c1e7bSmajd@mellanox.com 3325427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3326e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3327e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3328ad5f8e96Smajd@mellanox.com 3329c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3330c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 33310680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 33320680efa2SAlex Vesker 33330680efa2SAlex Vesker raw_qp_param.operation = op; 3334eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3335e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3336eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3337eb49ab0cSAlex Vesker } 33387d29f349SBodong Wang 33397d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 334061147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 334161147f39SBodong Wang 334261147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 334361147f39SBodong Wang if (attr->rate_limit && 334461147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 334561147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 334661147f39SBodong Wang ucmd->burst_info.max_burst_sz; 334761147f39SBodong Wang } else { 334861147f39SBodong Wang err = -EINVAL; 334961147f39SBodong Wang goto out; 335061147f39SBodong Wang } 335161147f39SBodong Wang } 335261147f39SBodong Wang 335361147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 335461147f39SBodong Wang if (attr->rate_limit && 335561147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 335661147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 335761147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 335861147f39SBodong Wang } else { 335961147f39SBodong Wang err = -EINVAL; 336061147f39SBodong Wang goto out; 336161147f39SBodong Wang } 336261147f39SBodong Wang } 336361147f39SBodong Wang 33647d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 33657d29f349SBodong Wang } 33667d29f349SBodong Wang 336713eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 33680680efa2SAlex Vesker } else { 33691a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 337019098df2Smajd@mellanox.com &base->mqp); 33710680efa2SAlex Vesker } 33720680efa2SAlex Vesker 3373e126ba97SEli Cohen if (err) 3374e126ba97SEli Cohen goto out; 3375e126ba97SEli Cohen 3376e126ba97SEli Cohen qp->state = new_state; 3377e126ba97SEli Cohen 3378e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 337919098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3380e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 338119098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3382e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3383e126ba97SEli Cohen qp->port = attr->port_num; 3384e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 338519098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3386e126ba97SEli Cohen 3387e126ba97SEli Cohen /* 3388e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3389e126ba97SEli Cohen * entries and reinitialize the QP. 3390e126ba97SEli Cohen */ 339175a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 339275a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 339319098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3394e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3395e126ba97SEli Cohen if (send_cq != recv_cq) 339619098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3397e126ba97SEli Cohen 3398e126ba97SEli Cohen qp->rq.head = 0; 3399e126ba97SEli Cohen qp->rq.tail = 0; 3400e126ba97SEli Cohen qp->sq.head = 0; 3401e126ba97SEli Cohen qp->sq.tail = 0; 3402e126ba97SEli Cohen qp->sq.cur_post = 0; 3403e126ba97SEli Cohen qp->sq.last_poll = 0; 3404e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3405e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3406e126ba97SEli Cohen } 3407e126ba97SEli Cohen 3408e126ba97SEli Cohen out: 34091a412fb1SSaeed Mahameed kfree(context); 3410e126ba97SEli Cohen return err; 3411e126ba97SEli Cohen } 3412e126ba97SEli Cohen 3413c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3414c32a4f29SMoni Shoua { 3415c32a4f29SMoni Shoua if ((mask & req) != req) 3416c32a4f29SMoni Shoua return false; 3417c32a4f29SMoni Shoua 3418c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3419c32a4f29SMoni Shoua return false; 3420c32a4f29SMoni Shoua 3421c32a4f29SMoni Shoua return true; 3422c32a4f29SMoni Shoua } 3423c32a4f29SMoni Shoua 3424c32a4f29SMoni Shoua /* check valid transition for driver QP types 3425c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3426c32a4f29SMoni Shoua */ 3427c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3428c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3429c32a4f29SMoni Shoua { 3430c32a4f29SMoni Shoua int req = IB_QP_STATE; 3431c32a4f29SMoni Shoua int opt = 0; 3432c32a4f29SMoni Shoua 343399ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 343499ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 343599ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3436c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3437c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3438c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3439c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3440c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3441c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3442c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3443c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3444c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3445c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3446c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3447c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3448c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3449c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3450c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3451c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3452c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3453c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3454c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3455c32a4f29SMoni Shoua } 3456c32a4f29SMoni Shoua return false; 3457c32a4f29SMoni Shoua } 3458c32a4f29SMoni Shoua 3459776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3460776a3906SMoni Shoua * valid transitions are: 3461776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3462776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3463776a3906SMoni Shoua * mtu, gid_index and hop_limit 3464776a3906SMoni Shoua * Other transitions and attributes are illegal 3465776a3906SMoni Shoua */ 3466776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3467776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3468776a3906SMoni Shoua { 3469776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3470776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3471776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3472776a3906SMoni Shoua int err = 0; 3473776a3906SMoni Shoua int required = IB_QP_STATE; 3474776a3906SMoni Shoua void *dctc; 3475776a3906SMoni Shoua 3476776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3477776a3906SMoni Shoua return -EINVAL; 3478776a3906SMoni Shoua 3479776a3906SMoni Shoua cur_state = qp->state; 3480776a3906SMoni Shoua new_state = attr->qp_state; 3481776a3906SMoni Shoua 3482776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3483776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3484776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3485776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3486776a3906SMoni Shoua return -EINVAL; 3487776a3906SMoni Shoua 3488776a3906SMoni Shoua if (attr->port_num == 0 || 3489776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3490776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3491776a3906SMoni Shoua attr->port_num, dev->num_ports); 3492776a3906SMoni Shoua return -EINVAL; 3493776a3906SMoni Shoua } 3494776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3495776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3496776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3497776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3498776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3499776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3500776a3906SMoni Shoua return -EOPNOTSUPP; 3501776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3502776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3503776a3906SMoni Shoua } 3504776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3505776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3506776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3507776a3906SMoni Shoua 3508776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3509776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3510776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3511776a3906SMoni Shoua sizeof(resp.dctn); 3512776a3906SMoni Shoua 3513776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3514776a3906SMoni Shoua return -EINVAL; 3515776a3906SMoni Shoua resp.response_length = min_resp_len; 3516776a3906SMoni Shoua 3517776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3518776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3519776a3906SMoni Shoua return -EINVAL; 3520776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3521776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3522776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3523776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3524776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3525776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3526776a3906SMoni Shoua 3527776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3528776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3529776a3906SMoni Shoua if (err) 3530776a3906SMoni Shoua return err; 3531776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3532776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3533776a3906SMoni Shoua if (err) { 3534776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3535776a3906SMoni Shoua return err; 3536776a3906SMoni Shoua } 3537776a3906SMoni Shoua } else { 3538776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3539776a3906SMoni Shoua return -EINVAL; 3540776a3906SMoni Shoua } 3541776a3906SMoni Shoua if (err) 3542776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3543776a3906SMoni Shoua else 3544776a3906SMoni Shoua qp->state = new_state; 3545776a3906SMoni Shoua return err; 3546776a3906SMoni Shoua } 3547776a3906SMoni Shoua 3548e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3549e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3550e126ba97SEli Cohen { 3551e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3552e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 355361147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3554d16e91daSHaggai Eran enum ib_qp_type qp_type; 3555e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 355661147f39SBodong Wang size_t required_cmd_sz; 3557e126ba97SEli Cohen int err = -EINVAL; 3558e126ba97SEli Cohen int port; 3559e126ba97SEli Cohen 356028d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 356128d61370SYishai Hadas return -ENOSYS; 356228d61370SYishai Hadas 356361147f39SBodong Wang if (udata && udata->inlen) { 356461147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 356561147f39SBodong Wang sizeof(ucmd.reserved); 356661147f39SBodong Wang if (udata->inlen < required_cmd_sz) 356761147f39SBodong Wang return -EINVAL; 356861147f39SBodong Wang 356961147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 357061147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 357161147f39SBodong Wang udata->inlen - sizeof(ucmd))) 357261147f39SBodong Wang return -EOPNOTSUPP; 357361147f39SBodong Wang 357461147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 357561147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 357661147f39SBodong Wang return -EFAULT; 357761147f39SBodong Wang 357861147f39SBodong Wang if (ucmd.comp_mask || 357961147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 358061147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 358161147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 358261147f39SBodong Wang return -EOPNOTSUPP; 358361147f39SBodong Wang } 358461147f39SBodong Wang 3585d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3586d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3587d16e91daSHaggai Eran 3588c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3589c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3590c32a4f29SMoni Shoua else 3591d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3592d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3593d16e91daSHaggai Eran 3594776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3595776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3596c32a4f29SMoni Shoua 3597e126ba97SEli Cohen mutex_lock(&qp->mutex); 3598e126ba97SEli Cohen 3599e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3600e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3601e126ba97SEli Cohen 36022811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 36032811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 36042811ba51SAchiad Shochat } 36052811ba51SAchiad Shochat 3606c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3607c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3608c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3609c2e53b2cSYishai Hadas attr_mask); 3610c2e53b2cSYishai Hadas goto out; 3611c2e53b2cSYishai Hadas } 3612c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3613c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3614d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3615d31131bbSKamal Heib attr_mask)) { 3616158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3617158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3618e126ba97SEli Cohen goto out; 3619c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3620c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3621c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3622c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3623c32a4f29SMoni Shoua goto out; 3624158abf86SHaggai Eran } 3625e126ba97SEli Cohen 3626e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3627938fe83cSSaeed Mahameed (attr->port_num == 0 || 3628508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3629158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3630158abf86SHaggai Eran attr->port_num, dev->num_ports); 3631e126ba97SEli Cohen goto out; 3632158abf86SHaggai Eran } 3633e126ba97SEli Cohen 3634e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3635e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3636938fe83cSSaeed Mahameed if (attr->pkey_index >= 3637158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3638158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3639158abf86SHaggai Eran attr->pkey_index); 3640e126ba97SEli Cohen goto out; 3641e126ba97SEli Cohen } 3642158abf86SHaggai Eran } 3643e126ba97SEli Cohen 3644e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3645938fe83cSSaeed Mahameed attr->max_rd_atomic > 3646158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3647158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3648158abf86SHaggai Eran attr->max_rd_atomic); 3649e126ba97SEli Cohen goto out; 3650158abf86SHaggai Eran } 3651e126ba97SEli Cohen 3652e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3653938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3654158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3655158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3656158abf86SHaggai Eran attr->max_dest_rd_atomic); 3657e126ba97SEli Cohen goto out; 3658158abf86SHaggai Eran } 3659e126ba97SEli Cohen 3660e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3661e126ba97SEli Cohen err = 0; 3662e126ba97SEli Cohen goto out; 3663e126ba97SEli Cohen } 3664e126ba97SEli Cohen 366561147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 366661147f39SBodong Wang new_state, &ucmd); 3667e126ba97SEli Cohen 3668e126ba97SEli Cohen out: 3669e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3670e126ba97SEli Cohen return err; 3671e126ba97SEli Cohen } 3672e126ba97SEli Cohen 3673e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3674e126ba97SEli Cohen { 3675e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3676e126ba97SEli Cohen unsigned cur; 3677e126ba97SEli Cohen 3678e126ba97SEli Cohen cur = wq->head - wq->tail; 3679e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3680e126ba97SEli Cohen return 0; 3681e126ba97SEli Cohen 3682e126ba97SEli Cohen cq = to_mcq(ib_cq); 3683e126ba97SEli Cohen spin_lock(&cq->lock); 3684e126ba97SEli Cohen cur = wq->head - wq->tail; 3685e126ba97SEli Cohen spin_unlock(&cq->lock); 3686e126ba97SEli Cohen 3687e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3688e126ba97SEli Cohen } 3689e126ba97SEli Cohen 3690e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3691e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3692e126ba97SEli Cohen { 3693e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3694e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3695e126ba97SEli Cohen rseg->reserved = 0; 3696e126ba97SEli Cohen } 3697e126ba97SEli Cohen 3698f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3699f696bf6dSBart Van Assche const struct ib_send_wr *wr, void *qend, 3700f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3701f0313965SErez Shitrit { 3702f0313965SErez Shitrit void *seg = eseg; 3703f0313965SErez Shitrit 3704f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3705f0313965SErez Shitrit 3706f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3707f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3708f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3709f0313965SErez Shitrit 3710f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3711f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3712f0313965SErez Shitrit 3713f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3714f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 37152b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3716f0313965SErez Shitrit u64 left, leftlen, copysz; 3717f0313965SErez Shitrit void *pdata = ud_wr->header; 3718f0313965SErez Shitrit 3719f0313965SErez Shitrit left = ud_wr->hlen; 3720f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 37212b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3722f0313965SErez Shitrit 3723f0313965SErez Shitrit /* 3724f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3725f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3726f0313965SErez Shitrit * rollback and than the copy the left 3727f0313965SErez Shitrit */ 37282b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3729f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3730f0313965SErez Shitrit 3731f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3732f0313965SErez Shitrit 3733f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3734f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3735f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3736f0313965SErez Shitrit } 3737f0313965SErez Shitrit 3738f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3739f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3740f0313965SErez Shitrit left -= copysz; 3741f0313965SErez Shitrit pdata += copysz; 3742f0313965SErez Shitrit memcpy(seg, pdata, left); 3743f0313965SErez Shitrit seg += ALIGN(left, 16); 3744f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3745f0313965SErez Shitrit } 3746f0313965SErez Shitrit } 3747f0313965SErez Shitrit 3748f0313965SErez Shitrit return seg; 3749f0313965SErez Shitrit } 3750f0313965SErez Shitrit 3751e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3752f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3753e126ba97SEli Cohen { 3754e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3755e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3756e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3757e126ba97SEli Cohen } 3758e126ba97SEli Cohen 3759e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3760e126ba97SEli Cohen { 3761e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3762e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3763e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3764e126ba97SEli Cohen } 3765e126ba97SEli Cohen 376631616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3767e126ba97SEli Cohen { 376831616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 376931616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3770e126ba97SEli Cohen } 3771e126ba97SEli Cohen 3772e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3773e126ba97SEli Cohen { 3774e126ba97SEli Cohen u64 result; 3775e126ba97SEli Cohen 3776e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3777e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3778e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3779e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3780e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3781e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3782e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3783e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3784e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3785e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3786e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3787e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3788e126ba97SEli Cohen 3789e126ba97SEli Cohen return cpu_to_be64(result); 3790e126ba97SEli Cohen } 3791e126ba97SEli Cohen 3792e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3793e6631814SSagi Grimberg { 3794e6631814SSagi Grimberg u64 result; 3795e6631814SSagi Grimberg 3796e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3797e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3798e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3799d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3800e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3801e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3802e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3803e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3804e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3805e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3806e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3807e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3808e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3809e6631814SSagi Grimberg 3810e6631814SSagi Grimberg return cpu_to_be64(result); 3811e6631814SSagi Grimberg } 3812e6631814SSagi Grimberg 38138a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 3814064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 38158a187ee5SSagi Grimberg { 381631616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 38178a187ee5SSagi Grimberg 38188a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3819b005d316SSagi Grimberg 38208a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 3821064e5262SIdan Burstein if (umr_inline) 3822064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 382331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 38248a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 38258a187ee5SSagi Grimberg } 38268a187ee5SSagi Grimberg 3827dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3828e126ba97SEli Cohen { 3829e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3830e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 38312d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3832e126ba97SEli Cohen } 3833e126ba97SEli Cohen 383431616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3835e126ba97SEli Cohen { 3836968e78ddSHaggai Eran u64 result; 3837e126ba97SEli Cohen 383831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3839e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3840968e78ddSHaggai Eran 3841968e78ddSHaggai Eran return cpu_to_be64(result); 3842968e78ddSHaggai Eran } 3843968e78ddSHaggai Eran 384431616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3845968e78ddSHaggai Eran { 3846968e78ddSHaggai Eran u64 result; 3847968e78ddSHaggai Eran 3848968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3849968e78ddSHaggai Eran 3850968e78ddSHaggai Eran return cpu_to_be64(result); 3851968e78ddSHaggai Eran } 3852968e78ddSHaggai Eran 385356e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 385456e11d62SNoa Osherovich { 385556e11d62SNoa Osherovich u64 result; 385656e11d62SNoa Osherovich 385756e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 385856e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 385931616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 386056e11d62SNoa Osherovich 386156e11d62SNoa Osherovich return cpu_to_be64(result); 386256e11d62SNoa Osherovich } 386356e11d62SNoa Osherovich 386431616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 386556e11d62SNoa Osherovich { 386656e11d62SNoa Osherovich u64 result; 386756e11d62SNoa Osherovich 386831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 386931616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 387056e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 387131616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 387231616255SArtemy Kovalyov 387331616255SArtemy Kovalyov if (atomic) 387431616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 387556e11d62SNoa Osherovich 387656e11d62SNoa Osherovich return cpu_to_be64(result); 387756e11d62SNoa Osherovich } 387856e11d62SNoa Osherovich 387956e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 388056e11d62SNoa Osherovich { 388156e11d62SNoa Osherovich u64 result; 388256e11d62SNoa Osherovich 388331616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 388456e11d62SNoa Osherovich 388556e11d62SNoa Osherovich return cpu_to_be64(result); 388656e11d62SNoa Osherovich } 388756e11d62SNoa Osherovich 3888c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3889c8d75a98SMajd Dibbiny { 3890c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3891c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3892c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3893c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3894c8d75a98SMajd Dibbiny return -EPERM; 3895c8d75a98SMajd Dibbiny return 0; 3896c8d75a98SMajd Dibbiny } 3897c8d75a98SMajd Dibbiny 3898c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3899c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3900f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 3901968e78ddSHaggai Eran { 3902f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3903968e78ddSHaggai Eran 3904968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3905968e78ddSHaggai Eran 3906968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3907968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3908968e78ddSHaggai Eran else 3909968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3910968e78ddSHaggai Eran 391131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 391231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 391331616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 391431616255SArtemy Kovalyov 391531616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 391631616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3917968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3918968e78ddSHaggai Eran } 391956e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 392056e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 392131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 392231616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 392356e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3924e126ba97SEli Cohen } 392531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 392631616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 392731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 392831616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3929e126ba97SEli Cohen 3930e126ba97SEli Cohen if (!wr->num_sge) 3931968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3932c8d75a98SMajd Dibbiny 3933c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 3934e126ba97SEli Cohen } 3935e126ba97SEli Cohen 3936e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3937e126ba97SEli Cohen { 3938e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3939e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3940e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3941e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 39422ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3943e126ba97SEli Cohen } 3944e126ba97SEli Cohen 39458a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 39468a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 39478a187ee5SSagi Grimberg u32 key, int access) 39488a187ee5SSagi Grimberg { 39498a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 39508a187ee5SSagi Grimberg 39518a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3952b005d316SSagi Grimberg 3953ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3954b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3955ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3956b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3957b005d316SSagi Grimberg ndescs *= 2; 3958b005d316SSagi Grimberg 3959b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 39608a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 39618a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 39628a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 39638a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 39648a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 39658a187ee5SSagi Grimberg } 39668a187ee5SSagi Grimberg 3967dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3968e126ba97SEli Cohen { 3969e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3970968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3971e126ba97SEli Cohen } 3972e126ba97SEli Cohen 3973f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 3974f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3975e126ba97SEli Cohen { 3976f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3977968e78ddSHaggai Eran 3978e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 397931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3980968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3981e126ba97SEli Cohen 3982968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 398356e11d62SNoa Osherovich if (umrwr->pd) 3984968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 398531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 398631616255SArtemy Kovalyov !umrwr->length) 398731616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 398831616255SArtemy Kovalyov 398931616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3990968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3991968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3992746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3993968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3994e126ba97SEli Cohen } 3995e126ba97SEli Cohen 39968a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 39978a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 39988a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 39998a187ee5SSagi Grimberg { 40008a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 40018a187ee5SSagi Grimberg 40028a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 40038a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 40048a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 40058a187ee5SSagi Grimberg } 40068a187ee5SSagi Grimberg 4007064e5262SIdan Burstein static void set_reg_umr_inline_seg(void *seg, struct mlx5_ib_qp *qp, 4008064e5262SIdan Burstein struct mlx5_ib_mr *mr, int mr_list_size) 4009064e5262SIdan Burstein { 4010064e5262SIdan Burstein void *qend = qp->sq.qend; 4011064e5262SIdan Burstein void *addr = mr->descs; 4012064e5262SIdan Burstein int copy; 4013064e5262SIdan Burstein 4014064e5262SIdan Burstein if (unlikely(seg + mr_list_size > qend)) { 4015064e5262SIdan Burstein copy = qend - seg; 4016064e5262SIdan Burstein memcpy(seg, addr, copy); 4017064e5262SIdan Burstein addr += copy; 4018064e5262SIdan Burstein mr_list_size -= copy; 4019064e5262SIdan Burstein seg = mlx5_get_send_wqe(qp, 0); 4020064e5262SIdan Burstein } 4021064e5262SIdan Burstein memcpy(seg, addr, mr_list_size); 4022064e5262SIdan Burstein seg += mr_list_size; 4023064e5262SIdan Burstein } 4024064e5262SIdan Burstein 4025f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4026e126ba97SEli Cohen { 4027e126ba97SEli Cohen switch (wr->opcode) { 4028e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4029e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4030e126ba97SEli Cohen return wr->ex.imm_data; 4031e126ba97SEli Cohen 4032e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4033e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4034e126ba97SEli Cohen 4035e126ba97SEli Cohen default: 4036e126ba97SEli Cohen return 0; 4037e126ba97SEli Cohen } 4038e126ba97SEli Cohen } 4039e126ba97SEli Cohen 4040e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4041e126ba97SEli Cohen { 4042e126ba97SEli Cohen u8 *p = wqe; 4043e126ba97SEli Cohen u8 res = 0; 4044e126ba97SEli Cohen int i; 4045e126ba97SEli Cohen 4046e126ba97SEli Cohen for (i = 0; i < size; i++) 4047e126ba97SEli Cohen res ^= p[i]; 4048e126ba97SEli Cohen 4049e126ba97SEli Cohen return ~res; 4050e126ba97SEli Cohen } 4051e126ba97SEli Cohen 4052e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4053e126ba97SEli Cohen { 4054e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4055e126ba97SEli Cohen } 4056e126ba97SEli Cohen 4057f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 4058e126ba97SEli Cohen void *wqe, int *sz) 4059e126ba97SEli Cohen { 4060e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 4061e126ba97SEli Cohen void *qend = qp->sq.qend; 4062e126ba97SEli Cohen void *addr; 4063e126ba97SEli Cohen int inl = 0; 4064e126ba97SEli Cohen int copy; 4065e126ba97SEli Cohen int len; 4066e126ba97SEli Cohen int i; 4067e126ba97SEli Cohen 4068e126ba97SEli Cohen seg = wqe; 4069e126ba97SEli Cohen wqe += sizeof(*seg); 4070e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 4071e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 4072e126ba97SEli Cohen len = wr->sg_list[i].length; 4073e126ba97SEli Cohen inl += len; 4074e126ba97SEli Cohen 4075e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4076e126ba97SEli Cohen return -ENOMEM; 4077e126ba97SEli Cohen 4078e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 4079e126ba97SEli Cohen copy = qend - wqe; 4080e126ba97SEli Cohen memcpy(wqe, addr, copy); 4081e126ba97SEli Cohen addr += copy; 4082e126ba97SEli Cohen len -= copy; 4083e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 4084e126ba97SEli Cohen } 4085e126ba97SEli Cohen memcpy(wqe, addr, len); 4086e126ba97SEli Cohen wqe += len; 4087e126ba97SEli Cohen } 4088e126ba97SEli Cohen 4089e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4090e126ba97SEli Cohen 4091e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4092e126ba97SEli Cohen 4093e126ba97SEli Cohen return 0; 4094e126ba97SEli Cohen } 4095e126ba97SEli Cohen 4096e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4097e6631814SSagi Grimberg { 4098e6631814SSagi Grimberg switch (type) { 4099e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4100e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4101e6631814SSagi Grimberg default: 4102e6631814SSagi Grimberg return 0; 4103e6631814SSagi Grimberg } 4104e6631814SSagi Grimberg } 4105e6631814SSagi Grimberg 4106e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4107e6631814SSagi Grimberg { 4108e6631814SSagi Grimberg switch (block_size) { 4109e6631814SSagi Grimberg case 512: return 0x1; 4110e6631814SSagi Grimberg case 520: return 0x2; 4111e6631814SSagi Grimberg case 4096: return 0x3; 4112e6631814SSagi Grimberg case 4160: return 0x4; 4113e6631814SSagi Grimberg case 1073741824: return 0x5; 4114e6631814SSagi Grimberg default: return 0; 4115e6631814SSagi Grimberg } 4116e6631814SSagi Grimberg } 4117e6631814SSagi Grimberg 411878eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4119142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4120e6631814SSagi Grimberg { 4121142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4122142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4123142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4124142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4125142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4126142537f4SSagi Grimberg /* repeating block */ 4127142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4128142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4129142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4130e6631814SSagi Grimberg 413178eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 413278eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4133e6631814SSagi Grimberg 413478eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 413578eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 413678eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 413778eda2bbSSagi Grimberg else 413878eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4139e6631814SSagi Grimberg } 4140e6631814SSagi Grimberg 414178eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 414278eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4143e6631814SSagi Grimberg } 4144e6631814SSagi Grimberg 4145e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4146e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4147e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4148e6631814SSagi Grimberg { 4149e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4150e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4151e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4152e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4153e6631814SSagi Grimberg 4154c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4155e6631814SSagi Grimberg 4156142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4157142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4158e6631814SSagi Grimberg /* Input domain check byte mask */ 4159e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 416078eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 416178eda2bbSSagi Grimberg 416278eda2bbSSagi Grimberg /* Memory domain */ 416378eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 416478eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 416578eda2bbSSagi Grimberg break; 416678eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 416778eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 416878eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 416978eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 417078eda2bbSSagi Grimberg break; 417178eda2bbSSagi Grimberg default: 417278eda2bbSSagi Grimberg return -EINVAL; 417378eda2bbSSagi Grimberg } 417478eda2bbSSagi Grimberg 417578eda2bbSSagi Grimberg /* Wire domain */ 417678eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 417778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 417878eda2bbSSagi Grimberg break; 417978eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4180e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 418178eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4182e6631814SSagi Grimberg /* Same block structure */ 4183142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4184e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4185fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4186c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4187fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4188c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4189fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4190e6631814SSagi Grimberg } else 4191e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4192e6631814SSagi Grimberg 4193142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 419478eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4195e6631814SSagi Grimberg break; 4196e6631814SSagi Grimberg default: 4197e6631814SSagi Grimberg return -EINVAL; 4198e6631814SSagi Grimberg } 4199e6631814SSagi Grimberg 4200e6631814SSagi Grimberg return 0; 4201e6631814SSagi Grimberg } 4202e6631814SSagi Grimberg 4203f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 4204e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4205e6631814SSagi Grimberg { 4206e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4207e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4208e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4209e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4210e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4211e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4212e6631814SSagi Grimberg int ret; 4213e6631814SSagi Grimberg int wqe_size; 4214e6631814SSagi Grimberg 4215e622f2f4SChristoph Hellwig if (!wr->prot || 4216e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4217e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4218e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4219e6631814SSagi Grimberg /** 4220e6631814SSagi Grimberg * Source domain doesn't contain signature information 42215c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4222e6631814SSagi Grimberg * So need construct: 4223e6631814SSagi Grimberg * ------------------ 4224e6631814SSagi Grimberg * | data_klm | 4225e6631814SSagi Grimberg * ------------------ 4226e6631814SSagi Grimberg * | BSF | 4227e6631814SSagi Grimberg * ------------------ 4228e6631814SSagi Grimberg **/ 4229e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4230e6631814SSagi Grimberg 4231e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4232e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4233e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4234e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4235e6631814SSagi Grimberg } else { 4236e6631814SSagi Grimberg /** 4237e6631814SSagi Grimberg * Source domain contains signature information 4238e6631814SSagi Grimberg * So need construct a strided block format: 4239e6631814SSagi Grimberg * --------------------------- 4240e6631814SSagi Grimberg * | stride_block_ctrl | 4241e6631814SSagi Grimberg * --------------------------- 4242e6631814SSagi Grimberg * | data_klm | 4243e6631814SSagi Grimberg * --------------------------- 4244e6631814SSagi Grimberg * | prot_klm | 4245e6631814SSagi Grimberg * --------------------------- 4246e6631814SSagi Grimberg * | BSF | 4247e6631814SSagi Grimberg * --------------------------- 4248e6631814SSagi Grimberg **/ 4249e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4250e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4251e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4252e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4253e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4254e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4255e6631814SSagi Grimberg int prot_size; 4256e6631814SSagi Grimberg 4257e6631814SSagi Grimberg sblock_ctrl = *seg; 4258e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4259e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4260e6631814SSagi Grimberg 4261e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4262e6631814SSagi Grimberg if (!prot_size) { 4263e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4264e6631814SSagi Grimberg return -EINVAL; 4265e6631814SSagi Grimberg } 4266e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4267e6631814SSagi Grimberg prot_size); 4268e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4269e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4270e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4271e6631814SSagi Grimberg 4272e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4273e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4274e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 42755c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 42765c273b16SSagi Grimberg 4277e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4278e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4279e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4280e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 42815c273b16SSagi Grimberg 4282e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4283e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4284e6631814SSagi Grimberg } 4285e6631814SSagi Grimberg 4286e6631814SSagi Grimberg *seg += wqe_size; 4287e6631814SSagi Grimberg *size += wqe_size / 16; 4288e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4289e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4290e6631814SSagi Grimberg 4291e6631814SSagi Grimberg bsf = *seg; 4292e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4293e6631814SSagi Grimberg if (ret) 4294e6631814SSagi Grimberg return -EINVAL; 4295e6631814SSagi Grimberg 4296e6631814SSagi Grimberg *seg += sizeof(*bsf); 4297e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4298e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4299e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4300e6631814SSagi Grimberg 4301e6631814SSagi Grimberg return 0; 4302e6631814SSagi Grimberg } 4303e6631814SSagi Grimberg 4304e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4305f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4306e6631814SSagi Grimberg u32 length, u32 pdn) 4307e6631814SSagi Grimberg { 4308e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4309e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4310d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4311e6631814SSagi Grimberg 4312e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4313e6631814SSagi Grimberg 4314e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4315ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4316e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4317d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4318e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4319e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 432031616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4321e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4322e6631814SSagi Grimberg } 4323e6631814SSagi Grimberg 4324e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 432531616255SArtemy Kovalyov u32 size) 4326e6631814SSagi Grimberg { 4327e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4328e6631814SSagi Grimberg 4329e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 433031616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4331e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4332e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4333e6631814SSagi Grimberg } 4334e6631814SSagi Grimberg 4335e6631814SSagi Grimberg 4336f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 4337f696bf6dSBart Van Assche struct mlx5_ib_qp *qp, void **seg, int *size) 4338e6631814SSagi Grimberg { 4339f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4340e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4341e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 434231616255SArtemy Kovalyov u32 xlt_size; 4343e6631814SSagi Grimberg int region_len, ret; 4344e6631814SSagi Grimberg 4345e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4346e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4347d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4348d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4349e6631814SSagi Grimberg return -EINVAL; 4350e6631814SSagi Grimberg 4351e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4352e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4353e622f2f4SChristoph Hellwig if (wr->prot && 4354e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4355e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4356e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4357e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4358e6631814SSagi Grimberg 4359e6631814SSagi Grimberg /** 4360e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4361e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4362e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4363e6631814SSagi Grimberg **/ 436431616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4365e6631814SSagi Grimberg 436631616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4367e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4368e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4369e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4370e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4371e6631814SSagi Grimberg 437231616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4373e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4374e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4375e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4376e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4377e6631814SSagi Grimberg 4378e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4379e6631814SSagi Grimberg if (ret) 4380e6631814SSagi Grimberg return ret; 4381e6631814SSagi Grimberg 4382d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4383e6631814SSagi Grimberg return 0; 4384e6631814SSagi Grimberg } 4385e6631814SSagi Grimberg 4386e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4387e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4388e6631814SSagi Grimberg { 4389e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4390e6631814SSagi Grimberg 4391e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4392e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4393e6631814SSagi Grimberg switch (domain->sig_type) { 439478eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 439578eda2bbSSagi Grimberg break; 4396e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4397e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4398e6631814SSagi Grimberg domain->sig.dif.app_tag); 4399e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4400e6631814SSagi Grimberg break; 4401e6631814SSagi Grimberg default: 440212bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 440312bbf1eaSLeon Romanovsky domain->sig_type); 440412bbf1eaSLeon Romanovsky return -EINVAL; 4405e6631814SSagi Grimberg } 4406e6631814SSagi Grimberg 440778eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 440878eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 440978eda2bbSSagi Grimberg 4410e6631814SSagi Grimberg return 0; 4411e6631814SSagi Grimberg } 4412e6631814SSagi Grimberg 44138a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4414f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 44158a187ee5SSagi Grimberg void **seg, int *size) 44168a187ee5SSagi Grimberg { 44178a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 44188a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 4419064e5262SIdan Burstein int mr_list_size = mr->ndescs * mr->desc_size; 4420064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 44218a187ee5SSagi Grimberg 44228a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 44238a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 44248a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 44258a187ee5SSagi Grimberg return -EINVAL; 44268a187ee5SSagi Grimberg } 44278a187ee5SSagi Grimberg 4428064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 44298a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 44308a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 44318a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 44328a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 44338a187ee5SSagi Grimberg 44348a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 44358a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 44368a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 44378a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 44388a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 44398a187ee5SSagi Grimberg 4440064e5262SIdan Burstein if (umr_inline) { 4441064e5262SIdan Burstein set_reg_umr_inline_seg(*seg, qp, mr, mr_list_size); 4442064e5262SIdan Burstein *size += get_xlt_octo(mr_list_size); 4443064e5262SIdan Burstein } else { 44448a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 44458a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 44468a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4447064e5262SIdan Burstein } 44488a187ee5SSagi Grimberg return 0; 44498a187ee5SSagi Grimberg } 44508a187ee5SSagi Grimberg 4451dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4452e126ba97SEli Cohen { 4453dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4454e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4455e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4456e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4457e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4458dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4459e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4460e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4461e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4462e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4463e126ba97SEli Cohen } 4464e126ba97SEli Cohen 4465e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4466e126ba97SEli Cohen { 4467e126ba97SEli Cohen __be32 *p = NULL; 4468e126ba97SEli Cohen int tidx = idx; 4469e126ba97SEli Cohen int i, j; 4470e126ba97SEli Cohen 4471e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4472e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4473e126ba97SEli Cohen if ((i & 0xf) == 0) { 4474e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4475e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4476e126ba97SEli Cohen p = buf; 4477e126ba97SEli Cohen j = 0; 4478e126ba97SEli Cohen } 4479e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4480e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4481e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4482e126ba97SEli Cohen } 4483e126ba97SEli Cohen } 4484e126ba97SEli Cohen 44857bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 44866e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 4487f696bf6dSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 44887bb1fafcSBart Van Assche int *size, int nreq, bool send_signaled, bool solicited) 44896e5eadacSSagi Grimberg { 4490b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4491b2a232d2SLeon Romanovsky return -ENOMEM; 44926e5eadacSSagi Grimberg 44936e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 44946e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 44956e5eadacSSagi Grimberg *ctrl = *seg; 44966e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 44976e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 44986e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 44997bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 45007bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 45016e5eadacSSagi Grimberg 45026e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 45036e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 45046e5eadacSSagi Grimberg 4505b2a232d2SLeon Romanovsky return 0; 45066e5eadacSSagi Grimberg } 45076e5eadacSSagi Grimberg 45087bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 45097bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 45107bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 45117bb1fafcSBart Van Assche int *size, int nreq) 45127bb1fafcSBart Van Assche { 45137bb1fafcSBart Van Assche return __begin_wqe(qp, seg, ctrl, wr, idx, size, nreq, 45147bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 45157bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 45167bb1fafcSBart Van Assche } 45177bb1fafcSBart Van Assche 45186e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 45196e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 45206e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 45216e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 45226e5eadacSSagi Grimberg { 45236e5eadacSSagi Grimberg u8 opmod = 0; 45246e5eadacSSagi Grimberg 45256e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 45266e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 452719098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 45286e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 45296e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 45306e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 45316e5eadacSSagi Grimberg 45326e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 45336e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 45346e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 45356e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 45366e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 45376e5eadacSSagi Grimberg } 45386e5eadacSSagi Grimberg 4539d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4540d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4541e126ba97SEli Cohen { 4542e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4543e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 454489ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4545d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4546e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4547e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4548e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4549d16e91daSHaggai Eran struct mlx5_bf *bf; 4550e126ba97SEli Cohen int uninitialized_var(size); 4551d16e91daSHaggai Eran void *qend; 4552e126ba97SEli Cohen unsigned long flags; 4553e126ba97SEli Cohen unsigned idx; 4554e126ba97SEli Cohen int err = 0; 4555e126ba97SEli Cohen int num_sge; 4556e126ba97SEli Cohen void *seg; 4557e126ba97SEli Cohen int nreq; 4558e126ba97SEli Cohen int i; 4559e126ba97SEli Cohen u8 next_fence = 0; 4560e126ba97SEli Cohen u8 fence; 4561e126ba97SEli Cohen 45626c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 45636c75520fSParav Pandit !drain)) { 45646c75520fSParav Pandit *bad_wr = wr; 45656c75520fSParav Pandit return -EIO; 45666c75520fSParav Pandit } 45676c75520fSParav Pandit 4568d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4569d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4570d16e91daSHaggai Eran 4571d16e91daSHaggai Eran qp = to_mqp(ibqp); 45725fe9dec0SEli Cohen bf = &qp->bf; 4573d16e91daSHaggai Eran qend = qp->sq.qend; 4574d16e91daSHaggai Eran 4575e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4576e126ba97SEli Cohen 4577e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4578a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4579e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4580e126ba97SEli Cohen err = -EINVAL; 4581e126ba97SEli Cohen *bad_wr = wr; 4582e126ba97SEli Cohen goto out; 4583e126ba97SEli Cohen } 4584e126ba97SEli Cohen 4585e126ba97SEli Cohen num_sge = wr->num_sge; 4586e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4587e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 458824be409bSChuck Lever err = -EINVAL; 4589e126ba97SEli Cohen *bad_wr = wr; 4590e126ba97SEli Cohen goto out; 4591e126ba97SEli Cohen } 4592e126ba97SEli Cohen 45936e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 45946e5eadacSSagi Grimberg if (err) { 45956e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 45966e5eadacSSagi Grimberg err = -ENOMEM; 45976e5eadacSSagi Grimberg *bad_wr = wr; 45986e5eadacSSagi Grimberg goto out; 45996e5eadacSSagi Grimberg } 4600e126ba97SEli Cohen 46016e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 46026e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 46036e8484c5SMax Gurtovoy fence = dev->umr_fence; 46046e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 46056e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 46066e8484c5SMax Gurtovoy if (qp->next_fence) 46076e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 46086e8484c5SMax Gurtovoy else 46096e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 46106e8484c5SMax Gurtovoy } else { 46116e8484c5SMax Gurtovoy fence = qp->next_fence; 46126e8484c5SMax Gurtovoy } 46136e8484c5SMax Gurtovoy 4614e126ba97SEli Cohen switch (ibqp->qp_type) { 4615e126ba97SEli Cohen case IB_QPT_XRC_INI: 4616e126ba97SEli Cohen xrc = seg; 4617e126ba97SEli Cohen seg += sizeof(*xrc); 4618e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4619e126ba97SEli Cohen /* fall through */ 4620e126ba97SEli Cohen case IB_QPT_RC: 4621e126ba97SEli Cohen switch (wr->opcode) { 4622e126ba97SEli Cohen case IB_WR_RDMA_READ: 4623e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4624e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4625e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4626e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4627e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4628e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4629e126ba97SEli Cohen break; 4630e126ba97SEli Cohen 4631e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4632e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4633e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 463481bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 463581bea28fSEli Cohen err = -ENOSYS; 463681bea28fSEli Cohen *bad_wr = wr; 463781bea28fSEli Cohen goto out; 4638e126ba97SEli Cohen 4639e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4640e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4641e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4642dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4643e126ba97SEli Cohen num_sge = 0; 4644e126ba97SEli Cohen break; 4645e126ba97SEli Cohen 46468a187ee5SSagi Grimberg case IB_WR_REG_MR: 46478a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 46488a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 46498a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 46508a187ee5SSagi Grimberg if (err) { 46518a187ee5SSagi Grimberg *bad_wr = wr; 46528a187ee5SSagi Grimberg goto out; 46538a187ee5SSagi Grimberg } 46548a187ee5SSagi Grimberg num_sge = 0; 46558a187ee5SSagi Grimberg break; 46568a187ee5SSagi Grimberg 4657e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4658e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4659e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4660e6631814SSagi Grimberg 4661e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4662e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4663e6631814SSagi Grimberg if (err) { 4664e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4665e6631814SSagi Grimberg *bad_wr = wr; 4666e6631814SSagi Grimberg goto out; 4667e6631814SSagi Grimberg } 4668e6631814SSagi Grimberg 46696e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 46706e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4671e6631814SSagi Grimberg /* 4672e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4673e6631814SSagi Grimberg * on error 4674e6631814SSagi Grimberg */ 46757bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 46767bb1fafcSBart Van Assche &size, nreq, false, true); 4677e6631814SSagi Grimberg if (err) { 4678e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4679e6631814SSagi Grimberg err = -ENOMEM; 4680e6631814SSagi Grimberg *bad_wr = wr; 4681e6631814SSagi Grimberg goto out; 4682e6631814SSagi Grimberg } 4683e6631814SSagi Grimberg 4684e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4685e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4686e6631814SSagi Grimberg &size); 4687e6631814SSagi Grimberg if (err) { 4688e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4689e6631814SSagi Grimberg *bad_wr = wr; 4690e6631814SSagi Grimberg goto out; 4691e6631814SSagi Grimberg } 4692e6631814SSagi Grimberg 46936e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 46946e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 46957bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 46967bb1fafcSBart Van Assche &size, nreq, false, true); 4697e6631814SSagi Grimberg if (err) { 4698e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4699e6631814SSagi Grimberg err = -ENOMEM; 4700e6631814SSagi Grimberg *bad_wr = wr; 4701e6631814SSagi Grimberg goto out; 4702e6631814SSagi Grimberg } 4703e6631814SSagi Grimberg 4704e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4705e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4706e6631814SSagi Grimberg &size); 4707e6631814SSagi Grimberg if (err) { 4708e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4709e6631814SSagi Grimberg *bad_wr = wr; 4710e6631814SSagi Grimberg goto out; 4711e6631814SSagi Grimberg } 4712e6631814SSagi Grimberg 47136e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 47146e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 47156e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4716e6631814SSagi Grimberg num_sge = 0; 4717e6631814SSagi Grimberg goto skip_psv; 4718e6631814SSagi Grimberg 4719e126ba97SEli Cohen default: 4720e126ba97SEli Cohen break; 4721e126ba97SEli Cohen } 4722e126ba97SEli Cohen break; 4723e126ba97SEli Cohen 4724e126ba97SEli Cohen case IB_QPT_UC: 4725e126ba97SEli Cohen switch (wr->opcode) { 4726e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4727e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4728e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4729e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4730e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4731e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4732e126ba97SEli Cohen break; 4733e126ba97SEli Cohen 4734e126ba97SEli Cohen default: 4735e126ba97SEli Cohen break; 4736e126ba97SEli Cohen } 4737e126ba97SEli Cohen break; 4738e126ba97SEli Cohen 4739e126ba97SEli Cohen case IB_QPT_SMI: 47401e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 47411e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 47421e0e50b6SMaor Gottlieb err = -EPERM; 47431e0e50b6SMaor Gottlieb *bad_wr = wr; 47441e0e50b6SMaor Gottlieb goto out; 47451e0e50b6SMaor Gottlieb } 4746f6b1ee34SBart Van Assche /* fall through */ 4747d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4748e126ba97SEli Cohen set_datagram_seg(seg, wr); 4749e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4750e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4751e126ba97SEli Cohen if (unlikely((seg == qend))) 4752e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4753e126ba97SEli Cohen break; 4754f0313965SErez Shitrit case IB_QPT_UD: 4755f0313965SErez Shitrit set_datagram_seg(seg, wr); 4756f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4757f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4758e126ba97SEli Cohen 4759f0313965SErez Shitrit if (unlikely((seg == qend))) 4760f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4761f0313965SErez Shitrit 4762f0313965SErez Shitrit /* handle qp that supports ud offload */ 4763f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4764f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4765f0313965SErez Shitrit 4766f0313965SErez Shitrit pad = seg; 4767f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4768f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4769f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4770f0313965SErez Shitrit 4771f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4772f0313965SErez Shitrit 4773f0313965SErez Shitrit if (unlikely((seg == qend))) 4774f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4775f0313965SErez Shitrit } 4776f0313965SErez Shitrit break; 4777e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4778e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4779e126ba97SEli Cohen err = -EINVAL; 4780e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4781e126ba97SEli Cohen goto out; 4782e126ba97SEli Cohen } 4783e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4784e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4785c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4786c8d75a98SMajd Dibbiny if (unlikely(err)) 4787c8d75a98SMajd Dibbiny goto out; 4788e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4789e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4790e126ba97SEli Cohen if (unlikely((seg == qend))) 4791e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4792e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4793e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4794e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4795e126ba97SEli Cohen if (unlikely((seg == qend))) 4796e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4797e126ba97SEli Cohen break; 4798e126ba97SEli Cohen 4799e126ba97SEli Cohen default: 4800e126ba97SEli Cohen break; 4801e126ba97SEli Cohen } 4802e126ba97SEli Cohen 4803e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4804e126ba97SEli Cohen int uninitialized_var(sz); 4805e126ba97SEli Cohen 4806e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4807e126ba97SEli Cohen if (unlikely(err)) { 4808e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4809e126ba97SEli Cohen *bad_wr = wr; 4810e126ba97SEli Cohen goto out; 4811e126ba97SEli Cohen } 4812e126ba97SEli Cohen size += sz; 4813e126ba97SEli Cohen } else { 4814e126ba97SEli Cohen dpseg = seg; 4815e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4816e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4817e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4818e126ba97SEli Cohen dpseg = seg; 4819e126ba97SEli Cohen } 4820e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4821e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4822e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4823e126ba97SEli Cohen dpseg++; 4824e126ba97SEli Cohen } 4825e126ba97SEli Cohen } 4826e126ba97SEli Cohen } 4827e126ba97SEli Cohen 48286e8484c5SMax Gurtovoy qp->next_fence = next_fence; 48296e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 48306e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4831e6631814SSagi Grimberg skip_psv: 4832e126ba97SEli Cohen if (0) 4833e126ba97SEli Cohen dump_wqe(qp, idx, size); 4834e126ba97SEli Cohen } 4835e126ba97SEli Cohen 4836e126ba97SEli Cohen out: 4837e126ba97SEli Cohen if (likely(nreq)) { 4838e126ba97SEli Cohen qp->sq.head += nreq; 4839e126ba97SEli Cohen 4840e126ba97SEli Cohen /* Make sure that descriptors are written before 4841e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4842e126ba97SEli Cohen */ 4843e126ba97SEli Cohen wmb(); 4844e126ba97SEli Cohen 4845e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4846e126ba97SEli Cohen 4847ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4848ada388f7SEli Cohen * we hit doorbell */ 4849ada388f7SEli Cohen wmb(); 4850ada388f7SEli Cohen 48515fe9dec0SEli Cohen /* currently we support only regular doorbells */ 48525fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4853e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4854e126ba97SEli Cohen * and reach the HCA out of order. 4855e126ba97SEli Cohen */ 4856e126ba97SEli Cohen mmiowb(); 4857e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4858e126ba97SEli Cohen } 4859e126ba97SEli Cohen 4860e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4861e126ba97SEli Cohen 4862e126ba97SEli Cohen return err; 4863e126ba97SEli Cohen } 4864e126ba97SEli Cohen 4865d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4866d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 4867d0e84c0aSYishai Hadas { 4868d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 4869d0e84c0aSYishai Hadas } 4870d0e84c0aSYishai Hadas 4871e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4872e126ba97SEli Cohen { 4873e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4874e126ba97SEli Cohen } 4875e126ba97SEli Cohen 4876d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4877d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 4878e126ba97SEli Cohen { 4879e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4880e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4881e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 488289ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 488389ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4884e126ba97SEli Cohen unsigned long flags; 4885e126ba97SEli Cohen int err = 0; 4886e126ba97SEli Cohen int nreq; 4887e126ba97SEli Cohen int ind; 4888e126ba97SEli Cohen int i; 4889e126ba97SEli Cohen 48906c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 48916c75520fSParav Pandit !drain)) { 48926c75520fSParav Pandit *bad_wr = wr; 48936c75520fSParav Pandit return -EIO; 48946c75520fSParav Pandit } 48956c75520fSParav Pandit 4896d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4897d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4898d16e91daSHaggai Eran 4899e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4900e126ba97SEli Cohen 4901e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4902e126ba97SEli Cohen 4903e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4904e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4905e126ba97SEli Cohen err = -ENOMEM; 4906e126ba97SEli Cohen *bad_wr = wr; 4907e126ba97SEli Cohen goto out; 4908e126ba97SEli Cohen } 4909e126ba97SEli Cohen 4910e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4911e126ba97SEli Cohen err = -EINVAL; 4912e126ba97SEli Cohen *bad_wr = wr; 4913e126ba97SEli Cohen goto out; 4914e126ba97SEli Cohen } 4915e126ba97SEli Cohen 4916e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4917e126ba97SEli Cohen if (qp->wq_sig) 4918e126ba97SEli Cohen scat++; 4919e126ba97SEli Cohen 4920e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4921e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4922e126ba97SEli Cohen 4923e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4924e126ba97SEli Cohen scat[i].byte_count = 0; 4925e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4926e126ba97SEli Cohen scat[i].addr = 0; 4927e126ba97SEli Cohen } 4928e126ba97SEli Cohen 4929e126ba97SEli Cohen if (qp->wq_sig) { 4930e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4931e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4932e126ba97SEli Cohen } 4933e126ba97SEli Cohen 4934e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4935e126ba97SEli Cohen 4936e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4937e126ba97SEli Cohen } 4938e126ba97SEli Cohen 4939e126ba97SEli Cohen out: 4940e126ba97SEli Cohen if (likely(nreq)) { 4941e126ba97SEli Cohen qp->rq.head += nreq; 4942e126ba97SEli Cohen 4943e126ba97SEli Cohen /* Make sure that descriptors are written before 4944e126ba97SEli Cohen * doorbell record. 4945e126ba97SEli Cohen */ 4946e126ba97SEli Cohen wmb(); 4947e126ba97SEli Cohen 4948e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4949e126ba97SEli Cohen } 4950e126ba97SEli Cohen 4951e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4952e126ba97SEli Cohen 4953e126ba97SEli Cohen return err; 4954e126ba97SEli Cohen } 4955e126ba97SEli Cohen 4956d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4957d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 4958d0e84c0aSYishai Hadas { 4959d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 4960d0e84c0aSYishai Hadas } 4961d0e84c0aSYishai Hadas 4962e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4963e126ba97SEli Cohen { 4964e126ba97SEli Cohen switch (mlx5_state) { 4965e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4966e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4967e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4968e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4969e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4970e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4971e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4972e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4973e126ba97SEli Cohen default: return -1; 4974e126ba97SEli Cohen } 4975e126ba97SEli Cohen } 4976e126ba97SEli Cohen 4977e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4978e126ba97SEli Cohen { 4979e126ba97SEli Cohen switch (mlx5_mig_state) { 4980e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4981e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4982e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4983e126ba97SEli Cohen default: return -1; 4984e126ba97SEli Cohen } 4985e126ba97SEli Cohen } 4986e126ba97SEli Cohen 4987e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4988e126ba97SEli Cohen { 4989e126ba97SEli Cohen int ib_flags = 0; 4990e126ba97SEli Cohen 4991e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4992e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4993e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4994e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4995e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4996e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4997e126ba97SEli Cohen 4998e126ba97SEli Cohen return ib_flags; 4999e126ba97SEli Cohen } 5000e126ba97SEli Cohen 500138349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5002d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5003e126ba97SEli Cohen struct mlx5_qp_path *path) 5004e126ba97SEli Cohen { 5005e126ba97SEli Cohen 5006d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5007e126ba97SEli Cohen 5008e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5009e126ba97SEli Cohen return; 5010e126ba97SEli Cohen 5011ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5012ae59c3f0SLeon Romanovsky 5013d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5014d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5015e126ba97SEli Cohen 5016d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5017d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5018d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5019d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5020d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5021d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5022d8966fcdSDasaratharaman Chandramouli 5023d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5024d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5025d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5026d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5027d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5028d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5029e126ba97SEli Cohen } 5030e126ba97SEli Cohen } 5031e126ba97SEli Cohen 50326d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 50336d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 50346d2f89dfSmajd@mellanox.com u8 *sq_state) 5035e126ba97SEli Cohen { 50366d2f89dfSmajd@mellanox.com int err; 50376d2f89dfSmajd@mellanox.com 503828160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 50396d2f89dfSmajd@mellanox.com if (err) 50406d2f89dfSmajd@mellanox.com goto out; 50416d2f89dfSmajd@mellanox.com sq->state = *sq_state; 50426d2f89dfSmajd@mellanox.com 50436d2f89dfSmajd@mellanox.com out: 50446d2f89dfSmajd@mellanox.com return err; 50456d2f89dfSmajd@mellanox.com } 50466d2f89dfSmajd@mellanox.com 50476d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 50486d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 50496d2f89dfSmajd@mellanox.com u8 *rq_state) 50506d2f89dfSmajd@mellanox.com { 50516d2f89dfSmajd@mellanox.com void *out; 50526d2f89dfSmajd@mellanox.com void *rqc; 50536d2f89dfSmajd@mellanox.com int inlen; 50546d2f89dfSmajd@mellanox.com int err; 50556d2f89dfSmajd@mellanox.com 50566d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 50571b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 50586d2f89dfSmajd@mellanox.com if (!out) 50596d2f89dfSmajd@mellanox.com return -ENOMEM; 50606d2f89dfSmajd@mellanox.com 50616d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 50626d2f89dfSmajd@mellanox.com if (err) 50636d2f89dfSmajd@mellanox.com goto out; 50646d2f89dfSmajd@mellanox.com 50656d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 50666d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 50676d2f89dfSmajd@mellanox.com rq->state = *rq_state; 50686d2f89dfSmajd@mellanox.com 50696d2f89dfSmajd@mellanox.com out: 50706d2f89dfSmajd@mellanox.com kvfree(out); 50716d2f89dfSmajd@mellanox.com return err; 50726d2f89dfSmajd@mellanox.com } 50736d2f89dfSmajd@mellanox.com 50746d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 50756d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 50766d2f89dfSmajd@mellanox.com { 50776d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 50786d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 50796d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 50806d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 50816d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 50826d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 50836d2f89dfSmajd@mellanox.com }, 50846d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 50856d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 50866d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 50876d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 50886d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 50896d2f89dfSmajd@mellanox.com }, 50906d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 50916d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 50926d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 50936d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 50946d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 50956d2f89dfSmajd@mellanox.com }, 50966d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 50976d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 50986d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 50996d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 51006d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 51016d2f89dfSmajd@mellanox.com }, 51026d2f89dfSmajd@mellanox.com }; 51036d2f89dfSmajd@mellanox.com 51046d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 51056d2f89dfSmajd@mellanox.com 51066d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 51076d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 51086d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 51096d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 51106d2f89dfSmajd@mellanox.com return -EINVAL; 51116d2f89dfSmajd@mellanox.com } 51126d2f89dfSmajd@mellanox.com 51136d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 51146d2f89dfSmajd@mellanox.com *qp_state = qp->state; 51156d2f89dfSmajd@mellanox.com 51166d2f89dfSmajd@mellanox.com return 0; 51176d2f89dfSmajd@mellanox.com } 51186d2f89dfSmajd@mellanox.com 51196d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 51206d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 51216d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 51226d2f89dfSmajd@mellanox.com { 51236d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 51246d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 51256d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 51266d2f89dfSmajd@mellanox.com int err; 51276d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 51286d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 51296d2f89dfSmajd@mellanox.com 51306d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 51316d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 51326d2f89dfSmajd@mellanox.com if (err) 51336d2f89dfSmajd@mellanox.com return err; 51346d2f89dfSmajd@mellanox.com } 51356d2f89dfSmajd@mellanox.com 51366d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 51376d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 51386d2f89dfSmajd@mellanox.com if (err) 51396d2f89dfSmajd@mellanox.com return err; 51406d2f89dfSmajd@mellanox.com } 51416d2f89dfSmajd@mellanox.com 51426d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 51436d2f89dfSmajd@mellanox.com raw_packet_qp_state); 51446d2f89dfSmajd@mellanox.com } 51456d2f89dfSmajd@mellanox.com 51466d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 51476d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 51486d2f89dfSmajd@mellanox.com { 514909a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5150e126ba97SEli Cohen struct mlx5_qp_context *context; 5151e126ba97SEli Cohen int mlx5_state; 515209a7d9ecSSaeed Mahameed u32 *outb; 5153e126ba97SEli Cohen int err = 0; 5154e126ba97SEli Cohen 515509a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 51566d2f89dfSmajd@mellanox.com if (!outb) 51576d2f89dfSmajd@mellanox.com return -ENOMEM; 51586d2f89dfSmajd@mellanox.com 515919098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 516009a7d9ecSSaeed Mahameed outlen); 5161e126ba97SEli Cohen if (err) 51626d2f89dfSmajd@mellanox.com goto out; 5163e126ba97SEli Cohen 516409a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 516509a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 516609a7d9ecSSaeed Mahameed 5167e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5168e126ba97SEli Cohen 5169e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5170e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5171e126ba97SEli Cohen qp_attr->path_mig_state = 5172e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5173e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5174e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5175e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5176e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5177e126ba97SEli Cohen qp_attr->qp_access_flags = 5178e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5179e126ba97SEli Cohen 5180e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 518138349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 518238349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5183d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5184d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5185d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5186d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5187e126ba97SEli Cohen } 5188e126ba97SEli Cohen 5189d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5190e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5191e126ba97SEli Cohen 5192e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5193e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5194e126ba97SEli Cohen 5195e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5196e126ba97SEli Cohen 5197e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5198e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5199e126ba97SEli Cohen qp_attr->min_rnr_timer = 5200e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5201e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5202e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5203e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5204e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 52056d2f89dfSmajd@mellanox.com 52066d2f89dfSmajd@mellanox.com out: 52076d2f89dfSmajd@mellanox.com kfree(outb); 52086d2f89dfSmajd@mellanox.com return err; 52096d2f89dfSmajd@mellanox.com } 52106d2f89dfSmajd@mellanox.com 5211776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5212776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5213776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5214776a3906SMoni Shoua { 5215776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5216776a3906SMoni Shoua u32 *out; 5217776a3906SMoni Shoua u32 access_flags = 0; 5218776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5219776a3906SMoni Shoua void *dctc; 5220776a3906SMoni Shoua int err; 5221776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5222776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5223776a3906SMoni Shoua IB_QP_PORT | 5224776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5225776a3906SMoni Shoua IB_QP_AV | 5226776a3906SMoni Shoua IB_QP_PATH_MTU | 5227776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5228776a3906SMoni Shoua 5229776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5230776a3906SMoni Shoua return -EINVAL; 5231776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5232776a3906SMoni Shoua return -EINVAL; 5233776a3906SMoni Shoua 5234776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5235776a3906SMoni Shoua if (!out) 5236776a3906SMoni Shoua return -ENOMEM; 5237776a3906SMoni Shoua 5238776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5239776a3906SMoni Shoua if (err) 5240776a3906SMoni Shoua goto out; 5241776a3906SMoni Shoua 5242776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5243776a3906SMoni Shoua 5244776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5245776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5246776a3906SMoni Shoua 5247776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5248776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5249776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5250776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5251776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5252776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5253776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5254776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5255776a3906SMoni Shoua } 5256776a3906SMoni Shoua 5257776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5258776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5259776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5260776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5261776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5262776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5263776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5264776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5265776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5266776a3906SMoni Shoua } 5267776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5268776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5269776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5270776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5271776a3906SMoni Shoua out: 5272776a3906SMoni Shoua kfree(out); 5273776a3906SMoni Shoua return err; 5274776a3906SMoni Shoua } 5275776a3906SMoni Shoua 52766d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 52776d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 52786d2f89dfSmajd@mellanox.com { 52796d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 52806d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 52816d2f89dfSmajd@mellanox.com int err = 0; 52826d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 52836d2f89dfSmajd@mellanox.com 528428d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 528528d61370SYishai Hadas return -ENOSYS; 528628d61370SYishai Hadas 5287d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5288d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5289d16e91daSHaggai Eran qp_init_attr); 5290d16e91daSHaggai Eran 5291c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5292c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5293c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5294c2e53b2cSYishai Hadas 5295776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5296776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5297776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5298776a3906SMoni Shoua 52996d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 53006d2f89dfSmajd@mellanox.com 5301c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5302c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 53036d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 53046d2f89dfSmajd@mellanox.com if (err) 53056d2f89dfSmajd@mellanox.com goto out; 53066d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 53076d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 53086d2f89dfSmajd@mellanox.com } else { 53096d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 53106d2f89dfSmajd@mellanox.com if (err) 53116d2f89dfSmajd@mellanox.com goto out; 53126d2f89dfSmajd@mellanox.com } 53136d2f89dfSmajd@mellanox.com 53146d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5315e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5316e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5317e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5318e126ba97SEli Cohen 5319e126ba97SEli Cohen if (!ibqp->uobject) { 53200540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5321e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 53220540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5323e126ba97SEli Cohen } else { 5324e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5325e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5326e126ba97SEli Cohen } 5327e126ba97SEli Cohen 53280540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 53290540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 53300540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 53310540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 53320540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5333e126ba97SEli Cohen 5334e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5335e126ba97SEli Cohen 5336e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5337e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5338e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5339e126ba97SEli Cohen 5340051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5341051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5342051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5343051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5344051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5345051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5346b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5347b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5348051f2630SLeon Romanovsky 5349e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5350e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5351e126ba97SEli Cohen 5352e126ba97SEli Cohen out: 5353e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5354e126ba97SEli Cohen return err; 5355e126ba97SEli Cohen } 5356e126ba97SEli Cohen 5357e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5358e126ba97SEli Cohen struct ib_ucontext *context, 5359e126ba97SEli Cohen struct ib_udata *udata) 5360e126ba97SEli Cohen { 5361e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5362e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5363e126ba97SEli Cohen int err; 5364d00614c0SYishai Hadas u16 uid; 5365e126ba97SEli Cohen 5366938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5367e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5368e126ba97SEli Cohen 5369e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5370e126ba97SEli Cohen if (!xrcd) 5371e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5372e126ba97SEli Cohen 5373d00614c0SYishai Hadas uid = context ? to_mucontext(context)->devx_uid : 0; 5374d00614c0SYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, uid); 5375e126ba97SEli Cohen if (err) { 5376e126ba97SEli Cohen kfree(xrcd); 5377e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5378e126ba97SEli Cohen } 5379e126ba97SEli Cohen 5380d00614c0SYishai Hadas xrcd->uid = uid; 5381e126ba97SEli Cohen return &xrcd->ibxrcd; 5382e126ba97SEli Cohen } 5383e126ba97SEli Cohen 5384e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5385e126ba97SEli Cohen { 5386e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5387e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5388d00614c0SYishai Hadas u16 uid = to_mxrcd(xrcd)->uid; 5389e126ba97SEli Cohen int err; 5390e126ba97SEli Cohen 5391d00614c0SYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, uid); 5392b081808aSLeon Romanovsky if (err) 5393e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5394e126ba97SEli Cohen 5395e126ba97SEli Cohen kfree(xrcd); 5396e126ba97SEli Cohen return 0; 5397e126ba97SEli Cohen } 539879b20a6cSYishai Hadas 5399350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5400350d0e4cSYishai Hadas { 5401350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5402350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5403350d0e4cSYishai Hadas struct ib_event event; 5404350d0e4cSYishai Hadas 5405350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5406350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5407350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5408350d0e4cSYishai Hadas switch (type) { 5409350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5410350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5411350d0e4cSYishai Hadas break; 5412350d0e4cSYishai Hadas default: 5413350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5414350d0e4cSYishai Hadas return; 5415350d0e4cSYishai Hadas } 5416350d0e4cSYishai Hadas 5417350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5418350d0e4cSYishai Hadas } 5419350d0e4cSYishai Hadas } 5420350d0e4cSYishai Hadas 542103404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 542203404e8aSMaor Gottlieb { 542303404e8aSMaor Gottlieb int err = 0; 542403404e8aSMaor Gottlieb 542503404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 542603404e8aSMaor Gottlieb if (dev->delay_drop.activate) 542703404e8aSMaor Gottlieb goto out; 542803404e8aSMaor Gottlieb 542903404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 543003404e8aSMaor Gottlieb if (err) 543103404e8aSMaor Gottlieb goto out; 543203404e8aSMaor Gottlieb 543303404e8aSMaor Gottlieb dev->delay_drop.activate = true; 543403404e8aSMaor Gottlieb out: 543503404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5436fe248c3aSMaor Gottlieb 5437fe248c3aSMaor Gottlieb if (!err) 5438fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 543903404e8aSMaor Gottlieb return err; 544003404e8aSMaor Gottlieb } 544103404e8aSMaor Gottlieb 544279b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 544379b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 544479b20a6cSYishai Hadas { 544579b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 54464be6da1eSNoa Osherovich int has_net_offloads; 544779b20a6cSYishai Hadas __be64 *rq_pas0; 544879b20a6cSYishai Hadas void *in; 544979b20a6cSYishai Hadas void *rqc; 545079b20a6cSYishai Hadas void *wq; 545179b20a6cSYishai Hadas int inlen; 545279b20a6cSYishai Hadas int err; 545379b20a6cSYishai Hadas 545479b20a6cSYishai Hadas dev = to_mdev(pd->device); 545579b20a6cSYishai Hadas 545679b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 54571b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 545879b20a6cSYishai Hadas if (!in) 545979b20a6cSYishai Hadas return -ENOMEM; 546079b20a6cSYishai Hadas 546134d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 546279b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 546379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 546479b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 546579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 546679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 546779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 546879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 546979b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5470ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5471ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5472ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5473b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5474b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5475b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5476b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5477b1383aa6SNoa Osherovich goto out; 5478b1383aa6SNoa Osherovich } else { 547979b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5480b1383aa6SNoa Osherovich } 5481b1383aa6SNoa Osherovich } 548279b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5483ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5484ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5485ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5486ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5487ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5488ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5489ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5490ccc87087SNoa Osherovich } 549179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 549279b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 549379b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 549479b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 549579b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 549679b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 54974be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5498b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 54994be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5500b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5501b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5502b1f74a84SNoa Osherovich goto out; 5503b1f74a84SNoa Osherovich } 5504b1f74a84SNoa Osherovich } else { 5505b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5506b1f74a84SNoa Osherovich } 55074be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 55084be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 55094be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 55104be6da1eSNoa Osherovich err = -EOPNOTSUPP; 55114be6da1eSNoa Osherovich goto out; 55124be6da1eSNoa Osherovich } 55134be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 55144be6da1eSNoa Osherovich } 551503404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 551603404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 551703404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 551803404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 551903404e8aSMaor Gottlieb err = -EOPNOTSUPP; 552003404e8aSMaor Gottlieb goto out; 552103404e8aSMaor Gottlieb } 552203404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 552303404e8aSMaor Gottlieb } 552479b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 552579b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5526350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 552703404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 552803404e8aSMaor Gottlieb err = set_delay_drop(dev); 552903404e8aSMaor Gottlieb if (err) { 553003404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 553103404e8aSMaor Gottlieb err); 553203404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 553303404e8aSMaor Gottlieb } else { 553403404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 553503404e8aSMaor Gottlieb } 553603404e8aSMaor Gottlieb } 5537b1f74a84SNoa Osherovich out: 553879b20a6cSYishai Hadas kvfree(in); 553979b20a6cSYishai Hadas return err; 554079b20a6cSYishai Hadas } 554179b20a6cSYishai Hadas 554279b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 554379b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 554479b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 554579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 554679b20a6cSYishai Hadas { 554779b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 554879b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 554979b20a6cSYishai Hadas return -EINVAL; 555079b20a6cSYishai Hadas 555179b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 555279b20a6cSYishai Hadas return -EINVAL; 555379b20a6cSYishai Hadas 555479b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 555579b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 55560dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 55570dfe4522SLeon Romanovsky return -EINVAL; 55580dfe4522SLeon Romanovsky 555979b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 556079b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 556179b20a6cSYishai Hadas return 0; 556279b20a6cSYishai Hadas } 556379b20a6cSYishai Hadas 556479b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 556579b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 556679b20a6cSYishai Hadas struct ib_udata *udata, 556779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 556879b20a6cSYishai Hadas { 556979b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 557079b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 557179b20a6cSYishai Hadas int err; 557279b20a6cSYishai Hadas size_t required_cmd_sz; 557379b20a6cSYishai Hadas 5574ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5575ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 557679b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 557779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 557879b20a6cSYishai Hadas return -EINVAL; 557979b20a6cSYishai Hadas } 558079b20a6cSYishai Hadas 558179b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 558279b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 558379b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 558479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 558579b20a6cSYishai Hadas return -EOPNOTSUPP; 558679b20a6cSYishai Hadas } 558779b20a6cSYishai Hadas 558879b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 558979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 559079b20a6cSYishai Hadas return -EFAULT; 559179b20a6cSYishai Hadas } 559279b20a6cSYishai Hadas 5593ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 559479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 559579b20a6cSYishai Hadas return -EOPNOTSUPP; 5596ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5597ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5598ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 559979b20a6cSYishai Hadas return -EOPNOTSUPP; 560079b20a6cSYishai Hadas } 5601ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5602ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5603ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5604ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5605ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5606ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5607ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5608ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5609ccc87087SNoa Osherovich return -EINVAL; 5610ccc87087SNoa Osherovich } 5611ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5612ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5613ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5614ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5615ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5616ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5617ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5618ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5619ccc87087SNoa Osherovich return -EINVAL; 5620ccc87087SNoa Osherovich } 5621ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5622ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5623ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5624ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5625ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5626ccc87087SNoa Osherovich } 562779b20a6cSYishai Hadas 562879b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 562979b20a6cSYishai Hadas if (err) { 563079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 563179b20a6cSYishai Hadas return err; 563279b20a6cSYishai Hadas } 563379b20a6cSYishai Hadas 563479b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 563579b20a6cSYishai Hadas if (err) { 563679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 563779b20a6cSYishai Hadas return err; 563879b20a6cSYishai Hadas } 563979b20a6cSYishai Hadas 564079b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 564179b20a6cSYishai Hadas return 0; 564279b20a6cSYishai Hadas } 564379b20a6cSYishai Hadas 564479b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 564579b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 564679b20a6cSYishai Hadas struct ib_udata *udata) 564779b20a6cSYishai Hadas { 564879b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 564979b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 565079b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 565179b20a6cSYishai Hadas size_t min_resp_len; 565279b20a6cSYishai Hadas int err; 565379b20a6cSYishai Hadas 565479b20a6cSYishai Hadas if (!udata) 565579b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 565679b20a6cSYishai Hadas 565779b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 565879b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 565979b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 566079b20a6cSYishai Hadas 566179b20a6cSYishai Hadas dev = to_mdev(pd->device); 566279b20a6cSYishai Hadas switch (init_attr->wq_type) { 566379b20a6cSYishai Hadas case IB_WQT_RQ: 566479b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 566579b20a6cSYishai Hadas if (!rwq) 566679b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 566779b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 566879b20a6cSYishai Hadas if (err) 566979b20a6cSYishai Hadas goto err; 567079b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 567179b20a6cSYishai Hadas if (err) 567279b20a6cSYishai Hadas goto err_user_rq; 567379b20a6cSYishai Hadas break; 567479b20a6cSYishai Hadas default: 567579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 567679b20a6cSYishai Hadas init_attr->wq_type); 567779b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 567879b20a6cSYishai Hadas } 567979b20a6cSYishai Hadas 5680350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 568179b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 568279b20a6cSYishai Hadas if (udata->outlen) { 568379b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 568479b20a6cSYishai Hadas sizeof(resp.response_length); 568579b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 568679b20a6cSYishai Hadas if (err) 568779b20a6cSYishai Hadas goto err_copy; 568879b20a6cSYishai Hadas } 568979b20a6cSYishai Hadas 5690350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5691350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 569279b20a6cSYishai Hadas return &rwq->ibwq; 569379b20a6cSYishai Hadas 569479b20a6cSYishai Hadas err_copy: 5695350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 569679b20a6cSYishai Hadas err_user_rq: 5697fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 569879b20a6cSYishai Hadas err: 569979b20a6cSYishai Hadas kfree(rwq); 570079b20a6cSYishai Hadas return ERR_PTR(err); 570179b20a6cSYishai Hadas } 570279b20a6cSYishai Hadas 570379b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 570479b20a6cSYishai Hadas { 570579b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 570679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 570779b20a6cSYishai Hadas 5708350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5709fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 571079b20a6cSYishai Hadas kfree(rwq); 571179b20a6cSYishai Hadas 571279b20a6cSYishai Hadas return 0; 571379b20a6cSYishai Hadas } 571479b20a6cSYishai Hadas 5715c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5716c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5717c5f90929SYishai Hadas struct ib_udata *udata) 5718c5f90929SYishai Hadas { 5719c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5720c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5721c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5722c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5723c5f90929SYishai Hadas size_t min_resp_len; 5724c5f90929SYishai Hadas int inlen; 5725c5f90929SYishai Hadas int err; 5726c5f90929SYishai Hadas int i; 5727c5f90929SYishai Hadas u32 *in; 5728c5f90929SYishai Hadas void *rqtc; 5729c5f90929SYishai Hadas 5730c5f90929SYishai Hadas if (udata->inlen > 0 && 5731c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5732c5f90929SYishai Hadas udata->inlen)) 5733c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5734c5f90929SYishai Hadas 5735efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5736efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5737efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5738efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5739efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5740efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5741efd7f400SMaor Gottlieb } 5742efd7f400SMaor Gottlieb 5743c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5744c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5745c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5746c5f90929SYishai Hadas 5747c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5748c5f90929SYishai Hadas if (!rwq_ind_tbl) 5749c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5750c5f90929SYishai Hadas 5751c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 57521b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5753c5f90929SYishai Hadas if (!in) { 5754c5f90929SYishai Hadas err = -ENOMEM; 5755c5f90929SYishai Hadas goto err; 5756c5f90929SYishai Hadas } 5757c5f90929SYishai Hadas 5758c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5759c5f90929SYishai Hadas 5760c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5761c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5762c5f90929SYishai Hadas 5763c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5764c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5765c5f90929SYishai Hadas 57665deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 57675deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 57685deba86eSYishai Hadas 5769c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5770c5f90929SYishai Hadas kvfree(in); 5771c5f90929SYishai Hadas 5772c5f90929SYishai Hadas if (err) 5773c5f90929SYishai Hadas goto err; 5774c5f90929SYishai Hadas 5775c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5776c5f90929SYishai Hadas if (udata->outlen) { 5777c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5778c5f90929SYishai Hadas sizeof(resp.response_length); 5779c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5780c5f90929SYishai Hadas if (err) 5781c5f90929SYishai Hadas goto err_copy; 5782c5f90929SYishai Hadas } 5783c5f90929SYishai Hadas 5784c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5785c5f90929SYishai Hadas 5786c5f90929SYishai Hadas err_copy: 57875deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5788c5f90929SYishai Hadas err: 5789c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5790c5f90929SYishai Hadas return ERR_PTR(err); 5791c5f90929SYishai Hadas } 5792c5f90929SYishai Hadas 5793c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5794c5f90929SYishai Hadas { 5795c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5796c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5797c5f90929SYishai Hadas 57985deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5799c5f90929SYishai Hadas 5800c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5801c5f90929SYishai Hadas return 0; 5802c5f90929SYishai Hadas } 5803c5f90929SYishai Hadas 580479b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 580579b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 580679b20a6cSYishai Hadas { 580779b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 580879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 580979b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 581079b20a6cSYishai Hadas size_t required_cmd_sz; 581179b20a6cSYishai Hadas int curr_wq_state; 581279b20a6cSYishai Hadas int wq_state; 581379b20a6cSYishai Hadas int inlen; 581479b20a6cSYishai Hadas int err; 581579b20a6cSYishai Hadas void *rqc; 581679b20a6cSYishai Hadas void *in; 581779b20a6cSYishai Hadas 581879b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 581979b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 582079b20a6cSYishai Hadas return -EINVAL; 582179b20a6cSYishai Hadas 582279b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 582379b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 582479b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 582579b20a6cSYishai Hadas return -EOPNOTSUPP; 582679b20a6cSYishai Hadas 582779b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 582879b20a6cSYishai Hadas return -EFAULT; 582979b20a6cSYishai Hadas 583079b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 583179b20a6cSYishai Hadas return -EOPNOTSUPP; 583279b20a6cSYishai Hadas 583379b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 58341b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 583579b20a6cSYishai Hadas if (!in) 583679b20a6cSYishai Hadas return -ENOMEM; 583779b20a6cSYishai Hadas 583879b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 583979b20a6cSYishai Hadas 584079b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 584179b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 584279b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 584379b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 584479b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 584579b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 584679b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 584779b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 584879b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 584934d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 585079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 585179b20a6cSYishai Hadas 5852b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5853b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5854b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5855b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5856b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5857b1f74a84SNoa Osherovich "supported\n"); 5858b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5859b1f74a84SNoa Osherovich goto out; 5860b1f74a84SNoa Osherovich } 5861b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5862b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5863b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5864b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5865b1f74a84SNoa Osherovich } 5866b1383aa6SNoa Osherovich 5867b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5868b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5869b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5870b1383aa6SNoa Osherovich goto out; 5871b1383aa6SNoa Osherovich } 5872b1f74a84SNoa Osherovich } 5873b1f74a84SNoa Osherovich 587423a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 587523a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 587623a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 587723a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5878e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5879e1f24a79SParav Pandit dev->port->cnts.set_id); 588023a6964eSMajd Dibbiny } else 58815a738b5dSJason Gunthorpe dev_info_once( 58825a738b5dSJason Gunthorpe &dev->ib_dev.dev, 58835a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 588423a6964eSMajd Dibbiny } 588523a6964eSMajd Dibbiny 5886350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 588779b20a6cSYishai Hadas if (!err) 588879b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 588979b20a6cSYishai Hadas 5890b1f74a84SNoa Osherovich out: 5891b1f74a84SNoa Osherovich kvfree(in); 589279b20a6cSYishai Hadas return err; 589379b20a6cSYishai Hadas } 5894d0e84c0aSYishai Hadas 5895d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 5896d0e84c0aSYishai Hadas struct ib_cqe cqe; 5897d0e84c0aSYishai Hadas struct completion done; 5898d0e84c0aSYishai Hadas }; 5899d0e84c0aSYishai Hadas 5900d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 5901d0e84c0aSYishai Hadas { 5902d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 5903d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 5904d0e84c0aSYishai Hadas cqe); 5905d0e84c0aSYishai Hadas 5906d0e84c0aSYishai Hadas complete(&cqe->done); 5907d0e84c0aSYishai Hadas } 5908d0e84c0aSYishai Hadas 5909d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 5910d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 5911d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 5912d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 5913d0e84c0aSYishai Hadas { 5914d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5915d0e84c0aSYishai Hadas 5916d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 5917d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 5918d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 5919d0e84c0aSYishai Hadas return; 5920d0e84c0aSYishai Hadas } 5921d0e84c0aSYishai Hadas 5922d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5923d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 5924d0e84c0aSYishai Hadas bool triggered = false; 5925d0e84c0aSYishai Hadas unsigned long flags; 5926d0e84c0aSYishai Hadas 5927d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 5928d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 5929d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 5930d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 5931d0e84c0aSYishai Hadas else 5932d0e84c0aSYishai Hadas triggered = true; 5933d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 5934d0e84c0aSYishai Hadas 5935d0e84c0aSYishai Hadas if (triggered) { 5936d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 5937d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 5938d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 5939d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 5940d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 5941d0e84c0aSYishai Hadas break; 5942d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 5943d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 5944d0e84c0aSYishai Hadas break; 5945d0e84c0aSYishai Hadas default: 5946d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 5947d0e84c0aSYishai Hadas } 5948d0e84c0aSYishai Hadas } 5949d0e84c0aSYishai Hadas 5950d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 5951d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 5952d0e84c0aSYishai Hadas */ 5953d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 5954d0e84c0aSYishai Hadas } 5955d0e84c0aSYishai Hadas 5956d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 5957d0e84c0aSYishai Hadas } 5958d0e84c0aSYishai Hadas 5959d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 5960d0e84c0aSYishai Hadas { 5961d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 5962d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 5963d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 5964d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 5965d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 5966d0e84c0aSYishai Hadas .wr = { 5967d0e84c0aSYishai Hadas .next = NULL, 5968d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 5969d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 5970d0e84c0aSYishai Hadas }, 5971d0e84c0aSYishai Hadas }; 5972d0e84c0aSYishai Hadas int ret; 5973d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 5974d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5975d0e84c0aSYishai Hadas 5976d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 5977d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 5978d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 5979d0e84c0aSYishai Hadas return; 5980d0e84c0aSYishai Hadas } 5981d0e84c0aSYishai Hadas 5982d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 5983d0e84c0aSYishai Hadas init_completion(&sdrain.done); 5984d0e84c0aSYishai Hadas 5985d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 5986d0e84c0aSYishai Hadas if (ret) { 5987d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 5988d0e84c0aSYishai Hadas return; 5989d0e84c0aSYishai Hadas } 5990d0e84c0aSYishai Hadas 5991d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 5992d0e84c0aSYishai Hadas } 5993d0e84c0aSYishai Hadas 5994d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 5995d0e84c0aSYishai Hadas { 5996d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 5997d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 5998d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 5999d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6000d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6001d0e84c0aSYishai Hadas int ret; 6002d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6003d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6004d0e84c0aSYishai Hadas 6005d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6006d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6007d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6008d0e84c0aSYishai Hadas return; 6009d0e84c0aSYishai Hadas } 6010d0e84c0aSYishai Hadas 6011d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6012d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6013d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6014d0e84c0aSYishai Hadas 6015d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6016d0e84c0aSYishai Hadas if (ret) { 6017d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6018d0e84c0aSYishai Hadas return; 6019d0e84c0aSYishai Hadas } 6020d0e84c0aSYishai Hadas 6021d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6022d0e84c0aSYishai Hadas } 6023