1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40e126ba97SEli Cohen 41e126ba97SEli Cohen /* not supported currently */ 42e126ba97SEli Cohen static int wq_signature; 43e126ba97SEli Cohen 44e126ba97SEli Cohen enum { 45e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 46e126ba97SEli Cohen }; 47e126ba97SEli Cohen 48e126ba97SEli Cohen enum { 49e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 50e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 53e126ba97SEli Cohen }; 54e126ba97SEli Cohen 55e126ba97SEli Cohen enum { 56e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 57e126ba97SEli Cohen }; 58e126ba97SEli Cohen 59e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 60e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 61f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 62e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 63e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 64e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 66e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 67e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 68e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 69e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 708a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 71e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 72e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 73e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 74e126ba97SEli Cohen }; 75e126ba97SEli Cohen 76f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 77f0313965SErez Shitrit u8 rsvd0[16]; 78f0313965SErez Shitrit }; 79e126ba97SEli Cohen 80eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 81eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 827d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 83eb49ab0cSAlex Vesker }; 84eb49ab0cSAlex Vesker 850680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 860680efa2SAlex Vesker u16 operation; 87eb49ab0cSAlex Vesker 88eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 8961147f39SBodong Wang 9061147f39SBodong Wang struct mlx5_rate_limit rl; 9161147f39SBodong Wang 92eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 930680efa2SAlex Vesker }; 940680efa2SAlex Vesker 9589ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9689ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9789ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 9889ea94a7SMaor Gottlieb 99e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 100e126ba97SEli Cohen { 101e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 102e126ba97SEli Cohen } 103e126ba97SEli Cohen 104e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 105e126ba97SEli Cohen { 106e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 107e126ba97SEli Cohen } 108e126ba97SEli Cohen 109e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 110e126ba97SEli Cohen { 111e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 112e126ba97SEli Cohen } 113e126ba97SEli Cohen 114e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 115e126ba97SEli Cohen { 116e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 117e126ba97SEli Cohen } 118e126ba97SEli Cohen 119e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 120e126ba97SEli Cohen { 121e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 122e126ba97SEli Cohen } 123e126ba97SEli Cohen 124c1395a2aSHaggai Eran /** 125c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 126c1395a2aSHaggai Eran * 127c1395a2aSHaggai Eran * @qp: QP to copy from. 128c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 129c1395a2aSHaggai Eran * otherwise. 130c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 131c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 132c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 133c1395a2aSHaggai Eran * element in the queue. 134c1395a2aSHaggai Eran * @buffer: destination buffer. 135c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 136c1395a2aSHaggai Eran * 137c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 138c1395a2aSHaggai Eran * 139c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 140c1395a2aSHaggai Eran */ 141c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14219098df2Smajd@mellanox.com void *buffer, u32 length, 14319098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 144c1395a2aSHaggai Eran { 145c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 146c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 147c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 148c1395a2aSHaggai Eran size_t offset; 149c1395a2aSHaggai Eran size_t wq_end; 15019098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 151c1395a2aSHaggai Eran u32 first_copy_length; 152c1395a2aSHaggai Eran int wqe_length; 153c1395a2aSHaggai Eran int ret; 154c1395a2aSHaggai Eran 155c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 156c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 157c1395a2aSHaggai Eran qp->ibqp.qp_type); 158c1395a2aSHaggai Eran return -EINVAL; 159c1395a2aSHaggai Eran } 160c1395a2aSHaggai Eran 161c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 162c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 163c1395a2aSHaggai Eran 164c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 165c1395a2aSHaggai Eran return -EINVAL; 166c1395a2aSHaggai Eran 167c1395a2aSHaggai Eran if (offset > umem->length || 168c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 169c1395a2aSHaggai Eran return -EINVAL; 170c1395a2aSHaggai Eran 171c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 172c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 173c1395a2aSHaggai Eran if (ret) 174c1395a2aSHaggai Eran return ret; 175c1395a2aSHaggai Eran 176c1395a2aSHaggai Eran if (send) { 177c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 178c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 179c1395a2aSHaggai Eran 180c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 181c1395a2aSHaggai Eran } else { 182c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 183c1395a2aSHaggai Eran } 184c1395a2aSHaggai Eran 185c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 186c1395a2aSHaggai Eran return first_copy_length; 187c1395a2aSHaggai Eran 188c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 189c1395a2aSHaggai Eran wqe_length - first_copy_length); 190c1395a2aSHaggai Eran if (ret) 191c1395a2aSHaggai Eran return ret; 192c1395a2aSHaggai Eran 193c1395a2aSHaggai Eran return wqe_length; 194c1395a2aSHaggai Eran } 195c1395a2aSHaggai Eran 196e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 197e126ba97SEli Cohen { 198e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 199e126ba97SEli Cohen struct ib_event event; 200e126ba97SEli Cohen 20119098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20219098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20319098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20419098df2Smajd@mellanox.com } 205e126ba97SEli Cohen 206e126ba97SEli Cohen if (ibqp->event_handler) { 207e126ba97SEli Cohen event.device = ibqp->device; 208e126ba97SEli Cohen event.element.qp = ibqp; 209e126ba97SEli Cohen switch (type) { 210e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 211e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 212e126ba97SEli Cohen break; 213e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 214e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 215e126ba97SEli Cohen break; 216e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 217e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 218e126ba97SEli Cohen break; 219e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 220e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 221e126ba97SEli Cohen break; 222e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 223e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 224e126ba97SEli Cohen break; 225e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 226e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 227e126ba97SEli Cohen break; 228e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 229e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 230e126ba97SEli Cohen break; 231e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 232e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 233e126ba97SEli Cohen break; 234e126ba97SEli Cohen default: 235e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 236e126ba97SEli Cohen return; 237e126ba97SEli Cohen } 238e126ba97SEli Cohen 239e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 240e126ba97SEli Cohen } 241e126ba97SEli Cohen } 242e126ba97SEli Cohen 243e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 244e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 245e126ba97SEli Cohen { 246e126ba97SEli Cohen int wqe_size; 247e126ba97SEli Cohen int wq_size; 248e126ba97SEli Cohen 249e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 250938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 251e126ba97SEli Cohen return -EINVAL; 252e126ba97SEli Cohen 253e126ba97SEli Cohen if (!has_rq) { 254e126ba97SEli Cohen qp->rq.max_gs = 0; 255e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 256e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2570540d814SNoa Osherovich cap->max_recv_wr = 0; 2580540d814SNoa Osherovich cap->max_recv_sge = 0; 259e126ba97SEli Cohen } else { 260e126ba97SEli Cohen if (ucmd) { 261e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 262e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 263e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 264e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 265e126ba97SEli Cohen } else { 266e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 267e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 268e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 269e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 270e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 271e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 272938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 273e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 274e126ba97SEli Cohen wqe_size, 275938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 276938fe83cSSaeed Mahameed max_wqe_sz_rq)); 277e126ba97SEli Cohen return -EINVAL; 278e126ba97SEli Cohen } 279e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 280e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 281e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 282e126ba97SEli Cohen } 283e126ba97SEli Cohen } 284e126ba97SEli Cohen 285e126ba97SEli Cohen return 0; 286e126ba97SEli Cohen } 287e126ba97SEli Cohen 288f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 289e126ba97SEli Cohen { 290618af384SAndi Shyti int size = 0; 291e126ba97SEli Cohen 292f0313965SErez Shitrit switch (attr->qp_type) { 293e126ba97SEli Cohen case IB_QPT_XRC_INI: 294b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 295e126ba97SEli Cohen /* fall through */ 296e126ba97SEli Cohen case IB_QPT_RC: 297e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 29875c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 29975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30075c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 30175c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 302e126ba97SEli Cohen break; 303e126ba97SEli Cohen 304b125a54bSEli Cohen case IB_QPT_XRC_TGT: 305b125a54bSEli Cohen return 0; 306b125a54bSEli Cohen 307e126ba97SEli Cohen case IB_QPT_UC: 308b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30975c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3109e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31175c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 312e126ba97SEli Cohen break; 313e126ba97SEli Cohen 314e126ba97SEli Cohen case IB_QPT_UD: 315f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 316f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 317f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 318f0313965SErez Shitrit /* fall through */ 319e126ba97SEli Cohen case IB_QPT_SMI: 320d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 321b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 322e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 323e126ba97SEli Cohen break; 324e126ba97SEli Cohen 325e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 326b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 327e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 328e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 329e126ba97SEli Cohen break; 330e126ba97SEli Cohen 331e126ba97SEli Cohen default: 332e126ba97SEli Cohen return -EINVAL; 333e126ba97SEli Cohen } 334e126ba97SEli Cohen 335e126ba97SEli Cohen return size; 336e126ba97SEli Cohen } 337e126ba97SEli Cohen 338e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 339e126ba97SEli Cohen { 340e126ba97SEli Cohen int inl_size = 0; 341e126ba97SEli Cohen int size; 342e126ba97SEli Cohen 343f0313965SErez Shitrit size = sq_overhead(attr); 344e126ba97SEli Cohen if (size < 0) 345e126ba97SEli Cohen return size; 346e126ba97SEli Cohen 347e126ba97SEli Cohen if (attr->cap.max_inline_data) { 348e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 349e126ba97SEli Cohen attr->cap.max_inline_data; 350e126ba97SEli Cohen } 351e126ba97SEli Cohen 352e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 353e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 354e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 355e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 356e1e66cc2SSagi Grimberg else 357e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 358e126ba97SEli Cohen } 359e126ba97SEli Cohen 360288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 361288c01b7SEli Cohen { 362288c01b7SEli Cohen int max_sge; 363288c01b7SEli Cohen 364288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 365288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 366288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 367288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 368288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 369288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 370288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 371288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 372288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 373288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 375288c01b7SEli Cohen else 376288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 377288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 378288c01b7SEli Cohen 379288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 380288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 381288c01b7SEli Cohen } 382288c01b7SEli Cohen 383e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 384e126ba97SEli Cohen struct mlx5_ib_qp *qp) 385e126ba97SEli Cohen { 386e126ba97SEli Cohen int wqe_size; 387e126ba97SEli Cohen int wq_size; 388e126ba97SEli Cohen 389e126ba97SEli Cohen if (!attr->cap.max_send_wr) 390e126ba97SEli Cohen return 0; 391e126ba97SEli Cohen 392e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 393e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 394e126ba97SEli Cohen if (wqe_size < 0) 395e126ba97SEli Cohen return wqe_size; 396e126ba97SEli Cohen 397938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 398b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 399938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 400e126ba97SEli Cohen return -EINVAL; 401e126ba97SEli Cohen } 402e126ba97SEli Cohen 403f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 404e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 405e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 406e126ba97SEli Cohen 407e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 408e1e66cc2SSagi Grimberg qp->signature_en = true; 409e1e66cc2SSagi Grimberg 410e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 411e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 412938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4131974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4141974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 415938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 416938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 417b125a54bSEli Cohen return -ENOMEM; 418b125a54bSEli Cohen } 419e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 420288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 421288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 422288c01b7SEli Cohen return -ENOMEM; 423288c01b7SEli Cohen 424288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 425b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 426b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 427e126ba97SEli Cohen 428e126ba97SEli Cohen return wq_size; 429e126ba97SEli Cohen } 430e126ba97SEli Cohen 431e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 432e126ba97SEli Cohen struct mlx5_ib_qp *qp, 43319098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4340fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4350fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 436e126ba97SEli Cohen { 437e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 438e126ba97SEli Cohen 439938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 440e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 441938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 442e126ba97SEli Cohen return -EINVAL; 443e126ba97SEli Cohen } 444e126ba97SEli Cohen 445e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 446e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 447e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 448e126ba97SEli Cohen return -EINVAL; 449e126ba97SEli Cohen } 450e126ba97SEli Cohen 451e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 452e126ba97SEli Cohen 453938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 454e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 455938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 456938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 457e126ba97SEli Cohen return -EINVAL; 458e126ba97SEli Cohen } 459e126ba97SEli Cohen 460c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 461c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4620fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4630fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4640fb2ed66Smajd@mellanox.com } else { 46519098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 466e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4670fb2ed66Smajd@mellanox.com } 468e126ba97SEli Cohen 469e126ba97SEli Cohen return 0; 470e126ba97SEli Cohen } 471e126ba97SEli Cohen 472e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 473e126ba97SEli Cohen { 474e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 475e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 476e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 477e126ba97SEli Cohen !attr->cap.max_recv_wr) 478e126ba97SEli Cohen return 0; 479e126ba97SEli Cohen 480e126ba97SEli Cohen return 1; 481e126ba97SEli Cohen } 482e126ba97SEli Cohen 4832f5ff264SEli Cohen static int first_med_bfreg(void) 484c1be5232SEli Cohen { 485c1be5232SEli Cohen return 1; 486c1be5232SEli Cohen } 487c1be5232SEli Cohen 4880b80c14fSEli Cohen enum { 4890b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4900b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4910b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4920b80c14fSEli Cohen * "odd/even" order 4930b80c14fSEli Cohen */ 4940b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4950b80c14fSEli Cohen }; 4960b80c14fSEli Cohen 497b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 498b037c29aSEli Cohen { 49931a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 500b037c29aSEli Cohen } 501b037c29aSEli Cohen 502b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 503b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 504c1be5232SEli Cohen { 505c1be5232SEli Cohen int n; 506c1be5232SEli Cohen 507b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 508b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 509c1be5232SEli Cohen 510c1be5232SEli Cohen return n >= 0 ? n : 0; 511c1be5232SEli Cohen } 512c1be5232SEli Cohen 513b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 514b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 515c1be5232SEli Cohen { 516c1be5232SEli Cohen int med; 517c1be5232SEli Cohen 518b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 519b037c29aSEli Cohen return ++med; 520c1be5232SEli Cohen } 521c1be5232SEli Cohen 522b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 523b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 524e126ba97SEli Cohen { 525e126ba97SEli Cohen int i; 526e126ba97SEli Cohen 527b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 528b037c29aSEli Cohen if (!bfregi->count[i]) { 5292f5ff264SEli Cohen bfregi->count[i]++; 530e126ba97SEli Cohen return i; 531e126ba97SEli Cohen } 532e126ba97SEli Cohen } 533e126ba97SEli Cohen 534e126ba97SEli Cohen return -ENOMEM; 535e126ba97SEli Cohen } 536e126ba97SEli Cohen 537b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 538b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 539e126ba97SEli Cohen { 5402f5ff264SEli Cohen int minidx = first_med_bfreg(); 541e126ba97SEli Cohen int i; 542e126ba97SEli Cohen 543b037c29aSEli Cohen for (i = first_med_bfreg(); i < first_hi_bfreg(dev, bfregi); i++) { 5442f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 545e126ba97SEli Cohen minidx = i; 5460b80c14fSEli Cohen if (!bfregi->count[minidx]) 5470b80c14fSEli Cohen break; 548e126ba97SEli Cohen } 549e126ba97SEli Cohen 5502f5ff264SEli Cohen bfregi->count[minidx]++; 551e126ba97SEli Cohen return minidx; 552e126ba97SEli Cohen } 553e126ba97SEli Cohen 554b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 555b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, 556e126ba97SEli Cohen enum mlx5_ib_latency_class lat) 557e126ba97SEli Cohen { 5582f5ff264SEli Cohen int bfregn = -EINVAL; 559e126ba97SEli Cohen 5602f5ff264SEli Cohen mutex_lock(&bfregi->lock); 561e126ba97SEli Cohen switch (lat) { 562e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_LOW: 5630b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5642f5ff264SEli Cohen bfregn = 0; 5652f5ff264SEli Cohen bfregi->count[bfregn]++; 566e126ba97SEli Cohen break; 567e126ba97SEli Cohen 568e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_MEDIUM: 5692f5ff264SEli Cohen if (bfregi->ver < 2) 5702f5ff264SEli Cohen bfregn = -ENOMEM; 57178c0f98cSEli Cohen else 572b037c29aSEli Cohen bfregn = alloc_med_class_bfreg(dev, bfregi); 573e126ba97SEli Cohen break; 574e126ba97SEli Cohen 575e126ba97SEli Cohen case MLX5_IB_LATENCY_CLASS_HIGH: 5762f5ff264SEli Cohen if (bfregi->ver < 2) 5772f5ff264SEli Cohen bfregn = -ENOMEM; 57878c0f98cSEli Cohen else 579b037c29aSEli Cohen bfregn = alloc_high_class_bfreg(dev, bfregi); 580e126ba97SEli Cohen break; 581e126ba97SEli Cohen } 5822f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 583e126ba97SEli Cohen 5842f5ff264SEli Cohen return bfregn; 585e126ba97SEli Cohen } 586e126ba97SEli Cohen 5874ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 588e126ba97SEli Cohen { 5892f5ff264SEli Cohen mutex_lock(&bfregi->lock); 590b037c29aSEli Cohen bfregi->count[bfregn]--; 5912f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 592e126ba97SEli Cohen } 593e126ba97SEli Cohen 594e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 595e126ba97SEli Cohen { 596e126ba97SEli Cohen switch (state) { 597e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 598e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 599e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 600e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 601e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 602e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 603e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 604e126ba97SEli Cohen default: return -1; 605e126ba97SEli Cohen } 606e126ba97SEli Cohen } 607e126ba97SEli Cohen 608e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 609e126ba97SEli Cohen { 610e126ba97SEli Cohen switch (type) { 611e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 612e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 613e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 614e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 615e126ba97SEli Cohen case IB_QPT_XRC_INI: 616e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 617e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 618d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 619c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 620e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 621e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6220fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 623e126ba97SEli Cohen case IB_QPT_MAX: 624e126ba97SEli Cohen default: return -EINVAL; 625e126ba97SEli Cohen } 626e126ba97SEli Cohen } 627e126ba97SEli Cohen 62889ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 62989ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63089ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 63189ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63289ea94a7SMaor Gottlieb 633b037c29aSEli Cohen static int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 6341ee47ab3SYishai Hadas struct mlx5_bfreg_info *bfregi, int bfregn, 6351ee47ab3SYishai Hadas bool dyn_bfreg) 636e126ba97SEli Cohen { 637b037c29aSEli Cohen int bfregs_per_sys_page; 638b037c29aSEli Cohen int index_of_sys_page; 639b037c29aSEli Cohen int offset; 640b037c29aSEli Cohen 641b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 642b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 643b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 644b037c29aSEli Cohen 6451ee47ab3SYishai Hadas if (dyn_bfreg) { 6461ee47ab3SYishai Hadas index_of_sys_page += bfregi->num_static_sys_pages; 6471ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6481ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6491ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6501ee47ab3SYishai Hadas return -EINVAL; 6511ee47ab3SYishai Hadas } 6521ee47ab3SYishai Hadas } 653b037c29aSEli Cohen 6541ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 655b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 656e126ba97SEli Cohen } 657e126ba97SEli Cohen 65819098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 65919098df2Smajd@mellanox.com struct ib_pd *pd, 66019098df2Smajd@mellanox.com unsigned long addr, size_t size, 66119098df2Smajd@mellanox.com struct ib_umem **umem, 66219098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66319098df2Smajd@mellanox.com u32 *offset) 66419098df2Smajd@mellanox.com { 66519098df2Smajd@mellanox.com int err; 66619098df2Smajd@mellanox.com 66719098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 66819098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 66919098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 67019098df2Smajd@mellanox.com return PTR_ERR(*umem); 67119098df2Smajd@mellanox.com } 67219098df2Smajd@mellanox.com 673762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67419098df2Smajd@mellanox.com 67519098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 67619098df2Smajd@mellanox.com if (err) { 67719098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 67819098df2Smajd@mellanox.com goto err_umem; 67919098df2Smajd@mellanox.com } 68019098df2Smajd@mellanox.com 68119098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68219098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68319098df2Smajd@mellanox.com 68419098df2Smajd@mellanox.com return 0; 68519098df2Smajd@mellanox.com 68619098df2Smajd@mellanox.com err_umem: 68719098df2Smajd@mellanox.com ib_umem_release(*umem); 68819098df2Smajd@mellanox.com *umem = NULL; 68919098df2Smajd@mellanox.com 69019098df2Smajd@mellanox.com return err; 69119098df2Smajd@mellanox.com } 69219098df2Smajd@mellanox.com 693fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 694fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 69579b20a6cSYishai Hadas { 69679b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 69779b20a6cSYishai Hadas 698fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 699fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 700fe248c3aSMaor Gottlieb 70179b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70279b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70379b20a6cSYishai Hadas if (rwq->umem) 70479b20a6cSYishai Hadas ib_umem_release(rwq->umem); 70579b20a6cSYishai Hadas } 70679b20a6cSYishai Hadas 70779b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 70879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 70979b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 71079b20a6cSYishai Hadas { 71179b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71279b20a6cSYishai Hadas int page_shift = 0; 71379b20a6cSYishai Hadas int npages; 71479b20a6cSYishai Hadas u32 offset = 0; 71579b20a6cSYishai Hadas int ncont = 0; 71679b20a6cSYishai Hadas int err; 71779b20a6cSYishai Hadas 71879b20a6cSYishai Hadas if (!ucmd->buf_addr) 71979b20a6cSYishai Hadas return -EINVAL; 72079b20a6cSYishai Hadas 72179b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72279b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72379b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72479b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 72579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 72679b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 72779b20a6cSYishai Hadas return err; 72879b20a6cSYishai Hadas } 72979b20a6cSYishai Hadas 730762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 73179b20a6cSYishai Hadas &ncont, NULL); 73279b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73379b20a6cSYishai Hadas &rwq->rq_page_offset); 73479b20a6cSYishai Hadas if (err) { 73579b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 73679b20a6cSYishai Hadas goto err_umem; 73779b20a6cSYishai Hadas } 73879b20a6cSYishai Hadas 73979b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 74079b20a6cSYishai Hadas rwq->page_shift = page_shift; 74179b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74279b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74379b20a6cSYishai Hadas 74479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 74579b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 74679b20a6cSYishai Hadas npages, page_shift, ncont, offset); 74779b20a6cSYishai Hadas 74879b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 74979b20a6cSYishai Hadas if (err) { 75079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 75179b20a6cSYishai Hadas goto err_umem; 75279b20a6cSYishai Hadas } 75379b20a6cSYishai Hadas 75479b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 75579b20a6cSYishai Hadas return 0; 75679b20a6cSYishai Hadas 75779b20a6cSYishai Hadas err_umem: 75879b20a6cSYishai Hadas ib_umem_release(rwq->umem); 75979b20a6cSYishai Hadas return err; 76079b20a6cSYishai Hadas } 76179b20a6cSYishai Hadas 762b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 763b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 764b037c29aSEli Cohen { 765b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 766b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 767b037c29aSEli Cohen } 768b037c29aSEli Cohen 769e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 770e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7710fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77209a7d9ecSSaeed Mahameed u32 **in, 77319098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 775e126ba97SEli Cohen { 776e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 777e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 77819098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7799e9c47d0SEli Cohen int page_shift = 0; 7801ee47ab3SYishai Hadas int uar_index = 0; 781e126ba97SEli Cohen int npages; 7829e9c47d0SEli Cohen u32 offset = 0; 7832f5ff264SEli Cohen int bfregn; 7849e9c47d0SEli Cohen int ncont = 0; 78509a7d9ecSSaeed Mahameed __be64 *pas; 78609a7d9ecSSaeed Mahameed void *qpc; 787e126ba97SEli Cohen int err; 788e126ba97SEli Cohen 789e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 790e126ba97SEli Cohen if (err) { 791e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 792e126ba97SEli Cohen return err; 793e126ba97SEli Cohen } 794e126ba97SEli Cohen 795e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 7961ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 7971ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 7981ee47ab3SYishai Hadas ucmd.bfreg_index, true); 7991ee47ab3SYishai Hadas if (uar_index < 0) 8001ee47ab3SYishai Hadas return uar_index; 8011ee47ab3SYishai Hadas 8021ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8031ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 804e126ba97SEli Cohen /* 805e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 806e126ba97SEli Cohen */ 807051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8082f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8091ee47ab3SYishai Hadas } 810051f2630SLeon Romanovsky else { 811b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_HIGH); 8122f5ff264SEli Cohen if (bfregn < 0) { 8132f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate low latency BFREG\n"); 814c1be5232SEli Cohen mlx5_ib_dbg(dev, "reverting to medium latency\n"); 815b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_MEDIUM); 8162f5ff264SEli Cohen if (bfregn < 0) { 8172f5ff264SEli Cohen mlx5_ib_dbg(dev, "failed to allocate medium latency BFREG\n"); 818e126ba97SEli Cohen mlx5_ib_dbg(dev, "reverting to high latency\n"); 819b037c29aSEli Cohen bfregn = alloc_bfreg(dev, &context->bfregi, MLX5_IB_LATENCY_CLASS_LOW); 8202f5ff264SEli Cohen if (bfregn < 0) { 8212f5ff264SEli Cohen mlx5_ib_warn(dev, "bfreg allocation failed\n"); 8222f5ff264SEli Cohen return bfregn; 823e126ba97SEli Cohen } 824e126ba97SEli Cohen } 825c1be5232SEli Cohen } 826051f2630SLeon Romanovsky } 827e126ba97SEli Cohen 8282f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8291ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8301ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8311ee47ab3SYishai Hadas false); 832e126ba97SEli Cohen 83348fea837SHaggai Eran qp->rq.offset = 0; 83448fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 83548fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 83648fea837SHaggai Eran 8370fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 838e126ba97SEli Cohen if (err) 8392f5ff264SEli Cohen goto err_bfreg; 840e126ba97SEli Cohen 84119098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 84219098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 84319098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 84419098df2Smajd@mellanox.com ubuffer->buf_size, 84519098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 84619098df2Smajd@mellanox.com &ncont, &offset); 84719098df2Smajd@mellanox.com if (err) 8482f5ff264SEli Cohen goto err_bfreg; 8499e9c47d0SEli Cohen } else { 85019098df2Smajd@mellanox.com ubuffer->umem = NULL; 8519e9c47d0SEli Cohen } 852e126ba97SEli Cohen 85309a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 85409a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8551b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 856e126ba97SEli Cohen if (!*in) { 857e126ba97SEli Cohen err = -ENOMEM; 858e126ba97SEli Cohen goto err_umem; 859e126ba97SEli Cohen } 860e126ba97SEli Cohen 86109a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 86209a7d9ecSSaeed Mahameed if (ubuffer->umem) 86309a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 86409a7d9ecSSaeed Mahameed 86509a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86609a7d9ecSSaeed Mahameed 86709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86909a7d9ecSSaeed Mahameed 87009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8711ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 872b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8731ee47ab3SYishai Hadas else 8741ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8752f5ff264SEli Cohen qp->bfregn = bfregn; 876e126ba97SEli Cohen 877e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 878e126ba97SEli Cohen if (err) { 879e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 880e126ba97SEli Cohen goto err_free; 881e126ba97SEli Cohen } 882e126ba97SEli Cohen 88341d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 884e126ba97SEli Cohen if (err) { 885e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 886e126ba97SEli Cohen goto err_unmap; 887e126ba97SEli Cohen } 888e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 889e126ba97SEli Cohen 890e126ba97SEli Cohen return 0; 891e126ba97SEli Cohen 892e126ba97SEli Cohen err_unmap: 893e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 894e126ba97SEli Cohen 895e126ba97SEli Cohen err_free: 896479163f4SAl Viro kvfree(*in); 897e126ba97SEli Cohen 898e126ba97SEli Cohen err_umem: 89919098df2Smajd@mellanox.com if (ubuffer->umem) 90019098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 901e126ba97SEli Cohen 9022f5ff264SEli Cohen err_bfreg: 9031ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9044ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 905e126ba97SEli Cohen return err; 906e126ba97SEli Cohen } 907e126ba97SEli Cohen 908b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 909b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 910e126ba97SEli Cohen { 911e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 912e126ba97SEli Cohen 913e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 914e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 91519098df2Smajd@mellanox.com if (base->ubuffer.umem) 91619098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9171ee47ab3SYishai Hadas 9181ee47ab3SYishai Hadas /* 9191ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9201ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9211ee47ab3SYishai Hadas */ 9221ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9234ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 924e126ba97SEli Cohen } 925e126ba97SEli Cohen 926e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 927e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 928e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92909a7d9ecSSaeed Mahameed u32 **in, int *inlen, 93019098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 931e126ba97SEli Cohen { 932e126ba97SEli Cohen int uar_index; 93309a7d9ecSSaeed Mahameed void *qpc; 934e126ba97SEli Cohen int err; 935e126ba97SEli Cohen 936f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 937f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 938b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93993d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 940b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9411a4c3a3dSEli Cohen return -EINVAL; 942e126ba97SEli Cohen 943e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9445fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9455fe9dec0SEli Cohen else 9465fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 947e126ba97SEli Cohen 948d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 949d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 950d8030b0dSEli Cohen */ 951d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9525fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 953e126ba97SEli Cohen 954e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 955e126ba97SEli Cohen if (err < 0) { 956e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9575fe9dec0SEli Cohen return err; 958e126ba97SEli Cohen } 959e126ba97SEli Cohen 960e126ba97SEli Cohen qp->rq.offset = 0; 961e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 96219098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 963e126ba97SEli Cohen 96419098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 965e126ba97SEli Cohen if (err) { 966e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9675fe9dec0SEli Cohen return err; 968e126ba97SEli Cohen } 969e126ba97SEli Cohen 970e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 97109a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 97209a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9731b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 974e126ba97SEli Cohen if (!*in) { 975e126ba97SEli Cohen err = -ENOMEM; 976e126ba97SEli Cohen goto err_buf; 977e126ba97SEli Cohen } 97809a7d9ecSSaeed Mahameed 97909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 98009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 98109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 98209a7d9ecSSaeed Mahameed 983e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 98409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 98509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 986e126ba97SEli Cohen 987b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 989b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 990b11a4f9cSHaggai Eran } 991b11a4f9cSHaggai Eran 99209a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 99309a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 994e126ba97SEli Cohen 9959603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 996e126ba97SEli Cohen if (err) { 997e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 998e126ba97SEli Cohen goto err_free; 999e126ba97SEli Cohen } 1000e126ba97SEli Cohen 1001b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1002b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1003b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1004b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1005b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1006b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1007b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1008b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1009b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1010b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1011e126ba97SEli Cohen 1012e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1013e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1014e126ba97SEli Cohen err = -ENOMEM; 1015e126ba97SEli Cohen goto err_wrid; 1016e126ba97SEli Cohen } 1017e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1018e126ba97SEli Cohen 1019e126ba97SEli Cohen return 0; 1020e126ba97SEli Cohen 1021e126ba97SEli Cohen err_wrid: 1022b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1023b5883008SLi Dongyang kvfree(qp->sq.w_list); 1024b5883008SLi Dongyang kvfree(qp->sq.wrid); 1025b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1026b5883008SLi Dongyang kvfree(qp->rq.wrid); 1027f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1028e126ba97SEli Cohen 1029e126ba97SEli Cohen err_free: 1030479163f4SAl Viro kvfree(*in); 1031e126ba97SEli Cohen 1032e126ba97SEli Cohen err_buf: 10339603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1034e126ba97SEli Cohen return err; 1035e126ba97SEli Cohen } 1036e126ba97SEli Cohen 1037e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1038e126ba97SEli Cohen { 1039b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1040b5883008SLi Dongyang kvfree(qp->sq.w_list); 1041b5883008SLi Dongyang kvfree(qp->sq.wrid); 1042b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1043b5883008SLi Dongyang kvfree(qp->rq.wrid); 1044f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10459603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1046e126ba97SEli Cohen } 1047e126ba97SEli Cohen 104809a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1049e126ba97SEli Cohen { 1050e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1051c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1052e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 105309a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1054e126ba97SEli Cohen else if (!qp->has_rq) 105509a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1056e126ba97SEli Cohen else 105709a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1058e126ba97SEli Cohen } 1059e126ba97SEli Cohen 1060e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1061e126ba97SEli Cohen { 1062e126ba97SEli Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC) 1063e126ba97SEli Cohen return 1; 1064e126ba97SEli Cohen 1065e126ba97SEli Cohen return 0; 1066e126ba97SEli Cohen } 1067e126ba97SEli Cohen 10680fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1069c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10700fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, u32 tdn) 10710fb2ed66Smajd@mellanox.com { 1072c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10730fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10740fb2ed66Smajd@mellanox.com 10750fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1076c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1077c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1078c2e53b2cSYishai Hadas 10790fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10800fb2ed66Smajd@mellanox.com } 10810fb2ed66Smajd@mellanox.com 10820fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10830fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 10840fb2ed66Smajd@mellanox.com { 10850fb2ed66Smajd@mellanox.com mlx5_core_destroy_tis(dev->mdev, sq->tisn); 10860fb2ed66Smajd@mellanox.com } 10870fb2ed66Smajd@mellanox.com 1088b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1089b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1090b96c9ddeSMark Bloch { 1091b96c9ddeSMark Bloch if (sq->flow_rule) 1092b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1093b96c9ddeSMark Bloch } 1094b96c9ddeSMark Bloch 10950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10960fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10970fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10980fb2ed66Smajd@mellanox.com { 10990fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 11000fb2ed66Smajd@mellanox.com __be64 *pas; 11010fb2ed66Smajd@mellanox.com void *in; 11020fb2ed66Smajd@mellanox.com void *sqc; 11030fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11040fb2ed66Smajd@mellanox.com void *wq; 11050fb2ed66Smajd@mellanox.com int inlen; 11060fb2ed66Smajd@mellanox.com int err; 11070fb2ed66Smajd@mellanox.com int page_shift = 0; 11080fb2ed66Smajd@mellanox.com int npages; 11090fb2ed66Smajd@mellanox.com int ncont = 0; 11100fb2ed66Smajd@mellanox.com u32 offset = 0; 11110fb2ed66Smajd@mellanox.com 11120fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11130fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11140fb2ed66Smajd@mellanox.com &ncont, &offset); 11150fb2ed66Smajd@mellanox.com if (err) 11160fb2ed66Smajd@mellanox.com return err; 11170fb2ed66Smajd@mellanox.com 11180fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11191b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11200fb2ed66Smajd@mellanox.com if (!in) { 11210fb2ed66Smajd@mellanox.com err = -ENOMEM; 11220fb2ed66Smajd@mellanox.com goto err_umem; 11230fb2ed66Smajd@mellanox.com } 11240fb2ed66Smajd@mellanox.com 11250fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11260fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1127795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1128795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11290fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11310fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11320fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11330fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113496dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113596dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 113696dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11370fb2ed66Smajd@mellanox.com 11380fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11420fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11450fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11460fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11470fb2ed66Smajd@mellanox.com 11480fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11490fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11500fb2ed66Smajd@mellanox.com 11510fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11520fb2ed66Smajd@mellanox.com 11530fb2ed66Smajd@mellanox.com kvfree(in); 11540fb2ed66Smajd@mellanox.com 11550fb2ed66Smajd@mellanox.com if (err) 11560fb2ed66Smajd@mellanox.com goto err_umem; 11570fb2ed66Smajd@mellanox.com 1158b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1159b96c9ddeSMark Bloch if (err) 1160b96c9ddeSMark Bloch goto err_flow; 1161b96c9ddeSMark Bloch 11620fb2ed66Smajd@mellanox.com return 0; 11630fb2ed66Smajd@mellanox.com 1164b96c9ddeSMark Bloch err_flow: 1165b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1166b96c9ddeSMark Bloch 11670fb2ed66Smajd@mellanox.com err_umem: 11680fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11690fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11700fb2ed66Smajd@mellanox.com 11710fb2ed66Smajd@mellanox.com return err; 11720fb2ed66Smajd@mellanox.com } 11730fb2ed66Smajd@mellanox.com 11740fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11750fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11760fb2ed66Smajd@mellanox.com { 1177b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11780fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11790fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11800fb2ed66Smajd@mellanox.com } 11810fb2ed66Smajd@mellanox.com 11822c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11830fb2ed66Smajd@mellanox.com { 11840fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11850fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11860fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11870fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11880fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11890fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11900fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11910fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11920fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11930fb2ed66Smajd@mellanox.com 11940fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11950fb2ed66Smajd@mellanox.com } 11960fb2ed66Smajd@mellanox.com 11970fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11982c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 11992c292dbbSBoris Pismenny size_t qpinlen) 12000fb2ed66Smajd@mellanox.com { 1201358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12020fb2ed66Smajd@mellanox.com __be64 *pas; 12030fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12040fb2ed66Smajd@mellanox.com void *in; 12050fb2ed66Smajd@mellanox.com void *rqc; 12060fb2ed66Smajd@mellanox.com void *wq; 12070fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12082c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12092c292dbbSBoris Pismenny size_t inlen; 12100fb2ed66Smajd@mellanox.com int err; 12112c292dbbSBoris Pismenny 12122c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12132c292dbbSBoris Pismenny return -EINVAL; 12140fb2ed66Smajd@mellanox.com 12150fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12170fb2ed66Smajd@mellanox.com if (!in) 12180fb2ed66Smajd@mellanox.com return -ENOMEM; 12190fb2ed66Smajd@mellanox.com 12200fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1221e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12220fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12230fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12240fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12250fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12260fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12270fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12280fb2ed66Smajd@mellanox.com 1229358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1230358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1231358e42eaSMajd Dibbiny 12320fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12330fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1234b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1235b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12360fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12380fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12420fb2ed66Smajd@mellanox.com 12430fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12440fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12450fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12460fb2ed66Smajd@mellanox.com 12470fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12480fb2ed66Smajd@mellanox.com 12490fb2ed66Smajd@mellanox.com kvfree(in); 12500fb2ed66Smajd@mellanox.com 12510fb2ed66Smajd@mellanox.com return err; 12520fb2ed66Smajd@mellanox.com } 12530fb2ed66Smajd@mellanox.com 12540fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12550fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12560fb2ed66Smajd@mellanox.com { 12570fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12580fb2ed66Smajd@mellanox.com } 12590fb2ed66Smajd@mellanox.com 1260f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1261f95ef6cbSMaor Gottlieb { 1262f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1263f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1264f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1265f95ef6cbSMaor Gottlieb } 1266f95ef6cbSMaor Gottlieb 12670fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1268f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1269f95ef6cbSMaor Gottlieb bool tunnel_offload_en) 12700fb2ed66Smajd@mellanox.com { 12710fb2ed66Smajd@mellanox.com u32 *in; 12720fb2ed66Smajd@mellanox.com void *tirc; 12730fb2ed66Smajd@mellanox.com int inlen; 12740fb2ed66Smajd@mellanox.com int err; 12750fb2ed66Smajd@mellanox.com 12760fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12771b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12780fb2ed66Smajd@mellanox.com if (!in) 12790fb2ed66Smajd@mellanox.com return -ENOMEM; 12800fb2ed66Smajd@mellanox.com 12810fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12820fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12830fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12840fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1285f95ef6cbSMaor Gottlieb if (tunnel_offload_en) 1286f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 12870fb2ed66Smajd@mellanox.com 1288ec9c2fb8SMark Bloch if (dev->rep) 1289ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1290ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1291ec9c2fb8SMark Bloch 12920fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 12930fb2ed66Smajd@mellanox.com 12940fb2ed66Smajd@mellanox.com kvfree(in); 12950fb2ed66Smajd@mellanox.com 12960fb2ed66Smajd@mellanox.com return err; 12970fb2ed66Smajd@mellanox.com } 12980fb2ed66Smajd@mellanox.com 12990fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13000fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13010fb2ed66Smajd@mellanox.com { 13020fb2ed66Smajd@mellanox.com mlx5_core_destroy_tir(dev->mdev, rq->tirn); 13030fb2ed66Smajd@mellanox.com } 13040fb2ed66Smajd@mellanox.com 13050fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13062c292dbbSBoris Pismenny u32 *in, size_t inlen, 13070fb2ed66Smajd@mellanox.com struct ib_pd *pd) 13080fb2ed66Smajd@mellanox.com { 13090fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13100fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13110fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13120fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13130fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13140fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13150fb2ed66Smajd@mellanox.com int err; 13160fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13170fb2ed66Smajd@mellanox.com 13180fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 1319c2e53b2cSYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn); 13200fb2ed66Smajd@mellanox.com if (err) 13210fb2ed66Smajd@mellanox.com return err; 13220fb2ed66Smajd@mellanox.com 13230fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13240fb2ed66Smajd@mellanox.com if (err) 13250fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13281d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13290fb2ed66Smajd@mellanox.com } 13300fb2ed66Smajd@mellanox.com 13310fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1332358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1333358e42eaSMajd Dibbiny 1334e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1335e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1336b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1337b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 13382c292dbbSBoris Pismenny err = create_raw_packet_qp_rq(dev, rq, in, inlen); 13390fb2ed66Smajd@mellanox.com if (err) 13400fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13410fb2ed66Smajd@mellanox.com 13420fb2ed66Smajd@mellanox.com 1343f95ef6cbSMaor Gottlieb err = create_raw_packet_qp_tir(dev, rq, tdn, 1344f95ef6cbSMaor Gottlieb qp->tunnel_offload_en); 13450fb2ed66Smajd@mellanox.com if (err) 13460fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13470fb2ed66Smajd@mellanox.com } 13480fb2ed66Smajd@mellanox.com 13490fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13500fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13510fb2ed66Smajd@mellanox.com 13520fb2ed66Smajd@mellanox.com return 0; 13530fb2ed66Smajd@mellanox.com 13540fb2ed66Smajd@mellanox.com err_destroy_rq: 13550fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13560fb2ed66Smajd@mellanox.com err_destroy_sq: 13570fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 13580fb2ed66Smajd@mellanox.com return err; 13590fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13600fb2ed66Smajd@mellanox.com err_destroy_tis: 13610fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13620fb2ed66Smajd@mellanox.com 13630fb2ed66Smajd@mellanox.com return err; 13640fb2ed66Smajd@mellanox.com } 13650fb2ed66Smajd@mellanox.com 13660fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 13670fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 13680fb2ed66Smajd@mellanox.com { 13690fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13700fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13710fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13720fb2ed66Smajd@mellanox.com 13730fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 13740fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tir(dev, rq); 13750fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13760fb2ed66Smajd@mellanox.com } 13770fb2ed66Smajd@mellanox.com 13780fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13790fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 13800fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_tis(dev, sq); 13810fb2ed66Smajd@mellanox.com } 13820fb2ed66Smajd@mellanox.com } 13830fb2ed66Smajd@mellanox.com 13840fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 13850fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 13860fb2ed66Smajd@mellanox.com { 13870fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13880fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13890fb2ed66Smajd@mellanox.com 13900fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 13910fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 13920fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 13930fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 13940fb2ed66Smajd@mellanox.com } 13950fb2ed66Smajd@mellanox.com 139628d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 139728d61370SYishai Hadas { 139828d61370SYishai Hadas mlx5_core_destroy_tir(dev->mdev, qp->rss_qp.tirn); 139928d61370SYishai Hadas } 140028d61370SYishai Hadas 140128d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 140228d61370SYishai Hadas struct ib_pd *pd, 140328d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 140428d61370SYishai Hadas struct ib_udata *udata) 140528d61370SYishai Hadas { 140628d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 140728d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 140828d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 140928d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 141028d61370SYishai Hadas int inlen; 141128d61370SYishai Hadas int err; 141228d61370SYishai Hadas u32 *in; 141328d61370SYishai Hadas void *tirc; 141428d61370SYishai Hadas void *hfso; 141528d61370SYishai Hadas u32 selected_fields = 0; 14162d93fc85SMatan Barak u32 outer_l4; 141728d61370SYishai Hadas size_t min_resp_len; 141828d61370SYishai Hadas u32 tdn = mucontext->tdn; 141928d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 142028d61370SYishai Hadas size_t required_cmd_sz; 142128d61370SYishai Hadas 142228d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 142328d61370SYishai Hadas return -EOPNOTSUPP; 142428d61370SYishai Hadas 142528d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 142628d61370SYishai Hadas return -EINVAL; 142728d61370SYishai Hadas 14282f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 142928d61370SYishai Hadas if (udata->outlen < min_resp_len) 143028d61370SYishai Hadas return -EINVAL; 143128d61370SYishai Hadas 1432f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 143328d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 143428d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 143528d61370SYishai Hadas return -EINVAL; 143628d61370SYishai Hadas } 143728d61370SYishai Hadas 143828d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 143928d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 144028d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 144128d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 144228d61370SYishai Hadas return -EOPNOTSUPP; 144328d61370SYishai Hadas } 144428d61370SYishai Hadas 144528d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 144628d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 144728d61370SYishai Hadas return -EFAULT; 144828d61370SYishai Hadas } 144928d61370SYishai Hadas 145028d61370SYishai Hadas if (ucmd.comp_mask) { 145128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 145228d61370SYishai Hadas return -EOPNOTSUPP; 145328d61370SYishai Hadas } 145428d61370SYishai Hadas 1455f95ef6cbSMaor Gottlieb if (ucmd.flags & ~MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1456f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1457f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1458f95ef6cbSMaor Gottlieb } 1459f95ef6cbSMaor Gottlieb 1460f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1461f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1462f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 146328d61370SYishai Hadas return -EOPNOTSUPP; 146428d61370SYishai Hadas } 146528d61370SYishai Hadas 1466309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1467309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1468309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1469309fa347SMaor Gottlieb return -EOPNOTSUPP; 1470309fa347SMaor Gottlieb } 1471309fa347SMaor Gottlieb 147241d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 147328d61370SYishai Hadas if (err) { 147428d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 147528d61370SYishai Hadas return -EINVAL; 147628d61370SYishai Hadas } 147728d61370SYishai Hadas 147828d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14791b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 148028d61370SYishai Hadas if (!in) 148128d61370SYishai Hadas return -ENOMEM; 148228d61370SYishai Hadas 148328d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 148428d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 148528d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 148628d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 148728d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 148828d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 148928d61370SYishai Hadas 149028d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1491f95ef6cbSMaor Gottlieb 1492f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1493f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1494f95ef6cbSMaor Gottlieb 1495309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1496309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1497309fa347SMaor Gottlieb else 1498309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1499309fa347SMaor Gottlieb 150028d61370SYishai Hadas switch (ucmd.rx_hash_function) { 150128d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 150228d61370SYishai Hadas { 150328d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 150428d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 150528d61370SYishai Hadas 150628d61370SYishai Hadas if (len != ucmd.rx_key_len) { 150728d61370SYishai Hadas err = -EINVAL; 150828d61370SYishai Hadas goto err; 150928d61370SYishai Hadas } 151028d61370SYishai Hadas 151128d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 151228d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 151328d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 151428d61370SYishai Hadas break; 151528d61370SYishai Hadas } 151628d61370SYishai Hadas default: 151728d61370SYishai Hadas err = -EOPNOTSUPP; 151828d61370SYishai Hadas goto err; 151928d61370SYishai Hadas } 152028d61370SYishai Hadas 152128d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 152228d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 152328d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 152428d61370SYishai Hadas goto create_tir; 152528d61370SYishai Hadas err = -EINVAL; 152628d61370SYishai Hadas goto err; 152728d61370SYishai Hadas } 152828d61370SYishai Hadas 152928d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 153028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 153128d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 153228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 153328d61370SYishai Hadas err = -EINVAL; 153428d61370SYishai Hadas goto err; 153528d61370SYishai Hadas } 153628d61370SYishai Hadas 153728d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 153828d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 153928d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 154028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 154128d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 154228d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 154328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 154428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 154528d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 154628d61370SYishai Hadas 15472d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 15482d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 154928d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 15502d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 15512d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 15522d93fc85SMatan Barak 15532d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 15542d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 155528d61370SYishai Hadas err = -EINVAL; 155628d61370SYishai Hadas goto err; 155728d61370SYishai Hadas } 155828d61370SYishai Hadas 155928d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 156028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 156128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 156228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 156328d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 156428d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 156528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 156628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 156728d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 156828d61370SYishai Hadas 156928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 157028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 157128d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 157228d61370SYishai Hadas 157328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 157428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 157528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 157628d61370SYishai Hadas 157728d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 157828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 157928d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 158028d61370SYishai Hadas 158128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 158228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 158328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 158428d61370SYishai Hadas 15852d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 15862d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 15872d93fc85SMatan Barak 158828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 158928d61370SYishai Hadas 159028d61370SYishai Hadas create_tir: 1591ec9c2fb8SMark Bloch if (dev->rep) 1592ec9c2fb8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, 1593ec9c2fb8SMark Bloch MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); 1594ec9c2fb8SMark Bloch 159528d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 159628d61370SYishai Hadas 159728d61370SYishai Hadas if (err) 159828d61370SYishai Hadas goto err; 159928d61370SYishai Hadas 160028d61370SYishai Hadas kvfree(in); 160128d61370SYishai Hadas /* qpn is reserved for that QP */ 160228d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1603d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 160428d61370SYishai Hadas return 0; 160528d61370SYishai Hadas 160628d61370SYishai Hadas err: 160728d61370SYishai Hadas kvfree(in); 160828d61370SYishai Hadas return err; 160928d61370SYishai Hadas } 161028d61370SYishai Hadas 1611e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1612e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1613e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1614e126ba97SEli Cohen { 1615e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 161609a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1617938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 1618e126ba97SEli Cohen struct mlx5_ib_create_qp_resp resp; 161989ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 162089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 162189ea94a7SMaor Gottlieb unsigned long flags; 1622cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 162309a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 162409a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1625e7b169f3SNoa Osherovich int mlx5_st; 1626cfb5e088SHaggai Abramovsky void *qpc; 162709a7d9ecSSaeed Mahameed u32 *in; 162809a7d9ecSSaeed Mahameed int err; 1629e126ba97SEli Cohen 1630e126ba97SEli Cohen mutex_init(&qp->mutex); 1631e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1632e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1633e126ba97SEli Cohen 1634e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1635e7b169f3SNoa Osherovich if (mlx5_st < 0) 1636e7b169f3SNoa Osherovich return -EINVAL; 1637e7b169f3SNoa Osherovich 163828d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 163928d61370SYishai Hadas if (!udata) 164028d61370SYishai Hadas return -ENOSYS; 164128d61370SYishai Hadas 164228d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 164328d61370SYishai Hadas return err; 164428d61370SYishai Hadas } 164528d61370SYishai Hadas 1646f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1647938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1648f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1649f360d88aSEli Cohen return -EINVAL; 1650f360d88aSEli Cohen } else { 1651f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1652f360d88aSEli Cohen } 1653f360d88aSEli Cohen } 1654f360d88aSEli Cohen 1655051f2630SLeon Romanovsky if (init_attr->create_flags & 1656051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1657051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1658051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1659051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1660051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1661051f2630SLeon Romanovsky return -EINVAL; 1662051f2630SLeon Romanovsky } 1663051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1664051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1665051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1666051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1667051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1668051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1669051f2630SLeon Romanovsky } 1670f0313965SErez Shitrit 1671f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1672f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1673f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1674f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1675f0313965SErez Shitrit return -EOPNOTSUPP; 1676f0313965SErez Shitrit } 1677f0313965SErez Shitrit 1678358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1679358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1680358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1681358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1682358e42eaSMajd Dibbiny } 1683358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1684358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1685358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1686358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1687358e42eaSMajd Dibbiny } 1688358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1689358e42eaSMajd Dibbiny } 1690358e42eaSMajd Dibbiny 1691e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1692e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1693e126ba97SEli Cohen 1694e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1695e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1696e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1697e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1698e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1699e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1700e4cc4fa7SNoa Osherovich } 1701e4cc4fa7SNoa Osherovich 1702e126ba97SEli Cohen if (pd && pd->uobject) { 1703e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1704e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1705e126ba97SEli Cohen return -EFAULT; 1706e126ba97SEli Cohen } 1707e126ba97SEli Cohen 1708cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1709cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1710cfb5e088SHaggai Abramovsky if (err) 1711cfb5e088SHaggai Abramovsky return err; 1712cfb5e088SHaggai Abramovsky 1713e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 1714e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1715f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1716f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1717f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1718f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1719f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1720f95ef6cbSMaor Gottlieb } 1721f95ef6cbSMaor Gottlieb qp->tunnel_offload_en = true; 1722f95ef6cbSMaor Gottlieb } 1723c2e53b2cSYishai Hadas 1724c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1725c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1726c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1727c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1728c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1729c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1730c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1731c2e53b2cSYishai Hadas } 1732c2e53b2cSYishai Hadas 1733c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1734c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1735c2e53b2cSYishai Hadas } 1736e126ba97SEli Cohen } else { 1737e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1738e126ba97SEli Cohen } 1739e126ba97SEli Cohen 1740c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1741c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1742c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1743c2e53b2cSYishai Hadas &qp->trans_qp.base; 1744c2e53b2cSYishai Hadas 1745e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1746e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1747e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1748e126ba97SEli Cohen if (err) { 1749e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1750e126ba97SEli Cohen return err; 1751e126ba97SEli Cohen } 1752e126ba97SEli Cohen 1753e126ba97SEli Cohen if (pd) { 1754e126ba97SEli Cohen if (pd->uobject) { 1755938fe83cSSaeed Mahameed __u32 max_wqes = 1756938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1757e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1758e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1759e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1760e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1761e126ba97SEli Cohen return -EINVAL; 1762e126ba97SEli Cohen } 1763938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1764e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1765938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1766e126ba97SEli Cohen return -EINVAL; 1767e126ba97SEli Cohen } 1768b11a4f9cSHaggai Eran if (init_attr->create_flags & 1769b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1770b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1771b11a4f9cSHaggai Eran return -EINVAL; 1772b11a4f9cSHaggai Eran } 17730fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 17740fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1775e126ba97SEli Cohen if (err) 1776e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1777e126ba97SEli Cohen } else { 177819098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 177919098df2Smajd@mellanox.com base); 1780e126ba97SEli Cohen if (err) 1781e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1782e126ba97SEli Cohen } 1783e126ba97SEli Cohen 1784e126ba97SEli Cohen if (err) 1785e126ba97SEli Cohen return err; 1786e126ba97SEli Cohen } else { 17871b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1788e126ba97SEli Cohen if (!in) 1789e126ba97SEli Cohen return -ENOMEM; 1790e126ba97SEli Cohen 1791e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1792e126ba97SEli Cohen } 1793e126ba97SEli Cohen 1794e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1795e126ba97SEli Cohen qp->port = init_attr->port_num; 1796e126ba97SEli Cohen 179709a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 179809a7d9ecSSaeed Mahameed 1799e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 180009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 1801e126ba97SEli Cohen 1802e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 180309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 1804e126ba97SEli Cohen else 180509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 180609a7d9ecSSaeed Mahameed 1807e126ba97SEli Cohen 1808e126ba97SEli Cohen if (qp->wq_sig) 180909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 1810e126ba97SEli Cohen 1811f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 181209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 1813f360d88aSEli Cohen 1814051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 181509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 1816051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 181709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 1818051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 181909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 1820051f2630SLeon Romanovsky 1821e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 1822e126ba97SEli Cohen int rcqe_sz; 1823e126ba97SEli Cohen int scqe_sz; 1824e126ba97SEli Cohen 1825e126ba97SEli Cohen rcqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->recv_cq); 1826e126ba97SEli Cohen scqe_sz = mlx5_ib_get_cqe_size(dev, init_attr->send_cq); 1827e126ba97SEli Cohen 1828e126ba97SEli Cohen if (rcqe_sz == 128) 182909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 1830e126ba97SEli Cohen else 183109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 1832e126ba97SEli Cohen 1833e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) { 1834e126ba97SEli Cohen if (scqe_sz == 128) 183509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 1836e126ba97SEli Cohen else 183709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 1838e126ba97SEli Cohen } 1839e126ba97SEli Cohen } 1840e126ba97SEli Cohen 1841e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 184209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 184309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 1844e126ba97SEli Cohen } 1845e126ba97SEli Cohen 184609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 1847e126ba97SEli Cohen 18483fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 184909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 18503fd3307eSArtemy Kovalyov } else { 185109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 18523fd3307eSArtemy Kovalyov if (init_attr->srq && 18533fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 18543fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 18553fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 18563fd3307eSArtemy Kovalyov } 1857e126ba97SEli Cohen 1858e126ba97SEli Cohen /* Set default resources */ 1859e126ba97SEli Cohen switch (init_attr->qp_type) { 1860e126ba97SEli Cohen case IB_QPT_XRC_TGT: 186109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 186209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 186309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 186409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 1865e126ba97SEli Cohen break; 1866e126ba97SEli Cohen case IB_QPT_XRC_INI: 186709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 186809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 186909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 1870e126ba97SEli Cohen break; 1871e126ba97SEli Cohen default: 1872e126ba97SEli Cohen if (init_attr->srq) { 187309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 187409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 1875e126ba97SEli Cohen } else { 187609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 187709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 1878e126ba97SEli Cohen } 1879e126ba97SEli Cohen } 1880e126ba97SEli Cohen 1881e126ba97SEli Cohen if (init_attr->send_cq) 188209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 1883e126ba97SEli Cohen 1884e126ba97SEli Cohen if (init_attr->recv_cq) 188509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 1886e126ba97SEli Cohen 188709a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 1888e126ba97SEli Cohen 1889cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 189009a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 1891cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 189209a7d9ecSSaeed Mahameed 1893f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 1894f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1895f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 1896f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 1897f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 1898f0313965SErez Shitrit } 1899cfb5e088SHaggai Abramovsky 1900b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 1901b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 1902b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 1903b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 1904b1383aa6SNoa Osherovich goto err; 1905b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1906b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 1907b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 1908b1383aa6SNoa Osherovich } else { 1909b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 1910b1383aa6SNoa Osherovich } 1911b1383aa6SNoa Osherovich } 1912b1383aa6SNoa Osherovich 19132c292dbbSBoris Pismenny if (inlen < 0) { 19142c292dbbSBoris Pismenny err = -EINVAL; 19152c292dbbSBoris Pismenny goto err; 19162c292dbbSBoris Pismenny } 19172c292dbbSBoris Pismenny 1918c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 1919c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 19200fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 19210fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 19222c292dbbSBoris Pismenny err = create_raw_packet_qp(dev, qp, in, inlen, pd); 19230fb2ed66Smajd@mellanox.com } else { 192419098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 19250fb2ed66Smajd@mellanox.com } 19260fb2ed66Smajd@mellanox.com 1927e126ba97SEli Cohen if (err) { 1928e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 1929e126ba97SEli Cohen goto err_create; 1930e126ba97SEli Cohen } 1931e126ba97SEli Cohen 1932479163f4SAl Viro kvfree(in); 1933e126ba97SEli Cohen 193419098df2Smajd@mellanox.com base->container_mibqp = qp; 193519098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 1936e126ba97SEli Cohen 193789ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 193889ea94a7SMaor Gottlieb &send_cq, &recv_cq); 193989ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 194089ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 194189ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 194289ea94a7SMaor Gottlieb * flow 194389ea94a7SMaor Gottlieb */ 194489ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 194589ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 194689ea94a7SMaor Gottlieb */ 194789ea94a7SMaor Gottlieb if (send_cq) 194889ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 194989ea94a7SMaor Gottlieb if (recv_cq) 195089ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 195189ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 195289ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 195389ea94a7SMaor Gottlieb 1954e126ba97SEli Cohen return 0; 1955e126ba97SEli Cohen 1956e126ba97SEli Cohen err_create: 1957e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 1958b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 1959e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 1960e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 1961e126ba97SEli Cohen 1962b1383aa6SNoa Osherovich err: 1963479163f4SAl Viro kvfree(in); 1964e126ba97SEli Cohen return err; 1965e126ba97SEli Cohen } 1966e126ba97SEli Cohen 1967e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1968e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 1969e126ba97SEli Cohen { 1970e126ba97SEli Cohen if (send_cq) { 1971e126ba97SEli Cohen if (recv_cq) { 1972e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 197389ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1974e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 1975e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1976e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 197789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 1978e126ba97SEli Cohen __acquire(&recv_cq->lock); 1979e126ba97SEli Cohen } else { 198089ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 1981e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 1982e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 1983e126ba97SEli Cohen } 1984e126ba97SEli Cohen } else { 198589ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 19866a4f139aSEli Cohen __acquire(&recv_cq->lock); 1987e126ba97SEli Cohen } 1988e126ba97SEli Cohen } else if (recv_cq) { 198989ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 19906a4f139aSEli Cohen __acquire(&send_cq->lock); 19916a4f139aSEli Cohen } else { 19926a4f139aSEli Cohen __acquire(&send_cq->lock); 19936a4f139aSEli Cohen __acquire(&recv_cq->lock); 1994e126ba97SEli Cohen } 1995e126ba97SEli Cohen } 1996e126ba97SEli Cohen 1997e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 1998e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 1999e126ba97SEli Cohen { 2000e126ba97SEli Cohen if (send_cq) { 2001e126ba97SEli Cohen if (recv_cq) { 2002e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2003e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 200489ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2005e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2006e126ba97SEli Cohen __release(&recv_cq->lock); 200789ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2008e126ba97SEli Cohen } else { 2009e126ba97SEli Cohen spin_unlock(&send_cq->lock); 201089ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2011e126ba97SEli Cohen } 2012e126ba97SEli Cohen } else { 20136a4f139aSEli Cohen __release(&recv_cq->lock); 201489ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2015e126ba97SEli Cohen } 2016e126ba97SEli Cohen } else if (recv_cq) { 20176a4f139aSEli Cohen __release(&send_cq->lock); 201889ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 20196a4f139aSEli Cohen } else { 20206a4f139aSEli Cohen __release(&recv_cq->lock); 20216a4f139aSEli Cohen __release(&send_cq->lock); 2022e126ba97SEli Cohen } 2023e126ba97SEli Cohen } 2024e126ba97SEli Cohen 2025e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2026e126ba97SEli Cohen { 2027e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2028e126ba97SEli Cohen } 2029e126ba97SEli Cohen 203089ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 203189ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2032e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2033e126ba97SEli Cohen { 203489ea94a7SMaor Gottlieb switch (qp_type) { 2035e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2036e126ba97SEli Cohen *send_cq = NULL; 2037e126ba97SEli Cohen *recv_cq = NULL; 2038e126ba97SEli Cohen break; 2039e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2040e126ba97SEli Cohen case IB_QPT_XRC_INI: 204189ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2042e126ba97SEli Cohen *recv_cq = NULL; 2043e126ba97SEli Cohen break; 2044e126ba97SEli Cohen 2045e126ba97SEli Cohen case IB_QPT_SMI: 2046d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2047e126ba97SEli Cohen case IB_QPT_RC: 2048e126ba97SEli Cohen case IB_QPT_UC: 2049e126ba97SEli Cohen case IB_QPT_UD: 2050e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2051e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 20520fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 205389ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 205489ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2055e126ba97SEli Cohen break; 2056e126ba97SEli Cohen 2057e126ba97SEli Cohen case IB_QPT_MAX: 2058e126ba97SEli Cohen default: 2059e126ba97SEli Cohen *send_cq = NULL; 2060e126ba97SEli Cohen *recv_cq = NULL; 2061e126ba97SEli Cohen break; 2062e126ba97SEli Cohen } 2063e126ba97SEli Cohen } 2064e126ba97SEli Cohen 2065ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 206613eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 206713eab21fSAviv Heller u8 lag_tx_affinity); 2068ad5f8e96Smajd@mellanox.com 2069e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2070e126ba97SEli Cohen { 2071e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2072c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 207389ea94a7SMaor Gottlieb unsigned long flags; 2074e126ba97SEli Cohen int err; 2075e126ba97SEli Cohen 207628d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 207728d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 207828d61370SYishai Hadas return; 207928d61370SYishai Hadas } 208028d61370SYishai Hadas 2081c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2082c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 20830fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 20840fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 20850fb2ed66Smajd@mellanox.com 20866aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2087c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2088c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2089ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 20901a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 20911a412fb1SSaeed Mahameed NULL, &base->mqp); 2092ad5f8e96Smajd@mellanox.com } else { 20930680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 20940680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 20950680efa2SAlex Vesker }; 20960680efa2SAlex Vesker 209713eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2098ad5f8e96Smajd@mellanox.com } 2099ad5f8e96Smajd@mellanox.com if (err) 2100427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 210119098df2Smajd@mellanox.com base->mqp.qpn); 21026aec21f6SHaggai Eran } 2103e126ba97SEli Cohen 210489ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 210589ea94a7SMaor Gottlieb &send_cq, &recv_cq); 210689ea94a7SMaor Gottlieb 210789ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 210889ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 210989ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 211089ea94a7SMaor Gottlieb list_del(&qp->qps_list); 211189ea94a7SMaor Gottlieb if (send_cq) 211289ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 211389ea94a7SMaor Gottlieb 211489ea94a7SMaor Gottlieb if (recv_cq) 211589ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2116e126ba97SEli Cohen 2117e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 211819098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2119e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2120e126ba97SEli Cohen if (send_cq != recv_cq) 212119098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 212219098df2Smajd@mellanox.com NULL); 2123e126ba97SEli Cohen } 212489ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 212589ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2126e126ba97SEli Cohen 2127c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2128c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21290fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 21300fb2ed66Smajd@mellanox.com } else { 213119098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2132e126ba97SEli Cohen if (err) 21330fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 21340fb2ed66Smajd@mellanox.com base->mqp.qpn); 21350fb2ed66Smajd@mellanox.com } 2136e126ba97SEli Cohen 2137e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2138e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2139e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2140b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2141e126ba97SEli Cohen } 2142e126ba97SEli Cohen 2143e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2144e126ba97SEli Cohen { 2145e126ba97SEli Cohen switch (type) { 2146e126ba97SEli Cohen case IB_QPT_SMI: 2147e126ba97SEli Cohen return "IB_QPT_SMI"; 2148e126ba97SEli Cohen case IB_QPT_GSI: 2149e126ba97SEli Cohen return "IB_QPT_GSI"; 2150e126ba97SEli Cohen case IB_QPT_RC: 2151e126ba97SEli Cohen return "IB_QPT_RC"; 2152e126ba97SEli Cohen case IB_QPT_UC: 2153e126ba97SEli Cohen return "IB_QPT_UC"; 2154e126ba97SEli Cohen case IB_QPT_UD: 2155e126ba97SEli Cohen return "IB_QPT_UD"; 2156e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2157e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2158e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2159e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2160e126ba97SEli Cohen case IB_QPT_XRC_INI: 2161e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2162e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2163e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2164e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2165e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2166e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2167e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2168b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2169b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2170e126ba97SEli Cohen case IB_QPT_MAX: 2171e126ba97SEli Cohen default: 2172e126ba97SEli Cohen return "Invalid QP type"; 2173e126ba97SEli Cohen } 2174e126ba97SEli Cohen } 2175e126ba97SEli Cohen 2176b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2177b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2178b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2179b4aaa1f0SMoni Shoua { 2180b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2181b4aaa1f0SMoni Shoua int err = 0; 2182b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2183b4aaa1f0SMoni Shoua void *dctc; 2184b4aaa1f0SMoni Shoua 2185b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2186b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2187b4aaa1f0SMoni Shoua 2188b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2189b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2190b4aaa1f0SMoni Shoua if (err) 2191b4aaa1f0SMoni Shoua return ERR_PTR(err); 2192b4aaa1f0SMoni Shoua 2193b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2194b4aaa1f0SMoni Shoua if (!qp) 2195b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2196b4aaa1f0SMoni Shoua 2197b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2198b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2199b4aaa1f0SMoni Shoua err = -ENOMEM; 2200b4aaa1f0SMoni Shoua goto err_free; 2201b4aaa1f0SMoni Shoua } 2202b4aaa1f0SMoni Shoua 2203b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2204776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2205b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2206b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2207b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2208b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2209b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2210b4aaa1f0SMoni Shoua 2211b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2212b4aaa1f0SMoni Shoua 2213b4aaa1f0SMoni Shoua return &qp->ibqp; 2214b4aaa1f0SMoni Shoua err_free: 2215b4aaa1f0SMoni Shoua kfree(qp); 2216b4aaa1f0SMoni Shoua return ERR_PTR(err); 2217b4aaa1f0SMoni Shoua } 2218b4aaa1f0SMoni Shoua 2219b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2220e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2221b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2222b4aaa1f0SMoni Shoua struct ib_udata *udata) 2223b4aaa1f0SMoni Shoua { 2224b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2225b4aaa1f0SMoni Shoua int err; 2226b4aaa1f0SMoni Shoua 2227b4aaa1f0SMoni Shoua if (!udata) 2228b4aaa1f0SMoni Shoua return -EINVAL; 2229b4aaa1f0SMoni Shoua 2230b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2231b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2232b4aaa1f0SMoni Shoua return -EINVAL; 2233b4aaa1f0SMoni Shoua } 2234b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2235b4aaa1f0SMoni Shoua if (err) 2236b4aaa1f0SMoni Shoua return err; 2237b4aaa1f0SMoni Shoua 2238b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2239b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2240b4aaa1f0SMoni Shoua } else { 2241b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2242b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2243b4aaa1f0SMoni Shoua } else { 2244b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2245b4aaa1f0SMoni Shoua return -EINVAL; 2246b4aaa1f0SMoni Shoua } 2247b4aaa1f0SMoni Shoua } 2248b4aaa1f0SMoni Shoua 2249b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2250b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2251b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2252b4aaa1f0SMoni Shoua } 2253b4aaa1f0SMoni Shoua 2254b4aaa1f0SMoni Shoua return 0; 2255b4aaa1f0SMoni Shoua } 2256b4aaa1f0SMoni Shoua 2257b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2258b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2259e126ba97SEli Cohen struct ib_udata *udata) 2260e126ba97SEli Cohen { 2261e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2262e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2263e126ba97SEli Cohen u16 xrcdn = 0; 2264e126ba97SEli Cohen int err; 2265b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2266b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2267e126ba97SEli Cohen 2268e126ba97SEli Cohen if (pd) { 2269e126ba97SEli Cohen dev = to_mdev(pd->device); 22700fb2ed66Smajd@mellanox.com 22710fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 22720fb2ed66Smajd@mellanox.com if (!pd->uobject) { 22730fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 22740fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22750fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 22760fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 22770fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 22780fb2ed66Smajd@mellanox.com } 22790fb2ed66Smajd@mellanox.com } 228009f16cf5SMajd Dibbiny } else { 228109f16cf5SMajd Dibbiny /* being cautious here */ 228209f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 228309f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 228409f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 228509f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 228609f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 228709f16cf5SMajd Dibbiny } 228809f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2289e126ba97SEli Cohen } 2290e126ba97SEli Cohen 2291b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2292b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2293b4aaa1f0SMoni Shoua 2294b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2295b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2296b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2297b4aaa1f0SMoni Shoua if (err) 2298b4aaa1f0SMoni Shoua return ERR_PTR(err); 2299c32a4f29SMoni Shoua 2300c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2301c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2302c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2303c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2304c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2305c32a4f29SMoni Shoua } 2306776a3906SMoni Shoua } else { 2307776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2308c32a4f29SMoni Shoua } 2309b4aaa1f0SMoni Shoua } 2310b4aaa1f0SMoni Shoua 2311e126ba97SEli Cohen switch (init_attr->qp_type) { 2312e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2313e126ba97SEli Cohen case IB_QPT_XRC_INI: 2314938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2315e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2316e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2317e126ba97SEli Cohen } 2318e126ba97SEli Cohen init_attr->recv_cq = NULL; 2319e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2320e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2321e126ba97SEli Cohen init_attr->send_cq = NULL; 2322e126ba97SEli Cohen } 2323e126ba97SEli Cohen 2324e126ba97SEli Cohen /* fall through */ 23250fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2326e126ba97SEli Cohen case IB_QPT_RC: 2327e126ba97SEli Cohen case IB_QPT_UC: 2328e126ba97SEli Cohen case IB_QPT_UD: 2329e126ba97SEli Cohen case IB_QPT_SMI: 2330d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2331e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2332c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2333e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2334e126ba97SEli Cohen if (!qp) 2335e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2336e126ba97SEli Cohen 2337e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2338e126ba97SEli Cohen if (err) { 2339e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2340e126ba97SEli Cohen kfree(qp); 2341e126ba97SEli Cohen return ERR_PTR(err); 2342e126ba97SEli Cohen } 2343e126ba97SEli Cohen 2344e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2345e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2346e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2347e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2348e126ba97SEli Cohen else 234919098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2350e126ba97SEli Cohen 2351e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 235219098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2353a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2354a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2355e126ba97SEli Cohen 235619098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2357e126ba97SEli Cohen 2358e126ba97SEli Cohen break; 2359e126ba97SEli Cohen 2360d16e91daSHaggai Eran case IB_QPT_GSI: 2361d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2362d16e91daSHaggai Eran 2363e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2364e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2365e126ba97SEli Cohen case IB_QPT_MAX: 2366e126ba97SEli Cohen default: 2367e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2368e126ba97SEli Cohen init_attr->qp_type); 2369e126ba97SEli Cohen /* Don't support raw QPs */ 2370e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2371e126ba97SEli Cohen } 2372e126ba97SEli Cohen 2373b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2374b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2375b4aaa1f0SMoni Shoua 2376e126ba97SEli Cohen return &qp->ibqp; 2377e126ba97SEli Cohen } 2378e126ba97SEli Cohen 2379776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2380776a3906SMoni Shoua { 2381776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2382776a3906SMoni Shoua 2383776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2384776a3906SMoni Shoua int err; 2385776a3906SMoni Shoua 2386776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2387776a3906SMoni Shoua if (err) { 2388776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2389776a3906SMoni Shoua return err; 2390776a3906SMoni Shoua } 2391776a3906SMoni Shoua } 2392776a3906SMoni Shoua 2393776a3906SMoni Shoua kfree(mqp->dct.in); 2394776a3906SMoni Shoua kfree(mqp); 2395776a3906SMoni Shoua return 0; 2396776a3906SMoni Shoua } 2397776a3906SMoni Shoua 2398e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2399e126ba97SEli Cohen { 2400e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2401e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2402e126ba97SEli Cohen 2403d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2404d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2405d16e91daSHaggai Eran 2406776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2407776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2408776a3906SMoni Shoua 2409e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2410e126ba97SEli Cohen 2411e126ba97SEli Cohen kfree(mqp); 2412e126ba97SEli Cohen 2413e126ba97SEli Cohen return 0; 2414e126ba97SEli Cohen } 2415e126ba97SEli Cohen 2416e126ba97SEli Cohen static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr, 2417e126ba97SEli Cohen int attr_mask) 2418e126ba97SEli Cohen { 2419e126ba97SEli Cohen u32 hw_access_flags = 0; 2420e126ba97SEli Cohen u8 dest_rd_atomic; 2421e126ba97SEli Cohen u32 access_flags; 2422e126ba97SEli Cohen 2423e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2424e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2425e126ba97SEli Cohen else 242619098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2427e126ba97SEli Cohen 2428e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2429e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2430e126ba97SEli Cohen else 243119098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2432e126ba97SEli Cohen 2433e126ba97SEli Cohen if (!dest_rd_atomic) 2434e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2435e126ba97SEli Cohen 2436e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2437e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RRE; 2438e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) 2439e126ba97SEli Cohen hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX); 2440e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2441e126ba97SEli Cohen hw_access_flags |= MLX5_QP_BIT_RWE; 2442e126ba97SEli Cohen 2443e126ba97SEli Cohen return cpu_to_be32(hw_access_flags); 2444e126ba97SEli Cohen } 2445e126ba97SEli Cohen 2446e126ba97SEli Cohen enum { 2447e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2448e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2449e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2450e126ba97SEli Cohen }; 2451e126ba97SEli Cohen 2452e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2453e126ba97SEli Cohen { 2454e126ba97SEli Cohen if (rate == IB_RATE_PORT_CURRENT) { 2455e126ba97SEli Cohen return 0; 2456e126ba97SEli Cohen } else if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) { 2457e126ba97SEli Cohen return -EINVAL; 2458e126ba97SEli Cohen } else { 2459e126ba97SEli Cohen while (rate != IB_RATE_2_5_GBPS && 2460e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2461938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2462e126ba97SEli Cohen --rate; 2463e126ba97SEli Cohen } 2464e126ba97SEli Cohen 2465e126ba97SEli Cohen return rate + MLX5_STAT_RATE_OFFSET; 2466e126ba97SEli Cohen } 2467e126ba97SEli Cohen 246875850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 246975850d0bSmajd@mellanox.com struct mlx5_ib_sq *sq, u8 sl) 247075850d0bSmajd@mellanox.com { 247175850d0bSmajd@mellanox.com void *in; 247275850d0bSmajd@mellanox.com void *tisc; 247375850d0bSmajd@mellanox.com int inlen; 247475850d0bSmajd@mellanox.com int err; 247575850d0bSmajd@mellanox.com 247675850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 24771b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 247875850d0bSmajd@mellanox.com if (!in) 247975850d0bSmajd@mellanox.com return -ENOMEM; 248075850d0bSmajd@mellanox.com 248175850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 248275850d0bSmajd@mellanox.com 248375850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 248475850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 248575850d0bSmajd@mellanox.com 248675850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 248775850d0bSmajd@mellanox.com 248875850d0bSmajd@mellanox.com kvfree(in); 248975850d0bSmajd@mellanox.com 249075850d0bSmajd@mellanox.com return err; 249175850d0bSmajd@mellanox.com } 249275850d0bSmajd@mellanox.com 249313eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 249413eab21fSAviv Heller struct mlx5_ib_sq *sq, u8 tx_affinity) 249513eab21fSAviv Heller { 249613eab21fSAviv Heller void *in; 249713eab21fSAviv Heller void *tisc; 249813eab21fSAviv Heller int inlen; 249913eab21fSAviv Heller int err; 250013eab21fSAviv Heller 250113eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 25021b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 250313eab21fSAviv Heller if (!in) 250413eab21fSAviv Heller return -ENOMEM; 250513eab21fSAviv Heller 250613eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 250713eab21fSAviv Heller 250813eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 250913eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 251013eab21fSAviv Heller 251113eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 251213eab21fSAviv Heller 251313eab21fSAviv Heller kvfree(in); 251413eab21fSAviv Heller 251513eab21fSAviv Heller return err; 251613eab21fSAviv Heller } 251713eab21fSAviv Heller 251875850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 251990898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2520e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2521f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2522f879ee8dSAchiad Shochat bool alt) 2523e126ba97SEli Cohen { 2524d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2525e126ba97SEli Cohen int err; 2526ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2527d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2528d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2529e126ba97SEli Cohen 2530e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2531f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2532f879ee8dSAchiad Shochat attr->pkey_index); 2533e126ba97SEli Cohen 2534d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2535d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2536938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2537f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2538d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2539938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2540f83b4263SEli Cohen return -EINVAL; 2541f83b4263SEli Cohen } 25422811ba51SAchiad Shochat } 254344c58487SDasaratharaman Chandramouli 254444c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2545d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 25462811ba51SAchiad Shochat return -EINVAL; 2547d8966fcdSDasaratharaman Chandramouli err = mlx5_get_roce_gid_type(dev, port, grh->sgid_index, 2548ed88451eSMajd Dibbiny &gid_type); 2549ed88451eSMajd Dibbiny if (err) 2550ed88451eSMajd Dibbiny return err; 255144c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 25522b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 25532b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 25542b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 25552b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 25562811ba51SAchiad Shochat path->udp_sport = mlx5_get_roce_udp_sport(dev, port, 2557d8966fcdSDasaratharaman Chandramouli grh->sgid_index); 2558d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 2559ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2560d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 25612811ba51SAchiad Shochat } else { 2562d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2563d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2564d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2565d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2566d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2567d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2568e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2569d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 25702811ba51SAchiad Shochat } 25712811ba51SAchiad Shochat 2572d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2573d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2574d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2575e126ba97SEli Cohen path->tclass_flowlabel = 2576d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2577d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2578d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2579e126ba97SEli Cohen } 2580e126ba97SEli Cohen 2581d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2582e126ba97SEli Cohen if (err < 0) 2583e126ba97SEli Cohen return err; 2584e126ba97SEli Cohen path->static_rate = err; 2585e126ba97SEli Cohen path->port = port; 2586e126ba97SEli Cohen 2587e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2588f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2589e126ba97SEli Cohen 259075850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 259175850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 259275850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 2593d8966fcdSDasaratharaman Chandramouli sl & 0xf); 259475850d0bSmajd@mellanox.com 2595e126ba97SEli Cohen return 0; 2596e126ba97SEli Cohen } 2597e126ba97SEli Cohen 2598e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2599e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2600e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2601e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2602e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2603e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2604e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2605e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2606e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2607e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2608e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2609e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2610e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2611e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2612e126ba97SEli Cohen }, 2613e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2614e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2615e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2616e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2617e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2618e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2619e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2620e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2621e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2622e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2623e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2624e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2625e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2626a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2627a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2628a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2629a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2630a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2631e126ba97SEli Cohen }, 2632e126ba97SEli Cohen }, 2633e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2634e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2635e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2636e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2637e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2638e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2639e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2640e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2641e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2642e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2643e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2644e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2645e126ba97SEli Cohen }, 2646e126ba97SEli Cohen }, 2647e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2648e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2649e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2650e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2651e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2652e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2653c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2654c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2655e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2656c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2657c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2658e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2659e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2660e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2661e126ba97SEli Cohen }, 2662e126ba97SEli Cohen }, 2663e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2664e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2665e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2666e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 266775959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2668a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2669a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2670a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2671a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2672e126ba97SEli Cohen }, 2673e126ba97SEli Cohen }, 2674e126ba97SEli Cohen }; 2675e126ba97SEli Cohen 2676e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2677e126ba97SEli Cohen { 2678e126ba97SEli Cohen switch (ib_mask) { 2679e126ba97SEli Cohen case IB_QP_STATE: 2680e126ba97SEli Cohen return 0; 2681e126ba97SEli Cohen case IB_QP_CUR_STATE: 2682e126ba97SEli Cohen return 0; 2683e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2684e126ba97SEli Cohen return 0; 2685e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2686e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2687e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2688e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2689e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2690e126ba97SEli Cohen case IB_QP_PORT: 2691e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2692e126ba97SEli Cohen case IB_QP_QKEY: 2693e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2694e126ba97SEli Cohen case IB_QP_AV: 2695e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2696e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2697e126ba97SEli Cohen case IB_QP_PATH_MTU: 2698e126ba97SEli Cohen return 0; 2699e126ba97SEli Cohen case IB_QP_TIMEOUT: 2700e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2701e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2702e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2703e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2704e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2705e126ba97SEli Cohen case IB_QP_RQ_PSN: 2706e126ba97SEli Cohen return 0; 2707e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2708e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2709e126ba97SEli Cohen case IB_QP_ALT_PATH: 2710e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2711e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2712e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2713e126ba97SEli Cohen case IB_QP_SQ_PSN: 2714e126ba97SEli Cohen return 0; 2715e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2716e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2717e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2718e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2719e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2720e126ba97SEli Cohen case IB_QP_CAP: 2721e126ba97SEli Cohen return 0; 2722e126ba97SEli Cohen case IB_QP_DEST_QPN: 2723e126ba97SEli Cohen return 0; 2724e126ba97SEli Cohen } 2725e126ba97SEli Cohen return 0; 2726e126ba97SEli Cohen } 2727e126ba97SEli Cohen 2728e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2729e126ba97SEli Cohen { 2730e126ba97SEli Cohen int result = 0; 2731e126ba97SEli Cohen int i; 2732e126ba97SEli Cohen 2733e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2734e126ba97SEli Cohen if ((1 << i) & ib_mask) 2735e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2736e126ba97SEli Cohen } 2737e126ba97SEli Cohen 2738e126ba97SEli Cohen return result; 2739e126ba97SEli Cohen } 2740e126ba97SEli Cohen 2741eb49ab0cSAlex Vesker static int modify_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 2742eb49ab0cSAlex Vesker struct mlx5_ib_rq *rq, int new_state, 2743eb49ab0cSAlex Vesker const struct mlx5_modify_raw_qp_param *raw_qp_param) 2744ad5f8e96Smajd@mellanox.com { 2745ad5f8e96Smajd@mellanox.com void *in; 2746ad5f8e96Smajd@mellanox.com void *rqc; 2747ad5f8e96Smajd@mellanox.com int inlen; 2748ad5f8e96Smajd@mellanox.com int err; 2749ad5f8e96Smajd@mellanox.com 2750ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 27511b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2752ad5f8e96Smajd@mellanox.com if (!in) 2753ad5f8e96Smajd@mellanox.com return -ENOMEM; 2754ad5f8e96Smajd@mellanox.com 2755ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 2756ad5f8e96Smajd@mellanox.com 2757ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2758ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2759ad5f8e96Smajd@mellanox.com 2760eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2761eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2762eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 276323a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2764eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2765eb49ab0cSAlex Vesker } else 2766eb49ab0cSAlex Vesker pr_info_once("%s: RAW PACKET QP counters are not supported on current FW\n", 2767eb49ab0cSAlex Vesker dev->ib_dev.name); 2768eb49ab0cSAlex Vesker } 2769eb49ab0cSAlex Vesker 2770eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2771ad5f8e96Smajd@mellanox.com if (err) 2772ad5f8e96Smajd@mellanox.com goto out; 2773ad5f8e96Smajd@mellanox.com 2774ad5f8e96Smajd@mellanox.com rq->state = new_state; 2775ad5f8e96Smajd@mellanox.com 2776ad5f8e96Smajd@mellanox.com out: 2777ad5f8e96Smajd@mellanox.com kvfree(in); 2778ad5f8e96Smajd@mellanox.com return err; 2779ad5f8e96Smajd@mellanox.com } 2780ad5f8e96Smajd@mellanox.com 2781ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp_sq(struct mlx5_core_dev *dev, 27827d29f349SBodong Wang struct mlx5_ib_sq *sq, 27837d29f349SBodong Wang int new_state, 27847d29f349SBodong Wang const struct mlx5_modify_raw_qp_param *raw_qp_param) 2785ad5f8e96Smajd@mellanox.com { 27867d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 278761147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 278861147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 278961147f39SBodong Wang bool new_rate_added = false; 27907d29f349SBodong Wang u16 rl_index = 0; 2791ad5f8e96Smajd@mellanox.com void *in; 2792ad5f8e96Smajd@mellanox.com void *sqc; 2793ad5f8e96Smajd@mellanox.com int inlen; 2794ad5f8e96Smajd@mellanox.com int err; 2795ad5f8e96Smajd@mellanox.com 2796ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 27971b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2798ad5f8e96Smajd@mellanox.com if (!in) 2799ad5f8e96Smajd@mellanox.com return -ENOMEM; 2800ad5f8e96Smajd@mellanox.com 2801ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 2802ad5f8e96Smajd@mellanox.com 2803ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 2804ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 2805ad5f8e96Smajd@mellanox.com 28067d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 28077d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 28087d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 28097d29f349SBodong Wang __func__); 28107d29f349SBodong Wang else 281161147f39SBodong Wang new_rl = raw_qp_param->rl; 28127d29f349SBodong Wang } 2813ad5f8e96Smajd@mellanox.com 281461147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 281561147f39SBodong Wang if (new_rl.rate) { 281661147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 28177d29f349SBodong Wang if (err) { 281861147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 281961147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 282061147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 282161147f39SBodong Wang new_rl.typical_pkt_sz); 282261147f39SBodong Wang 28237d29f349SBodong Wang goto out; 28247d29f349SBodong Wang } 282561147f39SBodong Wang new_rate_added = true; 28267d29f349SBodong Wang } 28277d29f349SBodong Wang 28287d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 282961147f39SBodong Wang /* index 0 means no limit */ 28307d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 28317d29f349SBodong Wang } 28327d29f349SBodong Wang 28337d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 28347d29f349SBodong Wang if (err) { 28357d29f349SBodong Wang /* Remove new rate from table if failed */ 283661147f39SBodong Wang if (new_rate_added) 283761147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 28387d29f349SBodong Wang goto out; 28397d29f349SBodong Wang } 28407d29f349SBodong Wang 28417d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 284261147f39SBodong Wang if ((old_rl.rate && 284361147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 28447d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 284561147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 28467d29f349SBodong Wang 284761147f39SBodong Wang ibqp->rl = new_rl; 2848ad5f8e96Smajd@mellanox.com sq->state = new_state; 2849ad5f8e96Smajd@mellanox.com 2850ad5f8e96Smajd@mellanox.com out: 2851ad5f8e96Smajd@mellanox.com kvfree(in); 2852ad5f8e96Smajd@mellanox.com return err; 2853ad5f8e96Smajd@mellanox.com } 2854ad5f8e96Smajd@mellanox.com 2855ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 285613eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 285713eab21fSAviv Heller u8 tx_affinity) 2858ad5f8e96Smajd@mellanox.com { 2859ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 2860ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 2861ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 28627d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 28637d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 2864ad5f8e96Smajd@mellanox.com int rq_state; 2865ad5f8e96Smajd@mellanox.com int sq_state; 2866ad5f8e96Smajd@mellanox.com int err; 2867ad5f8e96Smajd@mellanox.com 28680680efa2SAlex Vesker switch (raw_qp_param->operation) { 2869ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 2870ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 2871ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 2872ad5f8e96Smajd@mellanox.com break; 2873ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 2874ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 2875ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 2876ad5f8e96Smajd@mellanox.com break; 2877ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 2878ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 2879ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 2880ad5f8e96Smajd@mellanox.com break; 2881ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 2882ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 28837d29f349SBodong Wang if (raw_qp_param->set_mask == 28847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 28857d29f349SBodong Wang modify_rq = 0; 28867d29f349SBodong Wang sq_state = sq->state; 28877d29f349SBodong Wang } else { 28887d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 28897d29f349SBodong Wang } 28907d29f349SBodong Wang break; 28917d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 28927d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 2893eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 2894eb49ab0cSAlex Vesker return -EINVAL; 2895eb49ab0cSAlex Vesker else 2896ad5f8e96Smajd@mellanox.com return 0; 2897ad5f8e96Smajd@mellanox.com default: 2898ad5f8e96Smajd@mellanox.com WARN_ON(1); 2899ad5f8e96Smajd@mellanox.com return -EINVAL; 2900ad5f8e96Smajd@mellanox.com } 2901ad5f8e96Smajd@mellanox.com 29027d29f349SBodong Wang if (modify_rq) { 2903eb49ab0cSAlex Vesker err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param); 2904ad5f8e96Smajd@mellanox.com if (err) 2905ad5f8e96Smajd@mellanox.com return err; 2906ad5f8e96Smajd@mellanox.com } 2907ad5f8e96Smajd@mellanox.com 29087d29f349SBodong Wang if (modify_sq) { 290913eab21fSAviv Heller if (tx_affinity) { 291013eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 291113eab21fSAviv Heller tx_affinity); 291213eab21fSAviv Heller if (err) 291313eab21fSAviv Heller return err; 291413eab21fSAviv Heller } 291513eab21fSAviv Heller 29167d29f349SBodong Wang return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, raw_qp_param); 291713eab21fSAviv Heller } 2918ad5f8e96Smajd@mellanox.com 2919ad5f8e96Smajd@mellanox.com return 0; 2920ad5f8e96Smajd@mellanox.com } 2921ad5f8e96Smajd@mellanox.com 2922e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 2923e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 292461147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 292561147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 2926e126ba97SEli Cohen { 2927427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 2928427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 2929427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2930427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2931427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 2932427c1e7bSmajd@mellanox.com }, 2933427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 2934427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2935427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2936427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 2937427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 2938427c1e7bSmajd@mellanox.com }, 2939427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 2940427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2941427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2942427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 2943427c1e7bSmajd@mellanox.com }, 2944427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 2945427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2946427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2947427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 2948427c1e7bSmajd@mellanox.com }, 2949427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 2950427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2951427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2952427c1e7bSmajd@mellanox.com }, 2953427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 2954427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2955427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2956427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 2957427c1e7bSmajd@mellanox.com }, 2958427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 2959427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 2960427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 2961427c1e7bSmajd@mellanox.com } 2962427c1e7bSmajd@mellanox.com }; 2963427c1e7bSmajd@mellanox.com 2964e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2965e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 296619098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 2967e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2968e126ba97SEli Cohen struct mlx5_qp_context *context; 2969e126ba97SEli Cohen struct mlx5_ib_pd *pd; 2970eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 2971e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 2972e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 2973e126ba97SEli Cohen int mlx5_st; 2974e126ba97SEli Cohen int err; 2975427c1e7bSmajd@mellanox.com u16 op; 297613eab21fSAviv Heller u8 tx_affinity = 0; 2977e126ba97SEli Cohen 297855de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 297955de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 298055de9a77SLeon Romanovsky if (mlx5_st < 0) 298155de9a77SLeon Romanovsky return -EINVAL; 298255de9a77SLeon Romanovsky 29831a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 29841a412fb1SSaeed Mahameed if (!context) 2985e126ba97SEli Cohen return -ENOMEM; 2986e126ba97SEli Cohen 298755de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 2988e126ba97SEli Cohen 2989e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 2990e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2991e126ba97SEli Cohen } else { 2992e126ba97SEli Cohen switch (attr->path_mig_state) { 2993e126ba97SEli Cohen case IB_MIG_MIGRATED: 2994e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 2995e126ba97SEli Cohen break; 2996e126ba97SEli Cohen case IB_MIG_REARM: 2997e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 2998e126ba97SEli Cohen break; 2999e126ba97SEli Cohen case IB_MIG_ARMED: 3000e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3001e126ba97SEli Cohen break; 3002e126ba97SEli Cohen } 3003e126ba97SEli Cohen } 3004e126ba97SEli Cohen 300513eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 300613eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 300713eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 300813eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 300913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 301013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 301113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 301213eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 301313eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 30147fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 301513eab21fSAviv Heller tx_affinity = (unsigned int)atomic_add_return(1, 30167fd8aefbSDaniel Jurgens &dev->roce[p].next_port) % 301713eab21fSAviv Heller MLX5_MAX_PORTS + 1; 301813eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 301913eab21fSAviv Heller } 302013eab21fSAviv Heller } 302113eab21fSAviv Heller } 302213eab21fSAviv Heller 3023d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3024e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3025c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3026c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3027e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3028e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3029e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3030e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3031e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3032e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3033e126ba97SEli Cohen err = -EINVAL; 3034e126ba97SEli Cohen goto out; 3035e126ba97SEli Cohen } 3036938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3037938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3038e126ba97SEli Cohen } 3039e126ba97SEli Cohen 3040e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3041e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3042e126ba97SEli Cohen 3043e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3044d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3045e126ba97SEli Cohen 3046e126ba97SEli Cohen /* todo implement counter_index functionality */ 3047e126ba97SEli Cohen 3048e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3049e126ba97SEli Cohen context->pri_path.port = qp->port; 3050e126ba97SEli Cohen 3051e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3052e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3053e126ba97SEli Cohen 3054e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 305575850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3056e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3057f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3058e126ba97SEli Cohen if (err) 3059e126ba97SEli Cohen goto out; 3060e126ba97SEli Cohen } 3061e126ba97SEli Cohen 3062e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3063e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3064e126ba97SEli Cohen 3065e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 306675850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 306775850d0bSmajd@mellanox.com &context->alt_path, 3068f879ee8dSAchiad Shochat attr->alt_port_num, 3069f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3070f879ee8dSAchiad Shochat 0, attr, true); 3071e126ba97SEli Cohen if (err) 3072e126ba97SEli Cohen goto out; 3073e126ba97SEli Cohen } 3074e126ba97SEli Cohen 3075e126ba97SEli Cohen pd = get_pd(qp); 307689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 307789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3078e126ba97SEli Cohen 3079e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3080e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3081e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3082e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3083e126ba97SEli Cohen 3084e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3085e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3086e126ba97SEli Cohen 3087e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3088e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3089e126ba97SEli Cohen 3090e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3091e126ba97SEli Cohen if (attr->max_rd_atomic) 3092e126ba97SEli Cohen context->params1 |= 3093e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3094e126ba97SEli Cohen } 3095e126ba97SEli Cohen 3096e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3097e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3098e126ba97SEli Cohen 3099e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3100e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3101e126ba97SEli Cohen context->params2 |= 3102e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3103e126ba97SEli Cohen } 3104e126ba97SEli Cohen 3105e126ba97SEli Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) 3106e126ba97SEli Cohen context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask); 3107e126ba97SEli Cohen 3108e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3109e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3110e126ba97SEli Cohen 3111e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3112e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3113e126ba97SEli Cohen 3114e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3115e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3116e126ba97SEli Cohen 3117e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3118e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3119e126ba97SEli Cohen 31200837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 31210837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 31220837e86aSMark Bloch qp->port) - 1; 3123c2e53b2cSYishai Hadas 3124c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3125c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3126c2e53b2cSYishai Hadas port_num = 0; 3127c2e53b2cSYishai Hadas 3128eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 31290837e86aSMark Bloch context->qp_counter_set_usr_page |= 3130e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 31310837e86aSMark Bloch } 31320837e86aSMark Bloch 3133e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3134e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3135e126ba97SEli Cohen 3136b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3137b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3138e126ba97SEli Cohen 3139e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3140e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3141e126ba97SEli Cohen 3142427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 31435d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 31445d414b17SDan Carpenter err = -EINVAL; 3145427c1e7bSmajd@mellanox.com goto out; 31465d414b17SDan Carpenter } 3147427c1e7bSmajd@mellanox.com 3148427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3149e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3150e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3151ad5f8e96Smajd@mellanox.com 3152c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3153c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 31540680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 31550680efa2SAlex Vesker 31560680efa2SAlex Vesker raw_qp_param.operation = op; 3157eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3158e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3159eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3160eb49ab0cSAlex Vesker } 31617d29f349SBodong Wang 31627d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 316361147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 316461147f39SBodong Wang 316561147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 316661147f39SBodong Wang if (attr->rate_limit && 316761147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 316861147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 316961147f39SBodong Wang ucmd->burst_info.max_burst_sz; 317061147f39SBodong Wang } else { 317161147f39SBodong Wang err = -EINVAL; 317261147f39SBodong Wang goto out; 317361147f39SBodong Wang } 317461147f39SBodong Wang } 317561147f39SBodong Wang 317661147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 317761147f39SBodong Wang if (attr->rate_limit && 317861147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 317961147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 318061147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 318161147f39SBodong Wang } else { 318261147f39SBodong Wang err = -EINVAL; 318361147f39SBodong Wang goto out; 318461147f39SBodong Wang } 318561147f39SBodong Wang } 318661147f39SBodong Wang 31877d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 31887d29f349SBodong Wang } 31897d29f349SBodong Wang 319013eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 31910680efa2SAlex Vesker } else { 31921a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 319319098df2Smajd@mellanox.com &base->mqp); 31940680efa2SAlex Vesker } 31950680efa2SAlex Vesker 3196e126ba97SEli Cohen if (err) 3197e126ba97SEli Cohen goto out; 3198e126ba97SEli Cohen 3199e126ba97SEli Cohen qp->state = new_state; 3200e126ba97SEli Cohen 3201e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 320219098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3203e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 320419098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3205e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3206e126ba97SEli Cohen qp->port = attr->port_num; 3207e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 320819098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3209e126ba97SEli Cohen 3210e126ba97SEli Cohen /* 3211e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3212e126ba97SEli Cohen * entries and reinitialize the QP. 3213e126ba97SEli Cohen */ 321475a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 321575a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 321619098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3217e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3218e126ba97SEli Cohen if (send_cq != recv_cq) 321919098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3220e126ba97SEli Cohen 3221e126ba97SEli Cohen qp->rq.head = 0; 3222e126ba97SEli Cohen qp->rq.tail = 0; 3223e126ba97SEli Cohen qp->sq.head = 0; 3224e126ba97SEli Cohen qp->sq.tail = 0; 3225e126ba97SEli Cohen qp->sq.cur_post = 0; 3226e126ba97SEli Cohen qp->sq.last_poll = 0; 3227e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3228e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3229e126ba97SEli Cohen } 3230e126ba97SEli Cohen 3231e126ba97SEli Cohen out: 32321a412fb1SSaeed Mahameed kfree(context); 3233e126ba97SEli Cohen return err; 3234e126ba97SEli Cohen } 3235e126ba97SEli Cohen 3236c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3237c32a4f29SMoni Shoua { 3238c32a4f29SMoni Shoua if ((mask & req) != req) 3239c32a4f29SMoni Shoua return false; 3240c32a4f29SMoni Shoua 3241c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3242c32a4f29SMoni Shoua return false; 3243c32a4f29SMoni Shoua 3244c32a4f29SMoni Shoua return true; 3245c32a4f29SMoni Shoua } 3246c32a4f29SMoni Shoua 3247c32a4f29SMoni Shoua /* check valid transition for driver QP types 3248c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3249c32a4f29SMoni Shoua */ 3250c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3251c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3252c32a4f29SMoni Shoua { 3253c32a4f29SMoni Shoua int req = IB_QP_STATE; 3254c32a4f29SMoni Shoua int opt = 0; 3255c32a4f29SMoni Shoua 3256c32a4f29SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3257c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3258c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3259c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3260c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3261c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3262c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3263c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3264c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3265c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3266c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3267c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3268c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3269c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3270c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3271c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3272c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3273c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3274c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3275c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3276c32a4f29SMoni Shoua } 3277c32a4f29SMoni Shoua return false; 3278c32a4f29SMoni Shoua } 3279c32a4f29SMoni Shoua 3280776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3281776a3906SMoni Shoua * valid transitions are: 3282776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3283776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3284776a3906SMoni Shoua * mtu, gid_index and hop_limit 3285776a3906SMoni Shoua * Other transitions and attributes are illegal 3286776a3906SMoni Shoua */ 3287776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3288776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3289776a3906SMoni Shoua { 3290776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3291776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3292776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3293776a3906SMoni Shoua int err = 0; 3294776a3906SMoni Shoua int required = IB_QP_STATE; 3295776a3906SMoni Shoua void *dctc; 3296776a3906SMoni Shoua 3297776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3298776a3906SMoni Shoua return -EINVAL; 3299776a3906SMoni Shoua 3300776a3906SMoni Shoua cur_state = qp->state; 3301776a3906SMoni Shoua new_state = attr->qp_state; 3302776a3906SMoni Shoua 3303776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3304776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3305776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3306776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3307776a3906SMoni Shoua return -EINVAL; 3308776a3906SMoni Shoua 3309776a3906SMoni Shoua if (attr->port_num == 0 || 3310776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3311776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3312776a3906SMoni Shoua attr->port_num, dev->num_ports); 3313776a3906SMoni Shoua return -EINVAL; 3314776a3906SMoni Shoua } 3315776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3316776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3317776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3318776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3319776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3320776a3906SMoni Shoua if (!mlx5_ib_dc_atomic_is_supported(dev)) 3321776a3906SMoni Shoua return -EOPNOTSUPP; 3322776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3323776a3906SMoni Shoua MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX); 3324776a3906SMoni Shoua } 3325776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3326776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3327776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3328776a3906SMoni Shoua 3329776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3330776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3331776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3332776a3906SMoni Shoua sizeof(resp.dctn); 3333776a3906SMoni Shoua 3334776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3335776a3906SMoni Shoua return -EINVAL; 3336776a3906SMoni Shoua resp.response_length = min_resp_len; 3337776a3906SMoni Shoua 3338776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3339776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3340776a3906SMoni Shoua return -EINVAL; 3341776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3342776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3343776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3344776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3345776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3346776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3347776a3906SMoni Shoua 3348776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3349776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3350776a3906SMoni Shoua if (err) 3351776a3906SMoni Shoua return err; 3352776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3353776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3354776a3906SMoni Shoua if (err) { 3355776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3356776a3906SMoni Shoua return err; 3357776a3906SMoni Shoua } 3358776a3906SMoni Shoua } else { 3359776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3360776a3906SMoni Shoua return -EINVAL; 3361776a3906SMoni Shoua } 3362776a3906SMoni Shoua if (err) 3363776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3364776a3906SMoni Shoua else 3365776a3906SMoni Shoua qp->state = new_state; 3366776a3906SMoni Shoua return err; 3367776a3906SMoni Shoua } 3368776a3906SMoni Shoua 3369e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3370e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3371e126ba97SEli Cohen { 3372e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3373e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 337461147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3375d16e91daSHaggai Eran enum ib_qp_type qp_type; 3376e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 337761147f39SBodong Wang size_t required_cmd_sz; 3378e126ba97SEli Cohen int err = -EINVAL; 3379e126ba97SEli Cohen int port; 33802811ba51SAchiad Shochat enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED; 3381e126ba97SEli Cohen 338228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 338328d61370SYishai Hadas return -ENOSYS; 338428d61370SYishai Hadas 338561147f39SBodong Wang if (udata && udata->inlen) { 338661147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 338761147f39SBodong Wang sizeof(ucmd.reserved); 338861147f39SBodong Wang if (udata->inlen < required_cmd_sz) 338961147f39SBodong Wang return -EINVAL; 339061147f39SBodong Wang 339161147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 339261147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 339361147f39SBodong Wang udata->inlen - sizeof(ucmd))) 339461147f39SBodong Wang return -EOPNOTSUPP; 339561147f39SBodong Wang 339661147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 339761147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 339861147f39SBodong Wang return -EFAULT; 339961147f39SBodong Wang 340061147f39SBodong Wang if (ucmd.comp_mask || 340161147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 340261147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 340361147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 340461147f39SBodong Wang return -EOPNOTSUPP; 340561147f39SBodong Wang } 340661147f39SBodong Wang 3407d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3408d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3409d16e91daSHaggai Eran 3410c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3411c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3412c32a4f29SMoni Shoua else 3413d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3414d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3415d16e91daSHaggai Eran 3416776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3417776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3418c32a4f29SMoni Shoua 3419e126ba97SEli Cohen mutex_lock(&qp->mutex); 3420e126ba97SEli Cohen 3421e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3422e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3423e126ba97SEli Cohen 34242811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 34252811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 34262811ba51SAchiad Shochat ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port); 34272811ba51SAchiad Shochat } 34282811ba51SAchiad Shochat 3429c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3430c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3431c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3432c2e53b2cSYishai Hadas attr_mask); 3433c2e53b2cSYishai Hadas goto out; 3434c2e53b2cSYishai Hadas } 3435c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3436c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3437d16e91daSHaggai Eran !ib_modify_qp_is_ok(cur_state, new_state, qp_type, attr_mask, ll)) { 3438158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3439158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3440e126ba97SEli Cohen goto out; 3441c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3442c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3443c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3444c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3445c32a4f29SMoni Shoua goto out; 3446158abf86SHaggai Eran } 3447e126ba97SEli Cohen 3448e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3449938fe83cSSaeed Mahameed (attr->port_num == 0 || 3450508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3451158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3452158abf86SHaggai Eran attr->port_num, dev->num_ports); 3453e126ba97SEli Cohen goto out; 3454158abf86SHaggai Eran } 3455e126ba97SEli Cohen 3456e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3457e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3458938fe83cSSaeed Mahameed if (attr->pkey_index >= 3459158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3460158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3461158abf86SHaggai Eran attr->pkey_index); 3462e126ba97SEli Cohen goto out; 3463e126ba97SEli Cohen } 3464158abf86SHaggai Eran } 3465e126ba97SEli Cohen 3466e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3467938fe83cSSaeed Mahameed attr->max_rd_atomic > 3468158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3469158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3470158abf86SHaggai Eran attr->max_rd_atomic); 3471e126ba97SEli Cohen goto out; 3472158abf86SHaggai Eran } 3473e126ba97SEli Cohen 3474e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3475938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3476158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3477158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3478158abf86SHaggai Eran attr->max_dest_rd_atomic); 3479e126ba97SEli Cohen goto out; 3480158abf86SHaggai Eran } 3481e126ba97SEli Cohen 3482e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3483e126ba97SEli Cohen err = 0; 3484e126ba97SEli Cohen goto out; 3485e126ba97SEli Cohen } 3486e126ba97SEli Cohen 348761147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 348861147f39SBodong Wang new_state, &ucmd); 3489e126ba97SEli Cohen 3490e126ba97SEli Cohen out: 3491e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3492e126ba97SEli Cohen return err; 3493e126ba97SEli Cohen } 3494e126ba97SEli Cohen 3495e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3496e126ba97SEli Cohen { 3497e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3498e126ba97SEli Cohen unsigned cur; 3499e126ba97SEli Cohen 3500e126ba97SEli Cohen cur = wq->head - wq->tail; 3501e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3502e126ba97SEli Cohen return 0; 3503e126ba97SEli Cohen 3504e126ba97SEli Cohen cq = to_mcq(ib_cq); 3505e126ba97SEli Cohen spin_lock(&cq->lock); 3506e126ba97SEli Cohen cur = wq->head - wq->tail; 3507e126ba97SEli Cohen spin_unlock(&cq->lock); 3508e126ba97SEli Cohen 3509e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3510e126ba97SEli Cohen } 3511e126ba97SEli Cohen 3512e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3513e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3514e126ba97SEli Cohen { 3515e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3516e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3517e126ba97SEli Cohen rseg->reserved = 0; 3518e126ba97SEli Cohen } 3519e126ba97SEli Cohen 3520f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3521f0313965SErez Shitrit struct ib_send_wr *wr, void *qend, 3522f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3523f0313965SErez Shitrit { 3524f0313965SErez Shitrit void *seg = eseg; 3525f0313965SErez Shitrit 3526f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3527f0313965SErez Shitrit 3528f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3529f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3530f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3531f0313965SErez Shitrit 3532f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3533f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3534f0313965SErez Shitrit 3535f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3536f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 35372b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3538f0313965SErez Shitrit u64 left, leftlen, copysz; 3539f0313965SErez Shitrit void *pdata = ud_wr->header; 3540f0313965SErez Shitrit 3541f0313965SErez Shitrit left = ud_wr->hlen; 3542f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 35432b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3544f0313965SErez Shitrit 3545f0313965SErez Shitrit /* 3546f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3547f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3548f0313965SErez Shitrit * rollback and than the copy the left 3549f0313965SErez Shitrit */ 35502b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3551f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3552f0313965SErez Shitrit 3553f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3554f0313965SErez Shitrit 3555f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3556f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3557f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3558f0313965SErez Shitrit } 3559f0313965SErez Shitrit 3560f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3561f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3562f0313965SErez Shitrit left -= copysz; 3563f0313965SErez Shitrit pdata += copysz; 3564f0313965SErez Shitrit memcpy(seg, pdata, left); 3565f0313965SErez Shitrit seg += ALIGN(left, 16); 3566f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3567f0313965SErez Shitrit } 3568f0313965SErez Shitrit } 3569f0313965SErez Shitrit 3570f0313965SErez Shitrit return seg; 3571f0313965SErez Shitrit } 3572f0313965SErez Shitrit 3573e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3574e126ba97SEli Cohen struct ib_send_wr *wr) 3575e126ba97SEli Cohen { 3576e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3577e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3578e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3579e126ba97SEli Cohen } 3580e126ba97SEli Cohen 3581e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3582e126ba97SEli Cohen { 3583e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3584e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3585e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3586e126ba97SEli Cohen } 3587e126ba97SEli Cohen 358831616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3589e126ba97SEli Cohen { 359031616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 359131616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3592e126ba97SEli Cohen } 3593e126ba97SEli Cohen 3594e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3595e126ba97SEli Cohen { 3596e126ba97SEli Cohen u64 result; 3597e126ba97SEli Cohen 3598e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3599e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3600e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3601e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3602e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3603e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3604e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3605e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3606e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3607e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3608e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3609e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3610e126ba97SEli Cohen 3611e126ba97SEli Cohen return cpu_to_be64(result); 3612e126ba97SEli Cohen } 3613e126ba97SEli Cohen 3614e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3615e6631814SSagi Grimberg { 3616e6631814SSagi Grimberg u64 result; 3617e6631814SSagi Grimberg 3618e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3619e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3620e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3621d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3622e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3623e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3624e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3625e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3626e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3627e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3628e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3629e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3630e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3631e6631814SSagi Grimberg 3632e6631814SSagi Grimberg return cpu_to_be64(result); 3633e6631814SSagi Grimberg } 3634e6631814SSagi Grimberg 36358a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 36368a187ee5SSagi Grimberg struct mlx5_ib_mr *mr) 36378a187ee5SSagi Grimberg { 363831616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 36398a187ee5SSagi Grimberg 36408a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3641b005d316SSagi Grimberg 36428a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 364331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 36448a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 36458a187ee5SSagi Grimberg } 36468a187ee5SSagi Grimberg 3647dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3648e126ba97SEli Cohen { 3649e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3650e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 36512d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3652e126ba97SEli Cohen } 3653e126ba97SEli Cohen 365431616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3655e126ba97SEli Cohen { 3656968e78ddSHaggai Eran u64 result; 3657e126ba97SEli Cohen 365831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3659e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3660968e78ddSHaggai Eran 3661968e78ddSHaggai Eran return cpu_to_be64(result); 3662968e78ddSHaggai Eran } 3663968e78ddSHaggai Eran 366431616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3665968e78ddSHaggai Eran { 3666968e78ddSHaggai Eran u64 result; 3667968e78ddSHaggai Eran 3668968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3669968e78ddSHaggai Eran 3670968e78ddSHaggai Eran return cpu_to_be64(result); 3671968e78ddSHaggai Eran } 3672968e78ddSHaggai Eran 367356e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 367456e11d62SNoa Osherovich { 367556e11d62SNoa Osherovich u64 result; 367656e11d62SNoa Osherovich 367756e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 367856e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 367931616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 368056e11d62SNoa Osherovich 368156e11d62SNoa Osherovich return cpu_to_be64(result); 368256e11d62SNoa Osherovich } 368356e11d62SNoa Osherovich 368431616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 368556e11d62SNoa Osherovich { 368656e11d62SNoa Osherovich u64 result; 368756e11d62SNoa Osherovich 368831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 368931616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 369056e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 369131616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 369231616255SArtemy Kovalyov 369331616255SArtemy Kovalyov if (atomic) 369431616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 369556e11d62SNoa Osherovich 369656e11d62SNoa Osherovich return cpu_to_be64(result); 369756e11d62SNoa Osherovich } 369856e11d62SNoa Osherovich 369956e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 370056e11d62SNoa Osherovich { 370156e11d62SNoa Osherovich u64 result; 370256e11d62SNoa Osherovich 370331616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 370456e11d62SNoa Osherovich 370556e11d62SNoa Osherovich return cpu_to_be64(result); 370656e11d62SNoa Osherovich } 370756e11d62SNoa Osherovich 3708c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3709c8d75a98SMajd Dibbiny { 3710c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3711c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3712c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3713c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3714c8d75a98SMajd Dibbiny return -EPERM; 3715c8d75a98SMajd Dibbiny return 0; 3716c8d75a98SMajd Dibbiny } 3717c8d75a98SMajd Dibbiny 3718c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3719c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3720578e7264SMaor Gottlieb struct ib_send_wr *wr, int atomic) 3721968e78ddSHaggai Eran { 3722e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3723968e78ddSHaggai Eran 3724968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3725968e78ddSHaggai Eran 3726968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3727968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3728968e78ddSHaggai Eran else 3729968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3730968e78ddSHaggai Eran 373131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 373231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 373331616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 373431616255SArtemy Kovalyov 373531616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 373631616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3737968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3738968e78ddSHaggai Eran } 373956e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 374056e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 374131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 374231616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 374356e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 3744e126ba97SEli Cohen } 374531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 374631616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 374731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 374831616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 3749e126ba97SEli Cohen 3750e126ba97SEli Cohen if (!wr->num_sge) 3751968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 3752c8d75a98SMajd Dibbiny 3753c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 3754e126ba97SEli Cohen } 3755e126ba97SEli Cohen 3756e126ba97SEli Cohen static u8 get_umr_flags(int acc) 3757e126ba97SEli Cohen { 3758e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 3759e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 3760e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 3761e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 37622ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 3763e126ba97SEli Cohen } 3764e126ba97SEli Cohen 37658a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 37668a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 37678a187ee5SSagi Grimberg u32 key, int access) 37688a187ee5SSagi Grimberg { 37698a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 37708a187ee5SSagi Grimberg 37718a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 3772b005d316SSagi Grimberg 3773ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 3774b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 3775ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 3776b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 3777b005d316SSagi Grimberg ndescs *= 2; 3778b005d316SSagi Grimberg 3779b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 37808a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 37818a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 37828a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 37838a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 37848a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 37858a187ee5SSagi Grimberg } 37868a187ee5SSagi Grimberg 3787dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 3788e126ba97SEli Cohen { 3789e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 3790968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3791e126ba97SEli Cohen } 3792e126ba97SEli Cohen 3793e126ba97SEli Cohen static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr) 3794e126ba97SEli Cohen { 3795e622f2f4SChristoph Hellwig struct mlx5_umr_wr *umrwr = umr_wr(wr); 3796968e78ddSHaggai Eran 3797e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 379831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 3799968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 3800e126ba97SEli Cohen 3801968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 380256e11d62SNoa Osherovich if (umrwr->pd) 3803968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 380431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 380531616255SArtemy Kovalyov !umrwr->length) 380631616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 380731616255SArtemy Kovalyov 380831616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 3809968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 3810968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 3811746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 3812968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 3813e126ba97SEli Cohen } 3814e126ba97SEli Cohen 38158a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 38168a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 38178a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 38188a187ee5SSagi Grimberg { 38198a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 38208a187ee5SSagi Grimberg 38218a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 38228a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 38238a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 38248a187ee5SSagi Grimberg } 38258a187ee5SSagi Grimberg 3826e126ba97SEli Cohen static __be32 send_ieth(struct ib_send_wr *wr) 3827e126ba97SEli Cohen { 3828e126ba97SEli Cohen switch (wr->opcode) { 3829e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 3830e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 3831e126ba97SEli Cohen return wr->ex.imm_data; 3832e126ba97SEli Cohen 3833e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 3834e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 3835e126ba97SEli Cohen 3836e126ba97SEli Cohen default: 3837e126ba97SEli Cohen return 0; 3838e126ba97SEli Cohen } 3839e126ba97SEli Cohen } 3840e126ba97SEli Cohen 3841e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 3842e126ba97SEli Cohen { 3843e126ba97SEli Cohen u8 *p = wqe; 3844e126ba97SEli Cohen u8 res = 0; 3845e126ba97SEli Cohen int i; 3846e126ba97SEli Cohen 3847e126ba97SEli Cohen for (i = 0; i < size; i++) 3848e126ba97SEli Cohen res ^= p[i]; 3849e126ba97SEli Cohen 3850e126ba97SEli Cohen return ~res; 3851e126ba97SEli Cohen } 3852e126ba97SEli Cohen 3853e126ba97SEli Cohen static u8 wq_sig(void *wqe) 3854e126ba97SEli Cohen { 3855e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 3856e126ba97SEli Cohen } 3857e126ba97SEli Cohen 3858e126ba97SEli Cohen static int set_data_inl_seg(struct mlx5_ib_qp *qp, struct ib_send_wr *wr, 3859e126ba97SEli Cohen void *wqe, int *sz) 3860e126ba97SEli Cohen { 3861e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 3862e126ba97SEli Cohen void *qend = qp->sq.qend; 3863e126ba97SEli Cohen void *addr; 3864e126ba97SEli Cohen int inl = 0; 3865e126ba97SEli Cohen int copy; 3866e126ba97SEli Cohen int len; 3867e126ba97SEli Cohen int i; 3868e126ba97SEli Cohen 3869e126ba97SEli Cohen seg = wqe; 3870e126ba97SEli Cohen wqe += sizeof(*seg); 3871e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 3872e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 3873e126ba97SEli Cohen len = wr->sg_list[i].length; 3874e126ba97SEli Cohen inl += len; 3875e126ba97SEli Cohen 3876e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 3877e126ba97SEli Cohen return -ENOMEM; 3878e126ba97SEli Cohen 3879e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 3880e126ba97SEli Cohen copy = qend - wqe; 3881e126ba97SEli Cohen memcpy(wqe, addr, copy); 3882e126ba97SEli Cohen addr += copy; 3883e126ba97SEli Cohen len -= copy; 3884e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 3885e126ba97SEli Cohen } 3886e126ba97SEli Cohen memcpy(wqe, addr, len); 3887e126ba97SEli Cohen wqe += len; 3888e126ba97SEli Cohen } 3889e126ba97SEli Cohen 3890e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 3891e126ba97SEli Cohen 3892e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 3893e126ba97SEli Cohen 3894e126ba97SEli Cohen return 0; 3895e126ba97SEli Cohen } 3896e126ba97SEli Cohen 3897e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 3898e6631814SSagi Grimberg { 3899e6631814SSagi Grimberg switch (type) { 3900e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3901e6631814SSagi Grimberg return MLX5_DIF_SIZE; 3902e6631814SSagi Grimberg default: 3903e6631814SSagi Grimberg return 0; 3904e6631814SSagi Grimberg } 3905e6631814SSagi Grimberg } 3906e6631814SSagi Grimberg 3907e6631814SSagi Grimberg static u8 bs_selector(int block_size) 3908e6631814SSagi Grimberg { 3909e6631814SSagi Grimberg switch (block_size) { 3910e6631814SSagi Grimberg case 512: return 0x1; 3911e6631814SSagi Grimberg case 520: return 0x2; 3912e6631814SSagi Grimberg case 4096: return 0x3; 3913e6631814SSagi Grimberg case 4160: return 0x4; 3914e6631814SSagi Grimberg case 1073741824: return 0x5; 3915e6631814SSagi Grimberg default: return 0; 3916e6631814SSagi Grimberg } 3917e6631814SSagi Grimberg } 3918e6631814SSagi Grimberg 391978eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 3920142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 3921e6631814SSagi Grimberg { 3922142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 3923142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 3924142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 3925142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 3926142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 3927142537f4SSagi Grimberg /* repeating block */ 3928142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 3929142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 3930142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 3931e6631814SSagi Grimberg 393278eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 393378eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 3934e6631814SSagi Grimberg 393578eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 393678eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 393778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 393878eda2bbSSagi Grimberg else 393978eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 3940e6631814SSagi Grimberg } 3941e6631814SSagi Grimberg 394278eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 394378eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 3944e6631814SSagi Grimberg } 3945e6631814SSagi Grimberg 3946e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 3947e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 3948e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 3949e6631814SSagi Grimberg { 3950e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 3951e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 3952e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 3953e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 3954e6631814SSagi Grimberg 3955c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 3956e6631814SSagi Grimberg 3957142537f4SSagi Grimberg /* Basic + Extended + Inline */ 3958142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 3959e6631814SSagi Grimberg /* Input domain check byte mask */ 3960e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 396178eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 396278eda2bbSSagi Grimberg 396378eda2bbSSagi Grimberg /* Memory domain */ 396478eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 396578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 396678eda2bbSSagi Grimberg break; 396778eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 396878eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 396978eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 397078eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 397178eda2bbSSagi Grimberg break; 397278eda2bbSSagi Grimberg default: 397378eda2bbSSagi Grimberg return -EINVAL; 397478eda2bbSSagi Grimberg } 397578eda2bbSSagi Grimberg 397678eda2bbSSagi Grimberg /* Wire domain */ 397778eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 397878eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 397978eda2bbSSagi Grimberg break; 398078eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 3981e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 398278eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 3983e6631814SSagi Grimberg /* Same block structure */ 3984142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 3985e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 3986fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 3987c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 3988fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 3989c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 3990fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 3991e6631814SSagi Grimberg } else 3992e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 3993e6631814SSagi Grimberg 3994142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 399578eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 3996e6631814SSagi Grimberg break; 3997e6631814SSagi Grimberg default: 3998e6631814SSagi Grimberg return -EINVAL; 3999e6631814SSagi Grimberg } 4000e6631814SSagi Grimberg 4001e6631814SSagi Grimberg return 0; 4002e6631814SSagi Grimberg } 4003e6631814SSagi Grimberg 4004e622f2f4SChristoph Hellwig static int set_sig_data_segment(struct ib_sig_handover_wr *wr, 4005e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4006e6631814SSagi Grimberg { 4007e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4008e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4009e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4010e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4011e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4012e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4013e6631814SSagi Grimberg int ret; 4014e6631814SSagi Grimberg int wqe_size; 4015e6631814SSagi Grimberg 4016e622f2f4SChristoph Hellwig if (!wr->prot || 4017e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4018e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4019e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4020e6631814SSagi Grimberg /** 4021e6631814SSagi Grimberg * Source domain doesn't contain signature information 40225c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4023e6631814SSagi Grimberg * So need construct: 4024e6631814SSagi Grimberg * ------------------ 4025e6631814SSagi Grimberg * | data_klm | 4026e6631814SSagi Grimberg * ------------------ 4027e6631814SSagi Grimberg * | BSF | 4028e6631814SSagi Grimberg * ------------------ 4029e6631814SSagi Grimberg **/ 4030e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4031e6631814SSagi Grimberg 4032e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4033e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4034e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4035e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4036e6631814SSagi Grimberg } else { 4037e6631814SSagi Grimberg /** 4038e6631814SSagi Grimberg * Source domain contains signature information 4039e6631814SSagi Grimberg * So need construct a strided block format: 4040e6631814SSagi Grimberg * --------------------------- 4041e6631814SSagi Grimberg * | stride_block_ctrl | 4042e6631814SSagi Grimberg * --------------------------- 4043e6631814SSagi Grimberg * | data_klm | 4044e6631814SSagi Grimberg * --------------------------- 4045e6631814SSagi Grimberg * | prot_klm | 4046e6631814SSagi Grimberg * --------------------------- 4047e6631814SSagi Grimberg * | BSF | 4048e6631814SSagi Grimberg * --------------------------- 4049e6631814SSagi Grimberg **/ 4050e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4051e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4052e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4053e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4054e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4055e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4056e6631814SSagi Grimberg int prot_size; 4057e6631814SSagi Grimberg 4058e6631814SSagi Grimberg sblock_ctrl = *seg; 4059e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4060e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4061e6631814SSagi Grimberg 4062e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4063e6631814SSagi Grimberg if (!prot_size) { 4064e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4065e6631814SSagi Grimberg return -EINVAL; 4066e6631814SSagi Grimberg } 4067e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4068e6631814SSagi Grimberg prot_size); 4069e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4070e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4071e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4072e6631814SSagi Grimberg 4073e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4074e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4075e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 40765c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 40775c273b16SSagi Grimberg 4078e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4079e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4080e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4081e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 40825c273b16SSagi Grimberg 4083e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4084e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4085e6631814SSagi Grimberg } 4086e6631814SSagi Grimberg 4087e6631814SSagi Grimberg *seg += wqe_size; 4088e6631814SSagi Grimberg *size += wqe_size / 16; 4089e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4090e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4091e6631814SSagi Grimberg 4092e6631814SSagi Grimberg bsf = *seg; 4093e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4094e6631814SSagi Grimberg if (ret) 4095e6631814SSagi Grimberg return -EINVAL; 4096e6631814SSagi Grimberg 4097e6631814SSagi Grimberg *seg += sizeof(*bsf); 4098e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4099e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4100e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4101e6631814SSagi Grimberg 4102e6631814SSagi Grimberg return 0; 4103e6631814SSagi Grimberg } 4104e6631814SSagi Grimberg 4105e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 410631616255SArtemy Kovalyov struct ib_sig_handover_wr *wr, u32 size, 4107e6631814SSagi Grimberg u32 length, u32 pdn) 4108e6631814SSagi Grimberg { 4109e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4110e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4111d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4112e6631814SSagi Grimberg 4113e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4114e6631814SSagi Grimberg 4115e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4116ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4117e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4118d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4119e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4120e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 412131616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4122e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4123e6631814SSagi Grimberg } 4124e6631814SSagi Grimberg 4125e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 412631616255SArtemy Kovalyov u32 size) 4127e6631814SSagi Grimberg { 4128e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4129e6631814SSagi Grimberg 4130e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 413131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4132e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4133e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4134e6631814SSagi Grimberg } 4135e6631814SSagi Grimberg 4136e6631814SSagi Grimberg 4137e622f2f4SChristoph Hellwig static int set_sig_umr_wr(struct ib_send_wr *send_wr, struct mlx5_ib_qp *qp, 4138e6631814SSagi Grimberg void **seg, int *size) 4139e6631814SSagi Grimberg { 4140e622f2f4SChristoph Hellwig struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4141e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4142e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 414331616255SArtemy Kovalyov u32 xlt_size; 4144e6631814SSagi Grimberg int region_len, ret; 4145e6631814SSagi Grimberg 4146e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4147e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4148d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4149d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4150e6631814SSagi Grimberg return -EINVAL; 4151e6631814SSagi Grimberg 4152e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4153e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4154e622f2f4SChristoph Hellwig if (wr->prot && 4155e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4156e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4157e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4158e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4159e6631814SSagi Grimberg 4160e6631814SSagi Grimberg /** 4161e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4162e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4163e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4164e6631814SSagi Grimberg **/ 416531616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4166e6631814SSagi Grimberg 416731616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4168e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4169e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4170e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4171e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4172e6631814SSagi Grimberg 417331616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4174e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4175e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4176e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4177e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4178e6631814SSagi Grimberg 4179e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4180e6631814SSagi Grimberg if (ret) 4181e6631814SSagi Grimberg return ret; 4182e6631814SSagi Grimberg 4183d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4184e6631814SSagi Grimberg return 0; 4185e6631814SSagi Grimberg } 4186e6631814SSagi Grimberg 4187e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4188e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4189e6631814SSagi Grimberg { 4190e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4191e6631814SSagi Grimberg 4192e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4193e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4194e6631814SSagi Grimberg switch (domain->sig_type) { 419578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 419678eda2bbSSagi Grimberg break; 4197e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4198e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4199e6631814SSagi Grimberg domain->sig.dif.app_tag); 4200e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4201e6631814SSagi Grimberg break; 4202e6631814SSagi Grimberg default: 420312bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 420412bbf1eaSLeon Romanovsky domain->sig_type); 420512bbf1eaSLeon Romanovsky return -EINVAL; 4206e6631814SSagi Grimberg } 4207e6631814SSagi Grimberg 420878eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 420978eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 421078eda2bbSSagi Grimberg 4211e6631814SSagi Grimberg return 0; 4212e6631814SSagi Grimberg } 4213e6631814SSagi Grimberg 42148a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 42158a187ee5SSagi Grimberg struct ib_reg_wr *wr, 42168a187ee5SSagi Grimberg void **seg, int *size) 42178a187ee5SSagi Grimberg { 42188a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 42198a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 42208a187ee5SSagi Grimberg 42218a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 42228a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 42238a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 42248a187ee5SSagi Grimberg return -EINVAL; 42258a187ee5SSagi Grimberg } 42268a187ee5SSagi Grimberg 42278a187ee5SSagi Grimberg set_reg_umr_seg(*seg, mr); 42288a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 42298a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 42308a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 42318a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 42328a187ee5SSagi Grimberg 42338a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 42348a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 42358a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 42368a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 42378a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 42388a187ee5SSagi Grimberg 42398a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 42408a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 42418a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 42428a187ee5SSagi Grimberg 42438a187ee5SSagi Grimberg return 0; 42448a187ee5SSagi Grimberg } 42458a187ee5SSagi Grimberg 4246dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4247e126ba97SEli Cohen { 4248dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4249e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4250e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4251e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4252e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4253dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4254e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4255e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4256e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4257e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4258e126ba97SEli Cohen } 4259e126ba97SEli Cohen 4260e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4261e126ba97SEli Cohen { 4262e126ba97SEli Cohen __be32 *p = NULL; 4263e126ba97SEli Cohen int tidx = idx; 4264e126ba97SEli Cohen int i, j; 4265e126ba97SEli Cohen 4266e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4267e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4268e126ba97SEli Cohen if ((i & 0xf) == 0) { 4269e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4270e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4271e126ba97SEli Cohen p = buf; 4272e126ba97SEli Cohen j = 0; 4273e126ba97SEli Cohen } 4274e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4275e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4276e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4277e126ba97SEli Cohen } 4278e126ba97SEli Cohen } 4279e126ba97SEli Cohen 42806e5eadacSSagi Grimberg static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 42816e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 42826a4f139aSEli Cohen struct ib_send_wr *wr, unsigned *idx, 42836e5eadacSSagi Grimberg int *size, int nreq) 42846e5eadacSSagi Grimberg { 4285b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4286b2a232d2SLeon Romanovsky return -ENOMEM; 42876e5eadacSSagi Grimberg 42886e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 42896e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 42906e5eadacSSagi Grimberg *ctrl = *seg; 42916e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 42926e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 42936e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 42946e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SIGNALED ? 42956e5eadacSSagi Grimberg MLX5_WQE_CTRL_CQ_UPDATE : 0) | 42966e5eadacSSagi Grimberg (wr->send_flags & IB_SEND_SOLICITED ? 42976e5eadacSSagi Grimberg MLX5_WQE_CTRL_SOLICITED : 0); 42986e5eadacSSagi Grimberg 42996e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 43006e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 43016e5eadacSSagi Grimberg 4302b2a232d2SLeon Romanovsky return 0; 43036e5eadacSSagi Grimberg } 43046e5eadacSSagi Grimberg 43056e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 43066e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 43076e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 43086e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 43096e5eadacSSagi Grimberg { 43106e5eadacSSagi Grimberg u8 opmod = 0; 43116e5eadacSSagi Grimberg 43126e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 43136e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 431419098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 43156e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 43166e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 43176e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 43186e5eadacSSagi Grimberg 43196e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 43206e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 43216e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 43226e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 43236e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 43246e5eadacSSagi Grimberg } 43256e5eadacSSagi Grimberg 43266e5eadacSSagi Grimberg 4327e126ba97SEli Cohen int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 4328e126ba97SEli Cohen struct ib_send_wr **bad_wr) 4329e126ba97SEli Cohen { 4330e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4331e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 433289ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4333d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4334e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4335e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4336e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4337d16e91daSHaggai Eran struct mlx5_bf *bf; 4338e126ba97SEli Cohen int uninitialized_var(size); 4339d16e91daSHaggai Eran void *qend; 4340e126ba97SEli Cohen unsigned long flags; 4341e126ba97SEli Cohen unsigned idx; 4342e126ba97SEli Cohen int err = 0; 4343e126ba97SEli Cohen int num_sge; 4344e126ba97SEli Cohen void *seg; 4345e126ba97SEli Cohen int nreq; 4346e126ba97SEli Cohen int i; 4347e126ba97SEli Cohen u8 next_fence = 0; 4348e126ba97SEli Cohen u8 fence; 4349e126ba97SEli Cohen 4350d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4351d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4352d16e91daSHaggai Eran 4353d16e91daSHaggai Eran qp = to_mqp(ibqp); 43545fe9dec0SEli Cohen bf = &qp->bf; 4355d16e91daSHaggai Eran qend = qp->sq.qend; 4356d16e91daSHaggai Eran 4357e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4358e126ba97SEli Cohen 435989ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 436089ea94a7SMaor Gottlieb err = -EIO; 436189ea94a7SMaor Gottlieb *bad_wr = wr; 436289ea94a7SMaor Gottlieb nreq = 0; 436389ea94a7SMaor Gottlieb goto out; 436489ea94a7SMaor Gottlieb } 436589ea94a7SMaor Gottlieb 4366e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4367a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4368e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4369e126ba97SEli Cohen err = -EINVAL; 4370e126ba97SEli Cohen *bad_wr = wr; 4371e126ba97SEli Cohen goto out; 4372e126ba97SEli Cohen } 4373e126ba97SEli Cohen 4374e126ba97SEli Cohen num_sge = wr->num_sge; 4375e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4376e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 437724be409bSChuck Lever err = -EINVAL; 4378e126ba97SEli Cohen *bad_wr = wr; 4379e126ba97SEli Cohen goto out; 4380e126ba97SEli Cohen } 4381e126ba97SEli Cohen 43826e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 43836e5eadacSSagi Grimberg if (err) { 43846e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 43856e5eadacSSagi Grimberg err = -ENOMEM; 43866e5eadacSSagi Grimberg *bad_wr = wr; 43876e5eadacSSagi Grimberg goto out; 43886e5eadacSSagi Grimberg } 4389e126ba97SEli Cohen 43906e8484c5SMax Gurtovoy if (wr->opcode == IB_WR_LOCAL_INV || 43916e8484c5SMax Gurtovoy wr->opcode == IB_WR_REG_MR) { 43926e8484c5SMax Gurtovoy fence = dev->umr_fence; 43936e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 43946e8484c5SMax Gurtovoy } else if (wr->send_flags & IB_SEND_FENCE) { 43956e8484c5SMax Gurtovoy if (qp->next_fence) 43966e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 43976e8484c5SMax Gurtovoy else 43986e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 43996e8484c5SMax Gurtovoy } else { 44006e8484c5SMax Gurtovoy fence = qp->next_fence; 44016e8484c5SMax Gurtovoy } 44026e8484c5SMax Gurtovoy 4403e126ba97SEli Cohen switch (ibqp->qp_type) { 4404e126ba97SEli Cohen case IB_QPT_XRC_INI: 4405e126ba97SEli Cohen xrc = seg; 4406e126ba97SEli Cohen seg += sizeof(*xrc); 4407e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4408e126ba97SEli Cohen /* fall through */ 4409e126ba97SEli Cohen case IB_QPT_RC: 4410e126ba97SEli Cohen switch (wr->opcode) { 4411e126ba97SEli Cohen case IB_WR_RDMA_READ: 4412e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4413e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4414e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4415e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4416e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4417e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4418e126ba97SEli Cohen break; 4419e126ba97SEli Cohen 4420e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4421e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4422e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 442381bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 442481bea28fSEli Cohen err = -ENOSYS; 442581bea28fSEli Cohen *bad_wr = wr; 442681bea28fSEli Cohen goto out; 4427e126ba97SEli Cohen 4428e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4429e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4430e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4431dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4432e126ba97SEli Cohen num_sge = 0; 4433e126ba97SEli Cohen break; 4434e126ba97SEli Cohen 44358a187ee5SSagi Grimberg case IB_WR_REG_MR: 44368a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 44378a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 44388a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 44398a187ee5SSagi Grimberg if (err) { 44408a187ee5SSagi Grimberg *bad_wr = wr; 44418a187ee5SSagi Grimberg goto out; 44428a187ee5SSagi Grimberg } 44438a187ee5SSagi Grimberg num_sge = 0; 44448a187ee5SSagi Grimberg break; 44458a187ee5SSagi Grimberg 4446e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4447e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4448e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4449e6631814SSagi Grimberg 4450e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4451e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4452e6631814SSagi Grimberg if (err) { 4453e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4454e6631814SSagi Grimberg *bad_wr = wr; 4455e6631814SSagi Grimberg goto out; 4456e6631814SSagi Grimberg } 4457e6631814SSagi Grimberg 44586e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 44596e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4460e6631814SSagi Grimberg /* 4461e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4462e6631814SSagi Grimberg * on error 4463e6631814SSagi Grimberg */ 4464e6631814SSagi Grimberg wr->send_flags &= ~IB_SEND_SIGNALED; 4465e6631814SSagi Grimberg wr->send_flags |= IB_SEND_SOLICITED; 4466e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4467e6631814SSagi Grimberg &idx, &size, nreq); 4468e6631814SSagi Grimberg if (err) { 4469e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4470e6631814SSagi Grimberg err = -ENOMEM; 4471e6631814SSagi Grimberg *bad_wr = wr; 4472e6631814SSagi Grimberg goto out; 4473e6631814SSagi Grimberg } 4474e6631814SSagi Grimberg 4475e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4476e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4477e6631814SSagi Grimberg &size); 4478e6631814SSagi Grimberg if (err) { 4479e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4480e6631814SSagi Grimberg *bad_wr = wr; 4481e6631814SSagi Grimberg goto out; 4482e6631814SSagi Grimberg } 4483e6631814SSagi Grimberg 44846e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 44856e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 4486e6631814SSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, 4487e6631814SSagi Grimberg &idx, &size, nreq); 4488e6631814SSagi Grimberg if (err) { 4489e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4490e6631814SSagi Grimberg err = -ENOMEM; 4491e6631814SSagi Grimberg *bad_wr = wr; 4492e6631814SSagi Grimberg goto out; 4493e6631814SSagi Grimberg } 4494e6631814SSagi Grimberg 4495e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4496e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4497e6631814SSagi Grimberg &size); 4498e6631814SSagi Grimberg if (err) { 4499e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4500e6631814SSagi Grimberg *bad_wr = wr; 4501e6631814SSagi Grimberg goto out; 4502e6631814SSagi Grimberg } 4503e6631814SSagi Grimberg 45046e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 45056e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 45066e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4507e6631814SSagi Grimberg num_sge = 0; 4508e6631814SSagi Grimberg goto skip_psv; 4509e6631814SSagi Grimberg 4510e126ba97SEli Cohen default: 4511e126ba97SEli Cohen break; 4512e126ba97SEli Cohen } 4513e126ba97SEli Cohen break; 4514e126ba97SEli Cohen 4515e126ba97SEli Cohen case IB_QPT_UC: 4516e126ba97SEli Cohen switch (wr->opcode) { 4517e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4518e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4519e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4520e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4521e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4522e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4523e126ba97SEli Cohen break; 4524e126ba97SEli Cohen 4525e126ba97SEli Cohen default: 4526e126ba97SEli Cohen break; 4527e126ba97SEli Cohen } 4528e126ba97SEli Cohen break; 4529e126ba97SEli Cohen 4530e126ba97SEli Cohen case IB_QPT_SMI: 45311e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 45321e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 45331e0e50b6SMaor Gottlieb err = -EPERM; 45341e0e50b6SMaor Gottlieb *bad_wr = wr; 45351e0e50b6SMaor Gottlieb goto out; 45361e0e50b6SMaor Gottlieb } 4537f6b1ee34SBart Van Assche /* fall through */ 4538d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4539e126ba97SEli Cohen set_datagram_seg(seg, wr); 4540e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4541e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4542e126ba97SEli Cohen if (unlikely((seg == qend))) 4543e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4544e126ba97SEli Cohen break; 4545f0313965SErez Shitrit case IB_QPT_UD: 4546f0313965SErez Shitrit set_datagram_seg(seg, wr); 4547f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4548f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4549e126ba97SEli Cohen 4550f0313965SErez Shitrit if (unlikely((seg == qend))) 4551f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4552f0313965SErez Shitrit 4553f0313965SErez Shitrit /* handle qp that supports ud offload */ 4554f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4555f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4556f0313965SErez Shitrit 4557f0313965SErez Shitrit pad = seg; 4558f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4559f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4560f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4561f0313965SErez Shitrit 4562f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4563f0313965SErez Shitrit 4564f0313965SErez Shitrit if (unlikely((seg == qend))) 4565f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4566f0313965SErez Shitrit } 4567f0313965SErez Shitrit break; 4568e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4569e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4570e126ba97SEli Cohen err = -EINVAL; 4571e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4572e126ba97SEli Cohen goto out; 4573e126ba97SEli Cohen } 4574e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4575e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4576c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4577c8d75a98SMajd Dibbiny if (unlikely(err)) 4578c8d75a98SMajd Dibbiny goto out; 4579e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4580e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4581e126ba97SEli Cohen if (unlikely((seg == qend))) 4582e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4583e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4584e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4585e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4586e126ba97SEli Cohen if (unlikely((seg == qend))) 4587e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4588e126ba97SEli Cohen break; 4589e126ba97SEli Cohen 4590e126ba97SEli Cohen default: 4591e126ba97SEli Cohen break; 4592e126ba97SEli Cohen } 4593e126ba97SEli Cohen 4594e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4595e126ba97SEli Cohen int uninitialized_var(sz); 4596e126ba97SEli Cohen 4597e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4598e126ba97SEli Cohen if (unlikely(err)) { 4599e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4600e126ba97SEli Cohen *bad_wr = wr; 4601e126ba97SEli Cohen goto out; 4602e126ba97SEli Cohen } 4603e126ba97SEli Cohen size += sz; 4604e126ba97SEli Cohen } else { 4605e126ba97SEli Cohen dpseg = seg; 4606e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4607e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4608e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4609e126ba97SEli Cohen dpseg = seg; 4610e126ba97SEli Cohen } 4611e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4612e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4613e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4614e126ba97SEli Cohen dpseg++; 4615e126ba97SEli Cohen } 4616e126ba97SEli Cohen } 4617e126ba97SEli Cohen } 4618e126ba97SEli Cohen 46196e8484c5SMax Gurtovoy qp->next_fence = next_fence; 46206e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 46216e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4622e6631814SSagi Grimberg skip_psv: 4623e126ba97SEli Cohen if (0) 4624e126ba97SEli Cohen dump_wqe(qp, idx, size); 4625e126ba97SEli Cohen } 4626e126ba97SEli Cohen 4627e126ba97SEli Cohen out: 4628e126ba97SEli Cohen if (likely(nreq)) { 4629e126ba97SEli Cohen qp->sq.head += nreq; 4630e126ba97SEli Cohen 4631e126ba97SEli Cohen /* Make sure that descriptors are written before 4632e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4633e126ba97SEli Cohen */ 4634e126ba97SEli Cohen wmb(); 4635e126ba97SEli Cohen 4636e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4637e126ba97SEli Cohen 4638ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4639ada388f7SEli Cohen * we hit doorbell */ 4640ada388f7SEli Cohen wmb(); 4641ada388f7SEli Cohen 46425fe9dec0SEli Cohen /* currently we support only regular doorbells */ 46435fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4644e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4645e126ba97SEli Cohen * and reach the HCA out of order. 4646e126ba97SEli Cohen */ 4647e126ba97SEli Cohen mmiowb(); 4648e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4649e126ba97SEli Cohen } 4650e126ba97SEli Cohen 4651e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4652e126ba97SEli Cohen 4653e126ba97SEli Cohen return err; 4654e126ba97SEli Cohen } 4655e126ba97SEli Cohen 4656e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4657e126ba97SEli Cohen { 4658e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4659e126ba97SEli Cohen } 4660e126ba97SEli Cohen 4661e126ba97SEli Cohen int mlx5_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 4662e126ba97SEli Cohen struct ib_recv_wr **bad_wr) 4663e126ba97SEli Cohen { 4664e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4665e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4666e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 466789ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 466889ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4669e126ba97SEli Cohen unsigned long flags; 4670e126ba97SEli Cohen int err = 0; 4671e126ba97SEli Cohen int nreq; 4672e126ba97SEli Cohen int ind; 4673e126ba97SEli Cohen int i; 4674e126ba97SEli Cohen 4675d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4676d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4677d16e91daSHaggai Eran 4678e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4679e126ba97SEli Cohen 468089ea94a7SMaor Gottlieb if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 468189ea94a7SMaor Gottlieb err = -EIO; 468289ea94a7SMaor Gottlieb *bad_wr = wr; 468389ea94a7SMaor Gottlieb nreq = 0; 468489ea94a7SMaor Gottlieb goto out; 468589ea94a7SMaor Gottlieb } 468689ea94a7SMaor Gottlieb 4687e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4688e126ba97SEli Cohen 4689e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4690e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4691e126ba97SEli Cohen err = -ENOMEM; 4692e126ba97SEli Cohen *bad_wr = wr; 4693e126ba97SEli Cohen goto out; 4694e126ba97SEli Cohen } 4695e126ba97SEli Cohen 4696e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4697e126ba97SEli Cohen err = -EINVAL; 4698e126ba97SEli Cohen *bad_wr = wr; 4699e126ba97SEli Cohen goto out; 4700e126ba97SEli Cohen } 4701e126ba97SEli Cohen 4702e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4703e126ba97SEli Cohen if (qp->wq_sig) 4704e126ba97SEli Cohen scat++; 4705e126ba97SEli Cohen 4706e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 4707e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 4708e126ba97SEli Cohen 4709e126ba97SEli Cohen if (i < qp->rq.max_gs) { 4710e126ba97SEli Cohen scat[i].byte_count = 0; 4711e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 4712e126ba97SEli Cohen scat[i].addr = 0; 4713e126ba97SEli Cohen } 4714e126ba97SEli Cohen 4715e126ba97SEli Cohen if (qp->wq_sig) { 4716e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 4717e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 4718e126ba97SEli Cohen } 4719e126ba97SEli Cohen 4720e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 4721e126ba97SEli Cohen 4722e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 4723e126ba97SEli Cohen } 4724e126ba97SEli Cohen 4725e126ba97SEli Cohen out: 4726e126ba97SEli Cohen if (likely(nreq)) { 4727e126ba97SEli Cohen qp->rq.head += nreq; 4728e126ba97SEli Cohen 4729e126ba97SEli Cohen /* Make sure that descriptors are written before 4730e126ba97SEli Cohen * doorbell record. 4731e126ba97SEli Cohen */ 4732e126ba97SEli Cohen wmb(); 4733e126ba97SEli Cohen 4734e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 4735e126ba97SEli Cohen } 4736e126ba97SEli Cohen 4737e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 4738e126ba97SEli Cohen 4739e126ba97SEli Cohen return err; 4740e126ba97SEli Cohen } 4741e126ba97SEli Cohen 4742e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 4743e126ba97SEli Cohen { 4744e126ba97SEli Cohen switch (mlx5_state) { 4745e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 4746e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 4747e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 4748e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 4749e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 4750e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 4751e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 4752e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 4753e126ba97SEli Cohen default: return -1; 4754e126ba97SEli Cohen } 4755e126ba97SEli Cohen } 4756e126ba97SEli Cohen 4757e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 4758e126ba97SEli Cohen { 4759e126ba97SEli Cohen switch (mlx5_mig_state) { 4760e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 4761e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 4762e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 4763e126ba97SEli Cohen default: return -1; 4764e126ba97SEli Cohen } 4765e126ba97SEli Cohen } 4766e126ba97SEli Cohen 4767e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 4768e126ba97SEli Cohen { 4769e126ba97SEli Cohen int ib_flags = 0; 4770e126ba97SEli Cohen 4771e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 4772e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 4773e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 4774e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 4775e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 4776e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 4777e126ba97SEli Cohen 4778e126ba97SEli Cohen return ib_flags; 4779e126ba97SEli Cohen } 4780e126ba97SEli Cohen 478138349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 4782d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 4783e126ba97SEli Cohen struct mlx5_qp_path *path) 4784e126ba97SEli Cohen { 4785e126ba97SEli Cohen 4786d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 4787e126ba97SEli Cohen 4788e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 4789e126ba97SEli Cohen return; 4790e126ba97SEli Cohen 4791ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 4792ae59c3f0SLeon Romanovsky 4793d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 4794d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 4795e126ba97SEli Cohen 4796d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 4797d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 4798d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 4799d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 4800d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 4801d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 4802d8966fcdSDasaratharaman Chandramouli 4803d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 4804d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 4805d8966fcdSDasaratharaman Chandramouli path->mgid_index, 4806d8966fcdSDasaratharaman Chandramouli path->hop_limit, 4807d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 4808d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 4809e126ba97SEli Cohen } 4810e126ba97SEli Cohen } 4811e126ba97SEli Cohen 48126d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 48136d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 48146d2f89dfSmajd@mellanox.com u8 *sq_state) 4815e126ba97SEli Cohen { 48166d2f89dfSmajd@mellanox.com void *out; 48176d2f89dfSmajd@mellanox.com void *sqc; 48186d2f89dfSmajd@mellanox.com int inlen; 48196d2f89dfSmajd@mellanox.com int err; 48206d2f89dfSmajd@mellanox.com 48216d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_sq_out); 48221b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 48236d2f89dfSmajd@mellanox.com if (!out) 48246d2f89dfSmajd@mellanox.com return -ENOMEM; 48256d2f89dfSmajd@mellanox.com 48266d2f89dfSmajd@mellanox.com err = mlx5_core_query_sq(dev->mdev, sq->base.mqp.qpn, out); 48276d2f89dfSmajd@mellanox.com if (err) 48286d2f89dfSmajd@mellanox.com goto out; 48296d2f89dfSmajd@mellanox.com 48306d2f89dfSmajd@mellanox.com sqc = MLX5_ADDR_OF(query_sq_out, out, sq_context); 48316d2f89dfSmajd@mellanox.com *sq_state = MLX5_GET(sqc, sqc, state); 48326d2f89dfSmajd@mellanox.com sq->state = *sq_state; 48336d2f89dfSmajd@mellanox.com 48346d2f89dfSmajd@mellanox.com out: 48356d2f89dfSmajd@mellanox.com kvfree(out); 48366d2f89dfSmajd@mellanox.com return err; 48376d2f89dfSmajd@mellanox.com } 48386d2f89dfSmajd@mellanox.com 48396d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 48406d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 48416d2f89dfSmajd@mellanox.com u8 *rq_state) 48426d2f89dfSmajd@mellanox.com { 48436d2f89dfSmajd@mellanox.com void *out; 48446d2f89dfSmajd@mellanox.com void *rqc; 48456d2f89dfSmajd@mellanox.com int inlen; 48466d2f89dfSmajd@mellanox.com int err; 48476d2f89dfSmajd@mellanox.com 48486d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 48491b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 48506d2f89dfSmajd@mellanox.com if (!out) 48516d2f89dfSmajd@mellanox.com return -ENOMEM; 48526d2f89dfSmajd@mellanox.com 48536d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 48546d2f89dfSmajd@mellanox.com if (err) 48556d2f89dfSmajd@mellanox.com goto out; 48566d2f89dfSmajd@mellanox.com 48576d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 48586d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 48596d2f89dfSmajd@mellanox.com rq->state = *rq_state; 48606d2f89dfSmajd@mellanox.com 48616d2f89dfSmajd@mellanox.com out: 48626d2f89dfSmajd@mellanox.com kvfree(out); 48636d2f89dfSmajd@mellanox.com return err; 48646d2f89dfSmajd@mellanox.com } 48656d2f89dfSmajd@mellanox.com 48666d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 48676d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 48686d2f89dfSmajd@mellanox.com { 48696d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 48706d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 48716d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 48726d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 48736d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 48746d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 48756d2f89dfSmajd@mellanox.com }, 48766d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 48776d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 48786d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 48796d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 48806d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 48816d2f89dfSmajd@mellanox.com }, 48826d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 48836d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 48846d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 48856d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 48866d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 48876d2f89dfSmajd@mellanox.com }, 48886d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 48896d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 48906d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 48916d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 48926d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 48936d2f89dfSmajd@mellanox.com }, 48946d2f89dfSmajd@mellanox.com }; 48956d2f89dfSmajd@mellanox.com 48966d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 48976d2f89dfSmajd@mellanox.com 48986d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 48996d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 49006d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 49016d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 49026d2f89dfSmajd@mellanox.com return -EINVAL; 49036d2f89dfSmajd@mellanox.com } 49046d2f89dfSmajd@mellanox.com 49056d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 49066d2f89dfSmajd@mellanox.com *qp_state = qp->state; 49076d2f89dfSmajd@mellanox.com 49086d2f89dfSmajd@mellanox.com return 0; 49096d2f89dfSmajd@mellanox.com } 49106d2f89dfSmajd@mellanox.com 49116d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 49126d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 49136d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 49146d2f89dfSmajd@mellanox.com { 49156d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 49166d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 49176d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 49186d2f89dfSmajd@mellanox.com int err; 49196d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 49206d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 49216d2f89dfSmajd@mellanox.com 49226d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 49236d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 49246d2f89dfSmajd@mellanox.com if (err) 49256d2f89dfSmajd@mellanox.com return err; 49266d2f89dfSmajd@mellanox.com } 49276d2f89dfSmajd@mellanox.com 49286d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 49296d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 49306d2f89dfSmajd@mellanox.com if (err) 49316d2f89dfSmajd@mellanox.com return err; 49326d2f89dfSmajd@mellanox.com } 49336d2f89dfSmajd@mellanox.com 49346d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 49356d2f89dfSmajd@mellanox.com raw_packet_qp_state); 49366d2f89dfSmajd@mellanox.com } 49376d2f89dfSmajd@mellanox.com 49386d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 49396d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 49406d2f89dfSmajd@mellanox.com { 494109a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 4942e126ba97SEli Cohen struct mlx5_qp_context *context; 4943e126ba97SEli Cohen int mlx5_state; 494409a7d9ecSSaeed Mahameed u32 *outb; 4945e126ba97SEli Cohen int err = 0; 4946e126ba97SEli Cohen 494709a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 49486d2f89dfSmajd@mellanox.com if (!outb) 49496d2f89dfSmajd@mellanox.com return -ENOMEM; 49506d2f89dfSmajd@mellanox.com 495119098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 495209a7d9ecSSaeed Mahameed outlen); 4953e126ba97SEli Cohen if (err) 49546d2f89dfSmajd@mellanox.com goto out; 4955e126ba97SEli Cohen 495609a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 495709a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 495809a7d9ecSSaeed Mahameed 4959e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 4960e126ba97SEli Cohen 4961e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 4962e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 4963e126ba97SEli Cohen qp_attr->path_mig_state = 4964e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 4965e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 4966e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 4967e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 4968e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 4969e126ba97SEli Cohen qp_attr->qp_access_flags = 4970e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 4971e126ba97SEli Cohen 4972e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 497338349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 497438349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 4975d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 4976d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 4977d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 4978d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 4979e126ba97SEli Cohen } 4980e126ba97SEli Cohen 4981d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 4982e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 4983e126ba97SEli Cohen 4984e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 4985e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 4986e126ba97SEli Cohen 4987e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 4988e126ba97SEli Cohen 4989e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 4990e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 4991e126ba97SEli Cohen qp_attr->min_rnr_timer = 4992e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 4993e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 4994e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 4995e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 4996e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 49976d2f89dfSmajd@mellanox.com 49986d2f89dfSmajd@mellanox.com out: 49996d2f89dfSmajd@mellanox.com kfree(outb); 50006d2f89dfSmajd@mellanox.com return err; 50016d2f89dfSmajd@mellanox.com } 50026d2f89dfSmajd@mellanox.com 5003776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5004776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5005776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5006776a3906SMoni Shoua { 5007776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5008776a3906SMoni Shoua u32 *out; 5009776a3906SMoni Shoua u32 access_flags = 0; 5010776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5011776a3906SMoni Shoua void *dctc; 5012776a3906SMoni Shoua int err; 5013776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5014776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5015776a3906SMoni Shoua IB_QP_PORT | 5016776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5017776a3906SMoni Shoua IB_QP_AV | 5018776a3906SMoni Shoua IB_QP_PATH_MTU | 5019776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5020776a3906SMoni Shoua 5021776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5022776a3906SMoni Shoua return -EINVAL; 5023776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5024776a3906SMoni Shoua return -EINVAL; 5025776a3906SMoni Shoua 5026776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5027776a3906SMoni Shoua if (!out) 5028776a3906SMoni Shoua return -ENOMEM; 5029776a3906SMoni Shoua 5030776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5031776a3906SMoni Shoua if (err) 5032776a3906SMoni Shoua goto out; 5033776a3906SMoni Shoua 5034776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5035776a3906SMoni Shoua 5036776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5037776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5038776a3906SMoni Shoua 5039776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5040776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5041776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5042776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5043776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5044776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5045776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5046776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5047776a3906SMoni Shoua } 5048776a3906SMoni Shoua 5049776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5050776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5051776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5052776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5053776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5054776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5055776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5056776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5057776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5058776a3906SMoni Shoua } 5059776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5060776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5061776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5062776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5063776a3906SMoni Shoua out: 5064776a3906SMoni Shoua kfree(out); 5065776a3906SMoni Shoua return err; 5066776a3906SMoni Shoua } 5067776a3906SMoni Shoua 50686d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 50696d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 50706d2f89dfSmajd@mellanox.com { 50716d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 50726d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 50736d2f89dfSmajd@mellanox.com int err = 0; 50746d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 50756d2f89dfSmajd@mellanox.com 507628d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 507728d61370SYishai Hadas return -ENOSYS; 507828d61370SYishai Hadas 5079d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5080d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5081d16e91daSHaggai Eran qp_init_attr); 5082d16e91daSHaggai Eran 5083c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5084c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5085c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5086c2e53b2cSYishai Hadas 5087776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5088776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5089776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5090776a3906SMoni Shoua 50916d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 50926d2f89dfSmajd@mellanox.com 5093c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5094c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 50956d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 50966d2f89dfSmajd@mellanox.com if (err) 50976d2f89dfSmajd@mellanox.com goto out; 50986d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 50996d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 51006d2f89dfSmajd@mellanox.com } else { 51016d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 51026d2f89dfSmajd@mellanox.com if (err) 51036d2f89dfSmajd@mellanox.com goto out; 51046d2f89dfSmajd@mellanox.com } 51056d2f89dfSmajd@mellanox.com 51066d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5107e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5108e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5109e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5110e126ba97SEli Cohen 5111e126ba97SEli Cohen if (!ibqp->uobject) { 51120540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5113e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 51140540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5115e126ba97SEli Cohen } else { 5116e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5117e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5118e126ba97SEli Cohen } 5119e126ba97SEli Cohen 51200540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 51210540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 51220540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 51230540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 51240540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5125e126ba97SEli Cohen 5126e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5127e126ba97SEli Cohen 5128e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5129e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5130e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5131e126ba97SEli Cohen 5132051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5133051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5134051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5135051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5136051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5137051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5138b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5139b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5140051f2630SLeon Romanovsky 5141e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5142e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5143e126ba97SEli Cohen 5144e126ba97SEli Cohen out: 5145e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5146e126ba97SEli Cohen return err; 5147e126ba97SEli Cohen } 5148e126ba97SEli Cohen 5149e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5150e126ba97SEli Cohen struct ib_ucontext *context, 5151e126ba97SEli Cohen struct ib_udata *udata) 5152e126ba97SEli Cohen { 5153e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5154e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5155e126ba97SEli Cohen int err; 5156e126ba97SEli Cohen 5157938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5158e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5159e126ba97SEli Cohen 5160e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5161e126ba97SEli Cohen if (!xrcd) 5162e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5163e126ba97SEli Cohen 51649603b61dSJack Morgenstein err = mlx5_core_xrcd_alloc(dev->mdev, &xrcd->xrcdn); 5165e126ba97SEli Cohen if (err) { 5166e126ba97SEli Cohen kfree(xrcd); 5167e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5168e126ba97SEli Cohen } 5169e126ba97SEli Cohen 5170e126ba97SEli Cohen return &xrcd->ibxrcd; 5171e126ba97SEli Cohen } 5172e126ba97SEli Cohen 5173e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5174e126ba97SEli Cohen { 5175e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5176e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5177e126ba97SEli Cohen int err; 5178e126ba97SEli Cohen 51799603b61dSJack Morgenstein err = mlx5_core_xrcd_dealloc(dev->mdev, xrcdn); 5180b081808aSLeon Romanovsky if (err) 5181e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5182e126ba97SEli Cohen 5183e126ba97SEli Cohen kfree(xrcd); 5184e126ba97SEli Cohen return 0; 5185e126ba97SEli Cohen } 518679b20a6cSYishai Hadas 5187350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5188350d0e4cSYishai Hadas { 5189350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5190350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5191350d0e4cSYishai Hadas struct ib_event event; 5192350d0e4cSYishai Hadas 5193350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5194350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5195350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5196350d0e4cSYishai Hadas switch (type) { 5197350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5198350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5199350d0e4cSYishai Hadas break; 5200350d0e4cSYishai Hadas default: 5201350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5202350d0e4cSYishai Hadas return; 5203350d0e4cSYishai Hadas } 5204350d0e4cSYishai Hadas 5205350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5206350d0e4cSYishai Hadas } 5207350d0e4cSYishai Hadas } 5208350d0e4cSYishai Hadas 520903404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 521003404e8aSMaor Gottlieb { 521103404e8aSMaor Gottlieb int err = 0; 521203404e8aSMaor Gottlieb 521303404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 521403404e8aSMaor Gottlieb if (dev->delay_drop.activate) 521503404e8aSMaor Gottlieb goto out; 521603404e8aSMaor Gottlieb 521703404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 521803404e8aSMaor Gottlieb if (err) 521903404e8aSMaor Gottlieb goto out; 522003404e8aSMaor Gottlieb 522103404e8aSMaor Gottlieb dev->delay_drop.activate = true; 522203404e8aSMaor Gottlieb out: 522303404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5224fe248c3aSMaor Gottlieb 5225fe248c3aSMaor Gottlieb if (!err) 5226fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 522703404e8aSMaor Gottlieb return err; 522803404e8aSMaor Gottlieb } 522903404e8aSMaor Gottlieb 523079b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 523179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 523279b20a6cSYishai Hadas { 523379b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 52344be6da1eSNoa Osherovich int has_net_offloads; 523579b20a6cSYishai Hadas __be64 *rq_pas0; 523679b20a6cSYishai Hadas void *in; 523779b20a6cSYishai Hadas void *rqc; 523879b20a6cSYishai Hadas void *wq; 523979b20a6cSYishai Hadas int inlen; 524079b20a6cSYishai Hadas int err; 524179b20a6cSYishai Hadas 524279b20a6cSYishai Hadas dev = to_mdev(pd->device); 524379b20a6cSYishai Hadas 524479b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 52451b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 524679b20a6cSYishai Hadas if (!in) 524779b20a6cSYishai Hadas return -ENOMEM; 524879b20a6cSYishai Hadas 524979b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 525079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 525179b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 525279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 525379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 525479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 525579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 525679b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5257ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5258ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5259ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5260b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5261b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5262b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5263b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5264b1383aa6SNoa Osherovich goto out; 5265b1383aa6SNoa Osherovich } else { 526679b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5267b1383aa6SNoa Osherovich } 5268b1383aa6SNoa Osherovich } 526979b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5270ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5271ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5272ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5273ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5274ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5275ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5276ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5277ccc87087SNoa Osherovich } 527879b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 527979b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 528079b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 528179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 528279b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 528379b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 52844be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5285b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 52864be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5287b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5288b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5289b1f74a84SNoa Osherovich goto out; 5290b1f74a84SNoa Osherovich } 5291b1f74a84SNoa Osherovich } else { 5292b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5293b1f74a84SNoa Osherovich } 52944be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 52954be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 52964be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 52974be6da1eSNoa Osherovich err = -EOPNOTSUPP; 52984be6da1eSNoa Osherovich goto out; 52994be6da1eSNoa Osherovich } 53004be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 53014be6da1eSNoa Osherovich } 530203404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 530303404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 530403404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 530503404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 530603404e8aSMaor Gottlieb err = -EOPNOTSUPP; 530703404e8aSMaor Gottlieb goto out; 530803404e8aSMaor Gottlieb } 530903404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 531003404e8aSMaor Gottlieb } 531179b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 531279b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5313350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 531403404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 531503404e8aSMaor Gottlieb err = set_delay_drop(dev); 531603404e8aSMaor Gottlieb if (err) { 531703404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 531803404e8aSMaor Gottlieb err); 531903404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 532003404e8aSMaor Gottlieb } else { 532103404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 532203404e8aSMaor Gottlieb } 532303404e8aSMaor Gottlieb } 5324b1f74a84SNoa Osherovich out: 532579b20a6cSYishai Hadas kvfree(in); 532679b20a6cSYishai Hadas return err; 532779b20a6cSYishai Hadas } 532879b20a6cSYishai Hadas 532979b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 533079b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 533179b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 533279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 533379b20a6cSYishai Hadas { 533479b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 533579b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 533679b20a6cSYishai Hadas return -EINVAL; 533779b20a6cSYishai Hadas 533879b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 533979b20a6cSYishai Hadas return -EINVAL; 534079b20a6cSYishai Hadas 534179b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 534279b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 534379b20a6cSYishai Hadas rwq->buf_size = (rwq->wqe_count << rwq->wqe_shift); 534479b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 534579b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 534679b20a6cSYishai Hadas return 0; 534779b20a6cSYishai Hadas } 534879b20a6cSYishai Hadas 534979b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 535079b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 535179b20a6cSYishai Hadas struct ib_udata *udata, 535279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 535379b20a6cSYishai Hadas { 535479b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 535579b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 535679b20a6cSYishai Hadas int err; 535779b20a6cSYishai Hadas size_t required_cmd_sz; 535879b20a6cSYishai Hadas 5359ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5360ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 536179b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 536279b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 536379b20a6cSYishai Hadas return -EINVAL; 536479b20a6cSYishai Hadas } 536579b20a6cSYishai Hadas 536679b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 536779b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 536879b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 536979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 537079b20a6cSYishai Hadas return -EOPNOTSUPP; 537179b20a6cSYishai Hadas } 537279b20a6cSYishai Hadas 537379b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 537479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 537579b20a6cSYishai Hadas return -EFAULT; 537679b20a6cSYishai Hadas } 537779b20a6cSYishai Hadas 5378ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 537979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 538079b20a6cSYishai Hadas return -EOPNOTSUPP; 5381ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5382ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5383ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 538479b20a6cSYishai Hadas return -EOPNOTSUPP; 538579b20a6cSYishai Hadas } 5386ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5387ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5388ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5389ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5390ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5391ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5392ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5393ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5394ccc87087SNoa Osherovich return -EINVAL; 5395ccc87087SNoa Osherovich } 5396ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5397ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5398ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5399ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5400ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5401ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5402ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5403ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5404ccc87087SNoa Osherovich return -EINVAL; 5405ccc87087SNoa Osherovich } 5406ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5407ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5408ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5409ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5410ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5411ccc87087SNoa Osherovich } 541279b20a6cSYishai Hadas 541379b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 541479b20a6cSYishai Hadas if (err) { 541579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 541679b20a6cSYishai Hadas return err; 541779b20a6cSYishai Hadas } 541879b20a6cSYishai Hadas 541979b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 542079b20a6cSYishai Hadas if (err) { 542179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 542279b20a6cSYishai Hadas if (err) 542379b20a6cSYishai Hadas return err; 542479b20a6cSYishai Hadas } 542579b20a6cSYishai Hadas 542679b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 542779b20a6cSYishai Hadas return 0; 542879b20a6cSYishai Hadas } 542979b20a6cSYishai Hadas 543079b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 543179b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 543279b20a6cSYishai Hadas struct ib_udata *udata) 543379b20a6cSYishai Hadas { 543479b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 543579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 543679b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 543779b20a6cSYishai Hadas size_t min_resp_len; 543879b20a6cSYishai Hadas int err; 543979b20a6cSYishai Hadas 544079b20a6cSYishai Hadas if (!udata) 544179b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 544279b20a6cSYishai Hadas 544379b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 544479b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 544579b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 544679b20a6cSYishai Hadas 544779b20a6cSYishai Hadas dev = to_mdev(pd->device); 544879b20a6cSYishai Hadas switch (init_attr->wq_type) { 544979b20a6cSYishai Hadas case IB_WQT_RQ: 545079b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 545179b20a6cSYishai Hadas if (!rwq) 545279b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 545379b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 545479b20a6cSYishai Hadas if (err) 545579b20a6cSYishai Hadas goto err; 545679b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 545779b20a6cSYishai Hadas if (err) 545879b20a6cSYishai Hadas goto err_user_rq; 545979b20a6cSYishai Hadas break; 546079b20a6cSYishai Hadas default: 546179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 546279b20a6cSYishai Hadas init_attr->wq_type); 546379b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 546479b20a6cSYishai Hadas } 546579b20a6cSYishai Hadas 5466350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 546779b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 546879b20a6cSYishai Hadas if (udata->outlen) { 546979b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 547079b20a6cSYishai Hadas sizeof(resp.response_length); 547179b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 547279b20a6cSYishai Hadas if (err) 547379b20a6cSYishai Hadas goto err_copy; 547479b20a6cSYishai Hadas } 547579b20a6cSYishai Hadas 5476350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5477350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 547879b20a6cSYishai Hadas return &rwq->ibwq; 547979b20a6cSYishai Hadas 548079b20a6cSYishai Hadas err_copy: 5481350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 548279b20a6cSYishai Hadas err_user_rq: 5483fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 548479b20a6cSYishai Hadas err: 548579b20a6cSYishai Hadas kfree(rwq); 548679b20a6cSYishai Hadas return ERR_PTR(err); 548779b20a6cSYishai Hadas } 548879b20a6cSYishai Hadas 548979b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 549079b20a6cSYishai Hadas { 549179b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 549279b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 549379b20a6cSYishai Hadas 5494350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5495fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 549679b20a6cSYishai Hadas kfree(rwq); 549779b20a6cSYishai Hadas 549879b20a6cSYishai Hadas return 0; 549979b20a6cSYishai Hadas } 550079b20a6cSYishai Hadas 5501c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5502c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5503c5f90929SYishai Hadas struct ib_udata *udata) 5504c5f90929SYishai Hadas { 5505c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5506c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5507c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5508c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5509c5f90929SYishai Hadas size_t min_resp_len; 5510c5f90929SYishai Hadas int inlen; 5511c5f90929SYishai Hadas int err; 5512c5f90929SYishai Hadas int i; 5513c5f90929SYishai Hadas u32 *in; 5514c5f90929SYishai Hadas void *rqtc; 5515c5f90929SYishai Hadas 5516c5f90929SYishai Hadas if (udata->inlen > 0 && 5517c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5518c5f90929SYishai Hadas udata->inlen)) 5519c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5520c5f90929SYishai Hadas 5521efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5522efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5523efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5524efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5525efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5526efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5527efd7f400SMaor Gottlieb } 5528efd7f400SMaor Gottlieb 5529c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5530c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5531c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5532c5f90929SYishai Hadas 5533c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5534c5f90929SYishai Hadas if (!rwq_ind_tbl) 5535c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5536c5f90929SYishai Hadas 5537c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 55381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5539c5f90929SYishai Hadas if (!in) { 5540c5f90929SYishai Hadas err = -ENOMEM; 5541c5f90929SYishai Hadas goto err; 5542c5f90929SYishai Hadas } 5543c5f90929SYishai Hadas 5544c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5545c5f90929SYishai Hadas 5546c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5547c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5548c5f90929SYishai Hadas 5549c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5550c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5551c5f90929SYishai Hadas 5552c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5553c5f90929SYishai Hadas kvfree(in); 5554c5f90929SYishai Hadas 5555c5f90929SYishai Hadas if (err) 5556c5f90929SYishai Hadas goto err; 5557c5f90929SYishai Hadas 5558c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5559c5f90929SYishai Hadas if (udata->outlen) { 5560c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5561c5f90929SYishai Hadas sizeof(resp.response_length); 5562c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5563c5f90929SYishai Hadas if (err) 5564c5f90929SYishai Hadas goto err_copy; 5565c5f90929SYishai Hadas } 5566c5f90929SYishai Hadas 5567c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5568c5f90929SYishai Hadas 5569c5f90929SYishai Hadas err_copy: 5570c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5571c5f90929SYishai Hadas err: 5572c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5573c5f90929SYishai Hadas return ERR_PTR(err); 5574c5f90929SYishai Hadas } 5575c5f90929SYishai Hadas 5576c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5577c5f90929SYishai Hadas { 5578c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5579c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5580c5f90929SYishai Hadas 5581c5f90929SYishai Hadas mlx5_core_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn); 5582c5f90929SYishai Hadas 5583c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5584c5f90929SYishai Hadas return 0; 5585c5f90929SYishai Hadas } 5586c5f90929SYishai Hadas 558779b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 558879b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 558979b20a6cSYishai Hadas { 559079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 559179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 559279b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 559379b20a6cSYishai Hadas size_t required_cmd_sz; 559479b20a6cSYishai Hadas int curr_wq_state; 559579b20a6cSYishai Hadas int wq_state; 559679b20a6cSYishai Hadas int inlen; 559779b20a6cSYishai Hadas int err; 559879b20a6cSYishai Hadas void *rqc; 559979b20a6cSYishai Hadas void *in; 560079b20a6cSYishai Hadas 560179b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 560279b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 560379b20a6cSYishai Hadas return -EINVAL; 560479b20a6cSYishai Hadas 560579b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 560679b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 560779b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 560879b20a6cSYishai Hadas return -EOPNOTSUPP; 560979b20a6cSYishai Hadas 561079b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 561179b20a6cSYishai Hadas return -EFAULT; 561279b20a6cSYishai Hadas 561379b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 561479b20a6cSYishai Hadas return -EOPNOTSUPP; 561579b20a6cSYishai Hadas 561679b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 56171b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 561879b20a6cSYishai Hadas if (!in) 561979b20a6cSYishai Hadas return -ENOMEM; 562079b20a6cSYishai Hadas 562179b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 562279b20a6cSYishai Hadas 562379b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 562479b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 562579b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 562679b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 562779b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 562879b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 562979b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 563079b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 563179b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 563279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 563379b20a6cSYishai Hadas 5634b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5635b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5636b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5637b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5638b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5639b1f74a84SNoa Osherovich "supported\n"); 5640b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5641b1f74a84SNoa Osherovich goto out; 5642b1f74a84SNoa Osherovich } 5643b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5644b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5645b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5646b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5647b1f74a84SNoa Osherovich } 5648b1383aa6SNoa Osherovich 5649b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5650b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5651b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5652b1383aa6SNoa Osherovich goto out; 5653b1383aa6SNoa Osherovich } 5654b1f74a84SNoa Osherovich } 5655b1f74a84SNoa Osherovich 565623a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 565723a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 565823a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 565923a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5660e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5661e1f24a79SParav Pandit dev->port->cnts.set_id); 566223a6964eSMajd Dibbiny } else 566323a6964eSMajd Dibbiny pr_info_once("%s: Receive WQ counters are not supported on current FW\n", 566423a6964eSMajd Dibbiny dev->ib_dev.name); 566523a6964eSMajd Dibbiny } 566623a6964eSMajd Dibbiny 5667350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 566879b20a6cSYishai Hadas if (!err) 566979b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 567079b20a6cSYishai Hadas 5671b1f74a84SNoa Osherovich out: 5672b1f74a84SNoa Osherovich kvfree(in); 567379b20a6cSYishai Hadas return err; 567479b20a6cSYishai Hadas } 5675