xref: /openbmc/linux/drivers/infiniband/hw/mlx5/qp.c (revision 1db86318)
1e126ba97SEli Cohen /*
26cf0a15fSSaeed Mahameed  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3e126ba97SEli Cohen  *
4e126ba97SEli Cohen  * This software is available to you under a choice of one of two
5e126ba97SEli Cohen  * licenses.  You may choose to be licensed under the terms of the GNU
6e126ba97SEli Cohen  * General Public License (GPL) Version 2, available from the file
7e126ba97SEli Cohen  * COPYING in the main directory of this source tree, or the
8e126ba97SEli Cohen  * OpenIB.org BSD license below:
9e126ba97SEli Cohen  *
10e126ba97SEli Cohen  *     Redistribution and use in source and binary forms, with or
11e126ba97SEli Cohen  *     without modification, are permitted provided that the following
12e126ba97SEli Cohen  *     conditions are met:
13e126ba97SEli Cohen  *
14e126ba97SEli Cohen  *      - Redistributions of source code must retain the above
15e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
16e126ba97SEli Cohen  *        disclaimer.
17e126ba97SEli Cohen  *
18e126ba97SEli Cohen  *      - Redistributions in binary form must reproduce the above
19e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
20e126ba97SEli Cohen  *        disclaimer in the documentation and/or other materials
21e126ba97SEli Cohen  *        provided with the distribution.
22e126ba97SEli Cohen  *
23e126ba97SEli Cohen  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e126ba97SEli Cohen  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e126ba97SEli Cohen  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e126ba97SEli Cohen  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e126ba97SEli Cohen  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e126ba97SEli Cohen  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e126ba97SEli Cohen  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e126ba97SEli Cohen  * SOFTWARE.
31e126ba97SEli Cohen  */
32e126ba97SEli Cohen 
33e126ba97SEli Cohen #include <linux/module.h>
34e126ba97SEli Cohen #include <rdma/ib_umem.h>
352811ba51SAchiad Shochat #include <rdma/ib_cache.h>
36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h>
37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h>
38e126ba97SEli Cohen #include "mlx5_ib.h"
39b96c9ddeSMark Bloch #include "ib_rep.h"
40443c1cf9SYishai Hadas #include "cmd.h"
41e126ba97SEli Cohen 
42e126ba97SEli Cohen /* not supported currently */
43e126ba97SEli Cohen static int wq_signature;
44e126ba97SEli Cohen 
45e126ba97SEli Cohen enum {
46e126ba97SEli Cohen 	MLX5_IB_ACK_REQ_FREQ	= 8,
47e126ba97SEli Cohen };
48e126ba97SEli Cohen 
49e126ba97SEli Cohen enum {
50e126ba97SEli Cohen 	MLX5_IB_DEFAULT_SCHED_QUEUE	= 0x83,
51e126ba97SEli Cohen 	MLX5_IB_DEFAULT_QP0_SCHED_QUEUE	= 0x3f,
52e126ba97SEli Cohen 	MLX5_IB_LINK_TYPE_IB		= 0,
53e126ba97SEli Cohen 	MLX5_IB_LINK_TYPE_ETH		= 1
54e126ba97SEli Cohen };
55e126ba97SEli Cohen 
56e126ba97SEli Cohen enum {
57e126ba97SEli Cohen 	MLX5_IB_SQ_STRIDE	= 6,
58064e5262SIdan Burstein 	MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64,
59e126ba97SEli Cohen };
60e126ba97SEli Cohen 
61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = {
62e126ba97SEli Cohen 	[IB_WR_SEND]				= MLX5_OPCODE_SEND,
63f0313965SErez Shitrit 	[IB_WR_LSO]				= MLX5_OPCODE_LSO,
64e126ba97SEli Cohen 	[IB_WR_SEND_WITH_IMM]			= MLX5_OPCODE_SEND_IMM,
65e126ba97SEli Cohen 	[IB_WR_RDMA_WRITE]			= MLX5_OPCODE_RDMA_WRITE,
66e126ba97SEli Cohen 	[IB_WR_RDMA_WRITE_WITH_IMM]		= MLX5_OPCODE_RDMA_WRITE_IMM,
67e126ba97SEli Cohen 	[IB_WR_RDMA_READ]			= MLX5_OPCODE_RDMA_READ,
68e126ba97SEli Cohen 	[IB_WR_ATOMIC_CMP_AND_SWP]		= MLX5_OPCODE_ATOMIC_CS,
69e126ba97SEli Cohen 	[IB_WR_ATOMIC_FETCH_AND_ADD]		= MLX5_OPCODE_ATOMIC_FA,
70e126ba97SEli Cohen 	[IB_WR_SEND_WITH_INV]			= MLX5_OPCODE_SEND_INVAL,
71e126ba97SEli Cohen 	[IB_WR_LOCAL_INV]			= MLX5_OPCODE_UMR,
728a187ee5SSagi Grimberg 	[IB_WR_REG_MR]				= MLX5_OPCODE_UMR,
73e126ba97SEli Cohen 	[IB_WR_MASKED_ATOMIC_CMP_AND_SWP]	= MLX5_OPCODE_ATOMIC_MASKED_CS,
74e126ba97SEli Cohen 	[IB_WR_MASKED_ATOMIC_FETCH_AND_ADD]	= MLX5_OPCODE_ATOMIC_MASKED_FA,
75e126ba97SEli Cohen 	[MLX5_IB_WR_UMR]			= MLX5_OPCODE_UMR,
76e126ba97SEli Cohen };
77e126ba97SEli Cohen 
78f0313965SErez Shitrit struct mlx5_wqe_eth_pad {
79f0313965SErez Shitrit 	u8 rsvd0[16];
80f0313965SErez Shitrit };
81e126ba97SEli Cohen 
82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map {
83eb49ab0cSAlex Vesker 	MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID		= 1UL << 0,
847d29f349SBodong Wang 	MLX5_RAW_QP_RATE_LIMIT			= 1UL << 1,
85eb49ab0cSAlex Vesker };
86eb49ab0cSAlex Vesker 
870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param {
880680efa2SAlex Vesker 	u16 operation;
89eb49ab0cSAlex Vesker 
90eb49ab0cSAlex Vesker 	u32 set_mask; /* raw_qp_set_mask_map */
9161147f39SBodong Wang 
9261147f39SBodong Wang 	struct mlx5_rate_limit rl;
9361147f39SBodong Wang 
94eb49ab0cSAlex Vesker 	u8 rq_q_ctr_id;
95d5ed8ac3SMark Bloch 	u16 port;
960680efa2SAlex Vesker };
970680efa2SAlex Vesker 
9889ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type,
9989ea94a7SMaor Gottlieb 		    struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq,
10089ea94a7SMaor Gottlieb 		    struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq);
10189ea94a7SMaor Gottlieb 
102e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type)
103e126ba97SEli Cohen {
104e126ba97SEli Cohen 	return qp_type == IB_QPT_SMI;
105e126ba97SEli Cohen }
106e126ba97SEli Cohen 
107e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type)
108e126ba97SEli Cohen {
109e126ba97SEli Cohen 	return is_qp0(qp_type) || is_qp1(qp_type);
110e126ba97SEli Cohen }
111e126ba97SEli Cohen 
112c1395a2aSHaggai Eran /**
113fbeb4075SMoni Shoua  * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ
114fbeb4075SMoni Shoua  * to kernel buffer
115c1395a2aSHaggai Eran  *
116fbeb4075SMoni Shoua  * @umem: User space memory where the WQ is
117fbeb4075SMoni Shoua  * @buffer: buffer to copy to
118fbeb4075SMoni Shoua  * @buflen: buffer length
119fbeb4075SMoni Shoua  * @wqe_index: index of WQE to copy from
120fbeb4075SMoni Shoua  * @wq_offset: offset to start of WQ
121fbeb4075SMoni Shoua  * @wq_wqe_cnt: number of WQEs in WQ
122fbeb4075SMoni Shoua  * @wq_wqe_shift: log2 of WQE size
123fbeb4075SMoni Shoua  * @bcnt: number of bytes to copy
124fbeb4075SMoni Shoua  * @bytes_copied: number of bytes to copy (return value)
125c1395a2aSHaggai Eran  *
126fbeb4075SMoni Shoua  * Copies from start of WQE bcnt or less bytes.
127fbeb4075SMoni Shoua  * Does not gurantee to copy the entire WQE.
128c1395a2aSHaggai Eran  *
129fbeb4075SMoni Shoua  * Return: zero on success, or an error code.
130c1395a2aSHaggai Eran  */
131fbeb4075SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem,
132fbeb4075SMoni Shoua 					void *buffer,
133fbeb4075SMoni Shoua 					u32 buflen,
134fbeb4075SMoni Shoua 					int wqe_index,
135fbeb4075SMoni Shoua 					int wq_offset,
136fbeb4075SMoni Shoua 					int wq_wqe_cnt,
137fbeb4075SMoni Shoua 					int wq_wqe_shift,
138fbeb4075SMoni Shoua 					int bcnt,
139fbeb4075SMoni Shoua 					size_t *bytes_copied)
140c1395a2aSHaggai Eran {
141fbeb4075SMoni Shoua 	size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift);
142fbeb4075SMoni Shoua 	size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift);
143fbeb4075SMoni Shoua 	size_t copy_length;
144c1395a2aSHaggai Eran 	int ret;
145c1395a2aSHaggai Eran 
146fbeb4075SMoni Shoua 	/* don't copy more than requested, more than buffer length or
147fbeb4075SMoni Shoua 	 * beyond WQ end
148fbeb4075SMoni Shoua 	 */
149fbeb4075SMoni Shoua 	copy_length = min_t(u32, buflen, wq_end - offset);
150fbeb4075SMoni Shoua 	copy_length = min_t(u32, copy_length, bcnt);
151c1395a2aSHaggai Eran 
152fbeb4075SMoni Shoua 	ret = ib_umem_copy_from(buffer, umem, offset, copy_length);
153c1395a2aSHaggai Eran 	if (ret)
154c1395a2aSHaggai Eran 		return ret;
155c1395a2aSHaggai Eran 
156fbeb4075SMoni Shoua 	if (!ret && bytes_copied)
157fbeb4075SMoni Shoua 		*bytes_copied = copy_length;
158c1395a2aSHaggai Eran 
159fbeb4075SMoni Shoua 	return 0;
160fbeb4075SMoni Shoua }
161fbeb4075SMoni Shoua 
162fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp,
163fbeb4075SMoni Shoua 			     int wqe_index,
164fbeb4075SMoni Shoua 			     void *buffer,
165fbeb4075SMoni Shoua 			     int buflen,
166fbeb4075SMoni Shoua 			     size_t *bc)
167fbeb4075SMoni Shoua {
168fbeb4075SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
169fbeb4075SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
170fbeb4075SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->sq;
171fbeb4075SMoni Shoua 	struct mlx5_wqe_ctrl_seg *ctrl;
172fbeb4075SMoni Shoua 	size_t bytes_copied;
173fbeb4075SMoni Shoua 	size_t bytes_copied2;
174fbeb4075SMoni Shoua 	size_t wqe_length;
175fbeb4075SMoni Shoua 	int ret;
176fbeb4075SMoni Shoua 	int ds;
177fbeb4075SMoni Shoua 
178fbeb4075SMoni Shoua 	if (buflen < sizeof(*ctrl))
179fbeb4075SMoni Shoua 		return -EINVAL;
180fbeb4075SMoni Shoua 
181fbeb4075SMoni Shoua 	/* at first read as much as possible */
182fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
183fbeb4075SMoni Shoua 					   buffer,
184fbeb4075SMoni Shoua 					   buflen,
185fbeb4075SMoni Shoua 					   wqe_index,
186fbeb4075SMoni Shoua 					   wq->offset,
187fbeb4075SMoni Shoua 					   wq->wqe_cnt,
188fbeb4075SMoni Shoua 					   wq->wqe_shift,
189fbeb4075SMoni Shoua 					   buflen,
190fbeb4075SMoni Shoua 					   &bytes_copied);
191fbeb4075SMoni Shoua 	if (ret)
192fbeb4075SMoni Shoua 		return ret;
193fbeb4075SMoni Shoua 
194fbeb4075SMoni Shoua 	/* we need at least control segment size to proceed */
195fbeb4075SMoni Shoua 	if (bytes_copied < sizeof(*ctrl))
196fbeb4075SMoni Shoua 		return -EINVAL;
197fbeb4075SMoni Shoua 
198fbeb4075SMoni Shoua 	ctrl = buffer;
199fbeb4075SMoni Shoua 	ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK;
200c1395a2aSHaggai Eran 	wqe_length = ds * MLX5_WQE_DS_UNITS;
201fbeb4075SMoni Shoua 
202fbeb4075SMoni Shoua 	/* if we copied enough then we are done */
203fbeb4075SMoni Shoua 	if (bytes_copied >= wqe_length) {
204fbeb4075SMoni Shoua 		*bc = bytes_copied;
205fbeb4075SMoni Shoua 		return 0;
206c1395a2aSHaggai Eran 	}
207c1395a2aSHaggai Eran 
208fbeb4075SMoni Shoua 	/* otherwise this a wrapped around wqe
209fbeb4075SMoni Shoua 	 * so read the remaining bytes starting
210fbeb4075SMoni Shoua 	 * from  wqe_index 0
211fbeb4075SMoni Shoua 	 */
212fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
213fbeb4075SMoni Shoua 					   buffer + bytes_copied,
214fbeb4075SMoni Shoua 					   buflen - bytes_copied,
215fbeb4075SMoni Shoua 					   0,
216fbeb4075SMoni Shoua 					   wq->offset,
217fbeb4075SMoni Shoua 					   wq->wqe_cnt,
218fbeb4075SMoni Shoua 					   wq->wqe_shift,
219fbeb4075SMoni Shoua 					   wqe_length - bytes_copied,
220fbeb4075SMoni Shoua 					   &bytes_copied2);
221c1395a2aSHaggai Eran 
222c1395a2aSHaggai Eran 	if (ret)
223c1395a2aSHaggai Eran 		return ret;
224fbeb4075SMoni Shoua 	*bc = bytes_copied + bytes_copied2;
225fbeb4075SMoni Shoua 	return 0;
226fbeb4075SMoni Shoua }
227c1395a2aSHaggai Eran 
228fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp,
229fbeb4075SMoni Shoua 			     int wqe_index,
230fbeb4075SMoni Shoua 			     void *buffer,
231fbeb4075SMoni Shoua 			     int buflen,
232fbeb4075SMoni Shoua 			     size_t *bc)
233fbeb4075SMoni Shoua {
234fbeb4075SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
235fbeb4075SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
236fbeb4075SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->rq;
237fbeb4075SMoni Shoua 	size_t bytes_copied;
238fbeb4075SMoni Shoua 	int ret;
239fbeb4075SMoni Shoua 
240fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
241fbeb4075SMoni Shoua 					   buffer,
242fbeb4075SMoni Shoua 					   buflen,
243fbeb4075SMoni Shoua 					   wqe_index,
244fbeb4075SMoni Shoua 					   wq->offset,
245fbeb4075SMoni Shoua 					   wq->wqe_cnt,
246fbeb4075SMoni Shoua 					   wq->wqe_shift,
247fbeb4075SMoni Shoua 					   buflen,
248fbeb4075SMoni Shoua 					   &bytes_copied);
249fbeb4075SMoni Shoua 
250fbeb4075SMoni Shoua 	if (ret)
251fbeb4075SMoni Shoua 		return ret;
252fbeb4075SMoni Shoua 	*bc = bytes_copied;
253fbeb4075SMoni Shoua 	return 0;
254fbeb4075SMoni Shoua }
255fbeb4075SMoni Shoua 
256fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq,
257fbeb4075SMoni Shoua 			      int wqe_index,
258fbeb4075SMoni Shoua 			      void *buffer,
259fbeb4075SMoni Shoua 			      int buflen,
260fbeb4075SMoni Shoua 			      size_t *bc)
261fbeb4075SMoni Shoua {
262fbeb4075SMoni Shoua 	struct ib_umem *umem = srq->umem;
263fbeb4075SMoni Shoua 	size_t bytes_copied;
264fbeb4075SMoni Shoua 	int ret;
265fbeb4075SMoni Shoua 
266fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
267fbeb4075SMoni Shoua 					   buffer,
268fbeb4075SMoni Shoua 					   buflen,
269fbeb4075SMoni Shoua 					   wqe_index,
270fbeb4075SMoni Shoua 					   0,
271fbeb4075SMoni Shoua 					   srq->msrq.max,
272fbeb4075SMoni Shoua 					   srq->msrq.wqe_shift,
273fbeb4075SMoni Shoua 					   buflen,
274fbeb4075SMoni Shoua 					   &bytes_copied);
275fbeb4075SMoni Shoua 
276fbeb4075SMoni Shoua 	if (ret)
277fbeb4075SMoni Shoua 		return ret;
278fbeb4075SMoni Shoua 	*bc = bytes_copied;
279fbeb4075SMoni Shoua 	return 0;
280c1395a2aSHaggai Eran }
281c1395a2aSHaggai Eran 
282e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type)
283e126ba97SEli Cohen {
284e126ba97SEli Cohen 	struct ib_qp *ibqp = &to_mibqp(qp)->ibqp;
285e126ba97SEli Cohen 	struct ib_event event;
286e126ba97SEli Cohen 
28719098df2Smajd@mellanox.com 	if (type == MLX5_EVENT_TYPE_PATH_MIG) {
28819098df2Smajd@mellanox.com 		/* This event is only valid for trans_qps */
28919098df2Smajd@mellanox.com 		to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port;
29019098df2Smajd@mellanox.com 	}
291e126ba97SEli Cohen 
292e126ba97SEli Cohen 	if (ibqp->event_handler) {
293e126ba97SEli Cohen 		event.device     = ibqp->device;
294e126ba97SEli Cohen 		event.element.qp = ibqp;
295e126ba97SEli Cohen 		switch (type) {
296e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_PATH_MIG:
297e126ba97SEli Cohen 			event.event = IB_EVENT_PATH_MIG;
298e126ba97SEli Cohen 			break;
299e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_COMM_EST:
300e126ba97SEli Cohen 			event.event = IB_EVENT_COMM_EST;
301e126ba97SEli Cohen 			break;
302e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_SQ_DRAINED:
303e126ba97SEli Cohen 			event.event = IB_EVENT_SQ_DRAINED;
304e126ba97SEli Cohen 			break;
305e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
306e126ba97SEli Cohen 			event.event = IB_EVENT_QP_LAST_WQE_REACHED;
307e126ba97SEli Cohen 			break;
308e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
309e126ba97SEli Cohen 			event.event = IB_EVENT_QP_FATAL;
310e126ba97SEli Cohen 			break;
311e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
312e126ba97SEli Cohen 			event.event = IB_EVENT_PATH_MIG_ERR;
313e126ba97SEli Cohen 			break;
314e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
315e126ba97SEli Cohen 			event.event = IB_EVENT_QP_REQ_ERR;
316e126ba97SEli Cohen 			break;
317e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
318e126ba97SEli Cohen 			event.event = IB_EVENT_QP_ACCESS_ERR;
319e126ba97SEli Cohen 			break;
320e126ba97SEli Cohen 		default:
321e126ba97SEli Cohen 			pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn);
322e126ba97SEli Cohen 			return;
323e126ba97SEli Cohen 		}
324e126ba97SEli Cohen 
325e126ba97SEli Cohen 		ibqp->event_handler(&event, ibqp->qp_context);
326e126ba97SEli Cohen 	}
327e126ba97SEli Cohen }
328e126ba97SEli Cohen 
329e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap,
330e126ba97SEli Cohen 		       int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd)
331e126ba97SEli Cohen {
332e126ba97SEli Cohen 	int wqe_size;
333e126ba97SEli Cohen 	int wq_size;
334e126ba97SEli Cohen 
335e126ba97SEli Cohen 	/* Sanity check RQ size before proceeding */
336938fe83cSSaeed Mahameed 	if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)))
337e126ba97SEli Cohen 		return -EINVAL;
338e126ba97SEli Cohen 
339e126ba97SEli Cohen 	if (!has_rq) {
340e126ba97SEli Cohen 		qp->rq.max_gs = 0;
341e126ba97SEli Cohen 		qp->rq.wqe_cnt = 0;
342e126ba97SEli Cohen 		qp->rq.wqe_shift = 0;
3430540d814SNoa Osherovich 		cap->max_recv_wr = 0;
3440540d814SNoa Osherovich 		cap->max_recv_sge = 0;
345e126ba97SEli Cohen 	} else {
346e126ba97SEli Cohen 		if (ucmd) {
347e126ba97SEli Cohen 			qp->rq.wqe_cnt = ucmd->rq_wqe_count;
348002bf228SLeon Romanovsky 			if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift))
349002bf228SLeon Romanovsky 				return -EINVAL;
350e126ba97SEli Cohen 			qp->rq.wqe_shift = ucmd->rq_wqe_shift;
351002bf228SLeon Romanovsky 			if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig)
352002bf228SLeon Romanovsky 				return -EINVAL;
353e126ba97SEli Cohen 			qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig;
354e126ba97SEli Cohen 			qp->rq.max_post = qp->rq.wqe_cnt;
355e126ba97SEli Cohen 		} else {
356e126ba97SEli Cohen 			wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0;
357e126ba97SEli Cohen 			wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg);
358e126ba97SEli Cohen 			wqe_size = roundup_pow_of_two(wqe_size);
359e126ba97SEli Cohen 			wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size;
360e126ba97SEli Cohen 			wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB);
361e126ba97SEli Cohen 			qp->rq.wqe_cnt = wq_size / wqe_size;
362938fe83cSSaeed Mahameed 			if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) {
363e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "wqe_size %d, max %d\n",
364e126ba97SEli Cohen 					    wqe_size,
365938fe83cSSaeed Mahameed 					    MLX5_CAP_GEN(dev->mdev,
366938fe83cSSaeed Mahameed 							 max_wqe_sz_rq));
367e126ba97SEli Cohen 				return -EINVAL;
368e126ba97SEli Cohen 			}
369e126ba97SEli Cohen 			qp->rq.wqe_shift = ilog2(wqe_size);
370e126ba97SEli Cohen 			qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig;
371e126ba97SEli Cohen 			qp->rq.max_post = qp->rq.wqe_cnt;
372e126ba97SEli Cohen 		}
373e126ba97SEli Cohen 	}
374e126ba97SEli Cohen 
375e126ba97SEli Cohen 	return 0;
376e126ba97SEli Cohen }
377e126ba97SEli Cohen 
378f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr)
379e126ba97SEli Cohen {
380618af384SAndi Shyti 	int size = 0;
381e126ba97SEli Cohen 
382f0313965SErez Shitrit 	switch (attr->qp_type) {
383e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
384b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_xrc_seg);
385e126ba97SEli Cohen 		/* fall through */
386e126ba97SEli Cohen 	case IB_QPT_RC:
387e126ba97SEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
38875c1657eSLeon Romanovsky 			max(sizeof(struct mlx5_wqe_atomic_seg) +
38975c1657eSLeon Romanovsky 			    sizeof(struct mlx5_wqe_raddr_seg),
39075c1657eSLeon Romanovsky 			    sizeof(struct mlx5_wqe_umr_ctrl_seg) +
391064e5262SIdan Burstein 			    sizeof(struct mlx5_mkey_seg) +
392064e5262SIdan Burstein 			    MLX5_IB_SQ_UMR_INLINE_THRESHOLD /
393064e5262SIdan Burstein 			    MLX5_IB_UMR_OCTOWORD);
394e126ba97SEli Cohen 		break;
395e126ba97SEli Cohen 
396b125a54bSEli Cohen 	case IB_QPT_XRC_TGT:
397b125a54bSEli Cohen 		return 0;
398b125a54bSEli Cohen 
399e126ba97SEli Cohen 	case IB_QPT_UC:
400b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
40175c1657eSLeon Romanovsky 			max(sizeof(struct mlx5_wqe_raddr_seg),
4029e65dc37SEli Cohen 			    sizeof(struct mlx5_wqe_umr_ctrl_seg) +
40375c1657eSLeon Romanovsky 			    sizeof(struct mlx5_mkey_seg));
404e126ba97SEli Cohen 		break;
405e126ba97SEli Cohen 
406e126ba97SEli Cohen 	case IB_QPT_UD:
407f0313965SErez Shitrit 		if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)
408f0313965SErez Shitrit 			size += sizeof(struct mlx5_wqe_eth_pad) +
409f0313965SErez Shitrit 				sizeof(struct mlx5_wqe_eth_seg);
410f0313965SErez Shitrit 		/* fall through */
411e126ba97SEli Cohen 	case IB_QPT_SMI:
412d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
413b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
414e126ba97SEli Cohen 			sizeof(struct mlx5_wqe_datagram_seg);
415e126ba97SEli Cohen 		break;
416e126ba97SEli Cohen 
417e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
418b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
419e126ba97SEli Cohen 			sizeof(struct mlx5_wqe_umr_ctrl_seg) +
420e126ba97SEli Cohen 			sizeof(struct mlx5_mkey_seg);
421e126ba97SEli Cohen 		break;
422e126ba97SEli Cohen 
423e126ba97SEli Cohen 	default:
424e126ba97SEli Cohen 		return -EINVAL;
425e126ba97SEli Cohen 	}
426e126ba97SEli Cohen 
427e126ba97SEli Cohen 	return size;
428e126ba97SEli Cohen }
429e126ba97SEli Cohen 
430e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr)
431e126ba97SEli Cohen {
432e126ba97SEli Cohen 	int inl_size = 0;
433e126ba97SEli Cohen 	int size;
434e126ba97SEli Cohen 
435f0313965SErez Shitrit 	size = sq_overhead(attr);
436e126ba97SEli Cohen 	if (size < 0)
437e126ba97SEli Cohen 		return size;
438e126ba97SEli Cohen 
439e126ba97SEli Cohen 	if (attr->cap.max_inline_data) {
440e126ba97SEli Cohen 		inl_size = size + sizeof(struct mlx5_wqe_inline_seg) +
441e126ba97SEli Cohen 			attr->cap.max_inline_data;
442e126ba97SEli Cohen 	}
443e126ba97SEli Cohen 
444e126ba97SEli Cohen 	size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg);
445e1e66cc2SSagi Grimberg 	if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN &&
446e1e66cc2SSagi Grimberg 	    ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE)
447e1e66cc2SSagi Grimberg 			return MLX5_SIG_WQE_SIZE;
448e1e66cc2SSagi Grimberg 	else
449e126ba97SEli Cohen 		return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB);
450e126ba97SEli Cohen }
451e126ba97SEli Cohen 
452288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size)
453288c01b7SEli Cohen {
454288c01b7SEli Cohen 	int max_sge;
455288c01b7SEli Cohen 
456288c01b7SEli Cohen 	if (attr->qp_type == IB_QPT_RC)
457288c01b7SEli Cohen 		max_sge = (min_t(int, wqe_size, 512) -
458288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_ctrl_seg) -
459288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_raddr_seg)) /
460288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
461288c01b7SEli Cohen 	else if (attr->qp_type == IB_QPT_XRC_INI)
462288c01b7SEli Cohen 		max_sge = (min_t(int, wqe_size, 512) -
463288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_ctrl_seg) -
464288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_xrc_seg) -
465288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_raddr_seg)) /
466288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
467288c01b7SEli Cohen 	else
468288c01b7SEli Cohen 		max_sge = (wqe_size - sq_overhead(attr)) /
469288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
470288c01b7SEli Cohen 
471288c01b7SEli Cohen 	return min_t(int, max_sge, wqe_size - sq_overhead(attr) /
472288c01b7SEli Cohen 		     sizeof(struct mlx5_wqe_data_seg));
473288c01b7SEli Cohen }
474288c01b7SEli Cohen 
475e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr,
476e126ba97SEli Cohen 			struct mlx5_ib_qp *qp)
477e126ba97SEli Cohen {
478e126ba97SEli Cohen 	int wqe_size;
479e126ba97SEli Cohen 	int wq_size;
480e126ba97SEli Cohen 
481e126ba97SEli Cohen 	if (!attr->cap.max_send_wr)
482e126ba97SEli Cohen 		return 0;
483e126ba97SEli Cohen 
484e126ba97SEli Cohen 	wqe_size = calc_send_wqe(attr);
485e126ba97SEli Cohen 	mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size);
486e126ba97SEli Cohen 	if (wqe_size < 0)
487e126ba97SEli Cohen 		return wqe_size;
488e126ba97SEli Cohen 
489938fe83cSSaeed Mahameed 	if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
490b125a54bSEli Cohen 		mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n",
491938fe83cSSaeed Mahameed 			    wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
492e126ba97SEli Cohen 		return -EINVAL;
493e126ba97SEli Cohen 	}
494e126ba97SEli Cohen 
495f0313965SErez Shitrit 	qp->max_inline_data = wqe_size - sq_overhead(attr) -
496e126ba97SEli Cohen 			      sizeof(struct mlx5_wqe_inline_seg);
497e126ba97SEli Cohen 	attr->cap.max_inline_data = qp->max_inline_data;
498e126ba97SEli Cohen 
499e1e66cc2SSagi Grimberg 	if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN)
500e1e66cc2SSagi Grimberg 		qp->signature_en = true;
501e1e66cc2SSagi Grimberg 
502e126ba97SEli Cohen 	wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size);
503e126ba97SEli Cohen 	qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB;
504938fe83cSSaeed Mahameed 	if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
5051974ab9dSBart Van Assche 		mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n",
5061974ab9dSBart Van Assche 			    attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB,
507938fe83cSSaeed Mahameed 			    qp->sq.wqe_cnt,
508938fe83cSSaeed Mahameed 			    1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
509b125a54bSEli Cohen 		return -ENOMEM;
510b125a54bSEli Cohen 	}
511e126ba97SEli Cohen 	qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB);
512288c01b7SEli Cohen 	qp->sq.max_gs = get_send_sge(attr, wqe_size);
513288c01b7SEli Cohen 	if (qp->sq.max_gs < attr->cap.max_send_sge)
514288c01b7SEli Cohen 		return -ENOMEM;
515288c01b7SEli Cohen 
516288c01b7SEli Cohen 	attr->cap.max_send_sge = qp->sq.max_gs;
517b125a54bSEli Cohen 	qp->sq.max_post = wq_size / wqe_size;
518b125a54bSEli Cohen 	attr->cap.max_send_wr = qp->sq.max_post;
519e126ba97SEli Cohen 
520e126ba97SEli Cohen 	return wq_size;
521e126ba97SEli Cohen }
522e126ba97SEli Cohen 
523e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev,
524e126ba97SEli Cohen 			    struct mlx5_ib_qp *qp,
52519098df2Smajd@mellanox.com 			    struct mlx5_ib_create_qp *ucmd,
5260fb2ed66Smajd@mellanox.com 			    struct mlx5_ib_qp_base *base,
5270fb2ed66Smajd@mellanox.com 			    struct ib_qp_init_attr *attr)
528e126ba97SEli Cohen {
529e126ba97SEli Cohen 	int desc_sz = 1 << qp->sq.wqe_shift;
530e126ba97SEli Cohen 
531938fe83cSSaeed Mahameed 	if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
532e126ba97SEli Cohen 		mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n",
533938fe83cSSaeed Mahameed 			     desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
534e126ba97SEli Cohen 		return -EINVAL;
535e126ba97SEli Cohen 	}
536e126ba97SEli Cohen 
537af8b38edSGal Pressman 	if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) {
538af8b38edSGal Pressman 		mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n",
539af8b38edSGal Pressman 			     ucmd->sq_wqe_count);
540e126ba97SEli Cohen 		return -EINVAL;
541e126ba97SEli Cohen 	}
542e126ba97SEli Cohen 
543e126ba97SEli Cohen 	qp->sq.wqe_cnt = ucmd->sq_wqe_count;
544e126ba97SEli Cohen 
545938fe83cSSaeed Mahameed 	if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
546e126ba97SEli Cohen 		mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n",
547938fe83cSSaeed Mahameed 			     qp->sq.wqe_cnt,
548938fe83cSSaeed Mahameed 			     1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
549e126ba97SEli Cohen 		return -EINVAL;
550e126ba97SEli Cohen 	}
551e126ba97SEli Cohen 
552c2e53b2cSYishai Hadas 	if (attr->qp_type == IB_QPT_RAW_PACKET ||
553c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
5540fb2ed66Smajd@mellanox.com 		base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift;
5550fb2ed66Smajd@mellanox.com 		qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6;
5560fb2ed66Smajd@mellanox.com 	} else {
55719098df2Smajd@mellanox.com 		base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) +
558e126ba97SEli Cohen 					 (qp->sq.wqe_cnt << 6);
5590fb2ed66Smajd@mellanox.com 	}
560e126ba97SEli Cohen 
561e126ba97SEli Cohen 	return 0;
562e126ba97SEli Cohen }
563e126ba97SEli Cohen 
564e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr)
565e126ba97SEli Cohen {
566e126ba97SEli Cohen 	if (attr->qp_type == IB_QPT_XRC_INI ||
567e126ba97SEli Cohen 	    attr->qp_type == IB_QPT_XRC_TGT || attr->srq ||
568e126ba97SEli Cohen 	    attr->qp_type == MLX5_IB_QPT_REG_UMR ||
569e126ba97SEli Cohen 	    !attr->cap.max_recv_wr)
570e126ba97SEli Cohen 		return 0;
571e126ba97SEli Cohen 
572e126ba97SEli Cohen 	return 1;
573e126ba97SEli Cohen }
574e126ba97SEli Cohen 
5750b80c14fSEli Cohen enum {
5760b80c14fSEli Cohen 	/* this is the first blue flame register in the array of bfregs assigned
5770b80c14fSEli Cohen 	 * to a processes. Since we do not use it for blue flame but rather
5780b80c14fSEli Cohen 	 * regular 64 bit doorbells, we do not need a lock for maintaiing
5790b80c14fSEli Cohen 	 * "odd/even" order
5800b80c14fSEli Cohen 	 */
5810b80c14fSEli Cohen 	NUM_NON_BLUE_FLAME_BFREGS = 1,
5820b80c14fSEli Cohen };
5830b80c14fSEli Cohen 
584b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi)
585b037c29aSEli Cohen {
58631a78a5aSYishai Hadas 	return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR;
587b037c29aSEli Cohen }
588b037c29aSEli Cohen 
589b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev,
590b037c29aSEli Cohen 			 struct mlx5_bfreg_info *bfregi)
591c1be5232SEli Cohen {
592c1be5232SEli Cohen 	int n;
593c1be5232SEli Cohen 
594b037c29aSEli Cohen 	n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs -
595b037c29aSEli Cohen 	    NUM_NON_BLUE_FLAME_BFREGS;
596c1be5232SEli Cohen 
597c1be5232SEli Cohen 	return n >= 0 ? n : 0;
598c1be5232SEli Cohen }
599c1be5232SEli Cohen 
60018b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev,
60118b0362eSYishai Hadas 			   struct mlx5_bfreg_info *bfregi)
60218b0362eSYishai Hadas {
60318b0362eSYishai Hadas 	return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM;
60418b0362eSYishai Hadas }
60518b0362eSYishai Hadas 
606b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev,
607b037c29aSEli Cohen 			  struct mlx5_bfreg_info *bfregi)
608c1be5232SEli Cohen {
609c1be5232SEli Cohen 	int med;
610c1be5232SEli Cohen 
611b037c29aSEli Cohen 	med = num_med_bfreg(dev, bfregi);
612b037c29aSEli Cohen 	return ++med;
613c1be5232SEli Cohen }
614c1be5232SEli Cohen 
615b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev,
616b037c29aSEli Cohen 				  struct mlx5_bfreg_info *bfregi)
617e126ba97SEli Cohen {
618e126ba97SEli Cohen 	int i;
619e126ba97SEli Cohen 
620b037c29aSEli Cohen 	for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) {
621b037c29aSEli Cohen 		if (!bfregi->count[i]) {
6222f5ff264SEli Cohen 			bfregi->count[i]++;
623e126ba97SEli Cohen 			return i;
624e126ba97SEli Cohen 		}
625e126ba97SEli Cohen 	}
626e126ba97SEli Cohen 
627e126ba97SEli Cohen 	return -ENOMEM;
628e126ba97SEli Cohen }
629e126ba97SEli Cohen 
630b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev,
631b037c29aSEli Cohen 				 struct mlx5_bfreg_info *bfregi)
632e126ba97SEli Cohen {
63318b0362eSYishai Hadas 	int minidx = first_med_bfreg(dev, bfregi);
634e126ba97SEli Cohen 	int i;
635e126ba97SEli Cohen 
63618b0362eSYishai Hadas 	if (minidx < 0)
63718b0362eSYishai Hadas 		return minidx;
63818b0362eSYishai Hadas 
63918b0362eSYishai Hadas 	for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) {
6402f5ff264SEli Cohen 		if (bfregi->count[i] < bfregi->count[minidx])
641e126ba97SEli Cohen 			minidx = i;
6420b80c14fSEli Cohen 		if (!bfregi->count[minidx])
6430b80c14fSEli Cohen 			break;
644e126ba97SEli Cohen 	}
645e126ba97SEli Cohen 
6462f5ff264SEli Cohen 	bfregi->count[minidx]++;
647e126ba97SEli Cohen 	return minidx;
648e126ba97SEli Cohen }
649e126ba97SEli Cohen 
650b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev,
651ffaf58deSLeon Romanovsky 		       struct mlx5_bfreg_info *bfregi)
652e126ba97SEli Cohen {
653ffaf58deSLeon Romanovsky 	int bfregn = -ENOMEM;
654e126ba97SEli Cohen 
6552f5ff264SEli Cohen 	mutex_lock(&bfregi->lock);
656ffaf58deSLeon Romanovsky 	if (bfregi->ver >= 2) {
657ffaf58deSLeon Romanovsky 		bfregn = alloc_high_class_bfreg(dev, bfregi);
658ffaf58deSLeon Romanovsky 		if (bfregn < 0)
659ffaf58deSLeon Romanovsky 			bfregn = alloc_med_class_bfreg(dev, bfregi);
660ffaf58deSLeon Romanovsky 	}
661ffaf58deSLeon Romanovsky 
662ffaf58deSLeon Romanovsky 	if (bfregn < 0) {
6630b80c14fSEli Cohen 		BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1);
6642f5ff264SEli Cohen 		bfregn = 0;
6652f5ff264SEli Cohen 		bfregi->count[bfregn]++;
666e126ba97SEli Cohen 	}
6672f5ff264SEli Cohen 	mutex_unlock(&bfregi->lock);
668e126ba97SEli Cohen 
6692f5ff264SEli Cohen 	return bfregn;
670e126ba97SEli Cohen }
671e126ba97SEli Cohen 
6724ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn)
673e126ba97SEli Cohen {
6742f5ff264SEli Cohen 	mutex_lock(&bfregi->lock);
675b037c29aSEli Cohen 	bfregi->count[bfregn]--;
6762f5ff264SEli Cohen 	mutex_unlock(&bfregi->lock);
677e126ba97SEli Cohen }
678e126ba97SEli Cohen 
679e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state)
680e126ba97SEli Cohen {
681e126ba97SEli Cohen 	switch (state) {
682e126ba97SEli Cohen 	case IB_QPS_RESET:	return MLX5_QP_STATE_RST;
683e126ba97SEli Cohen 	case IB_QPS_INIT:	return MLX5_QP_STATE_INIT;
684e126ba97SEli Cohen 	case IB_QPS_RTR:	return MLX5_QP_STATE_RTR;
685e126ba97SEli Cohen 	case IB_QPS_RTS:	return MLX5_QP_STATE_RTS;
686e126ba97SEli Cohen 	case IB_QPS_SQD:	return MLX5_QP_STATE_SQD;
687e126ba97SEli Cohen 	case IB_QPS_SQE:	return MLX5_QP_STATE_SQER;
688e126ba97SEli Cohen 	case IB_QPS_ERR:	return MLX5_QP_STATE_ERR;
689e126ba97SEli Cohen 	default:		return -1;
690e126ba97SEli Cohen 	}
691e126ba97SEli Cohen }
692e126ba97SEli Cohen 
693e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type)
694e126ba97SEli Cohen {
695e126ba97SEli Cohen 	switch (type) {
696e126ba97SEli Cohen 	case IB_QPT_RC:			return MLX5_QP_ST_RC;
697e126ba97SEli Cohen 	case IB_QPT_UC:			return MLX5_QP_ST_UC;
698e126ba97SEli Cohen 	case IB_QPT_UD:			return MLX5_QP_ST_UD;
699e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:	return MLX5_QP_ST_REG_UMR;
700e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
701e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:		return MLX5_QP_ST_XRC;
702e126ba97SEli Cohen 	case IB_QPT_SMI:		return MLX5_QP_ST_QP0;
703d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:	return MLX5_QP_ST_QP1;
704c32a4f29SMoni Shoua 	case MLX5_IB_QPT_DCI:		return MLX5_QP_ST_DCI;
705e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:		return MLX5_QP_ST_RAW_IPV6;
706e126ba97SEli Cohen 	case IB_QPT_RAW_PACKET:
7070fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_ETHERTYPE:	return MLX5_QP_ST_RAW_ETHERTYPE;
708e126ba97SEli Cohen 	case IB_QPT_MAX:
709e126ba97SEli Cohen 	default:		return -EINVAL;
710e126ba97SEli Cohen 	}
711e126ba97SEli Cohen }
712e126ba97SEli Cohen 
71389ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq,
71489ea94a7SMaor Gottlieb 			     struct mlx5_ib_cq *recv_cq);
71589ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq,
71689ea94a7SMaor Gottlieb 			       struct mlx5_ib_cq *recv_cq);
71789ea94a7SMaor Gottlieb 
7187c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev,
71905f58cebSLeon Romanovsky 			struct mlx5_bfreg_info *bfregi, u32 bfregn,
7201ee47ab3SYishai Hadas 			bool dyn_bfreg)
721e126ba97SEli Cohen {
72205f58cebSLeon Romanovsky 	unsigned int bfregs_per_sys_page;
72305f58cebSLeon Romanovsky 	u32 index_of_sys_page;
72405f58cebSLeon Romanovsky 	u32 offset;
725b037c29aSEli Cohen 
726b037c29aSEli Cohen 	bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) *
727b037c29aSEli Cohen 				MLX5_NON_FP_BFREGS_PER_UAR;
728b037c29aSEli Cohen 	index_of_sys_page = bfregn / bfregs_per_sys_page;
729b037c29aSEli Cohen 
73005f58cebSLeon Romanovsky 	if (dyn_bfreg) {
73105f58cebSLeon Romanovsky 		index_of_sys_page += bfregi->num_static_sys_pages;
73205f58cebSLeon Romanovsky 
7337c043e90SYishai Hadas 		if (index_of_sys_page >= bfregi->num_sys_pages)
7347c043e90SYishai Hadas 			return -EINVAL;
7357c043e90SYishai Hadas 
7361ee47ab3SYishai Hadas 		if (bfregn > bfregi->num_dyn_bfregs ||
7371ee47ab3SYishai Hadas 		    bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) {
7381ee47ab3SYishai Hadas 			mlx5_ib_dbg(dev, "Invalid dynamic uar index\n");
7391ee47ab3SYishai Hadas 			return -EINVAL;
7401ee47ab3SYishai Hadas 		}
7411ee47ab3SYishai Hadas 	}
742b037c29aSEli Cohen 
7431ee47ab3SYishai Hadas 	offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR;
744b037c29aSEli Cohen 	return bfregi->sys_pages[index_of_sys_page] + offset;
745e126ba97SEli Cohen }
746e126ba97SEli Cohen 
747b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata,
74819098df2Smajd@mellanox.com 			    unsigned long addr, size_t size,
749b0ea0fa5SJason Gunthorpe 			    struct ib_umem **umem, int *npages, int *page_shift,
750b0ea0fa5SJason Gunthorpe 			    int *ncont, u32 *offset)
75119098df2Smajd@mellanox.com {
75219098df2Smajd@mellanox.com 	int err;
75319098df2Smajd@mellanox.com 
754b0ea0fa5SJason Gunthorpe 	*umem = ib_umem_get(udata, addr, size, 0, 0);
75519098df2Smajd@mellanox.com 	if (IS_ERR(*umem)) {
75619098df2Smajd@mellanox.com 		mlx5_ib_dbg(dev, "umem_get failed\n");
75719098df2Smajd@mellanox.com 		return PTR_ERR(*umem);
75819098df2Smajd@mellanox.com 	}
75919098df2Smajd@mellanox.com 
760762f899aSMajd Dibbiny 	mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL);
76119098df2Smajd@mellanox.com 
76219098df2Smajd@mellanox.com 	err = mlx5_ib_get_buf_offset(addr, *page_shift, offset);
76319098df2Smajd@mellanox.com 	if (err) {
76419098df2Smajd@mellanox.com 		mlx5_ib_warn(dev, "bad offset\n");
76519098df2Smajd@mellanox.com 		goto err_umem;
76619098df2Smajd@mellanox.com 	}
76719098df2Smajd@mellanox.com 
76819098df2Smajd@mellanox.com 	mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n",
76919098df2Smajd@mellanox.com 		    addr, size, *npages, *page_shift, *ncont, *offset);
77019098df2Smajd@mellanox.com 
77119098df2Smajd@mellanox.com 	return 0;
77219098df2Smajd@mellanox.com 
77319098df2Smajd@mellanox.com err_umem:
77419098df2Smajd@mellanox.com 	ib_umem_release(*umem);
77519098df2Smajd@mellanox.com 	*umem = NULL;
77619098df2Smajd@mellanox.com 
77719098df2Smajd@mellanox.com 	return err;
77819098df2Smajd@mellanox.com }
77919098df2Smajd@mellanox.com 
780fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
781bdeacabdSShamir Rabinovitch 			    struct mlx5_ib_rwq *rwq, struct ib_udata *udata)
78279b20a6cSYishai Hadas {
783bdeacabdSShamir Rabinovitch 	struct mlx5_ib_ucontext *context =
784bdeacabdSShamir Rabinovitch 		rdma_udata_to_drv_context(
785bdeacabdSShamir Rabinovitch 			udata,
786bdeacabdSShamir Rabinovitch 			struct mlx5_ib_ucontext,
787bdeacabdSShamir Rabinovitch 			ibucontext);
78879b20a6cSYishai Hadas 
789fe248c3aSMaor Gottlieb 	if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP)
790fe248c3aSMaor Gottlieb 		atomic_dec(&dev->delay_drop.rqs_cnt);
791fe248c3aSMaor Gottlieb 
79279b20a6cSYishai Hadas 	mlx5_ib_db_unmap_user(context, &rwq->db);
79379b20a6cSYishai Hadas 	if (rwq->umem)
79479b20a6cSYishai Hadas 		ib_umem_release(rwq->umem);
79579b20a6cSYishai Hadas }
79679b20a6cSYishai Hadas 
79779b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
798b0ea0fa5SJason Gunthorpe 			  struct ib_udata *udata, struct mlx5_ib_rwq *rwq,
79979b20a6cSYishai Hadas 			  struct mlx5_ib_create_wq *ucmd)
80079b20a6cSYishai Hadas {
80189944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
80289944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
80379b20a6cSYishai Hadas 	int page_shift = 0;
80479b20a6cSYishai Hadas 	int npages;
80579b20a6cSYishai Hadas 	u32 offset = 0;
80679b20a6cSYishai Hadas 	int ncont = 0;
80779b20a6cSYishai Hadas 	int err;
80879b20a6cSYishai Hadas 
80979b20a6cSYishai Hadas 	if (!ucmd->buf_addr)
81079b20a6cSYishai Hadas 		return -EINVAL;
81179b20a6cSYishai Hadas 
812b0ea0fa5SJason Gunthorpe 	rwq->umem = ib_umem_get(udata, ucmd->buf_addr, rwq->buf_size, 0, 0);
81379b20a6cSYishai Hadas 	if (IS_ERR(rwq->umem)) {
81479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "umem_get failed\n");
81579b20a6cSYishai Hadas 		err = PTR_ERR(rwq->umem);
81679b20a6cSYishai Hadas 		return err;
81779b20a6cSYishai Hadas 	}
81879b20a6cSYishai Hadas 
819762f899aSMajd Dibbiny 	mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift,
82079b20a6cSYishai Hadas 			   &ncont, NULL);
82179b20a6cSYishai Hadas 	err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift,
82279b20a6cSYishai Hadas 				     &rwq->rq_page_offset);
82379b20a6cSYishai Hadas 	if (err) {
82479b20a6cSYishai Hadas 		mlx5_ib_warn(dev, "bad offset\n");
82579b20a6cSYishai Hadas 		goto err_umem;
82679b20a6cSYishai Hadas 	}
82779b20a6cSYishai Hadas 
82879b20a6cSYishai Hadas 	rwq->rq_num_pas = ncont;
82979b20a6cSYishai Hadas 	rwq->page_shift = page_shift;
83079b20a6cSYishai Hadas 	rwq->log_page_size =  page_shift - MLX5_ADAPTER_PAGE_SHIFT;
83179b20a6cSYishai Hadas 	rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE);
83279b20a6cSYishai Hadas 
83379b20a6cSYishai Hadas 	mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n",
83479b20a6cSYishai Hadas 		    (unsigned long long)ucmd->buf_addr, rwq->buf_size,
83579b20a6cSYishai Hadas 		    npages, page_shift, ncont, offset);
83679b20a6cSYishai Hadas 
83789944450SShamir Rabinovitch 	err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db);
83879b20a6cSYishai Hadas 	if (err) {
83979b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "map failed\n");
84079b20a6cSYishai Hadas 		goto err_umem;
84179b20a6cSYishai Hadas 	}
84279b20a6cSYishai Hadas 
84379b20a6cSYishai Hadas 	rwq->create_type = MLX5_WQ_USER;
84479b20a6cSYishai Hadas 	return 0;
84579b20a6cSYishai Hadas 
84679b20a6cSYishai Hadas err_umem:
84779b20a6cSYishai Hadas 	ib_umem_release(rwq->umem);
84879b20a6cSYishai Hadas 	return err;
84979b20a6cSYishai Hadas }
85079b20a6cSYishai Hadas 
851b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev,
852b037c29aSEli Cohen 			 struct mlx5_bfreg_info *bfregi, int bfregn)
853b037c29aSEli Cohen {
854b037c29aSEli Cohen 	return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR +
855b037c29aSEli Cohen 				bfregn % MLX5_NON_FP_BFREGS_PER_UAR;
856b037c29aSEli Cohen }
857b037c29aSEli Cohen 
858e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd,
859e126ba97SEli Cohen 			  struct mlx5_ib_qp *qp, struct ib_udata *udata,
8600fb2ed66Smajd@mellanox.com 			  struct ib_qp_init_attr *attr,
86109a7d9ecSSaeed Mahameed 			  u32 **in,
86219098df2Smajd@mellanox.com 			  struct mlx5_ib_create_qp_resp *resp, int *inlen,
86319098df2Smajd@mellanox.com 			  struct mlx5_ib_qp_base *base)
864e126ba97SEli Cohen {
865e126ba97SEli Cohen 	struct mlx5_ib_ucontext *context;
866e126ba97SEli Cohen 	struct mlx5_ib_create_qp ucmd;
86719098df2Smajd@mellanox.com 	struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer;
8689e9c47d0SEli Cohen 	int page_shift = 0;
8691ee47ab3SYishai Hadas 	int uar_index = 0;
870e126ba97SEli Cohen 	int npages;
8719e9c47d0SEli Cohen 	u32 offset = 0;
8722f5ff264SEli Cohen 	int bfregn;
8739e9c47d0SEli Cohen 	int ncont = 0;
87409a7d9ecSSaeed Mahameed 	__be64 *pas;
87509a7d9ecSSaeed Mahameed 	void *qpc;
876e126ba97SEli Cohen 	int err;
8775aa3771dSYishai Hadas 	u16 uid;
878e126ba97SEli Cohen 
879e126ba97SEli Cohen 	err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd));
880e126ba97SEli Cohen 	if (err) {
881e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "copy failed\n");
882e126ba97SEli Cohen 		return err;
883e126ba97SEli Cohen 	}
884e126ba97SEli Cohen 
88589944450SShamir Rabinovitch 	context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext,
88689944450SShamir Rabinovitch 					    ibucontext);
8871ee47ab3SYishai Hadas 	if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) {
8881ee47ab3SYishai Hadas 		uar_index = bfregn_to_uar_index(dev, &context->bfregi,
8891ee47ab3SYishai Hadas 						ucmd.bfreg_index, true);
8901ee47ab3SYishai Hadas 		if (uar_index < 0)
8911ee47ab3SYishai Hadas 			return uar_index;
8921ee47ab3SYishai Hadas 
8931ee47ab3SYishai Hadas 		bfregn = MLX5_IB_INVALID_BFREG;
8941ee47ab3SYishai Hadas 	} else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) {
895e126ba97SEli Cohen 		/*
896e126ba97SEli Cohen 		 * TBD: should come from the verbs when we have the API
897e126ba97SEli Cohen 		 */
898051f2630SLeon Romanovsky 		/* In CROSS_CHANNEL CQ and QP must use the same UAR */
8992f5ff264SEli Cohen 		bfregn = MLX5_CROSS_CHANNEL_BFREG;
9001ee47ab3SYishai Hadas 	}
901051f2630SLeon Romanovsky 	else {
902ffaf58deSLeon Romanovsky 		bfregn = alloc_bfreg(dev, &context->bfregi);
903ffaf58deSLeon Romanovsky 		if (bfregn < 0)
9042f5ff264SEli Cohen 			return bfregn;
905e126ba97SEli Cohen 	}
906e126ba97SEli Cohen 
9072f5ff264SEli Cohen 	mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index);
9081ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
9091ee47ab3SYishai Hadas 		uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn,
9101ee47ab3SYishai Hadas 						false);
911e126ba97SEli Cohen 
91248fea837SHaggai Eran 	qp->rq.offset = 0;
91348fea837SHaggai Eran 	qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB);
91448fea837SHaggai Eran 	qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift;
91548fea837SHaggai Eran 
9160fb2ed66Smajd@mellanox.com 	err = set_user_buf_size(dev, qp, &ucmd, base, attr);
917e126ba97SEli Cohen 	if (err)
9182f5ff264SEli Cohen 		goto err_bfreg;
919e126ba97SEli Cohen 
92019098df2Smajd@mellanox.com 	if (ucmd.buf_addr && ubuffer->buf_size) {
92119098df2Smajd@mellanox.com 		ubuffer->buf_addr = ucmd.buf_addr;
922b0ea0fa5SJason Gunthorpe 		err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr,
923b0ea0fa5SJason Gunthorpe 				       ubuffer->buf_size, &ubuffer->umem,
924b0ea0fa5SJason Gunthorpe 				       &npages, &page_shift, &ncont, &offset);
92519098df2Smajd@mellanox.com 		if (err)
9262f5ff264SEli Cohen 			goto err_bfreg;
9279e9c47d0SEli Cohen 	} else {
92819098df2Smajd@mellanox.com 		ubuffer->umem = NULL;
9299e9c47d0SEli Cohen 	}
930e126ba97SEli Cohen 
93109a7d9ecSSaeed Mahameed 	*inlen = MLX5_ST_SZ_BYTES(create_qp_in) +
93209a7d9ecSSaeed Mahameed 		 MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont;
9331b9a07eeSLeon Romanovsky 	*in = kvzalloc(*inlen, GFP_KERNEL);
934e126ba97SEli Cohen 	if (!*in) {
935e126ba97SEli Cohen 		err = -ENOMEM;
936e126ba97SEli Cohen 		goto err_umem;
937e126ba97SEli Cohen 	}
938e126ba97SEli Cohen 
9397422edceSYishai Hadas 	uid = (attr->qp_type != IB_QPT_XRC_TGT &&
9407422edceSYishai Hadas 	       attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0;
9415aa3771dSYishai Hadas 	MLX5_SET(create_qp_in, *in, uid, uid);
94209a7d9ecSSaeed Mahameed 	pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas);
94309a7d9ecSSaeed Mahameed 	if (ubuffer->umem)
94409a7d9ecSSaeed Mahameed 		mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0);
94509a7d9ecSSaeed Mahameed 
94609a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
94709a7d9ecSSaeed Mahameed 
94809a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT);
94909a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, page_offset, offset);
95009a7d9ecSSaeed Mahameed 
95109a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, uar_page, uar_index);
9521ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
953b037c29aSEli Cohen 		resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn);
9541ee47ab3SYishai Hadas 	else
9551ee47ab3SYishai Hadas 		resp->bfreg_index = MLX5_IB_INVALID_BFREG;
9562f5ff264SEli Cohen 	qp->bfregn = bfregn;
957e126ba97SEli Cohen 
958b0ea0fa5SJason Gunthorpe 	err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db);
959e126ba97SEli Cohen 	if (err) {
960e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "map failed\n");
961e126ba97SEli Cohen 		goto err_free;
962e126ba97SEli Cohen 	}
963e126ba97SEli Cohen 
96441d902cbSJason Gunthorpe 	err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp)));
965e126ba97SEli Cohen 	if (err) {
966e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "copy failed\n");
967e126ba97SEli Cohen 		goto err_unmap;
968e126ba97SEli Cohen 	}
969e126ba97SEli Cohen 	qp->create_type = MLX5_QP_USER;
970e126ba97SEli Cohen 
971e126ba97SEli Cohen 	return 0;
972e126ba97SEli Cohen 
973e126ba97SEli Cohen err_unmap:
974e126ba97SEli Cohen 	mlx5_ib_db_unmap_user(context, &qp->db);
975e126ba97SEli Cohen 
976e126ba97SEli Cohen err_free:
977479163f4SAl Viro 	kvfree(*in);
978e126ba97SEli Cohen 
979e126ba97SEli Cohen err_umem:
98019098df2Smajd@mellanox.com 	if (ubuffer->umem)
98119098df2Smajd@mellanox.com 		ib_umem_release(ubuffer->umem);
982e126ba97SEli Cohen 
9832f5ff264SEli Cohen err_bfreg:
9841ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
9854ed131d0SYishai Hadas 		mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn);
986e126ba97SEli Cohen 	return err;
987e126ba97SEli Cohen }
988e126ba97SEli Cohen 
989b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd,
990bdeacabdSShamir Rabinovitch 			    struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base,
991bdeacabdSShamir Rabinovitch 			    struct ib_udata *udata)
992e126ba97SEli Cohen {
993bdeacabdSShamir Rabinovitch 	struct mlx5_ib_ucontext *context =
994bdeacabdSShamir Rabinovitch 		rdma_udata_to_drv_context(
995bdeacabdSShamir Rabinovitch 			udata,
996bdeacabdSShamir Rabinovitch 			struct mlx5_ib_ucontext,
997bdeacabdSShamir Rabinovitch 			ibucontext);
998e126ba97SEli Cohen 
999e126ba97SEli Cohen 	mlx5_ib_db_unmap_user(context, &qp->db);
100019098df2Smajd@mellanox.com 	if (base->ubuffer.umem)
100119098df2Smajd@mellanox.com 		ib_umem_release(base->ubuffer.umem);
10021ee47ab3SYishai Hadas 
10031ee47ab3SYishai Hadas 	/*
10041ee47ab3SYishai Hadas 	 * Free only the BFREGs which are handled by the kernel.
10051ee47ab3SYishai Hadas 	 * BFREGs of UARs allocated dynamically are handled by user.
10061ee47ab3SYishai Hadas 	 */
10071ee47ab3SYishai Hadas 	if (qp->bfregn != MLX5_IB_INVALID_BFREG)
10084ed131d0SYishai Hadas 		mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn);
1009e126ba97SEli Cohen }
1010e126ba97SEli Cohen 
101134f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge.
101234f4c955SGuy Levi  *
101334f4c955SGuy Levi  * An 'edge' is defined as the first following address after the end
101434f4c955SGuy Levi  * of the fragment or the SQ. Accordingly, during the WQE construction
101534f4c955SGuy Levi  * which repetitively increases the pointer to write the next data, it
101634f4c955SGuy Levi  * simply should check if it gets to an edge.
101734f4c955SGuy Levi  *
101834f4c955SGuy Levi  * @sq - SQ buffer.
101934f4c955SGuy Levi  * @idx - Stride index in the SQ buffer.
102034f4c955SGuy Levi  *
102134f4c955SGuy Levi  * Return:
102234f4c955SGuy Levi  *	The new edge.
102334f4c955SGuy Levi  */
102434f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx)
102534f4c955SGuy Levi {
102634f4c955SGuy Levi 	void *fragment_end;
102734f4c955SGuy Levi 
102834f4c955SGuy Levi 	fragment_end = mlx5_frag_buf_get_wqe
102934f4c955SGuy Levi 		(&sq->fbc,
103034f4c955SGuy Levi 		 mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx));
103134f4c955SGuy Levi 
103234f4c955SGuy Levi 	return fragment_end + MLX5_SEND_WQE_BB;
103334f4c955SGuy Levi }
103434f4c955SGuy Levi 
1035e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev,
1036e126ba97SEli Cohen 			    struct ib_qp_init_attr *init_attr,
1037e126ba97SEli Cohen 			    struct mlx5_ib_qp *qp,
103809a7d9ecSSaeed Mahameed 			    u32 **in, int *inlen,
103919098df2Smajd@mellanox.com 			    struct mlx5_ib_qp_base *base)
1040e126ba97SEli Cohen {
1041e126ba97SEli Cohen 	int uar_index;
104209a7d9ecSSaeed Mahameed 	void *qpc;
1043e126ba97SEli Cohen 	int err;
1044e126ba97SEli Cohen 
1045f0313965SErez Shitrit 	if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN |
1046f0313965SErez Shitrit 					IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK |
1047b11a4f9cSHaggai Eran 					IB_QP_CREATE_IPOIB_UD_LSO |
104893d576afSErez Shitrit 					IB_QP_CREATE_NETIF_QP |
1049b11a4f9cSHaggai Eran 					mlx5_ib_create_qp_sqpn_qp1()))
10501a4c3a3dSEli Cohen 		return -EINVAL;
1051e126ba97SEli Cohen 
1052e126ba97SEli Cohen 	if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR)
10535fe9dec0SEli Cohen 		qp->bf.bfreg = &dev->fp_bfreg;
10545fe9dec0SEli Cohen 	else
10555fe9dec0SEli Cohen 		qp->bf.bfreg = &dev->bfreg;
1056e126ba97SEli Cohen 
1057d8030b0dSEli Cohen 	/* We need to divide by two since each register is comprised of
1058d8030b0dSEli Cohen 	 * two buffers of identical size, namely odd and even
1059d8030b0dSEli Cohen 	 */
1060d8030b0dSEli Cohen 	qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2;
10615fe9dec0SEli Cohen 	uar_index = qp->bf.bfreg->index;
1062e126ba97SEli Cohen 
1063e126ba97SEli Cohen 	err = calc_sq_size(dev, init_attr, qp);
1064e126ba97SEli Cohen 	if (err < 0) {
1065e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
10665fe9dec0SEli Cohen 		return err;
1067e126ba97SEli Cohen 	}
1068e126ba97SEli Cohen 
1069e126ba97SEli Cohen 	qp->rq.offset = 0;
1070e126ba97SEli Cohen 	qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift;
107119098df2Smajd@mellanox.com 	base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift);
1072e126ba97SEli Cohen 
107334f4c955SGuy Levi 	err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size,
107434f4c955SGuy Levi 				       &qp->buf, dev->mdev->priv.numa_node);
1075e126ba97SEli Cohen 	if (err) {
1076e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
10775fe9dec0SEli Cohen 		return err;
1078e126ba97SEli Cohen 	}
1079e126ba97SEli Cohen 
108034f4c955SGuy Levi 	if (qp->rq.wqe_cnt)
108134f4c955SGuy Levi 		mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift,
108234f4c955SGuy Levi 			      ilog2(qp->rq.wqe_cnt), &qp->rq.fbc);
108334f4c955SGuy Levi 
108434f4c955SGuy Levi 	if (qp->sq.wqe_cnt) {
108534f4c955SGuy Levi 		int sq_strides_offset = (qp->sq.offset  & (PAGE_SIZE - 1)) /
108634f4c955SGuy Levi 					MLX5_SEND_WQE_BB;
108734f4c955SGuy Levi 		mlx5_init_fbc_offset(qp->buf.frags +
108834f4c955SGuy Levi 				     (qp->sq.offset / PAGE_SIZE),
108934f4c955SGuy Levi 				     ilog2(MLX5_SEND_WQE_BB),
109034f4c955SGuy Levi 				     ilog2(qp->sq.wqe_cnt),
109134f4c955SGuy Levi 				     sq_strides_offset, &qp->sq.fbc);
109234f4c955SGuy Levi 
109334f4c955SGuy Levi 		qp->sq.cur_edge = get_sq_edge(&qp->sq, 0);
109434f4c955SGuy Levi 	}
109534f4c955SGuy Levi 
109609a7d9ecSSaeed Mahameed 	*inlen = MLX5_ST_SZ_BYTES(create_qp_in) +
109709a7d9ecSSaeed Mahameed 		 MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages;
10981b9a07eeSLeon Romanovsky 	*in = kvzalloc(*inlen, GFP_KERNEL);
1099e126ba97SEli Cohen 	if (!*in) {
1100e126ba97SEli Cohen 		err = -ENOMEM;
1101e126ba97SEli Cohen 		goto err_buf;
1102e126ba97SEli Cohen 	}
110309a7d9ecSSaeed Mahameed 
110409a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
110509a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, uar_page, uar_index);
110609a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);
110709a7d9ecSSaeed Mahameed 
1108e126ba97SEli Cohen 	/* Set "fast registration enabled" for all kernel QPs */
110909a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, fre, 1);
111009a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, rlky, 1);
1111e126ba97SEli Cohen 
1112b11a4f9cSHaggai Eran 	if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) {
111309a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, deth_sqpn, 1);
1114b11a4f9cSHaggai Eran 		qp->flags |= MLX5_IB_QP_SQPN_QP1;
1115b11a4f9cSHaggai Eran 	}
1116b11a4f9cSHaggai Eran 
111734f4c955SGuy Levi 	mlx5_fill_page_frag_array(&qp->buf,
111834f4c955SGuy Levi 				  (__be64 *)MLX5_ADDR_OF(create_qp_in,
111934f4c955SGuy Levi 							 *in, pas));
1120e126ba97SEli Cohen 
11219603b61dSJack Morgenstein 	err = mlx5_db_alloc(dev->mdev, &qp->db);
1122e126ba97SEli Cohen 	if (err) {
1123e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
1124e126ba97SEli Cohen 		goto err_free;
1125e126ba97SEli Cohen 	}
1126e126ba97SEli Cohen 
1127b5883008SLi Dongyang 	qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt,
1128b5883008SLi Dongyang 				     sizeof(*qp->sq.wrid), GFP_KERNEL);
1129b5883008SLi Dongyang 	qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt,
1130b5883008SLi Dongyang 					sizeof(*qp->sq.wr_data), GFP_KERNEL);
1131b5883008SLi Dongyang 	qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt,
1132b5883008SLi Dongyang 				     sizeof(*qp->rq.wrid), GFP_KERNEL);
1133b5883008SLi Dongyang 	qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt,
1134b5883008SLi Dongyang 				       sizeof(*qp->sq.w_list), GFP_KERNEL);
1135b5883008SLi Dongyang 	qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt,
1136b5883008SLi Dongyang 					 sizeof(*qp->sq.wqe_head), GFP_KERNEL);
1137e126ba97SEli Cohen 
1138e126ba97SEli Cohen 	if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid ||
1139e126ba97SEli Cohen 	    !qp->sq.w_list || !qp->sq.wqe_head) {
1140e126ba97SEli Cohen 		err = -ENOMEM;
1141e126ba97SEli Cohen 		goto err_wrid;
1142e126ba97SEli Cohen 	}
1143e126ba97SEli Cohen 	qp->create_type = MLX5_QP_KERNEL;
1144e126ba97SEli Cohen 
1145e126ba97SEli Cohen 	return 0;
1146e126ba97SEli Cohen 
1147e126ba97SEli Cohen err_wrid:
1148b5883008SLi Dongyang 	kvfree(qp->sq.wqe_head);
1149b5883008SLi Dongyang 	kvfree(qp->sq.w_list);
1150b5883008SLi Dongyang 	kvfree(qp->sq.wrid);
1151b5883008SLi Dongyang 	kvfree(qp->sq.wr_data);
1152b5883008SLi Dongyang 	kvfree(qp->rq.wrid);
1153f4044dacSEli Cohen 	mlx5_db_free(dev->mdev, &qp->db);
1154e126ba97SEli Cohen 
1155e126ba97SEli Cohen err_free:
1156479163f4SAl Viro 	kvfree(*in);
1157e126ba97SEli Cohen 
1158e126ba97SEli Cohen err_buf:
115934f4c955SGuy Levi 	mlx5_frag_buf_free(dev->mdev, &qp->buf);
1160e126ba97SEli Cohen 	return err;
1161e126ba97SEli Cohen }
1162e126ba97SEli Cohen 
1163e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp)
1164e126ba97SEli Cohen {
1165b5883008SLi Dongyang 	kvfree(qp->sq.wqe_head);
1166b5883008SLi Dongyang 	kvfree(qp->sq.w_list);
1167b5883008SLi Dongyang 	kvfree(qp->sq.wrid);
1168b5883008SLi Dongyang 	kvfree(qp->sq.wr_data);
1169b5883008SLi Dongyang 	kvfree(qp->rq.wrid);
1170f4044dacSEli Cohen 	mlx5_db_free(dev->mdev, &qp->db);
117134f4c955SGuy Levi 	mlx5_frag_buf_free(dev->mdev, &qp->buf);
1172e126ba97SEli Cohen }
1173e126ba97SEli Cohen 
117409a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr)
1175e126ba97SEli Cohen {
1176e126ba97SEli Cohen 	if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) ||
1177c32a4f29SMoni Shoua 	    (attr->qp_type == MLX5_IB_QPT_DCI) ||
1178e126ba97SEli Cohen 	    (attr->qp_type == IB_QPT_XRC_INI))
117909a7d9ecSSaeed Mahameed 		return MLX5_SRQ_RQ;
1180e126ba97SEli Cohen 	else if (!qp->has_rq)
118109a7d9ecSSaeed Mahameed 		return MLX5_ZERO_LEN_RQ;
1182e126ba97SEli Cohen 	else
118309a7d9ecSSaeed Mahameed 		return MLX5_NON_ZERO_RQ;
1184e126ba97SEli Cohen }
1185e126ba97SEli Cohen 
1186e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type)
1187e126ba97SEli Cohen {
11885d6ff1baSYonatan Cohen 	if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC ||
11895d6ff1baSYonatan Cohen 	    qp_type == MLX5_IB_QPT_DCI)
1190e126ba97SEli Cohen 		return 1;
1191e126ba97SEli Cohen 
1192e126ba97SEli Cohen 	return 0;
1193e126ba97SEli Cohen }
1194e126ba97SEli Cohen 
11950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
1196c2e53b2cSYishai Hadas 				    struct mlx5_ib_qp *qp,
11971cd6dbd3SYishai Hadas 				    struct mlx5_ib_sq *sq, u32 tdn,
11981cd6dbd3SYishai Hadas 				    struct ib_pd *pd)
11990fb2ed66Smajd@mellanox.com {
1200c4f287c4SSaeed Mahameed 	u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0};
12010fb2ed66Smajd@mellanox.com 	void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
12020fb2ed66Smajd@mellanox.com 
12031cd6dbd3SYishai Hadas 	MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid);
12040fb2ed66Smajd@mellanox.com 	MLX5_SET(tisc, tisc, transport_domain, tdn);
1205c2e53b2cSYishai Hadas 	if (qp->flags & MLX5_IB_QP_UNDERLAY)
1206c2e53b2cSYishai Hadas 		MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn);
1207c2e53b2cSYishai Hadas 
12080fb2ed66Smajd@mellanox.com 	return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn);
12090fb2ed66Smajd@mellanox.com }
12100fb2ed66Smajd@mellanox.com 
12110fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
12121cd6dbd3SYishai Hadas 				      struct mlx5_ib_sq *sq, struct ib_pd *pd)
12130fb2ed66Smajd@mellanox.com {
12141cd6dbd3SYishai Hadas 	mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid);
12150fb2ed66Smajd@mellanox.com }
12160fb2ed66Smajd@mellanox.com 
1217d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq)
1218b96c9ddeSMark Bloch {
1219b96c9ddeSMark Bloch 	if (sq->flow_rule)
1220b96c9ddeSMark Bloch 		mlx5_del_flow_rules(sq->flow_rule);
1221d5ed8ac3SMark Bloch 	sq->flow_rule = NULL;
1222b96c9ddeSMark Bloch }
1223b96c9ddeSMark Bloch 
12240fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
1225b0ea0fa5SJason Gunthorpe 				   struct ib_udata *udata,
12260fb2ed66Smajd@mellanox.com 				   struct mlx5_ib_sq *sq, void *qpin,
12270fb2ed66Smajd@mellanox.com 				   struct ib_pd *pd)
12280fb2ed66Smajd@mellanox.com {
12290fb2ed66Smajd@mellanox.com 	struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer;
12300fb2ed66Smajd@mellanox.com 	__be64 *pas;
12310fb2ed66Smajd@mellanox.com 	void *in;
12320fb2ed66Smajd@mellanox.com 	void *sqc;
12330fb2ed66Smajd@mellanox.com 	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
12340fb2ed66Smajd@mellanox.com 	void *wq;
12350fb2ed66Smajd@mellanox.com 	int inlen;
12360fb2ed66Smajd@mellanox.com 	int err;
12370fb2ed66Smajd@mellanox.com 	int page_shift = 0;
12380fb2ed66Smajd@mellanox.com 	int npages;
12390fb2ed66Smajd@mellanox.com 	int ncont = 0;
12400fb2ed66Smajd@mellanox.com 	u32 offset = 0;
12410fb2ed66Smajd@mellanox.com 
1242b0ea0fa5SJason Gunthorpe 	err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size,
1243b0ea0fa5SJason Gunthorpe 			       &sq->ubuffer.umem, &npages, &page_shift, &ncont,
1244b0ea0fa5SJason Gunthorpe 			       &offset);
12450fb2ed66Smajd@mellanox.com 	if (err)
12460fb2ed66Smajd@mellanox.com 		return err;
12470fb2ed66Smajd@mellanox.com 
12480fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont;
12491b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
12500fb2ed66Smajd@mellanox.com 	if (!in) {
12510fb2ed66Smajd@mellanox.com 		err = -ENOMEM;
12520fb2ed66Smajd@mellanox.com 		goto err_umem;
12530fb2ed66Smajd@mellanox.com 	}
12540fb2ed66Smajd@mellanox.com 
1255c14003f0SYishai Hadas 	MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid);
12560fb2ed66Smajd@mellanox.com 	sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
12570fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, flush_in_error_en, 1);
1258795b609cSBodong Wang 	if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe))
1259795b609cSBodong Wang 		MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1);
12600fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
12610fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index));
12620fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd));
12630fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, tis_lst_sz, 1);
12640fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, tis_num_0, sq->tisn);
126596dc3fc5SNoa Osherovich 	if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
126696dc3fc5SNoa Osherovich 	    MLX5_CAP_ETH(dev->mdev, swp))
126796dc3fc5SNoa Osherovich 		MLX5_SET(sqc, sqc, allow_swp, 1);
12680fb2ed66Smajd@mellanox.com 
12690fb2ed66Smajd@mellanox.com 	wq = MLX5_ADDR_OF(sqc, sqc, wq);
12700fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
12710fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
12720fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page));
12730fb2ed66Smajd@mellanox.com 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
12740fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB));
12750fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));
12760fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_pg_sz,  page_shift - MLX5_ADAPTER_PAGE_SHIFT);
12770fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, page_offset, offset);
12780fb2ed66Smajd@mellanox.com 
12790fb2ed66Smajd@mellanox.com 	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
12800fb2ed66Smajd@mellanox.com 	mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0);
12810fb2ed66Smajd@mellanox.com 
12820fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp);
12830fb2ed66Smajd@mellanox.com 
12840fb2ed66Smajd@mellanox.com 	kvfree(in);
12850fb2ed66Smajd@mellanox.com 
12860fb2ed66Smajd@mellanox.com 	if (err)
12870fb2ed66Smajd@mellanox.com 		goto err_umem;
12880fb2ed66Smajd@mellanox.com 
12890fb2ed66Smajd@mellanox.com 	return 0;
12900fb2ed66Smajd@mellanox.com 
12910fb2ed66Smajd@mellanox.com err_umem:
12920fb2ed66Smajd@mellanox.com 	ib_umem_release(sq->ubuffer.umem);
12930fb2ed66Smajd@mellanox.com 	sq->ubuffer.umem = NULL;
12940fb2ed66Smajd@mellanox.com 
12950fb2ed66Smajd@mellanox.com 	return err;
12960fb2ed66Smajd@mellanox.com }
12970fb2ed66Smajd@mellanox.com 
12980fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
12990fb2ed66Smajd@mellanox.com 				     struct mlx5_ib_sq *sq)
13000fb2ed66Smajd@mellanox.com {
1301d5ed8ac3SMark Bloch 	destroy_flow_rule_vport_sq(sq);
13020fb2ed66Smajd@mellanox.com 	mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp);
13030fb2ed66Smajd@mellanox.com 	ib_umem_release(sq->ubuffer.umem);
13040fb2ed66Smajd@mellanox.com }
13050fb2ed66Smajd@mellanox.com 
13062c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc)
13070fb2ed66Smajd@mellanox.com {
13080fb2ed66Smajd@mellanox.com 	u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12;
13090fb2ed66Smajd@mellanox.com 	u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride);
13100fb2ed66Smajd@mellanox.com 	u32 log_rq_size   = MLX5_GET(qpc, qpc, log_rq_size);
13110fb2ed66Smajd@mellanox.com 	u32 page_offset   = MLX5_GET(qpc, qpc, page_offset);
13120fb2ed66Smajd@mellanox.com 	u32 po_quanta	  = 1 << (log_page_size - 6);
13130fb2ed66Smajd@mellanox.com 	u32 rq_sz	  = 1 << (log_rq_size + 4 + log_rq_stride);
13140fb2ed66Smajd@mellanox.com 	u32 page_size	  = 1 << log_page_size;
13150fb2ed66Smajd@mellanox.com 	u32 rq_sz_po      = rq_sz + (page_offset * po_quanta);
13160fb2ed66Smajd@mellanox.com 	u32 rq_num_pas	  = (rq_sz_po + page_size - 1) / page_size;
13170fb2ed66Smajd@mellanox.com 
13180fb2ed66Smajd@mellanox.com 	return rq_num_pas * sizeof(u64);
13190fb2ed66Smajd@mellanox.com }
13200fb2ed66Smajd@mellanox.com 
13210fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
13222c292dbbSBoris Pismenny 				   struct mlx5_ib_rq *rq, void *qpin,
132334d57585SYishai Hadas 				   size_t qpinlen, struct ib_pd *pd)
13240fb2ed66Smajd@mellanox.com {
1325358e42eaSMajd Dibbiny 	struct mlx5_ib_qp *mqp = rq->base.container_mibqp;
13260fb2ed66Smajd@mellanox.com 	__be64 *pas;
13270fb2ed66Smajd@mellanox.com 	__be64 *qp_pas;
13280fb2ed66Smajd@mellanox.com 	void *in;
13290fb2ed66Smajd@mellanox.com 	void *rqc;
13300fb2ed66Smajd@mellanox.com 	void *wq;
13310fb2ed66Smajd@mellanox.com 	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
13322c292dbbSBoris Pismenny 	size_t rq_pas_size = get_rq_pas_size(qpc);
13332c292dbbSBoris Pismenny 	size_t inlen;
13340fb2ed66Smajd@mellanox.com 	int err;
13352c292dbbSBoris Pismenny 
13362c292dbbSBoris Pismenny 	if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas))
13372c292dbbSBoris Pismenny 		return -EINVAL;
13380fb2ed66Smajd@mellanox.com 
13390fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size;
13401b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
13410fb2ed66Smajd@mellanox.com 	if (!in)
13420fb2ed66Smajd@mellanox.com 		return -ENOMEM;
13430fb2ed66Smajd@mellanox.com 
134434d57585SYishai Hadas 	MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid);
13450fb2ed66Smajd@mellanox.com 	rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
1346e4cc4fa7SNoa Osherovich 	if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING))
13470fb2ed66Smajd@mellanox.com 		MLX5_SET(rqc, rqc, vsd, 1);
13480fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE);
13490fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST);
13500fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, flush_in_error_en, 1);
13510fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index));
13520fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv));
13530fb2ed66Smajd@mellanox.com 
1354358e42eaSMajd Dibbiny 	if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS)
1355358e42eaSMajd Dibbiny 		MLX5_SET(rqc, rqc, scatter_fcs, 1);
1356358e42eaSMajd Dibbiny 
13570fb2ed66Smajd@mellanox.com 	wq = MLX5_ADDR_OF(rqc, rqc, wq);
13580fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
1359b1383aa6SNoa Osherovich 	if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING)
1360b1383aa6SNoa Osherovich 		MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
13610fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset));
13620fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
13630fb2ed66Smajd@mellanox.com 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
13640fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4);
13650fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size));
13660fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size));
13670fb2ed66Smajd@mellanox.com 
13680fb2ed66Smajd@mellanox.com 	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
13690fb2ed66Smajd@mellanox.com 	qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas);
13700fb2ed66Smajd@mellanox.com 	memcpy(pas, qp_pas, rq_pas_size);
13710fb2ed66Smajd@mellanox.com 
13720fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp);
13730fb2ed66Smajd@mellanox.com 
13740fb2ed66Smajd@mellanox.com 	kvfree(in);
13750fb2ed66Smajd@mellanox.com 
13760fb2ed66Smajd@mellanox.com 	return err;
13770fb2ed66Smajd@mellanox.com }
13780fb2ed66Smajd@mellanox.com 
13790fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
13800fb2ed66Smajd@mellanox.com 				     struct mlx5_ib_rq *rq)
13810fb2ed66Smajd@mellanox.com {
13820fb2ed66Smajd@mellanox.com 	mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp);
13830fb2ed66Smajd@mellanox.com }
13840fb2ed66Smajd@mellanox.com 
1385f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev)
1386f95ef6cbSMaor Gottlieb {
1387f95ef6cbSMaor Gottlieb 	return  (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) ||
1388f95ef6cbSMaor Gottlieb 		 MLX5_CAP_ETH(dev, tunnel_stateless_gre) ||
1389f95ef6cbSMaor Gottlieb 		 MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx));
1390f95ef6cbSMaor Gottlieb }
1391f95ef6cbSMaor Gottlieb 
13920042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
13930042f9e4SMark Bloch 				      struct mlx5_ib_rq *rq,
1394443c1cf9SYishai Hadas 				      u32 qp_flags_en,
1395443c1cf9SYishai Hadas 				      struct ib_pd *pd)
13960042f9e4SMark Bloch {
13970042f9e4SMark Bloch 	if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
13980042f9e4SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC))
13990042f9e4SMark Bloch 		mlx5_ib_disable_lb(dev, false, true);
1400443c1cf9SYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid);
14010042f9e4SMark Bloch }
14020042f9e4SMark Bloch 
14030fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
1404f95ef6cbSMaor Gottlieb 				    struct mlx5_ib_rq *rq, u32 tdn,
1405443c1cf9SYishai Hadas 				    u32 *qp_flags_en,
1406443c1cf9SYishai Hadas 				    struct ib_pd *pd)
14070fb2ed66Smajd@mellanox.com {
1408175edba8SMark Bloch 	u8 lb_flag = 0;
14090fb2ed66Smajd@mellanox.com 	u32 *in;
14100fb2ed66Smajd@mellanox.com 	void *tirc;
14110fb2ed66Smajd@mellanox.com 	int inlen;
14120fb2ed66Smajd@mellanox.com 	int err;
14130fb2ed66Smajd@mellanox.com 
14140fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_tir_in);
14151b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
14160fb2ed66Smajd@mellanox.com 	if (!in)
14170fb2ed66Smajd@mellanox.com 		return -ENOMEM;
14180fb2ed66Smajd@mellanox.com 
1419443c1cf9SYishai Hadas 	MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid);
14200fb2ed66Smajd@mellanox.com 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
14210fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
14220fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn);
14230fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, transport_domain, tdn);
1424175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1425f95ef6cbSMaor Gottlieb 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
14260fb2ed66Smajd@mellanox.com 
1427175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC)
1428175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1429175edba8SMark Bloch 
1430175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)
1431175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
1432175edba8SMark Bloch 
14336a4d00beSMark Bloch 	if (dev->is_rep) {
1434175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1435175edba8SMark Bloch 		*qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
1436175edba8SMark Bloch 	}
1437175edba8SMark Bloch 
1438175edba8SMark Bloch 	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1439ec9c2fb8SMark Bloch 
14400fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn);
14410fb2ed66Smajd@mellanox.com 
14420042f9e4SMark Bloch 	if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
14430042f9e4SMark Bloch 		err = mlx5_ib_enable_lb(dev, false, true);
14440042f9e4SMark Bloch 
14450042f9e4SMark Bloch 		if (err)
1446443c1cf9SYishai Hadas 			destroy_raw_packet_qp_tir(dev, rq, 0, pd);
14470042f9e4SMark Bloch 	}
14480fb2ed66Smajd@mellanox.com 	kvfree(in);
14490fb2ed66Smajd@mellanox.com 
14500fb2ed66Smajd@mellanox.com 	return err;
14510fb2ed66Smajd@mellanox.com }
14520fb2ed66Smajd@mellanox.com 
14530fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
14542c292dbbSBoris Pismenny 				u32 *in, size_t inlen,
14557f72052cSYishai Hadas 				struct ib_pd *pd,
14567f72052cSYishai Hadas 				struct ib_udata *udata,
14577f72052cSYishai Hadas 				struct mlx5_ib_create_qp_resp *resp)
14580fb2ed66Smajd@mellanox.com {
14590fb2ed66Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
14600fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
14610fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
146289944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context(
146389944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
14640fb2ed66Smajd@mellanox.com 	int err;
14650fb2ed66Smajd@mellanox.com 	u32 tdn = mucontext->tdn;
14667f72052cSYishai Hadas 	u16 uid = to_mpd(pd)->uid;
14670fb2ed66Smajd@mellanox.com 
14680fb2ed66Smajd@mellanox.com 	if (qp->sq.wqe_cnt) {
14691cd6dbd3SYishai Hadas 		err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd);
14700fb2ed66Smajd@mellanox.com 		if (err)
14710fb2ed66Smajd@mellanox.com 			return err;
14720fb2ed66Smajd@mellanox.com 
1473b0ea0fa5SJason Gunthorpe 		err = create_raw_packet_qp_sq(dev, udata, sq, in, pd);
14740fb2ed66Smajd@mellanox.com 		if (err)
14750fb2ed66Smajd@mellanox.com 			goto err_destroy_tis;
14760fb2ed66Smajd@mellanox.com 
14777f72052cSYishai Hadas 		if (uid) {
14787f72052cSYishai Hadas 			resp->tisn = sq->tisn;
14797f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN;
14807f72052cSYishai Hadas 			resp->sqn = sq->base.mqp.qpn;
14817f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN;
14827f72052cSYishai Hadas 		}
14837f72052cSYishai Hadas 
14840fb2ed66Smajd@mellanox.com 		sq->base.container_mibqp = qp;
14851d31e9c0SMajd Dibbiny 		sq->base.mqp.event = mlx5_ib_qp_event;
14860fb2ed66Smajd@mellanox.com 	}
14870fb2ed66Smajd@mellanox.com 
14880fb2ed66Smajd@mellanox.com 	if (qp->rq.wqe_cnt) {
1489358e42eaSMajd Dibbiny 		rq->base.container_mibqp = qp;
1490358e42eaSMajd Dibbiny 
1491e4cc4fa7SNoa Osherovich 		if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING)
1492e4cc4fa7SNoa Osherovich 			rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING;
1493b1383aa6SNoa Osherovich 		if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING)
1494b1383aa6SNoa Osherovich 			rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING;
149534d57585SYishai Hadas 		err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd);
14960fb2ed66Smajd@mellanox.com 		if (err)
14970fb2ed66Smajd@mellanox.com 			goto err_destroy_sq;
14980fb2ed66Smajd@mellanox.com 
1499443c1cf9SYishai Hadas 		err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd);
15000fb2ed66Smajd@mellanox.com 		if (err)
15010fb2ed66Smajd@mellanox.com 			goto err_destroy_rq;
15027f72052cSYishai Hadas 
15037f72052cSYishai Hadas 		if (uid) {
15047f72052cSYishai Hadas 			resp->rqn = rq->base.mqp.qpn;
15057f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN;
15067f72052cSYishai Hadas 			resp->tirn = rq->tirn;
15077f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN;
15087f72052cSYishai Hadas 		}
15090fb2ed66Smajd@mellanox.com 	}
15100fb2ed66Smajd@mellanox.com 
15110fb2ed66Smajd@mellanox.com 	qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn :
15120fb2ed66Smajd@mellanox.com 						     rq->base.mqp.qpn;
15137f72052cSYishai Hadas 	err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp)));
15147f72052cSYishai Hadas 	if (err)
15157f72052cSYishai Hadas 		goto err_destroy_tir;
15160fb2ed66Smajd@mellanox.com 
15170fb2ed66Smajd@mellanox.com 	return 0;
15180fb2ed66Smajd@mellanox.com 
15197f72052cSYishai Hadas err_destroy_tir:
15207f72052cSYishai Hadas 	destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd);
15210fb2ed66Smajd@mellanox.com err_destroy_rq:
15220fb2ed66Smajd@mellanox.com 	destroy_raw_packet_qp_rq(dev, rq);
15230fb2ed66Smajd@mellanox.com err_destroy_sq:
15240fb2ed66Smajd@mellanox.com 	if (!qp->sq.wqe_cnt)
15250fb2ed66Smajd@mellanox.com 		return err;
15260fb2ed66Smajd@mellanox.com 	destroy_raw_packet_qp_sq(dev, sq);
15270fb2ed66Smajd@mellanox.com err_destroy_tis:
15281cd6dbd3SYishai Hadas 	destroy_raw_packet_qp_tis(dev, sq, pd);
15290fb2ed66Smajd@mellanox.com 
15300fb2ed66Smajd@mellanox.com 	return err;
15310fb2ed66Smajd@mellanox.com }
15320fb2ed66Smajd@mellanox.com 
15330fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev,
15340fb2ed66Smajd@mellanox.com 				  struct mlx5_ib_qp *qp)
15350fb2ed66Smajd@mellanox.com {
15360fb2ed66Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
15370fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
15380fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
15390fb2ed66Smajd@mellanox.com 
15400fb2ed66Smajd@mellanox.com 	if (qp->rq.wqe_cnt) {
1541443c1cf9SYishai Hadas 		destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd);
15420fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp_rq(dev, rq);
15430fb2ed66Smajd@mellanox.com 	}
15440fb2ed66Smajd@mellanox.com 
15450fb2ed66Smajd@mellanox.com 	if (qp->sq.wqe_cnt) {
15460fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp_sq(dev, sq);
15471cd6dbd3SYishai Hadas 		destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd);
15480fb2ed66Smajd@mellanox.com 	}
15490fb2ed66Smajd@mellanox.com }
15500fb2ed66Smajd@mellanox.com 
15510fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp,
15520fb2ed66Smajd@mellanox.com 				    struct mlx5_ib_raw_packet_qp *raw_packet_qp)
15530fb2ed66Smajd@mellanox.com {
15540fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
15550fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
15560fb2ed66Smajd@mellanox.com 
15570fb2ed66Smajd@mellanox.com 	sq->sq = &qp->sq;
15580fb2ed66Smajd@mellanox.com 	rq->rq = &qp->rq;
15590fb2ed66Smajd@mellanox.com 	sq->doorbell = &qp->db;
15600fb2ed66Smajd@mellanox.com 	rq->doorbell = &qp->db;
15610fb2ed66Smajd@mellanox.com }
15620fb2ed66Smajd@mellanox.com 
156328d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp)
156428d61370SYishai Hadas {
15650042f9e4SMark Bloch 	if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
15660042f9e4SMark Bloch 			    MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC))
15670042f9e4SMark Bloch 		mlx5_ib_disable_lb(dev, false, true);
1568443c1cf9SYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn,
1569443c1cf9SYishai Hadas 			     to_mpd(qp->ibqp.pd)->uid);
157028d61370SYishai Hadas }
157128d61370SYishai Hadas 
157228d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
157328d61370SYishai Hadas 				 struct ib_pd *pd,
157428d61370SYishai Hadas 				 struct ib_qp_init_attr *init_attr,
157528d61370SYishai Hadas 				 struct ib_udata *udata)
157628d61370SYishai Hadas {
157789944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context(
157889944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
157928d61370SYishai Hadas 	struct mlx5_ib_create_qp_resp resp = {};
158028d61370SYishai Hadas 	int inlen;
158128d61370SYishai Hadas 	int err;
158228d61370SYishai Hadas 	u32 *in;
158328d61370SYishai Hadas 	void *tirc;
158428d61370SYishai Hadas 	void *hfso;
158528d61370SYishai Hadas 	u32 selected_fields = 0;
15862d93fc85SMatan Barak 	u32 outer_l4;
158728d61370SYishai Hadas 	size_t min_resp_len;
158828d61370SYishai Hadas 	u32 tdn = mucontext->tdn;
158928d61370SYishai Hadas 	struct mlx5_ib_create_qp_rss ucmd = {};
159028d61370SYishai Hadas 	size_t required_cmd_sz;
1591175edba8SMark Bloch 	u8 lb_flag = 0;
159228d61370SYishai Hadas 
159328d61370SYishai Hadas 	if (init_attr->qp_type != IB_QPT_RAW_PACKET)
159428d61370SYishai Hadas 		return -EOPNOTSUPP;
159528d61370SYishai Hadas 
159628d61370SYishai Hadas 	if (init_attr->create_flags || init_attr->send_cq)
159728d61370SYishai Hadas 		return -EINVAL;
159828d61370SYishai Hadas 
15992f5ff264SEli Cohen 	min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index);
160028d61370SYishai Hadas 	if (udata->outlen < min_resp_len)
160128d61370SYishai Hadas 		return -EINVAL;
160228d61370SYishai Hadas 
1603f95ef6cbSMaor Gottlieb 	required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags);
160428d61370SYishai Hadas 	if (udata->inlen < required_cmd_sz) {
160528d61370SYishai Hadas 		mlx5_ib_dbg(dev, "invalid inlen\n");
160628d61370SYishai Hadas 		return -EINVAL;
160728d61370SYishai Hadas 	}
160828d61370SYishai Hadas 
160928d61370SYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
161028d61370SYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
161128d61370SYishai Hadas 				 udata->inlen - sizeof(ucmd))) {
161228d61370SYishai Hadas 		mlx5_ib_dbg(dev, "inlen is not supported\n");
161328d61370SYishai Hadas 		return -EOPNOTSUPP;
161428d61370SYishai Hadas 	}
161528d61370SYishai Hadas 
161628d61370SYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) {
161728d61370SYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
161828d61370SYishai Hadas 		return -EFAULT;
161928d61370SYishai Hadas 	}
162028d61370SYishai Hadas 
162128d61370SYishai Hadas 	if (ucmd.comp_mask) {
162228d61370SYishai Hadas 		mlx5_ib_dbg(dev, "invalid comp mask\n");
162328d61370SYishai Hadas 		return -EOPNOTSUPP;
162428d61370SYishai Hadas 	}
162528d61370SYishai Hadas 
1626175edba8SMark Bloch 	if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS |
1627175edba8SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
1628175edba8SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) {
1629f95ef6cbSMaor Gottlieb 		mlx5_ib_dbg(dev, "invalid flags\n");
1630f95ef6cbSMaor Gottlieb 		return -EOPNOTSUPP;
1631f95ef6cbSMaor Gottlieb 	}
1632f95ef6cbSMaor Gottlieb 
1633f95ef6cbSMaor Gottlieb 	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS &&
1634f95ef6cbSMaor Gottlieb 	    !tunnel_offload_supported(dev->mdev)) {
1635f95ef6cbSMaor Gottlieb 		mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n");
163628d61370SYishai Hadas 		return -EOPNOTSUPP;
163728d61370SYishai Hadas 	}
163828d61370SYishai Hadas 
1639309fa347SMaor Gottlieb 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER &&
1640309fa347SMaor Gottlieb 	    !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) {
1641309fa347SMaor Gottlieb 		mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n");
1642309fa347SMaor Gottlieb 		return -EOPNOTSUPP;
1643309fa347SMaor Gottlieb 	}
1644309fa347SMaor Gottlieb 
16456a4d00beSMark Bloch 	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->is_rep) {
1646175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1647175edba8SMark Bloch 		qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
1648175edba8SMark Bloch 	}
1649175edba8SMark Bloch 
1650175edba8SMark Bloch 	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
1651175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
1652175edba8SMark Bloch 		qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
1653175edba8SMark Bloch 	}
1654175edba8SMark Bloch 
165541d902cbSJason Gunthorpe 	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
165628d61370SYishai Hadas 	if (err) {
165728d61370SYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
165828d61370SYishai Hadas 		return -EINVAL;
165928d61370SYishai Hadas 	}
166028d61370SYishai Hadas 
166128d61370SYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_tir_in);
16621b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
166328d61370SYishai Hadas 	if (!in)
166428d61370SYishai Hadas 		return -ENOMEM;
166528d61370SYishai Hadas 
1666443c1cf9SYishai Hadas 	MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid);
166728d61370SYishai Hadas 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
166828d61370SYishai Hadas 	MLX5_SET(tirc, tirc, disp_type,
166928d61370SYishai Hadas 		 MLX5_TIRC_DISP_TYPE_INDIRECT);
167028d61370SYishai Hadas 	MLX5_SET(tirc, tirc, indirect_table,
167128d61370SYishai Hadas 		 init_attr->rwq_ind_tbl->ind_tbl_num);
167228d61370SYishai Hadas 	MLX5_SET(tirc, tirc, transport_domain, tdn);
167328d61370SYishai Hadas 
167428d61370SYishai Hadas 	hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
1675f95ef6cbSMaor Gottlieb 
1676f95ef6cbSMaor Gottlieb 	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1677f95ef6cbSMaor Gottlieb 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
1678f95ef6cbSMaor Gottlieb 
1679175edba8SMark Bloch 	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1680175edba8SMark Bloch 
1681309fa347SMaor Gottlieb 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER)
1682309fa347SMaor Gottlieb 		hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner);
1683309fa347SMaor Gottlieb 	else
1684309fa347SMaor Gottlieb 		hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
1685309fa347SMaor Gottlieb 
168628d61370SYishai Hadas 	switch (ucmd.rx_hash_function) {
168728d61370SYishai Hadas 	case MLX5_RX_HASH_FUNC_TOEPLITZ:
168828d61370SYishai Hadas 	{
168928d61370SYishai Hadas 		void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key);
169028d61370SYishai Hadas 		size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key);
169128d61370SYishai Hadas 
169228d61370SYishai Hadas 		if (len != ucmd.rx_key_len) {
169328d61370SYishai Hadas 			err = -EINVAL;
169428d61370SYishai Hadas 			goto err;
169528d61370SYishai Hadas 		}
169628d61370SYishai Hadas 
169728d61370SYishai Hadas 		MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ);
169828d61370SYishai Hadas 		MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
169928d61370SYishai Hadas 		memcpy(rss_key, ucmd.rx_hash_key, len);
170028d61370SYishai Hadas 		break;
170128d61370SYishai Hadas 	}
170228d61370SYishai Hadas 	default:
170328d61370SYishai Hadas 		err = -EOPNOTSUPP;
170428d61370SYishai Hadas 		goto err;
170528d61370SYishai Hadas 	}
170628d61370SYishai Hadas 
170728d61370SYishai Hadas 	if (!ucmd.rx_hash_fields_mask) {
170828d61370SYishai Hadas 		/* special case when this TIR serves as steering entry without hashing */
170928d61370SYishai Hadas 		if (!init_attr->rwq_ind_tbl->log_ind_tbl_size)
171028d61370SYishai Hadas 			goto create_tir;
171128d61370SYishai Hadas 		err = -EINVAL;
171228d61370SYishai Hadas 		goto err;
171328d61370SYishai Hadas 	}
171428d61370SYishai Hadas 
171528d61370SYishai Hadas 	if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
171628d61370SYishai Hadas 	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) &&
171728d61370SYishai Hadas 	     ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) ||
171828d61370SYishai Hadas 	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) {
171928d61370SYishai Hadas 		err = -EINVAL;
172028d61370SYishai Hadas 		goto err;
172128d61370SYishai Hadas 	}
172228d61370SYishai Hadas 
172328d61370SYishai Hadas 	/* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */
172428d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
172528d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4))
172628d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
172728d61370SYishai Hadas 			 MLX5_L3_PROT_TYPE_IPV4);
172828d61370SYishai Hadas 	else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) ||
172928d61370SYishai Hadas 		 (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))
173028d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
173128d61370SYishai Hadas 			 MLX5_L3_PROT_TYPE_IPV6);
173228d61370SYishai Hadas 
17332d93fc85SMatan Barak 	outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
17342d93fc85SMatan Barak 		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 |
173528d61370SYishai Hadas 		   ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||
17362d93fc85SMatan Barak 		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 |
17372d93fc85SMatan Barak 		   (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2;
17382d93fc85SMatan Barak 
17392d93fc85SMatan Barak 	/* Check that only one l4 protocol is set */
17402d93fc85SMatan Barak 	if (outer_l4 & (outer_l4 - 1)) {
174128d61370SYishai Hadas 		err = -EINVAL;
174228d61370SYishai Hadas 		goto err;
174328d61370SYishai Hadas 	}
174428d61370SYishai Hadas 
174528d61370SYishai Hadas 	/* If none of TCP & UDP SRC/DST was set - this bit field is ignored */
174628d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
174728d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP))
174828d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
174928d61370SYishai Hadas 			 MLX5_L4_PROT_TYPE_TCP);
175028d61370SYishai Hadas 	else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||
175128d61370SYishai Hadas 		 (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))
175228d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
175328d61370SYishai Hadas 			 MLX5_L4_PROT_TYPE_UDP);
175428d61370SYishai Hadas 
175528d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
175628d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6))
175728d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP;
175828d61370SYishai Hadas 
175928d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) ||
176028d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))
176128d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP;
176228d61370SYishai Hadas 
176328d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
176428d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP))
176528d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT;
176628d61370SYishai Hadas 
176728d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) ||
176828d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))
176928d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT;
177028d61370SYishai Hadas 
17712d93fc85SMatan Barak 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI)
17722d93fc85SMatan Barak 		selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI;
17732d93fc85SMatan Barak 
177428d61370SYishai Hadas 	MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);
177528d61370SYishai Hadas 
177628d61370SYishai Hadas create_tir:
177728d61370SYishai Hadas 	err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn);
177828d61370SYishai Hadas 
17790042f9e4SMark Bloch 	if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
17800042f9e4SMark Bloch 		err = mlx5_ib_enable_lb(dev, false, true);
17810042f9e4SMark Bloch 
17820042f9e4SMark Bloch 		if (err)
1783443c1cf9SYishai Hadas 			mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn,
1784443c1cf9SYishai Hadas 					     to_mpd(pd)->uid);
17850042f9e4SMark Bloch 	}
17860042f9e4SMark Bloch 
178728d61370SYishai Hadas 	if (err)
178828d61370SYishai Hadas 		goto err;
178928d61370SYishai Hadas 
17907f72052cSYishai Hadas 	if (mucontext->devx_uid) {
17917f72052cSYishai Hadas 		resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN;
17927f72052cSYishai Hadas 		resp.tirn = qp->rss_qp.tirn;
17937f72052cSYishai Hadas 	}
17947f72052cSYishai Hadas 
17957f72052cSYishai Hadas 	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
17967f72052cSYishai Hadas 	if (err)
17977f72052cSYishai Hadas 		goto err_copy;
17987f72052cSYishai Hadas 
179928d61370SYishai Hadas 	kvfree(in);
180028d61370SYishai Hadas 	/* qpn is reserved for that QP */
180128d61370SYishai Hadas 	qp->trans_qp.base.mqp.qpn = 0;
1802d9f88e5aSYishai Hadas 	qp->flags |= MLX5_IB_QP_RSS;
180328d61370SYishai Hadas 	return 0;
180428d61370SYishai Hadas 
18057f72052cSYishai Hadas err_copy:
18067f72052cSYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid);
180728d61370SYishai Hadas err:
180828d61370SYishai Hadas 	kvfree(in);
180928d61370SYishai Hadas 	return err;
181028d61370SYishai Hadas }
181128d61370SYishai Hadas 
18125d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr,
18135d6ff1baSYonatan Cohen 					 void *qpc)
18145d6ff1baSYonatan Cohen {
18155d6ff1baSYonatan Cohen 	int rcqe_sz;
18165d6ff1baSYonatan Cohen 
18175d6ff1baSYonatan Cohen 	if (init_attr->qp_type == MLX5_IB_QPT_DCI)
18185d6ff1baSYonatan Cohen 		return;
18195d6ff1baSYonatan Cohen 
18205d6ff1baSYonatan Cohen 	rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq);
18215d6ff1baSYonatan Cohen 
18225d6ff1baSYonatan Cohen 	if (rcqe_sz == 128) {
18235d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE);
18245d6ff1baSYonatan Cohen 		return;
18255d6ff1baSYonatan Cohen 	}
18265d6ff1baSYonatan Cohen 
18275d6ff1baSYonatan Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_DCT)
18285d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE);
18295d6ff1baSYonatan Cohen }
18305d6ff1baSYonatan Cohen 
18315d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,
18325d6ff1baSYonatan Cohen 					 struct ib_qp_init_attr *init_attr,
18336f4bc0eaSYonatan Cohen 					 struct mlx5_ib_create_qp *ucmd,
18345d6ff1baSYonatan Cohen 					 void *qpc)
18355d6ff1baSYonatan Cohen {
18365d6ff1baSYonatan Cohen 	enum ib_qp_type qpt = init_attr->qp_type;
18375d6ff1baSYonatan Cohen 	int scqe_sz;
18386f4bc0eaSYonatan Cohen 	bool allow_scat_cqe = 0;
18395d6ff1baSYonatan Cohen 
18405d6ff1baSYonatan Cohen 	if (qpt == IB_QPT_UC || qpt == IB_QPT_UD)
18415d6ff1baSYonatan Cohen 		return;
18425d6ff1baSYonatan Cohen 
18436f4bc0eaSYonatan Cohen 	if (ucmd)
18446f4bc0eaSYonatan Cohen 		allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE;
18456f4bc0eaSYonatan Cohen 
18466f4bc0eaSYonatan Cohen 	if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR)
18475d6ff1baSYonatan Cohen 		return;
18485d6ff1baSYonatan Cohen 
18495d6ff1baSYonatan Cohen 	scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq);
18505d6ff1baSYonatan Cohen 	if (scqe_sz == 128) {
18515d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE);
18525d6ff1baSYonatan Cohen 		return;
18535d6ff1baSYonatan Cohen 	}
18545d6ff1baSYonatan Cohen 
18555d6ff1baSYonatan Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_DCI ||
18565d6ff1baSYonatan Cohen 	    MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe))
18575d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE);
18585d6ff1baSYonatan Cohen }
18595d6ff1baSYonatan Cohen 
1860a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask)
1861a60109dcSYonatan Cohen {
1862a60109dcSYonatan Cohen 	/* driver does not support atomic_size > 256B
1863a60109dcSYonatan Cohen 	 * and does not know how to translate bigger sizes
1864a60109dcSYonatan Cohen 	 */
1865a60109dcSYonatan Cohen 	int supported_size_mask = size_mask & 0x1ff;
1866a60109dcSYonatan Cohen 	int log_max_size;
1867a60109dcSYonatan Cohen 
1868a60109dcSYonatan Cohen 	if (!supported_size_mask)
1869a60109dcSYonatan Cohen 		return -EOPNOTSUPP;
1870a60109dcSYonatan Cohen 
1871a60109dcSYonatan Cohen 	log_max_size = __fls(supported_size_mask);
1872a60109dcSYonatan Cohen 
1873a60109dcSYonatan Cohen 	if (log_max_size > 3)
1874a60109dcSYonatan Cohen 		return log_max_size;
1875a60109dcSYonatan Cohen 
1876a60109dcSYonatan Cohen 	return MLX5_ATOMIC_MODE_8B;
1877a60109dcSYonatan Cohen }
1878a60109dcSYonatan Cohen 
1879a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev,
1880a60109dcSYonatan Cohen 			   enum ib_qp_type qp_type)
1881a60109dcSYonatan Cohen {
1882a60109dcSYonatan Cohen 	u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
1883a60109dcSYonatan Cohen 	u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
1884a60109dcSYonatan Cohen 	int atomic_mode = -EOPNOTSUPP;
1885a60109dcSYonatan Cohen 	int atomic_size_mask;
1886a60109dcSYonatan Cohen 
1887a60109dcSYonatan Cohen 	if (!atomic)
1888a60109dcSYonatan Cohen 		return -EOPNOTSUPP;
1889a60109dcSYonatan Cohen 
1890a60109dcSYonatan Cohen 	if (qp_type == MLX5_IB_QPT_DCT)
1891a60109dcSYonatan Cohen 		atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc);
1892a60109dcSYonatan Cohen 	else
1893a60109dcSYonatan Cohen 		atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
1894a60109dcSYonatan Cohen 
1895a60109dcSYonatan Cohen 	if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) ||
1896a60109dcSYonatan Cohen 	    (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD))
1897a60109dcSYonatan Cohen 		atomic_mode = atomic_size_to_mode(atomic_size_mask);
1898a60109dcSYonatan Cohen 
1899a60109dcSYonatan Cohen 	if (atomic_mode <= 0 &&
1900a60109dcSYonatan Cohen 	    (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP &&
1901a60109dcSYonatan Cohen 	     atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD))
1902a60109dcSYonatan Cohen 		atomic_mode = MLX5_ATOMIC_MODE_IB_COMP;
1903a60109dcSYonatan Cohen 
1904a60109dcSYonatan Cohen 	return atomic_mode;
1905a60109dcSYonatan Cohen }
1906a60109dcSYonatan Cohen 
19072e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported)
19082e43bb31SYonatan Cohen {
19092e43bb31SYonatan Cohen 	return (input & ~supported) == 0;
19102e43bb31SYonatan Cohen }
19112e43bb31SYonatan Cohen 
1912e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
1913e126ba97SEli Cohen 			    struct ib_qp_init_attr *init_attr,
1914e126ba97SEli Cohen 			    struct ib_udata *udata, struct mlx5_ib_qp *qp)
1915e126ba97SEli Cohen {
1916e126ba97SEli Cohen 	struct mlx5_ib_resources *devr = &dev->devr;
191709a7d9ecSSaeed Mahameed 	int inlen = MLX5_ST_SZ_BYTES(create_qp_in);
1918938fe83cSSaeed Mahameed 	struct mlx5_core_dev *mdev = dev->mdev;
19190625b4baSJason Gunthorpe 	struct mlx5_ib_create_qp_resp resp = {};
192089944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
192189944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
192289ea94a7SMaor Gottlieb 	struct mlx5_ib_cq *send_cq;
192389ea94a7SMaor Gottlieb 	struct mlx5_ib_cq *recv_cq;
192489ea94a7SMaor Gottlieb 	unsigned long flags;
1925cfb5e088SHaggai Abramovsky 	u32 uidx = MLX5_IB_DEFAULT_UIDX;
192609a7d9ecSSaeed Mahameed 	struct mlx5_ib_create_qp ucmd;
192709a7d9ecSSaeed Mahameed 	struct mlx5_ib_qp_base *base;
1928e7b169f3SNoa Osherovich 	int mlx5_st;
1929cfb5e088SHaggai Abramovsky 	void *qpc;
193009a7d9ecSSaeed Mahameed 	u32 *in;
193109a7d9ecSSaeed Mahameed 	int err;
1932e126ba97SEli Cohen 
1933e126ba97SEli Cohen 	mutex_init(&qp->mutex);
1934e126ba97SEli Cohen 	spin_lock_init(&qp->sq.lock);
1935e126ba97SEli Cohen 	spin_lock_init(&qp->rq.lock);
1936e126ba97SEli Cohen 
1937e7b169f3SNoa Osherovich 	mlx5_st = to_mlx5_st(init_attr->qp_type);
1938e7b169f3SNoa Osherovich 	if (mlx5_st < 0)
1939e7b169f3SNoa Osherovich 		return -EINVAL;
1940e7b169f3SNoa Osherovich 
194128d61370SYishai Hadas 	if (init_attr->rwq_ind_tbl) {
194228d61370SYishai Hadas 		if (!udata)
194328d61370SYishai Hadas 			return -ENOSYS;
194428d61370SYishai Hadas 
194528d61370SYishai Hadas 		err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata);
194628d61370SYishai Hadas 		return err;
194728d61370SYishai Hadas 	}
194828d61370SYishai Hadas 
1949f360d88aSEli Cohen 	if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
1950938fe83cSSaeed Mahameed 		if (!MLX5_CAP_GEN(mdev, block_lb_mc)) {
1951f360d88aSEli Cohen 			mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n");
1952f360d88aSEli Cohen 			return -EINVAL;
1953f360d88aSEli Cohen 		} else {
1954f360d88aSEli Cohen 			qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK;
1955f360d88aSEli Cohen 		}
1956f360d88aSEli Cohen 	}
1957f360d88aSEli Cohen 
1958051f2630SLeon Romanovsky 	if (init_attr->create_flags &
1959051f2630SLeon Romanovsky 			(IB_QP_CREATE_CROSS_CHANNEL |
1960051f2630SLeon Romanovsky 			 IB_QP_CREATE_MANAGED_SEND |
1961051f2630SLeon Romanovsky 			 IB_QP_CREATE_MANAGED_RECV)) {
1962051f2630SLeon Romanovsky 		if (!MLX5_CAP_GEN(mdev, cd)) {
1963051f2630SLeon Romanovsky 			mlx5_ib_dbg(dev, "cross-channel isn't supported\n");
1964051f2630SLeon Romanovsky 			return -EINVAL;
1965051f2630SLeon Romanovsky 		}
1966051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL)
1967051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_CROSS_CHANNEL;
1968051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND)
1969051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_MANAGED_SEND;
1970051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV)
1971051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_MANAGED_RECV;
1972051f2630SLeon Romanovsky 	}
1973f0313965SErez Shitrit 
1974f0313965SErez Shitrit 	if (init_attr->qp_type == IB_QPT_UD &&
1975f0313965SErez Shitrit 	    (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO))
1976f0313965SErez Shitrit 		if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) {
1977f0313965SErez Shitrit 			mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n");
1978f0313965SErez Shitrit 			return -EOPNOTSUPP;
1979f0313965SErez Shitrit 		}
1980f0313965SErez Shitrit 
1981358e42eaSMajd Dibbiny 	if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) {
1982358e42eaSMajd Dibbiny 		if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
1983358e42eaSMajd Dibbiny 			mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs");
1984358e42eaSMajd Dibbiny 			return -EOPNOTSUPP;
1985358e42eaSMajd Dibbiny 		}
1986358e42eaSMajd Dibbiny 		if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) ||
1987358e42eaSMajd Dibbiny 		    !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) {
1988358e42eaSMajd Dibbiny 			mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n");
1989358e42eaSMajd Dibbiny 			return -EOPNOTSUPP;
1990358e42eaSMajd Dibbiny 		}
1991358e42eaSMajd Dibbiny 		qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS;
1992358e42eaSMajd Dibbiny 	}
1993358e42eaSMajd Dibbiny 
1994e126ba97SEli Cohen 	if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
1995e126ba97SEli Cohen 		qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;
1996e126ba97SEli Cohen 
1997e4cc4fa7SNoa Osherovich 	if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) {
1998e4cc4fa7SNoa Osherovich 		if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
1999e4cc4fa7SNoa Osherovich 		      MLX5_CAP_ETH(dev->mdev, vlan_cap)) ||
2000e4cc4fa7SNoa Osherovich 		    (init_attr->qp_type != IB_QPT_RAW_PACKET))
2001e4cc4fa7SNoa Osherovich 			return -EOPNOTSUPP;
2002e4cc4fa7SNoa Osherovich 		qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING;
2003e4cc4fa7SNoa Osherovich 	}
2004e4cc4fa7SNoa Osherovich 
2005e00b64f7SShamir Rabinovitch 	if (udata) {
2006e126ba97SEli Cohen 		if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) {
2007e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "copy failed\n");
2008e126ba97SEli Cohen 			return -EFAULT;
2009e126ba97SEli Cohen 		}
2010e126ba97SEli Cohen 
20112e43bb31SYonatan Cohen 		if (!check_flags_mask(ucmd.flags,
2012569c6651SDanit Goldberg 				      MLX5_QP_FLAG_ALLOW_SCATTER_CQE |
20138af526e0SMark Bloch 				      MLX5_QP_FLAG_BFREG_INDEX |
20148af526e0SMark Bloch 				      MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE |
20158af526e0SMark Bloch 				      MLX5_QP_FLAG_SCATTER_CQE |
20168af526e0SMark Bloch 				      MLX5_QP_FLAG_SIGNATURE |
20178af526e0SMark Bloch 				      MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC |
20188af526e0SMark Bloch 				      MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
20198af526e0SMark Bloch 				      MLX5_QP_FLAG_TUNNEL_OFFLOADS |
20208af526e0SMark Bloch 				      MLX5_QP_FLAG_TYPE_DCI |
20218af526e0SMark Bloch 				      MLX5_QP_FLAG_TYPE_DCT))
20222e43bb31SYonatan Cohen 			return -EINVAL;
20232e43bb31SYonatan Cohen 
202489944450SShamir Rabinovitch 		err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx);
2025cfb5e088SHaggai Abramovsky 		if (err)
2026cfb5e088SHaggai Abramovsky 			return err;
2027cfb5e088SHaggai Abramovsky 
2028e126ba97SEli Cohen 		qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE);
20295d6ff1baSYonatan Cohen 		if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe))
2030e126ba97SEli Cohen 			qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE);
2031f95ef6cbSMaor Gottlieb 		if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) {
2032f95ef6cbSMaor Gottlieb 			if (init_attr->qp_type != IB_QPT_RAW_PACKET ||
2033f95ef6cbSMaor Gottlieb 			    !tunnel_offload_supported(mdev)) {
2034f95ef6cbSMaor Gottlieb 				mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n");
2035f95ef6cbSMaor Gottlieb 				return -EOPNOTSUPP;
2036f95ef6cbSMaor Gottlieb 			}
2037175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS;
2038175edba8SMark Bloch 		}
2039175edba8SMark Bloch 
2040175edba8SMark Bloch 		if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) {
2041175edba8SMark Bloch 			if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2042175edba8SMark Bloch 				mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n");
2043175edba8SMark Bloch 				return -EOPNOTSUPP;
2044175edba8SMark Bloch 			}
2045175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
2046175edba8SMark Bloch 		}
2047175edba8SMark Bloch 
2048175edba8SMark Bloch 		if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
2049175edba8SMark Bloch 			if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2050175edba8SMark Bloch 				mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n");
2051175edba8SMark Bloch 				return -EOPNOTSUPP;
2052175edba8SMark Bloch 			}
2053175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
2054f95ef6cbSMaor Gottlieb 		}
2055c2e53b2cSYishai Hadas 
2056569c6651SDanit Goldberg 		if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) {
2057569c6651SDanit Goldberg 			if (init_attr->qp_type != IB_QPT_RC ||
2058569c6651SDanit Goldberg 				!MLX5_CAP_GEN(dev->mdev, qp_packet_based)) {
2059569c6651SDanit Goldberg 				mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n");
2060569c6651SDanit Goldberg 				return -EOPNOTSUPP;
2061569c6651SDanit Goldberg 			}
2062569c6651SDanit Goldberg 			qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT;
2063569c6651SDanit Goldberg 		}
2064569c6651SDanit Goldberg 
2065c2e53b2cSYishai Hadas 		if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) {
2066c2e53b2cSYishai Hadas 			if (init_attr->qp_type != IB_QPT_UD ||
2067c2e53b2cSYishai Hadas 			    (MLX5_CAP_GEN(dev->mdev, port_type) !=
2068c2e53b2cSYishai Hadas 			     MLX5_CAP_PORT_TYPE_IB) ||
2069c2e53b2cSYishai Hadas 			    !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) {
2070c2e53b2cSYishai Hadas 				mlx5_ib_dbg(dev, "Source QP option isn't supported\n");
2071c2e53b2cSYishai Hadas 				return -EOPNOTSUPP;
2072c2e53b2cSYishai Hadas 			}
2073c2e53b2cSYishai Hadas 
2074c2e53b2cSYishai Hadas 			qp->flags |= MLX5_IB_QP_UNDERLAY;
2075c2e53b2cSYishai Hadas 			qp->underlay_qpn = init_attr->source_qpn;
2076c2e53b2cSYishai Hadas 		}
2077e126ba97SEli Cohen 	} else {
2078e126ba97SEli Cohen 		qp->wq_sig = !!wq_signature;
2079e126ba97SEli Cohen 	}
2080e126ba97SEli Cohen 
2081c2e53b2cSYishai Hadas 	base = (init_attr->qp_type == IB_QPT_RAW_PACKET ||
2082c2e53b2cSYishai Hadas 		qp->flags & MLX5_IB_QP_UNDERLAY) ?
2083c2e53b2cSYishai Hadas 	       &qp->raw_packet_qp.rq.base :
2084c2e53b2cSYishai Hadas 	       &qp->trans_qp.base;
2085c2e53b2cSYishai Hadas 
2086e126ba97SEli Cohen 	qp->has_rq = qp_has_rq(init_attr);
2087e126ba97SEli Cohen 	err = set_rq_size(dev, &init_attr->cap, qp->has_rq,
2088e00b64f7SShamir Rabinovitch 			  qp, udata ? &ucmd : NULL);
2089e126ba97SEli Cohen 	if (err) {
2090e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
2091e126ba97SEli Cohen 		return err;
2092e126ba97SEli Cohen 	}
2093e126ba97SEli Cohen 
2094e126ba97SEli Cohen 	if (pd) {
2095e00b64f7SShamir Rabinovitch 		if (udata) {
2096938fe83cSSaeed Mahameed 			__u32 max_wqes =
2097938fe83cSSaeed Mahameed 				1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
2098e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count);
2099e126ba97SEli Cohen 			if (ucmd.rq_wqe_shift != qp->rq.wqe_shift ||
2100e126ba97SEli Cohen 			    ucmd.rq_wqe_count != qp->rq.wqe_cnt) {
2101e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "invalid rq params\n");
2102e126ba97SEli Cohen 				return -EINVAL;
2103e126ba97SEli Cohen 			}
2104938fe83cSSaeed Mahameed 			if (ucmd.sq_wqe_count > max_wqes) {
2105e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n",
2106938fe83cSSaeed Mahameed 					    ucmd.sq_wqe_count, max_wqes);
2107e126ba97SEli Cohen 				return -EINVAL;
2108e126ba97SEli Cohen 			}
2109b11a4f9cSHaggai Eran 			if (init_attr->create_flags &
2110b11a4f9cSHaggai Eran 			    mlx5_ib_create_qp_sqpn_qp1()) {
2111b11a4f9cSHaggai Eran 				mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n");
2112b11a4f9cSHaggai Eran 				return -EINVAL;
2113b11a4f9cSHaggai Eran 			}
21140fb2ed66Smajd@mellanox.com 			err = create_user_qp(dev, pd, qp, udata, init_attr, &in,
21150fb2ed66Smajd@mellanox.com 					     &resp, &inlen, base);
2116e126ba97SEli Cohen 			if (err)
2117e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "err %d\n", err);
2118e126ba97SEli Cohen 		} else {
211919098df2Smajd@mellanox.com 			err = create_kernel_qp(dev, init_attr, qp, &in, &inlen,
212019098df2Smajd@mellanox.com 					       base);
2121e126ba97SEli Cohen 			if (err)
2122e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "err %d\n", err);
2123e126ba97SEli Cohen 		}
2124e126ba97SEli Cohen 
2125e126ba97SEli Cohen 		if (err)
2126e126ba97SEli Cohen 			return err;
2127e126ba97SEli Cohen 	} else {
21281b9a07eeSLeon Romanovsky 		in = kvzalloc(inlen, GFP_KERNEL);
2129e126ba97SEli Cohen 		if (!in)
2130e126ba97SEli Cohen 			return -ENOMEM;
2131e126ba97SEli Cohen 
2132e126ba97SEli Cohen 		qp->create_type = MLX5_QP_EMPTY;
2133e126ba97SEli Cohen 	}
2134e126ba97SEli Cohen 
2135e126ba97SEli Cohen 	if (is_sqp(init_attr->qp_type))
2136e126ba97SEli Cohen 		qp->port = init_attr->port_num;
2137e126ba97SEli Cohen 
213809a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
213909a7d9ecSSaeed Mahameed 
2140e7b169f3SNoa Osherovich 	MLX5_SET(qpc, qpc, st, mlx5_st);
214109a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2142e126ba97SEli Cohen 
2143e126ba97SEli Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR)
214409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn);
2145e126ba97SEli Cohen 	else
214609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, latency_sensitive, 1);
214709a7d9ecSSaeed Mahameed 
2148e126ba97SEli Cohen 
2149e126ba97SEli Cohen 	if (qp->wq_sig)
215009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, wq_signature, 1);
2151e126ba97SEli Cohen 
2152f360d88aSEli Cohen 	if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
215309a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, block_lb_mc, 1);
2154f360d88aSEli Cohen 
2155051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
215609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_master, 1);
2157051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_SEND)
215809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_slave_send, 1);
2159051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_RECV)
216009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_slave_receive, 1);
2161569c6651SDanit Goldberg 	if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT)
2162569c6651SDanit Goldberg 		MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1);
2163e126ba97SEli Cohen 	if (qp->scat_cqe && is_connected(init_attr->qp_type)) {
21645d6ff1baSYonatan Cohen 		configure_responder_scat_cqe(init_attr, qpc);
21656f4bc0eaSYonatan Cohen 		configure_requester_scat_cqe(dev, init_attr,
2166e00b64f7SShamir Rabinovitch 					     udata ? &ucmd : NULL,
21676f4bc0eaSYonatan Cohen 					     qpc);
2168e126ba97SEli Cohen 	}
2169e126ba97SEli Cohen 
2170e126ba97SEli Cohen 	if (qp->rq.wqe_cnt) {
217109a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
217209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt));
2173e126ba97SEli Cohen 	}
2174e126ba97SEli Cohen 
217509a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr));
2176e126ba97SEli Cohen 
21773fd3307eSArtemy Kovalyov 	if (qp->sq.wqe_cnt) {
217809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt));
21793fd3307eSArtemy Kovalyov 	} else {
218009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, no_sq, 1);
21813fd3307eSArtemy Kovalyov 		if (init_attr->srq &&
21823fd3307eSArtemy Kovalyov 		    init_attr->srq->srq_type == IB_SRQT_TM)
21833fd3307eSArtemy Kovalyov 			MLX5_SET(qpc, qpc, offload_type,
21843fd3307eSArtemy Kovalyov 				 MLX5_QPC_OFFLOAD_TYPE_RNDV);
21853fd3307eSArtemy Kovalyov 	}
2186e126ba97SEli Cohen 
2187e126ba97SEli Cohen 	/* Set default resources */
2188e126ba97SEli Cohen 	switch (init_attr->qp_type) {
2189e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
219009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
219109a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn);
219209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
219309a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn);
2194e126ba97SEli Cohen 		break;
2195e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
219609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
219709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn);
219809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
2199e126ba97SEli Cohen 		break;
2200e126ba97SEli Cohen 	default:
2201e126ba97SEli Cohen 		if (init_attr->srq) {
220209a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn);
220309a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn);
2204e126ba97SEli Cohen 		} else {
220509a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn);
220609a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn);
2207e126ba97SEli Cohen 		}
2208e126ba97SEli Cohen 	}
2209e126ba97SEli Cohen 
2210e126ba97SEli Cohen 	if (init_attr->send_cq)
221109a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn);
2212e126ba97SEli Cohen 
2213e126ba97SEli Cohen 	if (init_attr->recv_cq)
221409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn);
2215e126ba97SEli Cohen 
221609a7d9ecSSaeed Mahameed 	MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2217e126ba97SEli Cohen 
2218cfb5e088SHaggai Abramovsky 	/* 0xffffff means we ask to work with cqe version 0 */
221909a7d9ecSSaeed Mahameed 	if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
2220cfb5e088SHaggai Abramovsky 		MLX5_SET(qpc, qpc, user_index, uidx);
222109a7d9ecSSaeed Mahameed 
2222f0313965SErez Shitrit 	/* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */
2223f0313965SErez Shitrit 	if (init_attr->qp_type == IB_QPT_UD &&
2224f0313965SErez Shitrit 	    (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) {
2225f0313965SErez Shitrit 		MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1);
2226f0313965SErez Shitrit 		qp->flags |= MLX5_IB_QP_LSO;
2227f0313965SErez Shitrit 	}
2228cfb5e088SHaggai Abramovsky 
2229b1383aa6SNoa Osherovich 	if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) {
2230b1383aa6SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
2231b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "scatter end padding is not supported\n");
2232b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
2233b1383aa6SNoa Osherovich 			goto err;
2234b1383aa6SNoa Osherovich 		} else if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2235b1383aa6SNoa Osherovich 			MLX5_SET(qpc, qpc, end_padding_mode,
2236b1383aa6SNoa Osherovich 				 MLX5_WQ_END_PAD_MODE_ALIGN);
2237b1383aa6SNoa Osherovich 		} else {
2238b1383aa6SNoa Osherovich 			qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING;
2239b1383aa6SNoa Osherovich 		}
2240b1383aa6SNoa Osherovich 	}
2241b1383aa6SNoa Osherovich 
22422c292dbbSBoris Pismenny 	if (inlen < 0) {
22432c292dbbSBoris Pismenny 		err = -EINVAL;
22442c292dbbSBoris Pismenny 		goto err;
22452c292dbbSBoris Pismenny 	}
22462c292dbbSBoris Pismenny 
2247c2e53b2cSYishai Hadas 	if (init_attr->qp_type == IB_QPT_RAW_PACKET ||
2248c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
22490fb2ed66Smajd@mellanox.com 		qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr;
22500fb2ed66Smajd@mellanox.com 		raw_packet_qp_copy_info(qp, &qp->raw_packet_qp);
22517f72052cSYishai Hadas 		err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata,
22527f72052cSYishai Hadas 					   &resp);
22530fb2ed66Smajd@mellanox.com 	} else {
225419098df2Smajd@mellanox.com 		err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen);
22550fb2ed66Smajd@mellanox.com 	}
22560fb2ed66Smajd@mellanox.com 
2257e126ba97SEli Cohen 	if (err) {
2258e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "create qp failed\n");
2259e126ba97SEli Cohen 		goto err_create;
2260e126ba97SEli Cohen 	}
2261e126ba97SEli Cohen 
2262479163f4SAl Viro 	kvfree(in);
2263e126ba97SEli Cohen 
226419098df2Smajd@mellanox.com 	base->container_mibqp = qp;
226519098df2Smajd@mellanox.com 	base->mqp.event = mlx5_ib_qp_event;
2266e126ba97SEli Cohen 
226789ea94a7SMaor Gottlieb 	get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq,
226889ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
226989ea94a7SMaor Gottlieb 	spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
227089ea94a7SMaor Gottlieb 	mlx5_ib_lock_cqs(send_cq, recv_cq);
227189ea94a7SMaor Gottlieb 	/* Maintain device to QPs access, needed for further handling via reset
227289ea94a7SMaor Gottlieb 	 * flow
227389ea94a7SMaor Gottlieb 	 */
227489ea94a7SMaor Gottlieb 	list_add_tail(&qp->qps_list, &dev->qp_list);
227589ea94a7SMaor Gottlieb 	/* Maintain CQ to QPs access, needed for further handling via reset flow
227689ea94a7SMaor Gottlieb 	 */
227789ea94a7SMaor Gottlieb 	if (send_cq)
227889ea94a7SMaor Gottlieb 		list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp);
227989ea94a7SMaor Gottlieb 	if (recv_cq)
228089ea94a7SMaor Gottlieb 		list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp);
228189ea94a7SMaor Gottlieb 	mlx5_ib_unlock_cqs(send_cq, recv_cq);
228289ea94a7SMaor Gottlieb 	spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
228389ea94a7SMaor Gottlieb 
2284e126ba97SEli Cohen 	return 0;
2285e126ba97SEli Cohen 
2286e126ba97SEli Cohen err_create:
2287e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_USER)
2288bdeacabdSShamir Rabinovitch 		destroy_qp_user(dev, pd, qp, base, udata);
2289e126ba97SEli Cohen 	else if (qp->create_type == MLX5_QP_KERNEL)
2290e126ba97SEli Cohen 		destroy_qp_kernel(dev, qp);
2291e126ba97SEli Cohen 
2292b1383aa6SNoa Osherovich err:
2293479163f4SAl Viro 	kvfree(in);
2294e126ba97SEli Cohen 	return err;
2295e126ba97SEli Cohen }
2296e126ba97SEli Cohen 
2297e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq)
2298e126ba97SEli Cohen 	__acquires(&send_cq->lock) __acquires(&recv_cq->lock)
2299e126ba97SEli Cohen {
2300e126ba97SEli Cohen 	if (send_cq) {
2301e126ba97SEli Cohen 		if (recv_cq) {
2302e126ba97SEli Cohen 			if (send_cq->mcq.cqn < recv_cq->mcq.cqn)  {
230389ea94a7SMaor Gottlieb 				spin_lock(&send_cq->lock);
2304e126ba97SEli Cohen 				spin_lock_nested(&recv_cq->lock,
2305e126ba97SEli Cohen 						 SINGLE_DEPTH_NESTING);
2306e126ba97SEli Cohen 			} else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) {
230789ea94a7SMaor Gottlieb 				spin_lock(&send_cq->lock);
2308e126ba97SEli Cohen 				__acquire(&recv_cq->lock);
2309e126ba97SEli Cohen 			} else {
231089ea94a7SMaor Gottlieb 				spin_lock(&recv_cq->lock);
2311e126ba97SEli Cohen 				spin_lock_nested(&send_cq->lock,
2312e126ba97SEli Cohen 						 SINGLE_DEPTH_NESTING);
2313e126ba97SEli Cohen 			}
2314e126ba97SEli Cohen 		} else {
231589ea94a7SMaor Gottlieb 			spin_lock(&send_cq->lock);
23166a4f139aSEli Cohen 			__acquire(&recv_cq->lock);
2317e126ba97SEli Cohen 		}
2318e126ba97SEli Cohen 	} else if (recv_cq) {
231989ea94a7SMaor Gottlieb 		spin_lock(&recv_cq->lock);
23206a4f139aSEli Cohen 		__acquire(&send_cq->lock);
23216a4f139aSEli Cohen 	} else {
23226a4f139aSEli Cohen 		__acquire(&send_cq->lock);
23236a4f139aSEli Cohen 		__acquire(&recv_cq->lock);
2324e126ba97SEli Cohen 	}
2325e126ba97SEli Cohen }
2326e126ba97SEli Cohen 
2327e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq)
2328e126ba97SEli Cohen 	__releases(&send_cq->lock) __releases(&recv_cq->lock)
2329e126ba97SEli Cohen {
2330e126ba97SEli Cohen 	if (send_cq) {
2331e126ba97SEli Cohen 		if (recv_cq) {
2332e126ba97SEli Cohen 			if (send_cq->mcq.cqn < recv_cq->mcq.cqn)  {
2333e126ba97SEli Cohen 				spin_unlock(&recv_cq->lock);
233489ea94a7SMaor Gottlieb 				spin_unlock(&send_cq->lock);
2335e126ba97SEli Cohen 			} else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) {
2336e126ba97SEli Cohen 				__release(&recv_cq->lock);
233789ea94a7SMaor Gottlieb 				spin_unlock(&send_cq->lock);
2338e126ba97SEli Cohen 			} else {
2339e126ba97SEli Cohen 				spin_unlock(&send_cq->lock);
234089ea94a7SMaor Gottlieb 				spin_unlock(&recv_cq->lock);
2341e126ba97SEli Cohen 			}
2342e126ba97SEli Cohen 		} else {
23436a4f139aSEli Cohen 			__release(&recv_cq->lock);
234489ea94a7SMaor Gottlieb 			spin_unlock(&send_cq->lock);
2345e126ba97SEli Cohen 		}
2346e126ba97SEli Cohen 	} else if (recv_cq) {
23476a4f139aSEli Cohen 		__release(&send_cq->lock);
234889ea94a7SMaor Gottlieb 		spin_unlock(&recv_cq->lock);
23496a4f139aSEli Cohen 	} else {
23506a4f139aSEli Cohen 		__release(&recv_cq->lock);
23516a4f139aSEli Cohen 		__release(&send_cq->lock);
2352e126ba97SEli Cohen 	}
2353e126ba97SEli Cohen }
2354e126ba97SEli Cohen 
2355e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp)
2356e126ba97SEli Cohen {
2357e126ba97SEli Cohen 	return to_mpd(qp->ibqp.pd);
2358e126ba97SEli Cohen }
2359e126ba97SEli Cohen 
236089ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type,
236189ea94a7SMaor Gottlieb 		    struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq,
2362e126ba97SEli Cohen 		    struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq)
2363e126ba97SEli Cohen {
236489ea94a7SMaor Gottlieb 	switch (qp_type) {
2365e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2366e126ba97SEli Cohen 		*send_cq = NULL;
2367e126ba97SEli Cohen 		*recv_cq = NULL;
2368e126ba97SEli Cohen 		break;
2369e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2370e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
237189ea94a7SMaor Gottlieb 		*send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL;
2372e126ba97SEli Cohen 		*recv_cq = NULL;
2373e126ba97SEli Cohen 		break;
2374e126ba97SEli Cohen 
2375e126ba97SEli Cohen 	case IB_QPT_SMI:
2376d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
2377e126ba97SEli Cohen 	case IB_QPT_RC:
2378e126ba97SEli Cohen 	case IB_QPT_UC:
2379e126ba97SEli Cohen 	case IB_QPT_UD:
2380e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2381e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
23820fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_PACKET:
238389ea94a7SMaor Gottlieb 		*send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL;
238489ea94a7SMaor Gottlieb 		*recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL;
2385e126ba97SEli Cohen 		break;
2386e126ba97SEli Cohen 
2387e126ba97SEli Cohen 	case IB_QPT_MAX:
2388e126ba97SEli Cohen 	default:
2389e126ba97SEli Cohen 		*send_cq = NULL;
2390e126ba97SEli Cohen 		*recv_cq = NULL;
2391e126ba97SEli Cohen 		break;
2392e126ba97SEli Cohen 	}
2393e126ba97SEli Cohen }
2394e126ba97SEli Cohen 
2395ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
239613eab21fSAviv Heller 				const struct mlx5_modify_raw_qp_param *raw_qp_param,
239713eab21fSAviv Heller 				u8 lag_tx_affinity);
2398ad5f8e96Smajd@mellanox.com 
2399bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
2400bdeacabdSShamir Rabinovitch 			      struct ib_udata *udata)
2401e126ba97SEli Cohen {
2402e126ba97SEli Cohen 	struct mlx5_ib_cq *send_cq, *recv_cq;
2403c2e53b2cSYishai Hadas 	struct mlx5_ib_qp_base *base;
240489ea94a7SMaor Gottlieb 	unsigned long flags;
2405e126ba97SEli Cohen 	int err;
2406e126ba97SEli Cohen 
240728d61370SYishai Hadas 	if (qp->ibqp.rwq_ind_tbl) {
240828d61370SYishai Hadas 		destroy_rss_raw_qp_tir(dev, qp);
240928d61370SYishai Hadas 		return;
241028d61370SYishai Hadas 	}
241128d61370SYishai Hadas 
2412c2e53b2cSYishai Hadas 	base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
2413c2e53b2cSYishai Hadas 		qp->flags & MLX5_IB_QP_UNDERLAY) ?
24140fb2ed66Smajd@mellanox.com 	       &qp->raw_packet_qp.rq.base :
24150fb2ed66Smajd@mellanox.com 	       &qp->trans_qp.base;
24160fb2ed66Smajd@mellanox.com 
24176aec21f6SHaggai Eran 	if (qp->state != IB_QPS_RESET) {
2418c2e53b2cSYishai Hadas 		if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET &&
2419c2e53b2cSYishai Hadas 		    !(qp->flags & MLX5_IB_QP_UNDERLAY)) {
2420ad5f8e96Smajd@mellanox.com 			err = mlx5_core_qp_modify(dev->mdev,
24211a412fb1SSaeed Mahameed 						  MLX5_CMD_OP_2RST_QP, 0,
24221a412fb1SSaeed Mahameed 						  NULL, &base->mqp);
2423ad5f8e96Smajd@mellanox.com 		} else {
24240680efa2SAlex Vesker 			struct mlx5_modify_raw_qp_param raw_qp_param = {
24250680efa2SAlex Vesker 				.operation = MLX5_CMD_OP_2RST_QP
24260680efa2SAlex Vesker 			};
24270680efa2SAlex Vesker 
242813eab21fSAviv Heller 			err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0);
2429ad5f8e96Smajd@mellanox.com 		}
2430ad5f8e96Smajd@mellanox.com 		if (err)
2431427c1e7bSmajd@mellanox.com 			mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n",
243219098df2Smajd@mellanox.com 				     base->mqp.qpn);
24336aec21f6SHaggai Eran 	}
2434e126ba97SEli Cohen 
243589ea94a7SMaor Gottlieb 	get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq,
243689ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
243789ea94a7SMaor Gottlieb 
243889ea94a7SMaor Gottlieb 	spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
243989ea94a7SMaor Gottlieb 	mlx5_ib_lock_cqs(send_cq, recv_cq);
244089ea94a7SMaor Gottlieb 	/* del from lists under both locks above to protect reset flow paths */
244189ea94a7SMaor Gottlieb 	list_del(&qp->qps_list);
244289ea94a7SMaor Gottlieb 	if (send_cq)
244389ea94a7SMaor Gottlieb 		list_del(&qp->cq_send_list);
244489ea94a7SMaor Gottlieb 
244589ea94a7SMaor Gottlieb 	if (recv_cq)
244689ea94a7SMaor Gottlieb 		list_del(&qp->cq_recv_list);
2447e126ba97SEli Cohen 
2448e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_KERNEL) {
244919098df2Smajd@mellanox.com 		__mlx5_ib_cq_clean(recv_cq, base->mqp.qpn,
2450e126ba97SEli Cohen 				   qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL);
2451e126ba97SEli Cohen 		if (send_cq != recv_cq)
245219098df2Smajd@mellanox.com 			__mlx5_ib_cq_clean(send_cq, base->mqp.qpn,
245319098df2Smajd@mellanox.com 					   NULL);
2454e126ba97SEli Cohen 	}
245589ea94a7SMaor Gottlieb 	mlx5_ib_unlock_cqs(send_cq, recv_cq);
245689ea94a7SMaor Gottlieb 	spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
2457e126ba97SEli Cohen 
2458c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
2459c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
24600fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp(dev, qp);
24610fb2ed66Smajd@mellanox.com 	} else {
246219098df2Smajd@mellanox.com 		err = mlx5_core_destroy_qp(dev->mdev, &base->mqp);
2463e126ba97SEli Cohen 		if (err)
24640fb2ed66Smajd@mellanox.com 			mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n",
24650fb2ed66Smajd@mellanox.com 				     base->mqp.qpn);
24660fb2ed66Smajd@mellanox.com 	}
2467e126ba97SEli Cohen 
2468e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_KERNEL)
2469e126ba97SEli Cohen 		destroy_qp_kernel(dev, qp);
2470e126ba97SEli Cohen 	else if (qp->create_type == MLX5_QP_USER)
2471bdeacabdSShamir Rabinovitch 		destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata);
2472e126ba97SEli Cohen }
2473e126ba97SEli Cohen 
2474e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type)
2475e126ba97SEli Cohen {
2476e126ba97SEli Cohen 	switch (type) {
2477e126ba97SEli Cohen 	case IB_QPT_SMI:
2478e126ba97SEli Cohen 		return "IB_QPT_SMI";
2479e126ba97SEli Cohen 	case IB_QPT_GSI:
2480e126ba97SEli Cohen 		return "IB_QPT_GSI";
2481e126ba97SEli Cohen 	case IB_QPT_RC:
2482e126ba97SEli Cohen 		return "IB_QPT_RC";
2483e126ba97SEli Cohen 	case IB_QPT_UC:
2484e126ba97SEli Cohen 		return "IB_QPT_UC";
2485e126ba97SEli Cohen 	case IB_QPT_UD:
2486e126ba97SEli Cohen 		return "IB_QPT_UD";
2487e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2488e126ba97SEli Cohen 		return "IB_QPT_RAW_IPV6";
2489e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
2490e126ba97SEli Cohen 		return "IB_QPT_RAW_ETHERTYPE";
2491e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
2492e126ba97SEli Cohen 		return "IB_QPT_XRC_INI";
2493e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2494e126ba97SEli Cohen 		return "IB_QPT_XRC_TGT";
2495e126ba97SEli Cohen 	case IB_QPT_RAW_PACKET:
2496e126ba97SEli Cohen 		return "IB_QPT_RAW_PACKET";
2497e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2498e126ba97SEli Cohen 		return "MLX5_IB_QPT_REG_UMR";
2499b4aaa1f0SMoni Shoua 	case IB_QPT_DRIVER:
2500b4aaa1f0SMoni Shoua 		return "IB_QPT_DRIVER";
2501e126ba97SEli Cohen 	case IB_QPT_MAX:
2502e126ba97SEli Cohen 	default:
2503e126ba97SEli Cohen 		return "Invalid QP type";
2504e126ba97SEli Cohen 	}
2505e126ba97SEli Cohen }
2506e126ba97SEli Cohen 
2507b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd,
2508b4aaa1f0SMoni Shoua 					struct ib_qp_init_attr *attr,
250989944450SShamir Rabinovitch 					struct mlx5_ib_create_qp *ucmd,
251089944450SShamir Rabinovitch 					struct ib_udata *udata)
2511b4aaa1f0SMoni Shoua {
251289944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
251389944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
2514b4aaa1f0SMoni Shoua 	struct mlx5_ib_qp *qp;
2515b4aaa1f0SMoni Shoua 	int err = 0;
2516b4aaa1f0SMoni Shoua 	u32 uidx = MLX5_IB_DEFAULT_UIDX;
2517b4aaa1f0SMoni Shoua 	void *dctc;
2518b4aaa1f0SMoni Shoua 
2519b4aaa1f0SMoni Shoua 	if (!attr->srq || !attr->recv_cq)
2520b4aaa1f0SMoni Shoua 		return ERR_PTR(-EINVAL);
2521b4aaa1f0SMoni Shoua 
252289944450SShamir Rabinovitch 	err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx);
2523b4aaa1f0SMoni Shoua 	if (err)
2524b4aaa1f0SMoni Shoua 		return ERR_PTR(err);
2525b4aaa1f0SMoni Shoua 
2526b4aaa1f0SMoni Shoua 	qp = kzalloc(sizeof(*qp), GFP_KERNEL);
2527b4aaa1f0SMoni Shoua 	if (!qp)
2528b4aaa1f0SMoni Shoua 		return ERR_PTR(-ENOMEM);
2529b4aaa1f0SMoni Shoua 
2530b4aaa1f0SMoni Shoua 	qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL);
2531b4aaa1f0SMoni Shoua 	if (!qp->dct.in) {
2532b4aaa1f0SMoni Shoua 		err = -ENOMEM;
2533b4aaa1f0SMoni Shoua 		goto err_free;
2534b4aaa1f0SMoni Shoua 	}
2535b4aaa1f0SMoni Shoua 
2536a01a5860SYishai Hadas 	MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid);
2537b4aaa1f0SMoni Shoua 	dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
2538776a3906SMoni Shoua 	qp->qp_sub_type = MLX5_IB_QPT_DCT;
2539b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn);
2540b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn);
2541b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn);
2542b4aaa1f0SMoni Shoua 	MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key);
2543b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, user_index, uidx);
2544b4aaa1f0SMoni Shoua 
25455d6ff1baSYonatan Cohen 	if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE)
25465d6ff1baSYonatan Cohen 		configure_responder_scat_cqe(attr, dctc);
25475d6ff1baSYonatan Cohen 
2548b4aaa1f0SMoni Shoua 	qp->state = IB_QPS_RESET;
2549b4aaa1f0SMoni Shoua 
2550b4aaa1f0SMoni Shoua 	return &qp->ibqp;
2551b4aaa1f0SMoni Shoua err_free:
2552b4aaa1f0SMoni Shoua 	kfree(qp);
2553b4aaa1f0SMoni Shoua 	return ERR_PTR(err);
2554b4aaa1f0SMoni Shoua }
2555b4aaa1f0SMoni Shoua 
2556b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev,
2557e126ba97SEli Cohen 			   struct ib_qp_init_attr *init_attr,
2558b4aaa1f0SMoni Shoua 			   struct mlx5_ib_create_qp *ucmd,
2559b4aaa1f0SMoni Shoua 			   struct ib_udata *udata)
2560b4aaa1f0SMoni Shoua {
2561b4aaa1f0SMoni Shoua 	enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI };
2562b4aaa1f0SMoni Shoua 	int err;
2563b4aaa1f0SMoni Shoua 
2564b4aaa1f0SMoni Shoua 	if (!udata)
2565b4aaa1f0SMoni Shoua 		return -EINVAL;
2566b4aaa1f0SMoni Shoua 
2567b4aaa1f0SMoni Shoua 	if (udata->inlen < sizeof(*ucmd)) {
2568b4aaa1f0SMoni Shoua 		mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n");
2569b4aaa1f0SMoni Shoua 		return -EINVAL;
2570b4aaa1f0SMoni Shoua 	}
2571b4aaa1f0SMoni Shoua 	err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd));
2572b4aaa1f0SMoni Shoua 	if (err)
2573b4aaa1f0SMoni Shoua 		return err;
2574b4aaa1f0SMoni Shoua 
2575b4aaa1f0SMoni Shoua 	if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) {
2576b4aaa1f0SMoni Shoua 		init_attr->qp_type = MLX5_IB_QPT_DCI;
2577b4aaa1f0SMoni Shoua 	} else {
2578b4aaa1f0SMoni Shoua 		if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) {
2579b4aaa1f0SMoni Shoua 			init_attr->qp_type = MLX5_IB_QPT_DCT;
2580b4aaa1f0SMoni Shoua 		} else {
2581b4aaa1f0SMoni Shoua 			mlx5_ib_dbg(dev, "Invalid QP flags\n");
2582b4aaa1f0SMoni Shoua 			return -EINVAL;
2583b4aaa1f0SMoni Shoua 		}
2584b4aaa1f0SMoni Shoua 	}
2585b4aaa1f0SMoni Shoua 
2586b4aaa1f0SMoni Shoua 	if (!MLX5_CAP_GEN(dev->mdev, dct)) {
2587b4aaa1f0SMoni Shoua 		mlx5_ib_dbg(dev, "DC transport is not supported\n");
2588b4aaa1f0SMoni Shoua 		return -EOPNOTSUPP;
2589b4aaa1f0SMoni Shoua 	}
2590b4aaa1f0SMoni Shoua 
2591b4aaa1f0SMoni Shoua 	return 0;
2592b4aaa1f0SMoni Shoua }
2593b4aaa1f0SMoni Shoua 
2594b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd,
2595b4aaa1f0SMoni Shoua 				struct ib_qp_init_attr *verbs_init_attr,
2596e126ba97SEli Cohen 				struct ib_udata *udata)
2597e126ba97SEli Cohen {
2598e126ba97SEli Cohen 	struct mlx5_ib_dev *dev;
2599e126ba97SEli Cohen 	struct mlx5_ib_qp *qp;
2600e126ba97SEli Cohen 	u16 xrcdn = 0;
2601e126ba97SEli Cohen 	int err;
2602b4aaa1f0SMoni Shoua 	struct ib_qp_init_attr mlx_init_attr;
2603b4aaa1f0SMoni Shoua 	struct ib_qp_init_attr *init_attr = verbs_init_attr;
260489944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
260589944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
2606e126ba97SEli Cohen 
2607e126ba97SEli Cohen 	if (pd) {
2608e126ba97SEli Cohen 		dev = to_mdev(pd->device);
26090fb2ed66Smajd@mellanox.com 
26100fb2ed66Smajd@mellanox.com 		if (init_attr->qp_type == IB_QPT_RAW_PACKET) {
261189944450SShamir Rabinovitch 			if (!ucontext) {
26120fb2ed66Smajd@mellanox.com 				mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n");
26130fb2ed66Smajd@mellanox.com 				return ERR_PTR(-EINVAL);
261489944450SShamir Rabinovitch 			} else if (!ucontext->cqe_version) {
26150fb2ed66Smajd@mellanox.com 				mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n");
26160fb2ed66Smajd@mellanox.com 				return ERR_PTR(-EINVAL);
26170fb2ed66Smajd@mellanox.com 			}
26180fb2ed66Smajd@mellanox.com 		}
261909f16cf5SMajd Dibbiny 	} else {
262009f16cf5SMajd Dibbiny 		/* being cautious here */
262109f16cf5SMajd Dibbiny 		if (init_attr->qp_type != IB_QPT_XRC_TGT &&
262209f16cf5SMajd Dibbiny 		    init_attr->qp_type != MLX5_IB_QPT_REG_UMR) {
262309f16cf5SMajd Dibbiny 			pr_warn("%s: no PD for transport %s\n", __func__,
262409f16cf5SMajd Dibbiny 				ib_qp_type_str(init_attr->qp_type));
262509f16cf5SMajd Dibbiny 			return ERR_PTR(-EINVAL);
262609f16cf5SMajd Dibbiny 		}
262709f16cf5SMajd Dibbiny 		dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device);
2628e126ba97SEli Cohen 	}
2629e126ba97SEli Cohen 
2630b4aaa1f0SMoni Shoua 	if (init_attr->qp_type == IB_QPT_DRIVER) {
2631b4aaa1f0SMoni Shoua 		struct mlx5_ib_create_qp ucmd;
2632b4aaa1f0SMoni Shoua 
2633b4aaa1f0SMoni Shoua 		init_attr = &mlx_init_attr;
2634b4aaa1f0SMoni Shoua 		memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr));
2635b4aaa1f0SMoni Shoua 		err = set_mlx_qp_type(dev, init_attr, &ucmd, udata);
2636b4aaa1f0SMoni Shoua 		if (err)
2637b4aaa1f0SMoni Shoua 			return ERR_PTR(err);
2638c32a4f29SMoni Shoua 
2639c32a4f29SMoni Shoua 		if (init_attr->qp_type == MLX5_IB_QPT_DCI) {
2640c32a4f29SMoni Shoua 			if (init_attr->cap.max_recv_wr ||
2641c32a4f29SMoni Shoua 			    init_attr->cap.max_recv_sge) {
2642c32a4f29SMoni Shoua 				mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n");
2643c32a4f29SMoni Shoua 				return ERR_PTR(-EINVAL);
2644c32a4f29SMoni Shoua 			}
2645776a3906SMoni Shoua 		} else {
264689944450SShamir Rabinovitch 			return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata);
2647c32a4f29SMoni Shoua 		}
2648b4aaa1f0SMoni Shoua 	}
2649b4aaa1f0SMoni Shoua 
2650e126ba97SEli Cohen 	switch (init_attr->qp_type) {
2651e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2652e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
2653938fe83cSSaeed Mahameed 		if (!MLX5_CAP_GEN(dev->mdev, xrc)) {
2654e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "XRC not supported\n");
2655e126ba97SEli Cohen 			return ERR_PTR(-ENOSYS);
2656e126ba97SEli Cohen 		}
2657e126ba97SEli Cohen 		init_attr->recv_cq = NULL;
2658e126ba97SEli Cohen 		if (init_attr->qp_type == IB_QPT_XRC_TGT) {
2659e126ba97SEli Cohen 			xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn;
2660e126ba97SEli Cohen 			init_attr->send_cq = NULL;
2661e126ba97SEli Cohen 		}
2662e126ba97SEli Cohen 
2663e126ba97SEli Cohen 		/* fall through */
26640fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_PACKET:
2665e126ba97SEli Cohen 	case IB_QPT_RC:
2666e126ba97SEli Cohen 	case IB_QPT_UC:
2667e126ba97SEli Cohen 	case IB_QPT_UD:
2668e126ba97SEli Cohen 	case IB_QPT_SMI:
2669d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
2670e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2671c32a4f29SMoni Shoua 	case MLX5_IB_QPT_DCI:
2672e126ba97SEli Cohen 		qp = kzalloc(sizeof(*qp), GFP_KERNEL);
2673e126ba97SEli Cohen 		if (!qp)
2674e126ba97SEli Cohen 			return ERR_PTR(-ENOMEM);
2675e126ba97SEli Cohen 
2676e126ba97SEli Cohen 		err = create_qp_common(dev, pd, init_attr, udata, qp);
2677e126ba97SEli Cohen 		if (err) {
2678e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "create_qp_common failed\n");
2679e126ba97SEli Cohen 			kfree(qp);
2680e126ba97SEli Cohen 			return ERR_PTR(err);
2681e126ba97SEli Cohen 		}
2682e126ba97SEli Cohen 
2683e126ba97SEli Cohen 		if (is_qp0(init_attr->qp_type))
2684e126ba97SEli Cohen 			qp->ibqp.qp_num = 0;
2685e126ba97SEli Cohen 		else if (is_qp1(init_attr->qp_type))
2686e126ba97SEli Cohen 			qp->ibqp.qp_num = 1;
2687e126ba97SEli Cohen 		else
268819098df2Smajd@mellanox.com 			qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn;
2689e126ba97SEli Cohen 
2690e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n",
269119098df2Smajd@mellanox.com 			    qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn,
2692a1ab8402SEli Cohen 			    init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1,
2693a1ab8402SEli Cohen 			    init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1);
2694e126ba97SEli Cohen 
269519098df2Smajd@mellanox.com 		qp->trans_qp.xrcdn = xrcdn;
2696e126ba97SEli Cohen 
2697e126ba97SEli Cohen 		break;
2698e126ba97SEli Cohen 
2699d16e91daSHaggai Eran 	case IB_QPT_GSI:
2700d16e91daSHaggai Eran 		return mlx5_ib_gsi_create_qp(pd, init_attr);
2701d16e91daSHaggai Eran 
2702e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2703e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
2704e126ba97SEli Cohen 	case IB_QPT_MAX:
2705e126ba97SEli Cohen 	default:
2706e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "unsupported qp type %d\n",
2707e126ba97SEli Cohen 			    init_attr->qp_type);
2708e126ba97SEli Cohen 		/* Don't support raw QPs */
2709e126ba97SEli Cohen 		return ERR_PTR(-EINVAL);
2710e126ba97SEli Cohen 	}
2711e126ba97SEli Cohen 
2712b4aaa1f0SMoni Shoua 	if (verbs_init_attr->qp_type == IB_QPT_DRIVER)
2713b4aaa1f0SMoni Shoua 		qp->qp_sub_type = init_attr->qp_type;
2714b4aaa1f0SMoni Shoua 
2715e126ba97SEli Cohen 	return &qp->ibqp;
2716e126ba97SEli Cohen }
2717e126ba97SEli Cohen 
2718776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp)
2719776a3906SMoni Shoua {
2720776a3906SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device);
2721776a3906SMoni Shoua 
2722776a3906SMoni Shoua 	if (mqp->state == IB_QPS_RTR) {
2723776a3906SMoni Shoua 		int err;
2724776a3906SMoni Shoua 
2725776a3906SMoni Shoua 		err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct);
2726776a3906SMoni Shoua 		if (err) {
2727776a3906SMoni Shoua 			mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err);
2728776a3906SMoni Shoua 			return err;
2729776a3906SMoni Shoua 		}
2730776a3906SMoni Shoua 	}
2731776a3906SMoni Shoua 
2732776a3906SMoni Shoua 	kfree(mqp->dct.in);
2733776a3906SMoni Shoua 	kfree(mqp);
2734776a3906SMoni Shoua 	return 0;
2735776a3906SMoni Shoua }
2736776a3906SMoni Shoua 
2737c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata)
2738e126ba97SEli Cohen {
2739e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
2740e126ba97SEli Cohen 	struct mlx5_ib_qp *mqp = to_mqp(qp);
2741e126ba97SEli Cohen 
2742d16e91daSHaggai Eran 	if (unlikely(qp->qp_type == IB_QPT_GSI))
2743d16e91daSHaggai Eran 		return mlx5_ib_gsi_destroy_qp(qp);
2744d16e91daSHaggai Eran 
2745776a3906SMoni Shoua 	if (mqp->qp_sub_type == MLX5_IB_QPT_DCT)
2746776a3906SMoni Shoua 		return mlx5_ib_destroy_dct(mqp);
2747776a3906SMoni Shoua 
2748bdeacabdSShamir Rabinovitch 	destroy_qp_common(dev, mqp, udata);
2749e126ba97SEli Cohen 
2750e126ba97SEli Cohen 	kfree(mqp);
2751e126ba97SEli Cohen 
2752e126ba97SEli Cohen 	return 0;
2753e126ba97SEli Cohen }
2754e126ba97SEli Cohen 
2755a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp,
2756a60109dcSYonatan Cohen 				const struct ib_qp_attr *attr,
2757bf3b4f06SBart Van Assche 				int attr_mask, __be32 *hw_access_flags_be)
2758e126ba97SEli Cohen {
2759e126ba97SEli Cohen 	u8 dest_rd_atomic;
2760bf3b4f06SBart Van Assche 	u32 access_flags, hw_access_flags = 0;
2761e126ba97SEli Cohen 
2762a60109dcSYonatan Cohen 	struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device);
2763a60109dcSYonatan Cohen 
2764e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
2765e126ba97SEli Cohen 		dest_rd_atomic = attr->max_dest_rd_atomic;
2766e126ba97SEli Cohen 	else
276719098df2Smajd@mellanox.com 		dest_rd_atomic = qp->trans_qp.resp_depth;
2768e126ba97SEli Cohen 
2769e126ba97SEli Cohen 	if (attr_mask & IB_QP_ACCESS_FLAGS)
2770e126ba97SEli Cohen 		access_flags = attr->qp_access_flags;
2771e126ba97SEli Cohen 	else
277219098df2Smajd@mellanox.com 		access_flags = qp->trans_qp.atomic_rd_en;
2773e126ba97SEli Cohen 
2774e126ba97SEli Cohen 	if (!dest_rd_atomic)
2775e126ba97SEli Cohen 		access_flags &= IB_ACCESS_REMOTE_WRITE;
2776e126ba97SEli Cohen 
2777e126ba97SEli Cohen 	if (access_flags & IB_ACCESS_REMOTE_READ)
2778bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RRE;
277913f8d9c1SYonatan Cohen 	if (access_flags & IB_ACCESS_REMOTE_ATOMIC) {
2780a60109dcSYonatan Cohen 		int atomic_mode;
2781e126ba97SEli Cohen 
2782a60109dcSYonatan Cohen 		atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type);
2783a60109dcSYonatan Cohen 		if (atomic_mode < 0)
2784a60109dcSYonatan Cohen 			return -EOPNOTSUPP;
2785a60109dcSYonatan Cohen 
2786bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RAE;
2787bf3b4f06SBart Van Assche 		hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET;
2788a60109dcSYonatan Cohen 	}
2789a60109dcSYonatan Cohen 
2790a60109dcSYonatan Cohen 	if (access_flags & IB_ACCESS_REMOTE_WRITE)
2791bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RWE;
2792a60109dcSYonatan Cohen 
2793bf3b4f06SBart Van Assche 	*hw_access_flags_be = cpu_to_be32(hw_access_flags);
2794a60109dcSYonatan Cohen 
2795a60109dcSYonatan Cohen 	return 0;
2796e126ba97SEli Cohen }
2797e126ba97SEli Cohen 
2798e126ba97SEli Cohen enum {
2799e126ba97SEli Cohen 	MLX5_PATH_FLAG_FL	= 1 << 0,
2800e126ba97SEli Cohen 	MLX5_PATH_FLAG_FREE_AR	= 1 << 1,
2801e126ba97SEli Cohen 	MLX5_PATH_FLAG_COUNTER	= 1 << 2,
2802e126ba97SEli Cohen };
2803e126ba97SEli Cohen 
2804e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate)
2805e126ba97SEli Cohen {
28064f32ac2eSDanit Goldberg 	if (rate == IB_RATE_PORT_CURRENT)
2807e126ba97SEli Cohen 		return 0;
28084f32ac2eSDanit Goldberg 
2809a5a5d199SMichael Guralnik 	if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS)
2810e126ba97SEli Cohen 		return -EINVAL;
28114f32ac2eSDanit Goldberg 
28124f32ac2eSDanit Goldberg 	while (rate != IB_RATE_PORT_CURRENT &&
2813e126ba97SEli Cohen 	       !(1 << (rate + MLX5_STAT_RATE_OFFSET) &
2814938fe83cSSaeed Mahameed 		 MLX5_CAP_GEN(dev->mdev, stat_rate_support)))
2815e126ba97SEli Cohen 		--rate;
2816e126ba97SEli Cohen 
28174f32ac2eSDanit Goldberg 	return rate ? rate + MLX5_STAT_RATE_OFFSET : rate;
2818e126ba97SEli Cohen }
2819e126ba97SEli Cohen 
282075850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev,
28211cd6dbd3SYishai Hadas 				      struct mlx5_ib_sq *sq, u8 sl,
28221cd6dbd3SYishai Hadas 				      struct ib_pd *pd)
282375850d0bSmajd@mellanox.com {
282475850d0bSmajd@mellanox.com 	void *in;
282575850d0bSmajd@mellanox.com 	void *tisc;
282675850d0bSmajd@mellanox.com 	int inlen;
282775850d0bSmajd@mellanox.com 	int err;
282875850d0bSmajd@mellanox.com 
282975850d0bSmajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_tis_in);
28301b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
283175850d0bSmajd@mellanox.com 	if (!in)
283275850d0bSmajd@mellanox.com 		return -ENOMEM;
283375850d0bSmajd@mellanox.com 
283475850d0bSmajd@mellanox.com 	MLX5_SET(modify_tis_in, in, bitmask.prio, 1);
28351cd6dbd3SYishai Hadas 	MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid);
283675850d0bSmajd@mellanox.com 
283775850d0bSmajd@mellanox.com 	tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
283875850d0bSmajd@mellanox.com 	MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1));
283975850d0bSmajd@mellanox.com 
284075850d0bSmajd@mellanox.com 	err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen);
284175850d0bSmajd@mellanox.com 
284275850d0bSmajd@mellanox.com 	kvfree(in);
284375850d0bSmajd@mellanox.com 
284475850d0bSmajd@mellanox.com 	return err;
284575850d0bSmajd@mellanox.com }
284675850d0bSmajd@mellanox.com 
284713eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev,
28481cd6dbd3SYishai Hadas 					 struct mlx5_ib_sq *sq, u8 tx_affinity,
28491cd6dbd3SYishai Hadas 					 struct ib_pd *pd)
285013eab21fSAviv Heller {
285113eab21fSAviv Heller 	void *in;
285213eab21fSAviv Heller 	void *tisc;
285313eab21fSAviv Heller 	int inlen;
285413eab21fSAviv Heller 	int err;
285513eab21fSAviv Heller 
285613eab21fSAviv Heller 	inlen = MLX5_ST_SZ_BYTES(modify_tis_in);
28571b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
285813eab21fSAviv Heller 	if (!in)
285913eab21fSAviv Heller 		return -ENOMEM;
286013eab21fSAviv Heller 
286113eab21fSAviv Heller 	MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1);
28621cd6dbd3SYishai Hadas 	MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid);
286313eab21fSAviv Heller 
286413eab21fSAviv Heller 	tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
286513eab21fSAviv Heller 	MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity);
286613eab21fSAviv Heller 
286713eab21fSAviv Heller 	err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen);
286813eab21fSAviv Heller 
286913eab21fSAviv Heller 	kvfree(in);
287013eab21fSAviv Heller 
287113eab21fSAviv Heller 	return err;
287213eab21fSAviv Heller }
287313eab21fSAviv Heller 
287475850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
287590898850SDasaratharaman Chandramouli 			 const struct rdma_ah_attr *ah,
2876e126ba97SEli Cohen 			 struct mlx5_qp_path *path, u8 port, int attr_mask,
2877f879ee8dSAchiad Shochat 			 u32 path_flags, const struct ib_qp_attr *attr,
2878f879ee8dSAchiad Shochat 			 bool alt)
2879e126ba97SEli Cohen {
2880d8966fcdSDasaratharaman Chandramouli 	const struct ib_global_route *grh = rdma_ah_read_grh(ah);
2881e126ba97SEli Cohen 	int err;
2882ed88451eSMajd Dibbiny 	enum ib_gid_type gid_type;
2883d8966fcdSDasaratharaman Chandramouli 	u8 ah_flags = rdma_ah_get_ah_flags(ah);
2884d8966fcdSDasaratharaman Chandramouli 	u8 sl = rdma_ah_get_sl(ah);
2885e126ba97SEli Cohen 
2886e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX)
2887f879ee8dSAchiad Shochat 		path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index :
2888f879ee8dSAchiad Shochat 						     attr->pkey_index);
2889e126ba97SEli Cohen 
2890d8966fcdSDasaratharaman Chandramouli 	if (ah_flags & IB_AH_GRH) {
2891d8966fcdSDasaratharaman Chandramouli 		if (grh->sgid_index >=
2892938fe83cSSaeed Mahameed 		    dev->mdev->port_caps[port - 1].gid_table_len) {
2893f4f01b54SJoe Perches 			pr_err("sgid_index (%u) too large. max is %d\n",
2894d8966fcdSDasaratharaman Chandramouli 			       grh->sgid_index,
2895938fe83cSSaeed Mahameed 			       dev->mdev->port_caps[port - 1].gid_table_len);
2896f83b4263SEli Cohen 			return -EINVAL;
2897f83b4263SEli Cohen 		}
28982811ba51SAchiad Shochat 	}
289944c58487SDasaratharaman Chandramouli 
290044c58487SDasaratharaman Chandramouli 	if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) {
2901d8966fcdSDasaratharaman Chandramouli 		if (!(ah_flags & IB_AH_GRH))
29022811ba51SAchiad Shochat 			return -EINVAL;
290347ec3866SParav Pandit 
290444c58487SDasaratharaman Chandramouli 		memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac));
29052b621851SMajd Dibbiny 		if (qp->ibqp.qp_type == IB_QPT_RC ||
29062b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_UC ||
29072b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_XRC_INI ||
29082b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_XRC_TGT)
290947ec3866SParav Pandit 			path->udp_sport =
291047ec3866SParav Pandit 				mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr);
2911d8966fcdSDasaratharaman Chandramouli 		path->dci_cfi_prio_sl = (sl & 0x7) << 4;
291247ec3866SParav Pandit 		gid_type = ah->grh.sgid_attr->gid_type;
2913ed88451eSMajd Dibbiny 		if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
2914d8966fcdSDasaratharaman Chandramouli 			path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f;
29152811ba51SAchiad Shochat 	} else {
2916d3ae2bdeSNoa Osherovich 		path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
2917d3ae2bdeSNoa Osherovich 		path->fl_free_ar |=
2918d3ae2bdeSNoa Osherovich 			(path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0;
2919d8966fcdSDasaratharaman Chandramouli 		path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah));
2920d8966fcdSDasaratharaman Chandramouli 		path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f;
2921d8966fcdSDasaratharaman Chandramouli 		if (ah_flags & IB_AH_GRH)
2922e126ba97SEli Cohen 			path->grh_mlid	|= 1 << 7;
2923d8966fcdSDasaratharaman Chandramouli 		path->dci_cfi_prio_sl = sl & 0xf;
29242811ba51SAchiad Shochat 	}
29252811ba51SAchiad Shochat 
2926d8966fcdSDasaratharaman Chandramouli 	if (ah_flags & IB_AH_GRH) {
2927d8966fcdSDasaratharaman Chandramouli 		path->mgid_index = grh->sgid_index;
2928d8966fcdSDasaratharaman Chandramouli 		path->hop_limit  = grh->hop_limit;
2929e126ba97SEli Cohen 		path->tclass_flowlabel =
2930d8966fcdSDasaratharaman Chandramouli 			cpu_to_be32((grh->traffic_class << 20) |
2931d8966fcdSDasaratharaman Chandramouli 				    (grh->flow_label));
2932d8966fcdSDasaratharaman Chandramouli 		memcpy(path->rgid, grh->dgid.raw, 16);
2933e126ba97SEli Cohen 	}
2934e126ba97SEli Cohen 
2935d8966fcdSDasaratharaman Chandramouli 	err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah));
2936e126ba97SEli Cohen 	if (err < 0)
2937e126ba97SEli Cohen 		return err;
2938e126ba97SEli Cohen 	path->static_rate = err;
2939e126ba97SEli Cohen 	path->port = port;
2940e126ba97SEli Cohen 
2941e126ba97SEli Cohen 	if (attr_mask & IB_QP_TIMEOUT)
2942f879ee8dSAchiad Shochat 		path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3;
2943e126ba97SEli Cohen 
294475850d0bSmajd@mellanox.com 	if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt)
294575850d0bSmajd@mellanox.com 		return modify_raw_packet_eth_prio(dev->mdev,
294675850d0bSmajd@mellanox.com 						  &qp->raw_packet_qp.sq,
29471cd6dbd3SYishai Hadas 						  sl & 0xf, qp->ibqp.pd);
294875850d0bSmajd@mellanox.com 
2949e126ba97SEli Cohen 	return 0;
2950e126ba97SEli Cohen }
2951e126ba97SEli Cohen 
2952e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = {
2953e126ba97SEli Cohen 	[MLX5_QP_STATE_INIT] = {
2954e126ba97SEli Cohen 		[MLX5_QP_STATE_INIT] = {
2955e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE		|
2956e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
2957e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
2958e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
2959e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
2960e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE		|
2961e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
2962e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
2963e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX	|
2964e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_Q_KEY		|
2965e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
2966e126ba97SEli Cohen 		},
2967e126ba97SEli Cohen 		[MLX5_QP_STATE_RTR] = {
2968e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH  |
2969e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RRE            |
2970e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE            |
2971e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
2972e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
2973e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH  |
2974e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
2975e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
2976e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX     |
2977e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_Q_KEY,
2978e126ba97SEli Cohen 			[MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX	|
2979e126ba97SEli Cohen 					   MLX5_QP_OPTPAR_Q_KEY,
2980a4774e90SEli Cohen 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH |
2981a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RRE            |
2982a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RAE            |
2983a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
2984a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
2985e126ba97SEli Cohen 		},
2986e126ba97SEli Cohen 	},
2987e126ba97SEli Cohen 	[MLX5_QP_STATE_RTR] = {
2988e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
2989e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
2990e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RRE		|
2991e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
2992e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
2993e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
2994e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RNR_TIMEOUT,
2995e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
2996e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
2997e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE,
2998e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY,
2999e126ba97SEli Cohen 		},
3000e126ba97SEli Cohen 	},
3001e126ba97SEli Cohen 	[MLX5_QP_STATE_RTS] = {
3002e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3003e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE		|
3004e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
3005e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3006e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RNR_TIMEOUT	|
3007c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3008c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3009e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE		|
3010c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3011c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3012e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY		|
3013e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_SRQN		|
3014e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_CQN_RCV,
3015e126ba97SEli Cohen 		},
3016e126ba97SEli Cohen 	},
3017e126ba97SEli Cohen 	[MLX5_QP_STATE_SQER] = {
3018e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3019e126ba97SEli Cohen 			[MLX5_QP_ST_UD]	 = MLX5_QP_OPTPAR_Q_KEY,
3020e126ba97SEli Cohen 			[MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY,
302175959f56SEli Cohen 			[MLX5_QP_ST_UC]	 = MLX5_QP_OPTPAR_RWE,
3022a4774e90SEli Cohen 			[MLX5_QP_ST_RC]	 = MLX5_QP_OPTPAR_RNR_TIMEOUT	|
3023a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RWE		|
3024a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RAE		|
3025a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RRE,
3026e126ba97SEli Cohen 		},
3027e126ba97SEli Cohen 	},
3028e126ba97SEli Cohen };
3029e126ba97SEli Cohen 
3030e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask)
3031e126ba97SEli Cohen {
3032e126ba97SEli Cohen 	switch (ib_mask) {
3033e126ba97SEli Cohen 	case IB_QP_STATE:
3034e126ba97SEli Cohen 		return 0;
3035e126ba97SEli Cohen 	case IB_QP_CUR_STATE:
3036e126ba97SEli Cohen 		return 0;
3037e126ba97SEli Cohen 	case IB_QP_EN_SQD_ASYNC_NOTIFY:
3038e126ba97SEli Cohen 		return 0;
3039e126ba97SEli Cohen 	case IB_QP_ACCESS_FLAGS:
3040e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE |
3041e126ba97SEli Cohen 			MLX5_QP_OPTPAR_RAE;
3042e126ba97SEli Cohen 	case IB_QP_PKEY_INDEX:
3043e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PKEY_INDEX;
3044e126ba97SEli Cohen 	case IB_QP_PORT:
3045e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PRI_PORT;
3046e126ba97SEli Cohen 	case IB_QP_QKEY:
3047e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_Q_KEY;
3048e126ba97SEli Cohen 	case IB_QP_AV:
3049e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH |
3050e126ba97SEli Cohen 			MLX5_QP_OPTPAR_PRI_PORT;
3051e126ba97SEli Cohen 	case IB_QP_PATH_MTU:
3052e126ba97SEli Cohen 		return 0;
3053e126ba97SEli Cohen 	case IB_QP_TIMEOUT:
3054e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_ACK_TIMEOUT;
3055e126ba97SEli Cohen 	case IB_QP_RETRY_CNT:
3056e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RETRY_COUNT;
3057e126ba97SEli Cohen 	case IB_QP_RNR_RETRY:
3058e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RNR_RETRY;
3059e126ba97SEli Cohen 	case IB_QP_RQ_PSN:
3060e126ba97SEli Cohen 		return 0;
3061e126ba97SEli Cohen 	case IB_QP_MAX_QP_RD_ATOMIC:
3062e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_SRA_MAX;
3063e126ba97SEli Cohen 	case IB_QP_ALT_PATH:
3064e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_ALT_ADDR_PATH;
3065e126ba97SEli Cohen 	case IB_QP_MIN_RNR_TIMER:
3066e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RNR_TIMEOUT;
3067e126ba97SEli Cohen 	case IB_QP_SQ_PSN:
3068e126ba97SEli Cohen 		return 0;
3069e126ba97SEli Cohen 	case IB_QP_MAX_DEST_RD_ATOMIC:
3070e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE |
3071e126ba97SEli Cohen 			MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE;
3072e126ba97SEli Cohen 	case IB_QP_PATH_MIG_STATE:
3073e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PM_STATE;
3074e126ba97SEli Cohen 	case IB_QP_CAP:
3075e126ba97SEli Cohen 		return 0;
3076e126ba97SEli Cohen 	case IB_QP_DEST_QPN:
3077e126ba97SEli Cohen 		return 0;
3078e126ba97SEli Cohen 	}
3079e126ba97SEli Cohen 	return 0;
3080e126ba97SEli Cohen }
3081e126ba97SEli Cohen 
3082e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask)
3083e126ba97SEli Cohen {
3084e126ba97SEli Cohen 	int result = 0;
3085e126ba97SEli Cohen 	int i;
3086e126ba97SEli Cohen 
3087e126ba97SEli Cohen 	for (i = 0; i < 8 * sizeof(int); i++) {
3088e126ba97SEli Cohen 		if ((1 << i) & ib_mask)
3089e126ba97SEli Cohen 			result |= ib_nr_to_mlx5_nr(1 << i);
3090e126ba97SEli Cohen 	}
3091e126ba97SEli Cohen 
3092e126ba97SEli Cohen 	return result;
3093e126ba97SEli Cohen }
3094e126ba97SEli Cohen 
309534d57585SYishai Hadas static int modify_raw_packet_qp_rq(
309634d57585SYishai Hadas 	struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state,
309734d57585SYishai Hadas 	const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd)
3098ad5f8e96Smajd@mellanox.com {
3099ad5f8e96Smajd@mellanox.com 	void *in;
3100ad5f8e96Smajd@mellanox.com 	void *rqc;
3101ad5f8e96Smajd@mellanox.com 	int inlen;
3102ad5f8e96Smajd@mellanox.com 	int err;
3103ad5f8e96Smajd@mellanox.com 
3104ad5f8e96Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_rq_in);
31051b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
3106ad5f8e96Smajd@mellanox.com 	if (!in)
3107ad5f8e96Smajd@mellanox.com 		return -ENOMEM;
3108ad5f8e96Smajd@mellanox.com 
3109ad5f8e96Smajd@mellanox.com 	MLX5_SET(modify_rq_in, in, rq_state, rq->state);
311034d57585SYishai Hadas 	MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid);
3111ad5f8e96Smajd@mellanox.com 
3112ad5f8e96Smajd@mellanox.com 	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
3113ad5f8e96Smajd@mellanox.com 	MLX5_SET(rqc, rqc, state, new_state);
3114ad5f8e96Smajd@mellanox.com 
3115eb49ab0cSAlex Vesker 	if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) {
3116eb49ab0cSAlex Vesker 		if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
3117eb49ab0cSAlex Vesker 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
311823a6964eSMajd Dibbiny 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID);
3119eb49ab0cSAlex Vesker 			MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id);
3120eb49ab0cSAlex Vesker 		} else
31215a738b5dSJason Gunthorpe 			dev_info_once(
31225a738b5dSJason Gunthorpe 				&dev->ib_dev.dev,
31235a738b5dSJason Gunthorpe 				"RAW PACKET QP counters are not supported on current FW\n");
3124eb49ab0cSAlex Vesker 	}
3125eb49ab0cSAlex Vesker 
3126eb49ab0cSAlex Vesker 	err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen);
3127ad5f8e96Smajd@mellanox.com 	if (err)
3128ad5f8e96Smajd@mellanox.com 		goto out;
3129ad5f8e96Smajd@mellanox.com 
3130ad5f8e96Smajd@mellanox.com 	rq->state = new_state;
3131ad5f8e96Smajd@mellanox.com 
3132ad5f8e96Smajd@mellanox.com out:
3133ad5f8e96Smajd@mellanox.com 	kvfree(in);
3134ad5f8e96Smajd@mellanox.com 	return err;
3135ad5f8e96Smajd@mellanox.com }
3136ad5f8e96Smajd@mellanox.com 
3137c14003f0SYishai Hadas static int modify_raw_packet_qp_sq(
3138c14003f0SYishai Hadas 	struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state,
3139c14003f0SYishai Hadas 	const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd)
3140ad5f8e96Smajd@mellanox.com {
31417d29f349SBodong Wang 	struct mlx5_ib_qp *ibqp = sq->base.container_mibqp;
314261147f39SBodong Wang 	struct mlx5_rate_limit old_rl = ibqp->rl;
314361147f39SBodong Wang 	struct mlx5_rate_limit new_rl = old_rl;
314461147f39SBodong Wang 	bool new_rate_added = false;
31457d29f349SBodong Wang 	u16 rl_index = 0;
3146ad5f8e96Smajd@mellanox.com 	void *in;
3147ad5f8e96Smajd@mellanox.com 	void *sqc;
3148ad5f8e96Smajd@mellanox.com 	int inlen;
3149ad5f8e96Smajd@mellanox.com 	int err;
3150ad5f8e96Smajd@mellanox.com 
3151ad5f8e96Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_sq_in);
31521b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
3153ad5f8e96Smajd@mellanox.com 	if (!in)
3154ad5f8e96Smajd@mellanox.com 		return -ENOMEM;
3155ad5f8e96Smajd@mellanox.com 
3156c14003f0SYishai Hadas 	MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid);
3157ad5f8e96Smajd@mellanox.com 	MLX5_SET(modify_sq_in, in, sq_state, sq->state);
3158ad5f8e96Smajd@mellanox.com 
3159ad5f8e96Smajd@mellanox.com 	sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx);
3160ad5f8e96Smajd@mellanox.com 	MLX5_SET(sqc, sqc, state, new_state);
3161ad5f8e96Smajd@mellanox.com 
31627d29f349SBodong Wang 	if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) {
31637d29f349SBodong Wang 		if (new_state != MLX5_SQC_STATE_RDY)
31647d29f349SBodong Wang 			pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n",
31657d29f349SBodong Wang 				__func__);
31667d29f349SBodong Wang 		else
316761147f39SBodong Wang 			new_rl = raw_qp_param->rl;
31687d29f349SBodong Wang 	}
3169ad5f8e96Smajd@mellanox.com 
317061147f39SBodong Wang 	if (!mlx5_rl_are_equal(&old_rl, &new_rl)) {
317161147f39SBodong Wang 		if (new_rl.rate) {
317261147f39SBodong Wang 			err = mlx5_rl_add_rate(dev, &rl_index, &new_rl);
31737d29f349SBodong Wang 			if (err) {
317461147f39SBodong Wang 				pr_err("Failed configuring rate limit(err %d): \
317561147f39SBodong Wang 				       rate %u, max_burst_sz %u, typical_pkt_sz %u\n",
317661147f39SBodong Wang 				       err, new_rl.rate, new_rl.max_burst_sz,
317761147f39SBodong Wang 				       new_rl.typical_pkt_sz);
317861147f39SBodong Wang 
31797d29f349SBodong Wang 				goto out;
31807d29f349SBodong Wang 			}
318161147f39SBodong Wang 			new_rate_added = true;
31827d29f349SBodong Wang 		}
31837d29f349SBodong Wang 
31847d29f349SBodong Wang 		MLX5_SET64(modify_sq_in, in, modify_bitmask, 1);
318561147f39SBodong Wang 		/* index 0 means no limit */
31867d29f349SBodong Wang 		MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index);
31877d29f349SBodong Wang 	}
31887d29f349SBodong Wang 
31897d29f349SBodong Wang 	err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen);
31907d29f349SBodong Wang 	if (err) {
31917d29f349SBodong Wang 		/* Remove new rate from table if failed */
319261147f39SBodong Wang 		if (new_rate_added)
319361147f39SBodong Wang 			mlx5_rl_remove_rate(dev, &new_rl);
31947d29f349SBodong Wang 		goto out;
31957d29f349SBodong Wang 	}
31967d29f349SBodong Wang 
31977d29f349SBodong Wang 	/* Only remove the old rate after new rate was set */
319861147f39SBodong Wang 	if ((old_rl.rate &&
319961147f39SBodong Wang 	     !mlx5_rl_are_equal(&old_rl, &new_rl)) ||
32007d29f349SBodong Wang 	    (new_state != MLX5_SQC_STATE_RDY))
320161147f39SBodong Wang 		mlx5_rl_remove_rate(dev, &old_rl);
32027d29f349SBodong Wang 
320361147f39SBodong Wang 	ibqp->rl = new_rl;
3204ad5f8e96Smajd@mellanox.com 	sq->state = new_state;
3205ad5f8e96Smajd@mellanox.com 
3206ad5f8e96Smajd@mellanox.com out:
3207ad5f8e96Smajd@mellanox.com 	kvfree(in);
3208ad5f8e96Smajd@mellanox.com 	return err;
3209ad5f8e96Smajd@mellanox.com }
3210ad5f8e96Smajd@mellanox.com 
3211ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
321213eab21fSAviv Heller 				const struct mlx5_modify_raw_qp_param *raw_qp_param,
321313eab21fSAviv Heller 				u8 tx_affinity)
3214ad5f8e96Smajd@mellanox.com {
3215ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
3216ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
3217ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
32187d29f349SBodong Wang 	int modify_rq = !!qp->rq.wqe_cnt;
32197d29f349SBodong Wang 	int modify_sq = !!qp->sq.wqe_cnt;
3220ad5f8e96Smajd@mellanox.com 	int rq_state;
3221ad5f8e96Smajd@mellanox.com 	int sq_state;
3222ad5f8e96Smajd@mellanox.com 	int err;
3223ad5f8e96Smajd@mellanox.com 
32240680efa2SAlex Vesker 	switch (raw_qp_param->operation) {
3225ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RST2INIT_QP:
3226ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_RDY;
3227ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_RDY;
3228ad5f8e96Smajd@mellanox.com 		break;
3229ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_2ERR_QP:
3230ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_ERR;
3231ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_ERR;
3232ad5f8e96Smajd@mellanox.com 		break;
3233ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_2RST_QP:
3234ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_RST;
3235ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_RST;
3236ad5f8e96Smajd@mellanox.com 		break;
3237ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RTR2RTS_QP:
3238ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RTS2RTS_QP:
32397d29f349SBodong Wang 		if (raw_qp_param->set_mask ==
32407d29f349SBodong Wang 		    MLX5_RAW_QP_RATE_LIMIT) {
32417d29f349SBodong Wang 			modify_rq = 0;
32427d29f349SBodong Wang 			sq_state = sq->state;
32437d29f349SBodong Wang 		} else {
32447d29f349SBodong Wang 			return raw_qp_param->set_mask ? -EINVAL : 0;
32457d29f349SBodong Wang 		}
32467d29f349SBodong Wang 		break;
32477d29f349SBodong Wang 	case MLX5_CMD_OP_INIT2INIT_QP:
32487d29f349SBodong Wang 	case MLX5_CMD_OP_INIT2RTR_QP:
3249eb49ab0cSAlex Vesker 		if (raw_qp_param->set_mask)
3250eb49ab0cSAlex Vesker 			return -EINVAL;
3251eb49ab0cSAlex Vesker 		else
3252ad5f8e96Smajd@mellanox.com 			return 0;
3253ad5f8e96Smajd@mellanox.com 	default:
3254ad5f8e96Smajd@mellanox.com 		WARN_ON(1);
3255ad5f8e96Smajd@mellanox.com 		return -EINVAL;
3256ad5f8e96Smajd@mellanox.com 	}
3257ad5f8e96Smajd@mellanox.com 
32587d29f349SBodong Wang 	if (modify_rq) {
325934d57585SYishai Hadas 		err =  modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param,
326034d57585SYishai Hadas 					       qp->ibqp.pd);
3261ad5f8e96Smajd@mellanox.com 		if (err)
3262ad5f8e96Smajd@mellanox.com 			return err;
3263ad5f8e96Smajd@mellanox.com 	}
3264ad5f8e96Smajd@mellanox.com 
32657d29f349SBodong Wang 	if (modify_sq) {
3266d5ed8ac3SMark Bloch 		struct mlx5_flow_handle *flow_rule;
3267d5ed8ac3SMark Bloch 
326813eab21fSAviv Heller 		if (tx_affinity) {
326913eab21fSAviv Heller 			err = modify_raw_packet_tx_affinity(dev->mdev, sq,
32701cd6dbd3SYishai Hadas 							    tx_affinity,
32711cd6dbd3SYishai Hadas 							    qp->ibqp.pd);
327213eab21fSAviv Heller 			if (err)
327313eab21fSAviv Heller 				return err;
327413eab21fSAviv Heller 		}
327513eab21fSAviv Heller 
3276d5ed8ac3SMark Bloch 		flow_rule = create_flow_rule_vport_sq(dev, sq,
3277d5ed8ac3SMark Bloch 						      raw_qp_param->port);
3278d5ed8ac3SMark Bloch 		if (IS_ERR(flow_rule))
32791db86318SColin Ian King 			return PTR_ERR(flow_rule);
3280d5ed8ac3SMark Bloch 
3281d5ed8ac3SMark Bloch 		err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state,
3282c14003f0SYishai Hadas 					      raw_qp_param, qp->ibqp.pd);
3283d5ed8ac3SMark Bloch 		if (err) {
3284d5ed8ac3SMark Bloch 			if (flow_rule)
3285d5ed8ac3SMark Bloch 				mlx5_del_flow_rules(flow_rule);
3286d5ed8ac3SMark Bloch 			return err;
3287d5ed8ac3SMark Bloch 		}
3288d5ed8ac3SMark Bloch 
3289d5ed8ac3SMark Bloch 		if (flow_rule) {
3290d5ed8ac3SMark Bloch 			destroy_flow_rule_vport_sq(sq);
3291d5ed8ac3SMark Bloch 			sq->flow_rule = flow_rule;
3292d5ed8ac3SMark Bloch 		}
3293d5ed8ac3SMark Bloch 
3294d5ed8ac3SMark Bloch 		return err;
329513eab21fSAviv Heller 	}
3296ad5f8e96Smajd@mellanox.com 
3297ad5f8e96Smajd@mellanox.com 	return 0;
3298ad5f8e96Smajd@mellanox.com }
3299ad5f8e96Smajd@mellanox.com 
3300c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev,
3301c6a21c38SMajd Dibbiny 				    struct mlx5_ib_pd *pd,
3302c6a21c38SMajd Dibbiny 				    struct mlx5_ib_qp_base *qp_base,
330389944450SShamir Rabinovitch 				    u8 port_num, struct ib_udata *udata)
3304c6a21c38SMajd Dibbiny {
330589944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
330689944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
3307c6a21c38SMajd Dibbiny 	unsigned int tx_port_affinity;
3308c6a21c38SMajd Dibbiny 
3309c6a21c38SMajd Dibbiny 	if (ucontext) {
3310c6a21c38SMajd Dibbiny 		tx_port_affinity = (unsigned int)atomic_add_return(
3311c6a21c38SMajd Dibbiny 					   1, &ucontext->tx_port_affinity) %
3312c6a21c38SMajd Dibbiny 					   MLX5_MAX_PORTS +
3313c6a21c38SMajd Dibbiny 				   1;
3314c6a21c38SMajd Dibbiny 		mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n",
3315c6a21c38SMajd Dibbiny 				tx_port_affinity, qp_base->mqp.qpn, ucontext);
3316c6a21c38SMajd Dibbiny 	} else {
3317c6a21c38SMajd Dibbiny 		tx_port_affinity =
3318c6a21c38SMajd Dibbiny 			(unsigned int)atomic_add_return(
331995579e78SMark Bloch 				1, &dev->port[port_num].roce.tx_port_affinity) %
3320c6a21c38SMajd Dibbiny 				MLX5_MAX_PORTS +
3321c6a21c38SMajd Dibbiny 			1;
3322c6a21c38SMajd Dibbiny 		mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n",
3323c6a21c38SMajd Dibbiny 				tx_port_affinity, qp_base->mqp.qpn);
3324c6a21c38SMajd Dibbiny 	}
3325c6a21c38SMajd Dibbiny 
3326c6a21c38SMajd Dibbiny 	return tx_port_affinity;
3327c6a21c38SMajd Dibbiny }
3328c6a21c38SMajd Dibbiny 
3329e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp,
3330e126ba97SEli Cohen 			       const struct ib_qp_attr *attr, int attr_mask,
333189944450SShamir Rabinovitch 			       enum ib_qp_state cur_state,
333289944450SShamir Rabinovitch 			       enum ib_qp_state new_state,
333389944450SShamir Rabinovitch 			       const struct mlx5_ib_modify_qp *ucmd,
333489944450SShamir Rabinovitch 			       struct ib_udata *udata)
3335e126ba97SEli Cohen {
3336427c1e7bSmajd@mellanox.com 	static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = {
3337427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RST] = {
3338427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3339427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3340427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_INIT]	= MLX5_CMD_OP_RST2INIT_QP,
3341427c1e7bSmajd@mellanox.com 		},
3342427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_INIT]  = {
3343427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3344427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3345427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_INIT]	= MLX5_CMD_OP_INIT2INIT_QP,
3346427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTR]	= MLX5_CMD_OP_INIT2RTR_QP,
3347427c1e7bSmajd@mellanox.com 		},
3348427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RTR]   = {
3349427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3350427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3351427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_RTR2RTS_QP,
3352427c1e7bSmajd@mellanox.com 		},
3353427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RTS]   = {
3354427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3355427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3356427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_RTS2RTS_QP,
3357427c1e7bSmajd@mellanox.com 		},
3358427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_SQD] = {
3359427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3360427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3361427c1e7bSmajd@mellanox.com 		},
3362427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_SQER] = {
3363427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3364427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3365427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_SQERR2RTS_QP,
3366427c1e7bSmajd@mellanox.com 		},
3367427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_ERR] = {
3368427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3369427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3370427c1e7bSmajd@mellanox.com 		}
3371427c1e7bSmajd@mellanox.com 	};
3372427c1e7bSmajd@mellanox.com 
3373e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3374e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
337519098df2Smajd@mellanox.com 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
3376e126ba97SEli Cohen 	struct mlx5_ib_cq *send_cq, *recv_cq;
3377e126ba97SEli Cohen 	struct mlx5_qp_context *context;
3378e126ba97SEli Cohen 	struct mlx5_ib_pd *pd;
3379eb49ab0cSAlex Vesker 	struct mlx5_ib_port *mibport = NULL;
3380e126ba97SEli Cohen 	enum mlx5_qp_state mlx5_cur, mlx5_new;
3381e126ba97SEli Cohen 	enum mlx5_qp_optpar optpar;
3382e126ba97SEli Cohen 	int mlx5_st;
3383e126ba97SEli Cohen 	int err;
3384427c1e7bSmajd@mellanox.com 	u16 op;
338513eab21fSAviv Heller 	u8 tx_affinity = 0;
3386e126ba97SEli Cohen 
338755de9a77SLeon Romanovsky 	mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ?
338855de9a77SLeon Romanovsky 			     qp->qp_sub_type : ibqp->qp_type);
338955de9a77SLeon Romanovsky 	if (mlx5_st < 0)
339055de9a77SLeon Romanovsky 		return -EINVAL;
339155de9a77SLeon Romanovsky 
33921a412fb1SSaeed Mahameed 	context = kzalloc(sizeof(*context), GFP_KERNEL);
33931a412fb1SSaeed Mahameed 	if (!context)
3394e126ba97SEli Cohen 		return -ENOMEM;
3395e126ba97SEli Cohen 
3396c6a21c38SMajd Dibbiny 	pd = get_pd(qp);
339755de9a77SLeon Romanovsky 	context->flags = cpu_to_be32(mlx5_st << 16);
3398e126ba97SEli Cohen 
3399e126ba97SEli Cohen 	if (!(attr_mask & IB_QP_PATH_MIG_STATE)) {
3400e126ba97SEli Cohen 		context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
3401e126ba97SEli Cohen 	} else {
3402e126ba97SEli Cohen 		switch (attr->path_mig_state) {
3403e126ba97SEli Cohen 		case IB_MIG_MIGRATED:
3404e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
3405e126ba97SEli Cohen 			break;
3406e126ba97SEli Cohen 		case IB_MIG_REARM:
3407e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11);
3408e126ba97SEli Cohen 			break;
3409e126ba97SEli Cohen 		case IB_MIG_ARMED:
3410e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11);
3411e126ba97SEli Cohen 			break;
3412e126ba97SEli Cohen 		}
3413e126ba97SEli Cohen 	}
3414e126ba97SEli Cohen 
341513eab21fSAviv Heller 	if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) {
341613eab21fSAviv Heller 		if ((ibqp->qp_type == IB_QPT_RC) ||
341713eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_UD &&
341813eab21fSAviv Heller 		     !(qp->flags & MLX5_IB_QP_SQPN_QP1)) ||
341913eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_UC) ||
342013eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_RAW_PACKET) ||
342113eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_XRC_INI) ||
342213eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_XRC_TGT)) {
34237c34ec19SAviv Heller 			if (dev->lag_active) {
342495579e78SMark Bloch 				u8 p = mlx5_core_native_port_num(dev->mdev) - 1;
342589944450SShamir Rabinovitch 				tx_affinity = get_tx_affinity(dev, pd, base, p,
342689944450SShamir Rabinovitch 							      udata);
342713eab21fSAviv Heller 				context->flags |= cpu_to_be32(tx_affinity << 24);
342813eab21fSAviv Heller 			}
342913eab21fSAviv Heller 		}
343013eab21fSAviv Heller 	}
343113eab21fSAviv Heller 
3432d16e91daSHaggai Eran 	if (is_sqp(ibqp->qp_type)) {
3433e126ba97SEli Cohen 		context->mtu_msgmax = (IB_MTU_256 << 5) | 8;
3434c2e53b2cSYishai Hadas 	} else if ((ibqp->qp_type == IB_QPT_UD &&
3435c2e53b2cSYishai Hadas 		    !(qp->flags & MLX5_IB_QP_UNDERLAY)) ||
3436e126ba97SEli Cohen 		   ibqp->qp_type == MLX5_IB_QPT_REG_UMR) {
3437e126ba97SEli Cohen 		context->mtu_msgmax = (IB_MTU_4096 << 5) | 12;
3438e126ba97SEli Cohen 	} else if (attr_mask & IB_QP_PATH_MTU) {
3439e126ba97SEli Cohen 		if (attr->path_mtu < IB_MTU_256 ||
3440e126ba97SEli Cohen 		    attr->path_mtu > IB_MTU_4096) {
3441e126ba97SEli Cohen 			mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu);
3442e126ba97SEli Cohen 			err = -EINVAL;
3443e126ba97SEli Cohen 			goto out;
3444e126ba97SEli Cohen 		}
3445938fe83cSSaeed Mahameed 		context->mtu_msgmax = (attr->path_mtu << 5) |
3446938fe83cSSaeed Mahameed 				      (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg);
3447e126ba97SEli Cohen 	}
3448e126ba97SEli Cohen 
3449e126ba97SEli Cohen 	if (attr_mask & IB_QP_DEST_QPN)
3450e126ba97SEli Cohen 		context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num);
3451e126ba97SEli Cohen 
3452e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX)
3453d3ae2bdeSNoa Osherovich 		context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index);
3454e126ba97SEli Cohen 
3455e126ba97SEli Cohen 	/* todo implement counter_index functionality */
3456e126ba97SEli Cohen 
3457e126ba97SEli Cohen 	if (is_sqp(ibqp->qp_type))
3458e126ba97SEli Cohen 		context->pri_path.port = qp->port;
3459e126ba97SEli Cohen 
3460e126ba97SEli Cohen 	if (attr_mask & IB_QP_PORT)
3461e126ba97SEli Cohen 		context->pri_path.port = attr->port_num;
3462e126ba97SEli Cohen 
3463e126ba97SEli Cohen 	if (attr_mask & IB_QP_AV) {
346475850d0bSmajd@mellanox.com 		err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path,
3465e126ba97SEli Cohen 				    attr_mask & IB_QP_PORT ? attr->port_num : qp->port,
3466f879ee8dSAchiad Shochat 				    attr_mask, 0, attr, false);
3467e126ba97SEli Cohen 		if (err)
3468e126ba97SEli Cohen 			goto out;
3469e126ba97SEli Cohen 	}
3470e126ba97SEli Cohen 
3471e126ba97SEli Cohen 	if (attr_mask & IB_QP_TIMEOUT)
3472e126ba97SEli Cohen 		context->pri_path.ackto_lt |= attr->timeout << 3;
3473e126ba97SEli Cohen 
3474e126ba97SEli Cohen 	if (attr_mask & IB_QP_ALT_PATH) {
347575850d0bSmajd@mellanox.com 		err = mlx5_set_path(dev, qp, &attr->alt_ah_attr,
347675850d0bSmajd@mellanox.com 				    &context->alt_path,
3477f879ee8dSAchiad Shochat 				    attr->alt_port_num,
3478f879ee8dSAchiad Shochat 				    attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT,
3479f879ee8dSAchiad Shochat 				    0, attr, true);
3480e126ba97SEli Cohen 		if (err)
3481e126ba97SEli Cohen 			goto out;
3482e126ba97SEli Cohen 	}
3483e126ba97SEli Cohen 
348489ea94a7SMaor Gottlieb 	get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq,
348589ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
3486e126ba97SEli Cohen 
3487e126ba97SEli Cohen 	context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn);
3488e126ba97SEli Cohen 	context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0;
3489e126ba97SEli Cohen 	context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0;
3490e126ba97SEli Cohen 	context->params1  = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28);
3491e126ba97SEli Cohen 
3492e126ba97SEli Cohen 	if (attr_mask & IB_QP_RNR_RETRY)
3493e126ba97SEli Cohen 		context->params1 |= cpu_to_be32(attr->rnr_retry << 13);
3494e126ba97SEli Cohen 
3495e126ba97SEli Cohen 	if (attr_mask & IB_QP_RETRY_CNT)
3496e126ba97SEli Cohen 		context->params1 |= cpu_to_be32(attr->retry_cnt << 16);
3497e126ba97SEli Cohen 
3498e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
3499e126ba97SEli Cohen 		if (attr->max_rd_atomic)
3500e126ba97SEli Cohen 			context->params1 |=
3501e126ba97SEli Cohen 				cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21);
3502e126ba97SEli Cohen 	}
3503e126ba97SEli Cohen 
3504e126ba97SEli Cohen 	if (attr_mask & IB_QP_SQ_PSN)
3505e126ba97SEli Cohen 		context->next_send_psn = cpu_to_be32(attr->sq_psn);
3506e126ba97SEli Cohen 
3507e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
3508e126ba97SEli Cohen 		if (attr->max_dest_rd_atomic)
3509e126ba97SEli Cohen 			context->params2 |=
3510e126ba97SEli Cohen 				cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21);
3511e126ba97SEli Cohen 	}
3512e126ba97SEli Cohen 
3513a60109dcSYonatan Cohen 	if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) {
3514bf3b4f06SBart Van Assche 		__be32 access_flags;
3515a60109dcSYonatan Cohen 
3516a60109dcSYonatan Cohen 		err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags);
3517a60109dcSYonatan Cohen 		if (err)
3518a60109dcSYonatan Cohen 			goto out;
3519a60109dcSYonatan Cohen 
3520a60109dcSYonatan Cohen 		context->params2 |= access_flags;
3521a60109dcSYonatan Cohen 	}
3522e126ba97SEli Cohen 
3523e126ba97SEli Cohen 	if (attr_mask & IB_QP_MIN_RNR_TIMER)
3524e126ba97SEli Cohen 		context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24);
3525e126ba97SEli Cohen 
3526e126ba97SEli Cohen 	if (attr_mask & IB_QP_RQ_PSN)
3527e126ba97SEli Cohen 		context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn);
3528e126ba97SEli Cohen 
3529e126ba97SEli Cohen 	if (attr_mask & IB_QP_QKEY)
3530e126ba97SEli Cohen 		context->qkey = cpu_to_be32(attr->qkey);
3531e126ba97SEli Cohen 
3532e126ba97SEli Cohen 	if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
3533e126ba97SEli Cohen 		context->db_rec_addr = cpu_to_be64(qp->db.dma);
3534e126ba97SEli Cohen 
35350837e86aSMark Bloch 	if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
35360837e86aSMark Bloch 		u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num :
35370837e86aSMark Bloch 			       qp->port) - 1;
3538c2e53b2cSYishai Hadas 
3539c2e53b2cSYishai Hadas 		/* Underlay port should be used - index 0 function per port */
3540c2e53b2cSYishai Hadas 		if (qp->flags & MLX5_IB_QP_UNDERLAY)
3541c2e53b2cSYishai Hadas 			port_num = 0;
3542c2e53b2cSYishai Hadas 
3543eb49ab0cSAlex Vesker 		mibport = &dev->port[port_num];
35440837e86aSMark Bloch 		context->qp_counter_set_usr_page |=
3545e1f24a79SParav Pandit 			cpu_to_be32((u32)(mibport->cnts.set_id) << 24);
35460837e86aSMark Bloch 	}
35470837e86aSMark Bloch 
3548e126ba97SEli Cohen 	if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
3549e126ba97SEli Cohen 		context->sq_crq_size |= cpu_to_be16(1 << 4);
3550e126ba97SEli Cohen 
3551b11a4f9cSHaggai Eran 	if (qp->flags & MLX5_IB_QP_SQPN_QP1)
3552b11a4f9cSHaggai Eran 		context->deth_sqpn = cpu_to_be32(1);
3553e126ba97SEli Cohen 
3554e126ba97SEli Cohen 	mlx5_cur = to_mlx5_state(cur_state);
3555e126ba97SEli Cohen 	mlx5_new = to_mlx5_state(new_state);
3556e126ba97SEli Cohen 
3557427c1e7bSmajd@mellanox.com 	if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE ||
35585d414b17SDan Carpenter 	    !optab[mlx5_cur][mlx5_new]) {
35595d414b17SDan Carpenter 		err = -EINVAL;
3560427c1e7bSmajd@mellanox.com 		goto out;
35615d414b17SDan Carpenter 	}
3562427c1e7bSmajd@mellanox.com 
3563427c1e7bSmajd@mellanox.com 	op = optab[mlx5_cur][mlx5_new];
3564e126ba97SEli Cohen 	optpar = ib_mask_to_mlx5_opt(attr_mask);
3565e126ba97SEli Cohen 	optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st];
3566ad5f8e96Smajd@mellanox.com 
3567c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
3568c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
35690680efa2SAlex Vesker 		struct mlx5_modify_raw_qp_param raw_qp_param = {};
35700680efa2SAlex Vesker 
35710680efa2SAlex Vesker 		raw_qp_param.operation = op;
3572eb49ab0cSAlex Vesker 		if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3573e1f24a79SParav Pandit 			raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id;
3574eb49ab0cSAlex Vesker 			raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID;
3575eb49ab0cSAlex Vesker 		}
35767d29f349SBodong Wang 
3577d5ed8ac3SMark Bloch 		if (attr_mask & IB_QP_PORT)
3578d5ed8ac3SMark Bloch 			raw_qp_param.port = attr->port_num;
3579d5ed8ac3SMark Bloch 
35807d29f349SBodong Wang 		if (attr_mask & IB_QP_RATE_LIMIT) {
358161147f39SBodong Wang 			raw_qp_param.rl.rate = attr->rate_limit;
358261147f39SBodong Wang 
358361147f39SBodong Wang 			if (ucmd->burst_info.max_burst_sz) {
358461147f39SBodong Wang 				if (attr->rate_limit &&
358561147f39SBodong Wang 				    MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) {
358661147f39SBodong Wang 					raw_qp_param.rl.max_burst_sz =
358761147f39SBodong Wang 						ucmd->burst_info.max_burst_sz;
358861147f39SBodong Wang 				} else {
358961147f39SBodong Wang 					err = -EINVAL;
359061147f39SBodong Wang 					goto out;
359161147f39SBodong Wang 				}
359261147f39SBodong Wang 			}
359361147f39SBodong Wang 
359461147f39SBodong Wang 			if (ucmd->burst_info.typical_pkt_sz) {
359561147f39SBodong Wang 				if (attr->rate_limit &&
359661147f39SBodong Wang 				    MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) {
359761147f39SBodong Wang 					raw_qp_param.rl.typical_pkt_sz =
359861147f39SBodong Wang 						ucmd->burst_info.typical_pkt_sz;
359961147f39SBodong Wang 				} else {
360061147f39SBodong Wang 					err = -EINVAL;
360161147f39SBodong Wang 					goto out;
360261147f39SBodong Wang 				}
360361147f39SBodong Wang 			}
360461147f39SBodong Wang 
36057d29f349SBodong Wang 			raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT;
36067d29f349SBodong Wang 		}
36077d29f349SBodong Wang 
360813eab21fSAviv Heller 		err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity);
36090680efa2SAlex Vesker 	} else {
36101a412fb1SSaeed Mahameed 		err = mlx5_core_qp_modify(dev->mdev, op, optpar, context,
361119098df2Smajd@mellanox.com 					  &base->mqp);
36120680efa2SAlex Vesker 	}
36130680efa2SAlex Vesker 
3614e126ba97SEli Cohen 	if (err)
3615e126ba97SEli Cohen 		goto out;
3616e126ba97SEli Cohen 
3617e126ba97SEli Cohen 	qp->state = new_state;
3618e126ba97SEli Cohen 
3619e126ba97SEli Cohen 	if (attr_mask & IB_QP_ACCESS_FLAGS)
362019098df2Smajd@mellanox.com 		qp->trans_qp.atomic_rd_en = attr->qp_access_flags;
3621e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
362219098df2Smajd@mellanox.com 		qp->trans_qp.resp_depth = attr->max_dest_rd_atomic;
3623e126ba97SEli Cohen 	if (attr_mask & IB_QP_PORT)
3624e126ba97SEli Cohen 		qp->port = attr->port_num;
3625e126ba97SEli Cohen 	if (attr_mask & IB_QP_ALT_PATH)
362619098df2Smajd@mellanox.com 		qp->trans_qp.alt_port = attr->alt_port_num;
3627e126ba97SEli Cohen 
3628e126ba97SEli Cohen 	/*
3629e126ba97SEli Cohen 	 * If we moved a kernel QP to RESET, clean up all old CQ
3630e126ba97SEli Cohen 	 * entries and reinitialize the QP.
3631e126ba97SEli Cohen 	 */
363275a45982SLeon Romanovsky 	if (new_state == IB_QPS_RESET &&
363375a45982SLeon Romanovsky 	    !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) {
363419098df2Smajd@mellanox.com 		mlx5_ib_cq_clean(recv_cq, base->mqp.qpn,
3635e126ba97SEli Cohen 				 ibqp->srq ? to_msrq(ibqp->srq) : NULL);
3636e126ba97SEli Cohen 		if (send_cq != recv_cq)
363719098df2Smajd@mellanox.com 			mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL);
3638e126ba97SEli Cohen 
3639e126ba97SEli Cohen 		qp->rq.head = 0;
3640e126ba97SEli Cohen 		qp->rq.tail = 0;
3641e126ba97SEli Cohen 		qp->sq.head = 0;
3642e126ba97SEli Cohen 		qp->sq.tail = 0;
3643e126ba97SEli Cohen 		qp->sq.cur_post = 0;
364434f4c955SGuy Levi 		if (qp->sq.wqe_cnt)
364534f4c955SGuy Levi 			qp->sq.cur_edge = get_sq_edge(&qp->sq, 0);
3646e126ba97SEli Cohen 		qp->db.db[MLX5_RCV_DBR] = 0;
3647e126ba97SEli Cohen 		qp->db.db[MLX5_SND_DBR] = 0;
3648e126ba97SEli Cohen 	}
3649e126ba97SEli Cohen 
3650e126ba97SEli Cohen out:
36511a412fb1SSaeed Mahameed 	kfree(context);
3652e126ba97SEli Cohen 	return err;
3653e126ba97SEli Cohen }
3654e126ba97SEli Cohen 
3655c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt)
3656c32a4f29SMoni Shoua {
3657c32a4f29SMoni Shoua 	if ((mask & req) != req)
3658c32a4f29SMoni Shoua 		return false;
3659c32a4f29SMoni Shoua 
3660c32a4f29SMoni Shoua 	if (mask & ~(req | opt))
3661c32a4f29SMoni Shoua 		return false;
3662c32a4f29SMoni Shoua 
3663c32a4f29SMoni Shoua 	return true;
3664c32a4f29SMoni Shoua }
3665c32a4f29SMoni Shoua 
3666c32a4f29SMoni Shoua /* check valid transition for driver QP types
3667c32a4f29SMoni Shoua  * for now the only QP type that this function supports is DCI
3668c32a4f29SMoni Shoua  */
3669c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state,
3670c32a4f29SMoni Shoua 				enum ib_qp_attr_mask attr_mask)
3671c32a4f29SMoni Shoua {
3672c32a4f29SMoni Shoua 	int req = IB_QP_STATE;
3673c32a4f29SMoni Shoua 	int opt = 0;
3674c32a4f29SMoni Shoua 
367599ed748eSMoni Shoua 	if (new_state == IB_QPS_RESET) {
367699ed748eSMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
367799ed748eSMoni Shoua 	} else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3678c32a4f29SMoni Shoua 		req |= IB_QP_PKEY_INDEX | IB_QP_PORT;
3679c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3680c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) {
3681c32a4f29SMoni Shoua 		opt = IB_QP_PKEY_INDEX | IB_QP_PORT;
3682c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3683c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
3684c32a4f29SMoni Shoua 		req |= IB_QP_PATH_MTU;
36855ec0304cSArtemy Kovalyov 		opt = IB_QP_PKEY_INDEX | IB_QP_AV;
3686c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3687c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) {
3688c32a4f29SMoni Shoua 		req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY |
3689c32a4f29SMoni Shoua 		       IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN;
3690c32a4f29SMoni Shoua 		opt = IB_QP_MIN_RNR_TIMER;
3691c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3692c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) {
3693c32a4f29SMoni Shoua 		opt = IB_QP_MIN_RNR_TIMER;
3694c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3695c32a4f29SMoni Shoua 	} else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) {
3696c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3697c32a4f29SMoni Shoua 	}
3698c32a4f29SMoni Shoua 	return false;
3699c32a4f29SMoni Shoua }
3700c32a4f29SMoni Shoua 
3701776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP
3702776a3906SMoni Shoua  * valid transitions are:
3703776a3906SMoni Shoua  * RESET to INIT: must set access_flags, pkey_index and port
3704776a3906SMoni Shoua  * INIT  to RTR : must set min_rnr_timer, tclass, flow_label,
3705776a3906SMoni Shoua  *			   mtu, gid_index and hop_limit
3706776a3906SMoni Shoua  * Other transitions and attributes are illegal
3707776a3906SMoni Shoua  */
3708776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3709776a3906SMoni Shoua 			      int attr_mask, struct ib_udata *udata)
3710776a3906SMoni Shoua {
3711776a3906SMoni Shoua 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
3712776a3906SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3713776a3906SMoni Shoua 	enum ib_qp_state cur_state, new_state;
3714776a3906SMoni Shoua 	int err = 0;
3715776a3906SMoni Shoua 	int required = IB_QP_STATE;
3716776a3906SMoni Shoua 	void *dctc;
3717776a3906SMoni Shoua 
3718776a3906SMoni Shoua 	if (!(attr_mask & IB_QP_STATE))
3719776a3906SMoni Shoua 		return -EINVAL;
3720776a3906SMoni Shoua 
3721776a3906SMoni Shoua 	cur_state = qp->state;
3722776a3906SMoni Shoua 	new_state = attr->qp_state;
3723776a3906SMoni Shoua 
3724776a3906SMoni Shoua 	dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
3725776a3906SMoni Shoua 	if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3726776a3906SMoni Shoua 		required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT;
3727776a3906SMoni Shoua 		if (!is_valid_mask(attr_mask, required, 0))
3728776a3906SMoni Shoua 			return -EINVAL;
3729776a3906SMoni Shoua 
3730776a3906SMoni Shoua 		if (attr->port_num == 0 ||
3731776a3906SMoni Shoua 		    attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) {
3732776a3906SMoni Shoua 			mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
3733776a3906SMoni Shoua 				    attr->port_num, dev->num_ports);
3734776a3906SMoni Shoua 			return -EINVAL;
3735776a3906SMoni Shoua 		}
3736776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
3737776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rre, 1);
3738776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
3739776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rwe, 1);
3740776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) {
3741a60109dcSYonatan Cohen 			int atomic_mode;
3742a60109dcSYonatan Cohen 
3743a60109dcSYonatan Cohen 			atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT);
3744a60109dcSYonatan Cohen 			if (atomic_mode < 0)
3745776a3906SMoni Shoua 				return -EOPNOTSUPP;
3746a60109dcSYonatan Cohen 
3747a60109dcSYonatan Cohen 			MLX5_SET(dctc, dctc, atomic_mode, atomic_mode);
3748776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rae, 1);
3749776a3906SMoni Shoua 		}
3750776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index);
3751776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, port, attr->port_num);
3752776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id);
3753776a3906SMoni Shoua 
3754776a3906SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
3755776a3906SMoni Shoua 		struct mlx5_ib_modify_qp_resp resp = {};
3756c5ae1954SYishai Hadas 		u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0};
3757776a3906SMoni Shoua 		u32 min_resp_len = offsetof(typeof(resp), dctn) +
3758776a3906SMoni Shoua 				   sizeof(resp.dctn);
3759776a3906SMoni Shoua 
3760776a3906SMoni Shoua 		if (udata->outlen < min_resp_len)
3761776a3906SMoni Shoua 			return -EINVAL;
3762776a3906SMoni Shoua 		resp.response_length = min_resp_len;
3763776a3906SMoni Shoua 
3764776a3906SMoni Shoua 		required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU;
3765776a3906SMoni Shoua 		if (!is_valid_mask(attr_mask, required, 0))
3766776a3906SMoni Shoua 			return -EINVAL;
3767776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer);
3768776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class);
3769776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label);
3770776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, mtu, attr->path_mtu);
3771776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);
3772776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
3773776a3906SMoni Shoua 
3774776a3906SMoni Shoua 		err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in,
3775c5ae1954SYishai Hadas 					   MLX5_ST_SZ_BYTES(create_dct_in), out,
3776c5ae1954SYishai Hadas 					   sizeof(out));
3777776a3906SMoni Shoua 		if (err)
3778776a3906SMoni Shoua 			return err;
3779776a3906SMoni Shoua 		resp.dctn = qp->dct.mdct.mqp.qpn;
3780776a3906SMoni Shoua 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
3781776a3906SMoni Shoua 		if (err) {
3782776a3906SMoni Shoua 			mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct);
3783776a3906SMoni Shoua 			return err;
3784776a3906SMoni Shoua 		}
3785776a3906SMoni Shoua 	} else {
3786776a3906SMoni Shoua 		mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state);
3787776a3906SMoni Shoua 		return -EINVAL;
3788776a3906SMoni Shoua 	}
3789776a3906SMoni Shoua 	if (err)
3790776a3906SMoni Shoua 		qp->state = IB_QPS_ERR;
3791776a3906SMoni Shoua 	else
3792776a3906SMoni Shoua 		qp->state = new_state;
3793776a3906SMoni Shoua 	return err;
3794776a3906SMoni Shoua }
3795776a3906SMoni Shoua 
3796e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3797e126ba97SEli Cohen 		      int attr_mask, struct ib_udata *udata)
3798e126ba97SEli Cohen {
3799e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3800e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
380161147f39SBodong Wang 	struct mlx5_ib_modify_qp ucmd = {};
3802d16e91daSHaggai Eran 	enum ib_qp_type qp_type;
3803e126ba97SEli Cohen 	enum ib_qp_state cur_state, new_state;
380461147f39SBodong Wang 	size_t required_cmd_sz;
3805e126ba97SEli Cohen 	int err = -EINVAL;
3806e126ba97SEli Cohen 	int port;
3807e126ba97SEli Cohen 
380828d61370SYishai Hadas 	if (ibqp->rwq_ind_tbl)
380928d61370SYishai Hadas 		return -ENOSYS;
381028d61370SYishai Hadas 
381161147f39SBodong Wang 	if (udata && udata->inlen) {
381261147f39SBodong Wang 		required_cmd_sz = offsetof(typeof(ucmd), reserved) +
381361147f39SBodong Wang 			sizeof(ucmd.reserved);
381461147f39SBodong Wang 		if (udata->inlen < required_cmd_sz)
381561147f39SBodong Wang 			return -EINVAL;
381661147f39SBodong Wang 
381761147f39SBodong Wang 		if (udata->inlen > sizeof(ucmd) &&
381861147f39SBodong Wang 		    !ib_is_udata_cleared(udata, sizeof(ucmd),
381961147f39SBodong Wang 					 udata->inlen - sizeof(ucmd)))
382061147f39SBodong Wang 			return -EOPNOTSUPP;
382161147f39SBodong Wang 
382261147f39SBodong Wang 		if (ib_copy_from_udata(&ucmd, udata,
382361147f39SBodong Wang 				       min(udata->inlen, sizeof(ucmd))))
382461147f39SBodong Wang 			return -EFAULT;
382561147f39SBodong Wang 
382661147f39SBodong Wang 		if (ucmd.comp_mask ||
382761147f39SBodong Wang 		    memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) ||
382861147f39SBodong Wang 		    memchr_inv(&ucmd.burst_info.reserved, 0,
382961147f39SBodong Wang 			       sizeof(ucmd.burst_info.reserved)))
383061147f39SBodong Wang 			return -EOPNOTSUPP;
383161147f39SBodong Wang 	}
383261147f39SBodong Wang 
3833d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
3834d16e91daSHaggai Eran 		return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask);
3835d16e91daSHaggai Eran 
3836c32a4f29SMoni Shoua 	if (ibqp->qp_type == IB_QPT_DRIVER)
3837c32a4f29SMoni Shoua 		qp_type = qp->qp_sub_type;
3838c32a4f29SMoni Shoua 	else
3839d16e91daSHaggai Eran 		qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ?
3840d16e91daSHaggai Eran 			IB_QPT_GSI : ibqp->qp_type;
3841d16e91daSHaggai Eran 
3842776a3906SMoni Shoua 	if (qp_type == MLX5_IB_QPT_DCT)
3843776a3906SMoni Shoua 		return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata);
3844c32a4f29SMoni Shoua 
3845e126ba97SEli Cohen 	mutex_lock(&qp->mutex);
3846e126ba97SEli Cohen 
3847e126ba97SEli Cohen 	cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state;
3848e126ba97SEli Cohen 	new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
3849e126ba97SEli Cohen 
38502811ba51SAchiad Shochat 	if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) {
38512811ba51SAchiad Shochat 		port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
38522811ba51SAchiad Shochat 	}
38532811ba51SAchiad Shochat 
3854c2e53b2cSYishai Hadas 	if (qp->flags & MLX5_IB_QP_UNDERLAY) {
3855c2e53b2cSYishai Hadas 		if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) {
3856c2e53b2cSYishai Hadas 			mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n",
3857c2e53b2cSYishai Hadas 				    attr_mask);
3858c2e53b2cSYishai Hadas 			goto out;
3859c2e53b2cSYishai Hadas 		}
3860c2e53b2cSYishai Hadas 	} else if (qp_type != MLX5_IB_QPT_REG_UMR &&
3861c32a4f29SMoni Shoua 		   qp_type != MLX5_IB_QPT_DCI &&
3862d31131bbSKamal Heib 		   !ib_modify_qp_is_ok(cur_state, new_state, qp_type,
3863d31131bbSKamal Heib 				       attr_mask)) {
3864158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n",
3865158abf86SHaggai Eran 			    cur_state, new_state, ibqp->qp_type, attr_mask);
3866e126ba97SEli Cohen 		goto out;
3867c32a4f29SMoni Shoua 	} else if (qp_type == MLX5_IB_QPT_DCI &&
3868c32a4f29SMoni Shoua 		   !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) {
3869c32a4f29SMoni Shoua 		mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n",
3870c32a4f29SMoni Shoua 			    cur_state, new_state, qp_type, attr_mask);
3871c32a4f29SMoni Shoua 		goto out;
3872158abf86SHaggai Eran 	}
3873e126ba97SEli Cohen 
3874e126ba97SEli Cohen 	if ((attr_mask & IB_QP_PORT) &&
3875938fe83cSSaeed Mahameed 	    (attr->port_num == 0 ||
3876508562d6SDaniel Jurgens 	     attr->port_num > dev->num_ports)) {
3877158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
3878158abf86SHaggai Eran 			    attr->port_num, dev->num_ports);
3879e126ba97SEli Cohen 		goto out;
3880158abf86SHaggai Eran 	}
3881e126ba97SEli Cohen 
3882e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX) {
3883e126ba97SEli Cohen 		port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
3884938fe83cSSaeed Mahameed 		if (attr->pkey_index >=
3885158abf86SHaggai Eran 		    dev->mdev->port_caps[port - 1].pkey_table_len) {
3886158abf86SHaggai Eran 			mlx5_ib_dbg(dev, "invalid pkey index %d\n",
3887158abf86SHaggai Eran 				    attr->pkey_index);
3888e126ba97SEli Cohen 			goto out;
3889e126ba97SEli Cohen 		}
3890158abf86SHaggai Eran 	}
3891e126ba97SEli Cohen 
3892e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
3893938fe83cSSaeed Mahameed 	    attr->max_rd_atomic >
3894158abf86SHaggai Eran 	    (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) {
3895158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n",
3896158abf86SHaggai Eran 			    attr->max_rd_atomic);
3897e126ba97SEli Cohen 		goto out;
3898158abf86SHaggai Eran 	}
3899e126ba97SEli Cohen 
3900e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
3901938fe83cSSaeed Mahameed 	    attr->max_dest_rd_atomic >
3902158abf86SHaggai Eran 	    (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) {
3903158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n",
3904158abf86SHaggai Eran 			    attr->max_dest_rd_atomic);
3905e126ba97SEli Cohen 		goto out;
3906158abf86SHaggai Eran 	}
3907e126ba97SEli Cohen 
3908e126ba97SEli Cohen 	if (cur_state == new_state && cur_state == IB_QPS_RESET) {
3909e126ba97SEli Cohen 		err = 0;
3910e126ba97SEli Cohen 		goto out;
3911e126ba97SEli Cohen 	}
3912e126ba97SEli Cohen 
391361147f39SBodong Wang 	err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state,
391489944450SShamir Rabinovitch 				  new_state, &ucmd, udata);
3915e126ba97SEli Cohen 
3916e126ba97SEli Cohen out:
3917e126ba97SEli Cohen 	mutex_unlock(&qp->mutex);
3918e126ba97SEli Cohen 	return err;
3919e126ba97SEli Cohen }
3920e126ba97SEli Cohen 
392134f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg,
392234f4c955SGuy Levi 				   u32 wqe_sz, void **cur_edge)
392334f4c955SGuy Levi {
392434f4c955SGuy Levi 	u32 idx;
392534f4c955SGuy Levi 
392634f4c955SGuy Levi 	idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1);
392734f4c955SGuy Levi 	*cur_edge = get_sq_edge(sq, idx);
392834f4c955SGuy Levi 
392934f4c955SGuy Levi 	*seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx);
393034f4c955SGuy Levi }
393134f4c955SGuy Levi 
393234f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the
393334f4c955SGuy Levi  * next nearby edge and get new address translation for current WQE position.
393434f4c955SGuy Levi  * @sq - SQ buffer.
393534f4c955SGuy Levi  * @seg: Current WQE position (16B aligned).
393634f4c955SGuy Levi  * @wqe_sz: Total current WQE size [16B].
393734f4c955SGuy Levi  * @cur_edge: Updated current edge.
393834f4c955SGuy Levi  */
393934f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg,
394034f4c955SGuy Levi 					 u32 wqe_sz, void **cur_edge)
394134f4c955SGuy Levi {
394234f4c955SGuy Levi 	if (likely(*seg != *cur_edge))
394334f4c955SGuy Levi 		return;
394434f4c955SGuy Levi 
394534f4c955SGuy Levi 	_handle_post_send_edge(sq, seg, wqe_sz, cur_edge);
394634f4c955SGuy Levi }
394734f4c955SGuy Levi 
394834f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's
394934f4c955SGuy Levi  * pointers. At the end @seg is aligned to 16B regardless the copied size.
395034f4c955SGuy Levi  * @sq - SQ buffer.
395134f4c955SGuy Levi  * @cur_edge: Updated current edge.
395234f4c955SGuy Levi  * @seg: Current WQE position (16B aligned).
395334f4c955SGuy Levi  * @wqe_sz: Total current WQE size [16B].
395434f4c955SGuy Levi  * @src: Pointer to copy from.
395534f4c955SGuy Levi  * @n: Number of bytes to copy.
395634f4c955SGuy Levi  */
395734f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge,
395834f4c955SGuy Levi 				   void **seg, u32 *wqe_sz, const void *src,
395934f4c955SGuy Levi 				   size_t n)
396034f4c955SGuy Levi {
396134f4c955SGuy Levi 	while (likely(n)) {
396234f4c955SGuy Levi 		size_t leftlen = *cur_edge - *seg;
396334f4c955SGuy Levi 		size_t copysz = min_t(size_t, leftlen, n);
396434f4c955SGuy Levi 		size_t stride;
396534f4c955SGuy Levi 
396634f4c955SGuy Levi 		memcpy(*seg, src, copysz);
396734f4c955SGuy Levi 
396834f4c955SGuy Levi 		n -= copysz;
396934f4c955SGuy Levi 		src += copysz;
397034f4c955SGuy Levi 		stride = !n ? ALIGN(copysz, 16) : copysz;
397134f4c955SGuy Levi 		*seg += stride;
397234f4c955SGuy Levi 		*wqe_sz += stride >> 4;
397334f4c955SGuy Levi 		handle_post_send_edge(sq, seg, *wqe_sz, cur_edge);
397434f4c955SGuy Levi 	}
397534f4c955SGuy Levi }
397634f4c955SGuy Levi 
3977e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq)
3978e126ba97SEli Cohen {
3979e126ba97SEli Cohen 	struct mlx5_ib_cq *cq;
3980e126ba97SEli Cohen 	unsigned cur;
3981e126ba97SEli Cohen 
3982e126ba97SEli Cohen 	cur = wq->head - wq->tail;
3983e126ba97SEli Cohen 	if (likely(cur + nreq < wq->max_post))
3984e126ba97SEli Cohen 		return 0;
3985e126ba97SEli Cohen 
3986e126ba97SEli Cohen 	cq = to_mcq(ib_cq);
3987e126ba97SEli Cohen 	spin_lock(&cq->lock);
3988e126ba97SEli Cohen 	cur = wq->head - wq->tail;
3989e126ba97SEli Cohen 	spin_unlock(&cq->lock);
3990e126ba97SEli Cohen 
3991e126ba97SEli Cohen 	return cur + nreq >= wq->max_post;
3992e126ba97SEli Cohen }
3993e126ba97SEli Cohen 
3994e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg,
3995e126ba97SEli Cohen 					  u64 remote_addr, u32 rkey)
3996e126ba97SEli Cohen {
3997e126ba97SEli Cohen 	rseg->raddr    = cpu_to_be64(remote_addr);
3998e126ba97SEli Cohen 	rseg->rkey     = cpu_to_be32(rkey);
3999e126ba97SEli Cohen 	rseg->reserved = 0;
4000e126ba97SEli Cohen }
4001e126ba97SEli Cohen 
400234f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp,
400334f4c955SGuy Levi 			void **seg, int *size, void **cur_edge)
4004f0313965SErez Shitrit {
400534f4c955SGuy Levi 	struct mlx5_wqe_eth_seg *eseg = *seg;
4006f0313965SErez Shitrit 
4007f0313965SErez Shitrit 	memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg));
4008f0313965SErez Shitrit 
4009f0313965SErez Shitrit 	if (wr->send_flags & IB_SEND_IP_CSUM)
4010f0313965SErez Shitrit 		eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM |
4011f0313965SErez Shitrit 				 MLX5_ETH_WQE_L4_CSUM;
4012f0313965SErez Shitrit 
4013f0313965SErez Shitrit 	if (wr->opcode == IB_WR_LSO) {
4014f0313965SErez Shitrit 		struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr);
401534f4c955SGuy Levi 		size_t left, copysz;
4016f0313965SErez Shitrit 		void *pdata = ud_wr->header;
401734f4c955SGuy Levi 		size_t stride;
4018f0313965SErez Shitrit 
4019f0313965SErez Shitrit 		left = ud_wr->hlen;
4020f0313965SErez Shitrit 		eseg->mss = cpu_to_be16(ud_wr->mss);
40212b31f7aeSSaeed Mahameed 		eseg->inline_hdr.sz = cpu_to_be16(left);
4022f0313965SErez Shitrit 
402334f4c955SGuy Levi 		/* memcpy_send_wqe should get a 16B align address. Hence, we
402434f4c955SGuy Levi 		 * first copy up to the current edge and then, if needed,
402534f4c955SGuy Levi 		 * fall-through to memcpy_send_wqe.
4026f0313965SErez Shitrit 		 */
402734f4c955SGuy Levi 		copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start,
402834f4c955SGuy Levi 			       left);
402934f4c955SGuy Levi 		memcpy(eseg->inline_hdr.start, pdata, copysz);
403034f4c955SGuy Levi 		stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) -
403134f4c955SGuy Levi 			       sizeof(eseg->inline_hdr.start) + copysz, 16);
403234f4c955SGuy Levi 		*size += stride / 16;
403334f4c955SGuy Levi 		*seg += stride;
4034f0313965SErez Shitrit 
403534f4c955SGuy Levi 		if (copysz < left) {
403634f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4037f0313965SErez Shitrit 			left -= copysz;
4038f0313965SErez Shitrit 			pdata += copysz;
403934f4c955SGuy Levi 			memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata,
404034f4c955SGuy Levi 					left);
4041f0313965SErez Shitrit 		}
4042f0313965SErez Shitrit 
404334f4c955SGuy Levi 		return;
404434f4c955SGuy Levi 	}
404534f4c955SGuy Levi 
404634f4c955SGuy Levi 	*seg += sizeof(struct mlx5_wqe_eth_seg);
404734f4c955SGuy Levi 	*size += sizeof(struct mlx5_wqe_eth_seg) / 16;
4048f0313965SErez Shitrit }
4049f0313965SErez Shitrit 
4050e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg,
4051f696bf6dSBart Van Assche 			     const struct ib_send_wr *wr)
4052e126ba97SEli Cohen {
4053e622f2f4SChristoph Hellwig 	memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av));
4054e622f2f4SChristoph Hellwig 	dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV);
4055e622f2f4SChristoph Hellwig 	dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey);
4056e126ba97SEli Cohen }
4057e126ba97SEli Cohen 
4058e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg)
4059e126ba97SEli Cohen {
4060e126ba97SEli Cohen 	dseg->byte_count = cpu_to_be32(sg->length);
4061e126ba97SEli Cohen 	dseg->lkey       = cpu_to_be32(sg->lkey);
4062e126ba97SEli Cohen 	dseg->addr       = cpu_to_be64(sg->addr);
4063e126ba97SEli Cohen }
4064e126ba97SEli Cohen 
406531616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes)
4066e126ba97SEli Cohen {
406731616255SArtemy Kovalyov 	return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) /
406831616255SArtemy Kovalyov 	       MLX5_IB_UMR_OCTOWORD;
4069e126ba97SEli Cohen }
4070e126ba97SEli Cohen 
4071e126ba97SEli Cohen static __be64 frwr_mkey_mask(void)
4072e126ba97SEli Cohen {
4073e126ba97SEli Cohen 	u64 result;
4074e126ba97SEli Cohen 
4075e126ba97SEli Cohen 	result = MLX5_MKEY_MASK_LEN		|
4076e126ba97SEli Cohen 		MLX5_MKEY_MASK_PAGE_SIZE	|
4077e126ba97SEli Cohen 		MLX5_MKEY_MASK_START_ADDR	|
4078e126ba97SEli Cohen 		MLX5_MKEY_MASK_EN_RINVAL	|
4079e126ba97SEli Cohen 		MLX5_MKEY_MASK_KEY		|
4080e126ba97SEli Cohen 		MLX5_MKEY_MASK_LR		|
4081e126ba97SEli Cohen 		MLX5_MKEY_MASK_LW		|
4082e126ba97SEli Cohen 		MLX5_MKEY_MASK_RR		|
4083e126ba97SEli Cohen 		MLX5_MKEY_MASK_RW		|
4084e126ba97SEli Cohen 		MLX5_MKEY_MASK_A		|
4085e126ba97SEli Cohen 		MLX5_MKEY_MASK_SMALL_FENCE	|
4086e126ba97SEli Cohen 		MLX5_MKEY_MASK_FREE;
4087e126ba97SEli Cohen 
4088e126ba97SEli Cohen 	return cpu_to_be64(result);
4089e126ba97SEli Cohen }
4090e126ba97SEli Cohen 
4091e6631814SSagi Grimberg static __be64 sig_mkey_mask(void)
4092e6631814SSagi Grimberg {
4093e6631814SSagi Grimberg 	u64 result;
4094e6631814SSagi Grimberg 
4095e6631814SSagi Grimberg 	result = MLX5_MKEY_MASK_LEN		|
4096e6631814SSagi Grimberg 		MLX5_MKEY_MASK_PAGE_SIZE	|
4097e6631814SSagi Grimberg 		MLX5_MKEY_MASK_START_ADDR	|
4098d5436ba0SSagi Grimberg 		MLX5_MKEY_MASK_EN_SIGERR	|
4099e6631814SSagi Grimberg 		MLX5_MKEY_MASK_EN_RINVAL	|
4100e6631814SSagi Grimberg 		MLX5_MKEY_MASK_KEY		|
4101e6631814SSagi Grimberg 		MLX5_MKEY_MASK_LR		|
4102e6631814SSagi Grimberg 		MLX5_MKEY_MASK_LW		|
4103e6631814SSagi Grimberg 		MLX5_MKEY_MASK_RR		|
4104e6631814SSagi Grimberg 		MLX5_MKEY_MASK_RW		|
4105e6631814SSagi Grimberg 		MLX5_MKEY_MASK_SMALL_FENCE	|
4106e6631814SSagi Grimberg 		MLX5_MKEY_MASK_FREE		|
4107e6631814SSagi Grimberg 		MLX5_MKEY_MASK_BSF_EN;
4108e6631814SSagi Grimberg 
4109e6631814SSagi Grimberg 	return cpu_to_be64(result);
4110e6631814SSagi Grimberg }
4111e6631814SSagi Grimberg 
41128a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr,
4113064e5262SIdan Burstein 			    struct mlx5_ib_mr *mr, bool umr_inline)
41148a187ee5SSagi Grimberg {
411531616255SArtemy Kovalyov 	int size = mr->ndescs * mr->desc_size;
41168a187ee5SSagi Grimberg 
41178a187ee5SSagi Grimberg 	memset(umr, 0, sizeof(*umr));
4118b005d316SSagi Grimberg 
41198a187ee5SSagi Grimberg 	umr->flags = MLX5_UMR_CHECK_NOT_FREE;
4120064e5262SIdan Burstein 	if (umr_inline)
4121064e5262SIdan Burstein 		umr->flags |= MLX5_UMR_INLINE;
412231616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size));
41238a187ee5SSagi Grimberg 	umr->mkey_mask = frwr_mkey_mask();
41248a187ee5SSagi Grimberg }
41258a187ee5SSagi Grimberg 
4126dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr)
4127e126ba97SEli Cohen {
4128e126ba97SEli Cohen 	memset(umr, 0, sizeof(*umr));
4129e126ba97SEli Cohen 	umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE);
41302d221588SMax Gurtovoy 	umr->flags = MLX5_UMR_INLINE;
4131e126ba97SEli Cohen }
4132e126ba97SEli Cohen 
413331616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void)
4134e126ba97SEli Cohen {
4135968e78ddSHaggai Eran 	u64 result;
4136e126ba97SEli Cohen 
413731616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_KEY |
4138e126ba97SEli Cohen 		 MLX5_MKEY_MASK_FREE;
4139968e78ddSHaggai Eran 
4140968e78ddSHaggai Eran 	return cpu_to_be64(result);
4141968e78ddSHaggai Eran }
4142968e78ddSHaggai Eran 
414331616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void)
4144968e78ddSHaggai Eran {
4145968e78ddSHaggai Eran 	u64 result;
4146968e78ddSHaggai Eran 
4147968e78ddSHaggai Eran 	result = MLX5_MKEY_MASK_FREE;
4148968e78ddSHaggai Eran 
4149968e78ddSHaggai Eran 	return cpu_to_be64(result);
4150968e78ddSHaggai Eran }
4151968e78ddSHaggai Eran 
415256e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void)
415356e11d62SNoa Osherovich {
415456e11d62SNoa Osherovich 	u64 result;
415556e11d62SNoa Osherovich 
415656e11d62SNoa Osherovich 	result = MLX5_MKEY_MASK_LEN |
415756e11d62SNoa Osherovich 		 MLX5_MKEY_MASK_PAGE_SIZE |
415831616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_START_ADDR;
415956e11d62SNoa Osherovich 
416056e11d62SNoa Osherovich 	return cpu_to_be64(result);
416156e11d62SNoa Osherovich }
416256e11d62SNoa Osherovich 
416331616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic)
416456e11d62SNoa Osherovich {
416556e11d62SNoa Osherovich 	u64 result;
416656e11d62SNoa Osherovich 
416731616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_LR |
416831616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_LW |
416956e11d62SNoa Osherovich 		 MLX5_MKEY_MASK_RR |
417031616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_RW;
417131616255SArtemy Kovalyov 
417231616255SArtemy Kovalyov 	if (atomic)
417331616255SArtemy Kovalyov 		result |= MLX5_MKEY_MASK_A;
417456e11d62SNoa Osherovich 
417556e11d62SNoa Osherovich 	return cpu_to_be64(result);
417656e11d62SNoa Osherovich }
417756e11d62SNoa Osherovich 
417856e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void)
417956e11d62SNoa Osherovich {
418056e11d62SNoa Osherovich 	u64 result;
418156e11d62SNoa Osherovich 
418231616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_PD;
418356e11d62SNoa Osherovich 
418456e11d62SNoa Osherovich 	return cpu_to_be64(result);
418556e11d62SNoa Osherovich }
418656e11d62SNoa Osherovich 
4187c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask)
4188c8d75a98SMajd Dibbiny {
4189c8d75a98SMajd Dibbiny 	if ((mask & MLX5_MKEY_MASK_PAGE_SIZE &&
4190c8d75a98SMajd Dibbiny 	     MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) ||
4191c8d75a98SMajd Dibbiny 	    (mask & MLX5_MKEY_MASK_A &&
4192c8d75a98SMajd Dibbiny 	     MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled)))
4193c8d75a98SMajd Dibbiny 		return -EPERM;
4194c8d75a98SMajd Dibbiny 	return 0;
4195c8d75a98SMajd Dibbiny }
4196c8d75a98SMajd Dibbiny 
4197c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev,
4198c8d75a98SMajd Dibbiny 			       struct mlx5_wqe_umr_ctrl_seg *umr,
4199f696bf6dSBart Van Assche 			       const struct ib_send_wr *wr, int atomic)
4200968e78ddSHaggai Eran {
4201f696bf6dSBart Van Assche 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
4202968e78ddSHaggai Eran 
4203968e78ddSHaggai Eran 	memset(umr, 0, sizeof(*umr));
4204968e78ddSHaggai Eran 
4205968e78ddSHaggai Eran 	if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE)
4206968e78ddSHaggai Eran 		umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */
4207968e78ddSHaggai Eran 	else
4208968e78ddSHaggai Eran 		umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */
4209968e78ddSHaggai Eran 
421031616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size));
421131616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) {
421231616255SArtemy Kovalyov 		u64 offset = get_xlt_octo(umrwr->offset);
421331616255SArtemy Kovalyov 
421431616255SArtemy Kovalyov 		umr->xlt_offset = cpu_to_be16(offset & 0xffff);
421531616255SArtemy Kovalyov 		umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16);
4216968e78ddSHaggai Eran 		umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN;
4217968e78ddSHaggai Eran 	}
421856e11d62SNoa Osherovich 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION)
421956e11d62SNoa Osherovich 		umr->mkey_mask |= get_umr_update_translation_mask();
422031616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) {
422131616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_update_access_mask(atomic);
422256e11d62SNoa Osherovich 		umr->mkey_mask |= get_umr_update_pd_mask();
4223e126ba97SEli Cohen 	}
422431616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR)
422531616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_enable_mr_mask();
422631616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR)
422731616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_disable_mr_mask();
4228e126ba97SEli Cohen 
4229e126ba97SEli Cohen 	if (!wr->num_sge)
4230968e78ddSHaggai Eran 		umr->flags |= MLX5_UMR_INLINE;
4231c8d75a98SMajd Dibbiny 
4232c8d75a98SMajd Dibbiny 	return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask));
4233e126ba97SEli Cohen }
4234e126ba97SEli Cohen 
4235e126ba97SEli Cohen static u8 get_umr_flags(int acc)
4236e126ba97SEli Cohen {
4237e126ba97SEli Cohen 	return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC       : 0) |
4238e126ba97SEli Cohen 	       (acc & IB_ACCESS_REMOTE_WRITE  ? MLX5_PERM_REMOTE_WRITE : 0) |
4239e126ba97SEli Cohen 	       (acc & IB_ACCESS_REMOTE_READ   ? MLX5_PERM_REMOTE_READ  : 0) |
4240e126ba97SEli Cohen 	       (acc & IB_ACCESS_LOCAL_WRITE   ? MLX5_PERM_LOCAL_WRITE  : 0) |
42412ac45934SSagi Grimberg 		MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN;
4242e126ba97SEli Cohen }
4243e126ba97SEli Cohen 
42448a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg,
42458a187ee5SSagi Grimberg 			     struct mlx5_ib_mr *mr,
42468a187ee5SSagi Grimberg 			     u32 key, int access)
42478a187ee5SSagi Grimberg {
42488a187ee5SSagi Grimberg 	int ndescs = ALIGN(mr->ndescs, 8) >> 1;
42498a187ee5SSagi Grimberg 
42508a187ee5SSagi Grimberg 	memset(seg, 0, sizeof(*seg));
4251b005d316SSagi Grimberg 
4252ec22eb53SSaeed Mahameed 	if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT)
4253b005d316SSagi Grimberg 		seg->log2_page_size = ilog2(mr->ibmr.page_size);
4254ec22eb53SSaeed Mahameed 	else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS)
4255b005d316SSagi Grimberg 		/* KLMs take twice the size of MTTs */
4256b005d316SSagi Grimberg 		ndescs *= 2;
4257b005d316SSagi Grimberg 
4258b005d316SSagi Grimberg 	seg->flags = get_umr_flags(access) | mr->access_mode;
42598a187ee5SSagi Grimberg 	seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00);
42608a187ee5SSagi Grimberg 	seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL);
42618a187ee5SSagi Grimberg 	seg->start_addr = cpu_to_be64(mr->ibmr.iova);
42628a187ee5SSagi Grimberg 	seg->len = cpu_to_be64(mr->ibmr.length);
42638a187ee5SSagi Grimberg 	seg->xlt_oct_size = cpu_to_be32(ndescs);
42648a187ee5SSagi Grimberg }
42658a187ee5SSagi Grimberg 
4266dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg)
4267e126ba97SEli Cohen {
4268e126ba97SEli Cohen 	memset(seg, 0, sizeof(*seg));
4269968e78ddSHaggai Eran 	seg->status = MLX5_MKEY_STATUS_FREE;
4270e126ba97SEli Cohen }
4271e126ba97SEli Cohen 
4272f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg,
4273f696bf6dSBart Van Assche 				 const struct ib_send_wr *wr)
4274e126ba97SEli Cohen {
4275f696bf6dSBart Van Assche 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
4276968e78ddSHaggai Eran 
4277e126ba97SEli Cohen 	memset(seg, 0, sizeof(*seg));
427831616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR)
4279968e78ddSHaggai Eran 		seg->status = MLX5_MKEY_STATUS_FREE;
4280e126ba97SEli Cohen 
4281968e78ddSHaggai Eran 	seg->flags = convert_access(umrwr->access_flags);
428256e11d62SNoa Osherovich 	if (umrwr->pd)
4283968e78ddSHaggai Eran 		seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn);
428431616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION &&
428531616255SArtemy Kovalyov 	    !umrwr->length)
428631616255SArtemy Kovalyov 		seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64);
428731616255SArtemy Kovalyov 
428831616255SArtemy Kovalyov 	seg->start_addr = cpu_to_be64(umrwr->virt_addr);
4289968e78ddSHaggai Eran 	seg->len = cpu_to_be64(umrwr->length);
4290968e78ddSHaggai Eran 	seg->log2_page_size = umrwr->page_shift;
4291746b5583SEli Cohen 	seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 |
4292968e78ddSHaggai Eran 				       mlx5_mkey_variant(umrwr->mkey));
4293e126ba97SEli Cohen }
4294e126ba97SEli Cohen 
42958a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg,
42968a187ee5SSagi Grimberg 			     struct mlx5_ib_mr *mr,
42978a187ee5SSagi Grimberg 			     struct mlx5_ib_pd *pd)
42988a187ee5SSagi Grimberg {
42998a187ee5SSagi Grimberg 	int bcount = mr->desc_size * mr->ndescs;
43008a187ee5SSagi Grimberg 
43018a187ee5SSagi Grimberg 	dseg->addr = cpu_to_be64(mr->desc_map);
43028a187ee5SSagi Grimberg 	dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64));
43038a187ee5SSagi Grimberg 	dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey);
43048a187ee5SSagi Grimberg }
43058a187ee5SSagi Grimberg 
4306f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr)
4307e126ba97SEli Cohen {
4308e126ba97SEli Cohen 	switch (wr->opcode) {
4309e126ba97SEli Cohen 	case IB_WR_SEND_WITH_IMM:
4310e126ba97SEli Cohen 	case IB_WR_RDMA_WRITE_WITH_IMM:
4311e126ba97SEli Cohen 		return wr->ex.imm_data;
4312e126ba97SEli Cohen 
4313e126ba97SEli Cohen 	case IB_WR_SEND_WITH_INV:
4314e126ba97SEli Cohen 		return cpu_to_be32(wr->ex.invalidate_rkey);
4315e126ba97SEli Cohen 
4316e126ba97SEli Cohen 	default:
4317e126ba97SEli Cohen 		return 0;
4318e126ba97SEli Cohen 	}
4319e126ba97SEli Cohen }
4320e126ba97SEli Cohen 
4321e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size)
4322e126ba97SEli Cohen {
4323e126ba97SEli Cohen 	u8 *p = wqe;
4324e126ba97SEli Cohen 	u8 res = 0;
4325e126ba97SEli Cohen 	int i;
4326e126ba97SEli Cohen 
4327e126ba97SEli Cohen 	for (i = 0; i < size; i++)
4328e126ba97SEli Cohen 		res ^= p[i];
4329e126ba97SEli Cohen 
4330e126ba97SEli Cohen 	return ~res;
4331e126ba97SEli Cohen }
4332e126ba97SEli Cohen 
4333e126ba97SEli Cohen static u8 wq_sig(void *wqe)
4334e126ba97SEli Cohen {
4335e126ba97SEli Cohen 	return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4);
4336e126ba97SEli Cohen }
4337e126ba97SEli Cohen 
4338f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr,
433934f4c955SGuy Levi 			    void **wqe, int *wqe_sz, void **cur_edge)
4340e126ba97SEli Cohen {
4341e126ba97SEli Cohen 	struct mlx5_wqe_inline_seg *seg;
434234f4c955SGuy Levi 	size_t offset;
4343e126ba97SEli Cohen 	int inl = 0;
4344e126ba97SEli Cohen 	int i;
4345e126ba97SEli Cohen 
434634f4c955SGuy Levi 	seg = *wqe;
434734f4c955SGuy Levi 	*wqe += sizeof(*seg);
434834f4c955SGuy Levi 	offset = sizeof(*seg);
434934f4c955SGuy Levi 
4350e126ba97SEli Cohen 	for (i = 0; i < wr->num_sge; i++) {
435134f4c955SGuy Levi 		size_t len  = wr->sg_list[i].length;
435234f4c955SGuy Levi 		void *addr = (void *)(unsigned long)(wr->sg_list[i].addr);
435334f4c955SGuy Levi 
4354e126ba97SEli Cohen 		inl += len;
4355e126ba97SEli Cohen 
4356e126ba97SEli Cohen 		if (unlikely(inl > qp->max_inline_data))
4357e126ba97SEli Cohen 			return -ENOMEM;
4358e126ba97SEli Cohen 
435934f4c955SGuy Levi 		while (likely(len)) {
436034f4c955SGuy Levi 			size_t leftlen;
436134f4c955SGuy Levi 			size_t copysz;
436234f4c955SGuy Levi 
436334f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, wqe,
436434f4c955SGuy Levi 					      *wqe_sz + (offset >> 4),
436534f4c955SGuy Levi 					      cur_edge);
436634f4c955SGuy Levi 
436734f4c955SGuy Levi 			leftlen = *cur_edge - *wqe;
436834f4c955SGuy Levi 			copysz = min_t(size_t, leftlen, len);
436934f4c955SGuy Levi 
437034f4c955SGuy Levi 			memcpy(*wqe, addr, copysz);
437134f4c955SGuy Levi 			len -= copysz;
437234f4c955SGuy Levi 			addr += copysz;
437334f4c955SGuy Levi 			*wqe += copysz;
437434f4c955SGuy Levi 			offset += copysz;
4375e126ba97SEli Cohen 		}
4376e126ba97SEli Cohen 	}
4377e126ba97SEli Cohen 
4378e126ba97SEli Cohen 	seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG);
4379e126ba97SEli Cohen 
438034f4c955SGuy Levi 	*wqe_sz +=  ALIGN(inl + sizeof(seg->byte_count), 16) / 16;
4381e126ba97SEli Cohen 
4382e126ba97SEli Cohen 	return 0;
4383e126ba97SEli Cohen }
4384e126ba97SEli Cohen 
4385e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type)
4386e6631814SSagi Grimberg {
4387e6631814SSagi Grimberg 	switch (type) {
4388e6631814SSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4389e6631814SSagi Grimberg 		return MLX5_DIF_SIZE;
4390e6631814SSagi Grimberg 	default:
4391e6631814SSagi Grimberg 		return 0;
4392e6631814SSagi Grimberg 	}
4393e6631814SSagi Grimberg }
4394e6631814SSagi Grimberg 
4395e6631814SSagi Grimberg static u8 bs_selector(int block_size)
4396e6631814SSagi Grimberg {
4397e6631814SSagi Grimberg 	switch (block_size) {
4398e6631814SSagi Grimberg 	case 512:	    return 0x1;
4399e6631814SSagi Grimberg 	case 520:	    return 0x2;
4400e6631814SSagi Grimberg 	case 4096:	    return 0x3;
4401e6631814SSagi Grimberg 	case 4160:	    return 0x4;
4402e6631814SSagi Grimberg 	case 1073741824:    return 0x5;
4403e6631814SSagi Grimberg 	default:	    return 0;
4404e6631814SSagi Grimberg 	}
4405e6631814SSagi Grimberg }
4406e6631814SSagi Grimberg 
440778eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain,
4408142537f4SSagi Grimberg 			      struct mlx5_bsf_inl *inl)
4409e6631814SSagi Grimberg {
4410142537f4SSagi Grimberg 	/* Valid inline section and allow BSF refresh */
4411142537f4SSagi Grimberg 	inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID |
4412142537f4SSagi Grimberg 				       MLX5_BSF_REFRESH_DIF);
4413142537f4SSagi Grimberg 	inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag);
4414142537f4SSagi Grimberg 	inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag);
4415142537f4SSagi Grimberg 	/* repeating block */
4416142537f4SSagi Grimberg 	inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK;
4417142537f4SSagi Grimberg 	inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ?
4418142537f4SSagi Grimberg 			MLX5_DIF_CRC : MLX5_DIF_IPCS;
4419e6631814SSagi Grimberg 
442078eda2bbSSagi Grimberg 	if (domain->sig.dif.ref_remap)
442178eda2bbSSagi Grimberg 		inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG;
4422e6631814SSagi Grimberg 
442378eda2bbSSagi Grimberg 	if (domain->sig.dif.app_escape) {
442478eda2bbSSagi Grimberg 		if (domain->sig.dif.ref_escape)
442578eda2bbSSagi Grimberg 			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE;
442678eda2bbSSagi Grimberg 		else
442778eda2bbSSagi Grimberg 			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE;
4428e6631814SSagi Grimberg 	}
4429e6631814SSagi Grimberg 
443078eda2bbSSagi Grimberg 	inl->dif_app_bitmask_check =
443178eda2bbSSagi Grimberg 		cpu_to_be16(domain->sig.dif.apptag_check_mask);
4432e6631814SSagi Grimberg }
4433e6631814SSagi Grimberg 
4434e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr,
4435e6631814SSagi Grimberg 			struct ib_sig_attrs *sig_attrs,
4436e6631814SSagi Grimberg 			struct mlx5_bsf *bsf, u32 data_size)
4437e6631814SSagi Grimberg {
4438e6631814SSagi Grimberg 	struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig;
4439e6631814SSagi Grimberg 	struct mlx5_bsf_basic *basic = &bsf->basic;
4440e6631814SSagi Grimberg 	struct ib_sig_domain *mem = &sig_attrs->mem;
4441e6631814SSagi Grimberg 	struct ib_sig_domain *wire = &sig_attrs->wire;
4442e6631814SSagi Grimberg 
4443c7f44fbdSSagi Grimberg 	memset(bsf, 0, sizeof(*bsf));
4444e6631814SSagi Grimberg 
4445142537f4SSagi Grimberg 	/* Basic + Extended + Inline */
4446142537f4SSagi Grimberg 	basic->bsf_size_sbs = 1 << 7;
4447e6631814SSagi Grimberg 	/* Input domain check byte mask */
4448e6631814SSagi Grimberg 	basic->check_byte_mask = sig_attrs->check_mask;
444978eda2bbSSagi Grimberg 	basic->raw_data_size = cpu_to_be32(data_size);
445078eda2bbSSagi Grimberg 
445178eda2bbSSagi Grimberg 	/* Memory domain */
445278eda2bbSSagi Grimberg 	switch (sig_attrs->mem.sig_type) {
445378eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
445478eda2bbSSagi Grimberg 		break;
445578eda2bbSSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
445678eda2bbSSagi Grimberg 		basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval);
445778eda2bbSSagi Grimberg 		basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx);
445878eda2bbSSagi Grimberg 		mlx5_fill_inl_bsf(mem, &bsf->m_inl);
445978eda2bbSSagi Grimberg 		break;
446078eda2bbSSagi Grimberg 	default:
446178eda2bbSSagi Grimberg 		return -EINVAL;
446278eda2bbSSagi Grimberg 	}
446378eda2bbSSagi Grimberg 
446478eda2bbSSagi Grimberg 	/* Wire domain */
446578eda2bbSSagi Grimberg 	switch (sig_attrs->wire.sig_type) {
446678eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
446778eda2bbSSagi Grimberg 		break;
446878eda2bbSSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4469e6631814SSagi Grimberg 		if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval &&
447078eda2bbSSagi Grimberg 		    mem->sig_type == wire->sig_type) {
4471e6631814SSagi Grimberg 			/* Same block structure */
4472142537f4SSagi Grimberg 			basic->bsf_size_sbs |= 1 << 4;
4473e6631814SSagi Grimberg 			if (mem->sig.dif.bg_type == wire->sig.dif.bg_type)
4474fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK;
4475c7f44fbdSSagi Grimberg 			if (mem->sig.dif.app_tag == wire->sig.dif.app_tag)
4476fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK;
4477c7f44fbdSSagi Grimberg 			if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag)
4478fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK;
4479e6631814SSagi Grimberg 		} else
4480e6631814SSagi Grimberg 			basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval);
4481e6631814SSagi Grimberg 
4482142537f4SSagi Grimberg 		basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx);
448378eda2bbSSagi Grimberg 		mlx5_fill_inl_bsf(wire, &bsf->w_inl);
4484e6631814SSagi Grimberg 		break;
4485e6631814SSagi Grimberg 	default:
4486e6631814SSagi Grimberg 		return -EINVAL;
4487e6631814SSagi Grimberg 	}
4488e6631814SSagi Grimberg 
4489e6631814SSagi Grimberg 	return 0;
4490e6631814SSagi Grimberg }
4491e6631814SSagi Grimberg 
4492f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr,
449334f4c955SGuy Levi 				struct mlx5_ib_qp *qp, void **seg,
449434f4c955SGuy Levi 				int *size, void **cur_edge)
4495e6631814SSagi Grimberg {
4496e622f2f4SChristoph Hellwig 	struct ib_sig_attrs *sig_attrs = wr->sig_attrs;
4497e622f2f4SChristoph Hellwig 	struct ib_mr *sig_mr = wr->sig_mr;
4498e6631814SSagi Grimberg 	struct mlx5_bsf *bsf;
4499e622f2f4SChristoph Hellwig 	u32 data_len = wr->wr.sg_list->length;
4500e622f2f4SChristoph Hellwig 	u32 data_key = wr->wr.sg_list->lkey;
4501e622f2f4SChristoph Hellwig 	u64 data_va = wr->wr.sg_list->addr;
4502e6631814SSagi Grimberg 	int ret;
4503e6631814SSagi Grimberg 	int wqe_size;
4504e6631814SSagi Grimberg 
4505e622f2f4SChristoph Hellwig 	if (!wr->prot ||
4506e622f2f4SChristoph Hellwig 	    (data_key == wr->prot->lkey &&
4507e622f2f4SChristoph Hellwig 	     data_va == wr->prot->addr &&
4508e622f2f4SChristoph Hellwig 	     data_len == wr->prot->length)) {
4509e6631814SSagi Grimberg 		/**
4510e6631814SSagi Grimberg 		 * Source domain doesn't contain signature information
45115c273b16SSagi Grimberg 		 * or data and protection are interleaved in memory.
4512e6631814SSagi Grimberg 		 * So need construct:
4513e6631814SSagi Grimberg 		 *                  ------------------
4514e6631814SSagi Grimberg 		 *                 |     data_klm     |
4515e6631814SSagi Grimberg 		 *                  ------------------
4516e6631814SSagi Grimberg 		 *                 |       BSF        |
4517e6631814SSagi Grimberg 		 *                  ------------------
4518e6631814SSagi Grimberg 		 **/
4519e6631814SSagi Grimberg 		struct mlx5_klm *data_klm = *seg;
4520e6631814SSagi Grimberg 
4521e6631814SSagi Grimberg 		data_klm->bcount = cpu_to_be32(data_len);
4522e6631814SSagi Grimberg 		data_klm->key = cpu_to_be32(data_key);
4523e6631814SSagi Grimberg 		data_klm->va = cpu_to_be64(data_va);
4524e6631814SSagi Grimberg 		wqe_size = ALIGN(sizeof(*data_klm), 64);
4525e6631814SSagi Grimberg 	} else {
4526e6631814SSagi Grimberg 		/**
4527e6631814SSagi Grimberg 		 * Source domain contains signature information
4528e6631814SSagi Grimberg 		 * So need construct a strided block format:
4529e6631814SSagi Grimberg 		 *               ---------------------------
4530e6631814SSagi Grimberg 		 *              |     stride_block_ctrl     |
4531e6631814SSagi Grimberg 		 *               ---------------------------
4532e6631814SSagi Grimberg 		 *              |          data_klm         |
4533e6631814SSagi Grimberg 		 *               ---------------------------
4534e6631814SSagi Grimberg 		 *              |          prot_klm         |
4535e6631814SSagi Grimberg 		 *               ---------------------------
4536e6631814SSagi Grimberg 		 *              |             BSF           |
4537e6631814SSagi Grimberg 		 *               ---------------------------
4538e6631814SSagi Grimberg 		 **/
4539e6631814SSagi Grimberg 		struct mlx5_stride_block_ctrl_seg *sblock_ctrl;
4540e6631814SSagi Grimberg 		struct mlx5_stride_block_entry *data_sentry;
4541e6631814SSagi Grimberg 		struct mlx5_stride_block_entry *prot_sentry;
4542e622f2f4SChristoph Hellwig 		u32 prot_key = wr->prot->lkey;
4543e622f2f4SChristoph Hellwig 		u64 prot_va = wr->prot->addr;
4544e6631814SSagi Grimberg 		u16 block_size = sig_attrs->mem.sig.dif.pi_interval;
4545e6631814SSagi Grimberg 		int prot_size;
4546e6631814SSagi Grimberg 
4547e6631814SSagi Grimberg 		sblock_ctrl = *seg;
4548e6631814SSagi Grimberg 		data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl);
4549e6631814SSagi Grimberg 		prot_sentry = (void *)data_sentry + sizeof(*data_sentry);
4550e6631814SSagi Grimberg 
4551e6631814SSagi Grimberg 		prot_size = prot_field_size(sig_attrs->mem.sig_type);
4552e6631814SSagi Grimberg 		if (!prot_size) {
4553e6631814SSagi Grimberg 			pr_err("Bad block size given: %u\n", block_size);
4554e6631814SSagi Grimberg 			return -EINVAL;
4555e6631814SSagi Grimberg 		}
4556e6631814SSagi Grimberg 		sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size +
4557e6631814SSagi Grimberg 							    prot_size);
4558e6631814SSagi Grimberg 		sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP);
4559e6631814SSagi Grimberg 		sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size);
4560e6631814SSagi Grimberg 		sblock_ctrl->num_entries = cpu_to_be16(2);
4561e6631814SSagi Grimberg 
4562e6631814SSagi Grimberg 		data_sentry->bcount = cpu_to_be16(block_size);
4563e6631814SSagi Grimberg 		data_sentry->key = cpu_to_be32(data_key);
4564e6631814SSagi Grimberg 		data_sentry->va = cpu_to_be64(data_va);
45655c273b16SSagi Grimberg 		data_sentry->stride = cpu_to_be16(block_size);
45665c273b16SSagi Grimberg 
4567e6631814SSagi Grimberg 		prot_sentry->bcount = cpu_to_be16(prot_size);
4568e6631814SSagi Grimberg 		prot_sentry->key = cpu_to_be32(prot_key);
4569e6631814SSagi Grimberg 		prot_sentry->va = cpu_to_be64(prot_va);
4570e6631814SSagi Grimberg 		prot_sentry->stride = cpu_to_be16(prot_size);
45715c273b16SSagi Grimberg 
4572e6631814SSagi Grimberg 		wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) +
4573e6631814SSagi Grimberg 				 sizeof(*prot_sentry), 64);
4574e6631814SSagi Grimberg 	}
4575e6631814SSagi Grimberg 
4576e6631814SSagi Grimberg 	*seg += wqe_size;
4577e6631814SSagi Grimberg 	*size += wqe_size / 16;
457834f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4579e6631814SSagi Grimberg 
4580e6631814SSagi Grimberg 	bsf = *seg;
4581e6631814SSagi Grimberg 	ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len);
4582e6631814SSagi Grimberg 	if (ret)
4583e6631814SSagi Grimberg 		return -EINVAL;
4584e6631814SSagi Grimberg 
4585e6631814SSagi Grimberg 	*seg += sizeof(*bsf);
4586e6631814SSagi Grimberg 	*size += sizeof(*bsf) / 16;
458734f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4588e6631814SSagi Grimberg 
4589e6631814SSagi Grimberg 	return 0;
4590e6631814SSagi Grimberg }
4591e6631814SSagi Grimberg 
4592e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg,
4593f696bf6dSBart Van Assche 				 const struct ib_sig_handover_wr *wr, u32 size,
4594e6631814SSagi Grimberg 				 u32 length, u32 pdn)
4595e6631814SSagi Grimberg {
4596e622f2f4SChristoph Hellwig 	struct ib_mr *sig_mr = wr->sig_mr;
4597e6631814SSagi Grimberg 	u32 sig_key = sig_mr->rkey;
4598d5436ba0SSagi Grimberg 	u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1;
4599e6631814SSagi Grimberg 
4600e6631814SSagi Grimberg 	memset(seg, 0, sizeof(*seg));
4601e6631814SSagi Grimberg 
4602e622f2f4SChristoph Hellwig 	seg->flags = get_umr_flags(wr->access_flags) |
4603ec22eb53SSaeed Mahameed 				   MLX5_MKC_ACCESS_MODE_KLMS;
4604e6631814SSagi Grimberg 	seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00);
4605d5436ba0SSagi Grimberg 	seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 |
4606e6631814SSagi Grimberg 				    MLX5_MKEY_BSF_EN | pdn);
4607e6631814SSagi Grimberg 	seg->len = cpu_to_be64(length);
460831616255SArtemy Kovalyov 	seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size));
4609e6631814SSagi Grimberg 	seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE);
4610e6631814SSagi Grimberg }
4611e6631814SSagi Grimberg 
4612e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr,
461331616255SArtemy Kovalyov 				u32 size)
4614e6631814SSagi Grimberg {
4615e6631814SSagi Grimberg 	memset(umr, 0, sizeof(*umr));
4616e6631814SSagi Grimberg 
4617e6631814SSagi Grimberg 	umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE;
461831616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size));
4619e6631814SSagi Grimberg 	umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE);
4620e6631814SSagi Grimberg 	umr->mkey_mask = sig_mkey_mask();
4621e6631814SSagi Grimberg }
4622e6631814SSagi Grimberg 
4623e6631814SSagi Grimberg 
4624f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr,
462534f4c955SGuy Levi 			  struct mlx5_ib_qp *qp, void **seg, int *size,
462634f4c955SGuy Levi 			  void **cur_edge)
4627e6631814SSagi Grimberg {
4628f696bf6dSBart Van Assche 	const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr);
4629e622f2f4SChristoph Hellwig 	struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr);
4630e6631814SSagi Grimberg 	u32 pdn = get_pd(qp)->pdn;
463131616255SArtemy Kovalyov 	u32 xlt_size;
4632e6631814SSagi Grimberg 	int region_len, ret;
4633e6631814SSagi Grimberg 
4634e622f2f4SChristoph Hellwig 	if (unlikely(wr->wr.num_sge != 1) ||
4635e622f2f4SChristoph Hellwig 	    unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) ||
4636d5436ba0SSagi Grimberg 	    unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) ||
4637d5436ba0SSagi Grimberg 	    unlikely(!sig_mr->sig->sig_status_checked))
4638e6631814SSagi Grimberg 		return -EINVAL;
4639e6631814SSagi Grimberg 
4640e6631814SSagi Grimberg 	/* length of the protected region, data + protection */
4641e622f2f4SChristoph Hellwig 	region_len = wr->wr.sg_list->length;
4642e622f2f4SChristoph Hellwig 	if (wr->prot &&
4643e622f2f4SChristoph Hellwig 	    (wr->prot->lkey != wr->wr.sg_list->lkey  ||
4644e622f2f4SChristoph Hellwig 	     wr->prot->addr != wr->wr.sg_list->addr  ||
4645e622f2f4SChristoph Hellwig 	     wr->prot->length != wr->wr.sg_list->length))
4646e622f2f4SChristoph Hellwig 		region_len += wr->prot->length;
4647e6631814SSagi Grimberg 
4648e6631814SSagi Grimberg 	/**
4649e6631814SSagi Grimberg 	 * KLM octoword size - if protection was provided
4650e6631814SSagi Grimberg 	 * then we use strided block format (3 octowords),
4651e6631814SSagi Grimberg 	 * else we use single KLM (1 octoword)
4652e6631814SSagi Grimberg 	 **/
465331616255SArtemy Kovalyov 	xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm);
4654e6631814SSagi Grimberg 
465531616255SArtemy Kovalyov 	set_sig_umr_segment(*seg, xlt_size);
4656e6631814SSagi Grimberg 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
4657e6631814SSagi Grimberg 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
465834f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4659e6631814SSagi Grimberg 
466031616255SArtemy Kovalyov 	set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn);
4661e6631814SSagi Grimberg 	*seg += sizeof(struct mlx5_mkey_seg);
4662e6631814SSagi Grimberg 	*size += sizeof(struct mlx5_mkey_seg) / 16;
466334f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4664e6631814SSagi Grimberg 
466534f4c955SGuy Levi 	ret = set_sig_data_segment(wr, qp, seg, size, cur_edge);
4666e6631814SSagi Grimberg 	if (ret)
4667e6631814SSagi Grimberg 		return ret;
4668e6631814SSagi Grimberg 
4669d5436ba0SSagi Grimberg 	sig_mr->sig->sig_status_checked = false;
4670e6631814SSagi Grimberg 	return 0;
4671e6631814SSagi Grimberg }
4672e6631814SSagi Grimberg 
4673e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain,
4674e6631814SSagi Grimberg 		      u32 psv_idx, void **seg, int *size)
4675e6631814SSagi Grimberg {
4676e6631814SSagi Grimberg 	struct mlx5_seg_set_psv *psv_seg = *seg;
4677e6631814SSagi Grimberg 
4678e6631814SSagi Grimberg 	memset(psv_seg, 0, sizeof(*psv_seg));
4679e6631814SSagi Grimberg 	psv_seg->psv_num = cpu_to_be32(psv_idx);
4680e6631814SSagi Grimberg 	switch (domain->sig_type) {
468178eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
468278eda2bbSSagi Grimberg 		break;
4683e6631814SSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4684e6631814SSagi Grimberg 		psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 |
4685e6631814SSagi Grimberg 						     domain->sig.dif.app_tag);
4686e6631814SSagi Grimberg 		psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag);
4687e6631814SSagi Grimberg 		break;
4688e6631814SSagi Grimberg 	default:
468912bbf1eaSLeon Romanovsky 		pr_err("Bad signature type (%d) is given.\n",
469012bbf1eaSLeon Romanovsky 		       domain->sig_type);
469112bbf1eaSLeon Romanovsky 		return -EINVAL;
4692e6631814SSagi Grimberg 	}
4693e6631814SSagi Grimberg 
469478eda2bbSSagi Grimberg 	*seg += sizeof(*psv_seg);
469578eda2bbSSagi Grimberg 	*size += sizeof(*psv_seg) / 16;
469678eda2bbSSagi Grimberg 
4697e6631814SSagi Grimberg 	return 0;
4698e6631814SSagi Grimberg }
4699e6631814SSagi Grimberg 
47008a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp,
4701f696bf6dSBart Van Assche 		      const struct ib_reg_wr *wr,
470234f4c955SGuy Levi 		      void **seg, int *size, void **cur_edge)
47038a187ee5SSagi Grimberg {
47048a187ee5SSagi Grimberg 	struct mlx5_ib_mr *mr = to_mmr(wr->mr);
47058a187ee5SSagi Grimberg 	struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd);
470634f4c955SGuy Levi 	size_t mr_list_size = mr->ndescs * mr->desc_size;
4707064e5262SIdan Burstein 	bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD;
47088a187ee5SSagi Grimberg 
47098a187ee5SSagi Grimberg 	if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) {
47108a187ee5SSagi Grimberg 		mlx5_ib_warn(to_mdev(qp->ibqp.device),
47118a187ee5SSagi Grimberg 			     "Invalid IB_SEND_INLINE send flag\n");
47128a187ee5SSagi Grimberg 		return -EINVAL;
47138a187ee5SSagi Grimberg 	}
47148a187ee5SSagi Grimberg 
4715064e5262SIdan Burstein 	set_reg_umr_seg(*seg, mr, umr_inline);
47168a187ee5SSagi Grimberg 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
47178a187ee5SSagi Grimberg 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
471834f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
47198a187ee5SSagi Grimberg 
47208a187ee5SSagi Grimberg 	set_reg_mkey_seg(*seg, mr, wr->key, wr->access);
47218a187ee5SSagi Grimberg 	*seg += sizeof(struct mlx5_mkey_seg);
47228a187ee5SSagi Grimberg 	*size += sizeof(struct mlx5_mkey_seg) / 16;
472334f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
47248a187ee5SSagi Grimberg 
4725064e5262SIdan Burstein 	if (umr_inline) {
472634f4c955SGuy Levi 		memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs,
472734f4c955SGuy Levi 				mr_list_size);
472834f4c955SGuy Levi 		*size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4);
4729064e5262SIdan Burstein 	} else {
47308a187ee5SSagi Grimberg 		set_reg_data_seg(*seg, mr, pd);
47318a187ee5SSagi Grimberg 		*seg += sizeof(struct mlx5_wqe_data_seg);
47328a187ee5SSagi Grimberg 		*size += (sizeof(struct mlx5_wqe_data_seg) / 16);
4733064e5262SIdan Burstein 	}
47348a187ee5SSagi Grimberg 	return 0;
47358a187ee5SSagi Grimberg }
47368a187ee5SSagi Grimberg 
473734f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size,
473834f4c955SGuy Levi 			void **cur_edge)
4739e126ba97SEli Cohen {
4740dd01e66aSSagi Grimberg 	set_linv_umr_seg(*seg);
4741e126ba97SEli Cohen 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
4742e126ba97SEli Cohen 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
474334f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4744dd01e66aSSagi Grimberg 	set_linv_mkey_seg(*seg);
4745e126ba97SEli Cohen 	*seg += sizeof(struct mlx5_mkey_seg);
4746e126ba97SEli Cohen 	*size += sizeof(struct mlx5_mkey_seg) / 16;
474734f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4748e126ba97SEli Cohen }
4749e126ba97SEli Cohen 
475034f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16)
4751e126ba97SEli Cohen {
4752e126ba97SEli Cohen 	__be32 *p = NULL;
4753e126ba97SEli Cohen 	int i, j;
4754e126ba97SEli Cohen 
475534f4c955SGuy Levi 	pr_debug("dump WQE index %u:\n", idx);
4756e126ba97SEli Cohen 	for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) {
4757e126ba97SEli Cohen 		if ((i & 0xf) == 0) {
47581e5887b7SArtemy Kovalyov 			p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx);
475934f4c955SGuy Levi 			pr_debug("WQBB at %p:\n", (void *)p);
4760e126ba97SEli Cohen 			j = 0;
47611e5887b7SArtemy Kovalyov 			idx = (idx + 1) & (qp->sq.wqe_cnt - 1);
4762e126ba97SEli Cohen 		}
4763e126ba97SEli Cohen 		pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]),
4764e126ba97SEli Cohen 			 be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]),
4765e126ba97SEli Cohen 			 be32_to_cpu(p[j + 3]));
4766e126ba97SEli Cohen 	}
4767e126ba97SEli Cohen }
4768e126ba97SEli Cohen 
47697bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg,
47706e5eadacSSagi Grimberg 		       struct mlx5_wqe_ctrl_seg **ctrl,
477134f4c955SGuy Levi 		       const struct ib_send_wr *wr, unsigned int *idx,
477234f4c955SGuy Levi 		       int *size, void **cur_edge, int nreq,
477334f4c955SGuy Levi 		       bool send_signaled, bool solicited)
47746e5eadacSSagi Grimberg {
4775b2a232d2SLeon Romanovsky 	if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)))
4776b2a232d2SLeon Romanovsky 		return -ENOMEM;
47776e5eadacSSagi Grimberg 
47786e5eadacSSagi Grimberg 	*idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1);
477934f4c955SGuy Levi 	*seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx);
47806e5eadacSSagi Grimberg 	*ctrl = *seg;
47816e5eadacSSagi Grimberg 	*(uint32_t *)(*seg + 8) = 0;
47826e5eadacSSagi Grimberg 	(*ctrl)->imm = send_ieth(wr);
47836e5eadacSSagi Grimberg 	(*ctrl)->fm_ce_se = qp->sq_signal_bits |
47847bb1fafcSBart Van Assche 		(send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) |
47857bb1fafcSBart Van Assche 		(solicited ? MLX5_WQE_CTRL_SOLICITED : 0);
47866e5eadacSSagi Grimberg 
47876e5eadacSSagi Grimberg 	*seg += sizeof(**ctrl);
47886e5eadacSSagi Grimberg 	*size = sizeof(**ctrl) / 16;
478934f4c955SGuy Levi 	*cur_edge = qp->sq.cur_edge;
47906e5eadacSSagi Grimberg 
4791b2a232d2SLeon Romanovsky 	return 0;
47926e5eadacSSagi Grimberg }
47936e5eadacSSagi Grimberg 
47947bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg,
47957bb1fafcSBart Van Assche 		     struct mlx5_wqe_ctrl_seg **ctrl,
47967bb1fafcSBart Van Assche 		     const struct ib_send_wr *wr, unsigned *idx,
479734f4c955SGuy Levi 		     int *size, void **cur_edge, int nreq)
47987bb1fafcSBart Van Assche {
479934f4c955SGuy Levi 	return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq,
48007bb1fafcSBart Van Assche 			   wr->send_flags & IB_SEND_SIGNALED,
48017bb1fafcSBart Van Assche 			   wr->send_flags & IB_SEND_SOLICITED);
48027bb1fafcSBart Van Assche }
48037bb1fafcSBart Van Assche 
48046e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp,
48056e5eadacSSagi Grimberg 		       struct mlx5_wqe_ctrl_seg *ctrl,
480634f4c955SGuy Levi 		       void *seg, u8 size, void *cur_edge,
480734f4c955SGuy Levi 		       unsigned int idx, u64 wr_id, int nreq, u8 fence,
480834f4c955SGuy Levi 		       u32 mlx5_opcode)
48096e5eadacSSagi Grimberg {
48106e5eadacSSagi Grimberg 	u8 opmod = 0;
48116e5eadacSSagi Grimberg 
48126e5eadacSSagi Grimberg 	ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) |
48136e5eadacSSagi Grimberg 					     mlx5_opcode | ((u32)opmod << 24));
481419098df2Smajd@mellanox.com 	ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8));
48156e5eadacSSagi Grimberg 	ctrl->fm_ce_se |= fence;
48166e5eadacSSagi Grimberg 	if (unlikely(qp->wq_sig))
48176e5eadacSSagi Grimberg 		ctrl->signature = wq_sig(ctrl);
48186e5eadacSSagi Grimberg 
48196e5eadacSSagi Grimberg 	qp->sq.wrid[idx] = wr_id;
48206e5eadacSSagi Grimberg 	qp->sq.w_list[idx].opcode = mlx5_opcode;
48216e5eadacSSagi Grimberg 	qp->sq.wqe_head[idx] = qp->sq.head + nreq;
48226e5eadacSSagi Grimberg 	qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB);
48236e5eadacSSagi Grimberg 	qp->sq.w_list[idx].next = qp->sq.cur_post;
482434f4c955SGuy Levi 
482534f4c955SGuy Levi 	/* We save the edge which was possibly updated during the WQE
482634f4c955SGuy Levi 	 * construction, into SQ's cache.
482734f4c955SGuy Levi 	 */
482834f4c955SGuy Levi 	seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB);
482934f4c955SGuy Levi 	qp->sq.cur_edge = (unlikely(seg == cur_edge)) ?
483034f4c955SGuy Levi 			  get_sq_edge(&qp->sq, qp->sq.cur_post &
483134f4c955SGuy Levi 				      (qp->sq.wqe_cnt - 1)) :
483234f4c955SGuy Levi 			  cur_edge;
48336e5eadacSSagi Grimberg }
48346e5eadacSSagi Grimberg 
4835d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
4836d34ac5cdSBart Van Assche 			      const struct ib_send_wr **bad_wr, bool drain)
4837e126ba97SEli Cohen {
4838e126ba97SEli Cohen 	struct mlx5_wqe_ctrl_seg *ctrl = NULL;  /* compiler warning */
4839e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
484089ea94a7SMaor Gottlieb 	struct mlx5_core_dev *mdev = dev->mdev;
4841d16e91daSHaggai Eran 	struct mlx5_ib_qp *qp;
4842e6631814SSagi Grimberg 	struct mlx5_ib_mr *mr;
4843e126ba97SEli Cohen 	struct mlx5_wqe_xrc_seg *xrc;
4844d16e91daSHaggai Eran 	struct mlx5_bf *bf;
484534f4c955SGuy Levi 	void *cur_edge;
4846e126ba97SEli Cohen 	int uninitialized_var(size);
4847e126ba97SEli Cohen 	unsigned long flags;
4848e126ba97SEli Cohen 	unsigned idx;
4849e126ba97SEli Cohen 	int err = 0;
4850e126ba97SEli Cohen 	int num_sge;
4851e126ba97SEli Cohen 	void *seg;
4852e126ba97SEli Cohen 	int nreq;
4853e126ba97SEli Cohen 	int i;
4854e126ba97SEli Cohen 	u8 next_fence = 0;
4855e126ba97SEli Cohen 	u8 fence;
4856e126ba97SEli Cohen 
48576c75520fSParav Pandit 	if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR &&
48586c75520fSParav Pandit 		     !drain)) {
48596c75520fSParav Pandit 		*bad_wr = wr;
48606c75520fSParav Pandit 		return -EIO;
48616c75520fSParav Pandit 	}
48626c75520fSParav Pandit 
4863d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
4864d16e91daSHaggai Eran 		return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr);
4865d16e91daSHaggai Eran 
4866d16e91daSHaggai Eran 	qp = to_mqp(ibqp);
48675fe9dec0SEli Cohen 	bf = &qp->bf;
4868d16e91daSHaggai Eran 
4869e126ba97SEli Cohen 	spin_lock_irqsave(&qp->sq.lock, flags);
4870e126ba97SEli Cohen 
4871e126ba97SEli Cohen 	for (nreq = 0; wr; nreq++, wr = wr->next) {
4872a8f731ebSFabian Frederick 		if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) {
4873e126ba97SEli Cohen 			mlx5_ib_warn(dev, "\n");
4874e126ba97SEli Cohen 			err = -EINVAL;
4875e126ba97SEli Cohen 			*bad_wr = wr;
4876e126ba97SEli Cohen 			goto out;
4877e126ba97SEli Cohen 		}
4878e126ba97SEli Cohen 
4879e126ba97SEli Cohen 		num_sge = wr->num_sge;
4880e126ba97SEli Cohen 		if (unlikely(num_sge > qp->sq.max_gs)) {
4881e126ba97SEli Cohen 			mlx5_ib_warn(dev, "\n");
488224be409bSChuck Lever 			err = -EINVAL;
4883e126ba97SEli Cohen 			*bad_wr = wr;
4884e126ba97SEli Cohen 			goto out;
4885e126ba97SEli Cohen 		}
4886e126ba97SEli Cohen 
488734f4c955SGuy Levi 		err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge,
488834f4c955SGuy Levi 				nreq);
48896e5eadacSSagi Grimberg 		if (err) {
48906e5eadacSSagi Grimberg 			mlx5_ib_warn(dev, "\n");
48916e5eadacSSagi Grimberg 			err = -ENOMEM;
48926e5eadacSSagi Grimberg 			*bad_wr = wr;
48936e5eadacSSagi Grimberg 			goto out;
48946e5eadacSSagi Grimberg 		}
4895e126ba97SEli Cohen 
4896074fca3aSMajd Dibbiny 		if (wr->opcode == IB_WR_REG_MR) {
48976e8484c5SMax Gurtovoy 			fence = dev->umr_fence;
48986e8484c5SMax Gurtovoy 			next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL;
4899074fca3aSMajd Dibbiny 		} else  {
4900074fca3aSMajd Dibbiny 			if (wr->send_flags & IB_SEND_FENCE) {
49016e8484c5SMax Gurtovoy 				if (qp->next_fence)
49026e8484c5SMax Gurtovoy 					fence = MLX5_FENCE_MODE_SMALL_AND_FENCE;
49036e8484c5SMax Gurtovoy 				else
49046e8484c5SMax Gurtovoy 					fence = MLX5_FENCE_MODE_FENCE;
49056e8484c5SMax Gurtovoy 			} else {
49066e8484c5SMax Gurtovoy 				fence = qp->next_fence;
49076e8484c5SMax Gurtovoy 			}
4908074fca3aSMajd Dibbiny 		}
49096e8484c5SMax Gurtovoy 
4910e126ba97SEli Cohen 		switch (ibqp->qp_type) {
4911e126ba97SEli Cohen 		case IB_QPT_XRC_INI:
4912e126ba97SEli Cohen 			xrc = seg;
4913e126ba97SEli Cohen 			seg += sizeof(*xrc);
4914e126ba97SEli Cohen 			size += sizeof(*xrc) / 16;
4915e126ba97SEli Cohen 			/* fall through */
4916e126ba97SEli Cohen 		case IB_QPT_RC:
4917e126ba97SEli Cohen 			switch (wr->opcode) {
4918e126ba97SEli Cohen 			case IB_WR_RDMA_READ:
4919e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE:
4920e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE_WITH_IMM:
4921e622f2f4SChristoph Hellwig 				set_raddr_seg(seg, rdma_wr(wr)->remote_addr,
4922e622f2f4SChristoph Hellwig 					      rdma_wr(wr)->rkey);
4923e126ba97SEli Cohen 				seg += sizeof(struct mlx5_wqe_raddr_seg);
4924e126ba97SEli Cohen 				size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
4925e126ba97SEli Cohen 				break;
4926e126ba97SEli Cohen 
4927e126ba97SEli Cohen 			case IB_WR_ATOMIC_CMP_AND_SWP:
4928e126ba97SEli Cohen 			case IB_WR_ATOMIC_FETCH_AND_ADD:
4929e126ba97SEli Cohen 			case IB_WR_MASKED_ATOMIC_CMP_AND_SWP:
493081bea28fSEli Cohen 				mlx5_ib_warn(dev, "Atomic operations are not supported yet\n");
493181bea28fSEli Cohen 				err = -ENOSYS;
493281bea28fSEli Cohen 				*bad_wr = wr;
493381bea28fSEli Cohen 				goto out;
4934e126ba97SEli Cohen 
4935e126ba97SEli Cohen 			case IB_WR_LOCAL_INV:
4936e126ba97SEli Cohen 				qp->sq.wr_data[idx] = IB_WR_LOCAL_INV;
4937e126ba97SEli Cohen 				ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey);
493834f4c955SGuy Levi 				set_linv_wr(qp, &seg, &size, &cur_edge);
4939e126ba97SEli Cohen 				num_sge = 0;
4940e126ba97SEli Cohen 				break;
4941e126ba97SEli Cohen 
49428a187ee5SSagi Grimberg 			case IB_WR_REG_MR:
49438a187ee5SSagi Grimberg 				qp->sq.wr_data[idx] = IB_WR_REG_MR;
49448a187ee5SSagi Grimberg 				ctrl->imm = cpu_to_be32(reg_wr(wr)->key);
494534f4c955SGuy Levi 				err = set_reg_wr(qp, reg_wr(wr), &seg, &size,
494634f4c955SGuy Levi 						 &cur_edge);
49478a187ee5SSagi Grimberg 				if (err) {
49488a187ee5SSagi Grimberg 					*bad_wr = wr;
49498a187ee5SSagi Grimberg 					goto out;
49508a187ee5SSagi Grimberg 				}
49518a187ee5SSagi Grimberg 				num_sge = 0;
49528a187ee5SSagi Grimberg 				break;
49538a187ee5SSagi Grimberg 
4954e6631814SSagi Grimberg 			case IB_WR_REG_SIG_MR:
4955e6631814SSagi Grimberg 				qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR;
4956e622f2f4SChristoph Hellwig 				mr = to_mmr(sig_handover_wr(wr)->sig_mr);
4957e6631814SSagi Grimberg 
4958e6631814SSagi Grimberg 				ctrl->imm = cpu_to_be32(mr->ibmr.rkey);
495934f4c955SGuy Levi 				err = set_sig_umr_wr(wr, qp, &seg, &size,
496034f4c955SGuy Levi 						     &cur_edge);
4961e6631814SSagi Grimberg 				if (err) {
4962e6631814SSagi Grimberg 					mlx5_ib_warn(dev, "\n");
4963e6631814SSagi Grimberg 					*bad_wr = wr;
4964e6631814SSagi Grimberg 					goto out;
4965e6631814SSagi Grimberg 				}
4966e6631814SSagi Grimberg 
496734f4c955SGuy Levi 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
496834f4c955SGuy Levi 					   wr->wr_id, nreq, fence,
496934f4c955SGuy Levi 					   MLX5_OPCODE_UMR);
4970e6631814SSagi Grimberg 				/*
4971e6631814SSagi Grimberg 				 * SET_PSV WQEs are not signaled and solicited
4972e6631814SSagi Grimberg 				 * on error
4973e6631814SSagi Grimberg 				 */
49747bb1fafcSBart Van Assche 				err = __begin_wqe(qp, &seg, &ctrl, wr, &idx,
497534f4c955SGuy Levi 						  &size, &cur_edge, nreq, false,
497634f4c955SGuy Levi 						  true);
4977e6631814SSagi Grimberg 				if (err) {
4978e6631814SSagi Grimberg 					mlx5_ib_warn(dev, "\n");
4979e6631814SSagi Grimberg 					err = -ENOMEM;
4980e6631814SSagi Grimberg 					*bad_wr = wr;
4981e6631814SSagi Grimberg 					goto out;
4982e6631814SSagi Grimberg 				}
4983e6631814SSagi Grimberg 
4984e622f2f4SChristoph Hellwig 				err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem,
4985e6631814SSagi Grimberg 						 mr->sig->psv_memory.psv_idx, &seg,
4986e6631814SSagi Grimberg 						 &size);
4987e6631814SSagi Grimberg 				if (err) {
4988e6631814SSagi Grimberg 					mlx5_ib_warn(dev, "\n");
4989e6631814SSagi Grimberg 					*bad_wr = wr;
4990e6631814SSagi Grimberg 					goto out;
4991e6631814SSagi Grimberg 				}
4992e6631814SSagi Grimberg 
499334f4c955SGuy Levi 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
499434f4c955SGuy Levi 					   wr->wr_id, nreq, fence,
499534f4c955SGuy Levi 					   MLX5_OPCODE_SET_PSV);
49967bb1fafcSBart Van Assche 				err = __begin_wqe(qp, &seg, &ctrl, wr, &idx,
499734f4c955SGuy Levi 						  &size, &cur_edge, nreq, false,
499834f4c955SGuy Levi 						  true);
4999e6631814SSagi Grimberg 				if (err) {
5000e6631814SSagi Grimberg 					mlx5_ib_warn(dev, "\n");
5001e6631814SSagi Grimberg 					err = -ENOMEM;
5002e6631814SSagi Grimberg 					*bad_wr = wr;
5003e6631814SSagi Grimberg 					goto out;
5004e6631814SSagi Grimberg 				}
5005e6631814SSagi Grimberg 
5006e622f2f4SChristoph Hellwig 				err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire,
5007e6631814SSagi Grimberg 						 mr->sig->psv_wire.psv_idx, &seg,
5008e6631814SSagi Grimberg 						 &size);
5009e6631814SSagi Grimberg 				if (err) {
5010e6631814SSagi Grimberg 					mlx5_ib_warn(dev, "\n");
5011e6631814SSagi Grimberg 					*bad_wr = wr;
5012e6631814SSagi Grimberg 					goto out;
5013e6631814SSagi Grimberg 				}
5014e6631814SSagi Grimberg 
501534f4c955SGuy Levi 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
501634f4c955SGuy Levi 					   wr->wr_id, nreq, fence,
501734f4c955SGuy Levi 					   MLX5_OPCODE_SET_PSV);
50186e8484c5SMax Gurtovoy 				qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL;
5019e6631814SSagi Grimberg 				num_sge = 0;
5020e6631814SSagi Grimberg 				goto skip_psv;
5021e6631814SSagi Grimberg 
5022e126ba97SEli Cohen 			default:
5023e126ba97SEli Cohen 				break;
5024e126ba97SEli Cohen 			}
5025e126ba97SEli Cohen 			break;
5026e126ba97SEli Cohen 
5027e126ba97SEli Cohen 		case IB_QPT_UC:
5028e126ba97SEli Cohen 			switch (wr->opcode) {
5029e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE:
5030e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE_WITH_IMM:
5031e622f2f4SChristoph Hellwig 				set_raddr_seg(seg, rdma_wr(wr)->remote_addr,
5032e622f2f4SChristoph Hellwig 					      rdma_wr(wr)->rkey);
5033e126ba97SEli Cohen 				seg  += sizeof(struct mlx5_wqe_raddr_seg);
5034e126ba97SEli Cohen 				size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
5035e126ba97SEli Cohen 				break;
5036e126ba97SEli Cohen 
5037e126ba97SEli Cohen 			default:
5038e126ba97SEli Cohen 				break;
5039e126ba97SEli Cohen 			}
5040e126ba97SEli Cohen 			break;
5041e126ba97SEli Cohen 
5042e126ba97SEli Cohen 		case IB_QPT_SMI:
50431e0e50b6SMaor Gottlieb 			if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) {
50441e0e50b6SMaor Gottlieb 				mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
50451e0e50b6SMaor Gottlieb 				err = -EPERM;
50461e0e50b6SMaor Gottlieb 				*bad_wr = wr;
50471e0e50b6SMaor Gottlieb 				goto out;
50481e0e50b6SMaor Gottlieb 			}
5049f6b1ee34SBart Van Assche 			/* fall through */
5050d16e91daSHaggai Eran 		case MLX5_IB_QPT_HW_GSI:
5051e126ba97SEli Cohen 			set_datagram_seg(seg, wr);
5052e126ba97SEli Cohen 			seg += sizeof(struct mlx5_wqe_datagram_seg);
5053e126ba97SEli Cohen 			size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
505434f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
505534f4c955SGuy Levi 
5056e126ba97SEli Cohen 			break;
5057f0313965SErez Shitrit 		case IB_QPT_UD:
5058f0313965SErez Shitrit 			set_datagram_seg(seg, wr);
5059f0313965SErez Shitrit 			seg += sizeof(struct mlx5_wqe_datagram_seg);
5060f0313965SErez Shitrit 			size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
506134f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5062f0313965SErez Shitrit 
5063f0313965SErez Shitrit 			/* handle qp that supports ud offload */
5064f0313965SErez Shitrit 			if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) {
5065f0313965SErez Shitrit 				struct mlx5_wqe_eth_pad *pad;
5066f0313965SErez Shitrit 
5067f0313965SErez Shitrit 				pad = seg;
5068f0313965SErez Shitrit 				memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad));
5069f0313965SErez Shitrit 				seg += sizeof(struct mlx5_wqe_eth_pad);
5070f0313965SErez Shitrit 				size += sizeof(struct mlx5_wqe_eth_pad) / 16;
507134f4c955SGuy Levi 				set_eth_seg(wr, qp, &seg, &size, &cur_edge);
507234f4c955SGuy Levi 				handle_post_send_edge(&qp->sq, &seg, size,
507334f4c955SGuy Levi 						      &cur_edge);
5074f0313965SErez Shitrit 			}
5075f0313965SErez Shitrit 			break;
5076e126ba97SEli Cohen 		case MLX5_IB_QPT_REG_UMR:
5077e126ba97SEli Cohen 			if (wr->opcode != MLX5_IB_WR_UMR) {
5078e126ba97SEli Cohen 				err = -EINVAL;
5079e126ba97SEli Cohen 				mlx5_ib_warn(dev, "bad opcode\n");
5080e126ba97SEli Cohen 				goto out;
5081e126ba97SEli Cohen 			}
5082e126ba97SEli Cohen 			qp->sq.wr_data[idx] = MLX5_IB_WR_UMR;
5083e622f2f4SChristoph Hellwig 			ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey);
5084c8d75a98SMajd Dibbiny 			err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic)));
5085c8d75a98SMajd Dibbiny 			if (unlikely(err))
5086c8d75a98SMajd Dibbiny 				goto out;
5087e126ba97SEli Cohen 			seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
5088e126ba97SEli Cohen 			size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
508934f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5090e126ba97SEli Cohen 			set_reg_mkey_segment(seg, wr);
5091e126ba97SEli Cohen 			seg += sizeof(struct mlx5_mkey_seg);
5092e126ba97SEli Cohen 			size += sizeof(struct mlx5_mkey_seg) / 16;
509334f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5094e126ba97SEli Cohen 			break;
5095e126ba97SEli Cohen 
5096e126ba97SEli Cohen 		default:
5097e126ba97SEli Cohen 			break;
5098e126ba97SEli Cohen 		}
5099e126ba97SEli Cohen 
5100e126ba97SEli Cohen 		if (wr->send_flags & IB_SEND_INLINE && num_sge) {
510134f4c955SGuy Levi 			err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge);
5102e126ba97SEli Cohen 			if (unlikely(err)) {
5103e126ba97SEli Cohen 				mlx5_ib_warn(dev, "\n");
5104e126ba97SEli Cohen 				*bad_wr = wr;
5105e126ba97SEli Cohen 				goto out;
5106e126ba97SEli Cohen 			}
5107e126ba97SEli Cohen 		} else {
5108e126ba97SEli Cohen 			for (i = 0; i < num_sge; i++) {
510934f4c955SGuy Levi 				handle_post_send_edge(&qp->sq, &seg, size,
511034f4c955SGuy Levi 						      &cur_edge);
5111e126ba97SEli Cohen 				if (likely(wr->sg_list[i].length)) {
511234f4c955SGuy Levi 					set_data_ptr_seg
511334f4c955SGuy Levi 					((struct mlx5_wqe_data_seg *)seg,
511434f4c955SGuy Levi 					 wr->sg_list + i);
5115e126ba97SEli Cohen 					size += sizeof(struct mlx5_wqe_data_seg) / 16;
511634f4c955SGuy Levi 					seg += sizeof(struct mlx5_wqe_data_seg);
5117e126ba97SEli Cohen 				}
5118e126ba97SEli Cohen 			}
5119e126ba97SEli Cohen 		}
5120e126ba97SEli Cohen 
51216e8484c5SMax Gurtovoy 		qp->next_fence = next_fence;
512234f4c955SGuy Levi 		finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq,
512334f4c955SGuy Levi 			   fence, mlx5_ib_opcode[wr->opcode]);
5124e6631814SSagi Grimberg skip_psv:
5125e126ba97SEli Cohen 		if (0)
5126e126ba97SEli Cohen 			dump_wqe(qp, idx, size);
5127e126ba97SEli Cohen 	}
5128e126ba97SEli Cohen 
5129e126ba97SEli Cohen out:
5130e126ba97SEli Cohen 	if (likely(nreq)) {
5131e126ba97SEli Cohen 		qp->sq.head += nreq;
5132e126ba97SEli Cohen 
5133e126ba97SEli Cohen 		/* Make sure that descriptors are written before
5134e126ba97SEli Cohen 		 * updating doorbell record and ringing the doorbell
5135e126ba97SEli Cohen 		 */
5136e126ba97SEli Cohen 		wmb();
5137e126ba97SEli Cohen 
5138e126ba97SEli Cohen 		qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post);
5139e126ba97SEli Cohen 
5140ada388f7SEli Cohen 		/* Make sure doorbell record is visible to the HCA before
5141ada388f7SEli Cohen 		 * we hit doorbell */
5142ada388f7SEli Cohen 		wmb();
5143ada388f7SEli Cohen 
51445fe9dec0SEli Cohen 		/* currently we support only regular doorbells */
5145bbf29f61SMaxim Mikityanskiy 		mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset);
5146e126ba97SEli Cohen 		/* Make sure doorbells don't leak out of SQ spinlock
5147e126ba97SEli Cohen 		 * and reach the HCA out of order.
5148e126ba97SEli Cohen 		 */
5149e126ba97SEli Cohen 		mmiowb();
5150e126ba97SEli Cohen 		bf->offset ^= bf->buf_size;
5151e126ba97SEli Cohen 	}
5152e126ba97SEli Cohen 
5153e126ba97SEli Cohen 	spin_unlock_irqrestore(&qp->sq.lock, flags);
5154e126ba97SEli Cohen 
5155e126ba97SEli Cohen 	return err;
5156e126ba97SEli Cohen }
5157e126ba97SEli Cohen 
5158d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
5159d34ac5cdSBart Van Assche 		      const struct ib_send_wr **bad_wr)
5160d0e84c0aSYishai Hadas {
5161d0e84c0aSYishai Hadas 	return _mlx5_ib_post_send(ibqp, wr, bad_wr, false);
5162d0e84c0aSYishai Hadas }
5163d0e84c0aSYishai Hadas 
5164e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size)
5165e126ba97SEli Cohen {
5166e126ba97SEli Cohen 	sig->signature = calc_sig(sig, size);
5167e126ba97SEli Cohen }
5168e126ba97SEli Cohen 
5169d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
5170d34ac5cdSBart Van Assche 		      const struct ib_recv_wr **bad_wr, bool drain)
5171e126ba97SEli Cohen {
5172e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
5173e126ba97SEli Cohen 	struct mlx5_wqe_data_seg *scat;
5174e126ba97SEli Cohen 	struct mlx5_rwqe_sig *sig;
517589ea94a7SMaor Gottlieb 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
517689ea94a7SMaor Gottlieb 	struct mlx5_core_dev *mdev = dev->mdev;
5177e126ba97SEli Cohen 	unsigned long flags;
5178e126ba97SEli Cohen 	int err = 0;
5179e126ba97SEli Cohen 	int nreq;
5180e126ba97SEli Cohen 	int ind;
5181e126ba97SEli Cohen 	int i;
5182e126ba97SEli Cohen 
51836c75520fSParav Pandit 	if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR &&
51846c75520fSParav Pandit 		     !drain)) {
51856c75520fSParav Pandit 		*bad_wr = wr;
51866c75520fSParav Pandit 		return -EIO;
51876c75520fSParav Pandit 	}
51886c75520fSParav Pandit 
5189d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5190d16e91daSHaggai Eran 		return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr);
5191d16e91daSHaggai Eran 
5192e126ba97SEli Cohen 	spin_lock_irqsave(&qp->rq.lock, flags);
5193e126ba97SEli Cohen 
5194e126ba97SEli Cohen 	ind = qp->rq.head & (qp->rq.wqe_cnt - 1);
5195e126ba97SEli Cohen 
5196e126ba97SEli Cohen 	for (nreq = 0; wr; nreq++, wr = wr->next) {
5197e126ba97SEli Cohen 		if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
5198e126ba97SEli Cohen 			err = -ENOMEM;
5199e126ba97SEli Cohen 			*bad_wr = wr;
5200e126ba97SEli Cohen 			goto out;
5201e126ba97SEli Cohen 		}
5202e126ba97SEli Cohen 
5203e126ba97SEli Cohen 		if (unlikely(wr->num_sge > qp->rq.max_gs)) {
5204e126ba97SEli Cohen 			err = -EINVAL;
5205e126ba97SEli Cohen 			*bad_wr = wr;
5206e126ba97SEli Cohen 			goto out;
5207e126ba97SEli Cohen 		}
5208e126ba97SEli Cohen 
520934f4c955SGuy Levi 		scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind);
5210e126ba97SEli Cohen 		if (qp->wq_sig)
5211e126ba97SEli Cohen 			scat++;
5212e126ba97SEli Cohen 
5213e126ba97SEli Cohen 		for (i = 0; i < wr->num_sge; i++)
5214e126ba97SEli Cohen 			set_data_ptr_seg(scat + i, wr->sg_list + i);
5215e126ba97SEli Cohen 
5216e126ba97SEli Cohen 		if (i < qp->rq.max_gs) {
5217e126ba97SEli Cohen 			scat[i].byte_count = 0;
5218e126ba97SEli Cohen 			scat[i].lkey       = cpu_to_be32(MLX5_INVALID_LKEY);
5219e126ba97SEli Cohen 			scat[i].addr       = 0;
5220e126ba97SEli Cohen 		}
5221e126ba97SEli Cohen 
5222e126ba97SEli Cohen 		if (qp->wq_sig) {
5223e126ba97SEli Cohen 			sig = (struct mlx5_rwqe_sig *)scat;
5224e126ba97SEli Cohen 			set_sig_seg(sig, (qp->rq.max_gs + 1) << 2);
5225e126ba97SEli Cohen 		}
5226e126ba97SEli Cohen 
5227e126ba97SEli Cohen 		qp->rq.wrid[ind] = wr->wr_id;
5228e126ba97SEli Cohen 
5229e126ba97SEli Cohen 		ind = (ind + 1) & (qp->rq.wqe_cnt - 1);
5230e126ba97SEli Cohen 	}
5231e126ba97SEli Cohen 
5232e126ba97SEli Cohen out:
5233e126ba97SEli Cohen 	if (likely(nreq)) {
5234e126ba97SEli Cohen 		qp->rq.head += nreq;
5235e126ba97SEli Cohen 
5236e126ba97SEli Cohen 		/* Make sure that descriptors are written before
5237e126ba97SEli Cohen 		 * doorbell record.
5238e126ba97SEli Cohen 		 */
5239e126ba97SEli Cohen 		wmb();
5240e126ba97SEli Cohen 
5241e126ba97SEli Cohen 		*qp->db.db = cpu_to_be32(qp->rq.head & 0xffff);
5242e126ba97SEli Cohen 	}
5243e126ba97SEli Cohen 
5244e126ba97SEli Cohen 	spin_unlock_irqrestore(&qp->rq.lock, flags);
5245e126ba97SEli Cohen 
5246e126ba97SEli Cohen 	return err;
5247e126ba97SEli Cohen }
5248e126ba97SEli Cohen 
5249d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
5250d34ac5cdSBart Van Assche 		      const struct ib_recv_wr **bad_wr)
5251d0e84c0aSYishai Hadas {
5252d0e84c0aSYishai Hadas 	return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false);
5253d0e84c0aSYishai Hadas }
5254d0e84c0aSYishai Hadas 
5255e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state)
5256e126ba97SEli Cohen {
5257e126ba97SEli Cohen 	switch (mlx5_state) {
5258e126ba97SEli Cohen 	case MLX5_QP_STATE_RST:      return IB_QPS_RESET;
5259e126ba97SEli Cohen 	case MLX5_QP_STATE_INIT:     return IB_QPS_INIT;
5260e126ba97SEli Cohen 	case MLX5_QP_STATE_RTR:      return IB_QPS_RTR;
5261e126ba97SEli Cohen 	case MLX5_QP_STATE_RTS:      return IB_QPS_RTS;
5262e126ba97SEli Cohen 	case MLX5_QP_STATE_SQ_DRAINING:
5263e126ba97SEli Cohen 	case MLX5_QP_STATE_SQD:      return IB_QPS_SQD;
5264e126ba97SEli Cohen 	case MLX5_QP_STATE_SQER:     return IB_QPS_SQE;
5265e126ba97SEli Cohen 	case MLX5_QP_STATE_ERR:      return IB_QPS_ERR;
5266e126ba97SEli Cohen 	default:		     return -1;
5267e126ba97SEli Cohen 	}
5268e126ba97SEli Cohen }
5269e126ba97SEli Cohen 
5270e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state)
5271e126ba97SEli Cohen {
5272e126ba97SEli Cohen 	switch (mlx5_mig_state) {
5273e126ba97SEli Cohen 	case MLX5_QP_PM_ARMED:		return IB_MIG_ARMED;
5274e126ba97SEli Cohen 	case MLX5_QP_PM_REARM:		return IB_MIG_REARM;
5275e126ba97SEli Cohen 	case MLX5_QP_PM_MIGRATED:	return IB_MIG_MIGRATED;
5276e126ba97SEli Cohen 	default: return -1;
5277e126ba97SEli Cohen 	}
5278e126ba97SEli Cohen }
5279e126ba97SEli Cohen 
5280e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags)
5281e126ba97SEli Cohen {
5282e126ba97SEli Cohen 	int ib_flags = 0;
5283e126ba97SEli Cohen 
5284e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RRE)
5285e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_READ;
5286e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RWE)
5287e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_WRITE;
5288e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RAE)
5289e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_ATOMIC;
5290e126ba97SEli Cohen 
5291e126ba97SEli Cohen 	return ib_flags;
5292e126ba97SEli Cohen }
5293e126ba97SEli Cohen 
529438349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev,
5295d8966fcdSDasaratharaman Chandramouli 			    struct rdma_ah_attr *ah_attr,
5296e126ba97SEli Cohen 			    struct mlx5_qp_path *path)
5297e126ba97SEli Cohen {
5298e126ba97SEli Cohen 
5299d8966fcdSDasaratharaman Chandramouli 	memset(ah_attr, 0, sizeof(*ah_attr));
5300e126ba97SEli Cohen 
5301e7996a9aSJason Gunthorpe 	if (!path->port || path->port > ibdev->num_ports)
5302e126ba97SEli Cohen 		return;
5303e126ba97SEli Cohen 
5304ae59c3f0SLeon Romanovsky 	ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port);
5305ae59c3f0SLeon Romanovsky 
5306d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_port_num(ah_attr, path->port);
5307d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf);
5308e126ba97SEli Cohen 
5309d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid));
5310d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);
5311d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_static_rate(ah_attr,
5312d8966fcdSDasaratharaman Chandramouli 				path->static_rate ? path->static_rate - 5 : 0);
5313d8966fcdSDasaratharaman Chandramouli 	if (path->grh_mlid & (1 << 7)) {
5314d8966fcdSDasaratharaman Chandramouli 		u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);
5315d8966fcdSDasaratharaman Chandramouli 
5316d8966fcdSDasaratharaman Chandramouli 		rdma_ah_set_grh(ah_attr, NULL,
5317d8966fcdSDasaratharaman Chandramouli 				tc_fl & 0xfffff,
5318d8966fcdSDasaratharaman Chandramouli 				path->mgid_index,
5319d8966fcdSDasaratharaman Chandramouli 				path->hop_limit,
5320d8966fcdSDasaratharaman Chandramouli 				(tc_fl >> 20) & 0xff);
5321d8966fcdSDasaratharaman Chandramouli 		rdma_ah_set_dgid_raw(ah_attr, path->rgid);
5322e126ba97SEli Cohen 	}
5323e126ba97SEli Cohen }
5324e126ba97SEli Cohen 
53256d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev,
53266d2f89dfSmajd@mellanox.com 					struct mlx5_ib_sq *sq,
53276d2f89dfSmajd@mellanox.com 					u8 *sq_state)
5328e126ba97SEli Cohen {
53296d2f89dfSmajd@mellanox.com 	int err;
53306d2f89dfSmajd@mellanox.com 
533128160771SEran Ben Elisha 	err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state);
53326d2f89dfSmajd@mellanox.com 	if (err)
53336d2f89dfSmajd@mellanox.com 		goto out;
53346d2f89dfSmajd@mellanox.com 	sq->state = *sq_state;
53356d2f89dfSmajd@mellanox.com 
53366d2f89dfSmajd@mellanox.com out:
53376d2f89dfSmajd@mellanox.com 	return err;
53386d2f89dfSmajd@mellanox.com }
53396d2f89dfSmajd@mellanox.com 
53406d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev,
53416d2f89dfSmajd@mellanox.com 					struct mlx5_ib_rq *rq,
53426d2f89dfSmajd@mellanox.com 					u8 *rq_state)
53436d2f89dfSmajd@mellanox.com {
53446d2f89dfSmajd@mellanox.com 	void *out;
53456d2f89dfSmajd@mellanox.com 	void *rqc;
53466d2f89dfSmajd@mellanox.com 	int inlen;
53476d2f89dfSmajd@mellanox.com 	int err;
53486d2f89dfSmajd@mellanox.com 
53496d2f89dfSmajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(query_rq_out);
53501b9a07eeSLeon Romanovsky 	out = kvzalloc(inlen, GFP_KERNEL);
53516d2f89dfSmajd@mellanox.com 	if (!out)
53526d2f89dfSmajd@mellanox.com 		return -ENOMEM;
53536d2f89dfSmajd@mellanox.com 
53546d2f89dfSmajd@mellanox.com 	err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out);
53556d2f89dfSmajd@mellanox.com 	if (err)
53566d2f89dfSmajd@mellanox.com 		goto out;
53576d2f89dfSmajd@mellanox.com 
53586d2f89dfSmajd@mellanox.com 	rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context);
53596d2f89dfSmajd@mellanox.com 	*rq_state = MLX5_GET(rqc, rqc, state);
53606d2f89dfSmajd@mellanox.com 	rq->state = *rq_state;
53616d2f89dfSmajd@mellanox.com 
53626d2f89dfSmajd@mellanox.com out:
53636d2f89dfSmajd@mellanox.com 	kvfree(out);
53646d2f89dfSmajd@mellanox.com 	return err;
53656d2f89dfSmajd@mellanox.com }
53666d2f89dfSmajd@mellanox.com 
53676d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state,
53686d2f89dfSmajd@mellanox.com 				  struct mlx5_ib_qp *qp, u8 *qp_state)
53696d2f89dfSmajd@mellanox.com {
53706d2f89dfSmajd@mellanox.com 	static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = {
53716d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_RST] = {
53726d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]	= IB_QPS_RESET,
53736d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE_BAD,
53746d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= MLX5_QP_STATE_BAD,
53756d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= IB_QPS_RESET,
53766d2f89dfSmajd@mellanox.com 		},
53776d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_RDY] = {
53786d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]	= MLX5_QP_STATE_BAD,
53796d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE,
53806d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= IB_QPS_SQE,
53816d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= MLX5_QP_STATE,
53826d2f89dfSmajd@mellanox.com 		},
53836d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_ERR] = {
53846d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]    = MLX5_QP_STATE_BAD,
53856d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE_BAD,
53866d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= IB_QPS_ERR,
53876d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= IB_QPS_ERR,
53886d2f89dfSmajd@mellanox.com 		},
53896d2f89dfSmajd@mellanox.com 		[MLX5_RQ_STATE_NA] = {
53906d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]    = IB_QPS_RESET,
53916d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE,
53926d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= MLX5_QP_STATE,
53936d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= MLX5_QP_STATE_BAD,
53946d2f89dfSmajd@mellanox.com 		},
53956d2f89dfSmajd@mellanox.com 	};
53966d2f89dfSmajd@mellanox.com 
53976d2f89dfSmajd@mellanox.com 	*qp_state = sqrq_trans[rq_state][sq_state];
53986d2f89dfSmajd@mellanox.com 
53996d2f89dfSmajd@mellanox.com 	if (*qp_state == MLX5_QP_STATE_BAD) {
54006d2f89dfSmajd@mellanox.com 		WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x",
54016d2f89dfSmajd@mellanox.com 		     qp->raw_packet_qp.sq.base.mqp.qpn, sq_state,
54026d2f89dfSmajd@mellanox.com 		     qp->raw_packet_qp.rq.base.mqp.qpn, rq_state);
54036d2f89dfSmajd@mellanox.com 		return -EINVAL;
54046d2f89dfSmajd@mellanox.com 	}
54056d2f89dfSmajd@mellanox.com 
54066d2f89dfSmajd@mellanox.com 	if (*qp_state == MLX5_QP_STATE)
54076d2f89dfSmajd@mellanox.com 		*qp_state = qp->state;
54086d2f89dfSmajd@mellanox.com 
54096d2f89dfSmajd@mellanox.com 	return 0;
54106d2f89dfSmajd@mellanox.com }
54116d2f89dfSmajd@mellanox.com 
54126d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev,
54136d2f89dfSmajd@mellanox.com 				     struct mlx5_ib_qp *qp,
54146d2f89dfSmajd@mellanox.com 				     u8 *raw_packet_qp_state)
54156d2f89dfSmajd@mellanox.com {
54166d2f89dfSmajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
54176d2f89dfSmajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
54186d2f89dfSmajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
54196d2f89dfSmajd@mellanox.com 	int err;
54206d2f89dfSmajd@mellanox.com 	u8 sq_state = MLX5_SQ_STATE_NA;
54216d2f89dfSmajd@mellanox.com 	u8 rq_state = MLX5_RQ_STATE_NA;
54226d2f89dfSmajd@mellanox.com 
54236d2f89dfSmajd@mellanox.com 	if (qp->sq.wqe_cnt) {
54246d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_sq_state(dev, sq, &sq_state);
54256d2f89dfSmajd@mellanox.com 		if (err)
54266d2f89dfSmajd@mellanox.com 			return err;
54276d2f89dfSmajd@mellanox.com 	}
54286d2f89dfSmajd@mellanox.com 
54296d2f89dfSmajd@mellanox.com 	if (qp->rq.wqe_cnt) {
54306d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_rq_state(dev, rq, &rq_state);
54316d2f89dfSmajd@mellanox.com 		if (err)
54326d2f89dfSmajd@mellanox.com 			return err;
54336d2f89dfSmajd@mellanox.com 	}
54346d2f89dfSmajd@mellanox.com 
54356d2f89dfSmajd@mellanox.com 	return sqrq_state_to_qp_state(sq_state, rq_state, qp,
54366d2f89dfSmajd@mellanox.com 				      raw_packet_qp_state);
54376d2f89dfSmajd@mellanox.com }
54386d2f89dfSmajd@mellanox.com 
54396d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
54406d2f89dfSmajd@mellanox.com 			 struct ib_qp_attr *qp_attr)
54416d2f89dfSmajd@mellanox.com {
544209a7d9ecSSaeed Mahameed 	int outlen = MLX5_ST_SZ_BYTES(query_qp_out);
5443e126ba97SEli Cohen 	struct mlx5_qp_context *context;
5444e126ba97SEli Cohen 	int mlx5_state;
544509a7d9ecSSaeed Mahameed 	u32 *outb;
5446e126ba97SEli Cohen 	int err = 0;
5447e126ba97SEli Cohen 
544809a7d9ecSSaeed Mahameed 	outb = kzalloc(outlen, GFP_KERNEL);
54496d2f89dfSmajd@mellanox.com 	if (!outb)
54506d2f89dfSmajd@mellanox.com 		return -ENOMEM;
54516d2f89dfSmajd@mellanox.com 
545219098df2Smajd@mellanox.com 	err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb,
545309a7d9ecSSaeed Mahameed 				 outlen);
5454e126ba97SEli Cohen 	if (err)
54556d2f89dfSmajd@mellanox.com 		goto out;
5456e126ba97SEli Cohen 
545709a7d9ecSSaeed Mahameed 	/* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */
545809a7d9ecSSaeed Mahameed 	context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc);
545909a7d9ecSSaeed Mahameed 
5460e126ba97SEli Cohen 	mlx5_state = be32_to_cpu(context->flags) >> 28;
5461e126ba97SEli Cohen 
5462e126ba97SEli Cohen 	qp->state		     = to_ib_qp_state(mlx5_state);
5463e126ba97SEli Cohen 	qp_attr->path_mtu	     = context->mtu_msgmax >> 5;
5464e126ba97SEli Cohen 	qp_attr->path_mig_state	     =
5465e126ba97SEli Cohen 		to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3);
5466e126ba97SEli Cohen 	qp_attr->qkey		     = be32_to_cpu(context->qkey);
5467e126ba97SEli Cohen 	qp_attr->rq_psn		     = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff;
5468e126ba97SEli Cohen 	qp_attr->sq_psn		     = be32_to_cpu(context->next_send_psn) & 0xffffff;
5469e126ba97SEli Cohen 	qp_attr->dest_qp_num	     = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff;
5470e126ba97SEli Cohen 	qp_attr->qp_access_flags     =
5471e126ba97SEli Cohen 		to_ib_qp_access_flags(be32_to_cpu(context->params2));
5472e126ba97SEli Cohen 
5473e126ba97SEli Cohen 	if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
547438349389SDasaratharaman Chandramouli 		to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path);
547538349389SDasaratharaman Chandramouli 		to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path);
5476d3ae2bdeSNoa Osherovich 		qp_attr->alt_pkey_index =
5477d3ae2bdeSNoa Osherovich 			be16_to_cpu(context->alt_path.pkey_index);
5478d8966fcdSDasaratharaman Chandramouli 		qp_attr->alt_port_num	=
5479d8966fcdSDasaratharaman Chandramouli 			rdma_ah_get_port_num(&qp_attr->alt_ah_attr);
5480e126ba97SEli Cohen 	}
5481e126ba97SEli Cohen 
5482d3ae2bdeSNoa Osherovich 	qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index);
5483e126ba97SEli Cohen 	qp_attr->port_num = context->pri_path.port;
5484e126ba97SEli Cohen 
5485e126ba97SEli Cohen 	/* qp_attr->en_sqd_async_notify is only applicable in modify qp */
5486e126ba97SEli Cohen 	qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING;
5487e126ba97SEli Cohen 
5488e126ba97SEli Cohen 	qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7);
5489e126ba97SEli Cohen 
5490e126ba97SEli Cohen 	qp_attr->max_dest_rd_atomic =
5491e126ba97SEli Cohen 		1 << ((be32_to_cpu(context->params2) >> 21) & 0x7);
5492e126ba97SEli Cohen 	qp_attr->min_rnr_timer	    =
5493e126ba97SEli Cohen 		(be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f;
5494e126ba97SEli Cohen 	qp_attr->timeout	    = context->pri_path.ackto_lt >> 3;
5495e126ba97SEli Cohen 	qp_attr->retry_cnt	    = (be32_to_cpu(context->params1) >> 16) & 0x7;
5496e126ba97SEli Cohen 	qp_attr->rnr_retry	    = (be32_to_cpu(context->params1) >> 13) & 0x7;
5497e126ba97SEli Cohen 	qp_attr->alt_timeout	    = context->alt_path.ackto_lt >> 3;
54986d2f89dfSmajd@mellanox.com 
54996d2f89dfSmajd@mellanox.com out:
55006d2f89dfSmajd@mellanox.com 	kfree(outb);
55016d2f89dfSmajd@mellanox.com 	return err;
55026d2f89dfSmajd@mellanox.com }
55036d2f89dfSmajd@mellanox.com 
5504776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp,
5505776a3906SMoni Shoua 				struct ib_qp_attr *qp_attr, int qp_attr_mask,
5506776a3906SMoni Shoua 				struct ib_qp_init_attr *qp_init_attr)
5507776a3906SMoni Shoua {
5508776a3906SMoni Shoua 	struct mlx5_core_dct	*dct = &mqp->dct.mdct;
5509776a3906SMoni Shoua 	u32 *out;
5510776a3906SMoni Shoua 	u32 access_flags = 0;
5511776a3906SMoni Shoua 	int outlen = MLX5_ST_SZ_BYTES(query_dct_out);
5512776a3906SMoni Shoua 	void *dctc;
5513776a3906SMoni Shoua 	int err;
5514776a3906SMoni Shoua 	int supported_mask = IB_QP_STATE |
5515776a3906SMoni Shoua 			     IB_QP_ACCESS_FLAGS |
5516776a3906SMoni Shoua 			     IB_QP_PORT |
5517776a3906SMoni Shoua 			     IB_QP_MIN_RNR_TIMER |
5518776a3906SMoni Shoua 			     IB_QP_AV |
5519776a3906SMoni Shoua 			     IB_QP_PATH_MTU |
5520776a3906SMoni Shoua 			     IB_QP_PKEY_INDEX;
5521776a3906SMoni Shoua 
5522776a3906SMoni Shoua 	if (qp_attr_mask & ~supported_mask)
5523776a3906SMoni Shoua 		return -EINVAL;
5524776a3906SMoni Shoua 	if (mqp->state != IB_QPS_RTR)
5525776a3906SMoni Shoua 		return -EINVAL;
5526776a3906SMoni Shoua 
5527776a3906SMoni Shoua 	out = kzalloc(outlen, GFP_KERNEL);
5528776a3906SMoni Shoua 	if (!out)
5529776a3906SMoni Shoua 		return -ENOMEM;
5530776a3906SMoni Shoua 
5531776a3906SMoni Shoua 	err = mlx5_core_dct_query(dev->mdev, dct, out, outlen);
5532776a3906SMoni Shoua 	if (err)
5533776a3906SMoni Shoua 		goto out;
5534776a3906SMoni Shoua 
5535776a3906SMoni Shoua 	dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry);
5536776a3906SMoni Shoua 
5537776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_STATE)
5538776a3906SMoni Shoua 		qp_attr->qp_state = IB_QPS_RTR;
5539776a3906SMoni Shoua 
5540776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_ACCESS_FLAGS) {
5541776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rre))
5542776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_READ;
5543776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rwe))
5544776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_WRITE;
5545776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rae))
5546776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_ATOMIC;
5547776a3906SMoni Shoua 		qp_attr->qp_access_flags = access_flags;
5548776a3906SMoni Shoua 	}
5549776a3906SMoni Shoua 
5550776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PORT)
5551776a3906SMoni Shoua 		qp_attr->port_num = MLX5_GET(dctc, dctc, port);
5552776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_MIN_RNR_TIMER)
5553776a3906SMoni Shoua 		qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak);
5554776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_AV) {
5555776a3906SMoni Shoua 		qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass);
5556776a3906SMoni Shoua 		qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label);
5557776a3906SMoni Shoua 		qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index);
5558776a3906SMoni Shoua 		qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit);
5559776a3906SMoni Shoua 	}
5560776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PATH_MTU)
5561776a3906SMoni Shoua 		qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu);
5562776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PKEY_INDEX)
5563776a3906SMoni Shoua 		qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index);
5564776a3906SMoni Shoua out:
5565776a3906SMoni Shoua 	kfree(out);
5566776a3906SMoni Shoua 	return err;
5567776a3906SMoni Shoua }
5568776a3906SMoni Shoua 
55696d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
55706d2f89dfSmajd@mellanox.com 		     int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
55716d2f89dfSmajd@mellanox.com {
55726d2f89dfSmajd@mellanox.com 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
55736d2f89dfSmajd@mellanox.com 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
55746d2f89dfSmajd@mellanox.com 	int err = 0;
55756d2f89dfSmajd@mellanox.com 	u8 raw_packet_qp_state;
55766d2f89dfSmajd@mellanox.com 
557728d61370SYishai Hadas 	if (ibqp->rwq_ind_tbl)
557828d61370SYishai Hadas 		return -ENOSYS;
557928d61370SYishai Hadas 
5580d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5581d16e91daSHaggai Eran 		return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask,
5582d16e91daSHaggai Eran 					    qp_init_attr);
5583d16e91daSHaggai Eran 
5584c2e53b2cSYishai Hadas 	/* Not all of output fields are applicable, make sure to zero them */
5585c2e53b2cSYishai Hadas 	memset(qp_init_attr, 0, sizeof(*qp_init_attr));
5586c2e53b2cSYishai Hadas 	memset(qp_attr, 0, sizeof(*qp_attr));
5587c2e53b2cSYishai Hadas 
5588776a3906SMoni Shoua 	if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT))
5589776a3906SMoni Shoua 		return mlx5_ib_dct_query_qp(dev, qp, qp_attr,
5590776a3906SMoni Shoua 					    qp_attr_mask, qp_init_attr);
5591776a3906SMoni Shoua 
55926d2f89dfSmajd@mellanox.com 	mutex_lock(&qp->mutex);
55936d2f89dfSmajd@mellanox.com 
5594c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
5595c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
55966d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state);
55976d2f89dfSmajd@mellanox.com 		if (err)
55986d2f89dfSmajd@mellanox.com 			goto out;
55996d2f89dfSmajd@mellanox.com 		qp->state = raw_packet_qp_state;
56006d2f89dfSmajd@mellanox.com 		qp_attr->port_num = 1;
56016d2f89dfSmajd@mellanox.com 	} else {
56026d2f89dfSmajd@mellanox.com 		err = query_qp_attr(dev, qp, qp_attr);
56036d2f89dfSmajd@mellanox.com 		if (err)
56046d2f89dfSmajd@mellanox.com 			goto out;
56056d2f89dfSmajd@mellanox.com 	}
56066d2f89dfSmajd@mellanox.com 
56076d2f89dfSmajd@mellanox.com 	qp_attr->qp_state	     = qp->state;
5608e126ba97SEli Cohen 	qp_attr->cur_qp_state	     = qp_attr->qp_state;
5609e126ba97SEli Cohen 	qp_attr->cap.max_recv_wr     = qp->rq.wqe_cnt;
5610e126ba97SEli Cohen 	qp_attr->cap.max_recv_sge    = qp->rq.max_gs;
5611e126ba97SEli Cohen 
5612e126ba97SEli Cohen 	if (!ibqp->uobject) {
56130540d814SNoa Osherovich 		qp_attr->cap.max_send_wr  = qp->sq.max_post;
5614e126ba97SEli Cohen 		qp_attr->cap.max_send_sge = qp->sq.max_gs;
56150540d814SNoa Osherovich 		qp_init_attr->qp_context = ibqp->qp_context;
5616e126ba97SEli Cohen 	} else {
5617e126ba97SEli Cohen 		qp_attr->cap.max_send_wr  = 0;
5618e126ba97SEli Cohen 		qp_attr->cap.max_send_sge = 0;
5619e126ba97SEli Cohen 	}
5620e126ba97SEli Cohen 
56210540d814SNoa Osherovich 	qp_init_attr->qp_type = ibqp->qp_type;
56220540d814SNoa Osherovich 	qp_init_attr->recv_cq = ibqp->recv_cq;
56230540d814SNoa Osherovich 	qp_init_attr->send_cq = ibqp->send_cq;
56240540d814SNoa Osherovich 	qp_init_attr->srq = ibqp->srq;
56250540d814SNoa Osherovich 	qp_attr->cap.max_inline_data = qp->max_inline_data;
5626e126ba97SEli Cohen 
5627e126ba97SEli Cohen 	qp_init_attr->cap	     = qp_attr->cap;
5628e126ba97SEli Cohen 
5629e126ba97SEli Cohen 	qp_init_attr->create_flags = 0;
5630e126ba97SEli Cohen 	if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
5631e126ba97SEli Cohen 		qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK;
5632e126ba97SEli Cohen 
5633051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
5634051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL;
5635051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_SEND)
5636051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND;
5637051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_RECV)
5638051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV;
5639b11a4f9cSHaggai Eran 	if (qp->flags & MLX5_IB_QP_SQPN_QP1)
5640b11a4f9cSHaggai Eran 		qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1();
5641051f2630SLeon Romanovsky 
5642e126ba97SEli Cohen 	qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ?
5643e126ba97SEli Cohen 		IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR;
5644e126ba97SEli Cohen 
5645e126ba97SEli Cohen out:
5646e126ba97SEli Cohen 	mutex_unlock(&qp->mutex);
5647e126ba97SEli Cohen 	return err;
5648e126ba97SEli Cohen }
5649e126ba97SEli Cohen 
5650e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev,
5651e126ba97SEli Cohen 				   struct ib_udata *udata)
5652e126ba97SEli Cohen {
5653e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibdev);
5654e126ba97SEli Cohen 	struct mlx5_ib_xrcd *xrcd;
5655e126ba97SEli Cohen 	int err;
5656e126ba97SEli Cohen 
5657938fe83cSSaeed Mahameed 	if (!MLX5_CAP_GEN(dev->mdev, xrc))
5658e126ba97SEli Cohen 		return ERR_PTR(-ENOSYS);
5659e126ba97SEli Cohen 
5660e126ba97SEli Cohen 	xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL);
5661e126ba97SEli Cohen 	if (!xrcd)
5662e126ba97SEli Cohen 		return ERR_PTR(-ENOMEM);
5663e126ba97SEli Cohen 
56645aa3771dSYishai Hadas 	err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0);
5665e126ba97SEli Cohen 	if (err) {
5666e126ba97SEli Cohen 		kfree(xrcd);
5667e126ba97SEli Cohen 		return ERR_PTR(-ENOMEM);
5668e126ba97SEli Cohen 	}
5669e126ba97SEli Cohen 
5670e126ba97SEli Cohen 	return &xrcd->ibxrcd;
5671e126ba97SEli Cohen }
5672e126ba97SEli Cohen 
5673c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
5674e126ba97SEli Cohen {
5675e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(xrcd->device);
5676e126ba97SEli Cohen 	u32 xrcdn = to_mxrcd(xrcd)->xrcdn;
5677e126ba97SEli Cohen 	int err;
5678e126ba97SEli Cohen 
56795aa3771dSYishai Hadas 	err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0);
5680b081808aSLeon Romanovsky 	if (err)
5681e126ba97SEli Cohen 		mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn);
5682e126ba97SEli Cohen 
5683e126ba97SEli Cohen 	kfree(xrcd);
5684e126ba97SEli Cohen 	return 0;
5685e126ba97SEli Cohen }
568679b20a6cSYishai Hadas 
5687350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type)
5688350d0e4cSYishai Hadas {
5689350d0e4cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp);
5690350d0e4cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device);
5691350d0e4cSYishai Hadas 	struct ib_event event;
5692350d0e4cSYishai Hadas 
5693350d0e4cSYishai Hadas 	if (rwq->ibwq.event_handler) {
5694350d0e4cSYishai Hadas 		event.device     = rwq->ibwq.device;
5695350d0e4cSYishai Hadas 		event.element.wq = &rwq->ibwq;
5696350d0e4cSYishai Hadas 		switch (type) {
5697350d0e4cSYishai Hadas 		case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
5698350d0e4cSYishai Hadas 			event.event = IB_EVENT_WQ_FATAL;
5699350d0e4cSYishai Hadas 			break;
5700350d0e4cSYishai Hadas 		default:
5701350d0e4cSYishai Hadas 			mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn);
5702350d0e4cSYishai Hadas 			return;
5703350d0e4cSYishai Hadas 		}
5704350d0e4cSYishai Hadas 
5705350d0e4cSYishai Hadas 		rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context);
5706350d0e4cSYishai Hadas 	}
5707350d0e4cSYishai Hadas }
5708350d0e4cSYishai Hadas 
570903404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev)
571003404e8aSMaor Gottlieb {
571103404e8aSMaor Gottlieb 	int err = 0;
571203404e8aSMaor Gottlieb 
571303404e8aSMaor Gottlieb 	mutex_lock(&dev->delay_drop.lock);
571403404e8aSMaor Gottlieb 	if (dev->delay_drop.activate)
571503404e8aSMaor Gottlieb 		goto out;
571603404e8aSMaor Gottlieb 
571703404e8aSMaor Gottlieb 	err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout);
571803404e8aSMaor Gottlieb 	if (err)
571903404e8aSMaor Gottlieb 		goto out;
572003404e8aSMaor Gottlieb 
572103404e8aSMaor Gottlieb 	dev->delay_drop.activate = true;
572203404e8aSMaor Gottlieb out:
572303404e8aSMaor Gottlieb 	mutex_unlock(&dev->delay_drop.lock);
5724fe248c3aSMaor Gottlieb 
5725fe248c3aSMaor Gottlieb 	if (!err)
5726fe248c3aSMaor Gottlieb 		atomic_inc(&dev->delay_drop.rqs_cnt);
572703404e8aSMaor Gottlieb 	return err;
572803404e8aSMaor Gottlieb }
572903404e8aSMaor Gottlieb 
573079b20a6cSYishai Hadas static int  create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd,
573179b20a6cSYishai Hadas 		      struct ib_wq_init_attr *init_attr)
573279b20a6cSYishai Hadas {
573379b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev;
57344be6da1eSNoa Osherovich 	int has_net_offloads;
573579b20a6cSYishai Hadas 	__be64 *rq_pas0;
573679b20a6cSYishai Hadas 	void *in;
573779b20a6cSYishai Hadas 	void *rqc;
573879b20a6cSYishai Hadas 	void *wq;
573979b20a6cSYishai Hadas 	int inlen;
574079b20a6cSYishai Hadas 	int err;
574179b20a6cSYishai Hadas 
574279b20a6cSYishai Hadas 	dev = to_mdev(pd->device);
574379b20a6cSYishai Hadas 
574479b20a6cSYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas;
57451b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
574679b20a6cSYishai Hadas 	if (!in)
574779b20a6cSYishai Hadas 		return -ENOMEM;
574879b20a6cSYishai Hadas 
574934d57585SYishai Hadas 	MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid);
575079b20a6cSYishai Hadas 	rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
575179b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, mem_rq_type,
575279b20a6cSYishai Hadas 		 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE);
575379b20a6cSYishai Hadas 	MLX5_SET(rqc, rqc, user_index, rwq->user_index);
575479b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn);
575579b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, state, MLX5_RQC_STATE_RST);
575679b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, flush_in_error_en, 1);
575779b20a6cSYishai Hadas 	wq = MLX5_ADDR_OF(rqc, rqc, wq);
5758ccc87087SNoa Osherovich 	MLX5_SET(wq, wq, wq_type,
5759ccc87087SNoa Osherovich 		 rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ?
5760ccc87087SNoa Osherovich 		 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC);
5761b1383aa6SNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
5762b1383aa6SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
5763b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "Scatter end padding is not supported\n");
5764b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
5765b1383aa6SNoa Osherovich 			goto out;
5766b1383aa6SNoa Osherovich 		} else {
576779b20a6cSYishai Hadas 			MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
5768b1383aa6SNoa Osherovich 		}
5769b1383aa6SNoa Osherovich 	}
577079b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride);
5771ccc87087SNoa Osherovich 	if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) {
5772ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en);
5773ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, log_wqe_stride_size,
5774ccc87087SNoa Osherovich 			 rwq->single_stride_log_num_of_bytes -
5775ccc87087SNoa Osherovich 			 MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES);
5776ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides -
5777ccc87087SNoa Osherovich 			 MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES);
5778ccc87087SNoa Osherovich 	}
577979b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size);
578079b20a6cSYishai Hadas 	MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn);
578179b20a6cSYishai Hadas 	MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset);
578279b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size);
578379b20a6cSYishai Hadas 	MLX5_SET(wq, wq, wq_signature, rwq->wq_sig);
578479b20a6cSYishai Hadas 	MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma);
57854be6da1eSNoa Osherovich 	has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads);
5786b1f74a84SNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) {
57874be6da1eSNoa Osherovich 		if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) {
5788b1f74a84SNoa Osherovich 			mlx5_ib_dbg(dev, "VLAN offloads are not supported\n");
5789b1f74a84SNoa Osherovich 			err = -EOPNOTSUPP;
5790b1f74a84SNoa Osherovich 			goto out;
5791b1f74a84SNoa Osherovich 		}
5792b1f74a84SNoa Osherovich 	} else {
5793b1f74a84SNoa Osherovich 		MLX5_SET(rqc, rqc, vsd, 1);
5794b1f74a84SNoa Osherovich 	}
57954be6da1eSNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) {
57964be6da1eSNoa Osherovich 		if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) {
57974be6da1eSNoa Osherovich 			mlx5_ib_dbg(dev, "Scatter FCS is not supported\n");
57984be6da1eSNoa Osherovich 			err = -EOPNOTSUPP;
57994be6da1eSNoa Osherovich 			goto out;
58004be6da1eSNoa Osherovich 		}
58014be6da1eSNoa Osherovich 		MLX5_SET(rqc, rqc, scatter_fcs, 1);
58024be6da1eSNoa Osherovich 	}
580303404e8aSMaor Gottlieb 	if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
580403404e8aSMaor Gottlieb 		if (!(dev->ib_dev.attrs.raw_packet_caps &
580503404e8aSMaor Gottlieb 		      IB_RAW_PACKET_CAP_DELAY_DROP)) {
580603404e8aSMaor Gottlieb 			mlx5_ib_dbg(dev, "Delay drop is not supported\n");
580703404e8aSMaor Gottlieb 			err = -EOPNOTSUPP;
580803404e8aSMaor Gottlieb 			goto out;
580903404e8aSMaor Gottlieb 		}
581003404e8aSMaor Gottlieb 		MLX5_SET(rqc, rqc, delay_drop_en, 1);
581103404e8aSMaor Gottlieb 	}
581279b20a6cSYishai Hadas 	rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
581379b20a6cSYishai Hadas 	mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0);
5814350d0e4cSYishai Hadas 	err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp);
581503404e8aSMaor Gottlieb 	if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
581603404e8aSMaor Gottlieb 		err = set_delay_drop(dev);
581703404e8aSMaor Gottlieb 		if (err) {
581803404e8aSMaor Gottlieb 			mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n",
581903404e8aSMaor Gottlieb 				     err);
582003404e8aSMaor Gottlieb 			mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
582103404e8aSMaor Gottlieb 		} else {
582203404e8aSMaor Gottlieb 			rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP;
582303404e8aSMaor Gottlieb 		}
582403404e8aSMaor Gottlieb 	}
5825b1f74a84SNoa Osherovich out:
582679b20a6cSYishai Hadas 	kvfree(in);
582779b20a6cSYishai Hadas 	return err;
582879b20a6cSYishai Hadas }
582979b20a6cSYishai Hadas 
583079b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev,
583179b20a6cSYishai Hadas 			    struct ib_wq_init_attr *wq_init_attr,
583279b20a6cSYishai Hadas 			    struct mlx5_ib_create_wq *ucmd,
583379b20a6cSYishai Hadas 			    struct mlx5_ib_rwq *rwq)
583479b20a6cSYishai Hadas {
583579b20a6cSYishai Hadas 	/* Sanity check RQ size before proceeding */
583679b20a6cSYishai Hadas 	if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz)))
583779b20a6cSYishai Hadas 		return -EINVAL;
583879b20a6cSYishai Hadas 
583979b20a6cSYishai Hadas 	if (!ucmd->rq_wqe_count)
584079b20a6cSYishai Hadas 		return -EINVAL;
584179b20a6cSYishai Hadas 
584279b20a6cSYishai Hadas 	rwq->wqe_count = ucmd->rq_wqe_count;
584379b20a6cSYishai Hadas 	rwq->wqe_shift = ucmd->rq_wqe_shift;
58440dfe4522SLeon Romanovsky 	if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size))
58450dfe4522SLeon Romanovsky 		return -EINVAL;
58460dfe4522SLeon Romanovsky 
584779b20a6cSYishai Hadas 	rwq->log_rq_stride = rwq->wqe_shift;
584879b20a6cSYishai Hadas 	rwq->log_rq_size = ilog2(rwq->wqe_count);
584979b20a6cSYishai Hadas 	return 0;
585079b20a6cSYishai Hadas }
585179b20a6cSYishai Hadas 
585279b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd,
585379b20a6cSYishai Hadas 			   struct ib_wq_init_attr *init_attr,
585479b20a6cSYishai Hadas 			   struct ib_udata *udata,
585579b20a6cSYishai Hadas 			   struct mlx5_ib_rwq *rwq)
585679b20a6cSYishai Hadas {
585779b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(pd->device);
585879b20a6cSYishai Hadas 	struct mlx5_ib_create_wq ucmd = {};
585979b20a6cSYishai Hadas 	int err;
586079b20a6cSYishai Hadas 	size_t required_cmd_sz;
586179b20a6cSYishai Hadas 
5862ccc87087SNoa Osherovich 	required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes)
5863ccc87087SNoa Osherovich 		+ sizeof(ucmd.single_stride_log_num_of_bytes);
586479b20a6cSYishai Hadas 	if (udata->inlen < required_cmd_sz) {
586579b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "invalid inlen\n");
586679b20a6cSYishai Hadas 		return -EINVAL;
586779b20a6cSYishai Hadas 	}
586879b20a6cSYishai Hadas 
586979b20a6cSYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
587079b20a6cSYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
587179b20a6cSYishai Hadas 				 udata->inlen - sizeof(ucmd))) {
587279b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "inlen is not supported\n");
587379b20a6cSYishai Hadas 		return -EOPNOTSUPP;
587479b20a6cSYishai Hadas 	}
587579b20a6cSYishai Hadas 
587679b20a6cSYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) {
587779b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
587879b20a6cSYishai Hadas 		return -EFAULT;
587979b20a6cSYishai Hadas 	}
588079b20a6cSYishai Hadas 
5881ccc87087SNoa Osherovich 	if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) {
588279b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "invalid comp mask\n");
588379b20a6cSYishai Hadas 		return -EOPNOTSUPP;
5884ccc87087SNoa Osherovich 	} else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) {
5885ccc87087SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) {
5886ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Striding RQ is not supported\n");
588779b20a6cSYishai Hadas 			return -EOPNOTSUPP;
588879b20a6cSYishai Hadas 		}
5889ccc87087SNoa Osherovich 		if ((ucmd.single_stride_log_num_of_bytes <
5890ccc87087SNoa Osherovich 		    MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) ||
5891ccc87087SNoa Osherovich 		    (ucmd.single_stride_log_num_of_bytes >
5892ccc87087SNoa Osherovich 		     MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) {
5893ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n",
5894ccc87087SNoa Osherovich 				    ucmd.single_stride_log_num_of_bytes,
5895ccc87087SNoa Osherovich 				    MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES,
5896ccc87087SNoa Osherovich 				    MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES);
5897ccc87087SNoa Osherovich 			return -EINVAL;
5898ccc87087SNoa Osherovich 		}
5899ccc87087SNoa Osherovich 		if ((ucmd.single_wqe_log_num_of_strides >
5900ccc87087SNoa Osherovich 		    MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) ||
5901ccc87087SNoa Osherovich 		     (ucmd.single_wqe_log_num_of_strides <
5902ccc87087SNoa Osherovich 			MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) {
5903ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n",
5904ccc87087SNoa Osherovich 				    ucmd.single_wqe_log_num_of_strides,
5905ccc87087SNoa Osherovich 				    MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES,
5906ccc87087SNoa Osherovich 				    MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES);
5907ccc87087SNoa Osherovich 			return -EINVAL;
5908ccc87087SNoa Osherovich 		}
5909ccc87087SNoa Osherovich 		rwq->single_stride_log_num_of_bytes =
5910ccc87087SNoa Osherovich 			ucmd.single_stride_log_num_of_bytes;
5911ccc87087SNoa Osherovich 		rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides;
5912ccc87087SNoa Osherovich 		rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en;
5913ccc87087SNoa Osherovich 		rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ;
5914ccc87087SNoa Osherovich 	}
591579b20a6cSYishai Hadas 
591679b20a6cSYishai Hadas 	err = set_user_rq_size(dev, init_attr, &ucmd, rwq);
591779b20a6cSYishai Hadas 	if (err) {
591879b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "err %d\n", err);
591979b20a6cSYishai Hadas 		return err;
592079b20a6cSYishai Hadas 	}
592179b20a6cSYishai Hadas 
5922b0ea0fa5SJason Gunthorpe 	err = create_user_rq(dev, pd, udata, rwq, &ucmd);
592379b20a6cSYishai Hadas 	if (err) {
592479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "err %d\n", err);
592579b20a6cSYishai Hadas 		return err;
592679b20a6cSYishai Hadas 	}
592779b20a6cSYishai Hadas 
592879b20a6cSYishai Hadas 	rwq->user_index = ucmd.user_index;
592979b20a6cSYishai Hadas 	return 0;
593079b20a6cSYishai Hadas }
593179b20a6cSYishai Hadas 
593279b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd,
593379b20a6cSYishai Hadas 				struct ib_wq_init_attr *init_attr,
593479b20a6cSYishai Hadas 				struct ib_udata *udata)
593579b20a6cSYishai Hadas {
593679b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev;
593779b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq;
593879b20a6cSYishai Hadas 	struct mlx5_ib_create_wq_resp resp = {};
593979b20a6cSYishai Hadas 	size_t min_resp_len;
594079b20a6cSYishai Hadas 	int err;
594179b20a6cSYishai Hadas 
594279b20a6cSYishai Hadas 	if (!udata)
594379b20a6cSYishai Hadas 		return ERR_PTR(-ENOSYS);
594479b20a6cSYishai Hadas 
594579b20a6cSYishai Hadas 	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
594679b20a6cSYishai Hadas 	if (udata->outlen && udata->outlen < min_resp_len)
594779b20a6cSYishai Hadas 		return ERR_PTR(-EINVAL);
594879b20a6cSYishai Hadas 
594979b20a6cSYishai Hadas 	dev = to_mdev(pd->device);
595079b20a6cSYishai Hadas 	switch (init_attr->wq_type) {
595179b20a6cSYishai Hadas 	case IB_WQT_RQ:
595279b20a6cSYishai Hadas 		rwq = kzalloc(sizeof(*rwq), GFP_KERNEL);
595379b20a6cSYishai Hadas 		if (!rwq)
595479b20a6cSYishai Hadas 			return ERR_PTR(-ENOMEM);
595579b20a6cSYishai Hadas 		err = prepare_user_rq(pd, init_attr, udata, rwq);
595679b20a6cSYishai Hadas 		if (err)
595779b20a6cSYishai Hadas 			goto err;
595879b20a6cSYishai Hadas 		err = create_rq(rwq, pd, init_attr);
595979b20a6cSYishai Hadas 		if (err)
596079b20a6cSYishai Hadas 			goto err_user_rq;
596179b20a6cSYishai Hadas 		break;
596279b20a6cSYishai Hadas 	default:
596379b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "unsupported wq type %d\n",
596479b20a6cSYishai Hadas 			    init_attr->wq_type);
596579b20a6cSYishai Hadas 		return ERR_PTR(-EINVAL);
596679b20a6cSYishai Hadas 	}
596779b20a6cSYishai Hadas 
5968350d0e4cSYishai Hadas 	rwq->ibwq.wq_num = rwq->core_qp.qpn;
596979b20a6cSYishai Hadas 	rwq->ibwq.state = IB_WQS_RESET;
597079b20a6cSYishai Hadas 	if (udata->outlen) {
597179b20a6cSYishai Hadas 		resp.response_length = offsetof(typeof(resp), response_length) +
597279b20a6cSYishai Hadas 				sizeof(resp.response_length);
597379b20a6cSYishai Hadas 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
597479b20a6cSYishai Hadas 		if (err)
597579b20a6cSYishai Hadas 			goto err_copy;
597679b20a6cSYishai Hadas 	}
597779b20a6cSYishai Hadas 
5978350d0e4cSYishai Hadas 	rwq->core_qp.event = mlx5_ib_wq_event;
5979350d0e4cSYishai Hadas 	rwq->ibwq.event_handler = init_attr->event_handler;
598079b20a6cSYishai Hadas 	return &rwq->ibwq;
598179b20a6cSYishai Hadas 
598279b20a6cSYishai Hadas err_copy:
5983350d0e4cSYishai Hadas 	mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
598479b20a6cSYishai Hadas err_user_rq:
5985bdeacabdSShamir Rabinovitch 	destroy_user_rq(dev, pd, rwq, udata);
598679b20a6cSYishai Hadas err:
598779b20a6cSYishai Hadas 	kfree(rwq);
598879b20a6cSYishai Hadas 	return ERR_PTR(err);
598979b20a6cSYishai Hadas }
599079b20a6cSYishai Hadas 
5991c4367a26SShamir Rabinovitch int mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata)
599279b20a6cSYishai Hadas {
599379b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(wq->device);
599479b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mrwq(wq);
599579b20a6cSYishai Hadas 
5996350d0e4cSYishai Hadas 	mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
5997bdeacabdSShamir Rabinovitch 	destroy_user_rq(dev, wq->pd, rwq, udata);
599879b20a6cSYishai Hadas 	kfree(rwq);
599979b20a6cSYishai Hadas 
600079b20a6cSYishai Hadas 	return 0;
600179b20a6cSYishai Hadas }
600279b20a6cSYishai Hadas 
6003c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device,
6004c5f90929SYishai Hadas 						      struct ib_rwq_ind_table_init_attr *init_attr,
6005c5f90929SYishai Hadas 						      struct ib_udata *udata)
6006c5f90929SYishai Hadas {
6007c5f90929SYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(device);
6008c5f90929SYishai Hadas 	struct mlx5_ib_rwq_ind_table *rwq_ind_tbl;
6009c5f90929SYishai Hadas 	int sz = 1 << init_attr->log_ind_tbl_size;
6010c5f90929SYishai Hadas 	struct mlx5_ib_create_rwq_ind_tbl_resp resp = {};
6011c5f90929SYishai Hadas 	size_t min_resp_len;
6012c5f90929SYishai Hadas 	int inlen;
6013c5f90929SYishai Hadas 	int err;
6014c5f90929SYishai Hadas 	int i;
6015c5f90929SYishai Hadas 	u32 *in;
6016c5f90929SYishai Hadas 	void *rqtc;
6017c5f90929SYishai Hadas 
6018c5f90929SYishai Hadas 	if (udata->inlen > 0 &&
6019c5f90929SYishai Hadas 	    !ib_is_udata_cleared(udata, 0,
6020c5f90929SYishai Hadas 				 udata->inlen))
6021c5f90929SYishai Hadas 		return ERR_PTR(-EOPNOTSUPP);
6022c5f90929SYishai Hadas 
6023efd7f400SMaor Gottlieb 	if (init_attr->log_ind_tbl_size >
6024efd7f400SMaor Gottlieb 	    MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
6025efd7f400SMaor Gottlieb 		mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n",
6026efd7f400SMaor Gottlieb 			    init_attr->log_ind_tbl_size,
6027efd7f400SMaor Gottlieb 			    MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
6028efd7f400SMaor Gottlieb 		return ERR_PTR(-EINVAL);
6029efd7f400SMaor Gottlieb 	}
6030efd7f400SMaor Gottlieb 
6031c5f90929SYishai Hadas 	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
6032c5f90929SYishai Hadas 	if (udata->outlen && udata->outlen < min_resp_len)
6033c5f90929SYishai Hadas 		return ERR_PTR(-EINVAL);
6034c5f90929SYishai Hadas 
6035c5f90929SYishai Hadas 	rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL);
6036c5f90929SYishai Hadas 	if (!rwq_ind_tbl)
6037c5f90929SYishai Hadas 		return ERR_PTR(-ENOMEM);
6038c5f90929SYishai Hadas 
6039c5f90929SYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
60401b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
6041c5f90929SYishai Hadas 	if (!in) {
6042c5f90929SYishai Hadas 		err = -ENOMEM;
6043c5f90929SYishai Hadas 		goto err;
6044c5f90929SYishai Hadas 	}
6045c5f90929SYishai Hadas 
6046c5f90929SYishai Hadas 	rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
6047c5f90929SYishai Hadas 
6048c5f90929SYishai Hadas 	MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
6049c5f90929SYishai Hadas 	MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
6050c5f90929SYishai Hadas 
6051c5f90929SYishai Hadas 	for (i = 0; i < sz; i++)
6052c5f90929SYishai Hadas 		MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num);
6053c5f90929SYishai Hadas 
60545deba86eSYishai Hadas 	rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid;
60555deba86eSYishai Hadas 	MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid);
60565deba86eSYishai Hadas 
6057c5f90929SYishai Hadas 	err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn);
6058c5f90929SYishai Hadas 	kvfree(in);
6059c5f90929SYishai Hadas 
6060c5f90929SYishai Hadas 	if (err)
6061c5f90929SYishai Hadas 		goto err;
6062c5f90929SYishai Hadas 
6063c5f90929SYishai Hadas 	rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn;
6064c5f90929SYishai Hadas 	if (udata->outlen) {
6065c5f90929SYishai Hadas 		resp.response_length = offsetof(typeof(resp), response_length) +
6066c5f90929SYishai Hadas 					sizeof(resp.response_length);
6067c5f90929SYishai Hadas 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
6068c5f90929SYishai Hadas 		if (err)
6069c5f90929SYishai Hadas 			goto err_copy;
6070c5f90929SYishai Hadas 	}
6071c5f90929SYishai Hadas 
6072c5f90929SYishai Hadas 	return &rwq_ind_tbl->ib_rwq_ind_tbl;
6073c5f90929SYishai Hadas 
6074c5f90929SYishai Hadas err_copy:
60755deba86eSYishai Hadas 	mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid);
6076c5f90929SYishai Hadas err:
6077c5f90929SYishai Hadas 	kfree(rwq_ind_tbl);
6078c5f90929SYishai Hadas 	return ERR_PTR(err);
6079c5f90929SYishai Hadas }
6080c5f90929SYishai Hadas 
6081c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl)
6082c5f90929SYishai Hadas {
6083c5f90929SYishai Hadas 	struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl);
6084c5f90929SYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device);
6085c5f90929SYishai Hadas 
60865deba86eSYishai Hadas 	mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid);
6087c5f90929SYishai Hadas 
6088c5f90929SYishai Hadas 	kfree(rwq_ind_tbl);
6089c5f90929SYishai Hadas 	return 0;
6090c5f90929SYishai Hadas }
6091c5f90929SYishai Hadas 
609279b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
609379b20a6cSYishai Hadas 		      u32 wq_attr_mask, struct ib_udata *udata)
609479b20a6cSYishai Hadas {
609579b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(wq->device);
609679b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mrwq(wq);
609779b20a6cSYishai Hadas 	struct mlx5_ib_modify_wq ucmd = {};
609879b20a6cSYishai Hadas 	size_t required_cmd_sz;
609979b20a6cSYishai Hadas 	int curr_wq_state;
610079b20a6cSYishai Hadas 	int wq_state;
610179b20a6cSYishai Hadas 	int inlen;
610279b20a6cSYishai Hadas 	int err;
610379b20a6cSYishai Hadas 	void *rqc;
610479b20a6cSYishai Hadas 	void *in;
610579b20a6cSYishai Hadas 
610679b20a6cSYishai Hadas 	required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved);
610779b20a6cSYishai Hadas 	if (udata->inlen < required_cmd_sz)
610879b20a6cSYishai Hadas 		return -EINVAL;
610979b20a6cSYishai Hadas 
611079b20a6cSYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
611179b20a6cSYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
611279b20a6cSYishai Hadas 				 udata->inlen - sizeof(ucmd)))
611379b20a6cSYishai Hadas 		return -EOPNOTSUPP;
611479b20a6cSYishai Hadas 
611579b20a6cSYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen)))
611679b20a6cSYishai Hadas 		return -EFAULT;
611779b20a6cSYishai Hadas 
611879b20a6cSYishai Hadas 	if (ucmd.comp_mask || ucmd.reserved)
611979b20a6cSYishai Hadas 		return -EOPNOTSUPP;
612079b20a6cSYishai Hadas 
612179b20a6cSYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(modify_rq_in);
61221b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
612379b20a6cSYishai Hadas 	if (!in)
612479b20a6cSYishai Hadas 		return -ENOMEM;
612579b20a6cSYishai Hadas 
612679b20a6cSYishai Hadas 	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
612779b20a6cSYishai Hadas 
612879b20a6cSYishai Hadas 	curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ?
612979b20a6cSYishai Hadas 		wq_attr->curr_wq_state : wq->state;
613079b20a6cSYishai Hadas 	wq_state = (wq_attr_mask & IB_WQ_STATE) ?
613179b20a6cSYishai Hadas 		wq_attr->wq_state : curr_wq_state;
613279b20a6cSYishai Hadas 	if (curr_wq_state == IB_WQS_ERR)
613379b20a6cSYishai Hadas 		curr_wq_state = MLX5_RQC_STATE_ERR;
613479b20a6cSYishai Hadas 	if (wq_state == IB_WQS_ERR)
613579b20a6cSYishai Hadas 		wq_state = MLX5_RQC_STATE_ERR;
613679b20a6cSYishai Hadas 	MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state);
613734d57585SYishai Hadas 	MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid);
613879b20a6cSYishai Hadas 	MLX5_SET(rqc, rqc, state, wq_state);
613979b20a6cSYishai Hadas 
6140b1f74a84SNoa Osherovich 	if (wq_attr_mask & IB_WQ_FLAGS) {
6141b1f74a84SNoa Osherovich 		if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) {
6142b1f74a84SNoa Osherovich 			if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
6143b1f74a84SNoa Osherovich 			      MLX5_CAP_ETH(dev->mdev, vlan_cap))) {
6144b1f74a84SNoa Osherovich 				mlx5_ib_dbg(dev, "VLAN offloads are not "
6145b1f74a84SNoa Osherovich 					    "supported\n");
6146b1f74a84SNoa Osherovich 				err = -EOPNOTSUPP;
6147b1f74a84SNoa Osherovich 				goto out;
6148b1f74a84SNoa Osherovich 			}
6149b1f74a84SNoa Osherovich 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
6150b1f74a84SNoa Osherovich 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD);
6151b1f74a84SNoa Osherovich 			MLX5_SET(rqc, rqc, vsd,
6152b1f74a84SNoa Osherovich 				 (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1);
6153b1f74a84SNoa Osherovich 		}
6154b1383aa6SNoa Osherovich 
6155b1383aa6SNoa Osherovich 		if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
6156b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n");
6157b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
6158b1383aa6SNoa Osherovich 			goto out;
6159b1383aa6SNoa Osherovich 		}
6160b1f74a84SNoa Osherovich 	}
6161b1f74a84SNoa Osherovich 
616223a6964eSMajd Dibbiny 	if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) {
616323a6964eSMajd Dibbiny 		if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
616423a6964eSMajd Dibbiny 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
616523a6964eSMajd Dibbiny 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID);
6166e1f24a79SParav Pandit 			MLX5_SET(rqc, rqc, counter_set_id,
6167e1f24a79SParav Pandit 				 dev->port->cnts.set_id);
616823a6964eSMajd Dibbiny 		} else
61695a738b5dSJason Gunthorpe 			dev_info_once(
61705a738b5dSJason Gunthorpe 				&dev->ib_dev.dev,
61715a738b5dSJason Gunthorpe 				"Receive WQ counters are not supported on current FW\n");
617223a6964eSMajd Dibbiny 	}
617323a6964eSMajd Dibbiny 
6174350d0e4cSYishai Hadas 	err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen);
617579b20a6cSYishai Hadas 	if (!err)
617679b20a6cSYishai Hadas 		rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state;
617779b20a6cSYishai Hadas 
6178b1f74a84SNoa Osherovich out:
6179b1f74a84SNoa Osherovich 	kvfree(in);
618079b20a6cSYishai Hadas 	return err;
618179b20a6cSYishai Hadas }
6182d0e84c0aSYishai Hadas 
6183d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe {
6184d0e84c0aSYishai Hadas 	struct ib_cqe cqe;
6185d0e84c0aSYishai Hadas 	struct completion done;
6186d0e84c0aSYishai Hadas };
6187d0e84c0aSYishai Hadas 
6188d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
6189d0e84c0aSYishai Hadas {
6190d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe,
6191d0e84c0aSYishai Hadas 						     struct mlx5_ib_drain_cqe,
6192d0e84c0aSYishai Hadas 						     cqe);
6193d0e84c0aSYishai Hadas 
6194d0e84c0aSYishai Hadas 	complete(&cqe->done);
6195d0e84c0aSYishai Hadas }
6196d0e84c0aSYishai Hadas 
6197d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */
6198d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq,
6199d0e84c0aSYishai Hadas 				    struct mlx5_ib_drain_cqe *sdrain,
6200d0e84c0aSYishai Hadas 				    struct mlx5_ib_dev *dev)
6201d0e84c0aSYishai Hadas {
6202d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6203d0e84c0aSYishai Hadas 
6204d0e84c0aSYishai Hadas 	if (cq->poll_ctx == IB_POLL_DIRECT) {
6205d0e84c0aSYishai Hadas 		while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0)
6206d0e84c0aSYishai Hadas 			ib_process_cq_direct(cq, -1);
6207d0e84c0aSYishai Hadas 		return;
6208d0e84c0aSYishai Hadas 	}
6209d0e84c0aSYishai Hadas 
6210d0e84c0aSYishai Hadas 	if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6211d0e84c0aSYishai Hadas 		struct mlx5_ib_cq *mcq = to_mcq(cq);
6212d0e84c0aSYishai Hadas 		bool triggered = false;
6213d0e84c0aSYishai Hadas 		unsigned long flags;
6214d0e84c0aSYishai Hadas 
6215d0e84c0aSYishai Hadas 		spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
6216d0e84c0aSYishai Hadas 		/* Make sure that the CQ handler won't run if wasn't run yet */
6217d0e84c0aSYishai Hadas 		if (!mcq->mcq.reset_notify_added)
6218d0e84c0aSYishai Hadas 			mcq->mcq.reset_notify_added = 1;
6219d0e84c0aSYishai Hadas 		else
6220d0e84c0aSYishai Hadas 			triggered = true;
6221d0e84c0aSYishai Hadas 		spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
6222d0e84c0aSYishai Hadas 
6223d0e84c0aSYishai Hadas 		if (triggered) {
6224d0e84c0aSYishai Hadas 			/* Wait for any scheduled/running task to be ended */
6225d0e84c0aSYishai Hadas 			switch (cq->poll_ctx) {
6226d0e84c0aSYishai Hadas 			case IB_POLL_SOFTIRQ:
6227d0e84c0aSYishai Hadas 				irq_poll_disable(&cq->iop);
6228d0e84c0aSYishai Hadas 				irq_poll_enable(&cq->iop);
6229d0e84c0aSYishai Hadas 				break;
6230d0e84c0aSYishai Hadas 			case IB_POLL_WORKQUEUE:
6231d0e84c0aSYishai Hadas 				cancel_work_sync(&cq->work);
6232d0e84c0aSYishai Hadas 				break;
6233d0e84c0aSYishai Hadas 			default:
6234d0e84c0aSYishai Hadas 				WARN_ON_ONCE(1);
6235d0e84c0aSYishai Hadas 			}
6236d0e84c0aSYishai Hadas 		}
6237d0e84c0aSYishai Hadas 
6238d0e84c0aSYishai Hadas 		/* Run the CQ handler - this makes sure that the drain WR will
6239d0e84c0aSYishai Hadas 		 * be processed if wasn't processed yet.
6240d0e84c0aSYishai Hadas 		 */
6241d0e84c0aSYishai Hadas 		mcq->mcq.comp(&mcq->mcq);
6242d0e84c0aSYishai Hadas 	}
6243d0e84c0aSYishai Hadas 
6244d0e84c0aSYishai Hadas 	wait_for_completion(&sdrain->done);
6245d0e84c0aSYishai Hadas }
6246d0e84c0aSYishai Hadas 
6247d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp)
6248d0e84c0aSYishai Hadas {
6249d0e84c0aSYishai Hadas 	struct ib_cq *cq = qp->send_cq;
6250d0e84c0aSYishai Hadas 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
6251d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe sdrain;
6252d34ac5cdSBart Van Assche 	const struct ib_send_wr *bad_swr;
6253d0e84c0aSYishai Hadas 	struct ib_rdma_wr swr = {
6254d0e84c0aSYishai Hadas 		.wr = {
6255d0e84c0aSYishai Hadas 			.next = NULL,
6256d0e84c0aSYishai Hadas 			{ .wr_cqe	= &sdrain.cqe, },
6257d0e84c0aSYishai Hadas 			.opcode	= IB_WR_RDMA_WRITE,
6258d0e84c0aSYishai Hadas 		},
6259d0e84c0aSYishai Hadas 	};
6260d0e84c0aSYishai Hadas 	int ret;
6261d0e84c0aSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6262d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6263d0e84c0aSYishai Hadas 
6264d0e84c0aSYishai Hadas 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
6265d0e84c0aSYishai Hadas 	if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6266d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
6267d0e84c0aSYishai Hadas 		return;
6268d0e84c0aSYishai Hadas 	}
6269d0e84c0aSYishai Hadas 
6270d0e84c0aSYishai Hadas 	sdrain.cqe.done = mlx5_ib_drain_qp_done;
6271d0e84c0aSYishai Hadas 	init_completion(&sdrain.done);
6272d0e84c0aSYishai Hadas 
6273d0e84c0aSYishai Hadas 	ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true);
6274d0e84c0aSYishai Hadas 	if (ret) {
6275d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
6276d0e84c0aSYishai Hadas 		return;
6277d0e84c0aSYishai Hadas 	}
6278d0e84c0aSYishai Hadas 
6279d0e84c0aSYishai Hadas 	handle_drain_completion(cq, &sdrain, dev);
6280d0e84c0aSYishai Hadas }
6281d0e84c0aSYishai Hadas 
6282d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp)
6283d0e84c0aSYishai Hadas {
6284d0e84c0aSYishai Hadas 	struct ib_cq *cq = qp->recv_cq;
6285d0e84c0aSYishai Hadas 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
6286d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe rdrain;
6287d34ac5cdSBart Van Assche 	struct ib_recv_wr rwr = {};
6288d34ac5cdSBart Van Assche 	const struct ib_recv_wr *bad_rwr;
6289d0e84c0aSYishai Hadas 	int ret;
6290d0e84c0aSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6291d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6292d0e84c0aSYishai Hadas 
6293d0e84c0aSYishai Hadas 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
6294d0e84c0aSYishai Hadas 	if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6295d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
6296d0e84c0aSYishai Hadas 		return;
6297d0e84c0aSYishai Hadas 	}
6298d0e84c0aSYishai Hadas 
6299d0e84c0aSYishai Hadas 	rwr.wr_cqe = &rdrain.cqe;
6300d0e84c0aSYishai Hadas 	rdrain.cqe.done = mlx5_ib_drain_qp_done;
6301d0e84c0aSYishai Hadas 	init_completion(&rdrain.done);
6302d0e84c0aSYishai Hadas 
6303d0e84c0aSYishai Hadas 	ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true);
6304d0e84c0aSYishai Hadas 	if (ret) {
6305d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
6306d0e84c0aSYishai Hadas 		return;
6307d0e84c0aSYishai Hadas 	}
6308d0e84c0aSYishai Hadas 
6309d0e84c0aSYishai Hadas 	handle_drain_completion(cq, &rdrain, dev);
6310d0e84c0aSYishai Hadas }
6311