xref: /openbmc/linux/drivers/infiniband/hw/mlx5/qp.c (revision 0a2fd01c)
1e126ba97SEli Cohen /*
26cf0a15fSSaeed Mahameed  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3e126ba97SEli Cohen  *
4e126ba97SEli Cohen  * This software is available to you under a choice of one of two
5e126ba97SEli Cohen  * licenses.  You may choose to be licensed under the terms of the GNU
6e126ba97SEli Cohen  * General Public License (GPL) Version 2, available from the file
7e126ba97SEli Cohen  * COPYING in the main directory of this source tree, or the
8e126ba97SEli Cohen  * OpenIB.org BSD license below:
9e126ba97SEli Cohen  *
10e126ba97SEli Cohen  *     Redistribution and use in source and binary forms, with or
11e126ba97SEli Cohen  *     without modification, are permitted provided that the following
12e126ba97SEli Cohen  *     conditions are met:
13e126ba97SEli Cohen  *
14e126ba97SEli Cohen  *      - Redistributions of source code must retain the above
15e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
16e126ba97SEli Cohen  *        disclaimer.
17e126ba97SEli Cohen  *
18e126ba97SEli Cohen  *      - Redistributions in binary form must reproduce the above
19e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
20e126ba97SEli Cohen  *        disclaimer in the documentation and/or other materials
21e126ba97SEli Cohen  *        provided with the distribution.
22e126ba97SEli Cohen  *
23e126ba97SEli Cohen  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e126ba97SEli Cohen  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e126ba97SEli Cohen  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e126ba97SEli Cohen  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e126ba97SEli Cohen  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e126ba97SEli Cohen  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e126ba97SEli Cohen  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e126ba97SEli Cohen  * SOFTWARE.
31e126ba97SEli Cohen  */
32e126ba97SEli Cohen 
33e126ba97SEli Cohen #include <linux/module.h>
34e126ba97SEli Cohen #include <rdma/ib_umem.h>
352811ba51SAchiad Shochat #include <rdma/ib_cache.h>
36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h>
37d14133ddSMark Zhang #include <rdma/rdma_counter.h>
38c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h>
39e126ba97SEli Cohen #include "mlx5_ib.h"
40b96c9ddeSMark Bloch #include "ib_rep.h"
41443c1cf9SYishai Hadas #include "cmd.h"
42e126ba97SEli Cohen 
43e126ba97SEli Cohen /* not supported currently */
44e126ba97SEli Cohen static int wq_signature;
45e126ba97SEli Cohen 
46e126ba97SEli Cohen enum {
47e126ba97SEli Cohen 	MLX5_IB_ACK_REQ_FREQ	= 8,
48e126ba97SEli Cohen };
49e126ba97SEli Cohen 
50e126ba97SEli Cohen enum {
51e126ba97SEli Cohen 	MLX5_IB_DEFAULT_SCHED_QUEUE	= 0x83,
52e126ba97SEli Cohen 	MLX5_IB_DEFAULT_QP0_SCHED_QUEUE	= 0x3f,
53e126ba97SEli Cohen 	MLX5_IB_LINK_TYPE_IB		= 0,
54e126ba97SEli Cohen 	MLX5_IB_LINK_TYPE_ETH		= 1
55e126ba97SEli Cohen };
56e126ba97SEli Cohen 
57e126ba97SEli Cohen enum {
58e126ba97SEli Cohen 	MLX5_IB_SQ_STRIDE	= 6,
59064e5262SIdan Burstein 	MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64,
60e126ba97SEli Cohen };
61e126ba97SEli Cohen 
62e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = {
63e126ba97SEli Cohen 	[IB_WR_SEND]				= MLX5_OPCODE_SEND,
64f0313965SErez Shitrit 	[IB_WR_LSO]				= MLX5_OPCODE_LSO,
65e126ba97SEli Cohen 	[IB_WR_SEND_WITH_IMM]			= MLX5_OPCODE_SEND_IMM,
66e126ba97SEli Cohen 	[IB_WR_RDMA_WRITE]			= MLX5_OPCODE_RDMA_WRITE,
67e126ba97SEli Cohen 	[IB_WR_RDMA_WRITE_WITH_IMM]		= MLX5_OPCODE_RDMA_WRITE_IMM,
68e126ba97SEli Cohen 	[IB_WR_RDMA_READ]			= MLX5_OPCODE_RDMA_READ,
69e126ba97SEli Cohen 	[IB_WR_ATOMIC_CMP_AND_SWP]		= MLX5_OPCODE_ATOMIC_CS,
70e126ba97SEli Cohen 	[IB_WR_ATOMIC_FETCH_AND_ADD]		= MLX5_OPCODE_ATOMIC_FA,
71e126ba97SEli Cohen 	[IB_WR_SEND_WITH_INV]			= MLX5_OPCODE_SEND_INVAL,
72e126ba97SEli Cohen 	[IB_WR_LOCAL_INV]			= MLX5_OPCODE_UMR,
738a187ee5SSagi Grimberg 	[IB_WR_REG_MR]				= MLX5_OPCODE_UMR,
74e126ba97SEli Cohen 	[IB_WR_MASKED_ATOMIC_CMP_AND_SWP]	= MLX5_OPCODE_ATOMIC_MASKED_CS,
75e126ba97SEli Cohen 	[IB_WR_MASKED_ATOMIC_FETCH_AND_ADD]	= MLX5_OPCODE_ATOMIC_MASKED_FA,
76e126ba97SEli Cohen 	[MLX5_IB_WR_UMR]			= MLX5_OPCODE_UMR,
77e126ba97SEli Cohen };
78e126ba97SEli Cohen 
79f0313965SErez Shitrit struct mlx5_wqe_eth_pad {
80f0313965SErez Shitrit 	u8 rsvd0[16];
81f0313965SErez Shitrit };
82e126ba97SEli Cohen 
83eb49ab0cSAlex Vesker enum raw_qp_set_mask_map {
84eb49ab0cSAlex Vesker 	MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID		= 1UL << 0,
857d29f349SBodong Wang 	MLX5_RAW_QP_RATE_LIMIT			= 1UL << 1,
86eb49ab0cSAlex Vesker };
87eb49ab0cSAlex Vesker 
880680efa2SAlex Vesker struct mlx5_modify_raw_qp_param {
890680efa2SAlex Vesker 	u16 operation;
90eb49ab0cSAlex Vesker 
91eb49ab0cSAlex Vesker 	u32 set_mask; /* raw_qp_set_mask_map */
9261147f39SBodong Wang 
9361147f39SBodong Wang 	struct mlx5_rate_limit rl;
9461147f39SBodong Wang 
95eb49ab0cSAlex Vesker 	u8 rq_q_ctr_id;
96d5ed8ac3SMark Bloch 	u16 port;
970680efa2SAlex Vesker };
980680efa2SAlex Vesker 
9989ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type,
10089ea94a7SMaor Gottlieb 		    struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq,
10189ea94a7SMaor Gottlieb 		    struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq);
10289ea94a7SMaor Gottlieb 
103e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type)
104e126ba97SEli Cohen {
105e126ba97SEli Cohen 	return qp_type == IB_QPT_SMI;
106e126ba97SEli Cohen }
107e126ba97SEli Cohen 
108e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type)
109e126ba97SEli Cohen {
110e126ba97SEli Cohen 	return is_qp0(qp_type) || is_qp1(qp_type);
111e126ba97SEli Cohen }
112e126ba97SEli Cohen 
113c1395a2aSHaggai Eran /**
114fbeb4075SMoni Shoua  * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ
115fbeb4075SMoni Shoua  * to kernel buffer
116c1395a2aSHaggai Eran  *
117fbeb4075SMoni Shoua  * @umem: User space memory where the WQ is
118fbeb4075SMoni Shoua  * @buffer: buffer to copy to
119fbeb4075SMoni Shoua  * @buflen: buffer length
120fbeb4075SMoni Shoua  * @wqe_index: index of WQE to copy from
121fbeb4075SMoni Shoua  * @wq_offset: offset to start of WQ
122fbeb4075SMoni Shoua  * @wq_wqe_cnt: number of WQEs in WQ
123fbeb4075SMoni Shoua  * @wq_wqe_shift: log2 of WQE size
124fbeb4075SMoni Shoua  * @bcnt: number of bytes to copy
125fbeb4075SMoni Shoua  * @bytes_copied: number of bytes to copy (return value)
126c1395a2aSHaggai Eran  *
127fbeb4075SMoni Shoua  * Copies from start of WQE bcnt or less bytes.
128fbeb4075SMoni Shoua  * Does not gurantee to copy the entire WQE.
129c1395a2aSHaggai Eran  *
130fbeb4075SMoni Shoua  * Return: zero on success, or an error code.
131c1395a2aSHaggai Eran  */
132da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, void *buffer,
133da9ee9d8SMoni Shoua 					size_t buflen, int wqe_index,
134da9ee9d8SMoni Shoua 					int wq_offset, int wq_wqe_cnt,
135da9ee9d8SMoni Shoua 					int wq_wqe_shift, int bcnt,
136fbeb4075SMoni Shoua 					size_t *bytes_copied)
137c1395a2aSHaggai Eran {
138fbeb4075SMoni Shoua 	size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift);
139fbeb4075SMoni Shoua 	size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift);
140fbeb4075SMoni Shoua 	size_t copy_length;
141c1395a2aSHaggai Eran 	int ret;
142c1395a2aSHaggai Eran 
143fbeb4075SMoni Shoua 	/* don't copy more than requested, more than buffer length or
144fbeb4075SMoni Shoua 	 * beyond WQ end
145fbeb4075SMoni Shoua 	 */
146fbeb4075SMoni Shoua 	copy_length = min_t(u32, buflen, wq_end - offset);
147fbeb4075SMoni Shoua 	copy_length = min_t(u32, copy_length, bcnt);
148c1395a2aSHaggai Eran 
149fbeb4075SMoni Shoua 	ret = ib_umem_copy_from(buffer, umem, offset, copy_length);
150c1395a2aSHaggai Eran 	if (ret)
151c1395a2aSHaggai Eran 		return ret;
152c1395a2aSHaggai Eran 
153fbeb4075SMoni Shoua 	if (!ret && bytes_copied)
154fbeb4075SMoni Shoua 		*bytes_copied = copy_length;
155c1395a2aSHaggai Eran 
156fbeb4075SMoni Shoua 	return 0;
157fbeb4075SMoni Shoua }
158fbeb4075SMoni Shoua 
159da9ee9d8SMoni Shoua static int mlx5_ib_read_kernel_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index,
160da9ee9d8SMoni Shoua 				      void *buffer, size_t buflen, size_t *bc)
161da9ee9d8SMoni Shoua {
162da9ee9d8SMoni Shoua 	struct mlx5_wqe_ctrl_seg *ctrl;
163da9ee9d8SMoni Shoua 	size_t bytes_copied = 0;
164da9ee9d8SMoni Shoua 	size_t wqe_length;
165da9ee9d8SMoni Shoua 	void *p;
166da9ee9d8SMoni Shoua 	int ds;
167da9ee9d8SMoni Shoua 
168da9ee9d8SMoni Shoua 	wqe_index = wqe_index & qp->sq.fbc.sz_m1;
169da9ee9d8SMoni Shoua 
170da9ee9d8SMoni Shoua 	/* read the control segment first */
171da9ee9d8SMoni Shoua 	p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index);
172da9ee9d8SMoni Shoua 	ctrl = p;
173da9ee9d8SMoni Shoua 	ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK;
174da9ee9d8SMoni Shoua 	wqe_length = ds * MLX5_WQE_DS_UNITS;
175da9ee9d8SMoni Shoua 
176da9ee9d8SMoni Shoua 	/* read rest of WQE if it spreads over more than one stride */
177da9ee9d8SMoni Shoua 	while (bytes_copied < wqe_length) {
178da9ee9d8SMoni Shoua 		size_t copy_length =
179da9ee9d8SMoni Shoua 			min_t(size_t, buflen - bytes_copied, MLX5_SEND_WQE_BB);
180da9ee9d8SMoni Shoua 
181da9ee9d8SMoni Shoua 		if (!copy_length)
182da9ee9d8SMoni Shoua 			break;
183da9ee9d8SMoni Shoua 
184da9ee9d8SMoni Shoua 		memcpy(buffer + bytes_copied, p, copy_length);
185da9ee9d8SMoni Shoua 		bytes_copied += copy_length;
186da9ee9d8SMoni Shoua 
187da9ee9d8SMoni Shoua 		wqe_index = (wqe_index + 1) & qp->sq.fbc.sz_m1;
188da9ee9d8SMoni Shoua 		p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index);
189da9ee9d8SMoni Shoua 	}
190da9ee9d8SMoni Shoua 	*bc = bytes_copied;
191da9ee9d8SMoni Shoua 	return 0;
192da9ee9d8SMoni Shoua }
193da9ee9d8SMoni Shoua 
194da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index,
195da9ee9d8SMoni Shoua 				    void *buffer, size_t buflen, size_t *bc)
196fbeb4075SMoni Shoua {
197fbeb4075SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
198fbeb4075SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
199fbeb4075SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->sq;
200fbeb4075SMoni Shoua 	struct mlx5_wqe_ctrl_seg *ctrl;
201fbeb4075SMoni Shoua 	size_t bytes_copied;
202fbeb4075SMoni Shoua 	size_t bytes_copied2;
203fbeb4075SMoni Shoua 	size_t wqe_length;
204fbeb4075SMoni Shoua 	int ret;
205fbeb4075SMoni Shoua 	int ds;
206fbeb4075SMoni Shoua 
207fbeb4075SMoni Shoua 	/* at first read as much as possible */
208da9ee9d8SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index,
209da9ee9d8SMoni Shoua 					   wq->offset, wq->wqe_cnt,
210da9ee9d8SMoni Shoua 					   wq->wqe_shift, buflen,
211fbeb4075SMoni Shoua 					   &bytes_copied);
212fbeb4075SMoni Shoua 	if (ret)
213fbeb4075SMoni Shoua 		return ret;
214fbeb4075SMoni Shoua 
215fbeb4075SMoni Shoua 	/* we need at least control segment size to proceed */
216fbeb4075SMoni Shoua 	if (bytes_copied < sizeof(*ctrl))
217fbeb4075SMoni Shoua 		return -EINVAL;
218fbeb4075SMoni Shoua 
219fbeb4075SMoni Shoua 	ctrl = buffer;
220fbeb4075SMoni Shoua 	ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK;
221c1395a2aSHaggai Eran 	wqe_length = ds * MLX5_WQE_DS_UNITS;
222fbeb4075SMoni Shoua 
223fbeb4075SMoni Shoua 	/* if we copied enough then we are done */
224fbeb4075SMoni Shoua 	if (bytes_copied >= wqe_length) {
225fbeb4075SMoni Shoua 		*bc = bytes_copied;
226fbeb4075SMoni Shoua 		return 0;
227c1395a2aSHaggai Eran 	}
228c1395a2aSHaggai Eran 
229fbeb4075SMoni Shoua 	/* otherwise this a wrapped around wqe
230fbeb4075SMoni Shoua 	 * so read the remaining bytes starting
231fbeb4075SMoni Shoua 	 * from  wqe_index 0
232fbeb4075SMoni Shoua 	 */
233da9ee9d8SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem, buffer + bytes_copied,
234da9ee9d8SMoni Shoua 					   buflen - bytes_copied, 0, wq->offset,
235da9ee9d8SMoni Shoua 					   wq->wqe_cnt, wq->wqe_shift,
236fbeb4075SMoni Shoua 					   wqe_length - bytes_copied,
237fbeb4075SMoni Shoua 					   &bytes_copied2);
238c1395a2aSHaggai Eran 
239c1395a2aSHaggai Eran 	if (ret)
240c1395a2aSHaggai Eran 		return ret;
241fbeb4075SMoni Shoua 	*bc = bytes_copied + bytes_copied2;
242fbeb4075SMoni Shoua 	return 0;
243fbeb4075SMoni Shoua }
244c1395a2aSHaggai Eran 
245da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, void *buffer,
246da9ee9d8SMoni Shoua 			size_t buflen, size_t *bc)
247da9ee9d8SMoni Shoua {
248da9ee9d8SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
249da9ee9d8SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
250da9ee9d8SMoni Shoua 
251da9ee9d8SMoni Shoua 	if (buflen < sizeof(struct mlx5_wqe_ctrl_seg))
252da9ee9d8SMoni Shoua 		return -EINVAL;
253da9ee9d8SMoni Shoua 
254da9ee9d8SMoni Shoua 	if (!umem)
255da9ee9d8SMoni Shoua 		return mlx5_ib_read_kernel_wqe_sq(qp, wqe_index, buffer,
256da9ee9d8SMoni Shoua 						  buflen, bc);
257da9ee9d8SMoni Shoua 
258da9ee9d8SMoni Shoua 	return mlx5_ib_read_user_wqe_sq(qp, wqe_index, buffer, buflen, bc);
259da9ee9d8SMoni Shoua }
260da9ee9d8SMoni Shoua 
261da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, int wqe_index,
262da9ee9d8SMoni Shoua 				    void *buffer, size_t buflen, size_t *bc)
263fbeb4075SMoni Shoua {
264fbeb4075SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
265fbeb4075SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
266fbeb4075SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->rq;
267fbeb4075SMoni Shoua 	size_t bytes_copied;
268fbeb4075SMoni Shoua 	int ret;
269fbeb4075SMoni Shoua 
270da9ee9d8SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index,
271da9ee9d8SMoni Shoua 					   wq->offset, wq->wqe_cnt,
272da9ee9d8SMoni Shoua 					   wq->wqe_shift, buflen,
273fbeb4075SMoni Shoua 					   &bytes_copied);
274fbeb4075SMoni Shoua 
275fbeb4075SMoni Shoua 	if (ret)
276fbeb4075SMoni Shoua 		return ret;
277fbeb4075SMoni Shoua 	*bc = bytes_copied;
278fbeb4075SMoni Shoua 	return 0;
279fbeb4075SMoni Shoua }
280fbeb4075SMoni Shoua 
281da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_rq(struct mlx5_ib_qp *qp, int wqe_index, void *buffer,
282da9ee9d8SMoni Shoua 			size_t buflen, size_t *bc)
283da9ee9d8SMoni Shoua {
284da9ee9d8SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
285da9ee9d8SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
286da9ee9d8SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->rq;
287da9ee9d8SMoni Shoua 	size_t wqe_size = 1 << wq->wqe_shift;
288da9ee9d8SMoni Shoua 
289da9ee9d8SMoni Shoua 	if (buflen < wqe_size)
290da9ee9d8SMoni Shoua 		return -EINVAL;
291da9ee9d8SMoni Shoua 
292da9ee9d8SMoni Shoua 	if (!umem)
293da9ee9d8SMoni Shoua 		return -EOPNOTSUPP;
294da9ee9d8SMoni Shoua 
295da9ee9d8SMoni Shoua 	return mlx5_ib_read_user_wqe_rq(qp, wqe_index, buffer, buflen, bc);
296da9ee9d8SMoni Shoua }
297da9ee9d8SMoni Shoua 
298da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, int wqe_index,
299da9ee9d8SMoni Shoua 				     void *buffer, size_t buflen, size_t *bc)
300fbeb4075SMoni Shoua {
301fbeb4075SMoni Shoua 	struct ib_umem *umem = srq->umem;
302fbeb4075SMoni Shoua 	size_t bytes_copied;
303fbeb4075SMoni Shoua 	int ret;
304fbeb4075SMoni Shoua 
305da9ee9d8SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 0,
306da9ee9d8SMoni Shoua 					   srq->msrq.max, srq->msrq.wqe_shift,
307da9ee9d8SMoni Shoua 					   buflen, &bytes_copied);
308fbeb4075SMoni Shoua 
309fbeb4075SMoni Shoua 	if (ret)
310fbeb4075SMoni Shoua 		return ret;
311fbeb4075SMoni Shoua 	*bc = bytes_copied;
312fbeb4075SMoni Shoua 	return 0;
313c1395a2aSHaggai Eran }
314c1395a2aSHaggai Eran 
315da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_srq(struct mlx5_ib_srq *srq, int wqe_index, void *buffer,
316da9ee9d8SMoni Shoua 			 size_t buflen, size_t *bc)
317da9ee9d8SMoni Shoua {
318da9ee9d8SMoni Shoua 	struct ib_umem *umem = srq->umem;
319da9ee9d8SMoni Shoua 	size_t wqe_size = 1 << srq->msrq.wqe_shift;
320da9ee9d8SMoni Shoua 
321da9ee9d8SMoni Shoua 	if (buflen < wqe_size)
322da9ee9d8SMoni Shoua 		return -EINVAL;
323da9ee9d8SMoni Shoua 
324da9ee9d8SMoni Shoua 	if (!umem)
325da9ee9d8SMoni Shoua 		return -EOPNOTSUPP;
326da9ee9d8SMoni Shoua 
327da9ee9d8SMoni Shoua 	return mlx5_ib_read_user_wqe_srq(srq, wqe_index, buffer, buflen, bc);
328da9ee9d8SMoni Shoua }
329da9ee9d8SMoni Shoua 
330e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type)
331e126ba97SEli Cohen {
332e126ba97SEli Cohen 	struct ib_qp *ibqp = &to_mibqp(qp)->ibqp;
333e126ba97SEli Cohen 	struct ib_event event;
334e126ba97SEli Cohen 
33519098df2Smajd@mellanox.com 	if (type == MLX5_EVENT_TYPE_PATH_MIG) {
33619098df2Smajd@mellanox.com 		/* This event is only valid for trans_qps */
33719098df2Smajd@mellanox.com 		to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port;
33819098df2Smajd@mellanox.com 	}
339e126ba97SEli Cohen 
340e126ba97SEli Cohen 	if (ibqp->event_handler) {
341e126ba97SEli Cohen 		event.device     = ibqp->device;
342e126ba97SEli Cohen 		event.element.qp = ibqp;
343e126ba97SEli Cohen 		switch (type) {
344e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_PATH_MIG:
345e126ba97SEli Cohen 			event.event = IB_EVENT_PATH_MIG;
346e126ba97SEli Cohen 			break;
347e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_COMM_EST:
348e126ba97SEli Cohen 			event.event = IB_EVENT_COMM_EST;
349e126ba97SEli Cohen 			break;
350e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_SQ_DRAINED:
351e126ba97SEli Cohen 			event.event = IB_EVENT_SQ_DRAINED;
352e126ba97SEli Cohen 			break;
353e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
354e126ba97SEli Cohen 			event.event = IB_EVENT_QP_LAST_WQE_REACHED;
355e126ba97SEli Cohen 			break;
356e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
357e126ba97SEli Cohen 			event.event = IB_EVENT_QP_FATAL;
358e126ba97SEli Cohen 			break;
359e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
360e126ba97SEli Cohen 			event.event = IB_EVENT_PATH_MIG_ERR;
361e126ba97SEli Cohen 			break;
362e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
363e126ba97SEli Cohen 			event.event = IB_EVENT_QP_REQ_ERR;
364e126ba97SEli Cohen 			break;
365e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
366e126ba97SEli Cohen 			event.event = IB_EVENT_QP_ACCESS_ERR;
367e126ba97SEli Cohen 			break;
368e126ba97SEli Cohen 		default:
369e126ba97SEli Cohen 			pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn);
370e126ba97SEli Cohen 			return;
371e126ba97SEli Cohen 		}
372e126ba97SEli Cohen 
373e126ba97SEli Cohen 		ibqp->event_handler(&event, ibqp->qp_context);
374e126ba97SEli Cohen 	}
375e126ba97SEli Cohen }
376e126ba97SEli Cohen 
377e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap,
378e126ba97SEli Cohen 		       int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd)
379e126ba97SEli Cohen {
380e126ba97SEli Cohen 	int wqe_size;
381e126ba97SEli Cohen 	int wq_size;
382e126ba97SEli Cohen 
383e126ba97SEli Cohen 	/* Sanity check RQ size before proceeding */
384938fe83cSSaeed Mahameed 	if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)))
385e126ba97SEli Cohen 		return -EINVAL;
386e126ba97SEli Cohen 
387e126ba97SEli Cohen 	if (!has_rq) {
388e126ba97SEli Cohen 		qp->rq.max_gs = 0;
389e126ba97SEli Cohen 		qp->rq.wqe_cnt = 0;
390e126ba97SEli Cohen 		qp->rq.wqe_shift = 0;
3910540d814SNoa Osherovich 		cap->max_recv_wr = 0;
3920540d814SNoa Osherovich 		cap->max_recv_sge = 0;
393e126ba97SEli Cohen 	} else {
394e126ba97SEli Cohen 		if (ucmd) {
395e126ba97SEli Cohen 			qp->rq.wqe_cnt = ucmd->rq_wqe_count;
396002bf228SLeon Romanovsky 			if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift))
397002bf228SLeon Romanovsky 				return -EINVAL;
398e126ba97SEli Cohen 			qp->rq.wqe_shift = ucmd->rq_wqe_shift;
399002bf228SLeon Romanovsky 			if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig)
400002bf228SLeon Romanovsky 				return -EINVAL;
401e126ba97SEli Cohen 			qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig;
402e126ba97SEli Cohen 			qp->rq.max_post = qp->rq.wqe_cnt;
403e126ba97SEli Cohen 		} else {
404e126ba97SEli Cohen 			wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0;
405e126ba97SEli Cohen 			wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg);
406e126ba97SEli Cohen 			wqe_size = roundup_pow_of_two(wqe_size);
407e126ba97SEli Cohen 			wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size;
408e126ba97SEli Cohen 			wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB);
409e126ba97SEli Cohen 			qp->rq.wqe_cnt = wq_size / wqe_size;
410938fe83cSSaeed Mahameed 			if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) {
411e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "wqe_size %d, max %d\n",
412e126ba97SEli Cohen 					    wqe_size,
413938fe83cSSaeed Mahameed 					    MLX5_CAP_GEN(dev->mdev,
414938fe83cSSaeed Mahameed 							 max_wqe_sz_rq));
415e126ba97SEli Cohen 				return -EINVAL;
416e126ba97SEli Cohen 			}
417e126ba97SEli Cohen 			qp->rq.wqe_shift = ilog2(wqe_size);
418e126ba97SEli Cohen 			qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig;
419e126ba97SEli Cohen 			qp->rq.max_post = qp->rq.wqe_cnt;
420e126ba97SEli Cohen 		}
421e126ba97SEli Cohen 	}
422e126ba97SEli Cohen 
423e126ba97SEli Cohen 	return 0;
424e126ba97SEli Cohen }
425e126ba97SEli Cohen 
426f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr)
427e126ba97SEli Cohen {
428618af384SAndi Shyti 	int size = 0;
429e126ba97SEli Cohen 
430f0313965SErez Shitrit 	switch (attr->qp_type) {
431e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
432b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_xrc_seg);
433e126ba97SEli Cohen 		/* fall through */
434e126ba97SEli Cohen 	case IB_QPT_RC:
435e126ba97SEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
43675c1657eSLeon Romanovsky 			max(sizeof(struct mlx5_wqe_atomic_seg) +
43775c1657eSLeon Romanovsky 			    sizeof(struct mlx5_wqe_raddr_seg),
43875c1657eSLeon Romanovsky 			    sizeof(struct mlx5_wqe_umr_ctrl_seg) +
439064e5262SIdan Burstein 			    sizeof(struct mlx5_mkey_seg) +
440064e5262SIdan Burstein 			    MLX5_IB_SQ_UMR_INLINE_THRESHOLD /
441064e5262SIdan Burstein 			    MLX5_IB_UMR_OCTOWORD);
442e126ba97SEli Cohen 		break;
443e126ba97SEli Cohen 
444b125a54bSEli Cohen 	case IB_QPT_XRC_TGT:
445b125a54bSEli Cohen 		return 0;
446b125a54bSEli Cohen 
447e126ba97SEli Cohen 	case IB_QPT_UC:
448b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
44975c1657eSLeon Romanovsky 			max(sizeof(struct mlx5_wqe_raddr_seg),
4509e65dc37SEli Cohen 			    sizeof(struct mlx5_wqe_umr_ctrl_seg) +
45175c1657eSLeon Romanovsky 			    sizeof(struct mlx5_mkey_seg));
452e126ba97SEli Cohen 		break;
453e126ba97SEli Cohen 
454e126ba97SEli Cohen 	case IB_QPT_UD:
455f0313965SErez Shitrit 		if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)
456f0313965SErez Shitrit 			size += sizeof(struct mlx5_wqe_eth_pad) +
457f0313965SErez Shitrit 				sizeof(struct mlx5_wqe_eth_seg);
458f0313965SErez Shitrit 		/* fall through */
459e126ba97SEli Cohen 	case IB_QPT_SMI:
460d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
461b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
462e126ba97SEli Cohen 			sizeof(struct mlx5_wqe_datagram_seg);
463e126ba97SEli Cohen 		break;
464e126ba97SEli Cohen 
465e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
466b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
467e126ba97SEli Cohen 			sizeof(struct mlx5_wqe_umr_ctrl_seg) +
468e126ba97SEli Cohen 			sizeof(struct mlx5_mkey_seg);
469e126ba97SEli Cohen 		break;
470e126ba97SEli Cohen 
471e126ba97SEli Cohen 	default:
472e126ba97SEli Cohen 		return -EINVAL;
473e126ba97SEli Cohen 	}
474e126ba97SEli Cohen 
475e126ba97SEli Cohen 	return size;
476e126ba97SEli Cohen }
477e126ba97SEli Cohen 
478e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr)
479e126ba97SEli Cohen {
480e126ba97SEli Cohen 	int inl_size = 0;
481e126ba97SEli Cohen 	int size;
482e126ba97SEli Cohen 
483f0313965SErez Shitrit 	size = sq_overhead(attr);
484e126ba97SEli Cohen 	if (size < 0)
485e126ba97SEli Cohen 		return size;
486e126ba97SEli Cohen 
487e126ba97SEli Cohen 	if (attr->cap.max_inline_data) {
488e126ba97SEli Cohen 		inl_size = size + sizeof(struct mlx5_wqe_inline_seg) +
489e126ba97SEli Cohen 			attr->cap.max_inline_data;
490e126ba97SEli Cohen 	}
491e126ba97SEli Cohen 
492e126ba97SEli Cohen 	size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg);
493c0a6cbb9SIsrael Rukshin 	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN &&
494e1e66cc2SSagi Grimberg 	    ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE)
495e1e66cc2SSagi Grimberg 		return MLX5_SIG_WQE_SIZE;
496e1e66cc2SSagi Grimberg 	else
497e126ba97SEli Cohen 		return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB);
498e126ba97SEli Cohen }
499e126ba97SEli Cohen 
500288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size)
501288c01b7SEli Cohen {
502288c01b7SEli Cohen 	int max_sge;
503288c01b7SEli Cohen 
504288c01b7SEli Cohen 	if (attr->qp_type == IB_QPT_RC)
505288c01b7SEli Cohen 		max_sge = (min_t(int, wqe_size, 512) -
506288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_ctrl_seg) -
507288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_raddr_seg)) /
508288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
509288c01b7SEli Cohen 	else if (attr->qp_type == IB_QPT_XRC_INI)
510288c01b7SEli Cohen 		max_sge = (min_t(int, wqe_size, 512) -
511288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_ctrl_seg) -
512288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_xrc_seg) -
513288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_raddr_seg)) /
514288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
515288c01b7SEli Cohen 	else
516288c01b7SEli Cohen 		max_sge = (wqe_size - sq_overhead(attr)) /
517288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
518288c01b7SEli Cohen 
519288c01b7SEli Cohen 	return min_t(int, max_sge, wqe_size - sq_overhead(attr) /
520288c01b7SEli Cohen 		     sizeof(struct mlx5_wqe_data_seg));
521288c01b7SEli Cohen }
522288c01b7SEli Cohen 
523e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr,
524e126ba97SEli Cohen 			struct mlx5_ib_qp *qp)
525e126ba97SEli Cohen {
526e126ba97SEli Cohen 	int wqe_size;
527e126ba97SEli Cohen 	int wq_size;
528e126ba97SEli Cohen 
529e126ba97SEli Cohen 	if (!attr->cap.max_send_wr)
530e126ba97SEli Cohen 		return 0;
531e126ba97SEli Cohen 
532e126ba97SEli Cohen 	wqe_size = calc_send_wqe(attr);
533e126ba97SEli Cohen 	mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size);
534e126ba97SEli Cohen 	if (wqe_size < 0)
535e126ba97SEli Cohen 		return wqe_size;
536e126ba97SEli Cohen 
537938fe83cSSaeed Mahameed 	if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
538b125a54bSEli Cohen 		mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n",
539938fe83cSSaeed Mahameed 			    wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
540e126ba97SEli Cohen 		return -EINVAL;
541e126ba97SEli Cohen 	}
542e126ba97SEli Cohen 
543f0313965SErez Shitrit 	qp->max_inline_data = wqe_size - sq_overhead(attr) -
544e126ba97SEli Cohen 			      sizeof(struct mlx5_wqe_inline_seg);
545e126ba97SEli Cohen 	attr->cap.max_inline_data = qp->max_inline_data;
546e126ba97SEli Cohen 
547e126ba97SEli Cohen 	wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size);
548e126ba97SEli Cohen 	qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB;
549938fe83cSSaeed Mahameed 	if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
5501974ab9dSBart Van Assche 		mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n",
5511974ab9dSBart Van Assche 			    attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB,
552938fe83cSSaeed Mahameed 			    qp->sq.wqe_cnt,
553938fe83cSSaeed Mahameed 			    1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
554b125a54bSEli Cohen 		return -ENOMEM;
555b125a54bSEli Cohen 	}
556e126ba97SEli Cohen 	qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB);
557288c01b7SEli Cohen 	qp->sq.max_gs = get_send_sge(attr, wqe_size);
558288c01b7SEli Cohen 	if (qp->sq.max_gs < attr->cap.max_send_sge)
559288c01b7SEli Cohen 		return -ENOMEM;
560288c01b7SEli Cohen 
561288c01b7SEli Cohen 	attr->cap.max_send_sge = qp->sq.max_gs;
562b125a54bSEli Cohen 	qp->sq.max_post = wq_size / wqe_size;
563b125a54bSEli Cohen 	attr->cap.max_send_wr = qp->sq.max_post;
564e126ba97SEli Cohen 
565e126ba97SEli Cohen 	return wq_size;
566e126ba97SEli Cohen }
567e126ba97SEli Cohen 
568e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev,
569e126ba97SEli Cohen 			    struct mlx5_ib_qp *qp,
57019098df2Smajd@mellanox.com 			    struct mlx5_ib_create_qp *ucmd,
5710fb2ed66Smajd@mellanox.com 			    struct mlx5_ib_qp_base *base,
5720fb2ed66Smajd@mellanox.com 			    struct ib_qp_init_attr *attr)
573e126ba97SEli Cohen {
574e126ba97SEli Cohen 	int desc_sz = 1 << qp->sq.wqe_shift;
575e126ba97SEli Cohen 
576938fe83cSSaeed Mahameed 	if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
577e126ba97SEli Cohen 		mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n",
578938fe83cSSaeed Mahameed 			     desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
579e126ba97SEli Cohen 		return -EINVAL;
580e126ba97SEli Cohen 	}
581e126ba97SEli Cohen 
582af8b38edSGal Pressman 	if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) {
583af8b38edSGal Pressman 		mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n",
584af8b38edSGal Pressman 			     ucmd->sq_wqe_count);
585e126ba97SEli Cohen 		return -EINVAL;
586e126ba97SEli Cohen 	}
587e126ba97SEli Cohen 
588e126ba97SEli Cohen 	qp->sq.wqe_cnt = ucmd->sq_wqe_count;
589e126ba97SEli Cohen 
590938fe83cSSaeed Mahameed 	if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
591e126ba97SEli Cohen 		mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n",
592938fe83cSSaeed Mahameed 			     qp->sq.wqe_cnt,
593938fe83cSSaeed Mahameed 			     1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
594e126ba97SEli Cohen 		return -EINVAL;
595e126ba97SEli Cohen 	}
596e126ba97SEli Cohen 
597c2e53b2cSYishai Hadas 	if (attr->qp_type == IB_QPT_RAW_PACKET ||
598c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
5990fb2ed66Smajd@mellanox.com 		base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift;
6000fb2ed66Smajd@mellanox.com 		qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6;
6010fb2ed66Smajd@mellanox.com 	} else {
60219098df2Smajd@mellanox.com 		base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) +
603e126ba97SEli Cohen 					 (qp->sq.wqe_cnt << 6);
6040fb2ed66Smajd@mellanox.com 	}
605e126ba97SEli Cohen 
606e126ba97SEli Cohen 	return 0;
607e126ba97SEli Cohen }
608e126ba97SEli Cohen 
609e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr)
610e126ba97SEli Cohen {
611e126ba97SEli Cohen 	if (attr->qp_type == IB_QPT_XRC_INI ||
612e126ba97SEli Cohen 	    attr->qp_type == IB_QPT_XRC_TGT || attr->srq ||
613e126ba97SEli Cohen 	    attr->qp_type == MLX5_IB_QPT_REG_UMR ||
614e126ba97SEli Cohen 	    !attr->cap.max_recv_wr)
615e126ba97SEli Cohen 		return 0;
616e126ba97SEli Cohen 
617e126ba97SEli Cohen 	return 1;
618e126ba97SEli Cohen }
619e126ba97SEli Cohen 
6200b80c14fSEli Cohen enum {
6210b80c14fSEli Cohen 	/* this is the first blue flame register in the array of bfregs assigned
6220b80c14fSEli Cohen 	 * to a processes. Since we do not use it for blue flame but rather
6230b80c14fSEli Cohen 	 * regular 64 bit doorbells, we do not need a lock for maintaiing
6240b80c14fSEli Cohen 	 * "odd/even" order
6250b80c14fSEli Cohen 	 */
6260b80c14fSEli Cohen 	NUM_NON_BLUE_FLAME_BFREGS = 1,
6270b80c14fSEli Cohen };
6280b80c14fSEli Cohen 
629b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi)
630b037c29aSEli Cohen {
63131a78a5aSYishai Hadas 	return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR;
632b037c29aSEli Cohen }
633b037c29aSEli Cohen 
634b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev,
635b037c29aSEli Cohen 			 struct mlx5_bfreg_info *bfregi)
636c1be5232SEli Cohen {
637c1be5232SEli Cohen 	int n;
638c1be5232SEli Cohen 
639b037c29aSEli Cohen 	n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs -
640b037c29aSEli Cohen 	    NUM_NON_BLUE_FLAME_BFREGS;
641c1be5232SEli Cohen 
642c1be5232SEli Cohen 	return n >= 0 ? n : 0;
643c1be5232SEli Cohen }
644c1be5232SEli Cohen 
64518b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev,
64618b0362eSYishai Hadas 			   struct mlx5_bfreg_info *bfregi)
64718b0362eSYishai Hadas {
64818b0362eSYishai Hadas 	return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM;
64918b0362eSYishai Hadas }
65018b0362eSYishai Hadas 
651b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev,
652b037c29aSEli Cohen 			  struct mlx5_bfreg_info *bfregi)
653c1be5232SEli Cohen {
654c1be5232SEli Cohen 	int med;
655c1be5232SEli Cohen 
656b037c29aSEli Cohen 	med = num_med_bfreg(dev, bfregi);
657b037c29aSEli Cohen 	return ++med;
658c1be5232SEli Cohen }
659c1be5232SEli Cohen 
660b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev,
661b037c29aSEli Cohen 				  struct mlx5_bfreg_info *bfregi)
662e126ba97SEli Cohen {
663e126ba97SEli Cohen 	int i;
664e126ba97SEli Cohen 
665b037c29aSEli Cohen 	for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) {
666b037c29aSEli Cohen 		if (!bfregi->count[i]) {
6672f5ff264SEli Cohen 			bfregi->count[i]++;
668e126ba97SEli Cohen 			return i;
669e126ba97SEli Cohen 		}
670e126ba97SEli Cohen 	}
671e126ba97SEli Cohen 
672e126ba97SEli Cohen 	return -ENOMEM;
673e126ba97SEli Cohen }
674e126ba97SEli Cohen 
675b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev,
676b037c29aSEli Cohen 				 struct mlx5_bfreg_info *bfregi)
677e126ba97SEli Cohen {
67818b0362eSYishai Hadas 	int minidx = first_med_bfreg(dev, bfregi);
679e126ba97SEli Cohen 	int i;
680e126ba97SEli Cohen 
68118b0362eSYishai Hadas 	if (minidx < 0)
68218b0362eSYishai Hadas 		return minidx;
68318b0362eSYishai Hadas 
68418b0362eSYishai Hadas 	for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) {
6852f5ff264SEli Cohen 		if (bfregi->count[i] < bfregi->count[minidx])
686e126ba97SEli Cohen 			minidx = i;
6870b80c14fSEli Cohen 		if (!bfregi->count[minidx])
6880b80c14fSEli Cohen 			break;
689e126ba97SEli Cohen 	}
690e126ba97SEli Cohen 
6912f5ff264SEli Cohen 	bfregi->count[minidx]++;
692e126ba97SEli Cohen 	return minidx;
693e126ba97SEli Cohen }
694e126ba97SEli Cohen 
695b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev,
696ffaf58deSLeon Romanovsky 		       struct mlx5_bfreg_info *bfregi)
697e126ba97SEli Cohen {
698ffaf58deSLeon Romanovsky 	int bfregn = -ENOMEM;
699e126ba97SEli Cohen 
7000a2fd01cSYishai Hadas 	if (bfregi->lib_uar_dyn)
7010a2fd01cSYishai Hadas 		return -EINVAL;
7020a2fd01cSYishai Hadas 
7032f5ff264SEli Cohen 	mutex_lock(&bfregi->lock);
704ffaf58deSLeon Romanovsky 	if (bfregi->ver >= 2) {
705ffaf58deSLeon Romanovsky 		bfregn = alloc_high_class_bfreg(dev, bfregi);
706ffaf58deSLeon Romanovsky 		if (bfregn < 0)
707ffaf58deSLeon Romanovsky 			bfregn = alloc_med_class_bfreg(dev, bfregi);
708ffaf58deSLeon Romanovsky 	}
709ffaf58deSLeon Romanovsky 
710ffaf58deSLeon Romanovsky 	if (bfregn < 0) {
7110b80c14fSEli Cohen 		BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1);
7122f5ff264SEli Cohen 		bfregn = 0;
7132f5ff264SEli Cohen 		bfregi->count[bfregn]++;
714e126ba97SEli Cohen 	}
7152f5ff264SEli Cohen 	mutex_unlock(&bfregi->lock);
716e126ba97SEli Cohen 
7172f5ff264SEli Cohen 	return bfregn;
718e126ba97SEli Cohen }
719e126ba97SEli Cohen 
7204ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn)
721e126ba97SEli Cohen {
7222f5ff264SEli Cohen 	mutex_lock(&bfregi->lock);
723b037c29aSEli Cohen 	bfregi->count[bfregn]--;
7242f5ff264SEli Cohen 	mutex_unlock(&bfregi->lock);
725e126ba97SEli Cohen }
726e126ba97SEli Cohen 
727e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state)
728e126ba97SEli Cohen {
729e126ba97SEli Cohen 	switch (state) {
730e126ba97SEli Cohen 	case IB_QPS_RESET:	return MLX5_QP_STATE_RST;
731e126ba97SEli Cohen 	case IB_QPS_INIT:	return MLX5_QP_STATE_INIT;
732e126ba97SEli Cohen 	case IB_QPS_RTR:	return MLX5_QP_STATE_RTR;
733e126ba97SEli Cohen 	case IB_QPS_RTS:	return MLX5_QP_STATE_RTS;
734e126ba97SEli Cohen 	case IB_QPS_SQD:	return MLX5_QP_STATE_SQD;
735e126ba97SEli Cohen 	case IB_QPS_SQE:	return MLX5_QP_STATE_SQER;
736e126ba97SEli Cohen 	case IB_QPS_ERR:	return MLX5_QP_STATE_ERR;
737e126ba97SEli Cohen 	default:		return -1;
738e126ba97SEli Cohen 	}
739e126ba97SEli Cohen }
740e126ba97SEli Cohen 
741e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type)
742e126ba97SEli Cohen {
743e126ba97SEli Cohen 	switch (type) {
744e126ba97SEli Cohen 	case IB_QPT_RC:			return MLX5_QP_ST_RC;
745e126ba97SEli Cohen 	case IB_QPT_UC:			return MLX5_QP_ST_UC;
746e126ba97SEli Cohen 	case IB_QPT_UD:			return MLX5_QP_ST_UD;
747e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:	return MLX5_QP_ST_REG_UMR;
748e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
749e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:		return MLX5_QP_ST_XRC;
750e126ba97SEli Cohen 	case IB_QPT_SMI:		return MLX5_QP_ST_QP0;
751d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:	return MLX5_QP_ST_QP1;
752c32a4f29SMoni Shoua 	case MLX5_IB_QPT_DCI:		return MLX5_QP_ST_DCI;
753e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:		return MLX5_QP_ST_RAW_IPV6;
754e126ba97SEli Cohen 	case IB_QPT_RAW_PACKET:
7550fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_ETHERTYPE:	return MLX5_QP_ST_RAW_ETHERTYPE;
756e126ba97SEli Cohen 	case IB_QPT_MAX:
757e126ba97SEli Cohen 	default:		return -EINVAL;
758e126ba97SEli Cohen 	}
759e126ba97SEli Cohen }
760e126ba97SEli Cohen 
76189ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq,
76289ea94a7SMaor Gottlieb 			     struct mlx5_ib_cq *recv_cq);
76389ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq,
76489ea94a7SMaor Gottlieb 			       struct mlx5_ib_cq *recv_cq);
76589ea94a7SMaor Gottlieb 
7667c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev,
76705f58cebSLeon Romanovsky 			struct mlx5_bfreg_info *bfregi, u32 bfregn,
7681ee47ab3SYishai Hadas 			bool dyn_bfreg)
769e126ba97SEli Cohen {
77005f58cebSLeon Romanovsky 	unsigned int bfregs_per_sys_page;
77105f58cebSLeon Romanovsky 	u32 index_of_sys_page;
77205f58cebSLeon Romanovsky 	u32 offset;
773b037c29aSEli Cohen 
7740a2fd01cSYishai Hadas 	if (bfregi->lib_uar_dyn)
7750a2fd01cSYishai Hadas 		return -EINVAL;
7760a2fd01cSYishai Hadas 
777b037c29aSEli Cohen 	bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) *
778b037c29aSEli Cohen 				MLX5_NON_FP_BFREGS_PER_UAR;
779b037c29aSEli Cohen 	index_of_sys_page = bfregn / bfregs_per_sys_page;
780b037c29aSEli Cohen 
78105f58cebSLeon Romanovsky 	if (dyn_bfreg) {
78205f58cebSLeon Romanovsky 		index_of_sys_page += bfregi->num_static_sys_pages;
78305f58cebSLeon Romanovsky 
7847c043e90SYishai Hadas 		if (index_of_sys_page >= bfregi->num_sys_pages)
7857c043e90SYishai Hadas 			return -EINVAL;
7867c043e90SYishai Hadas 
7871ee47ab3SYishai Hadas 		if (bfregn > bfregi->num_dyn_bfregs ||
7881ee47ab3SYishai Hadas 		    bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) {
7891ee47ab3SYishai Hadas 			mlx5_ib_dbg(dev, "Invalid dynamic uar index\n");
7901ee47ab3SYishai Hadas 			return -EINVAL;
7911ee47ab3SYishai Hadas 		}
7921ee47ab3SYishai Hadas 	}
793b037c29aSEli Cohen 
7941ee47ab3SYishai Hadas 	offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR;
795b037c29aSEli Cohen 	return bfregi->sys_pages[index_of_sys_page] + offset;
796e126ba97SEli Cohen }
797e126ba97SEli Cohen 
798b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata,
79919098df2Smajd@mellanox.com 			    unsigned long addr, size_t size,
800b0ea0fa5SJason Gunthorpe 			    struct ib_umem **umem, int *npages, int *page_shift,
801b0ea0fa5SJason Gunthorpe 			    int *ncont, u32 *offset)
80219098df2Smajd@mellanox.com {
80319098df2Smajd@mellanox.com 	int err;
80419098df2Smajd@mellanox.com 
805c320e527SMoni Shoua 	*umem = ib_umem_get(&dev->ib_dev, addr, size, 0);
80619098df2Smajd@mellanox.com 	if (IS_ERR(*umem)) {
80719098df2Smajd@mellanox.com 		mlx5_ib_dbg(dev, "umem_get failed\n");
80819098df2Smajd@mellanox.com 		return PTR_ERR(*umem);
80919098df2Smajd@mellanox.com 	}
81019098df2Smajd@mellanox.com 
811762f899aSMajd Dibbiny 	mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL);
81219098df2Smajd@mellanox.com 
81319098df2Smajd@mellanox.com 	err = mlx5_ib_get_buf_offset(addr, *page_shift, offset);
81419098df2Smajd@mellanox.com 	if (err) {
81519098df2Smajd@mellanox.com 		mlx5_ib_warn(dev, "bad offset\n");
81619098df2Smajd@mellanox.com 		goto err_umem;
81719098df2Smajd@mellanox.com 	}
81819098df2Smajd@mellanox.com 
81919098df2Smajd@mellanox.com 	mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n",
82019098df2Smajd@mellanox.com 		    addr, size, *npages, *page_shift, *ncont, *offset);
82119098df2Smajd@mellanox.com 
82219098df2Smajd@mellanox.com 	return 0;
82319098df2Smajd@mellanox.com 
82419098df2Smajd@mellanox.com err_umem:
82519098df2Smajd@mellanox.com 	ib_umem_release(*umem);
82619098df2Smajd@mellanox.com 	*umem = NULL;
82719098df2Smajd@mellanox.com 
82819098df2Smajd@mellanox.com 	return err;
82919098df2Smajd@mellanox.com }
83019098df2Smajd@mellanox.com 
831fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
832bdeacabdSShamir Rabinovitch 			    struct mlx5_ib_rwq *rwq, struct ib_udata *udata)
83379b20a6cSYishai Hadas {
834bdeacabdSShamir Rabinovitch 	struct mlx5_ib_ucontext *context =
835bdeacabdSShamir Rabinovitch 		rdma_udata_to_drv_context(
836bdeacabdSShamir Rabinovitch 			udata,
837bdeacabdSShamir Rabinovitch 			struct mlx5_ib_ucontext,
838bdeacabdSShamir Rabinovitch 			ibucontext);
83979b20a6cSYishai Hadas 
840fe248c3aSMaor Gottlieb 	if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP)
841fe248c3aSMaor Gottlieb 		atomic_dec(&dev->delay_drop.rqs_cnt);
842fe248c3aSMaor Gottlieb 
84379b20a6cSYishai Hadas 	mlx5_ib_db_unmap_user(context, &rwq->db);
84479b20a6cSYishai Hadas 	ib_umem_release(rwq->umem);
84579b20a6cSYishai Hadas }
84679b20a6cSYishai Hadas 
84779b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
848b0ea0fa5SJason Gunthorpe 			  struct ib_udata *udata, struct mlx5_ib_rwq *rwq,
84979b20a6cSYishai Hadas 			  struct mlx5_ib_create_wq *ucmd)
85079b20a6cSYishai Hadas {
85189944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
85289944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
85379b20a6cSYishai Hadas 	int page_shift = 0;
85479b20a6cSYishai Hadas 	int npages;
85579b20a6cSYishai Hadas 	u32 offset = 0;
85679b20a6cSYishai Hadas 	int ncont = 0;
85779b20a6cSYishai Hadas 	int err;
85879b20a6cSYishai Hadas 
85979b20a6cSYishai Hadas 	if (!ucmd->buf_addr)
86079b20a6cSYishai Hadas 		return -EINVAL;
86179b20a6cSYishai Hadas 
862c320e527SMoni Shoua 	rwq->umem = ib_umem_get(&dev->ib_dev, ucmd->buf_addr, rwq->buf_size, 0);
86379b20a6cSYishai Hadas 	if (IS_ERR(rwq->umem)) {
86479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "umem_get failed\n");
86579b20a6cSYishai Hadas 		err = PTR_ERR(rwq->umem);
86679b20a6cSYishai Hadas 		return err;
86779b20a6cSYishai Hadas 	}
86879b20a6cSYishai Hadas 
869762f899aSMajd Dibbiny 	mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift,
87079b20a6cSYishai Hadas 			   &ncont, NULL);
87179b20a6cSYishai Hadas 	err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift,
87279b20a6cSYishai Hadas 				     &rwq->rq_page_offset);
87379b20a6cSYishai Hadas 	if (err) {
87479b20a6cSYishai Hadas 		mlx5_ib_warn(dev, "bad offset\n");
87579b20a6cSYishai Hadas 		goto err_umem;
87679b20a6cSYishai Hadas 	}
87779b20a6cSYishai Hadas 
87879b20a6cSYishai Hadas 	rwq->rq_num_pas = ncont;
87979b20a6cSYishai Hadas 	rwq->page_shift = page_shift;
88079b20a6cSYishai Hadas 	rwq->log_page_size =  page_shift - MLX5_ADAPTER_PAGE_SHIFT;
88179b20a6cSYishai Hadas 	rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE);
88279b20a6cSYishai Hadas 
88379b20a6cSYishai Hadas 	mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n",
88479b20a6cSYishai Hadas 		    (unsigned long long)ucmd->buf_addr, rwq->buf_size,
88579b20a6cSYishai Hadas 		    npages, page_shift, ncont, offset);
88679b20a6cSYishai Hadas 
88789944450SShamir Rabinovitch 	err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db);
88879b20a6cSYishai Hadas 	if (err) {
88979b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "map failed\n");
89079b20a6cSYishai Hadas 		goto err_umem;
89179b20a6cSYishai Hadas 	}
89279b20a6cSYishai Hadas 
89379b20a6cSYishai Hadas 	rwq->create_type = MLX5_WQ_USER;
89479b20a6cSYishai Hadas 	return 0;
89579b20a6cSYishai Hadas 
89679b20a6cSYishai Hadas err_umem:
89779b20a6cSYishai Hadas 	ib_umem_release(rwq->umem);
89879b20a6cSYishai Hadas 	return err;
89979b20a6cSYishai Hadas }
90079b20a6cSYishai Hadas 
901b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev,
902b037c29aSEli Cohen 			 struct mlx5_bfreg_info *bfregi, int bfregn)
903b037c29aSEli Cohen {
904b037c29aSEli Cohen 	return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR +
905b037c29aSEli Cohen 				bfregn % MLX5_NON_FP_BFREGS_PER_UAR;
906b037c29aSEli Cohen }
907b037c29aSEli Cohen 
908e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd,
909e126ba97SEli Cohen 			  struct mlx5_ib_qp *qp, struct ib_udata *udata,
9100fb2ed66Smajd@mellanox.com 			  struct ib_qp_init_attr *attr,
91109a7d9ecSSaeed Mahameed 			  u32 **in,
91219098df2Smajd@mellanox.com 			  struct mlx5_ib_create_qp_resp *resp, int *inlen,
91319098df2Smajd@mellanox.com 			  struct mlx5_ib_qp_base *base)
914e126ba97SEli Cohen {
915e126ba97SEli Cohen 	struct mlx5_ib_ucontext *context;
916e126ba97SEli Cohen 	struct mlx5_ib_create_qp ucmd;
91719098df2Smajd@mellanox.com 	struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer;
9189e9c47d0SEli Cohen 	int page_shift = 0;
9191ee47ab3SYishai Hadas 	int uar_index = 0;
920e126ba97SEli Cohen 	int npages;
9219e9c47d0SEli Cohen 	u32 offset = 0;
9222f5ff264SEli Cohen 	int bfregn;
9239e9c47d0SEli Cohen 	int ncont = 0;
92409a7d9ecSSaeed Mahameed 	__be64 *pas;
92509a7d9ecSSaeed Mahameed 	void *qpc;
926e126ba97SEli Cohen 	int err;
9275aa3771dSYishai Hadas 	u16 uid;
928ac42a5eeSYishai Hadas 	u32 uar_flags;
929e126ba97SEli Cohen 
930e126ba97SEli Cohen 	err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd));
931e126ba97SEli Cohen 	if (err) {
932e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "copy failed\n");
933e126ba97SEli Cohen 		return err;
934e126ba97SEli Cohen 	}
935e126ba97SEli Cohen 
93689944450SShamir Rabinovitch 	context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext,
93789944450SShamir Rabinovitch 					    ibucontext);
938ac42a5eeSYishai Hadas 	uar_flags = ucmd.flags & (MLX5_QP_FLAG_UAR_PAGE_INDEX |
939ac42a5eeSYishai Hadas 				  MLX5_QP_FLAG_BFREG_INDEX);
940ac42a5eeSYishai Hadas 	switch (uar_flags) {
941ac42a5eeSYishai Hadas 	case MLX5_QP_FLAG_UAR_PAGE_INDEX:
942ac42a5eeSYishai Hadas 		uar_index = ucmd.bfreg_index;
943ac42a5eeSYishai Hadas 		bfregn = MLX5_IB_INVALID_BFREG;
944ac42a5eeSYishai Hadas 		break;
945ac42a5eeSYishai Hadas 	case MLX5_QP_FLAG_BFREG_INDEX:
9461ee47ab3SYishai Hadas 		uar_index = bfregn_to_uar_index(dev, &context->bfregi,
9471ee47ab3SYishai Hadas 						ucmd.bfreg_index, true);
9481ee47ab3SYishai Hadas 		if (uar_index < 0)
9491ee47ab3SYishai Hadas 			return uar_index;
9501ee47ab3SYishai Hadas 		bfregn = MLX5_IB_INVALID_BFREG;
951ac42a5eeSYishai Hadas 		break;
952ac42a5eeSYishai Hadas 	case 0:
953ac42a5eeSYishai Hadas 		if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
954ac42a5eeSYishai Hadas 			return -EINVAL;
955ffaf58deSLeon Romanovsky 		bfregn = alloc_bfreg(dev, &context->bfregi);
956ffaf58deSLeon Romanovsky 		if (bfregn < 0)
9572f5ff264SEli Cohen 			return bfregn;
958ac42a5eeSYishai Hadas 		break;
959ac42a5eeSYishai Hadas 	default:
960ac42a5eeSYishai Hadas 		return -EINVAL;
961e126ba97SEli Cohen 	}
962e126ba97SEli Cohen 
9632f5ff264SEli Cohen 	mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index);
9641ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
9651ee47ab3SYishai Hadas 		uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn,
9661ee47ab3SYishai Hadas 						false);
967e126ba97SEli Cohen 
96848fea837SHaggai Eran 	qp->rq.offset = 0;
96948fea837SHaggai Eran 	qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB);
97048fea837SHaggai Eran 	qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift;
97148fea837SHaggai Eran 
9720fb2ed66Smajd@mellanox.com 	err = set_user_buf_size(dev, qp, &ucmd, base, attr);
973e126ba97SEli Cohen 	if (err)
9742f5ff264SEli Cohen 		goto err_bfreg;
975e126ba97SEli Cohen 
97619098df2Smajd@mellanox.com 	if (ucmd.buf_addr && ubuffer->buf_size) {
97719098df2Smajd@mellanox.com 		ubuffer->buf_addr = ucmd.buf_addr;
978b0ea0fa5SJason Gunthorpe 		err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr,
979b0ea0fa5SJason Gunthorpe 				       ubuffer->buf_size, &ubuffer->umem,
980b0ea0fa5SJason Gunthorpe 				       &npages, &page_shift, &ncont, &offset);
98119098df2Smajd@mellanox.com 		if (err)
9822f5ff264SEli Cohen 			goto err_bfreg;
9839e9c47d0SEli Cohen 	} else {
98419098df2Smajd@mellanox.com 		ubuffer->umem = NULL;
9859e9c47d0SEli Cohen 	}
986e126ba97SEli Cohen 
98709a7d9ecSSaeed Mahameed 	*inlen = MLX5_ST_SZ_BYTES(create_qp_in) +
98809a7d9ecSSaeed Mahameed 		 MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont;
9891b9a07eeSLeon Romanovsky 	*in = kvzalloc(*inlen, GFP_KERNEL);
990e126ba97SEli Cohen 	if (!*in) {
991e126ba97SEli Cohen 		err = -ENOMEM;
992e126ba97SEli Cohen 		goto err_umem;
993e126ba97SEli Cohen 	}
994e126ba97SEli Cohen 
9957422edceSYishai Hadas 	uid = (attr->qp_type != IB_QPT_XRC_TGT &&
9967422edceSYishai Hadas 	       attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0;
9975aa3771dSYishai Hadas 	MLX5_SET(create_qp_in, *in, uid, uid);
99809a7d9ecSSaeed Mahameed 	pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas);
99909a7d9ecSSaeed Mahameed 	if (ubuffer->umem)
100009a7d9ecSSaeed Mahameed 		mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0);
100109a7d9ecSSaeed Mahameed 
100209a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
100309a7d9ecSSaeed Mahameed 
100409a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT);
100509a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, page_offset, offset);
100609a7d9ecSSaeed Mahameed 
100709a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, uar_page, uar_index);
10081ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
1009b037c29aSEli Cohen 		resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn);
10101ee47ab3SYishai Hadas 	else
10111ee47ab3SYishai Hadas 		resp->bfreg_index = MLX5_IB_INVALID_BFREG;
10122f5ff264SEli Cohen 	qp->bfregn = bfregn;
1013e126ba97SEli Cohen 
1014b0ea0fa5SJason Gunthorpe 	err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db);
1015e126ba97SEli Cohen 	if (err) {
1016e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "map failed\n");
1017e126ba97SEli Cohen 		goto err_free;
1018e126ba97SEli Cohen 	}
1019e126ba97SEli Cohen 
102041d902cbSJason Gunthorpe 	err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp)));
1021e126ba97SEli Cohen 	if (err) {
1022e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "copy failed\n");
1023e126ba97SEli Cohen 		goto err_unmap;
1024e126ba97SEli Cohen 	}
1025e126ba97SEli Cohen 	qp->create_type = MLX5_QP_USER;
1026e126ba97SEli Cohen 
1027e126ba97SEli Cohen 	return 0;
1028e126ba97SEli Cohen 
1029e126ba97SEli Cohen err_unmap:
1030e126ba97SEli Cohen 	mlx5_ib_db_unmap_user(context, &qp->db);
1031e126ba97SEli Cohen 
1032e126ba97SEli Cohen err_free:
1033479163f4SAl Viro 	kvfree(*in);
1034e126ba97SEli Cohen 
1035e126ba97SEli Cohen err_umem:
103619098df2Smajd@mellanox.com 	ib_umem_release(ubuffer->umem);
1037e126ba97SEli Cohen 
10382f5ff264SEli Cohen err_bfreg:
10391ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
10404ed131d0SYishai Hadas 		mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn);
1041e126ba97SEli Cohen 	return err;
1042e126ba97SEli Cohen }
1043e126ba97SEli Cohen 
1044b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd,
1045bdeacabdSShamir Rabinovitch 			    struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base,
1046bdeacabdSShamir Rabinovitch 			    struct ib_udata *udata)
1047e126ba97SEli Cohen {
1048bdeacabdSShamir Rabinovitch 	struct mlx5_ib_ucontext *context =
1049bdeacabdSShamir Rabinovitch 		rdma_udata_to_drv_context(
1050bdeacabdSShamir Rabinovitch 			udata,
1051bdeacabdSShamir Rabinovitch 			struct mlx5_ib_ucontext,
1052bdeacabdSShamir Rabinovitch 			ibucontext);
1053e126ba97SEli Cohen 
1054e126ba97SEli Cohen 	mlx5_ib_db_unmap_user(context, &qp->db);
105519098df2Smajd@mellanox.com 	ib_umem_release(base->ubuffer.umem);
10561ee47ab3SYishai Hadas 
10571ee47ab3SYishai Hadas 	/*
10581ee47ab3SYishai Hadas 	 * Free only the BFREGs which are handled by the kernel.
10591ee47ab3SYishai Hadas 	 * BFREGs of UARs allocated dynamically are handled by user.
10601ee47ab3SYishai Hadas 	 */
10611ee47ab3SYishai Hadas 	if (qp->bfregn != MLX5_IB_INVALID_BFREG)
10624ed131d0SYishai Hadas 		mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn);
1063e126ba97SEli Cohen }
1064e126ba97SEli Cohen 
106534f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge.
106634f4c955SGuy Levi  *
106734f4c955SGuy Levi  * An 'edge' is defined as the first following address after the end
106834f4c955SGuy Levi  * of the fragment or the SQ. Accordingly, during the WQE construction
106934f4c955SGuy Levi  * which repetitively increases the pointer to write the next data, it
107034f4c955SGuy Levi  * simply should check if it gets to an edge.
107134f4c955SGuy Levi  *
107234f4c955SGuy Levi  * @sq - SQ buffer.
107334f4c955SGuy Levi  * @idx - Stride index in the SQ buffer.
107434f4c955SGuy Levi  *
107534f4c955SGuy Levi  * Return:
107634f4c955SGuy Levi  *	The new edge.
107734f4c955SGuy Levi  */
107834f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx)
107934f4c955SGuy Levi {
108034f4c955SGuy Levi 	void *fragment_end;
108134f4c955SGuy Levi 
108234f4c955SGuy Levi 	fragment_end = mlx5_frag_buf_get_wqe
108334f4c955SGuy Levi 		(&sq->fbc,
108434f4c955SGuy Levi 		 mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx));
108534f4c955SGuy Levi 
108634f4c955SGuy Levi 	return fragment_end + MLX5_SEND_WQE_BB;
108734f4c955SGuy Levi }
108834f4c955SGuy Levi 
1089e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev,
1090e126ba97SEli Cohen 			    struct ib_qp_init_attr *init_attr,
1091e126ba97SEli Cohen 			    struct mlx5_ib_qp *qp,
109209a7d9ecSSaeed Mahameed 			    u32 **in, int *inlen,
109319098df2Smajd@mellanox.com 			    struct mlx5_ib_qp_base *base)
1094e126ba97SEli Cohen {
1095e126ba97SEli Cohen 	int uar_index;
109609a7d9ecSSaeed Mahameed 	void *qpc;
1097e126ba97SEli Cohen 	int err;
1098e126ba97SEli Cohen 
1099c0a6cbb9SIsrael Rukshin 	if (init_attr->create_flags & ~(IB_QP_CREATE_INTEGRITY_EN |
1100f0313965SErez Shitrit 					IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK |
1101b11a4f9cSHaggai Eran 					IB_QP_CREATE_IPOIB_UD_LSO |
110293d576afSErez Shitrit 					IB_QP_CREATE_NETIF_QP |
110311f552e2SMichael Guralnik 					MLX5_IB_QP_CREATE_SQPN_QP1 |
110411f552e2SMichael Guralnik 					MLX5_IB_QP_CREATE_WC_TEST))
11051a4c3a3dSEli Cohen 		return -EINVAL;
1106e126ba97SEli Cohen 
1107e126ba97SEli Cohen 	if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR)
11085fe9dec0SEli Cohen 		qp->bf.bfreg = &dev->fp_bfreg;
110911f552e2SMichael Guralnik 	else if (init_attr->create_flags & MLX5_IB_QP_CREATE_WC_TEST)
111011f552e2SMichael Guralnik 		qp->bf.bfreg = &dev->wc_bfreg;
11115fe9dec0SEli Cohen 	else
11125fe9dec0SEli Cohen 		qp->bf.bfreg = &dev->bfreg;
1113e126ba97SEli Cohen 
1114d8030b0dSEli Cohen 	/* We need to divide by two since each register is comprised of
1115d8030b0dSEli Cohen 	 * two buffers of identical size, namely odd and even
1116d8030b0dSEli Cohen 	 */
1117d8030b0dSEli Cohen 	qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2;
11185fe9dec0SEli Cohen 	uar_index = qp->bf.bfreg->index;
1119e126ba97SEli Cohen 
1120e126ba97SEli Cohen 	err = calc_sq_size(dev, init_attr, qp);
1121e126ba97SEli Cohen 	if (err < 0) {
1122e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
11235fe9dec0SEli Cohen 		return err;
1124e126ba97SEli Cohen 	}
1125e126ba97SEli Cohen 
1126e126ba97SEli Cohen 	qp->rq.offset = 0;
1127e126ba97SEli Cohen 	qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift;
112819098df2Smajd@mellanox.com 	base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift);
1129e126ba97SEli Cohen 
113034f4c955SGuy Levi 	err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size,
113134f4c955SGuy Levi 				       &qp->buf, dev->mdev->priv.numa_node);
1132e126ba97SEli Cohen 	if (err) {
1133e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
11345fe9dec0SEli Cohen 		return err;
1135e126ba97SEli Cohen 	}
1136e126ba97SEli Cohen 
113734f4c955SGuy Levi 	if (qp->rq.wqe_cnt)
113834f4c955SGuy Levi 		mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift,
113934f4c955SGuy Levi 			      ilog2(qp->rq.wqe_cnt), &qp->rq.fbc);
114034f4c955SGuy Levi 
114134f4c955SGuy Levi 	if (qp->sq.wqe_cnt) {
114234f4c955SGuy Levi 		int sq_strides_offset = (qp->sq.offset  & (PAGE_SIZE - 1)) /
114334f4c955SGuy Levi 					MLX5_SEND_WQE_BB;
114434f4c955SGuy Levi 		mlx5_init_fbc_offset(qp->buf.frags +
114534f4c955SGuy Levi 				     (qp->sq.offset / PAGE_SIZE),
114634f4c955SGuy Levi 				     ilog2(MLX5_SEND_WQE_BB),
114734f4c955SGuy Levi 				     ilog2(qp->sq.wqe_cnt),
114834f4c955SGuy Levi 				     sq_strides_offset, &qp->sq.fbc);
114934f4c955SGuy Levi 
115034f4c955SGuy Levi 		qp->sq.cur_edge = get_sq_edge(&qp->sq, 0);
115134f4c955SGuy Levi 	}
115234f4c955SGuy Levi 
115309a7d9ecSSaeed Mahameed 	*inlen = MLX5_ST_SZ_BYTES(create_qp_in) +
115409a7d9ecSSaeed Mahameed 		 MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages;
11551b9a07eeSLeon Romanovsky 	*in = kvzalloc(*inlen, GFP_KERNEL);
1156e126ba97SEli Cohen 	if (!*in) {
1157e126ba97SEli Cohen 		err = -ENOMEM;
1158e126ba97SEli Cohen 		goto err_buf;
1159e126ba97SEli Cohen 	}
116009a7d9ecSSaeed Mahameed 
116109a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
116209a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, uar_page, uar_index);
116309a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);
116409a7d9ecSSaeed Mahameed 
1165e126ba97SEli Cohen 	/* Set "fast registration enabled" for all kernel QPs */
116609a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, fre, 1);
116709a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, rlky, 1);
1168e126ba97SEli Cohen 
11693f89b01fSMichael Guralnik 	if (init_attr->create_flags & MLX5_IB_QP_CREATE_SQPN_QP1) {
117009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, deth_sqpn, 1);
1171b11a4f9cSHaggai Eran 		qp->flags |= MLX5_IB_QP_SQPN_QP1;
1172b11a4f9cSHaggai Eran 	}
1173b11a4f9cSHaggai Eran 
117434f4c955SGuy Levi 	mlx5_fill_page_frag_array(&qp->buf,
117534f4c955SGuy Levi 				  (__be64 *)MLX5_ADDR_OF(create_qp_in,
117634f4c955SGuy Levi 							 *in, pas));
1177e126ba97SEli Cohen 
11789603b61dSJack Morgenstein 	err = mlx5_db_alloc(dev->mdev, &qp->db);
1179e126ba97SEli Cohen 	if (err) {
1180e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
1181e126ba97SEli Cohen 		goto err_free;
1182e126ba97SEli Cohen 	}
1183e126ba97SEli Cohen 
1184b5883008SLi Dongyang 	qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt,
1185b5883008SLi Dongyang 				     sizeof(*qp->sq.wrid), GFP_KERNEL);
1186b5883008SLi Dongyang 	qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt,
1187b5883008SLi Dongyang 					sizeof(*qp->sq.wr_data), GFP_KERNEL);
1188b5883008SLi Dongyang 	qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt,
1189b5883008SLi Dongyang 				     sizeof(*qp->rq.wrid), GFP_KERNEL);
1190b5883008SLi Dongyang 	qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt,
1191b5883008SLi Dongyang 				       sizeof(*qp->sq.w_list), GFP_KERNEL);
1192b5883008SLi Dongyang 	qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt,
1193b5883008SLi Dongyang 					 sizeof(*qp->sq.wqe_head), GFP_KERNEL);
1194e126ba97SEli Cohen 
1195e126ba97SEli Cohen 	if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid ||
1196e126ba97SEli Cohen 	    !qp->sq.w_list || !qp->sq.wqe_head) {
1197e126ba97SEli Cohen 		err = -ENOMEM;
1198e126ba97SEli Cohen 		goto err_wrid;
1199e126ba97SEli Cohen 	}
1200e126ba97SEli Cohen 	qp->create_type = MLX5_QP_KERNEL;
1201e126ba97SEli Cohen 
1202e126ba97SEli Cohen 	return 0;
1203e126ba97SEli Cohen 
1204e126ba97SEli Cohen err_wrid:
1205b5883008SLi Dongyang 	kvfree(qp->sq.wqe_head);
1206b5883008SLi Dongyang 	kvfree(qp->sq.w_list);
1207b5883008SLi Dongyang 	kvfree(qp->sq.wrid);
1208b5883008SLi Dongyang 	kvfree(qp->sq.wr_data);
1209b5883008SLi Dongyang 	kvfree(qp->rq.wrid);
1210f4044dacSEli Cohen 	mlx5_db_free(dev->mdev, &qp->db);
1211e126ba97SEli Cohen 
1212e126ba97SEli Cohen err_free:
1213479163f4SAl Viro 	kvfree(*in);
1214e126ba97SEli Cohen 
1215e126ba97SEli Cohen err_buf:
121634f4c955SGuy Levi 	mlx5_frag_buf_free(dev->mdev, &qp->buf);
1217e126ba97SEli Cohen 	return err;
1218e126ba97SEli Cohen }
1219e126ba97SEli Cohen 
1220e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp)
1221e126ba97SEli Cohen {
1222b5883008SLi Dongyang 	kvfree(qp->sq.wqe_head);
1223b5883008SLi Dongyang 	kvfree(qp->sq.w_list);
1224b5883008SLi Dongyang 	kvfree(qp->sq.wrid);
1225b5883008SLi Dongyang 	kvfree(qp->sq.wr_data);
1226b5883008SLi Dongyang 	kvfree(qp->rq.wrid);
1227f4044dacSEli Cohen 	mlx5_db_free(dev->mdev, &qp->db);
122834f4c955SGuy Levi 	mlx5_frag_buf_free(dev->mdev, &qp->buf);
1229e126ba97SEli Cohen }
1230e126ba97SEli Cohen 
123109a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr)
1232e126ba97SEli Cohen {
1233e126ba97SEli Cohen 	if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) ||
1234c32a4f29SMoni Shoua 	    (attr->qp_type == MLX5_IB_QPT_DCI) ||
1235e126ba97SEli Cohen 	    (attr->qp_type == IB_QPT_XRC_INI))
123609a7d9ecSSaeed Mahameed 		return MLX5_SRQ_RQ;
1237e126ba97SEli Cohen 	else if (!qp->has_rq)
123809a7d9ecSSaeed Mahameed 		return MLX5_ZERO_LEN_RQ;
1239e126ba97SEli Cohen 	else
124009a7d9ecSSaeed Mahameed 		return MLX5_NON_ZERO_RQ;
1241e126ba97SEli Cohen }
1242e126ba97SEli Cohen 
1243e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type)
1244e126ba97SEli Cohen {
12455d6ff1baSYonatan Cohen 	if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC ||
12465d6ff1baSYonatan Cohen 	    qp_type == MLX5_IB_QPT_DCI)
1247e126ba97SEli Cohen 		return 1;
1248e126ba97SEli Cohen 
1249e126ba97SEli Cohen 	return 0;
1250e126ba97SEli Cohen }
1251e126ba97SEli Cohen 
12520fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
1253c2e53b2cSYishai Hadas 				    struct mlx5_ib_qp *qp,
12541cd6dbd3SYishai Hadas 				    struct mlx5_ib_sq *sq, u32 tdn,
12551cd6dbd3SYishai Hadas 				    struct ib_pd *pd)
12560fb2ed66Smajd@mellanox.com {
1257c4f287c4SSaeed Mahameed 	u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0};
12580fb2ed66Smajd@mellanox.com 	void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
12590fb2ed66Smajd@mellanox.com 
12601cd6dbd3SYishai Hadas 	MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid);
12610fb2ed66Smajd@mellanox.com 	MLX5_SET(tisc, tisc, transport_domain, tdn);
1262c2e53b2cSYishai Hadas 	if (qp->flags & MLX5_IB_QP_UNDERLAY)
1263c2e53b2cSYishai Hadas 		MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn);
1264c2e53b2cSYishai Hadas 
12650fb2ed66Smajd@mellanox.com 	return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn);
12660fb2ed66Smajd@mellanox.com }
12670fb2ed66Smajd@mellanox.com 
12680fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
12691cd6dbd3SYishai Hadas 				      struct mlx5_ib_sq *sq, struct ib_pd *pd)
12700fb2ed66Smajd@mellanox.com {
12711cd6dbd3SYishai Hadas 	mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid);
12720fb2ed66Smajd@mellanox.com }
12730fb2ed66Smajd@mellanox.com 
1274d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq)
1275b96c9ddeSMark Bloch {
1276b96c9ddeSMark Bloch 	if (sq->flow_rule)
1277b96c9ddeSMark Bloch 		mlx5_del_flow_rules(sq->flow_rule);
1278d5ed8ac3SMark Bloch 	sq->flow_rule = NULL;
1279b96c9ddeSMark Bloch }
1280b96c9ddeSMark Bloch 
12810fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
1282b0ea0fa5SJason Gunthorpe 				   struct ib_udata *udata,
12830fb2ed66Smajd@mellanox.com 				   struct mlx5_ib_sq *sq, void *qpin,
12840fb2ed66Smajd@mellanox.com 				   struct ib_pd *pd)
12850fb2ed66Smajd@mellanox.com {
12860fb2ed66Smajd@mellanox.com 	struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer;
12870fb2ed66Smajd@mellanox.com 	__be64 *pas;
12880fb2ed66Smajd@mellanox.com 	void *in;
12890fb2ed66Smajd@mellanox.com 	void *sqc;
12900fb2ed66Smajd@mellanox.com 	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
12910fb2ed66Smajd@mellanox.com 	void *wq;
12920fb2ed66Smajd@mellanox.com 	int inlen;
12930fb2ed66Smajd@mellanox.com 	int err;
12940fb2ed66Smajd@mellanox.com 	int page_shift = 0;
12950fb2ed66Smajd@mellanox.com 	int npages;
12960fb2ed66Smajd@mellanox.com 	int ncont = 0;
12970fb2ed66Smajd@mellanox.com 	u32 offset = 0;
12980fb2ed66Smajd@mellanox.com 
1299b0ea0fa5SJason Gunthorpe 	err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size,
1300b0ea0fa5SJason Gunthorpe 			       &sq->ubuffer.umem, &npages, &page_shift, &ncont,
1301b0ea0fa5SJason Gunthorpe 			       &offset);
13020fb2ed66Smajd@mellanox.com 	if (err)
13030fb2ed66Smajd@mellanox.com 		return err;
13040fb2ed66Smajd@mellanox.com 
13050fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont;
13061b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
13070fb2ed66Smajd@mellanox.com 	if (!in) {
13080fb2ed66Smajd@mellanox.com 		err = -ENOMEM;
13090fb2ed66Smajd@mellanox.com 		goto err_umem;
13100fb2ed66Smajd@mellanox.com 	}
13110fb2ed66Smajd@mellanox.com 
1312c14003f0SYishai Hadas 	MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid);
13130fb2ed66Smajd@mellanox.com 	sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
13140fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, flush_in_error_en, 1);
1315795b609cSBodong Wang 	if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe))
1316795b609cSBodong Wang 		MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1);
13170fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
13180fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index));
13190fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd));
13200fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, tis_lst_sz, 1);
13210fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, tis_num_0, sq->tisn);
132296dc3fc5SNoa Osherovich 	if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
132396dc3fc5SNoa Osherovich 	    MLX5_CAP_ETH(dev->mdev, swp))
132496dc3fc5SNoa Osherovich 		MLX5_SET(sqc, sqc, allow_swp, 1);
13250fb2ed66Smajd@mellanox.com 
13260fb2ed66Smajd@mellanox.com 	wq = MLX5_ADDR_OF(sqc, sqc, wq);
13270fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
13280fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
13290fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page));
13300fb2ed66Smajd@mellanox.com 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
13310fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB));
13320fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));
13330fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_pg_sz,  page_shift - MLX5_ADAPTER_PAGE_SHIFT);
13340fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, page_offset, offset);
13350fb2ed66Smajd@mellanox.com 
13360fb2ed66Smajd@mellanox.com 	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
13370fb2ed66Smajd@mellanox.com 	mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0);
13380fb2ed66Smajd@mellanox.com 
13390fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp);
13400fb2ed66Smajd@mellanox.com 
13410fb2ed66Smajd@mellanox.com 	kvfree(in);
13420fb2ed66Smajd@mellanox.com 
13430fb2ed66Smajd@mellanox.com 	if (err)
13440fb2ed66Smajd@mellanox.com 		goto err_umem;
13450fb2ed66Smajd@mellanox.com 
13460fb2ed66Smajd@mellanox.com 	return 0;
13470fb2ed66Smajd@mellanox.com 
13480fb2ed66Smajd@mellanox.com err_umem:
13490fb2ed66Smajd@mellanox.com 	ib_umem_release(sq->ubuffer.umem);
13500fb2ed66Smajd@mellanox.com 	sq->ubuffer.umem = NULL;
13510fb2ed66Smajd@mellanox.com 
13520fb2ed66Smajd@mellanox.com 	return err;
13530fb2ed66Smajd@mellanox.com }
13540fb2ed66Smajd@mellanox.com 
13550fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
13560fb2ed66Smajd@mellanox.com 				     struct mlx5_ib_sq *sq)
13570fb2ed66Smajd@mellanox.com {
1358d5ed8ac3SMark Bloch 	destroy_flow_rule_vport_sq(sq);
13590fb2ed66Smajd@mellanox.com 	mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp);
13600fb2ed66Smajd@mellanox.com 	ib_umem_release(sq->ubuffer.umem);
13610fb2ed66Smajd@mellanox.com }
13620fb2ed66Smajd@mellanox.com 
13632c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc)
13640fb2ed66Smajd@mellanox.com {
13650fb2ed66Smajd@mellanox.com 	u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12;
13660fb2ed66Smajd@mellanox.com 	u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride);
13670fb2ed66Smajd@mellanox.com 	u32 log_rq_size   = MLX5_GET(qpc, qpc, log_rq_size);
13680fb2ed66Smajd@mellanox.com 	u32 page_offset   = MLX5_GET(qpc, qpc, page_offset);
13690fb2ed66Smajd@mellanox.com 	u32 po_quanta	  = 1 << (log_page_size - 6);
13700fb2ed66Smajd@mellanox.com 	u32 rq_sz	  = 1 << (log_rq_size + 4 + log_rq_stride);
13710fb2ed66Smajd@mellanox.com 	u32 page_size	  = 1 << log_page_size;
13720fb2ed66Smajd@mellanox.com 	u32 rq_sz_po      = rq_sz + (page_offset * po_quanta);
13730fb2ed66Smajd@mellanox.com 	u32 rq_num_pas	  = (rq_sz_po + page_size - 1) / page_size;
13740fb2ed66Smajd@mellanox.com 
13750fb2ed66Smajd@mellanox.com 	return rq_num_pas * sizeof(u64);
13760fb2ed66Smajd@mellanox.com }
13770fb2ed66Smajd@mellanox.com 
13780fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
13792c292dbbSBoris Pismenny 				   struct mlx5_ib_rq *rq, void *qpin,
138034d57585SYishai Hadas 				   size_t qpinlen, struct ib_pd *pd)
13810fb2ed66Smajd@mellanox.com {
1382358e42eaSMajd Dibbiny 	struct mlx5_ib_qp *mqp = rq->base.container_mibqp;
13830fb2ed66Smajd@mellanox.com 	__be64 *pas;
13840fb2ed66Smajd@mellanox.com 	__be64 *qp_pas;
13850fb2ed66Smajd@mellanox.com 	void *in;
13860fb2ed66Smajd@mellanox.com 	void *rqc;
13870fb2ed66Smajd@mellanox.com 	void *wq;
13880fb2ed66Smajd@mellanox.com 	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
13892c292dbbSBoris Pismenny 	size_t rq_pas_size = get_rq_pas_size(qpc);
13902c292dbbSBoris Pismenny 	size_t inlen;
13910fb2ed66Smajd@mellanox.com 	int err;
13922c292dbbSBoris Pismenny 
13932c292dbbSBoris Pismenny 	if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas))
13942c292dbbSBoris Pismenny 		return -EINVAL;
13950fb2ed66Smajd@mellanox.com 
13960fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size;
13971b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
13980fb2ed66Smajd@mellanox.com 	if (!in)
13990fb2ed66Smajd@mellanox.com 		return -ENOMEM;
14000fb2ed66Smajd@mellanox.com 
140134d57585SYishai Hadas 	MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid);
14020fb2ed66Smajd@mellanox.com 	rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
1403e4cc4fa7SNoa Osherovich 	if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING))
14040fb2ed66Smajd@mellanox.com 		MLX5_SET(rqc, rqc, vsd, 1);
14050fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE);
14060fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST);
14070fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, flush_in_error_en, 1);
14080fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index));
14090fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv));
14100fb2ed66Smajd@mellanox.com 
1411358e42eaSMajd Dibbiny 	if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS)
1412358e42eaSMajd Dibbiny 		MLX5_SET(rqc, rqc, scatter_fcs, 1);
1413358e42eaSMajd Dibbiny 
14140fb2ed66Smajd@mellanox.com 	wq = MLX5_ADDR_OF(rqc, rqc, wq);
14150fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
1416b1383aa6SNoa Osherovich 	if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING)
1417b1383aa6SNoa Osherovich 		MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
14180fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset));
14190fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
14200fb2ed66Smajd@mellanox.com 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
14210fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4);
14220fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size));
14230fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size));
14240fb2ed66Smajd@mellanox.com 
14250fb2ed66Smajd@mellanox.com 	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
14260fb2ed66Smajd@mellanox.com 	qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas);
14270fb2ed66Smajd@mellanox.com 	memcpy(pas, qp_pas, rq_pas_size);
14280fb2ed66Smajd@mellanox.com 
14290fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp);
14300fb2ed66Smajd@mellanox.com 
14310fb2ed66Smajd@mellanox.com 	kvfree(in);
14320fb2ed66Smajd@mellanox.com 
14330fb2ed66Smajd@mellanox.com 	return err;
14340fb2ed66Smajd@mellanox.com }
14350fb2ed66Smajd@mellanox.com 
14360fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
14370fb2ed66Smajd@mellanox.com 				     struct mlx5_ib_rq *rq)
14380fb2ed66Smajd@mellanox.com {
14390fb2ed66Smajd@mellanox.com 	mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp);
14400fb2ed66Smajd@mellanox.com }
14410fb2ed66Smajd@mellanox.com 
1442f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev)
1443f95ef6cbSMaor Gottlieb {
1444f95ef6cbSMaor Gottlieb 	return  (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) ||
1445f95ef6cbSMaor Gottlieb 		 MLX5_CAP_ETH(dev, tunnel_stateless_gre) ||
1446f95ef6cbSMaor Gottlieb 		 MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx));
1447f95ef6cbSMaor Gottlieb }
1448f95ef6cbSMaor Gottlieb 
14490042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
14500042f9e4SMark Bloch 				      struct mlx5_ib_rq *rq,
1451443c1cf9SYishai Hadas 				      u32 qp_flags_en,
1452443c1cf9SYishai Hadas 				      struct ib_pd *pd)
14530042f9e4SMark Bloch {
14540042f9e4SMark Bloch 	if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
14550042f9e4SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC))
14560042f9e4SMark Bloch 		mlx5_ib_disable_lb(dev, false, true);
1457443c1cf9SYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid);
14580042f9e4SMark Bloch }
14590042f9e4SMark Bloch 
14600fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
1461f95ef6cbSMaor Gottlieb 				    struct mlx5_ib_rq *rq, u32 tdn,
1462443c1cf9SYishai Hadas 				    u32 *qp_flags_en,
14631f1d6abbSAriel Levkovich 				    struct ib_pd *pd,
14641f1d6abbSAriel Levkovich 				    u32 *out, int outlen)
14650fb2ed66Smajd@mellanox.com {
1466175edba8SMark Bloch 	u8 lb_flag = 0;
14670fb2ed66Smajd@mellanox.com 	u32 *in;
14680fb2ed66Smajd@mellanox.com 	void *tirc;
14690fb2ed66Smajd@mellanox.com 	int inlen;
14700fb2ed66Smajd@mellanox.com 	int err;
14710fb2ed66Smajd@mellanox.com 
14720fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_tir_in);
14731b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
14740fb2ed66Smajd@mellanox.com 	if (!in)
14750fb2ed66Smajd@mellanox.com 		return -ENOMEM;
14760fb2ed66Smajd@mellanox.com 
1477443c1cf9SYishai Hadas 	MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid);
14780fb2ed66Smajd@mellanox.com 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
14790fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
14800fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn);
14810fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, transport_domain, tdn);
1482175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1483f95ef6cbSMaor Gottlieb 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
14840fb2ed66Smajd@mellanox.com 
1485175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC)
1486175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1487175edba8SMark Bloch 
1488175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)
1489175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
1490175edba8SMark Bloch 
14916a4d00beSMark Bloch 	if (dev->is_rep) {
1492175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1493175edba8SMark Bloch 		*qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
1494175edba8SMark Bloch 	}
1495175edba8SMark Bloch 
1496175edba8SMark Bloch 	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1497ec9c2fb8SMark Bloch 
14981f1d6abbSAriel Levkovich 	err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen);
14990fb2ed66Smajd@mellanox.com 
15001f1d6abbSAriel Levkovich 	rq->tirn = MLX5_GET(create_tir_out, out, tirn);
15010042f9e4SMark Bloch 	if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
15020042f9e4SMark Bloch 		err = mlx5_ib_enable_lb(dev, false, true);
15030042f9e4SMark Bloch 
15040042f9e4SMark Bloch 		if (err)
1505443c1cf9SYishai Hadas 			destroy_raw_packet_qp_tir(dev, rq, 0, pd);
15060042f9e4SMark Bloch 	}
15070fb2ed66Smajd@mellanox.com 	kvfree(in);
15080fb2ed66Smajd@mellanox.com 
15090fb2ed66Smajd@mellanox.com 	return err;
15100fb2ed66Smajd@mellanox.com }
15110fb2ed66Smajd@mellanox.com 
15120fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
15132c292dbbSBoris Pismenny 				u32 *in, size_t inlen,
15147f72052cSYishai Hadas 				struct ib_pd *pd,
15157f72052cSYishai Hadas 				struct ib_udata *udata,
15167f72052cSYishai Hadas 				struct mlx5_ib_create_qp_resp *resp)
15170fb2ed66Smajd@mellanox.com {
15180fb2ed66Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
15190fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
15200fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
152189944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context(
152289944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
15230fb2ed66Smajd@mellanox.com 	int err;
15240fb2ed66Smajd@mellanox.com 	u32 tdn = mucontext->tdn;
15257f72052cSYishai Hadas 	u16 uid = to_mpd(pd)->uid;
15261f1d6abbSAriel Levkovich 	u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {};
15270fb2ed66Smajd@mellanox.com 
15280fb2ed66Smajd@mellanox.com 	if (qp->sq.wqe_cnt) {
15291cd6dbd3SYishai Hadas 		err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd);
15300fb2ed66Smajd@mellanox.com 		if (err)
15310fb2ed66Smajd@mellanox.com 			return err;
15320fb2ed66Smajd@mellanox.com 
1533b0ea0fa5SJason Gunthorpe 		err = create_raw_packet_qp_sq(dev, udata, sq, in, pd);
15340fb2ed66Smajd@mellanox.com 		if (err)
15350fb2ed66Smajd@mellanox.com 			goto err_destroy_tis;
15360fb2ed66Smajd@mellanox.com 
15377f72052cSYishai Hadas 		if (uid) {
15387f72052cSYishai Hadas 			resp->tisn = sq->tisn;
15397f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN;
15407f72052cSYishai Hadas 			resp->sqn = sq->base.mqp.qpn;
15417f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN;
15427f72052cSYishai Hadas 		}
15437f72052cSYishai Hadas 
15440fb2ed66Smajd@mellanox.com 		sq->base.container_mibqp = qp;
15451d31e9c0SMajd Dibbiny 		sq->base.mqp.event = mlx5_ib_qp_event;
15460fb2ed66Smajd@mellanox.com 	}
15470fb2ed66Smajd@mellanox.com 
15480fb2ed66Smajd@mellanox.com 	if (qp->rq.wqe_cnt) {
1549358e42eaSMajd Dibbiny 		rq->base.container_mibqp = qp;
1550358e42eaSMajd Dibbiny 
1551e4cc4fa7SNoa Osherovich 		if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING)
1552e4cc4fa7SNoa Osherovich 			rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING;
1553b1383aa6SNoa Osherovich 		if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING)
1554b1383aa6SNoa Osherovich 			rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING;
155534d57585SYishai Hadas 		err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd);
15560fb2ed66Smajd@mellanox.com 		if (err)
15570fb2ed66Smajd@mellanox.com 			goto err_destroy_sq;
15580fb2ed66Smajd@mellanox.com 
15591f1d6abbSAriel Levkovich 		err = create_raw_packet_qp_tir(
15601f1d6abbSAriel Levkovich 			dev, rq, tdn, &qp->flags_en, pd, out,
15611f1d6abbSAriel Levkovich 			MLX5_ST_SZ_BYTES(create_tir_out));
15620fb2ed66Smajd@mellanox.com 		if (err)
15630fb2ed66Smajd@mellanox.com 			goto err_destroy_rq;
15647f72052cSYishai Hadas 
15657f72052cSYishai Hadas 		if (uid) {
15667f72052cSYishai Hadas 			resp->rqn = rq->base.mqp.qpn;
15677f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN;
15687f72052cSYishai Hadas 			resp->tirn = rq->tirn;
15697f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN;
15701f1d6abbSAriel Levkovich 			if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) {
15711f1d6abbSAriel Levkovich 				resp->tir_icm_addr = MLX5_GET(
15721f1d6abbSAriel Levkovich 					create_tir_out, out, icm_address_31_0);
15731f1d6abbSAriel Levkovich 				resp->tir_icm_addr |=
15741f1d6abbSAriel Levkovich 					(u64)MLX5_GET(create_tir_out, out,
15751f1d6abbSAriel Levkovich 						      icm_address_39_32)
15761f1d6abbSAriel Levkovich 					<< 32;
15771f1d6abbSAriel Levkovich 				resp->tir_icm_addr |=
15781f1d6abbSAriel Levkovich 					(u64)MLX5_GET(create_tir_out, out,
15791f1d6abbSAriel Levkovich 						      icm_address_63_40)
15801f1d6abbSAriel Levkovich 					<< 40;
15811f1d6abbSAriel Levkovich 				resp->comp_mask |=
15821f1d6abbSAriel Levkovich 					MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR;
15831f1d6abbSAriel Levkovich 			}
15847f72052cSYishai Hadas 		}
15850fb2ed66Smajd@mellanox.com 	}
15860fb2ed66Smajd@mellanox.com 
15870fb2ed66Smajd@mellanox.com 	qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn :
15880fb2ed66Smajd@mellanox.com 						     rq->base.mqp.qpn;
15897f72052cSYishai Hadas 	err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp)));
15907f72052cSYishai Hadas 	if (err)
15917f72052cSYishai Hadas 		goto err_destroy_tir;
15920fb2ed66Smajd@mellanox.com 
15930fb2ed66Smajd@mellanox.com 	return 0;
15940fb2ed66Smajd@mellanox.com 
15957f72052cSYishai Hadas err_destroy_tir:
15967f72052cSYishai Hadas 	destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd);
15970fb2ed66Smajd@mellanox.com err_destroy_rq:
15980fb2ed66Smajd@mellanox.com 	destroy_raw_packet_qp_rq(dev, rq);
15990fb2ed66Smajd@mellanox.com err_destroy_sq:
16000fb2ed66Smajd@mellanox.com 	if (!qp->sq.wqe_cnt)
16010fb2ed66Smajd@mellanox.com 		return err;
16020fb2ed66Smajd@mellanox.com 	destroy_raw_packet_qp_sq(dev, sq);
16030fb2ed66Smajd@mellanox.com err_destroy_tis:
16041cd6dbd3SYishai Hadas 	destroy_raw_packet_qp_tis(dev, sq, pd);
16050fb2ed66Smajd@mellanox.com 
16060fb2ed66Smajd@mellanox.com 	return err;
16070fb2ed66Smajd@mellanox.com }
16080fb2ed66Smajd@mellanox.com 
16090fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev,
16100fb2ed66Smajd@mellanox.com 				  struct mlx5_ib_qp *qp)
16110fb2ed66Smajd@mellanox.com {
16120fb2ed66Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
16130fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
16140fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
16150fb2ed66Smajd@mellanox.com 
16160fb2ed66Smajd@mellanox.com 	if (qp->rq.wqe_cnt) {
1617443c1cf9SYishai Hadas 		destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd);
16180fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp_rq(dev, rq);
16190fb2ed66Smajd@mellanox.com 	}
16200fb2ed66Smajd@mellanox.com 
16210fb2ed66Smajd@mellanox.com 	if (qp->sq.wqe_cnt) {
16220fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp_sq(dev, sq);
16231cd6dbd3SYishai Hadas 		destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd);
16240fb2ed66Smajd@mellanox.com 	}
16250fb2ed66Smajd@mellanox.com }
16260fb2ed66Smajd@mellanox.com 
16270fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp,
16280fb2ed66Smajd@mellanox.com 				    struct mlx5_ib_raw_packet_qp *raw_packet_qp)
16290fb2ed66Smajd@mellanox.com {
16300fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
16310fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
16320fb2ed66Smajd@mellanox.com 
16330fb2ed66Smajd@mellanox.com 	sq->sq = &qp->sq;
16340fb2ed66Smajd@mellanox.com 	rq->rq = &qp->rq;
16350fb2ed66Smajd@mellanox.com 	sq->doorbell = &qp->db;
16360fb2ed66Smajd@mellanox.com 	rq->doorbell = &qp->db;
16370fb2ed66Smajd@mellanox.com }
16380fb2ed66Smajd@mellanox.com 
163928d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp)
164028d61370SYishai Hadas {
16410042f9e4SMark Bloch 	if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
16420042f9e4SMark Bloch 			    MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC))
16430042f9e4SMark Bloch 		mlx5_ib_disable_lb(dev, false, true);
1644443c1cf9SYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn,
1645443c1cf9SYishai Hadas 			     to_mpd(qp->ibqp.pd)->uid);
164628d61370SYishai Hadas }
164728d61370SYishai Hadas 
164828d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
164928d61370SYishai Hadas 				 struct ib_pd *pd,
165028d61370SYishai Hadas 				 struct ib_qp_init_attr *init_attr,
165128d61370SYishai Hadas 				 struct ib_udata *udata)
165228d61370SYishai Hadas {
165389944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context(
165489944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
165528d61370SYishai Hadas 	struct mlx5_ib_create_qp_resp resp = {};
165628d61370SYishai Hadas 	int inlen;
16571f1d6abbSAriel Levkovich 	int outlen;
165828d61370SYishai Hadas 	int err;
165928d61370SYishai Hadas 	u32 *in;
16601f1d6abbSAriel Levkovich 	u32 *out;
166128d61370SYishai Hadas 	void *tirc;
166228d61370SYishai Hadas 	void *hfso;
166328d61370SYishai Hadas 	u32 selected_fields = 0;
16642d93fc85SMatan Barak 	u32 outer_l4;
166528d61370SYishai Hadas 	size_t min_resp_len;
166628d61370SYishai Hadas 	u32 tdn = mucontext->tdn;
166728d61370SYishai Hadas 	struct mlx5_ib_create_qp_rss ucmd = {};
166828d61370SYishai Hadas 	size_t required_cmd_sz;
1669175edba8SMark Bloch 	u8 lb_flag = 0;
167028d61370SYishai Hadas 
167128d61370SYishai Hadas 	if (init_attr->qp_type != IB_QPT_RAW_PACKET)
167228d61370SYishai Hadas 		return -EOPNOTSUPP;
167328d61370SYishai Hadas 
167428d61370SYishai Hadas 	if (init_attr->create_flags || init_attr->send_cq)
167528d61370SYishai Hadas 		return -EINVAL;
167628d61370SYishai Hadas 
16772f5ff264SEli Cohen 	min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index);
167828d61370SYishai Hadas 	if (udata->outlen < min_resp_len)
167928d61370SYishai Hadas 		return -EINVAL;
168028d61370SYishai Hadas 
1681f95ef6cbSMaor Gottlieb 	required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags);
168228d61370SYishai Hadas 	if (udata->inlen < required_cmd_sz) {
168328d61370SYishai Hadas 		mlx5_ib_dbg(dev, "invalid inlen\n");
168428d61370SYishai Hadas 		return -EINVAL;
168528d61370SYishai Hadas 	}
168628d61370SYishai Hadas 
168728d61370SYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
168828d61370SYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
168928d61370SYishai Hadas 				 udata->inlen - sizeof(ucmd))) {
169028d61370SYishai Hadas 		mlx5_ib_dbg(dev, "inlen is not supported\n");
169128d61370SYishai Hadas 		return -EOPNOTSUPP;
169228d61370SYishai Hadas 	}
169328d61370SYishai Hadas 
169428d61370SYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) {
169528d61370SYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
169628d61370SYishai Hadas 		return -EFAULT;
169728d61370SYishai Hadas 	}
169828d61370SYishai Hadas 
169928d61370SYishai Hadas 	if (ucmd.comp_mask) {
170028d61370SYishai Hadas 		mlx5_ib_dbg(dev, "invalid comp mask\n");
170128d61370SYishai Hadas 		return -EOPNOTSUPP;
170228d61370SYishai Hadas 	}
170328d61370SYishai Hadas 
1704175edba8SMark Bloch 	if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS |
1705175edba8SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
1706175edba8SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) {
1707f95ef6cbSMaor Gottlieb 		mlx5_ib_dbg(dev, "invalid flags\n");
1708f95ef6cbSMaor Gottlieb 		return -EOPNOTSUPP;
1709f95ef6cbSMaor Gottlieb 	}
1710f95ef6cbSMaor Gottlieb 
1711f95ef6cbSMaor Gottlieb 	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS &&
1712f95ef6cbSMaor Gottlieb 	    !tunnel_offload_supported(dev->mdev)) {
1713f95ef6cbSMaor Gottlieb 		mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n");
171428d61370SYishai Hadas 		return -EOPNOTSUPP;
171528d61370SYishai Hadas 	}
171628d61370SYishai Hadas 
1717309fa347SMaor Gottlieb 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER &&
1718309fa347SMaor Gottlieb 	    !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) {
1719309fa347SMaor Gottlieb 		mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n");
1720309fa347SMaor Gottlieb 		return -EOPNOTSUPP;
1721309fa347SMaor Gottlieb 	}
1722309fa347SMaor Gottlieb 
17236a4d00beSMark Bloch 	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->is_rep) {
1724175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1725175edba8SMark Bloch 		qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
1726175edba8SMark Bloch 	}
1727175edba8SMark Bloch 
1728175edba8SMark Bloch 	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
1729175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
1730175edba8SMark Bloch 		qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
1731175edba8SMark Bloch 	}
1732175edba8SMark Bloch 
173341d902cbSJason Gunthorpe 	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
173428d61370SYishai Hadas 	if (err) {
173528d61370SYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
173628d61370SYishai Hadas 		return -EINVAL;
173728d61370SYishai Hadas 	}
173828d61370SYishai Hadas 
173928d61370SYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_tir_in);
17401f1d6abbSAriel Levkovich 	outlen = MLX5_ST_SZ_BYTES(create_tir_out);
17411f1d6abbSAriel Levkovich 	in = kvzalloc(inlen + outlen, GFP_KERNEL);
174228d61370SYishai Hadas 	if (!in)
174328d61370SYishai Hadas 		return -ENOMEM;
174428d61370SYishai Hadas 
17451f1d6abbSAriel Levkovich 	out = in + MLX5_ST_SZ_DW(create_tir_in);
1746443c1cf9SYishai Hadas 	MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid);
174728d61370SYishai Hadas 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
174828d61370SYishai Hadas 	MLX5_SET(tirc, tirc, disp_type,
174928d61370SYishai Hadas 		 MLX5_TIRC_DISP_TYPE_INDIRECT);
175028d61370SYishai Hadas 	MLX5_SET(tirc, tirc, indirect_table,
175128d61370SYishai Hadas 		 init_attr->rwq_ind_tbl->ind_tbl_num);
175228d61370SYishai Hadas 	MLX5_SET(tirc, tirc, transport_domain, tdn);
175328d61370SYishai Hadas 
175428d61370SYishai Hadas 	hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
1755f95ef6cbSMaor Gottlieb 
1756f95ef6cbSMaor Gottlieb 	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1757f95ef6cbSMaor Gottlieb 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
1758f95ef6cbSMaor Gottlieb 
1759175edba8SMark Bloch 	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1760175edba8SMark Bloch 
1761309fa347SMaor Gottlieb 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER)
1762309fa347SMaor Gottlieb 		hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner);
1763309fa347SMaor Gottlieb 	else
1764309fa347SMaor Gottlieb 		hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
1765309fa347SMaor Gottlieb 
176628d61370SYishai Hadas 	switch (ucmd.rx_hash_function) {
176728d61370SYishai Hadas 	case MLX5_RX_HASH_FUNC_TOEPLITZ:
176828d61370SYishai Hadas 	{
176928d61370SYishai Hadas 		void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key);
177028d61370SYishai Hadas 		size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key);
177128d61370SYishai Hadas 
177228d61370SYishai Hadas 		if (len != ucmd.rx_key_len) {
177328d61370SYishai Hadas 			err = -EINVAL;
177428d61370SYishai Hadas 			goto err;
177528d61370SYishai Hadas 		}
177628d61370SYishai Hadas 
177728d61370SYishai Hadas 		MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ);
177828d61370SYishai Hadas 		memcpy(rss_key, ucmd.rx_hash_key, len);
177928d61370SYishai Hadas 		break;
178028d61370SYishai Hadas 	}
178128d61370SYishai Hadas 	default:
178228d61370SYishai Hadas 		err = -EOPNOTSUPP;
178328d61370SYishai Hadas 		goto err;
178428d61370SYishai Hadas 	}
178528d61370SYishai Hadas 
178628d61370SYishai Hadas 	if (!ucmd.rx_hash_fields_mask) {
178728d61370SYishai Hadas 		/* special case when this TIR serves as steering entry without hashing */
178828d61370SYishai Hadas 		if (!init_attr->rwq_ind_tbl->log_ind_tbl_size)
178928d61370SYishai Hadas 			goto create_tir;
179028d61370SYishai Hadas 		err = -EINVAL;
179128d61370SYishai Hadas 		goto err;
179228d61370SYishai Hadas 	}
179328d61370SYishai Hadas 
179428d61370SYishai Hadas 	if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
179528d61370SYishai Hadas 	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) &&
179628d61370SYishai Hadas 	     ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) ||
179728d61370SYishai Hadas 	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) {
179828d61370SYishai Hadas 		err = -EINVAL;
179928d61370SYishai Hadas 		goto err;
180028d61370SYishai Hadas 	}
180128d61370SYishai Hadas 
180228d61370SYishai Hadas 	/* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */
180328d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
180428d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4))
180528d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
180628d61370SYishai Hadas 			 MLX5_L3_PROT_TYPE_IPV4);
180728d61370SYishai Hadas 	else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) ||
180828d61370SYishai Hadas 		 (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))
180928d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
181028d61370SYishai Hadas 			 MLX5_L3_PROT_TYPE_IPV6);
181128d61370SYishai Hadas 
18122d93fc85SMatan Barak 	outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
18132d93fc85SMatan Barak 		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 |
181428d61370SYishai Hadas 		   ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||
18152d93fc85SMatan Barak 		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 |
18162d93fc85SMatan Barak 		   (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2;
18172d93fc85SMatan Barak 
18182d93fc85SMatan Barak 	/* Check that only one l4 protocol is set */
18192d93fc85SMatan Barak 	if (outer_l4 & (outer_l4 - 1)) {
182028d61370SYishai Hadas 		err = -EINVAL;
182128d61370SYishai Hadas 		goto err;
182228d61370SYishai Hadas 	}
182328d61370SYishai Hadas 
182428d61370SYishai Hadas 	/* If none of TCP & UDP SRC/DST was set - this bit field is ignored */
182528d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
182628d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP))
182728d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
182828d61370SYishai Hadas 			 MLX5_L4_PROT_TYPE_TCP);
182928d61370SYishai Hadas 	else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||
183028d61370SYishai Hadas 		 (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))
183128d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
183228d61370SYishai Hadas 			 MLX5_L4_PROT_TYPE_UDP);
183328d61370SYishai Hadas 
183428d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
183528d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6))
183628d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP;
183728d61370SYishai Hadas 
183828d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) ||
183928d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))
184028d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP;
184128d61370SYishai Hadas 
184228d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
184328d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP))
184428d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT;
184528d61370SYishai Hadas 
184628d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) ||
184728d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))
184828d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT;
184928d61370SYishai Hadas 
18502d93fc85SMatan Barak 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI)
18512d93fc85SMatan Barak 		selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI;
18522d93fc85SMatan Barak 
185328d61370SYishai Hadas 	MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);
185428d61370SYishai Hadas 
185528d61370SYishai Hadas create_tir:
18561f1d6abbSAriel Levkovich 	err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen);
185728d61370SYishai Hadas 
18581f1d6abbSAriel Levkovich 	qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn);
18590042f9e4SMark Bloch 	if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
18600042f9e4SMark Bloch 		err = mlx5_ib_enable_lb(dev, false, true);
18610042f9e4SMark Bloch 
18620042f9e4SMark Bloch 		if (err)
1863443c1cf9SYishai Hadas 			mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn,
1864443c1cf9SYishai Hadas 					     to_mpd(pd)->uid);
18650042f9e4SMark Bloch 	}
18660042f9e4SMark Bloch 
186728d61370SYishai Hadas 	if (err)
186828d61370SYishai Hadas 		goto err;
186928d61370SYishai Hadas 
18707f72052cSYishai Hadas 	if (mucontext->devx_uid) {
18717f72052cSYishai Hadas 		resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN;
18727f72052cSYishai Hadas 		resp.tirn = qp->rss_qp.tirn;
18731f1d6abbSAriel Levkovich 		if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) {
18741f1d6abbSAriel Levkovich 			resp.tir_icm_addr =
18751f1d6abbSAriel Levkovich 				MLX5_GET(create_tir_out, out, icm_address_31_0);
18761f1d6abbSAriel Levkovich 			resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out,
18771f1d6abbSAriel Levkovich 							   icm_address_39_32)
18781f1d6abbSAriel Levkovich 					     << 32;
18791f1d6abbSAriel Levkovich 			resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out,
18801f1d6abbSAriel Levkovich 							   icm_address_63_40)
18811f1d6abbSAriel Levkovich 					     << 40;
18821f1d6abbSAriel Levkovich 			resp.comp_mask |=
18831f1d6abbSAriel Levkovich 				MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR;
18841f1d6abbSAriel Levkovich 		}
18857f72052cSYishai Hadas 	}
18867f72052cSYishai Hadas 
18877f72052cSYishai Hadas 	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
18887f72052cSYishai Hadas 	if (err)
18897f72052cSYishai Hadas 		goto err_copy;
18907f72052cSYishai Hadas 
189128d61370SYishai Hadas 	kvfree(in);
189228d61370SYishai Hadas 	/* qpn is reserved for that QP */
189328d61370SYishai Hadas 	qp->trans_qp.base.mqp.qpn = 0;
1894d9f88e5aSYishai Hadas 	qp->flags |= MLX5_IB_QP_RSS;
189528d61370SYishai Hadas 	return 0;
189628d61370SYishai Hadas 
18977f72052cSYishai Hadas err_copy:
18987f72052cSYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid);
189928d61370SYishai Hadas err:
190028d61370SYishai Hadas 	kvfree(in);
190128d61370SYishai Hadas 	return err;
190228d61370SYishai Hadas }
190328d61370SYishai Hadas 
19045d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr,
19055d6ff1baSYonatan Cohen 					 void *qpc)
19065d6ff1baSYonatan Cohen {
19075d6ff1baSYonatan Cohen 	int rcqe_sz;
19085d6ff1baSYonatan Cohen 
19095d6ff1baSYonatan Cohen 	if (init_attr->qp_type == MLX5_IB_QPT_DCI)
19105d6ff1baSYonatan Cohen 		return;
19115d6ff1baSYonatan Cohen 
19125d6ff1baSYonatan Cohen 	rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq);
19135d6ff1baSYonatan Cohen 
19147249c8eaSGuy Levi 	if (init_attr->qp_type == MLX5_IB_QPT_DCT) {
19157249c8eaSGuy Levi 		if (rcqe_sz == 128)
19167249c8eaSGuy Levi 			MLX5_SET(dctc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE);
19177249c8eaSGuy Levi 
19185d6ff1baSYonatan Cohen 		return;
19195d6ff1baSYonatan Cohen 	}
19205d6ff1baSYonatan Cohen 
19217249c8eaSGuy Levi 	MLX5_SET(qpc, qpc, cs_res,
19227249c8eaSGuy Levi 		 rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE :
19237249c8eaSGuy Levi 				  MLX5_RES_SCAT_DATA32_CQE);
19245d6ff1baSYonatan Cohen }
19255d6ff1baSYonatan Cohen 
19265d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,
19275d6ff1baSYonatan Cohen 					 struct ib_qp_init_attr *init_attr,
19286f4bc0eaSYonatan Cohen 					 struct mlx5_ib_create_qp *ucmd,
19295d6ff1baSYonatan Cohen 					 void *qpc)
19305d6ff1baSYonatan Cohen {
19315d6ff1baSYonatan Cohen 	enum ib_qp_type qpt = init_attr->qp_type;
19325d6ff1baSYonatan Cohen 	int scqe_sz;
19332ab367a7Szhengbin 	bool allow_scat_cqe = false;
19345d6ff1baSYonatan Cohen 
19355d6ff1baSYonatan Cohen 	if (qpt == IB_QPT_UC || qpt == IB_QPT_UD)
19365d6ff1baSYonatan Cohen 		return;
19375d6ff1baSYonatan Cohen 
19386f4bc0eaSYonatan Cohen 	if (ucmd)
19396f4bc0eaSYonatan Cohen 		allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE;
19406f4bc0eaSYonatan Cohen 
19416f4bc0eaSYonatan Cohen 	if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR)
19425d6ff1baSYonatan Cohen 		return;
19435d6ff1baSYonatan Cohen 
19445d6ff1baSYonatan Cohen 	scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq);
19455d6ff1baSYonatan Cohen 	if (scqe_sz == 128) {
19465d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE);
19475d6ff1baSYonatan Cohen 		return;
19485d6ff1baSYonatan Cohen 	}
19495d6ff1baSYonatan Cohen 
19505d6ff1baSYonatan Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_DCI ||
19515d6ff1baSYonatan Cohen 	    MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe))
19525d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE);
19535d6ff1baSYonatan Cohen }
19545d6ff1baSYonatan Cohen 
1955a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask)
1956a60109dcSYonatan Cohen {
1957a60109dcSYonatan Cohen 	/* driver does not support atomic_size > 256B
1958a60109dcSYonatan Cohen 	 * and does not know how to translate bigger sizes
1959a60109dcSYonatan Cohen 	 */
1960a60109dcSYonatan Cohen 	int supported_size_mask = size_mask & 0x1ff;
1961a60109dcSYonatan Cohen 	int log_max_size;
1962a60109dcSYonatan Cohen 
1963a60109dcSYonatan Cohen 	if (!supported_size_mask)
1964a60109dcSYonatan Cohen 		return -EOPNOTSUPP;
1965a60109dcSYonatan Cohen 
1966a60109dcSYonatan Cohen 	log_max_size = __fls(supported_size_mask);
1967a60109dcSYonatan Cohen 
1968a60109dcSYonatan Cohen 	if (log_max_size > 3)
1969a60109dcSYonatan Cohen 		return log_max_size;
1970a60109dcSYonatan Cohen 
1971a60109dcSYonatan Cohen 	return MLX5_ATOMIC_MODE_8B;
1972a60109dcSYonatan Cohen }
1973a60109dcSYonatan Cohen 
1974a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev,
1975a60109dcSYonatan Cohen 			   enum ib_qp_type qp_type)
1976a60109dcSYonatan Cohen {
1977a60109dcSYonatan Cohen 	u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
1978a60109dcSYonatan Cohen 	u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
1979a60109dcSYonatan Cohen 	int atomic_mode = -EOPNOTSUPP;
1980a60109dcSYonatan Cohen 	int atomic_size_mask;
1981a60109dcSYonatan Cohen 
1982a60109dcSYonatan Cohen 	if (!atomic)
1983a60109dcSYonatan Cohen 		return -EOPNOTSUPP;
1984a60109dcSYonatan Cohen 
1985a60109dcSYonatan Cohen 	if (qp_type == MLX5_IB_QPT_DCT)
1986a60109dcSYonatan Cohen 		atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc);
1987a60109dcSYonatan Cohen 	else
1988a60109dcSYonatan Cohen 		atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
1989a60109dcSYonatan Cohen 
1990a60109dcSYonatan Cohen 	if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) ||
1991a60109dcSYonatan Cohen 	    (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD))
1992a60109dcSYonatan Cohen 		atomic_mode = atomic_size_to_mode(atomic_size_mask);
1993a60109dcSYonatan Cohen 
1994a60109dcSYonatan Cohen 	if (atomic_mode <= 0 &&
1995a60109dcSYonatan Cohen 	    (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP &&
1996a60109dcSYonatan Cohen 	     atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD))
1997a60109dcSYonatan Cohen 		atomic_mode = MLX5_ATOMIC_MODE_IB_COMP;
1998a60109dcSYonatan Cohen 
1999a60109dcSYonatan Cohen 	return atomic_mode;
2000a60109dcSYonatan Cohen }
2001a60109dcSYonatan Cohen 
20022e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported)
20032e43bb31SYonatan Cohen {
20042e43bb31SYonatan Cohen 	return (input & ~supported) == 0;
20052e43bb31SYonatan Cohen }
20062e43bb31SYonatan Cohen 
2007e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
2008e126ba97SEli Cohen 			    struct ib_qp_init_attr *init_attr,
2009e126ba97SEli Cohen 			    struct ib_udata *udata, struct mlx5_ib_qp *qp)
2010e126ba97SEli Cohen {
2011e126ba97SEli Cohen 	struct mlx5_ib_resources *devr = &dev->devr;
201209a7d9ecSSaeed Mahameed 	int inlen = MLX5_ST_SZ_BYTES(create_qp_in);
2013938fe83cSSaeed Mahameed 	struct mlx5_core_dev *mdev = dev->mdev;
20140625b4baSJason Gunthorpe 	struct mlx5_ib_create_qp_resp resp = {};
201589944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
201689944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
201789ea94a7SMaor Gottlieb 	struct mlx5_ib_cq *send_cq;
201889ea94a7SMaor Gottlieb 	struct mlx5_ib_cq *recv_cq;
201989ea94a7SMaor Gottlieb 	unsigned long flags;
2020cfb5e088SHaggai Abramovsky 	u32 uidx = MLX5_IB_DEFAULT_UIDX;
202109a7d9ecSSaeed Mahameed 	struct mlx5_ib_create_qp ucmd;
202209a7d9ecSSaeed Mahameed 	struct mlx5_ib_qp_base *base;
2023e7b169f3SNoa Osherovich 	int mlx5_st;
2024cfb5e088SHaggai Abramovsky 	void *qpc;
202509a7d9ecSSaeed Mahameed 	u32 *in;
202609a7d9ecSSaeed Mahameed 	int err;
2027e126ba97SEli Cohen 
2028e126ba97SEli Cohen 	mutex_init(&qp->mutex);
2029e126ba97SEli Cohen 	spin_lock_init(&qp->sq.lock);
2030e126ba97SEli Cohen 	spin_lock_init(&qp->rq.lock);
2031e126ba97SEli Cohen 
2032e7b169f3SNoa Osherovich 	mlx5_st = to_mlx5_st(init_attr->qp_type);
2033e7b169f3SNoa Osherovich 	if (mlx5_st < 0)
2034e7b169f3SNoa Osherovich 		return -EINVAL;
2035e7b169f3SNoa Osherovich 
203628d61370SYishai Hadas 	if (init_attr->rwq_ind_tbl) {
203728d61370SYishai Hadas 		if (!udata)
203828d61370SYishai Hadas 			return -ENOSYS;
203928d61370SYishai Hadas 
204028d61370SYishai Hadas 		err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata);
204128d61370SYishai Hadas 		return err;
204228d61370SYishai Hadas 	}
204328d61370SYishai Hadas 
2044f360d88aSEli Cohen 	if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
2045938fe83cSSaeed Mahameed 		if (!MLX5_CAP_GEN(mdev, block_lb_mc)) {
2046f360d88aSEli Cohen 			mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n");
2047f360d88aSEli Cohen 			return -EINVAL;
2048f360d88aSEli Cohen 		} else {
2049f360d88aSEli Cohen 			qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK;
2050f360d88aSEli Cohen 		}
2051f360d88aSEli Cohen 	}
2052f360d88aSEli Cohen 
2053051f2630SLeon Romanovsky 	if (init_attr->create_flags &
2054051f2630SLeon Romanovsky 			(IB_QP_CREATE_CROSS_CHANNEL |
2055051f2630SLeon Romanovsky 			 IB_QP_CREATE_MANAGED_SEND |
2056051f2630SLeon Romanovsky 			 IB_QP_CREATE_MANAGED_RECV)) {
2057051f2630SLeon Romanovsky 		if (!MLX5_CAP_GEN(mdev, cd)) {
2058051f2630SLeon Romanovsky 			mlx5_ib_dbg(dev, "cross-channel isn't supported\n");
2059051f2630SLeon Romanovsky 			return -EINVAL;
2060051f2630SLeon Romanovsky 		}
2061051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL)
2062051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_CROSS_CHANNEL;
2063051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND)
2064051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_MANAGED_SEND;
2065051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV)
2066051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_MANAGED_RECV;
2067051f2630SLeon Romanovsky 	}
2068f0313965SErez Shitrit 
2069f0313965SErez Shitrit 	if (init_attr->qp_type == IB_QPT_UD &&
2070f0313965SErez Shitrit 	    (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO))
2071f0313965SErez Shitrit 		if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) {
2072f0313965SErez Shitrit 			mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n");
2073f0313965SErez Shitrit 			return -EOPNOTSUPP;
2074f0313965SErez Shitrit 		}
2075f0313965SErez Shitrit 
2076358e42eaSMajd Dibbiny 	if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) {
2077358e42eaSMajd Dibbiny 		if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2078358e42eaSMajd Dibbiny 			mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs");
2079358e42eaSMajd Dibbiny 			return -EOPNOTSUPP;
2080358e42eaSMajd Dibbiny 		}
2081358e42eaSMajd Dibbiny 		if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) ||
2082358e42eaSMajd Dibbiny 		    !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) {
2083358e42eaSMajd Dibbiny 			mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n");
2084358e42eaSMajd Dibbiny 			return -EOPNOTSUPP;
2085358e42eaSMajd Dibbiny 		}
2086358e42eaSMajd Dibbiny 		qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS;
2087358e42eaSMajd Dibbiny 	}
2088358e42eaSMajd Dibbiny 
2089e126ba97SEli Cohen 	if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
2090e126ba97SEli Cohen 		qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;
2091e126ba97SEli Cohen 
2092e4cc4fa7SNoa Osherovich 	if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) {
2093e4cc4fa7SNoa Osherovich 		if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
2094e4cc4fa7SNoa Osherovich 		      MLX5_CAP_ETH(dev->mdev, vlan_cap)) ||
2095e4cc4fa7SNoa Osherovich 		    (init_attr->qp_type != IB_QPT_RAW_PACKET))
2096e4cc4fa7SNoa Osherovich 			return -EOPNOTSUPP;
2097e4cc4fa7SNoa Osherovich 		qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING;
2098e4cc4fa7SNoa Osherovich 	}
2099e4cc4fa7SNoa Osherovich 
2100e00b64f7SShamir Rabinovitch 	if (udata) {
2101e126ba97SEli Cohen 		if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) {
2102e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "copy failed\n");
2103e126ba97SEli Cohen 			return -EFAULT;
2104e126ba97SEli Cohen 		}
2105e126ba97SEli Cohen 
21062e43bb31SYonatan Cohen 		if (!check_flags_mask(ucmd.flags,
2107569c6651SDanit Goldberg 				      MLX5_QP_FLAG_ALLOW_SCATTER_CQE |
21088af526e0SMark Bloch 				      MLX5_QP_FLAG_BFREG_INDEX |
21098af526e0SMark Bloch 				      MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE |
21108af526e0SMark Bloch 				      MLX5_QP_FLAG_SCATTER_CQE |
21118af526e0SMark Bloch 				      MLX5_QP_FLAG_SIGNATURE |
21128af526e0SMark Bloch 				      MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC |
21138af526e0SMark Bloch 				      MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
21148af526e0SMark Bloch 				      MLX5_QP_FLAG_TUNNEL_OFFLOADS |
2115ac42a5eeSYishai Hadas 				      MLX5_QP_FLAG_UAR_PAGE_INDEX |
21168af526e0SMark Bloch 				      MLX5_QP_FLAG_TYPE_DCI |
21178af526e0SMark Bloch 				      MLX5_QP_FLAG_TYPE_DCT))
21182e43bb31SYonatan Cohen 			return -EINVAL;
21192e43bb31SYonatan Cohen 
212089944450SShamir Rabinovitch 		err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx);
2121cfb5e088SHaggai Abramovsky 		if (err)
2122cfb5e088SHaggai Abramovsky 			return err;
2123cfb5e088SHaggai Abramovsky 
2124e126ba97SEli Cohen 		qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE);
21255d6ff1baSYonatan Cohen 		if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe))
2126e126ba97SEli Cohen 			qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE);
2127f95ef6cbSMaor Gottlieb 		if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) {
2128f95ef6cbSMaor Gottlieb 			if (init_attr->qp_type != IB_QPT_RAW_PACKET ||
2129f95ef6cbSMaor Gottlieb 			    !tunnel_offload_supported(mdev)) {
2130f95ef6cbSMaor Gottlieb 				mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n");
2131f95ef6cbSMaor Gottlieb 				return -EOPNOTSUPP;
2132f95ef6cbSMaor Gottlieb 			}
2133175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS;
2134175edba8SMark Bloch 		}
2135175edba8SMark Bloch 
2136175edba8SMark Bloch 		if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) {
2137175edba8SMark Bloch 			if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2138175edba8SMark Bloch 				mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n");
2139175edba8SMark Bloch 				return -EOPNOTSUPP;
2140175edba8SMark Bloch 			}
2141175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
2142175edba8SMark Bloch 		}
2143175edba8SMark Bloch 
2144175edba8SMark Bloch 		if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
2145175edba8SMark Bloch 			if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2146175edba8SMark Bloch 				mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n");
2147175edba8SMark Bloch 				return -EOPNOTSUPP;
2148175edba8SMark Bloch 			}
2149175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
2150f95ef6cbSMaor Gottlieb 		}
2151c2e53b2cSYishai Hadas 
2152569c6651SDanit Goldberg 		if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) {
2153569c6651SDanit Goldberg 			if (init_attr->qp_type != IB_QPT_RC ||
2154569c6651SDanit Goldberg 				!MLX5_CAP_GEN(dev->mdev, qp_packet_based)) {
2155569c6651SDanit Goldberg 				mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n");
2156569c6651SDanit Goldberg 				return -EOPNOTSUPP;
2157569c6651SDanit Goldberg 			}
2158569c6651SDanit Goldberg 			qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT;
2159569c6651SDanit Goldberg 		}
2160569c6651SDanit Goldberg 
2161c2e53b2cSYishai Hadas 		if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) {
2162c2e53b2cSYishai Hadas 			if (init_attr->qp_type != IB_QPT_UD ||
2163c2e53b2cSYishai Hadas 			    (MLX5_CAP_GEN(dev->mdev, port_type) !=
2164c2e53b2cSYishai Hadas 			     MLX5_CAP_PORT_TYPE_IB) ||
2165c2e53b2cSYishai Hadas 			    !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) {
2166c2e53b2cSYishai Hadas 				mlx5_ib_dbg(dev, "Source QP option isn't supported\n");
2167c2e53b2cSYishai Hadas 				return -EOPNOTSUPP;
2168c2e53b2cSYishai Hadas 			}
2169c2e53b2cSYishai Hadas 
2170c2e53b2cSYishai Hadas 			qp->flags |= MLX5_IB_QP_UNDERLAY;
2171c2e53b2cSYishai Hadas 			qp->underlay_qpn = init_attr->source_qpn;
2172c2e53b2cSYishai Hadas 		}
2173e126ba97SEli Cohen 	} else {
2174e126ba97SEli Cohen 		qp->wq_sig = !!wq_signature;
2175e126ba97SEli Cohen 	}
2176e126ba97SEli Cohen 
2177c2e53b2cSYishai Hadas 	base = (init_attr->qp_type == IB_QPT_RAW_PACKET ||
2178c2e53b2cSYishai Hadas 		qp->flags & MLX5_IB_QP_UNDERLAY) ?
2179c2e53b2cSYishai Hadas 	       &qp->raw_packet_qp.rq.base :
2180c2e53b2cSYishai Hadas 	       &qp->trans_qp.base;
2181c2e53b2cSYishai Hadas 
2182e126ba97SEli Cohen 	qp->has_rq = qp_has_rq(init_attr);
2183e126ba97SEli Cohen 	err = set_rq_size(dev, &init_attr->cap, qp->has_rq,
2184e00b64f7SShamir Rabinovitch 			  qp, udata ? &ucmd : NULL);
2185e126ba97SEli Cohen 	if (err) {
2186e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
2187e126ba97SEli Cohen 		return err;
2188e126ba97SEli Cohen 	}
2189e126ba97SEli Cohen 
2190e126ba97SEli Cohen 	if (pd) {
2191e00b64f7SShamir Rabinovitch 		if (udata) {
2192938fe83cSSaeed Mahameed 			__u32 max_wqes =
2193938fe83cSSaeed Mahameed 				1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
2194e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count);
2195e126ba97SEli Cohen 			if (ucmd.rq_wqe_shift != qp->rq.wqe_shift ||
2196e126ba97SEli Cohen 			    ucmd.rq_wqe_count != qp->rq.wqe_cnt) {
2197e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "invalid rq params\n");
2198e126ba97SEli Cohen 				return -EINVAL;
2199e126ba97SEli Cohen 			}
2200938fe83cSSaeed Mahameed 			if (ucmd.sq_wqe_count > max_wqes) {
2201e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n",
2202938fe83cSSaeed Mahameed 					    ucmd.sq_wqe_count, max_wqes);
2203e126ba97SEli Cohen 				return -EINVAL;
2204e126ba97SEli Cohen 			}
2205b11a4f9cSHaggai Eran 			if (init_attr->create_flags &
22063f89b01fSMichael Guralnik 			    MLX5_IB_QP_CREATE_SQPN_QP1) {
2207b11a4f9cSHaggai Eran 				mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n");
2208b11a4f9cSHaggai Eran 				return -EINVAL;
2209b11a4f9cSHaggai Eran 			}
22100fb2ed66Smajd@mellanox.com 			err = create_user_qp(dev, pd, qp, udata, init_attr, &in,
22110fb2ed66Smajd@mellanox.com 					     &resp, &inlen, base);
2212e126ba97SEli Cohen 			if (err)
2213e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "err %d\n", err);
2214e126ba97SEli Cohen 		} else {
221519098df2Smajd@mellanox.com 			err = create_kernel_qp(dev, init_attr, qp, &in, &inlen,
221619098df2Smajd@mellanox.com 					       base);
2217e126ba97SEli Cohen 			if (err)
2218e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "err %d\n", err);
2219e126ba97SEli Cohen 		}
2220e126ba97SEli Cohen 
2221e126ba97SEli Cohen 		if (err)
2222e126ba97SEli Cohen 			return err;
2223e126ba97SEli Cohen 	} else {
22241b9a07eeSLeon Romanovsky 		in = kvzalloc(inlen, GFP_KERNEL);
2225e126ba97SEli Cohen 		if (!in)
2226e126ba97SEli Cohen 			return -ENOMEM;
2227e126ba97SEli Cohen 
2228e126ba97SEli Cohen 		qp->create_type = MLX5_QP_EMPTY;
2229e126ba97SEli Cohen 	}
2230e126ba97SEli Cohen 
2231e126ba97SEli Cohen 	if (is_sqp(init_attr->qp_type))
2232e126ba97SEli Cohen 		qp->port = init_attr->port_num;
2233e126ba97SEli Cohen 
223409a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
223509a7d9ecSSaeed Mahameed 
2236e7b169f3SNoa Osherovich 	MLX5_SET(qpc, qpc, st, mlx5_st);
223709a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2238e126ba97SEli Cohen 
2239e126ba97SEli Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR)
224009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn);
2241e126ba97SEli Cohen 	else
224209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, latency_sensitive, 1);
224309a7d9ecSSaeed Mahameed 
2244e126ba97SEli Cohen 
2245e126ba97SEli Cohen 	if (qp->wq_sig)
224609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, wq_signature, 1);
2247e126ba97SEli Cohen 
2248f360d88aSEli Cohen 	if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
224909a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, block_lb_mc, 1);
2250f360d88aSEli Cohen 
2251051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
225209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_master, 1);
2253051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_SEND)
225409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_slave_send, 1);
2255051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_RECV)
225609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_slave_receive, 1);
2257569c6651SDanit Goldberg 	if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT)
2258569c6651SDanit Goldberg 		MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1);
2259e126ba97SEli Cohen 	if (qp->scat_cqe && is_connected(init_attr->qp_type)) {
22605d6ff1baSYonatan Cohen 		configure_responder_scat_cqe(init_attr, qpc);
22616f4bc0eaSYonatan Cohen 		configure_requester_scat_cqe(dev, init_attr,
2262e00b64f7SShamir Rabinovitch 					     udata ? &ucmd : NULL,
22636f4bc0eaSYonatan Cohen 					     qpc);
2264e126ba97SEli Cohen 	}
2265e126ba97SEli Cohen 
2266e126ba97SEli Cohen 	if (qp->rq.wqe_cnt) {
226709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
226809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt));
2269e126ba97SEli Cohen 	}
2270e126ba97SEli Cohen 
227109a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr));
2272e126ba97SEli Cohen 
22733fd3307eSArtemy Kovalyov 	if (qp->sq.wqe_cnt) {
227409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt));
22753fd3307eSArtemy Kovalyov 	} else {
227609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, no_sq, 1);
22773fd3307eSArtemy Kovalyov 		if (init_attr->srq &&
22783fd3307eSArtemy Kovalyov 		    init_attr->srq->srq_type == IB_SRQT_TM)
22793fd3307eSArtemy Kovalyov 			MLX5_SET(qpc, qpc, offload_type,
22803fd3307eSArtemy Kovalyov 				 MLX5_QPC_OFFLOAD_TYPE_RNDV);
22813fd3307eSArtemy Kovalyov 	}
2282e126ba97SEli Cohen 
2283e126ba97SEli Cohen 	/* Set default resources */
2284e126ba97SEli Cohen 	switch (init_attr->qp_type) {
2285e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
228609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
228709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn);
228809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
228909a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn);
2290e126ba97SEli Cohen 		break;
2291e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
229209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
229309a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn);
229409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
2295e126ba97SEli Cohen 		break;
2296e126ba97SEli Cohen 	default:
2297e126ba97SEli Cohen 		if (init_attr->srq) {
229809a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn);
229909a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn);
2300e126ba97SEli Cohen 		} else {
230109a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn);
230209a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn);
2303e126ba97SEli Cohen 		}
2304e126ba97SEli Cohen 	}
2305e126ba97SEli Cohen 
2306e126ba97SEli Cohen 	if (init_attr->send_cq)
230709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn);
2308e126ba97SEli Cohen 
2309e126ba97SEli Cohen 	if (init_attr->recv_cq)
231009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn);
2311e126ba97SEli Cohen 
231209a7d9ecSSaeed Mahameed 	MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2313e126ba97SEli Cohen 
2314cfb5e088SHaggai Abramovsky 	/* 0xffffff means we ask to work with cqe version 0 */
231509a7d9ecSSaeed Mahameed 	if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
2316cfb5e088SHaggai Abramovsky 		MLX5_SET(qpc, qpc, user_index, uidx);
231709a7d9ecSSaeed Mahameed 
2318f0313965SErez Shitrit 	/* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */
2319f0313965SErez Shitrit 	if (init_attr->qp_type == IB_QPT_UD &&
2320f0313965SErez Shitrit 	    (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) {
2321f0313965SErez Shitrit 		MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1);
2322f0313965SErez Shitrit 		qp->flags |= MLX5_IB_QP_LSO;
2323f0313965SErez Shitrit 	}
2324cfb5e088SHaggai Abramovsky 
2325b1383aa6SNoa Osherovich 	if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) {
2326b1383aa6SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
2327b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "scatter end padding is not supported\n");
2328b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
2329b1383aa6SNoa Osherovich 			goto err;
2330b1383aa6SNoa Osherovich 		} else if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2331b1383aa6SNoa Osherovich 			MLX5_SET(qpc, qpc, end_padding_mode,
2332b1383aa6SNoa Osherovich 				 MLX5_WQ_END_PAD_MODE_ALIGN);
2333b1383aa6SNoa Osherovich 		} else {
2334b1383aa6SNoa Osherovich 			qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING;
2335b1383aa6SNoa Osherovich 		}
2336b1383aa6SNoa Osherovich 	}
2337b1383aa6SNoa Osherovich 
23382c292dbbSBoris Pismenny 	if (inlen < 0) {
23392c292dbbSBoris Pismenny 		err = -EINVAL;
23402c292dbbSBoris Pismenny 		goto err;
23412c292dbbSBoris Pismenny 	}
23422c292dbbSBoris Pismenny 
2343c2e53b2cSYishai Hadas 	if (init_attr->qp_type == IB_QPT_RAW_PACKET ||
2344c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
23450fb2ed66Smajd@mellanox.com 		qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr;
23460fb2ed66Smajd@mellanox.com 		raw_packet_qp_copy_info(qp, &qp->raw_packet_qp);
23477f72052cSYishai Hadas 		err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata,
23487f72052cSYishai Hadas 					   &resp);
23490fb2ed66Smajd@mellanox.com 	} else {
235019098df2Smajd@mellanox.com 		err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen);
23510fb2ed66Smajd@mellanox.com 	}
23520fb2ed66Smajd@mellanox.com 
2353e126ba97SEli Cohen 	if (err) {
2354e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "create qp failed\n");
2355e126ba97SEli Cohen 		goto err_create;
2356e126ba97SEli Cohen 	}
2357e126ba97SEli Cohen 
2358479163f4SAl Viro 	kvfree(in);
2359e126ba97SEli Cohen 
236019098df2Smajd@mellanox.com 	base->container_mibqp = qp;
236119098df2Smajd@mellanox.com 	base->mqp.event = mlx5_ib_qp_event;
2362e126ba97SEli Cohen 
236389ea94a7SMaor Gottlieb 	get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq,
236489ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
236589ea94a7SMaor Gottlieb 	spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
236689ea94a7SMaor Gottlieb 	mlx5_ib_lock_cqs(send_cq, recv_cq);
236789ea94a7SMaor Gottlieb 	/* Maintain device to QPs access, needed for further handling via reset
236889ea94a7SMaor Gottlieb 	 * flow
236989ea94a7SMaor Gottlieb 	 */
237089ea94a7SMaor Gottlieb 	list_add_tail(&qp->qps_list, &dev->qp_list);
237189ea94a7SMaor Gottlieb 	/* Maintain CQ to QPs access, needed for further handling via reset flow
237289ea94a7SMaor Gottlieb 	 */
237389ea94a7SMaor Gottlieb 	if (send_cq)
237489ea94a7SMaor Gottlieb 		list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp);
237589ea94a7SMaor Gottlieb 	if (recv_cq)
237689ea94a7SMaor Gottlieb 		list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp);
237789ea94a7SMaor Gottlieb 	mlx5_ib_unlock_cqs(send_cq, recv_cq);
237889ea94a7SMaor Gottlieb 	spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
237989ea94a7SMaor Gottlieb 
2380e126ba97SEli Cohen 	return 0;
2381e126ba97SEli Cohen 
2382e126ba97SEli Cohen err_create:
2383e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_USER)
2384bdeacabdSShamir Rabinovitch 		destroy_qp_user(dev, pd, qp, base, udata);
2385e126ba97SEli Cohen 	else if (qp->create_type == MLX5_QP_KERNEL)
2386e126ba97SEli Cohen 		destroy_qp_kernel(dev, qp);
2387e126ba97SEli Cohen 
2388b1383aa6SNoa Osherovich err:
2389479163f4SAl Viro 	kvfree(in);
2390e126ba97SEli Cohen 	return err;
2391e126ba97SEli Cohen }
2392e126ba97SEli Cohen 
2393e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq)
2394e126ba97SEli Cohen 	__acquires(&send_cq->lock) __acquires(&recv_cq->lock)
2395e126ba97SEli Cohen {
2396e126ba97SEli Cohen 	if (send_cq) {
2397e126ba97SEli Cohen 		if (recv_cq) {
2398e126ba97SEli Cohen 			if (send_cq->mcq.cqn < recv_cq->mcq.cqn)  {
239989ea94a7SMaor Gottlieb 				spin_lock(&send_cq->lock);
2400e126ba97SEli Cohen 				spin_lock_nested(&recv_cq->lock,
2401e126ba97SEli Cohen 						 SINGLE_DEPTH_NESTING);
2402e126ba97SEli Cohen 			} else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) {
240389ea94a7SMaor Gottlieb 				spin_lock(&send_cq->lock);
2404e126ba97SEli Cohen 				__acquire(&recv_cq->lock);
2405e126ba97SEli Cohen 			} else {
240689ea94a7SMaor Gottlieb 				spin_lock(&recv_cq->lock);
2407e126ba97SEli Cohen 				spin_lock_nested(&send_cq->lock,
2408e126ba97SEli Cohen 						 SINGLE_DEPTH_NESTING);
2409e126ba97SEli Cohen 			}
2410e126ba97SEli Cohen 		} else {
241189ea94a7SMaor Gottlieb 			spin_lock(&send_cq->lock);
24126a4f139aSEli Cohen 			__acquire(&recv_cq->lock);
2413e126ba97SEli Cohen 		}
2414e126ba97SEli Cohen 	} else if (recv_cq) {
241589ea94a7SMaor Gottlieb 		spin_lock(&recv_cq->lock);
24166a4f139aSEli Cohen 		__acquire(&send_cq->lock);
24176a4f139aSEli Cohen 	} else {
24186a4f139aSEli Cohen 		__acquire(&send_cq->lock);
24196a4f139aSEli Cohen 		__acquire(&recv_cq->lock);
2420e126ba97SEli Cohen 	}
2421e126ba97SEli Cohen }
2422e126ba97SEli Cohen 
2423e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq)
2424e126ba97SEli Cohen 	__releases(&send_cq->lock) __releases(&recv_cq->lock)
2425e126ba97SEli Cohen {
2426e126ba97SEli Cohen 	if (send_cq) {
2427e126ba97SEli Cohen 		if (recv_cq) {
2428e126ba97SEli Cohen 			if (send_cq->mcq.cqn < recv_cq->mcq.cqn)  {
2429e126ba97SEli Cohen 				spin_unlock(&recv_cq->lock);
243089ea94a7SMaor Gottlieb 				spin_unlock(&send_cq->lock);
2431e126ba97SEli Cohen 			} else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) {
2432e126ba97SEli Cohen 				__release(&recv_cq->lock);
243389ea94a7SMaor Gottlieb 				spin_unlock(&send_cq->lock);
2434e126ba97SEli Cohen 			} else {
2435e126ba97SEli Cohen 				spin_unlock(&send_cq->lock);
243689ea94a7SMaor Gottlieb 				spin_unlock(&recv_cq->lock);
2437e126ba97SEli Cohen 			}
2438e126ba97SEli Cohen 		} else {
24396a4f139aSEli Cohen 			__release(&recv_cq->lock);
244089ea94a7SMaor Gottlieb 			spin_unlock(&send_cq->lock);
2441e126ba97SEli Cohen 		}
2442e126ba97SEli Cohen 	} else if (recv_cq) {
24436a4f139aSEli Cohen 		__release(&send_cq->lock);
244489ea94a7SMaor Gottlieb 		spin_unlock(&recv_cq->lock);
24456a4f139aSEli Cohen 	} else {
24466a4f139aSEli Cohen 		__release(&recv_cq->lock);
24476a4f139aSEli Cohen 		__release(&send_cq->lock);
2448e126ba97SEli Cohen 	}
2449e126ba97SEli Cohen }
2450e126ba97SEli Cohen 
2451e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp)
2452e126ba97SEli Cohen {
2453e126ba97SEli Cohen 	return to_mpd(qp->ibqp.pd);
2454e126ba97SEli Cohen }
2455e126ba97SEli Cohen 
245689ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type,
245789ea94a7SMaor Gottlieb 		    struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq,
2458e126ba97SEli Cohen 		    struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq)
2459e126ba97SEli Cohen {
246089ea94a7SMaor Gottlieb 	switch (qp_type) {
2461e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2462e126ba97SEli Cohen 		*send_cq = NULL;
2463e126ba97SEli Cohen 		*recv_cq = NULL;
2464e126ba97SEli Cohen 		break;
2465e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2466e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
246789ea94a7SMaor Gottlieb 		*send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL;
2468e126ba97SEli Cohen 		*recv_cq = NULL;
2469e126ba97SEli Cohen 		break;
2470e126ba97SEli Cohen 
2471e126ba97SEli Cohen 	case IB_QPT_SMI:
2472d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
2473e126ba97SEli Cohen 	case IB_QPT_RC:
2474e126ba97SEli Cohen 	case IB_QPT_UC:
2475e126ba97SEli Cohen 	case IB_QPT_UD:
2476e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2477e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
24780fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_PACKET:
247989ea94a7SMaor Gottlieb 		*send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL;
248089ea94a7SMaor Gottlieb 		*recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL;
2481e126ba97SEli Cohen 		break;
2482e126ba97SEli Cohen 
2483e126ba97SEli Cohen 	case IB_QPT_MAX:
2484e126ba97SEli Cohen 	default:
2485e126ba97SEli Cohen 		*send_cq = NULL;
2486e126ba97SEli Cohen 		*recv_cq = NULL;
2487e126ba97SEli Cohen 		break;
2488e126ba97SEli Cohen 	}
2489e126ba97SEli Cohen }
2490e126ba97SEli Cohen 
2491ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
249213eab21fSAviv Heller 				const struct mlx5_modify_raw_qp_param *raw_qp_param,
249313eab21fSAviv Heller 				u8 lag_tx_affinity);
2494ad5f8e96Smajd@mellanox.com 
2495bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
2496bdeacabdSShamir Rabinovitch 			      struct ib_udata *udata)
2497e126ba97SEli Cohen {
2498e126ba97SEli Cohen 	struct mlx5_ib_cq *send_cq, *recv_cq;
2499c2e53b2cSYishai Hadas 	struct mlx5_ib_qp_base *base;
250089ea94a7SMaor Gottlieb 	unsigned long flags;
2501e126ba97SEli Cohen 	int err;
2502e126ba97SEli Cohen 
250328d61370SYishai Hadas 	if (qp->ibqp.rwq_ind_tbl) {
250428d61370SYishai Hadas 		destroy_rss_raw_qp_tir(dev, qp);
250528d61370SYishai Hadas 		return;
250628d61370SYishai Hadas 	}
250728d61370SYishai Hadas 
2508c2e53b2cSYishai Hadas 	base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
2509c2e53b2cSYishai Hadas 		qp->flags & MLX5_IB_QP_UNDERLAY) ?
25100fb2ed66Smajd@mellanox.com 	       &qp->raw_packet_qp.rq.base :
25110fb2ed66Smajd@mellanox.com 	       &qp->trans_qp.base;
25120fb2ed66Smajd@mellanox.com 
25136aec21f6SHaggai Eran 	if (qp->state != IB_QPS_RESET) {
2514c2e53b2cSYishai Hadas 		if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET &&
2515c2e53b2cSYishai Hadas 		    !(qp->flags & MLX5_IB_QP_UNDERLAY)) {
2516ad5f8e96Smajd@mellanox.com 			err = mlx5_core_qp_modify(dev->mdev,
25171a412fb1SSaeed Mahameed 						  MLX5_CMD_OP_2RST_QP, 0,
25181a412fb1SSaeed Mahameed 						  NULL, &base->mqp);
2519ad5f8e96Smajd@mellanox.com 		} else {
25200680efa2SAlex Vesker 			struct mlx5_modify_raw_qp_param raw_qp_param = {
25210680efa2SAlex Vesker 				.operation = MLX5_CMD_OP_2RST_QP
25220680efa2SAlex Vesker 			};
25230680efa2SAlex Vesker 
252413eab21fSAviv Heller 			err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0);
2525ad5f8e96Smajd@mellanox.com 		}
2526ad5f8e96Smajd@mellanox.com 		if (err)
2527427c1e7bSmajd@mellanox.com 			mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n",
252819098df2Smajd@mellanox.com 				     base->mqp.qpn);
25296aec21f6SHaggai Eran 	}
2530e126ba97SEli Cohen 
253189ea94a7SMaor Gottlieb 	get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq,
253289ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
253389ea94a7SMaor Gottlieb 
253489ea94a7SMaor Gottlieb 	spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
253589ea94a7SMaor Gottlieb 	mlx5_ib_lock_cqs(send_cq, recv_cq);
253689ea94a7SMaor Gottlieb 	/* del from lists under both locks above to protect reset flow paths */
253789ea94a7SMaor Gottlieb 	list_del(&qp->qps_list);
253889ea94a7SMaor Gottlieb 	if (send_cq)
253989ea94a7SMaor Gottlieb 		list_del(&qp->cq_send_list);
254089ea94a7SMaor Gottlieb 
254189ea94a7SMaor Gottlieb 	if (recv_cq)
254289ea94a7SMaor Gottlieb 		list_del(&qp->cq_recv_list);
2543e126ba97SEli Cohen 
2544e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_KERNEL) {
254519098df2Smajd@mellanox.com 		__mlx5_ib_cq_clean(recv_cq, base->mqp.qpn,
2546e126ba97SEli Cohen 				   qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL);
2547e126ba97SEli Cohen 		if (send_cq != recv_cq)
254819098df2Smajd@mellanox.com 			__mlx5_ib_cq_clean(send_cq, base->mqp.qpn,
254919098df2Smajd@mellanox.com 					   NULL);
2550e126ba97SEli Cohen 	}
255189ea94a7SMaor Gottlieb 	mlx5_ib_unlock_cqs(send_cq, recv_cq);
255289ea94a7SMaor Gottlieb 	spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
2553e126ba97SEli Cohen 
2554c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
2555c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
25560fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp(dev, qp);
25570fb2ed66Smajd@mellanox.com 	} else {
255819098df2Smajd@mellanox.com 		err = mlx5_core_destroy_qp(dev->mdev, &base->mqp);
2559e126ba97SEli Cohen 		if (err)
25600fb2ed66Smajd@mellanox.com 			mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n",
25610fb2ed66Smajd@mellanox.com 				     base->mqp.qpn);
25620fb2ed66Smajd@mellanox.com 	}
2563e126ba97SEli Cohen 
2564e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_KERNEL)
2565e126ba97SEli Cohen 		destroy_qp_kernel(dev, qp);
2566e126ba97SEli Cohen 	else if (qp->create_type == MLX5_QP_USER)
2567bdeacabdSShamir Rabinovitch 		destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata);
2568e126ba97SEli Cohen }
2569e126ba97SEli Cohen 
2570e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type)
2571e126ba97SEli Cohen {
2572e126ba97SEli Cohen 	switch (type) {
2573e126ba97SEli Cohen 	case IB_QPT_SMI:
2574e126ba97SEli Cohen 		return "IB_QPT_SMI";
2575e126ba97SEli Cohen 	case IB_QPT_GSI:
2576e126ba97SEli Cohen 		return "IB_QPT_GSI";
2577e126ba97SEli Cohen 	case IB_QPT_RC:
2578e126ba97SEli Cohen 		return "IB_QPT_RC";
2579e126ba97SEli Cohen 	case IB_QPT_UC:
2580e126ba97SEli Cohen 		return "IB_QPT_UC";
2581e126ba97SEli Cohen 	case IB_QPT_UD:
2582e126ba97SEli Cohen 		return "IB_QPT_UD";
2583e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2584e126ba97SEli Cohen 		return "IB_QPT_RAW_IPV6";
2585e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
2586e126ba97SEli Cohen 		return "IB_QPT_RAW_ETHERTYPE";
2587e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
2588e126ba97SEli Cohen 		return "IB_QPT_XRC_INI";
2589e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2590e126ba97SEli Cohen 		return "IB_QPT_XRC_TGT";
2591e126ba97SEli Cohen 	case IB_QPT_RAW_PACKET:
2592e126ba97SEli Cohen 		return "IB_QPT_RAW_PACKET";
2593e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2594e126ba97SEli Cohen 		return "MLX5_IB_QPT_REG_UMR";
2595b4aaa1f0SMoni Shoua 	case IB_QPT_DRIVER:
2596b4aaa1f0SMoni Shoua 		return "IB_QPT_DRIVER";
2597e126ba97SEli Cohen 	case IB_QPT_MAX:
2598e126ba97SEli Cohen 	default:
2599e126ba97SEli Cohen 		return "Invalid QP type";
2600e126ba97SEli Cohen 	}
2601e126ba97SEli Cohen }
2602e126ba97SEli Cohen 
2603b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd,
2604b4aaa1f0SMoni Shoua 					struct ib_qp_init_attr *attr,
260589944450SShamir Rabinovitch 					struct mlx5_ib_create_qp *ucmd,
260689944450SShamir Rabinovitch 					struct ib_udata *udata)
2607b4aaa1f0SMoni Shoua {
260889944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
260989944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
2610b4aaa1f0SMoni Shoua 	struct mlx5_ib_qp *qp;
2611b4aaa1f0SMoni Shoua 	int err = 0;
2612b4aaa1f0SMoni Shoua 	u32 uidx = MLX5_IB_DEFAULT_UIDX;
2613b4aaa1f0SMoni Shoua 	void *dctc;
2614b4aaa1f0SMoni Shoua 
2615b4aaa1f0SMoni Shoua 	if (!attr->srq || !attr->recv_cq)
2616b4aaa1f0SMoni Shoua 		return ERR_PTR(-EINVAL);
2617b4aaa1f0SMoni Shoua 
261889944450SShamir Rabinovitch 	err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx);
2619b4aaa1f0SMoni Shoua 	if (err)
2620b4aaa1f0SMoni Shoua 		return ERR_PTR(err);
2621b4aaa1f0SMoni Shoua 
2622b4aaa1f0SMoni Shoua 	qp = kzalloc(sizeof(*qp), GFP_KERNEL);
2623b4aaa1f0SMoni Shoua 	if (!qp)
2624b4aaa1f0SMoni Shoua 		return ERR_PTR(-ENOMEM);
2625b4aaa1f0SMoni Shoua 
2626b4aaa1f0SMoni Shoua 	qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL);
2627b4aaa1f0SMoni Shoua 	if (!qp->dct.in) {
2628b4aaa1f0SMoni Shoua 		err = -ENOMEM;
2629b4aaa1f0SMoni Shoua 		goto err_free;
2630b4aaa1f0SMoni Shoua 	}
2631b4aaa1f0SMoni Shoua 
2632a01a5860SYishai Hadas 	MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid);
2633b4aaa1f0SMoni Shoua 	dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
2634776a3906SMoni Shoua 	qp->qp_sub_type = MLX5_IB_QPT_DCT;
2635b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn);
2636b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn);
2637b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn);
2638b4aaa1f0SMoni Shoua 	MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key);
2639b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, user_index, uidx);
2640b4aaa1f0SMoni Shoua 
26415d6ff1baSYonatan Cohen 	if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE)
26425d6ff1baSYonatan Cohen 		configure_responder_scat_cqe(attr, dctc);
26435d6ff1baSYonatan Cohen 
2644b4aaa1f0SMoni Shoua 	qp->state = IB_QPS_RESET;
2645b4aaa1f0SMoni Shoua 
2646b4aaa1f0SMoni Shoua 	return &qp->ibqp;
2647b4aaa1f0SMoni Shoua err_free:
2648b4aaa1f0SMoni Shoua 	kfree(qp);
2649b4aaa1f0SMoni Shoua 	return ERR_PTR(err);
2650b4aaa1f0SMoni Shoua }
2651b4aaa1f0SMoni Shoua 
2652b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev,
2653e126ba97SEli Cohen 			   struct ib_qp_init_attr *init_attr,
2654b4aaa1f0SMoni Shoua 			   struct mlx5_ib_create_qp *ucmd,
2655b4aaa1f0SMoni Shoua 			   struct ib_udata *udata)
2656b4aaa1f0SMoni Shoua {
2657b4aaa1f0SMoni Shoua 	enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI };
2658b4aaa1f0SMoni Shoua 	int err;
2659b4aaa1f0SMoni Shoua 
2660b4aaa1f0SMoni Shoua 	if (!udata)
2661b4aaa1f0SMoni Shoua 		return -EINVAL;
2662b4aaa1f0SMoni Shoua 
2663b4aaa1f0SMoni Shoua 	if (udata->inlen < sizeof(*ucmd)) {
2664b4aaa1f0SMoni Shoua 		mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n");
2665b4aaa1f0SMoni Shoua 		return -EINVAL;
2666b4aaa1f0SMoni Shoua 	}
2667b4aaa1f0SMoni Shoua 	err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd));
2668b4aaa1f0SMoni Shoua 	if (err)
2669b4aaa1f0SMoni Shoua 		return err;
2670b4aaa1f0SMoni Shoua 
2671b4aaa1f0SMoni Shoua 	if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) {
2672b4aaa1f0SMoni Shoua 		init_attr->qp_type = MLX5_IB_QPT_DCI;
2673b4aaa1f0SMoni Shoua 	} else {
2674b4aaa1f0SMoni Shoua 		if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) {
2675b4aaa1f0SMoni Shoua 			init_attr->qp_type = MLX5_IB_QPT_DCT;
2676b4aaa1f0SMoni Shoua 		} else {
2677b4aaa1f0SMoni Shoua 			mlx5_ib_dbg(dev, "Invalid QP flags\n");
2678b4aaa1f0SMoni Shoua 			return -EINVAL;
2679b4aaa1f0SMoni Shoua 		}
2680b4aaa1f0SMoni Shoua 	}
2681b4aaa1f0SMoni Shoua 
2682b4aaa1f0SMoni Shoua 	if (!MLX5_CAP_GEN(dev->mdev, dct)) {
2683b4aaa1f0SMoni Shoua 		mlx5_ib_dbg(dev, "DC transport is not supported\n");
2684b4aaa1f0SMoni Shoua 		return -EOPNOTSUPP;
2685b4aaa1f0SMoni Shoua 	}
2686b4aaa1f0SMoni Shoua 
2687b4aaa1f0SMoni Shoua 	return 0;
2688b4aaa1f0SMoni Shoua }
2689b4aaa1f0SMoni Shoua 
2690b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd,
2691b4aaa1f0SMoni Shoua 				struct ib_qp_init_attr *verbs_init_attr,
2692e126ba97SEli Cohen 				struct ib_udata *udata)
2693e126ba97SEli Cohen {
2694e126ba97SEli Cohen 	struct mlx5_ib_dev *dev;
2695e126ba97SEli Cohen 	struct mlx5_ib_qp *qp;
2696e126ba97SEli Cohen 	u16 xrcdn = 0;
2697e126ba97SEli Cohen 	int err;
2698b4aaa1f0SMoni Shoua 	struct ib_qp_init_attr mlx_init_attr;
2699b4aaa1f0SMoni Shoua 	struct ib_qp_init_attr *init_attr = verbs_init_attr;
270089944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
270189944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
2702e126ba97SEli Cohen 
2703e126ba97SEli Cohen 	if (pd) {
2704e126ba97SEli Cohen 		dev = to_mdev(pd->device);
27050fb2ed66Smajd@mellanox.com 
27060fb2ed66Smajd@mellanox.com 		if (init_attr->qp_type == IB_QPT_RAW_PACKET) {
270789944450SShamir Rabinovitch 			if (!ucontext) {
27080fb2ed66Smajd@mellanox.com 				mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n");
27090fb2ed66Smajd@mellanox.com 				return ERR_PTR(-EINVAL);
271089944450SShamir Rabinovitch 			} else if (!ucontext->cqe_version) {
27110fb2ed66Smajd@mellanox.com 				mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n");
27120fb2ed66Smajd@mellanox.com 				return ERR_PTR(-EINVAL);
27130fb2ed66Smajd@mellanox.com 			}
27140fb2ed66Smajd@mellanox.com 		}
271509f16cf5SMajd Dibbiny 	} else {
271609f16cf5SMajd Dibbiny 		/* being cautious here */
271709f16cf5SMajd Dibbiny 		if (init_attr->qp_type != IB_QPT_XRC_TGT &&
271809f16cf5SMajd Dibbiny 		    init_attr->qp_type != MLX5_IB_QPT_REG_UMR) {
271909f16cf5SMajd Dibbiny 			pr_warn("%s: no PD for transport %s\n", __func__,
272009f16cf5SMajd Dibbiny 				ib_qp_type_str(init_attr->qp_type));
272109f16cf5SMajd Dibbiny 			return ERR_PTR(-EINVAL);
272209f16cf5SMajd Dibbiny 		}
272309f16cf5SMajd Dibbiny 		dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device);
2724e126ba97SEli Cohen 	}
2725e126ba97SEli Cohen 
2726b4aaa1f0SMoni Shoua 	if (init_attr->qp_type == IB_QPT_DRIVER) {
2727b4aaa1f0SMoni Shoua 		struct mlx5_ib_create_qp ucmd;
2728b4aaa1f0SMoni Shoua 
2729b4aaa1f0SMoni Shoua 		init_attr = &mlx_init_attr;
2730b4aaa1f0SMoni Shoua 		memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr));
2731b4aaa1f0SMoni Shoua 		err = set_mlx_qp_type(dev, init_attr, &ucmd, udata);
2732b4aaa1f0SMoni Shoua 		if (err)
2733b4aaa1f0SMoni Shoua 			return ERR_PTR(err);
2734c32a4f29SMoni Shoua 
2735c32a4f29SMoni Shoua 		if (init_attr->qp_type == MLX5_IB_QPT_DCI) {
2736c32a4f29SMoni Shoua 			if (init_attr->cap.max_recv_wr ||
2737c32a4f29SMoni Shoua 			    init_attr->cap.max_recv_sge) {
2738c32a4f29SMoni Shoua 				mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n");
2739c32a4f29SMoni Shoua 				return ERR_PTR(-EINVAL);
2740c32a4f29SMoni Shoua 			}
2741776a3906SMoni Shoua 		} else {
274289944450SShamir Rabinovitch 			return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata);
2743c32a4f29SMoni Shoua 		}
2744b4aaa1f0SMoni Shoua 	}
2745b4aaa1f0SMoni Shoua 
2746e126ba97SEli Cohen 	switch (init_attr->qp_type) {
2747e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2748e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
2749938fe83cSSaeed Mahameed 		if (!MLX5_CAP_GEN(dev->mdev, xrc)) {
2750e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "XRC not supported\n");
2751e126ba97SEli Cohen 			return ERR_PTR(-ENOSYS);
2752e126ba97SEli Cohen 		}
2753e126ba97SEli Cohen 		init_attr->recv_cq = NULL;
2754e126ba97SEli Cohen 		if (init_attr->qp_type == IB_QPT_XRC_TGT) {
2755e126ba97SEli Cohen 			xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn;
2756e126ba97SEli Cohen 			init_attr->send_cq = NULL;
2757e126ba97SEli Cohen 		}
2758e126ba97SEli Cohen 
2759e126ba97SEli Cohen 		/* fall through */
27600fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_PACKET:
2761e126ba97SEli Cohen 	case IB_QPT_RC:
2762e126ba97SEli Cohen 	case IB_QPT_UC:
2763e126ba97SEli Cohen 	case IB_QPT_UD:
2764e126ba97SEli Cohen 	case IB_QPT_SMI:
2765d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
2766e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2767c32a4f29SMoni Shoua 	case MLX5_IB_QPT_DCI:
2768e126ba97SEli Cohen 		qp = kzalloc(sizeof(*qp), GFP_KERNEL);
2769e126ba97SEli Cohen 		if (!qp)
2770e126ba97SEli Cohen 			return ERR_PTR(-ENOMEM);
2771e126ba97SEli Cohen 
2772e126ba97SEli Cohen 		err = create_qp_common(dev, pd, init_attr, udata, qp);
2773e126ba97SEli Cohen 		if (err) {
2774e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "create_qp_common failed\n");
2775e126ba97SEli Cohen 			kfree(qp);
2776e126ba97SEli Cohen 			return ERR_PTR(err);
2777e126ba97SEli Cohen 		}
2778e126ba97SEli Cohen 
2779e126ba97SEli Cohen 		if (is_qp0(init_attr->qp_type))
2780e126ba97SEli Cohen 			qp->ibqp.qp_num = 0;
2781e126ba97SEli Cohen 		else if (is_qp1(init_attr->qp_type))
2782e126ba97SEli Cohen 			qp->ibqp.qp_num = 1;
2783e126ba97SEli Cohen 		else
278419098df2Smajd@mellanox.com 			qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn;
2785e126ba97SEli Cohen 
2786e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n",
278719098df2Smajd@mellanox.com 			    qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn,
2788a1ab8402SEli Cohen 			    init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1,
2789a1ab8402SEli Cohen 			    init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1);
2790e126ba97SEli Cohen 
279119098df2Smajd@mellanox.com 		qp->trans_qp.xrcdn = xrcdn;
2792e126ba97SEli Cohen 
2793e126ba97SEli Cohen 		break;
2794e126ba97SEli Cohen 
2795d16e91daSHaggai Eran 	case IB_QPT_GSI:
2796d16e91daSHaggai Eran 		return mlx5_ib_gsi_create_qp(pd, init_attr);
2797d16e91daSHaggai Eran 
2798e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2799e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
2800e126ba97SEli Cohen 	case IB_QPT_MAX:
2801e126ba97SEli Cohen 	default:
2802e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "unsupported qp type %d\n",
2803e126ba97SEli Cohen 			    init_attr->qp_type);
2804e126ba97SEli Cohen 		/* Don't support raw QPs */
2805bb8865f4SKamal Heib 		return ERR_PTR(-EOPNOTSUPP);
2806e126ba97SEli Cohen 	}
2807e126ba97SEli Cohen 
2808b4aaa1f0SMoni Shoua 	if (verbs_init_attr->qp_type == IB_QPT_DRIVER)
2809b4aaa1f0SMoni Shoua 		qp->qp_sub_type = init_attr->qp_type;
2810b4aaa1f0SMoni Shoua 
2811e126ba97SEli Cohen 	return &qp->ibqp;
2812e126ba97SEli Cohen }
2813e126ba97SEli Cohen 
2814776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp)
2815776a3906SMoni Shoua {
2816776a3906SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device);
2817776a3906SMoni Shoua 
2818776a3906SMoni Shoua 	if (mqp->state == IB_QPS_RTR) {
2819776a3906SMoni Shoua 		int err;
2820776a3906SMoni Shoua 
2821776a3906SMoni Shoua 		err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct);
2822776a3906SMoni Shoua 		if (err) {
2823776a3906SMoni Shoua 			mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err);
2824776a3906SMoni Shoua 			return err;
2825776a3906SMoni Shoua 		}
2826776a3906SMoni Shoua 	}
2827776a3906SMoni Shoua 
2828776a3906SMoni Shoua 	kfree(mqp->dct.in);
2829776a3906SMoni Shoua 	kfree(mqp);
2830776a3906SMoni Shoua 	return 0;
2831776a3906SMoni Shoua }
2832776a3906SMoni Shoua 
2833c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata)
2834e126ba97SEli Cohen {
2835e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
2836e126ba97SEli Cohen 	struct mlx5_ib_qp *mqp = to_mqp(qp);
2837e126ba97SEli Cohen 
2838d16e91daSHaggai Eran 	if (unlikely(qp->qp_type == IB_QPT_GSI))
2839d16e91daSHaggai Eran 		return mlx5_ib_gsi_destroy_qp(qp);
2840d16e91daSHaggai Eran 
2841776a3906SMoni Shoua 	if (mqp->qp_sub_type == MLX5_IB_QPT_DCT)
2842776a3906SMoni Shoua 		return mlx5_ib_destroy_dct(mqp);
2843776a3906SMoni Shoua 
2844bdeacabdSShamir Rabinovitch 	destroy_qp_common(dev, mqp, udata);
2845e126ba97SEli Cohen 
2846e126ba97SEli Cohen 	kfree(mqp);
2847e126ba97SEli Cohen 
2848e126ba97SEli Cohen 	return 0;
2849e126ba97SEli Cohen }
2850e126ba97SEli Cohen 
2851a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp,
2852a60109dcSYonatan Cohen 				const struct ib_qp_attr *attr,
2853bf3b4f06SBart Van Assche 				int attr_mask, __be32 *hw_access_flags_be)
2854e126ba97SEli Cohen {
2855e126ba97SEli Cohen 	u8 dest_rd_atomic;
2856bf3b4f06SBart Van Assche 	u32 access_flags, hw_access_flags = 0;
2857e126ba97SEli Cohen 
2858a60109dcSYonatan Cohen 	struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device);
2859a60109dcSYonatan Cohen 
2860e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
2861e126ba97SEli Cohen 		dest_rd_atomic = attr->max_dest_rd_atomic;
2862e126ba97SEli Cohen 	else
286319098df2Smajd@mellanox.com 		dest_rd_atomic = qp->trans_qp.resp_depth;
2864e126ba97SEli Cohen 
2865e126ba97SEli Cohen 	if (attr_mask & IB_QP_ACCESS_FLAGS)
2866e126ba97SEli Cohen 		access_flags = attr->qp_access_flags;
2867e126ba97SEli Cohen 	else
286819098df2Smajd@mellanox.com 		access_flags = qp->trans_qp.atomic_rd_en;
2869e126ba97SEli Cohen 
2870e126ba97SEli Cohen 	if (!dest_rd_atomic)
2871e126ba97SEli Cohen 		access_flags &= IB_ACCESS_REMOTE_WRITE;
2872e126ba97SEli Cohen 
2873e126ba97SEli Cohen 	if (access_flags & IB_ACCESS_REMOTE_READ)
2874bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RRE;
287513f8d9c1SYonatan Cohen 	if (access_flags & IB_ACCESS_REMOTE_ATOMIC) {
2876a60109dcSYonatan Cohen 		int atomic_mode;
2877e126ba97SEli Cohen 
2878a60109dcSYonatan Cohen 		atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type);
2879a60109dcSYonatan Cohen 		if (atomic_mode < 0)
2880a60109dcSYonatan Cohen 			return -EOPNOTSUPP;
2881a60109dcSYonatan Cohen 
2882bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RAE;
2883bf3b4f06SBart Van Assche 		hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET;
2884a60109dcSYonatan Cohen 	}
2885a60109dcSYonatan Cohen 
2886a60109dcSYonatan Cohen 	if (access_flags & IB_ACCESS_REMOTE_WRITE)
2887bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RWE;
2888a60109dcSYonatan Cohen 
2889bf3b4f06SBart Van Assche 	*hw_access_flags_be = cpu_to_be32(hw_access_flags);
2890a60109dcSYonatan Cohen 
2891a60109dcSYonatan Cohen 	return 0;
2892e126ba97SEli Cohen }
2893e126ba97SEli Cohen 
2894e126ba97SEli Cohen enum {
2895e126ba97SEli Cohen 	MLX5_PATH_FLAG_FL	= 1 << 0,
2896e126ba97SEli Cohen 	MLX5_PATH_FLAG_FREE_AR	= 1 << 1,
2897e126ba97SEli Cohen 	MLX5_PATH_FLAG_COUNTER	= 1 << 2,
2898e126ba97SEli Cohen };
2899e126ba97SEli Cohen 
2900e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate)
2901e126ba97SEli Cohen {
29024f32ac2eSDanit Goldberg 	if (rate == IB_RATE_PORT_CURRENT)
2903e126ba97SEli Cohen 		return 0;
29044f32ac2eSDanit Goldberg 
2905a5a5d199SMichael Guralnik 	if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS)
2906e126ba97SEli Cohen 		return -EINVAL;
29074f32ac2eSDanit Goldberg 
29084f32ac2eSDanit Goldberg 	while (rate != IB_RATE_PORT_CURRENT &&
2909e126ba97SEli Cohen 	       !(1 << (rate + MLX5_STAT_RATE_OFFSET) &
2910938fe83cSSaeed Mahameed 		 MLX5_CAP_GEN(dev->mdev, stat_rate_support)))
2911e126ba97SEli Cohen 		--rate;
2912e126ba97SEli Cohen 
29134f32ac2eSDanit Goldberg 	return rate ? rate + MLX5_STAT_RATE_OFFSET : rate;
2914e126ba97SEli Cohen }
2915e126ba97SEli Cohen 
291675850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev,
29171cd6dbd3SYishai Hadas 				      struct mlx5_ib_sq *sq, u8 sl,
29181cd6dbd3SYishai Hadas 				      struct ib_pd *pd)
291975850d0bSmajd@mellanox.com {
292075850d0bSmajd@mellanox.com 	void *in;
292175850d0bSmajd@mellanox.com 	void *tisc;
292275850d0bSmajd@mellanox.com 	int inlen;
292375850d0bSmajd@mellanox.com 	int err;
292475850d0bSmajd@mellanox.com 
292575850d0bSmajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_tis_in);
29261b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
292775850d0bSmajd@mellanox.com 	if (!in)
292875850d0bSmajd@mellanox.com 		return -ENOMEM;
292975850d0bSmajd@mellanox.com 
293075850d0bSmajd@mellanox.com 	MLX5_SET(modify_tis_in, in, bitmask.prio, 1);
29311cd6dbd3SYishai Hadas 	MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid);
293275850d0bSmajd@mellanox.com 
293375850d0bSmajd@mellanox.com 	tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
293475850d0bSmajd@mellanox.com 	MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1));
293575850d0bSmajd@mellanox.com 
293675850d0bSmajd@mellanox.com 	err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen);
293775850d0bSmajd@mellanox.com 
293875850d0bSmajd@mellanox.com 	kvfree(in);
293975850d0bSmajd@mellanox.com 
294075850d0bSmajd@mellanox.com 	return err;
294175850d0bSmajd@mellanox.com }
294275850d0bSmajd@mellanox.com 
294313eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev,
29441cd6dbd3SYishai Hadas 					 struct mlx5_ib_sq *sq, u8 tx_affinity,
29451cd6dbd3SYishai Hadas 					 struct ib_pd *pd)
294613eab21fSAviv Heller {
294713eab21fSAviv Heller 	void *in;
294813eab21fSAviv Heller 	void *tisc;
294913eab21fSAviv Heller 	int inlen;
295013eab21fSAviv Heller 	int err;
295113eab21fSAviv Heller 
295213eab21fSAviv Heller 	inlen = MLX5_ST_SZ_BYTES(modify_tis_in);
29531b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
295413eab21fSAviv Heller 	if (!in)
295513eab21fSAviv Heller 		return -ENOMEM;
295613eab21fSAviv Heller 
295713eab21fSAviv Heller 	MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1);
29581cd6dbd3SYishai Hadas 	MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid);
295913eab21fSAviv Heller 
296013eab21fSAviv Heller 	tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
296113eab21fSAviv Heller 	MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity);
296213eab21fSAviv Heller 
296313eab21fSAviv Heller 	err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen);
296413eab21fSAviv Heller 
296513eab21fSAviv Heller 	kvfree(in);
296613eab21fSAviv Heller 
296713eab21fSAviv Heller 	return err;
296813eab21fSAviv Heller }
296913eab21fSAviv Heller 
297075850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
297190898850SDasaratharaman Chandramouli 			 const struct rdma_ah_attr *ah,
2972e126ba97SEli Cohen 			 struct mlx5_qp_path *path, u8 port, int attr_mask,
2973f879ee8dSAchiad Shochat 			 u32 path_flags, const struct ib_qp_attr *attr,
2974f879ee8dSAchiad Shochat 			 bool alt)
2975e126ba97SEli Cohen {
2976d8966fcdSDasaratharaman Chandramouli 	const struct ib_global_route *grh = rdma_ah_read_grh(ah);
2977e126ba97SEli Cohen 	int err;
2978ed88451eSMajd Dibbiny 	enum ib_gid_type gid_type;
2979d8966fcdSDasaratharaman Chandramouli 	u8 ah_flags = rdma_ah_get_ah_flags(ah);
2980d8966fcdSDasaratharaman Chandramouli 	u8 sl = rdma_ah_get_sl(ah);
2981e126ba97SEli Cohen 
2982e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX)
2983f879ee8dSAchiad Shochat 		path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index :
2984f879ee8dSAchiad Shochat 						     attr->pkey_index);
2985e126ba97SEli Cohen 
2986d8966fcdSDasaratharaman Chandramouli 	if (ah_flags & IB_AH_GRH) {
2987d8966fcdSDasaratharaman Chandramouli 		if (grh->sgid_index >=
2988938fe83cSSaeed Mahameed 		    dev->mdev->port_caps[port - 1].gid_table_len) {
2989f4f01b54SJoe Perches 			pr_err("sgid_index (%u) too large. max is %d\n",
2990d8966fcdSDasaratharaman Chandramouli 			       grh->sgid_index,
2991938fe83cSSaeed Mahameed 			       dev->mdev->port_caps[port - 1].gid_table_len);
2992f83b4263SEli Cohen 			return -EINVAL;
2993f83b4263SEli Cohen 		}
29942811ba51SAchiad Shochat 	}
299544c58487SDasaratharaman Chandramouli 
299644c58487SDasaratharaman Chandramouli 	if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) {
2997d8966fcdSDasaratharaman Chandramouli 		if (!(ah_flags & IB_AH_GRH))
29982811ba51SAchiad Shochat 			return -EINVAL;
299947ec3866SParav Pandit 
300044c58487SDasaratharaman Chandramouli 		memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac));
30012b621851SMajd Dibbiny 		if (qp->ibqp.qp_type == IB_QPT_RC ||
30022b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_UC ||
30032b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_XRC_INI ||
30042b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_XRC_TGT)
300547ec3866SParav Pandit 			path->udp_sport =
300647ec3866SParav Pandit 				mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr);
3007d8966fcdSDasaratharaman Chandramouli 		path->dci_cfi_prio_sl = (sl & 0x7) << 4;
300847ec3866SParav Pandit 		gid_type = ah->grh.sgid_attr->gid_type;
3009ed88451eSMajd Dibbiny 		if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
3010d8966fcdSDasaratharaman Chandramouli 			path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f;
30112811ba51SAchiad Shochat 	} else {
3012d3ae2bdeSNoa Osherovich 		path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
3013d3ae2bdeSNoa Osherovich 		path->fl_free_ar |=
3014d3ae2bdeSNoa Osherovich 			(path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0;
3015d8966fcdSDasaratharaman Chandramouli 		path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah));
3016d8966fcdSDasaratharaman Chandramouli 		path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f;
3017d8966fcdSDasaratharaman Chandramouli 		if (ah_flags & IB_AH_GRH)
3018e126ba97SEli Cohen 			path->grh_mlid	|= 1 << 7;
3019d8966fcdSDasaratharaman Chandramouli 		path->dci_cfi_prio_sl = sl & 0xf;
30202811ba51SAchiad Shochat 	}
30212811ba51SAchiad Shochat 
3022d8966fcdSDasaratharaman Chandramouli 	if (ah_flags & IB_AH_GRH) {
3023d8966fcdSDasaratharaman Chandramouli 		path->mgid_index = grh->sgid_index;
3024d8966fcdSDasaratharaman Chandramouli 		path->hop_limit  = grh->hop_limit;
3025e126ba97SEli Cohen 		path->tclass_flowlabel =
3026d8966fcdSDasaratharaman Chandramouli 			cpu_to_be32((grh->traffic_class << 20) |
3027d8966fcdSDasaratharaman Chandramouli 				    (grh->flow_label));
3028d8966fcdSDasaratharaman Chandramouli 		memcpy(path->rgid, grh->dgid.raw, 16);
3029e126ba97SEli Cohen 	}
3030e126ba97SEli Cohen 
3031d8966fcdSDasaratharaman Chandramouli 	err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah));
3032e126ba97SEli Cohen 	if (err < 0)
3033e126ba97SEli Cohen 		return err;
3034e126ba97SEli Cohen 	path->static_rate = err;
3035e126ba97SEli Cohen 	path->port = port;
3036e126ba97SEli Cohen 
3037e126ba97SEli Cohen 	if (attr_mask & IB_QP_TIMEOUT)
3038f879ee8dSAchiad Shochat 		path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3;
3039e126ba97SEli Cohen 
304075850d0bSmajd@mellanox.com 	if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt)
304175850d0bSmajd@mellanox.com 		return modify_raw_packet_eth_prio(dev->mdev,
304275850d0bSmajd@mellanox.com 						  &qp->raw_packet_qp.sq,
30431cd6dbd3SYishai Hadas 						  sl & 0xf, qp->ibqp.pd);
304475850d0bSmajd@mellanox.com 
3045e126ba97SEli Cohen 	return 0;
3046e126ba97SEli Cohen }
3047e126ba97SEli Cohen 
3048e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = {
3049e126ba97SEli Cohen 	[MLX5_QP_STATE_INIT] = {
3050e126ba97SEli Cohen 		[MLX5_QP_STATE_INIT] = {
3051e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE		|
3052e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
3053e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3054e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
3055e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
3056e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE		|
3057e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
3058e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
3059e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX	|
3060e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_Q_KEY		|
3061e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
30628f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE		|
30638f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RAE		|
30648f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RWE		|
30658f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
30668f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PRI_PORT,
3067e126ba97SEli Cohen 		},
3068e126ba97SEli Cohen 		[MLX5_QP_STATE_RTR] = {
3069e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH  |
3070e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RRE            |
3071e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE            |
3072e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
3073e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
3074e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH  |
3075e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
3076e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
3077e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX     |
3078e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_Q_KEY,
3079e126ba97SEli Cohen 			[MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX	|
3080e126ba97SEli Cohen 					   MLX5_QP_OPTPAR_Q_KEY,
3081a4774e90SEli Cohen 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH |
3082a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RRE            |
3083a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RAE            |
3084a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
3085a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
3086e126ba97SEli Cohen 		},
3087e126ba97SEli Cohen 	},
3088e126ba97SEli Cohen 	[MLX5_QP_STATE_RTR] = {
3089e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3090e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
3091e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RRE		|
3092e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
3093e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3094e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3095e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RNR_TIMEOUT,
3096e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
3097e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3098e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE,
3099e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY,
31008f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
31018f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RRE		|
31028f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RAE		|
31038f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RWE		|
31048f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PM_STATE	|
31058f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RNR_TIMEOUT,
3106e126ba97SEli Cohen 		},
3107e126ba97SEli Cohen 	},
3108e126ba97SEli Cohen 	[MLX5_QP_STATE_RTS] = {
3109e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3110e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE		|
3111e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
3112e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3113e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RNR_TIMEOUT	|
3114c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3115c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3116e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE		|
3117c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3118c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3119e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY		|
3120e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_SRQN		|
3121e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_CQN_RCV,
31228f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE		|
31238f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RAE		|
31248f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RWE		|
31258f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RNR_TIMEOUT	|
31268f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PM_STATE	|
31278f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3128e126ba97SEli Cohen 		},
3129e126ba97SEli Cohen 	},
3130e126ba97SEli Cohen 	[MLX5_QP_STATE_SQER] = {
3131e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3132e126ba97SEli Cohen 			[MLX5_QP_ST_UD]	 = MLX5_QP_OPTPAR_Q_KEY,
3133e126ba97SEli Cohen 			[MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY,
313475959f56SEli Cohen 			[MLX5_QP_ST_UC]	 = MLX5_QP_OPTPAR_RWE,
3135a4774e90SEli Cohen 			[MLX5_QP_ST_RC]	 = MLX5_QP_OPTPAR_RNR_TIMEOUT	|
3136a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RWE		|
3137a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RAE		|
3138a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RRE,
31398f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC]  = MLX5_QP_OPTPAR_RNR_TIMEOUT	|
31408f4426aaSJack Morgenstein 					   MLX5_QP_OPTPAR_RWE		|
31418f4426aaSJack Morgenstein 					   MLX5_QP_OPTPAR_RAE		|
31428f4426aaSJack Morgenstein 					   MLX5_QP_OPTPAR_RRE,
3143e126ba97SEli Cohen 		},
3144e126ba97SEli Cohen 	},
3145e126ba97SEli Cohen };
3146e126ba97SEli Cohen 
3147e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask)
3148e126ba97SEli Cohen {
3149e126ba97SEli Cohen 	switch (ib_mask) {
3150e126ba97SEli Cohen 	case IB_QP_STATE:
3151e126ba97SEli Cohen 		return 0;
3152e126ba97SEli Cohen 	case IB_QP_CUR_STATE:
3153e126ba97SEli Cohen 		return 0;
3154e126ba97SEli Cohen 	case IB_QP_EN_SQD_ASYNC_NOTIFY:
3155e126ba97SEli Cohen 		return 0;
3156e126ba97SEli Cohen 	case IB_QP_ACCESS_FLAGS:
3157e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE |
3158e126ba97SEli Cohen 			MLX5_QP_OPTPAR_RAE;
3159e126ba97SEli Cohen 	case IB_QP_PKEY_INDEX:
3160e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PKEY_INDEX;
3161e126ba97SEli Cohen 	case IB_QP_PORT:
3162e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PRI_PORT;
3163e126ba97SEli Cohen 	case IB_QP_QKEY:
3164e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_Q_KEY;
3165e126ba97SEli Cohen 	case IB_QP_AV:
3166e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH |
3167e126ba97SEli Cohen 			MLX5_QP_OPTPAR_PRI_PORT;
3168e126ba97SEli Cohen 	case IB_QP_PATH_MTU:
3169e126ba97SEli Cohen 		return 0;
3170e126ba97SEli Cohen 	case IB_QP_TIMEOUT:
3171e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_ACK_TIMEOUT;
3172e126ba97SEli Cohen 	case IB_QP_RETRY_CNT:
3173e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RETRY_COUNT;
3174e126ba97SEli Cohen 	case IB_QP_RNR_RETRY:
3175e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RNR_RETRY;
3176e126ba97SEli Cohen 	case IB_QP_RQ_PSN:
3177e126ba97SEli Cohen 		return 0;
3178e126ba97SEli Cohen 	case IB_QP_MAX_QP_RD_ATOMIC:
3179e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_SRA_MAX;
3180e126ba97SEli Cohen 	case IB_QP_ALT_PATH:
3181e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_ALT_ADDR_PATH;
3182e126ba97SEli Cohen 	case IB_QP_MIN_RNR_TIMER:
3183e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RNR_TIMEOUT;
3184e126ba97SEli Cohen 	case IB_QP_SQ_PSN:
3185e126ba97SEli Cohen 		return 0;
3186e126ba97SEli Cohen 	case IB_QP_MAX_DEST_RD_ATOMIC:
3187e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE |
3188e126ba97SEli Cohen 			MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE;
3189e126ba97SEli Cohen 	case IB_QP_PATH_MIG_STATE:
3190e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PM_STATE;
3191e126ba97SEli Cohen 	case IB_QP_CAP:
3192e126ba97SEli Cohen 		return 0;
3193e126ba97SEli Cohen 	case IB_QP_DEST_QPN:
3194e126ba97SEli Cohen 		return 0;
3195e126ba97SEli Cohen 	}
3196e126ba97SEli Cohen 	return 0;
3197e126ba97SEli Cohen }
3198e126ba97SEli Cohen 
3199e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask)
3200e126ba97SEli Cohen {
3201e126ba97SEli Cohen 	int result = 0;
3202e126ba97SEli Cohen 	int i;
3203e126ba97SEli Cohen 
3204e126ba97SEli Cohen 	for (i = 0; i < 8 * sizeof(int); i++) {
3205e126ba97SEli Cohen 		if ((1 << i) & ib_mask)
3206e126ba97SEli Cohen 			result |= ib_nr_to_mlx5_nr(1 << i);
3207e126ba97SEli Cohen 	}
3208e126ba97SEli Cohen 
3209e126ba97SEli Cohen 	return result;
3210e126ba97SEli Cohen }
3211e126ba97SEli Cohen 
321234d57585SYishai Hadas static int modify_raw_packet_qp_rq(
321334d57585SYishai Hadas 	struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state,
321434d57585SYishai Hadas 	const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd)
3215ad5f8e96Smajd@mellanox.com {
3216ad5f8e96Smajd@mellanox.com 	void *in;
3217ad5f8e96Smajd@mellanox.com 	void *rqc;
3218ad5f8e96Smajd@mellanox.com 	int inlen;
3219ad5f8e96Smajd@mellanox.com 	int err;
3220ad5f8e96Smajd@mellanox.com 
3221ad5f8e96Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_rq_in);
32221b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
3223ad5f8e96Smajd@mellanox.com 	if (!in)
3224ad5f8e96Smajd@mellanox.com 		return -ENOMEM;
3225ad5f8e96Smajd@mellanox.com 
3226ad5f8e96Smajd@mellanox.com 	MLX5_SET(modify_rq_in, in, rq_state, rq->state);
322734d57585SYishai Hadas 	MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid);
3228ad5f8e96Smajd@mellanox.com 
3229ad5f8e96Smajd@mellanox.com 	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
3230ad5f8e96Smajd@mellanox.com 	MLX5_SET(rqc, rqc, state, new_state);
3231ad5f8e96Smajd@mellanox.com 
3232eb49ab0cSAlex Vesker 	if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) {
3233eb49ab0cSAlex Vesker 		if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
3234eb49ab0cSAlex Vesker 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
323523a6964eSMajd Dibbiny 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID);
3236eb49ab0cSAlex Vesker 			MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id);
3237eb49ab0cSAlex Vesker 		} else
32385a738b5dSJason Gunthorpe 			dev_info_once(
32395a738b5dSJason Gunthorpe 				&dev->ib_dev.dev,
32405a738b5dSJason Gunthorpe 				"RAW PACKET QP counters are not supported on current FW\n");
3241eb49ab0cSAlex Vesker 	}
3242eb49ab0cSAlex Vesker 
3243eb49ab0cSAlex Vesker 	err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen);
3244ad5f8e96Smajd@mellanox.com 	if (err)
3245ad5f8e96Smajd@mellanox.com 		goto out;
3246ad5f8e96Smajd@mellanox.com 
3247ad5f8e96Smajd@mellanox.com 	rq->state = new_state;
3248ad5f8e96Smajd@mellanox.com 
3249ad5f8e96Smajd@mellanox.com out:
3250ad5f8e96Smajd@mellanox.com 	kvfree(in);
3251ad5f8e96Smajd@mellanox.com 	return err;
3252ad5f8e96Smajd@mellanox.com }
3253ad5f8e96Smajd@mellanox.com 
3254c14003f0SYishai Hadas static int modify_raw_packet_qp_sq(
3255c14003f0SYishai Hadas 	struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state,
3256c14003f0SYishai Hadas 	const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd)
3257ad5f8e96Smajd@mellanox.com {
32587d29f349SBodong Wang 	struct mlx5_ib_qp *ibqp = sq->base.container_mibqp;
325961147f39SBodong Wang 	struct mlx5_rate_limit old_rl = ibqp->rl;
326061147f39SBodong Wang 	struct mlx5_rate_limit new_rl = old_rl;
326161147f39SBodong Wang 	bool new_rate_added = false;
32627d29f349SBodong Wang 	u16 rl_index = 0;
3263ad5f8e96Smajd@mellanox.com 	void *in;
3264ad5f8e96Smajd@mellanox.com 	void *sqc;
3265ad5f8e96Smajd@mellanox.com 	int inlen;
3266ad5f8e96Smajd@mellanox.com 	int err;
3267ad5f8e96Smajd@mellanox.com 
3268ad5f8e96Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_sq_in);
32691b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
3270ad5f8e96Smajd@mellanox.com 	if (!in)
3271ad5f8e96Smajd@mellanox.com 		return -ENOMEM;
3272ad5f8e96Smajd@mellanox.com 
3273c14003f0SYishai Hadas 	MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid);
3274ad5f8e96Smajd@mellanox.com 	MLX5_SET(modify_sq_in, in, sq_state, sq->state);
3275ad5f8e96Smajd@mellanox.com 
3276ad5f8e96Smajd@mellanox.com 	sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx);
3277ad5f8e96Smajd@mellanox.com 	MLX5_SET(sqc, sqc, state, new_state);
3278ad5f8e96Smajd@mellanox.com 
32797d29f349SBodong Wang 	if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) {
32807d29f349SBodong Wang 		if (new_state != MLX5_SQC_STATE_RDY)
32817d29f349SBodong Wang 			pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n",
32827d29f349SBodong Wang 				__func__);
32837d29f349SBodong Wang 		else
328461147f39SBodong Wang 			new_rl = raw_qp_param->rl;
32857d29f349SBodong Wang 	}
3286ad5f8e96Smajd@mellanox.com 
328761147f39SBodong Wang 	if (!mlx5_rl_are_equal(&old_rl, &new_rl)) {
328861147f39SBodong Wang 		if (new_rl.rate) {
328961147f39SBodong Wang 			err = mlx5_rl_add_rate(dev, &rl_index, &new_rl);
32907d29f349SBodong Wang 			if (err) {
329161147f39SBodong Wang 				pr_err("Failed configuring rate limit(err %d): \
329261147f39SBodong Wang 				       rate %u, max_burst_sz %u, typical_pkt_sz %u\n",
329361147f39SBodong Wang 				       err, new_rl.rate, new_rl.max_burst_sz,
329461147f39SBodong Wang 				       new_rl.typical_pkt_sz);
329561147f39SBodong Wang 
32967d29f349SBodong Wang 				goto out;
32977d29f349SBodong Wang 			}
329861147f39SBodong Wang 			new_rate_added = true;
32997d29f349SBodong Wang 		}
33007d29f349SBodong Wang 
33017d29f349SBodong Wang 		MLX5_SET64(modify_sq_in, in, modify_bitmask, 1);
330261147f39SBodong Wang 		/* index 0 means no limit */
33037d29f349SBodong Wang 		MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index);
33047d29f349SBodong Wang 	}
33057d29f349SBodong Wang 
33067d29f349SBodong Wang 	err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen);
33077d29f349SBodong Wang 	if (err) {
33087d29f349SBodong Wang 		/* Remove new rate from table if failed */
330961147f39SBodong Wang 		if (new_rate_added)
331061147f39SBodong Wang 			mlx5_rl_remove_rate(dev, &new_rl);
33117d29f349SBodong Wang 		goto out;
33127d29f349SBodong Wang 	}
33137d29f349SBodong Wang 
33147d29f349SBodong Wang 	/* Only remove the old rate after new rate was set */
3315c8973df2SRafi Wiener 	if ((old_rl.rate && !mlx5_rl_are_equal(&old_rl, &new_rl)) ||
3316c8973df2SRafi Wiener 	    (new_state != MLX5_SQC_STATE_RDY)) {
331761147f39SBodong Wang 		mlx5_rl_remove_rate(dev, &old_rl);
3318c8973df2SRafi Wiener 		if (new_state != MLX5_SQC_STATE_RDY)
3319c8973df2SRafi Wiener 			memset(&new_rl, 0, sizeof(new_rl));
3320c8973df2SRafi Wiener 	}
33217d29f349SBodong Wang 
332261147f39SBodong Wang 	ibqp->rl = new_rl;
3323ad5f8e96Smajd@mellanox.com 	sq->state = new_state;
3324ad5f8e96Smajd@mellanox.com 
3325ad5f8e96Smajd@mellanox.com out:
3326ad5f8e96Smajd@mellanox.com 	kvfree(in);
3327ad5f8e96Smajd@mellanox.com 	return err;
3328ad5f8e96Smajd@mellanox.com }
3329ad5f8e96Smajd@mellanox.com 
3330ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
333113eab21fSAviv Heller 				const struct mlx5_modify_raw_qp_param *raw_qp_param,
333213eab21fSAviv Heller 				u8 tx_affinity)
3333ad5f8e96Smajd@mellanox.com {
3334ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
3335ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
3336ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
33377d29f349SBodong Wang 	int modify_rq = !!qp->rq.wqe_cnt;
33387d29f349SBodong Wang 	int modify_sq = !!qp->sq.wqe_cnt;
3339ad5f8e96Smajd@mellanox.com 	int rq_state;
3340ad5f8e96Smajd@mellanox.com 	int sq_state;
3341ad5f8e96Smajd@mellanox.com 	int err;
3342ad5f8e96Smajd@mellanox.com 
33430680efa2SAlex Vesker 	switch (raw_qp_param->operation) {
3344ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RST2INIT_QP:
3345ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_RDY;
3346ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_RDY;
3347ad5f8e96Smajd@mellanox.com 		break;
3348ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_2ERR_QP:
3349ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_ERR;
3350ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_ERR;
3351ad5f8e96Smajd@mellanox.com 		break;
3352ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_2RST_QP:
3353ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_RST;
3354ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_RST;
3355ad5f8e96Smajd@mellanox.com 		break;
3356ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RTR2RTS_QP:
3357ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RTS2RTS_QP:
33587d29f349SBodong Wang 		if (raw_qp_param->set_mask ==
33597d29f349SBodong Wang 		    MLX5_RAW_QP_RATE_LIMIT) {
33607d29f349SBodong Wang 			modify_rq = 0;
33617d29f349SBodong Wang 			sq_state = sq->state;
33627d29f349SBodong Wang 		} else {
33637d29f349SBodong Wang 			return raw_qp_param->set_mask ? -EINVAL : 0;
33647d29f349SBodong Wang 		}
33657d29f349SBodong Wang 		break;
33667d29f349SBodong Wang 	case MLX5_CMD_OP_INIT2INIT_QP:
33677d29f349SBodong Wang 	case MLX5_CMD_OP_INIT2RTR_QP:
3368eb49ab0cSAlex Vesker 		if (raw_qp_param->set_mask)
3369eb49ab0cSAlex Vesker 			return -EINVAL;
3370eb49ab0cSAlex Vesker 		else
3371ad5f8e96Smajd@mellanox.com 			return 0;
3372ad5f8e96Smajd@mellanox.com 	default:
3373ad5f8e96Smajd@mellanox.com 		WARN_ON(1);
3374ad5f8e96Smajd@mellanox.com 		return -EINVAL;
3375ad5f8e96Smajd@mellanox.com 	}
3376ad5f8e96Smajd@mellanox.com 
33777d29f349SBodong Wang 	if (modify_rq) {
337834d57585SYishai Hadas 		err =  modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param,
337934d57585SYishai Hadas 					       qp->ibqp.pd);
3380ad5f8e96Smajd@mellanox.com 		if (err)
3381ad5f8e96Smajd@mellanox.com 			return err;
3382ad5f8e96Smajd@mellanox.com 	}
3383ad5f8e96Smajd@mellanox.com 
33847d29f349SBodong Wang 	if (modify_sq) {
3385d5ed8ac3SMark Bloch 		struct mlx5_flow_handle *flow_rule;
3386d5ed8ac3SMark Bloch 
338713eab21fSAviv Heller 		if (tx_affinity) {
338813eab21fSAviv Heller 			err = modify_raw_packet_tx_affinity(dev->mdev, sq,
33891cd6dbd3SYishai Hadas 							    tx_affinity,
33901cd6dbd3SYishai Hadas 							    qp->ibqp.pd);
339113eab21fSAviv Heller 			if (err)
339213eab21fSAviv Heller 				return err;
339313eab21fSAviv Heller 		}
339413eab21fSAviv Heller 
3395d5ed8ac3SMark Bloch 		flow_rule = create_flow_rule_vport_sq(dev, sq,
3396d5ed8ac3SMark Bloch 						      raw_qp_param->port);
3397d5ed8ac3SMark Bloch 		if (IS_ERR(flow_rule))
33981db86318SColin Ian King 			return PTR_ERR(flow_rule);
3399d5ed8ac3SMark Bloch 
3400d5ed8ac3SMark Bloch 		err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state,
3401c14003f0SYishai Hadas 					      raw_qp_param, qp->ibqp.pd);
3402d5ed8ac3SMark Bloch 		if (err) {
3403d5ed8ac3SMark Bloch 			if (flow_rule)
3404d5ed8ac3SMark Bloch 				mlx5_del_flow_rules(flow_rule);
3405d5ed8ac3SMark Bloch 			return err;
3406d5ed8ac3SMark Bloch 		}
3407d5ed8ac3SMark Bloch 
3408d5ed8ac3SMark Bloch 		if (flow_rule) {
3409d5ed8ac3SMark Bloch 			destroy_flow_rule_vport_sq(sq);
3410d5ed8ac3SMark Bloch 			sq->flow_rule = flow_rule;
3411d5ed8ac3SMark Bloch 		}
3412d5ed8ac3SMark Bloch 
3413d5ed8ac3SMark Bloch 		return err;
341413eab21fSAviv Heller 	}
3415ad5f8e96Smajd@mellanox.com 
3416ad5f8e96Smajd@mellanox.com 	return 0;
3417ad5f8e96Smajd@mellanox.com }
3418ad5f8e96Smajd@mellanox.com 
3419c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev,
3420c6a21c38SMajd Dibbiny 				    struct mlx5_ib_pd *pd,
3421c6a21c38SMajd Dibbiny 				    struct mlx5_ib_qp_base *qp_base,
342289944450SShamir Rabinovitch 				    u8 port_num, struct ib_udata *udata)
3423c6a21c38SMajd Dibbiny {
342489944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
342589944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
3426c6a21c38SMajd Dibbiny 	unsigned int tx_port_affinity;
3427c6a21c38SMajd Dibbiny 
3428c6a21c38SMajd Dibbiny 	if (ucontext) {
3429c6a21c38SMajd Dibbiny 		tx_port_affinity = (unsigned int)atomic_add_return(
3430c6a21c38SMajd Dibbiny 					   1, &ucontext->tx_port_affinity) %
3431c6a21c38SMajd Dibbiny 					   MLX5_MAX_PORTS +
3432c6a21c38SMajd Dibbiny 				   1;
3433c6a21c38SMajd Dibbiny 		mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n",
3434c6a21c38SMajd Dibbiny 				tx_port_affinity, qp_base->mqp.qpn, ucontext);
3435c6a21c38SMajd Dibbiny 	} else {
3436c6a21c38SMajd Dibbiny 		tx_port_affinity =
3437c6a21c38SMajd Dibbiny 			(unsigned int)atomic_add_return(
343895579e78SMark Bloch 				1, &dev->port[port_num].roce.tx_port_affinity) %
3439c6a21c38SMajd Dibbiny 				MLX5_MAX_PORTS +
3440c6a21c38SMajd Dibbiny 			1;
3441c6a21c38SMajd Dibbiny 		mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n",
3442c6a21c38SMajd Dibbiny 				tx_port_affinity, qp_base->mqp.qpn);
3443c6a21c38SMajd Dibbiny 	}
3444c6a21c38SMajd Dibbiny 
3445c6a21c38SMajd Dibbiny 	return tx_port_affinity;
3446c6a21c38SMajd Dibbiny }
3447c6a21c38SMajd Dibbiny 
3448d14133ddSMark Zhang static int __mlx5_ib_qp_set_counter(struct ib_qp *qp,
3449d14133ddSMark Zhang 				    struct rdma_counter *counter)
3450d14133ddSMark Zhang {
3451d14133ddSMark Zhang 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
3452d14133ddSMark Zhang 	struct mlx5_ib_qp *mqp = to_mqp(qp);
3453d14133ddSMark Zhang 	struct mlx5_qp_context context = {};
3454d14133ddSMark Zhang 	struct mlx5_ib_qp_base *base;
3455d14133ddSMark Zhang 	u32 set_id;
3456d14133ddSMark Zhang 
34573e1f000fSParav Pandit 	if (counter)
3458d14133ddSMark Zhang 		set_id = counter->id;
34593e1f000fSParav Pandit 	else
34603e1f000fSParav Pandit 		set_id = mlx5_ib_get_counters_id(dev, mqp->port - 1);
3461d14133ddSMark Zhang 
3462d14133ddSMark Zhang 	base = &mqp->trans_qp.base;
3463d14133ddSMark Zhang 	context.qp_counter_set_usr_page &= cpu_to_be32(0xffffff);
3464d14133ddSMark Zhang 	context.qp_counter_set_usr_page |= cpu_to_be32(set_id << 24);
3465d14133ddSMark Zhang 	return mlx5_core_qp_modify(dev->mdev,
3466d14133ddSMark Zhang 				   MLX5_CMD_OP_RTS2RTS_QP,
3467d14133ddSMark Zhang 				   MLX5_QP_OPTPAR_COUNTER_SET_ID,
3468d14133ddSMark Zhang 				   &context, &base->mqp);
3469d14133ddSMark Zhang }
3470d14133ddSMark Zhang 
3471e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp,
3472e126ba97SEli Cohen 			       const struct ib_qp_attr *attr, int attr_mask,
347389944450SShamir Rabinovitch 			       enum ib_qp_state cur_state,
347489944450SShamir Rabinovitch 			       enum ib_qp_state new_state,
347589944450SShamir Rabinovitch 			       const struct mlx5_ib_modify_qp *ucmd,
347689944450SShamir Rabinovitch 			       struct ib_udata *udata)
3477e126ba97SEli Cohen {
3478427c1e7bSmajd@mellanox.com 	static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = {
3479427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RST] = {
3480427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3481427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3482427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_INIT]	= MLX5_CMD_OP_RST2INIT_QP,
3483427c1e7bSmajd@mellanox.com 		},
3484427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_INIT]  = {
3485427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3486427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3487427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_INIT]	= MLX5_CMD_OP_INIT2INIT_QP,
3488427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTR]	= MLX5_CMD_OP_INIT2RTR_QP,
3489427c1e7bSmajd@mellanox.com 		},
3490427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RTR]   = {
3491427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3492427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3493427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_RTR2RTS_QP,
3494427c1e7bSmajd@mellanox.com 		},
3495427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RTS]   = {
3496427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3497427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3498427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_RTS2RTS_QP,
3499427c1e7bSmajd@mellanox.com 		},
3500427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_SQD] = {
3501427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3502427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3503427c1e7bSmajd@mellanox.com 		},
3504427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_SQER] = {
3505427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3506427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3507427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_SQERR2RTS_QP,
3508427c1e7bSmajd@mellanox.com 		},
3509427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_ERR] = {
3510427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3511427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3512427c1e7bSmajd@mellanox.com 		}
3513427c1e7bSmajd@mellanox.com 	};
3514427c1e7bSmajd@mellanox.com 
3515e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3516e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
351719098df2Smajd@mellanox.com 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
3518e126ba97SEli Cohen 	struct mlx5_ib_cq *send_cq, *recv_cq;
3519e126ba97SEli Cohen 	struct mlx5_qp_context *context;
3520e126ba97SEli Cohen 	struct mlx5_ib_pd *pd;
3521e126ba97SEli Cohen 	enum mlx5_qp_state mlx5_cur, mlx5_new;
3522e126ba97SEli Cohen 	enum mlx5_qp_optpar optpar;
3523d14133ddSMark Zhang 	u32 set_id = 0;
3524e126ba97SEli Cohen 	int mlx5_st;
3525e126ba97SEli Cohen 	int err;
3526427c1e7bSmajd@mellanox.com 	u16 op;
352713eab21fSAviv Heller 	u8 tx_affinity = 0;
3528e126ba97SEli Cohen 
352955de9a77SLeon Romanovsky 	mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ?
353055de9a77SLeon Romanovsky 			     qp->qp_sub_type : ibqp->qp_type);
353155de9a77SLeon Romanovsky 	if (mlx5_st < 0)
353255de9a77SLeon Romanovsky 		return -EINVAL;
353355de9a77SLeon Romanovsky 
35341a412fb1SSaeed Mahameed 	context = kzalloc(sizeof(*context), GFP_KERNEL);
35351a412fb1SSaeed Mahameed 	if (!context)
3536e126ba97SEli Cohen 		return -ENOMEM;
3537e126ba97SEli Cohen 
3538c6a21c38SMajd Dibbiny 	pd = get_pd(qp);
353955de9a77SLeon Romanovsky 	context->flags = cpu_to_be32(mlx5_st << 16);
3540e126ba97SEli Cohen 
3541e126ba97SEli Cohen 	if (!(attr_mask & IB_QP_PATH_MIG_STATE)) {
3542e126ba97SEli Cohen 		context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
3543e126ba97SEli Cohen 	} else {
3544e126ba97SEli Cohen 		switch (attr->path_mig_state) {
3545e126ba97SEli Cohen 		case IB_MIG_MIGRATED:
3546e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
3547e126ba97SEli Cohen 			break;
3548e126ba97SEli Cohen 		case IB_MIG_REARM:
3549e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11);
3550e126ba97SEli Cohen 			break;
3551e126ba97SEli Cohen 		case IB_MIG_ARMED:
3552e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11);
3553e126ba97SEli Cohen 			break;
3554e126ba97SEli Cohen 		}
3555e126ba97SEli Cohen 	}
3556e126ba97SEli Cohen 
355713eab21fSAviv Heller 	if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) {
355813eab21fSAviv Heller 		if ((ibqp->qp_type == IB_QPT_RC) ||
355913eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_UD &&
356013eab21fSAviv Heller 		     !(qp->flags & MLX5_IB_QP_SQPN_QP1)) ||
356113eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_UC) ||
356213eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_RAW_PACKET) ||
356313eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_XRC_INI) ||
356413eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_XRC_TGT)) {
35657c34ec19SAviv Heller 			if (dev->lag_active) {
356695579e78SMark Bloch 				u8 p = mlx5_core_native_port_num(dev->mdev) - 1;
356789944450SShamir Rabinovitch 				tx_affinity = get_tx_affinity(dev, pd, base, p,
356889944450SShamir Rabinovitch 							      udata);
356913eab21fSAviv Heller 				context->flags |= cpu_to_be32(tx_affinity << 24);
357013eab21fSAviv Heller 			}
357113eab21fSAviv Heller 		}
357213eab21fSAviv Heller 	}
357313eab21fSAviv Heller 
3574d16e91daSHaggai Eran 	if (is_sqp(ibqp->qp_type)) {
3575e126ba97SEli Cohen 		context->mtu_msgmax = (IB_MTU_256 << 5) | 8;
3576c2e53b2cSYishai Hadas 	} else if ((ibqp->qp_type == IB_QPT_UD &&
3577c2e53b2cSYishai Hadas 		    !(qp->flags & MLX5_IB_QP_UNDERLAY)) ||
3578e126ba97SEli Cohen 		   ibqp->qp_type == MLX5_IB_QPT_REG_UMR) {
3579e126ba97SEli Cohen 		context->mtu_msgmax = (IB_MTU_4096 << 5) | 12;
3580e126ba97SEli Cohen 	} else if (attr_mask & IB_QP_PATH_MTU) {
3581e126ba97SEli Cohen 		if (attr->path_mtu < IB_MTU_256 ||
3582e126ba97SEli Cohen 		    attr->path_mtu > IB_MTU_4096) {
3583e126ba97SEli Cohen 			mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu);
3584e126ba97SEli Cohen 			err = -EINVAL;
3585e126ba97SEli Cohen 			goto out;
3586e126ba97SEli Cohen 		}
3587938fe83cSSaeed Mahameed 		context->mtu_msgmax = (attr->path_mtu << 5) |
3588938fe83cSSaeed Mahameed 				      (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg);
3589e126ba97SEli Cohen 	}
3590e126ba97SEli Cohen 
3591e126ba97SEli Cohen 	if (attr_mask & IB_QP_DEST_QPN)
3592e126ba97SEli Cohen 		context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num);
3593e126ba97SEli Cohen 
3594e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX)
3595d3ae2bdeSNoa Osherovich 		context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index);
3596e126ba97SEli Cohen 
3597e126ba97SEli Cohen 	/* todo implement counter_index functionality */
3598e126ba97SEli Cohen 
3599e126ba97SEli Cohen 	if (is_sqp(ibqp->qp_type))
3600e126ba97SEli Cohen 		context->pri_path.port = qp->port;
3601e126ba97SEli Cohen 
3602e126ba97SEli Cohen 	if (attr_mask & IB_QP_PORT)
3603e126ba97SEli Cohen 		context->pri_path.port = attr->port_num;
3604e126ba97SEli Cohen 
3605e126ba97SEli Cohen 	if (attr_mask & IB_QP_AV) {
360675850d0bSmajd@mellanox.com 		err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path,
3607e126ba97SEli Cohen 				    attr_mask & IB_QP_PORT ? attr->port_num : qp->port,
3608f879ee8dSAchiad Shochat 				    attr_mask, 0, attr, false);
3609e126ba97SEli Cohen 		if (err)
3610e126ba97SEli Cohen 			goto out;
3611e126ba97SEli Cohen 	}
3612e126ba97SEli Cohen 
3613e126ba97SEli Cohen 	if (attr_mask & IB_QP_TIMEOUT)
3614e126ba97SEli Cohen 		context->pri_path.ackto_lt |= attr->timeout << 3;
3615e126ba97SEli Cohen 
3616e126ba97SEli Cohen 	if (attr_mask & IB_QP_ALT_PATH) {
361775850d0bSmajd@mellanox.com 		err = mlx5_set_path(dev, qp, &attr->alt_ah_attr,
361875850d0bSmajd@mellanox.com 				    &context->alt_path,
3619f879ee8dSAchiad Shochat 				    attr->alt_port_num,
3620f879ee8dSAchiad Shochat 				    attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT,
3621f879ee8dSAchiad Shochat 				    0, attr, true);
3622e126ba97SEli Cohen 		if (err)
3623e126ba97SEli Cohen 			goto out;
3624e126ba97SEli Cohen 	}
3625e126ba97SEli Cohen 
362689ea94a7SMaor Gottlieb 	get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq,
362789ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
3628e126ba97SEli Cohen 
3629e126ba97SEli Cohen 	context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn);
3630e126ba97SEli Cohen 	context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0;
3631e126ba97SEli Cohen 	context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0;
3632e126ba97SEli Cohen 	context->params1  = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28);
3633e126ba97SEli Cohen 
3634e126ba97SEli Cohen 	if (attr_mask & IB_QP_RNR_RETRY)
3635e126ba97SEli Cohen 		context->params1 |= cpu_to_be32(attr->rnr_retry << 13);
3636e126ba97SEli Cohen 
3637e126ba97SEli Cohen 	if (attr_mask & IB_QP_RETRY_CNT)
3638e126ba97SEli Cohen 		context->params1 |= cpu_to_be32(attr->retry_cnt << 16);
3639e126ba97SEli Cohen 
3640e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
3641e126ba97SEli Cohen 		if (attr->max_rd_atomic)
3642e126ba97SEli Cohen 			context->params1 |=
3643e126ba97SEli Cohen 				cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21);
3644e126ba97SEli Cohen 	}
3645e126ba97SEli Cohen 
3646e126ba97SEli Cohen 	if (attr_mask & IB_QP_SQ_PSN)
3647e126ba97SEli Cohen 		context->next_send_psn = cpu_to_be32(attr->sq_psn);
3648e126ba97SEli Cohen 
3649e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
3650e126ba97SEli Cohen 		if (attr->max_dest_rd_atomic)
3651e126ba97SEli Cohen 			context->params2 |=
3652e126ba97SEli Cohen 				cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21);
3653e126ba97SEli Cohen 	}
3654e126ba97SEli Cohen 
3655a60109dcSYonatan Cohen 	if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) {
3656bf3b4f06SBart Van Assche 		__be32 access_flags;
3657a60109dcSYonatan Cohen 
3658a60109dcSYonatan Cohen 		err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags);
3659a60109dcSYonatan Cohen 		if (err)
3660a60109dcSYonatan Cohen 			goto out;
3661a60109dcSYonatan Cohen 
3662a60109dcSYonatan Cohen 		context->params2 |= access_flags;
3663a60109dcSYonatan Cohen 	}
3664e126ba97SEli Cohen 
3665e126ba97SEli Cohen 	if (attr_mask & IB_QP_MIN_RNR_TIMER)
3666e126ba97SEli Cohen 		context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24);
3667e126ba97SEli Cohen 
3668e126ba97SEli Cohen 	if (attr_mask & IB_QP_RQ_PSN)
3669e126ba97SEli Cohen 		context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn);
3670e126ba97SEli Cohen 
3671e126ba97SEli Cohen 	if (attr_mask & IB_QP_QKEY)
3672e126ba97SEli Cohen 		context->qkey = cpu_to_be32(attr->qkey);
3673e126ba97SEli Cohen 
3674e126ba97SEli Cohen 	if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
3675e126ba97SEli Cohen 		context->db_rec_addr = cpu_to_be64(qp->db.dma);
3676e126ba97SEli Cohen 
36770837e86aSMark Bloch 	if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
36780837e86aSMark Bloch 		u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num :
36790837e86aSMark Bloch 			       qp->port) - 1;
3680c2e53b2cSYishai Hadas 
3681c2e53b2cSYishai Hadas 		/* Underlay port should be used - index 0 function per port */
3682c2e53b2cSYishai Hadas 		if (qp->flags & MLX5_IB_QP_UNDERLAY)
3683c2e53b2cSYishai Hadas 			port_num = 0;
3684c2e53b2cSYishai Hadas 
3685d14133ddSMark Zhang 		if (ibqp->counter)
3686d14133ddSMark Zhang 			set_id = ibqp->counter->id;
3687d14133ddSMark Zhang 		else
36883e1f000fSParav Pandit 			set_id = mlx5_ib_get_counters_id(dev, port_num);
36890837e86aSMark Bloch 		context->qp_counter_set_usr_page |=
3690d14133ddSMark Zhang 			cpu_to_be32(set_id << 24);
36910837e86aSMark Bloch 	}
36920837e86aSMark Bloch 
3693e126ba97SEli Cohen 	if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
3694e126ba97SEli Cohen 		context->sq_crq_size |= cpu_to_be16(1 << 4);
3695e126ba97SEli Cohen 
3696b11a4f9cSHaggai Eran 	if (qp->flags & MLX5_IB_QP_SQPN_QP1)
3697b11a4f9cSHaggai Eran 		context->deth_sqpn = cpu_to_be32(1);
3698e126ba97SEli Cohen 
3699e126ba97SEli Cohen 	mlx5_cur = to_mlx5_state(cur_state);
3700e126ba97SEli Cohen 	mlx5_new = to_mlx5_state(new_state);
3701e126ba97SEli Cohen 
3702427c1e7bSmajd@mellanox.com 	if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE ||
37035d414b17SDan Carpenter 	    !optab[mlx5_cur][mlx5_new]) {
37045d414b17SDan Carpenter 		err = -EINVAL;
3705427c1e7bSmajd@mellanox.com 		goto out;
37065d414b17SDan Carpenter 	}
3707427c1e7bSmajd@mellanox.com 
3708427c1e7bSmajd@mellanox.com 	op = optab[mlx5_cur][mlx5_new];
3709e126ba97SEli Cohen 	optpar = ib_mask_to_mlx5_opt(attr_mask);
3710e126ba97SEli Cohen 	optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st];
3711ad5f8e96Smajd@mellanox.com 
3712c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
3713c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
37140680efa2SAlex Vesker 		struct mlx5_modify_raw_qp_param raw_qp_param = {};
37150680efa2SAlex Vesker 
37160680efa2SAlex Vesker 		raw_qp_param.operation = op;
3717eb49ab0cSAlex Vesker 		if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3718d14133ddSMark Zhang 			raw_qp_param.rq_q_ctr_id = set_id;
3719eb49ab0cSAlex Vesker 			raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID;
3720eb49ab0cSAlex Vesker 		}
37217d29f349SBodong Wang 
3722d5ed8ac3SMark Bloch 		if (attr_mask & IB_QP_PORT)
3723d5ed8ac3SMark Bloch 			raw_qp_param.port = attr->port_num;
3724d5ed8ac3SMark Bloch 
37257d29f349SBodong Wang 		if (attr_mask & IB_QP_RATE_LIMIT) {
372661147f39SBodong Wang 			raw_qp_param.rl.rate = attr->rate_limit;
372761147f39SBodong Wang 
372861147f39SBodong Wang 			if (ucmd->burst_info.max_burst_sz) {
372961147f39SBodong Wang 				if (attr->rate_limit &&
373061147f39SBodong Wang 				    MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) {
373161147f39SBodong Wang 					raw_qp_param.rl.max_burst_sz =
373261147f39SBodong Wang 						ucmd->burst_info.max_burst_sz;
373361147f39SBodong Wang 				} else {
373461147f39SBodong Wang 					err = -EINVAL;
373561147f39SBodong Wang 					goto out;
373661147f39SBodong Wang 				}
373761147f39SBodong Wang 			}
373861147f39SBodong Wang 
373961147f39SBodong Wang 			if (ucmd->burst_info.typical_pkt_sz) {
374061147f39SBodong Wang 				if (attr->rate_limit &&
374161147f39SBodong Wang 				    MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) {
374261147f39SBodong Wang 					raw_qp_param.rl.typical_pkt_sz =
374361147f39SBodong Wang 						ucmd->burst_info.typical_pkt_sz;
374461147f39SBodong Wang 				} else {
374561147f39SBodong Wang 					err = -EINVAL;
374661147f39SBodong Wang 					goto out;
374761147f39SBodong Wang 				}
374861147f39SBodong Wang 			}
374961147f39SBodong Wang 
37507d29f349SBodong Wang 			raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT;
37517d29f349SBodong Wang 		}
37527d29f349SBodong Wang 
375313eab21fSAviv Heller 		err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity);
37540680efa2SAlex Vesker 	} else {
37551a412fb1SSaeed Mahameed 		err = mlx5_core_qp_modify(dev->mdev, op, optpar, context,
375619098df2Smajd@mellanox.com 					  &base->mqp);
37570680efa2SAlex Vesker 	}
37580680efa2SAlex Vesker 
3759e126ba97SEli Cohen 	if (err)
3760e126ba97SEli Cohen 		goto out;
3761e126ba97SEli Cohen 
3762e126ba97SEli Cohen 	qp->state = new_state;
3763e126ba97SEli Cohen 
3764e126ba97SEli Cohen 	if (attr_mask & IB_QP_ACCESS_FLAGS)
376519098df2Smajd@mellanox.com 		qp->trans_qp.atomic_rd_en = attr->qp_access_flags;
3766e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
376719098df2Smajd@mellanox.com 		qp->trans_qp.resp_depth = attr->max_dest_rd_atomic;
3768e126ba97SEli Cohen 	if (attr_mask & IB_QP_PORT)
3769e126ba97SEli Cohen 		qp->port = attr->port_num;
3770e126ba97SEli Cohen 	if (attr_mask & IB_QP_ALT_PATH)
377119098df2Smajd@mellanox.com 		qp->trans_qp.alt_port = attr->alt_port_num;
3772e126ba97SEli Cohen 
3773e126ba97SEli Cohen 	/*
3774e126ba97SEli Cohen 	 * If we moved a kernel QP to RESET, clean up all old CQ
3775e126ba97SEli Cohen 	 * entries and reinitialize the QP.
3776e126ba97SEli Cohen 	 */
377775a45982SLeon Romanovsky 	if (new_state == IB_QPS_RESET &&
377875a45982SLeon Romanovsky 	    !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) {
377919098df2Smajd@mellanox.com 		mlx5_ib_cq_clean(recv_cq, base->mqp.qpn,
3780e126ba97SEli Cohen 				 ibqp->srq ? to_msrq(ibqp->srq) : NULL);
3781e126ba97SEli Cohen 		if (send_cq != recv_cq)
378219098df2Smajd@mellanox.com 			mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL);
3783e126ba97SEli Cohen 
3784e126ba97SEli Cohen 		qp->rq.head = 0;
3785e126ba97SEli Cohen 		qp->rq.tail = 0;
3786e126ba97SEli Cohen 		qp->sq.head = 0;
3787e126ba97SEli Cohen 		qp->sq.tail = 0;
3788e126ba97SEli Cohen 		qp->sq.cur_post = 0;
378934f4c955SGuy Levi 		if (qp->sq.wqe_cnt)
379034f4c955SGuy Levi 			qp->sq.cur_edge = get_sq_edge(&qp->sq, 0);
3791e126ba97SEli Cohen 		qp->db.db[MLX5_RCV_DBR] = 0;
3792e126ba97SEli Cohen 		qp->db.db[MLX5_SND_DBR] = 0;
3793e126ba97SEli Cohen 	}
3794e126ba97SEli Cohen 
3795d14133ddSMark Zhang 	if ((new_state == IB_QPS_RTS) && qp->counter_pending) {
3796d14133ddSMark Zhang 		err = __mlx5_ib_qp_set_counter(ibqp, ibqp->counter);
3797d14133ddSMark Zhang 		if (!err)
3798d14133ddSMark Zhang 			qp->counter_pending = 0;
3799d14133ddSMark Zhang 	}
3800d14133ddSMark Zhang 
3801e126ba97SEli Cohen out:
38021a412fb1SSaeed Mahameed 	kfree(context);
3803e126ba97SEli Cohen 	return err;
3804e126ba97SEli Cohen }
3805e126ba97SEli Cohen 
3806c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt)
3807c32a4f29SMoni Shoua {
3808c32a4f29SMoni Shoua 	if ((mask & req) != req)
3809c32a4f29SMoni Shoua 		return false;
3810c32a4f29SMoni Shoua 
3811c32a4f29SMoni Shoua 	if (mask & ~(req | opt))
3812c32a4f29SMoni Shoua 		return false;
3813c32a4f29SMoni Shoua 
3814c32a4f29SMoni Shoua 	return true;
3815c32a4f29SMoni Shoua }
3816c32a4f29SMoni Shoua 
3817c32a4f29SMoni Shoua /* check valid transition for driver QP types
3818c32a4f29SMoni Shoua  * for now the only QP type that this function supports is DCI
3819c32a4f29SMoni Shoua  */
3820c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state,
3821c32a4f29SMoni Shoua 				enum ib_qp_attr_mask attr_mask)
3822c32a4f29SMoni Shoua {
3823c32a4f29SMoni Shoua 	int req = IB_QP_STATE;
3824c32a4f29SMoni Shoua 	int opt = 0;
3825c32a4f29SMoni Shoua 
382699ed748eSMoni Shoua 	if (new_state == IB_QPS_RESET) {
382799ed748eSMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
382899ed748eSMoni Shoua 	} else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3829c32a4f29SMoni Shoua 		req |= IB_QP_PKEY_INDEX | IB_QP_PORT;
3830c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3831c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) {
3832c32a4f29SMoni Shoua 		opt = IB_QP_PKEY_INDEX | IB_QP_PORT;
3833c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3834c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
3835c32a4f29SMoni Shoua 		req |= IB_QP_PATH_MTU;
38365ec0304cSArtemy Kovalyov 		opt = IB_QP_PKEY_INDEX | IB_QP_AV;
3837c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3838c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) {
3839c32a4f29SMoni Shoua 		req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY |
3840c32a4f29SMoni Shoua 		       IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN;
3841c32a4f29SMoni Shoua 		opt = IB_QP_MIN_RNR_TIMER;
3842c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3843c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) {
3844c32a4f29SMoni Shoua 		opt = IB_QP_MIN_RNR_TIMER;
3845c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3846c32a4f29SMoni Shoua 	} else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) {
3847c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3848c32a4f29SMoni Shoua 	}
3849c32a4f29SMoni Shoua 	return false;
3850c32a4f29SMoni Shoua }
3851c32a4f29SMoni Shoua 
3852776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP
3853776a3906SMoni Shoua  * valid transitions are:
3854776a3906SMoni Shoua  * RESET to INIT: must set access_flags, pkey_index and port
3855776a3906SMoni Shoua  * INIT  to RTR : must set min_rnr_timer, tclass, flow_label,
3856776a3906SMoni Shoua  *			   mtu, gid_index and hop_limit
3857776a3906SMoni Shoua  * Other transitions and attributes are illegal
3858776a3906SMoni Shoua  */
3859776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3860776a3906SMoni Shoua 			      int attr_mask, struct ib_udata *udata)
3861776a3906SMoni Shoua {
3862776a3906SMoni Shoua 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
3863776a3906SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3864776a3906SMoni Shoua 	enum ib_qp_state cur_state, new_state;
3865776a3906SMoni Shoua 	int err = 0;
3866776a3906SMoni Shoua 	int required = IB_QP_STATE;
3867776a3906SMoni Shoua 	void *dctc;
3868776a3906SMoni Shoua 
3869776a3906SMoni Shoua 	if (!(attr_mask & IB_QP_STATE))
3870776a3906SMoni Shoua 		return -EINVAL;
3871776a3906SMoni Shoua 
3872776a3906SMoni Shoua 	cur_state = qp->state;
3873776a3906SMoni Shoua 	new_state = attr->qp_state;
3874776a3906SMoni Shoua 
3875776a3906SMoni Shoua 	dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
3876776a3906SMoni Shoua 	if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
38773e1f000fSParav Pandit 		u16 set_id;
38783e1f000fSParav Pandit 
3879776a3906SMoni Shoua 		required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT;
3880776a3906SMoni Shoua 		if (!is_valid_mask(attr_mask, required, 0))
3881776a3906SMoni Shoua 			return -EINVAL;
3882776a3906SMoni Shoua 
3883776a3906SMoni Shoua 		if (attr->port_num == 0 ||
3884776a3906SMoni Shoua 		    attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) {
3885776a3906SMoni Shoua 			mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
3886776a3906SMoni Shoua 				    attr->port_num, dev->num_ports);
3887776a3906SMoni Shoua 			return -EINVAL;
3888776a3906SMoni Shoua 		}
3889776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
3890776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rre, 1);
3891776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
3892776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rwe, 1);
3893776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) {
3894a60109dcSYonatan Cohen 			int atomic_mode;
3895a60109dcSYonatan Cohen 
3896a60109dcSYonatan Cohen 			atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT);
3897a60109dcSYonatan Cohen 			if (atomic_mode < 0)
3898776a3906SMoni Shoua 				return -EOPNOTSUPP;
3899a60109dcSYonatan Cohen 
3900a60109dcSYonatan Cohen 			MLX5_SET(dctc, dctc, atomic_mode, atomic_mode);
3901776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rae, 1);
3902776a3906SMoni Shoua 		}
3903776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index);
3904776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, port, attr->port_num);
39053e1f000fSParav Pandit 
39063e1f000fSParav Pandit 		set_id = mlx5_ib_get_counters_id(dev, attr->port_num - 1);
39073e1f000fSParav Pandit 		MLX5_SET(dctc, dctc, counter_set_id, set_id);
3908776a3906SMoni Shoua 
3909776a3906SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
3910776a3906SMoni Shoua 		struct mlx5_ib_modify_qp_resp resp = {};
3911c5ae1954SYishai Hadas 		u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0};
3912776a3906SMoni Shoua 		u32 min_resp_len = offsetof(typeof(resp), dctn) +
3913776a3906SMoni Shoua 				   sizeof(resp.dctn);
3914776a3906SMoni Shoua 
3915776a3906SMoni Shoua 		if (udata->outlen < min_resp_len)
3916776a3906SMoni Shoua 			return -EINVAL;
3917776a3906SMoni Shoua 		resp.response_length = min_resp_len;
3918776a3906SMoni Shoua 
3919776a3906SMoni Shoua 		required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU;
3920776a3906SMoni Shoua 		if (!is_valid_mask(attr_mask, required, 0))
3921776a3906SMoni Shoua 			return -EINVAL;
3922776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer);
3923776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class);
3924776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label);
3925776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, mtu, attr->path_mtu);
3926776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);
3927776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
3928776a3906SMoni Shoua 
3929776a3906SMoni Shoua 		err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in,
3930c5ae1954SYishai Hadas 					   MLX5_ST_SZ_BYTES(create_dct_in), out,
3931c5ae1954SYishai Hadas 					   sizeof(out));
3932776a3906SMoni Shoua 		if (err)
3933776a3906SMoni Shoua 			return err;
3934776a3906SMoni Shoua 		resp.dctn = qp->dct.mdct.mqp.qpn;
3935776a3906SMoni Shoua 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
3936776a3906SMoni Shoua 		if (err) {
3937776a3906SMoni Shoua 			mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct);
3938776a3906SMoni Shoua 			return err;
3939776a3906SMoni Shoua 		}
3940776a3906SMoni Shoua 	} else {
3941776a3906SMoni Shoua 		mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state);
3942776a3906SMoni Shoua 		return -EINVAL;
3943776a3906SMoni Shoua 	}
3944776a3906SMoni Shoua 	if (err)
3945776a3906SMoni Shoua 		qp->state = IB_QPS_ERR;
3946776a3906SMoni Shoua 	else
3947776a3906SMoni Shoua 		qp->state = new_state;
3948776a3906SMoni Shoua 	return err;
3949776a3906SMoni Shoua }
3950776a3906SMoni Shoua 
3951e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3952e126ba97SEli Cohen 		      int attr_mask, struct ib_udata *udata)
3953e126ba97SEli Cohen {
3954e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3955e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
395661147f39SBodong Wang 	struct mlx5_ib_modify_qp ucmd = {};
3957d16e91daSHaggai Eran 	enum ib_qp_type qp_type;
3958e126ba97SEli Cohen 	enum ib_qp_state cur_state, new_state;
395961147f39SBodong Wang 	size_t required_cmd_sz;
3960e126ba97SEli Cohen 	int err = -EINVAL;
3961e126ba97SEli Cohen 	int port;
3962e126ba97SEli Cohen 
396328d61370SYishai Hadas 	if (ibqp->rwq_ind_tbl)
396428d61370SYishai Hadas 		return -ENOSYS;
396528d61370SYishai Hadas 
396661147f39SBodong Wang 	if (udata && udata->inlen) {
396761147f39SBodong Wang 		required_cmd_sz = offsetof(typeof(ucmd), reserved) +
396861147f39SBodong Wang 			sizeof(ucmd.reserved);
396961147f39SBodong Wang 		if (udata->inlen < required_cmd_sz)
397061147f39SBodong Wang 			return -EINVAL;
397161147f39SBodong Wang 
397261147f39SBodong Wang 		if (udata->inlen > sizeof(ucmd) &&
397361147f39SBodong Wang 		    !ib_is_udata_cleared(udata, sizeof(ucmd),
397461147f39SBodong Wang 					 udata->inlen - sizeof(ucmd)))
397561147f39SBodong Wang 			return -EOPNOTSUPP;
397661147f39SBodong Wang 
397761147f39SBodong Wang 		if (ib_copy_from_udata(&ucmd, udata,
397861147f39SBodong Wang 				       min(udata->inlen, sizeof(ucmd))))
397961147f39SBodong Wang 			return -EFAULT;
398061147f39SBodong Wang 
398161147f39SBodong Wang 		if (ucmd.comp_mask ||
398261147f39SBodong Wang 		    memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) ||
398361147f39SBodong Wang 		    memchr_inv(&ucmd.burst_info.reserved, 0,
398461147f39SBodong Wang 			       sizeof(ucmd.burst_info.reserved)))
398561147f39SBodong Wang 			return -EOPNOTSUPP;
398661147f39SBodong Wang 	}
398761147f39SBodong Wang 
3988d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
3989d16e91daSHaggai Eran 		return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask);
3990d16e91daSHaggai Eran 
3991c32a4f29SMoni Shoua 	if (ibqp->qp_type == IB_QPT_DRIVER)
3992c32a4f29SMoni Shoua 		qp_type = qp->qp_sub_type;
3993c32a4f29SMoni Shoua 	else
3994d16e91daSHaggai Eran 		qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ?
3995d16e91daSHaggai Eran 			IB_QPT_GSI : ibqp->qp_type;
3996d16e91daSHaggai Eran 
3997776a3906SMoni Shoua 	if (qp_type == MLX5_IB_QPT_DCT)
3998776a3906SMoni Shoua 		return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata);
3999c32a4f29SMoni Shoua 
4000e126ba97SEli Cohen 	mutex_lock(&qp->mutex);
4001e126ba97SEli Cohen 
4002e126ba97SEli Cohen 	cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state;
4003e126ba97SEli Cohen 	new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
4004e126ba97SEli Cohen 
40052811ba51SAchiad Shochat 	if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) {
40062811ba51SAchiad Shochat 		port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
40072811ba51SAchiad Shochat 	}
40082811ba51SAchiad Shochat 
4009c2e53b2cSYishai Hadas 	if (qp->flags & MLX5_IB_QP_UNDERLAY) {
4010c2e53b2cSYishai Hadas 		if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) {
4011c2e53b2cSYishai Hadas 			mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n",
4012c2e53b2cSYishai Hadas 				    attr_mask);
4013c2e53b2cSYishai Hadas 			goto out;
4014c2e53b2cSYishai Hadas 		}
4015c2e53b2cSYishai Hadas 	} else if (qp_type != MLX5_IB_QPT_REG_UMR &&
4016c32a4f29SMoni Shoua 		   qp_type != MLX5_IB_QPT_DCI &&
4017d31131bbSKamal Heib 		   !ib_modify_qp_is_ok(cur_state, new_state, qp_type,
4018d31131bbSKamal Heib 				       attr_mask)) {
4019158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n",
4020158abf86SHaggai Eran 			    cur_state, new_state, ibqp->qp_type, attr_mask);
4021e126ba97SEli Cohen 		goto out;
4022c32a4f29SMoni Shoua 	} else if (qp_type == MLX5_IB_QPT_DCI &&
4023c32a4f29SMoni Shoua 		   !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) {
4024c32a4f29SMoni Shoua 		mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n",
4025c32a4f29SMoni Shoua 			    cur_state, new_state, qp_type, attr_mask);
4026c32a4f29SMoni Shoua 		goto out;
4027158abf86SHaggai Eran 	}
4028e126ba97SEli Cohen 
4029e126ba97SEli Cohen 	if ((attr_mask & IB_QP_PORT) &&
4030938fe83cSSaeed Mahameed 	    (attr->port_num == 0 ||
4031508562d6SDaniel Jurgens 	     attr->port_num > dev->num_ports)) {
4032158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
4033158abf86SHaggai Eran 			    attr->port_num, dev->num_ports);
4034e126ba97SEli Cohen 		goto out;
4035158abf86SHaggai Eran 	}
4036e126ba97SEli Cohen 
4037e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX) {
4038e126ba97SEli Cohen 		port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
4039938fe83cSSaeed Mahameed 		if (attr->pkey_index >=
4040158abf86SHaggai Eran 		    dev->mdev->port_caps[port - 1].pkey_table_len) {
4041158abf86SHaggai Eran 			mlx5_ib_dbg(dev, "invalid pkey index %d\n",
4042158abf86SHaggai Eran 				    attr->pkey_index);
4043e126ba97SEli Cohen 			goto out;
4044e126ba97SEli Cohen 		}
4045158abf86SHaggai Eran 	}
4046e126ba97SEli Cohen 
4047e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
4048938fe83cSSaeed Mahameed 	    attr->max_rd_atomic >
4049158abf86SHaggai Eran 	    (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) {
4050158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n",
4051158abf86SHaggai Eran 			    attr->max_rd_atomic);
4052e126ba97SEli Cohen 		goto out;
4053158abf86SHaggai Eran 	}
4054e126ba97SEli Cohen 
4055e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
4056938fe83cSSaeed Mahameed 	    attr->max_dest_rd_atomic >
4057158abf86SHaggai Eran 	    (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) {
4058158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n",
4059158abf86SHaggai Eran 			    attr->max_dest_rd_atomic);
4060e126ba97SEli Cohen 		goto out;
4061158abf86SHaggai Eran 	}
4062e126ba97SEli Cohen 
4063e126ba97SEli Cohen 	if (cur_state == new_state && cur_state == IB_QPS_RESET) {
4064e126ba97SEli Cohen 		err = 0;
4065e126ba97SEli Cohen 		goto out;
4066e126ba97SEli Cohen 	}
4067e126ba97SEli Cohen 
406861147f39SBodong Wang 	err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state,
406989944450SShamir Rabinovitch 				  new_state, &ucmd, udata);
4070e126ba97SEli Cohen 
4071e126ba97SEli Cohen out:
4072e126ba97SEli Cohen 	mutex_unlock(&qp->mutex);
4073e126ba97SEli Cohen 	return err;
4074e126ba97SEli Cohen }
4075e126ba97SEli Cohen 
407634f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg,
407734f4c955SGuy Levi 				   u32 wqe_sz, void **cur_edge)
407834f4c955SGuy Levi {
407934f4c955SGuy Levi 	u32 idx;
408034f4c955SGuy Levi 
408134f4c955SGuy Levi 	idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1);
408234f4c955SGuy Levi 	*cur_edge = get_sq_edge(sq, idx);
408334f4c955SGuy Levi 
408434f4c955SGuy Levi 	*seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx);
408534f4c955SGuy Levi }
408634f4c955SGuy Levi 
408734f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the
408834f4c955SGuy Levi  * next nearby edge and get new address translation for current WQE position.
408934f4c955SGuy Levi  * @sq - SQ buffer.
409034f4c955SGuy Levi  * @seg: Current WQE position (16B aligned).
409134f4c955SGuy Levi  * @wqe_sz: Total current WQE size [16B].
409234f4c955SGuy Levi  * @cur_edge: Updated current edge.
409334f4c955SGuy Levi  */
409434f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg,
409534f4c955SGuy Levi 					 u32 wqe_sz, void **cur_edge)
409634f4c955SGuy Levi {
409734f4c955SGuy Levi 	if (likely(*seg != *cur_edge))
409834f4c955SGuy Levi 		return;
409934f4c955SGuy Levi 
410034f4c955SGuy Levi 	_handle_post_send_edge(sq, seg, wqe_sz, cur_edge);
410134f4c955SGuy Levi }
410234f4c955SGuy Levi 
410334f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's
410434f4c955SGuy Levi  * pointers. At the end @seg is aligned to 16B regardless the copied size.
410534f4c955SGuy Levi  * @sq - SQ buffer.
410634f4c955SGuy Levi  * @cur_edge: Updated current edge.
410734f4c955SGuy Levi  * @seg: Current WQE position (16B aligned).
410834f4c955SGuy Levi  * @wqe_sz: Total current WQE size [16B].
410934f4c955SGuy Levi  * @src: Pointer to copy from.
411034f4c955SGuy Levi  * @n: Number of bytes to copy.
411134f4c955SGuy Levi  */
411234f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge,
411334f4c955SGuy Levi 				   void **seg, u32 *wqe_sz, const void *src,
411434f4c955SGuy Levi 				   size_t n)
411534f4c955SGuy Levi {
411634f4c955SGuy Levi 	while (likely(n)) {
411734f4c955SGuy Levi 		size_t leftlen = *cur_edge - *seg;
411834f4c955SGuy Levi 		size_t copysz = min_t(size_t, leftlen, n);
411934f4c955SGuy Levi 		size_t stride;
412034f4c955SGuy Levi 
412134f4c955SGuy Levi 		memcpy(*seg, src, copysz);
412234f4c955SGuy Levi 
412334f4c955SGuy Levi 		n -= copysz;
412434f4c955SGuy Levi 		src += copysz;
412534f4c955SGuy Levi 		stride = !n ? ALIGN(copysz, 16) : copysz;
412634f4c955SGuy Levi 		*seg += stride;
412734f4c955SGuy Levi 		*wqe_sz += stride >> 4;
412834f4c955SGuy Levi 		handle_post_send_edge(sq, seg, *wqe_sz, cur_edge);
412934f4c955SGuy Levi 	}
413034f4c955SGuy Levi }
413134f4c955SGuy Levi 
4132e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq)
4133e126ba97SEli Cohen {
4134e126ba97SEli Cohen 	struct mlx5_ib_cq *cq;
4135e126ba97SEli Cohen 	unsigned cur;
4136e126ba97SEli Cohen 
4137e126ba97SEli Cohen 	cur = wq->head - wq->tail;
4138e126ba97SEli Cohen 	if (likely(cur + nreq < wq->max_post))
4139e126ba97SEli Cohen 		return 0;
4140e126ba97SEli Cohen 
4141e126ba97SEli Cohen 	cq = to_mcq(ib_cq);
4142e126ba97SEli Cohen 	spin_lock(&cq->lock);
4143e126ba97SEli Cohen 	cur = wq->head - wq->tail;
4144e126ba97SEli Cohen 	spin_unlock(&cq->lock);
4145e126ba97SEli Cohen 
4146e126ba97SEli Cohen 	return cur + nreq >= wq->max_post;
4147e126ba97SEli Cohen }
4148e126ba97SEli Cohen 
4149e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg,
4150e126ba97SEli Cohen 					  u64 remote_addr, u32 rkey)
4151e126ba97SEli Cohen {
4152e126ba97SEli Cohen 	rseg->raddr    = cpu_to_be64(remote_addr);
4153e126ba97SEli Cohen 	rseg->rkey     = cpu_to_be32(rkey);
4154e126ba97SEli Cohen 	rseg->reserved = 0;
4155e126ba97SEli Cohen }
4156e126ba97SEli Cohen 
415734f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp,
415834f4c955SGuy Levi 			void **seg, int *size, void **cur_edge)
4159f0313965SErez Shitrit {
416034f4c955SGuy Levi 	struct mlx5_wqe_eth_seg *eseg = *seg;
4161f0313965SErez Shitrit 
4162f0313965SErez Shitrit 	memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg));
4163f0313965SErez Shitrit 
4164f0313965SErez Shitrit 	if (wr->send_flags & IB_SEND_IP_CSUM)
4165f0313965SErez Shitrit 		eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM |
4166f0313965SErez Shitrit 				 MLX5_ETH_WQE_L4_CSUM;
4167f0313965SErez Shitrit 
4168f0313965SErez Shitrit 	if (wr->opcode == IB_WR_LSO) {
4169f0313965SErez Shitrit 		struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr);
417034f4c955SGuy Levi 		size_t left, copysz;
4171f0313965SErez Shitrit 		void *pdata = ud_wr->header;
417234f4c955SGuy Levi 		size_t stride;
4173f0313965SErez Shitrit 
4174f0313965SErez Shitrit 		left = ud_wr->hlen;
4175f0313965SErez Shitrit 		eseg->mss = cpu_to_be16(ud_wr->mss);
41762b31f7aeSSaeed Mahameed 		eseg->inline_hdr.sz = cpu_to_be16(left);
4177f0313965SErez Shitrit 
417834f4c955SGuy Levi 		/* memcpy_send_wqe should get a 16B align address. Hence, we
417934f4c955SGuy Levi 		 * first copy up to the current edge and then, if needed,
418034f4c955SGuy Levi 		 * fall-through to memcpy_send_wqe.
4181f0313965SErez Shitrit 		 */
418234f4c955SGuy Levi 		copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start,
418334f4c955SGuy Levi 			       left);
418434f4c955SGuy Levi 		memcpy(eseg->inline_hdr.start, pdata, copysz);
418534f4c955SGuy Levi 		stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) -
418634f4c955SGuy Levi 			       sizeof(eseg->inline_hdr.start) + copysz, 16);
418734f4c955SGuy Levi 		*size += stride / 16;
418834f4c955SGuy Levi 		*seg += stride;
4189f0313965SErez Shitrit 
419034f4c955SGuy Levi 		if (copysz < left) {
419134f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4192f0313965SErez Shitrit 			left -= copysz;
4193f0313965SErez Shitrit 			pdata += copysz;
419434f4c955SGuy Levi 			memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata,
419534f4c955SGuy Levi 					left);
4196f0313965SErez Shitrit 		}
4197f0313965SErez Shitrit 
419834f4c955SGuy Levi 		return;
419934f4c955SGuy Levi 	}
420034f4c955SGuy Levi 
420134f4c955SGuy Levi 	*seg += sizeof(struct mlx5_wqe_eth_seg);
420234f4c955SGuy Levi 	*size += sizeof(struct mlx5_wqe_eth_seg) / 16;
4203f0313965SErez Shitrit }
4204f0313965SErez Shitrit 
4205e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg,
4206f696bf6dSBart Van Assche 			     const struct ib_send_wr *wr)
4207e126ba97SEli Cohen {
4208e622f2f4SChristoph Hellwig 	memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av));
4209e622f2f4SChristoph Hellwig 	dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV);
4210e622f2f4SChristoph Hellwig 	dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey);
4211e126ba97SEli Cohen }
4212e126ba97SEli Cohen 
4213e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg)
4214e126ba97SEli Cohen {
4215e126ba97SEli Cohen 	dseg->byte_count = cpu_to_be32(sg->length);
4216e126ba97SEli Cohen 	dseg->lkey       = cpu_to_be32(sg->lkey);
4217e126ba97SEli Cohen 	dseg->addr       = cpu_to_be64(sg->addr);
4218e126ba97SEli Cohen }
4219e126ba97SEli Cohen 
422031616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes)
4221e126ba97SEli Cohen {
422231616255SArtemy Kovalyov 	return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) /
422331616255SArtemy Kovalyov 	       MLX5_IB_UMR_OCTOWORD;
4224e126ba97SEli Cohen }
4225e126ba97SEli Cohen 
4226841b07f9SMoni Shoua static __be64 frwr_mkey_mask(bool atomic)
4227e126ba97SEli Cohen {
4228e126ba97SEli Cohen 	u64 result;
4229e126ba97SEli Cohen 
4230e126ba97SEli Cohen 	result = MLX5_MKEY_MASK_LEN		|
4231e126ba97SEli Cohen 		MLX5_MKEY_MASK_PAGE_SIZE	|
4232e126ba97SEli Cohen 		MLX5_MKEY_MASK_START_ADDR	|
4233e126ba97SEli Cohen 		MLX5_MKEY_MASK_EN_RINVAL	|
4234e126ba97SEli Cohen 		MLX5_MKEY_MASK_KEY		|
4235e126ba97SEli Cohen 		MLX5_MKEY_MASK_LR		|
4236e126ba97SEli Cohen 		MLX5_MKEY_MASK_LW		|
4237e126ba97SEli Cohen 		MLX5_MKEY_MASK_RR		|
4238e126ba97SEli Cohen 		MLX5_MKEY_MASK_RW		|
4239e126ba97SEli Cohen 		MLX5_MKEY_MASK_SMALL_FENCE	|
4240e126ba97SEli Cohen 		MLX5_MKEY_MASK_FREE;
4241e126ba97SEli Cohen 
4242841b07f9SMoni Shoua 	if (atomic)
4243841b07f9SMoni Shoua 		result |= MLX5_MKEY_MASK_A;
4244841b07f9SMoni Shoua 
4245e126ba97SEli Cohen 	return cpu_to_be64(result);
4246e126ba97SEli Cohen }
4247e126ba97SEli Cohen 
4248e6631814SSagi Grimberg static __be64 sig_mkey_mask(void)
4249e6631814SSagi Grimberg {
4250e6631814SSagi Grimberg 	u64 result;
4251e6631814SSagi Grimberg 
4252e6631814SSagi Grimberg 	result = MLX5_MKEY_MASK_LEN		|
4253e6631814SSagi Grimberg 		MLX5_MKEY_MASK_PAGE_SIZE	|
4254e6631814SSagi Grimberg 		MLX5_MKEY_MASK_START_ADDR	|
4255d5436ba0SSagi Grimberg 		MLX5_MKEY_MASK_EN_SIGERR	|
4256e6631814SSagi Grimberg 		MLX5_MKEY_MASK_EN_RINVAL	|
4257e6631814SSagi Grimberg 		MLX5_MKEY_MASK_KEY		|
4258e6631814SSagi Grimberg 		MLX5_MKEY_MASK_LR		|
4259e6631814SSagi Grimberg 		MLX5_MKEY_MASK_LW		|
4260e6631814SSagi Grimberg 		MLX5_MKEY_MASK_RR		|
4261e6631814SSagi Grimberg 		MLX5_MKEY_MASK_RW		|
4262e6631814SSagi Grimberg 		MLX5_MKEY_MASK_SMALL_FENCE	|
4263e6631814SSagi Grimberg 		MLX5_MKEY_MASK_FREE		|
4264e6631814SSagi Grimberg 		MLX5_MKEY_MASK_BSF_EN;
4265e6631814SSagi Grimberg 
4266e6631814SSagi Grimberg 	return cpu_to_be64(result);
4267e6631814SSagi Grimberg }
4268e6631814SSagi Grimberg 
42698a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr,
4270841b07f9SMoni Shoua 			    struct mlx5_ib_mr *mr, u8 flags, bool atomic)
42718a187ee5SSagi Grimberg {
427238ca87c6SMax Gurtovoy 	int size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size;
42738a187ee5SSagi Grimberg 
42748a187ee5SSagi Grimberg 	memset(umr, 0, sizeof(*umr));
4275b005d316SSagi Grimberg 
42769ac7c4bcSMax Gurtovoy 	umr->flags = flags;
427731616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size));
4278841b07f9SMoni Shoua 	umr->mkey_mask = frwr_mkey_mask(atomic);
42798a187ee5SSagi Grimberg }
42808a187ee5SSagi Grimberg 
4281dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr)
4282e126ba97SEli Cohen {
4283e126ba97SEli Cohen 	memset(umr, 0, sizeof(*umr));
4284e126ba97SEli Cohen 	umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE);
42852d221588SMax Gurtovoy 	umr->flags = MLX5_UMR_INLINE;
4286e126ba97SEli Cohen }
4287e126ba97SEli Cohen 
428831616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void)
4289e126ba97SEli Cohen {
4290968e78ddSHaggai Eran 	u64 result;
4291e126ba97SEli Cohen 
429231616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_KEY |
4293e126ba97SEli Cohen 		 MLX5_MKEY_MASK_FREE;
4294968e78ddSHaggai Eran 
4295968e78ddSHaggai Eran 	return cpu_to_be64(result);
4296968e78ddSHaggai Eran }
4297968e78ddSHaggai Eran 
429831616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void)
4299968e78ddSHaggai Eran {
4300968e78ddSHaggai Eran 	u64 result;
4301968e78ddSHaggai Eran 
4302968e78ddSHaggai Eran 	result = MLX5_MKEY_MASK_FREE;
4303968e78ddSHaggai Eran 
4304968e78ddSHaggai Eran 	return cpu_to_be64(result);
4305968e78ddSHaggai Eran }
4306968e78ddSHaggai Eran 
430756e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void)
430856e11d62SNoa Osherovich {
430956e11d62SNoa Osherovich 	u64 result;
431056e11d62SNoa Osherovich 
431156e11d62SNoa Osherovich 	result = MLX5_MKEY_MASK_LEN |
431256e11d62SNoa Osherovich 		 MLX5_MKEY_MASK_PAGE_SIZE |
431331616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_START_ADDR;
431456e11d62SNoa Osherovich 
431556e11d62SNoa Osherovich 	return cpu_to_be64(result);
431656e11d62SNoa Osherovich }
431756e11d62SNoa Osherovich 
431831616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic)
431956e11d62SNoa Osherovich {
432056e11d62SNoa Osherovich 	u64 result;
432156e11d62SNoa Osherovich 
432231616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_LR |
432331616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_LW |
432456e11d62SNoa Osherovich 		 MLX5_MKEY_MASK_RR |
432531616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_RW;
432631616255SArtemy Kovalyov 
432731616255SArtemy Kovalyov 	if (atomic)
432831616255SArtemy Kovalyov 		result |= MLX5_MKEY_MASK_A;
432956e11d62SNoa Osherovich 
433056e11d62SNoa Osherovich 	return cpu_to_be64(result);
433156e11d62SNoa Osherovich }
433256e11d62SNoa Osherovich 
433356e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void)
433456e11d62SNoa Osherovich {
433556e11d62SNoa Osherovich 	u64 result;
433656e11d62SNoa Osherovich 
433731616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_PD;
433856e11d62SNoa Osherovich 
433956e11d62SNoa Osherovich 	return cpu_to_be64(result);
434056e11d62SNoa Osherovich }
434156e11d62SNoa Osherovich 
4342c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask)
4343c8d75a98SMajd Dibbiny {
4344c8d75a98SMajd Dibbiny 	if ((mask & MLX5_MKEY_MASK_PAGE_SIZE &&
4345c8d75a98SMajd Dibbiny 	     MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) ||
4346c8d75a98SMajd Dibbiny 	    (mask & MLX5_MKEY_MASK_A &&
4347c8d75a98SMajd Dibbiny 	     MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled)))
4348c8d75a98SMajd Dibbiny 		return -EPERM;
4349c8d75a98SMajd Dibbiny 	return 0;
4350c8d75a98SMajd Dibbiny }
4351c8d75a98SMajd Dibbiny 
4352c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev,
4353c8d75a98SMajd Dibbiny 			       struct mlx5_wqe_umr_ctrl_seg *umr,
4354f696bf6dSBart Van Assche 			       const struct ib_send_wr *wr, int atomic)
4355968e78ddSHaggai Eran {
4356f696bf6dSBart Van Assche 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
4357968e78ddSHaggai Eran 
4358968e78ddSHaggai Eran 	memset(umr, 0, sizeof(*umr));
4359968e78ddSHaggai Eran 
43606a053953SYishai Hadas 	if (!umrwr->ignore_free_state) {
4361968e78ddSHaggai Eran 		if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE)
43626a053953SYishai Hadas 			 /* fail if free */
43636a053953SYishai Hadas 			umr->flags = MLX5_UMR_CHECK_FREE;
4364968e78ddSHaggai Eran 		else
43656a053953SYishai Hadas 			/* fail if not free */
43666a053953SYishai Hadas 			umr->flags = MLX5_UMR_CHECK_NOT_FREE;
43676a053953SYishai Hadas 	}
4368968e78ddSHaggai Eran 
436931616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size));
437031616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) {
437131616255SArtemy Kovalyov 		u64 offset = get_xlt_octo(umrwr->offset);
437231616255SArtemy Kovalyov 
437331616255SArtemy Kovalyov 		umr->xlt_offset = cpu_to_be16(offset & 0xffff);
437431616255SArtemy Kovalyov 		umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16);
4375968e78ddSHaggai Eran 		umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN;
4376968e78ddSHaggai Eran 	}
437756e11d62SNoa Osherovich 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION)
437856e11d62SNoa Osherovich 		umr->mkey_mask |= get_umr_update_translation_mask();
437931616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) {
438031616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_update_access_mask(atomic);
438156e11d62SNoa Osherovich 		umr->mkey_mask |= get_umr_update_pd_mask();
4382e126ba97SEli Cohen 	}
438331616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR)
438431616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_enable_mr_mask();
438531616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR)
438631616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_disable_mr_mask();
4387e126ba97SEli Cohen 
4388e126ba97SEli Cohen 	if (!wr->num_sge)
4389968e78ddSHaggai Eran 		umr->flags |= MLX5_UMR_INLINE;
4390c8d75a98SMajd Dibbiny 
4391c8d75a98SMajd Dibbiny 	return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask));
4392e126ba97SEli Cohen }
4393e126ba97SEli Cohen 
4394e126ba97SEli Cohen static u8 get_umr_flags(int acc)
4395e126ba97SEli Cohen {
4396e126ba97SEli Cohen 	return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC       : 0) |
4397e126ba97SEli Cohen 	       (acc & IB_ACCESS_REMOTE_WRITE  ? MLX5_PERM_REMOTE_WRITE : 0) |
4398e126ba97SEli Cohen 	       (acc & IB_ACCESS_REMOTE_READ   ? MLX5_PERM_REMOTE_READ  : 0) |
4399e126ba97SEli Cohen 	       (acc & IB_ACCESS_LOCAL_WRITE   ? MLX5_PERM_LOCAL_WRITE  : 0) |
44002ac45934SSagi Grimberg 		MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN;
4401e126ba97SEli Cohen }
4402e126ba97SEli Cohen 
44038a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg,
44048a187ee5SSagi Grimberg 			     struct mlx5_ib_mr *mr,
44058a187ee5SSagi Grimberg 			     u32 key, int access)
44068a187ee5SSagi Grimberg {
440738ca87c6SMax Gurtovoy 	int ndescs = ALIGN(mr->ndescs + mr->meta_ndescs, 8) >> 1;
44088a187ee5SSagi Grimberg 
44098a187ee5SSagi Grimberg 	memset(seg, 0, sizeof(*seg));
4410b005d316SSagi Grimberg 
4411ec22eb53SSaeed Mahameed 	if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT)
4412b005d316SSagi Grimberg 		seg->log2_page_size = ilog2(mr->ibmr.page_size);
4413ec22eb53SSaeed Mahameed 	else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS)
4414b005d316SSagi Grimberg 		/* KLMs take twice the size of MTTs */
4415b005d316SSagi Grimberg 		ndescs *= 2;
4416b005d316SSagi Grimberg 
4417b005d316SSagi Grimberg 	seg->flags = get_umr_flags(access) | mr->access_mode;
44188a187ee5SSagi Grimberg 	seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00);
44198a187ee5SSagi Grimberg 	seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL);
44208a187ee5SSagi Grimberg 	seg->start_addr = cpu_to_be64(mr->ibmr.iova);
44218a187ee5SSagi Grimberg 	seg->len = cpu_to_be64(mr->ibmr.length);
44228a187ee5SSagi Grimberg 	seg->xlt_oct_size = cpu_to_be32(ndescs);
44238a187ee5SSagi Grimberg }
44248a187ee5SSagi Grimberg 
4425dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg)
4426e126ba97SEli Cohen {
4427e126ba97SEli Cohen 	memset(seg, 0, sizeof(*seg));
4428968e78ddSHaggai Eran 	seg->status = MLX5_MKEY_STATUS_FREE;
4429e126ba97SEli Cohen }
4430e126ba97SEli Cohen 
4431f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg,
4432f696bf6dSBart Van Assche 				 const struct ib_send_wr *wr)
4433e126ba97SEli Cohen {
4434f696bf6dSBart Van Assche 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
4435968e78ddSHaggai Eran 
4436e126ba97SEli Cohen 	memset(seg, 0, sizeof(*seg));
443731616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR)
4438968e78ddSHaggai Eran 		seg->status = MLX5_MKEY_STATUS_FREE;
4439e126ba97SEli Cohen 
4440968e78ddSHaggai Eran 	seg->flags = convert_access(umrwr->access_flags);
444156e11d62SNoa Osherovich 	if (umrwr->pd)
4442968e78ddSHaggai Eran 		seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn);
444331616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION &&
444431616255SArtemy Kovalyov 	    !umrwr->length)
444531616255SArtemy Kovalyov 		seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64);
444631616255SArtemy Kovalyov 
444731616255SArtemy Kovalyov 	seg->start_addr = cpu_to_be64(umrwr->virt_addr);
4448968e78ddSHaggai Eran 	seg->len = cpu_to_be64(umrwr->length);
4449968e78ddSHaggai Eran 	seg->log2_page_size = umrwr->page_shift;
4450746b5583SEli Cohen 	seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 |
4451968e78ddSHaggai Eran 				       mlx5_mkey_variant(umrwr->mkey));
4452e126ba97SEli Cohen }
4453e126ba97SEli Cohen 
44548a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg,
44558a187ee5SSagi Grimberg 			     struct mlx5_ib_mr *mr,
44568a187ee5SSagi Grimberg 			     struct mlx5_ib_pd *pd)
44578a187ee5SSagi Grimberg {
445838ca87c6SMax Gurtovoy 	int bcount = mr->desc_size * (mr->ndescs + mr->meta_ndescs);
44598a187ee5SSagi Grimberg 
44608a187ee5SSagi Grimberg 	dseg->addr = cpu_to_be64(mr->desc_map);
44618a187ee5SSagi Grimberg 	dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64));
44628a187ee5SSagi Grimberg 	dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey);
44638a187ee5SSagi Grimberg }
44648a187ee5SSagi Grimberg 
4465f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr)
4466e126ba97SEli Cohen {
4467e126ba97SEli Cohen 	switch (wr->opcode) {
4468e126ba97SEli Cohen 	case IB_WR_SEND_WITH_IMM:
4469e126ba97SEli Cohen 	case IB_WR_RDMA_WRITE_WITH_IMM:
4470e126ba97SEli Cohen 		return wr->ex.imm_data;
4471e126ba97SEli Cohen 
4472e126ba97SEli Cohen 	case IB_WR_SEND_WITH_INV:
4473e126ba97SEli Cohen 		return cpu_to_be32(wr->ex.invalidate_rkey);
4474e126ba97SEli Cohen 
4475e126ba97SEli Cohen 	default:
4476e126ba97SEli Cohen 		return 0;
4477e126ba97SEli Cohen 	}
4478e126ba97SEli Cohen }
4479e126ba97SEli Cohen 
4480e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size)
4481e126ba97SEli Cohen {
4482e126ba97SEli Cohen 	u8 *p = wqe;
4483e126ba97SEli Cohen 	u8 res = 0;
4484e126ba97SEli Cohen 	int i;
4485e126ba97SEli Cohen 
4486e126ba97SEli Cohen 	for (i = 0; i < size; i++)
4487e126ba97SEli Cohen 		res ^= p[i];
4488e126ba97SEli Cohen 
4489e126ba97SEli Cohen 	return ~res;
4490e126ba97SEli Cohen }
4491e126ba97SEli Cohen 
4492e126ba97SEli Cohen static u8 wq_sig(void *wqe)
4493e126ba97SEli Cohen {
4494e126ba97SEli Cohen 	return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4);
4495e126ba97SEli Cohen }
4496e126ba97SEli Cohen 
4497f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr,
449834f4c955SGuy Levi 			    void **wqe, int *wqe_sz, void **cur_edge)
4499e126ba97SEli Cohen {
4500e126ba97SEli Cohen 	struct mlx5_wqe_inline_seg *seg;
450134f4c955SGuy Levi 	size_t offset;
4502e126ba97SEli Cohen 	int inl = 0;
4503e126ba97SEli Cohen 	int i;
4504e126ba97SEli Cohen 
450534f4c955SGuy Levi 	seg = *wqe;
450634f4c955SGuy Levi 	*wqe += sizeof(*seg);
450734f4c955SGuy Levi 	offset = sizeof(*seg);
450834f4c955SGuy Levi 
4509e126ba97SEli Cohen 	for (i = 0; i < wr->num_sge; i++) {
451034f4c955SGuy Levi 		size_t len  = wr->sg_list[i].length;
451134f4c955SGuy Levi 		void *addr = (void *)(unsigned long)(wr->sg_list[i].addr);
451234f4c955SGuy Levi 
4513e126ba97SEli Cohen 		inl += len;
4514e126ba97SEli Cohen 
4515e126ba97SEli Cohen 		if (unlikely(inl > qp->max_inline_data))
4516e126ba97SEli Cohen 			return -ENOMEM;
4517e126ba97SEli Cohen 
451834f4c955SGuy Levi 		while (likely(len)) {
451934f4c955SGuy Levi 			size_t leftlen;
452034f4c955SGuy Levi 			size_t copysz;
452134f4c955SGuy Levi 
452234f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, wqe,
452334f4c955SGuy Levi 					      *wqe_sz + (offset >> 4),
452434f4c955SGuy Levi 					      cur_edge);
452534f4c955SGuy Levi 
452634f4c955SGuy Levi 			leftlen = *cur_edge - *wqe;
452734f4c955SGuy Levi 			copysz = min_t(size_t, leftlen, len);
452834f4c955SGuy Levi 
452934f4c955SGuy Levi 			memcpy(*wqe, addr, copysz);
453034f4c955SGuy Levi 			len -= copysz;
453134f4c955SGuy Levi 			addr += copysz;
453234f4c955SGuy Levi 			*wqe += copysz;
453334f4c955SGuy Levi 			offset += copysz;
4534e126ba97SEli Cohen 		}
4535e126ba97SEli Cohen 	}
4536e126ba97SEli Cohen 
4537e126ba97SEli Cohen 	seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG);
4538e126ba97SEli Cohen 
453934f4c955SGuy Levi 	*wqe_sz +=  ALIGN(inl + sizeof(seg->byte_count), 16) / 16;
4540e126ba97SEli Cohen 
4541e126ba97SEli Cohen 	return 0;
4542e126ba97SEli Cohen }
4543e126ba97SEli Cohen 
4544e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type)
4545e6631814SSagi Grimberg {
4546e6631814SSagi Grimberg 	switch (type) {
4547e6631814SSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4548e6631814SSagi Grimberg 		return MLX5_DIF_SIZE;
4549e6631814SSagi Grimberg 	default:
4550e6631814SSagi Grimberg 		return 0;
4551e6631814SSagi Grimberg 	}
4552e6631814SSagi Grimberg }
4553e6631814SSagi Grimberg 
4554e6631814SSagi Grimberg static u8 bs_selector(int block_size)
4555e6631814SSagi Grimberg {
4556e6631814SSagi Grimberg 	switch (block_size) {
4557e6631814SSagi Grimberg 	case 512:	    return 0x1;
4558e6631814SSagi Grimberg 	case 520:	    return 0x2;
4559e6631814SSagi Grimberg 	case 4096:	    return 0x3;
4560e6631814SSagi Grimberg 	case 4160:	    return 0x4;
4561e6631814SSagi Grimberg 	case 1073741824:    return 0x5;
4562e6631814SSagi Grimberg 	default:	    return 0;
4563e6631814SSagi Grimberg 	}
4564e6631814SSagi Grimberg }
4565e6631814SSagi Grimberg 
456678eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain,
4567142537f4SSagi Grimberg 			      struct mlx5_bsf_inl *inl)
4568e6631814SSagi Grimberg {
4569142537f4SSagi Grimberg 	/* Valid inline section and allow BSF refresh */
4570142537f4SSagi Grimberg 	inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID |
4571142537f4SSagi Grimberg 				       MLX5_BSF_REFRESH_DIF);
4572142537f4SSagi Grimberg 	inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag);
4573142537f4SSagi Grimberg 	inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag);
4574142537f4SSagi Grimberg 	/* repeating block */
4575142537f4SSagi Grimberg 	inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK;
4576142537f4SSagi Grimberg 	inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ?
4577142537f4SSagi Grimberg 			MLX5_DIF_CRC : MLX5_DIF_IPCS;
4578e6631814SSagi Grimberg 
457978eda2bbSSagi Grimberg 	if (domain->sig.dif.ref_remap)
458078eda2bbSSagi Grimberg 		inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG;
4581e6631814SSagi Grimberg 
458278eda2bbSSagi Grimberg 	if (domain->sig.dif.app_escape) {
458378eda2bbSSagi Grimberg 		if (domain->sig.dif.ref_escape)
458478eda2bbSSagi Grimberg 			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE;
458578eda2bbSSagi Grimberg 		else
458678eda2bbSSagi Grimberg 			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE;
4587e6631814SSagi Grimberg 	}
4588e6631814SSagi Grimberg 
458978eda2bbSSagi Grimberg 	inl->dif_app_bitmask_check =
459078eda2bbSSagi Grimberg 		cpu_to_be16(domain->sig.dif.apptag_check_mask);
4591e6631814SSagi Grimberg }
4592e6631814SSagi Grimberg 
4593e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr,
4594e6631814SSagi Grimberg 			struct ib_sig_attrs *sig_attrs,
4595e6631814SSagi Grimberg 			struct mlx5_bsf *bsf, u32 data_size)
4596e6631814SSagi Grimberg {
4597e6631814SSagi Grimberg 	struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig;
4598e6631814SSagi Grimberg 	struct mlx5_bsf_basic *basic = &bsf->basic;
4599e6631814SSagi Grimberg 	struct ib_sig_domain *mem = &sig_attrs->mem;
4600e6631814SSagi Grimberg 	struct ib_sig_domain *wire = &sig_attrs->wire;
4601e6631814SSagi Grimberg 
4602c7f44fbdSSagi Grimberg 	memset(bsf, 0, sizeof(*bsf));
4603e6631814SSagi Grimberg 
4604142537f4SSagi Grimberg 	/* Basic + Extended + Inline */
4605142537f4SSagi Grimberg 	basic->bsf_size_sbs = 1 << 7;
4606e6631814SSagi Grimberg 	/* Input domain check byte mask */
4607e6631814SSagi Grimberg 	basic->check_byte_mask = sig_attrs->check_mask;
460878eda2bbSSagi Grimberg 	basic->raw_data_size = cpu_to_be32(data_size);
460978eda2bbSSagi Grimberg 
461078eda2bbSSagi Grimberg 	/* Memory domain */
461178eda2bbSSagi Grimberg 	switch (sig_attrs->mem.sig_type) {
461278eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
461378eda2bbSSagi Grimberg 		break;
461478eda2bbSSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
461578eda2bbSSagi Grimberg 		basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval);
461678eda2bbSSagi Grimberg 		basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx);
461778eda2bbSSagi Grimberg 		mlx5_fill_inl_bsf(mem, &bsf->m_inl);
461878eda2bbSSagi Grimberg 		break;
461978eda2bbSSagi Grimberg 	default:
462078eda2bbSSagi Grimberg 		return -EINVAL;
462178eda2bbSSagi Grimberg 	}
462278eda2bbSSagi Grimberg 
462378eda2bbSSagi Grimberg 	/* Wire domain */
462478eda2bbSSagi Grimberg 	switch (sig_attrs->wire.sig_type) {
462578eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
462678eda2bbSSagi Grimberg 		break;
462778eda2bbSSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4628e6631814SSagi Grimberg 		if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval &&
462978eda2bbSSagi Grimberg 		    mem->sig_type == wire->sig_type) {
4630e6631814SSagi Grimberg 			/* Same block structure */
4631142537f4SSagi Grimberg 			basic->bsf_size_sbs |= 1 << 4;
4632e6631814SSagi Grimberg 			if (mem->sig.dif.bg_type == wire->sig.dif.bg_type)
4633fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK;
4634c7f44fbdSSagi Grimberg 			if (mem->sig.dif.app_tag == wire->sig.dif.app_tag)
4635fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK;
4636c7f44fbdSSagi Grimberg 			if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag)
4637fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK;
4638e6631814SSagi Grimberg 		} else
4639e6631814SSagi Grimberg 			basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval);
4640e6631814SSagi Grimberg 
4641142537f4SSagi Grimberg 		basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx);
464278eda2bbSSagi Grimberg 		mlx5_fill_inl_bsf(wire, &bsf->w_inl);
4643e6631814SSagi Grimberg 		break;
4644e6631814SSagi Grimberg 	default:
4645e6631814SSagi Grimberg 		return -EINVAL;
4646e6631814SSagi Grimberg 	}
4647e6631814SSagi Grimberg 
4648e6631814SSagi Grimberg 	return 0;
4649e6631814SSagi Grimberg }
4650e6631814SSagi Grimberg 
465138ca87c6SMax Gurtovoy static int set_sig_data_segment(const struct ib_send_wr *send_wr,
465238ca87c6SMax Gurtovoy 				struct ib_mr *sig_mr,
465338ca87c6SMax Gurtovoy 				struct ib_sig_attrs *sig_attrs,
465438ca87c6SMax Gurtovoy 				struct mlx5_ib_qp *qp, void **seg, int *size,
465538ca87c6SMax Gurtovoy 				void **cur_edge)
4656e6631814SSagi Grimberg {
4657e6631814SSagi Grimberg 	struct mlx5_bsf *bsf;
465838ca87c6SMax Gurtovoy 	u32 data_len;
465938ca87c6SMax Gurtovoy 	u32 data_key;
466038ca87c6SMax Gurtovoy 	u64 data_va;
466138ca87c6SMax Gurtovoy 	u32 prot_len = 0;
466238ca87c6SMax Gurtovoy 	u32 prot_key = 0;
466338ca87c6SMax Gurtovoy 	u64 prot_va = 0;
466438ca87c6SMax Gurtovoy 	bool prot = false;
4665e6631814SSagi Grimberg 	int ret;
4666e6631814SSagi Grimberg 	int wqe_size;
466738ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *mr = to_mmr(sig_mr);
466838ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *pi_mr = mr->pi_mr;
466938ca87c6SMax Gurtovoy 
467038ca87c6SMax Gurtovoy 	data_len = pi_mr->data_length;
467138ca87c6SMax Gurtovoy 	data_key = pi_mr->ibmr.lkey;
46722563e2f3SMax Gurtovoy 	data_va = pi_mr->data_iova;
467338ca87c6SMax Gurtovoy 	if (pi_mr->meta_ndescs) {
467438ca87c6SMax Gurtovoy 		prot_len = pi_mr->meta_length;
467538ca87c6SMax Gurtovoy 		prot_key = pi_mr->ibmr.lkey;
4676de0ae958SIsrael Rukshin 		prot_va = pi_mr->pi_iova;
467738ca87c6SMax Gurtovoy 		prot = true;
467838ca87c6SMax Gurtovoy 	}
467938ca87c6SMax Gurtovoy 
468038ca87c6SMax Gurtovoy 	if (!prot || (data_key == prot_key && data_va == prot_va &&
468138ca87c6SMax Gurtovoy 		      data_len == prot_len)) {
4682e6631814SSagi Grimberg 		/**
4683e6631814SSagi Grimberg 		 * Source domain doesn't contain signature information
46845c273b16SSagi Grimberg 		 * or data and protection are interleaved in memory.
4685e6631814SSagi Grimberg 		 * So need construct:
4686e6631814SSagi Grimberg 		 *                  ------------------
4687e6631814SSagi Grimberg 		 *                 |     data_klm     |
4688e6631814SSagi Grimberg 		 *                  ------------------
4689e6631814SSagi Grimberg 		 *                 |       BSF        |
4690e6631814SSagi Grimberg 		 *                  ------------------
4691e6631814SSagi Grimberg 		 **/
4692e6631814SSagi Grimberg 		struct mlx5_klm *data_klm = *seg;
4693e6631814SSagi Grimberg 
4694e6631814SSagi Grimberg 		data_klm->bcount = cpu_to_be32(data_len);
4695e6631814SSagi Grimberg 		data_klm->key = cpu_to_be32(data_key);
4696e6631814SSagi Grimberg 		data_klm->va = cpu_to_be64(data_va);
4697e6631814SSagi Grimberg 		wqe_size = ALIGN(sizeof(*data_klm), 64);
4698e6631814SSagi Grimberg 	} else {
4699e6631814SSagi Grimberg 		/**
4700e6631814SSagi Grimberg 		 * Source domain contains signature information
4701e6631814SSagi Grimberg 		 * So need construct a strided block format:
4702e6631814SSagi Grimberg 		 *               ---------------------------
4703e6631814SSagi Grimberg 		 *              |     stride_block_ctrl     |
4704e6631814SSagi Grimberg 		 *               ---------------------------
4705e6631814SSagi Grimberg 		 *              |          data_klm         |
4706e6631814SSagi Grimberg 		 *               ---------------------------
4707e6631814SSagi Grimberg 		 *              |          prot_klm         |
4708e6631814SSagi Grimberg 		 *               ---------------------------
4709e6631814SSagi Grimberg 		 *              |             BSF           |
4710e6631814SSagi Grimberg 		 *               ---------------------------
4711e6631814SSagi Grimberg 		 **/
4712e6631814SSagi Grimberg 		struct mlx5_stride_block_ctrl_seg *sblock_ctrl;
4713e6631814SSagi Grimberg 		struct mlx5_stride_block_entry *data_sentry;
4714e6631814SSagi Grimberg 		struct mlx5_stride_block_entry *prot_sentry;
4715e6631814SSagi Grimberg 		u16 block_size = sig_attrs->mem.sig.dif.pi_interval;
4716e6631814SSagi Grimberg 		int prot_size;
4717e6631814SSagi Grimberg 
4718e6631814SSagi Grimberg 		sblock_ctrl = *seg;
4719e6631814SSagi Grimberg 		data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl);
4720e6631814SSagi Grimberg 		prot_sentry = (void *)data_sentry + sizeof(*data_sentry);
4721e6631814SSagi Grimberg 
4722e6631814SSagi Grimberg 		prot_size = prot_field_size(sig_attrs->mem.sig_type);
4723e6631814SSagi Grimberg 		if (!prot_size) {
4724e6631814SSagi Grimberg 			pr_err("Bad block size given: %u\n", block_size);
4725e6631814SSagi Grimberg 			return -EINVAL;
4726e6631814SSagi Grimberg 		}
4727e6631814SSagi Grimberg 		sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size +
4728e6631814SSagi Grimberg 							    prot_size);
4729e6631814SSagi Grimberg 		sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP);
4730e6631814SSagi Grimberg 		sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size);
4731e6631814SSagi Grimberg 		sblock_ctrl->num_entries = cpu_to_be16(2);
4732e6631814SSagi Grimberg 
4733e6631814SSagi Grimberg 		data_sentry->bcount = cpu_to_be16(block_size);
4734e6631814SSagi Grimberg 		data_sentry->key = cpu_to_be32(data_key);
4735e6631814SSagi Grimberg 		data_sentry->va = cpu_to_be64(data_va);
47365c273b16SSagi Grimberg 		data_sentry->stride = cpu_to_be16(block_size);
47375c273b16SSagi Grimberg 
4738e6631814SSagi Grimberg 		prot_sentry->bcount = cpu_to_be16(prot_size);
4739e6631814SSagi Grimberg 		prot_sentry->key = cpu_to_be32(prot_key);
4740e6631814SSagi Grimberg 		prot_sentry->va = cpu_to_be64(prot_va);
4741e6631814SSagi Grimberg 		prot_sentry->stride = cpu_to_be16(prot_size);
47425c273b16SSagi Grimberg 
4743e6631814SSagi Grimberg 		wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) +
4744e6631814SSagi Grimberg 				 sizeof(*prot_sentry), 64);
4745e6631814SSagi Grimberg 	}
4746e6631814SSagi Grimberg 
4747e6631814SSagi Grimberg 	*seg += wqe_size;
4748e6631814SSagi Grimberg 	*size += wqe_size / 16;
474934f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4750e6631814SSagi Grimberg 
4751e6631814SSagi Grimberg 	bsf = *seg;
4752e6631814SSagi Grimberg 	ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len);
4753e6631814SSagi Grimberg 	if (ret)
4754e6631814SSagi Grimberg 		return -EINVAL;
4755e6631814SSagi Grimberg 
4756e6631814SSagi Grimberg 	*seg += sizeof(*bsf);
4757e6631814SSagi Grimberg 	*size += sizeof(*bsf) / 16;
475834f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4759e6631814SSagi Grimberg 
4760e6631814SSagi Grimberg 	return 0;
4761e6631814SSagi Grimberg }
4762e6631814SSagi Grimberg 
4763e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg,
476422465bbaSMax Gurtovoy 				 struct ib_mr *sig_mr, int access_flags,
476522465bbaSMax Gurtovoy 				 u32 size, u32 length, u32 pdn)
4766e6631814SSagi Grimberg {
4767e6631814SSagi Grimberg 	u32 sig_key = sig_mr->rkey;
4768d5436ba0SSagi Grimberg 	u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1;
4769e6631814SSagi Grimberg 
4770e6631814SSagi Grimberg 	memset(seg, 0, sizeof(*seg));
4771e6631814SSagi Grimberg 
477222465bbaSMax Gurtovoy 	seg->flags = get_umr_flags(access_flags) | MLX5_MKC_ACCESS_MODE_KLMS;
4773e6631814SSagi Grimberg 	seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00);
4774d5436ba0SSagi Grimberg 	seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 |
4775e6631814SSagi Grimberg 				    MLX5_MKEY_BSF_EN | pdn);
4776e6631814SSagi Grimberg 	seg->len = cpu_to_be64(length);
477731616255SArtemy Kovalyov 	seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size));
4778e6631814SSagi Grimberg 	seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE);
4779e6631814SSagi Grimberg }
4780e6631814SSagi Grimberg 
4781e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr,
478231616255SArtemy Kovalyov 				u32 size)
4783e6631814SSagi Grimberg {
4784e6631814SSagi Grimberg 	memset(umr, 0, sizeof(*umr));
4785e6631814SSagi Grimberg 
4786e6631814SSagi Grimberg 	umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE;
478731616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size));
4788e6631814SSagi Grimberg 	umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE);
4789e6631814SSagi Grimberg 	umr->mkey_mask = sig_mkey_mask();
4790e6631814SSagi Grimberg }
4791e6631814SSagi Grimberg 
479238ca87c6SMax Gurtovoy static int set_pi_umr_wr(const struct ib_send_wr *send_wr,
479338ca87c6SMax Gurtovoy 			 struct mlx5_ib_qp *qp, void **seg, int *size,
479438ca87c6SMax Gurtovoy 			 void **cur_edge)
479538ca87c6SMax Gurtovoy {
479638ca87c6SMax Gurtovoy 	const struct ib_reg_wr *wr = reg_wr(send_wr);
479738ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *sig_mr = to_mmr(wr->mr);
479838ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *pi_mr = sig_mr->pi_mr;
479938ca87c6SMax Gurtovoy 	struct ib_sig_attrs *sig_attrs = sig_mr->ibmr.sig_attrs;
480038ca87c6SMax Gurtovoy 	u32 pdn = get_pd(qp)->pdn;
480138ca87c6SMax Gurtovoy 	u32 xlt_size;
480238ca87c6SMax Gurtovoy 	int region_len, ret;
480338ca87c6SMax Gurtovoy 
480438ca87c6SMax Gurtovoy 	if (unlikely(send_wr->num_sge != 0) ||
480538ca87c6SMax Gurtovoy 	    unlikely(wr->access & IB_ACCESS_REMOTE_ATOMIC) ||
4806185eddc4SMax Gurtovoy 	    unlikely(!sig_mr->sig) || unlikely(!qp->ibqp.integrity_en) ||
480738ca87c6SMax Gurtovoy 	    unlikely(!sig_mr->sig->sig_status_checked))
480838ca87c6SMax Gurtovoy 		return -EINVAL;
480938ca87c6SMax Gurtovoy 
481038ca87c6SMax Gurtovoy 	/* length of the protected region, data + protection */
481138ca87c6SMax Gurtovoy 	region_len = pi_mr->ibmr.length;
481238ca87c6SMax Gurtovoy 
481338ca87c6SMax Gurtovoy 	/**
481438ca87c6SMax Gurtovoy 	 * KLM octoword size - if protection was provided
481538ca87c6SMax Gurtovoy 	 * then we use strided block format (3 octowords),
481638ca87c6SMax Gurtovoy 	 * else we use single KLM (1 octoword)
481738ca87c6SMax Gurtovoy 	 **/
481838ca87c6SMax Gurtovoy 	if (sig_attrs->mem.sig_type != IB_SIG_TYPE_NONE)
481938ca87c6SMax Gurtovoy 		xlt_size = 0x30;
482038ca87c6SMax Gurtovoy 	else
482138ca87c6SMax Gurtovoy 		xlt_size = sizeof(struct mlx5_klm);
482238ca87c6SMax Gurtovoy 
482338ca87c6SMax Gurtovoy 	set_sig_umr_segment(*seg, xlt_size);
482438ca87c6SMax Gurtovoy 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
482538ca87c6SMax Gurtovoy 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
482638ca87c6SMax Gurtovoy 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
482738ca87c6SMax Gurtovoy 
482838ca87c6SMax Gurtovoy 	set_sig_mkey_segment(*seg, wr->mr, wr->access, xlt_size, region_len,
482938ca87c6SMax Gurtovoy 			     pdn);
483038ca87c6SMax Gurtovoy 	*seg += sizeof(struct mlx5_mkey_seg);
483138ca87c6SMax Gurtovoy 	*size += sizeof(struct mlx5_mkey_seg) / 16;
483238ca87c6SMax Gurtovoy 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
483338ca87c6SMax Gurtovoy 
483438ca87c6SMax Gurtovoy 	ret = set_sig_data_segment(send_wr, wr->mr, sig_attrs, qp, seg, size,
483538ca87c6SMax Gurtovoy 				   cur_edge);
483638ca87c6SMax Gurtovoy 	if (ret)
483738ca87c6SMax Gurtovoy 		return ret;
483838ca87c6SMax Gurtovoy 
483938ca87c6SMax Gurtovoy 	sig_mr->sig->sig_status_checked = false;
484038ca87c6SMax Gurtovoy 	return 0;
484138ca87c6SMax Gurtovoy }
4842e6631814SSagi Grimberg 
4843e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain,
4844e6631814SSagi Grimberg 		      u32 psv_idx, void **seg, int *size)
4845e6631814SSagi Grimberg {
4846e6631814SSagi Grimberg 	struct mlx5_seg_set_psv *psv_seg = *seg;
4847e6631814SSagi Grimberg 
4848e6631814SSagi Grimberg 	memset(psv_seg, 0, sizeof(*psv_seg));
4849e6631814SSagi Grimberg 	psv_seg->psv_num = cpu_to_be32(psv_idx);
4850e6631814SSagi Grimberg 	switch (domain->sig_type) {
485178eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
485278eda2bbSSagi Grimberg 		break;
4853e6631814SSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4854e6631814SSagi Grimberg 		psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 |
4855e6631814SSagi Grimberg 						     domain->sig.dif.app_tag);
4856e6631814SSagi Grimberg 		psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag);
4857e6631814SSagi Grimberg 		break;
4858e6631814SSagi Grimberg 	default:
485912bbf1eaSLeon Romanovsky 		pr_err("Bad signature type (%d) is given.\n",
486012bbf1eaSLeon Romanovsky 		       domain->sig_type);
486112bbf1eaSLeon Romanovsky 		return -EINVAL;
4862e6631814SSagi Grimberg 	}
4863e6631814SSagi Grimberg 
486478eda2bbSSagi Grimberg 	*seg += sizeof(*psv_seg);
486578eda2bbSSagi Grimberg 	*size += sizeof(*psv_seg) / 16;
486678eda2bbSSagi Grimberg 
4867e6631814SSagi Grimberg 	return 0;
4868e6631814SSagi Grimberg }
4869e6631814SSagi Grimberg 
48708a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp,
4871f696bf6dSBart Van Assche 		      const struct ib_reg_wr *wr,
48729ac7c4bcSMax Gurtovoy 		      void **seg, int *size, void **cur_edge,
48739ac7c4bcSMax Gurtovoy 		      bool check_not_free)
48748a187ee5SSagi Grimberg {
48758a187ee5SSagi Grimberg 	struct mlx5_ib_mr *mr = to_mmr(wr->mr);
48768a187ee5SSagi Grimberg 	struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd);
4877841b07f9SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(pd->ibpd.device);
487838ca87c6SMax Gurtovoy 	int mr_list_size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size;
4879064e5262SIdan Burstein 	bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD;
4880841b07f9SMoni Shoua 	bool atomic = wr->access & IB_ACCESS_REMOTE_ATOMIC;
48819ac7c4bcSMax Gurtovoy 	u8 flags = 0;
48828a187ee5SSagi Grimberg 
4883d6de0bb1SMichael Guralnik 	if (!mlx5_ib_can_use_umr(dev, atomic, wr->access)) {
4884841b07f9SMoni Shoua 		mlx5_ib_warn(to_mdev(qp->ibqp.device),
4885841b07f9SMoni Shoua 			     "Fast update of %s for MR is disabled\n",
4886841b07f9SMoni Shoua 			     (MLX5_CAP_GEN(dev->mdev,
4887841b07f9SMoni Shoua 					   umr_modify_entity_size_disabled)) ?
4888841b07f9SMoni Shoua 				     "entity size" :
4889841b07f9SMoni Shoua 				     "atomic access");
4890841b07f9SMoni Shoua 		return -EINVAL;
4891841b07f9SMoni Shoua 	}
4892841b07f9SMoni Shoua 
48938a187ee5SSagi Grimberg 	if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) {
48948a187ee5SSagi Grimberg 		mlx5_ib_warn(to_mdev(qp->ibqp.device),
48958a187ee5SSagi Grimberg 			     "Invalid IB_SEND_INLINE send flag\n");
48968a187ee5SSagi Grimberg 		return -EINVAL;
48978a187ee5SSagi Grimberg 	}
48988a187ee5SSagi Grimberg 
48999ac7c4bcSMax Gurtovoy 	if (check_not_free)
49009ac7c4bcSMax Gurtovoy 		flags |= MLX5_UMR_CHECK_NOT_FREE;
49019ac7c4bcSMax Gurtovoy 	if (umr_inline)
49029ac7c4bcSMax Gurtovoy 		flags |= MLX5_UMR_INLINE;
49039ac7c4bcSMax Gurtovoy 
4904841b07f9SMoni Shoua 	set_reg_umr_seg(*seg, mr, flags, atomic);
49058a187ee5SSagi Grimberg 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
49068a187ee5SSagi Grimberg 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
490734f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
49088a187ee5SSagi Grimberg 
49098a187ee5SSagi Grimberg 	set_reg_mkey_seg(*seg, mr, wr->key, wr->access);
49108a187ee5SSagi Grimberg 	*seg += sizeof(struct mlx5_mkey_seg);
49118a187ee5SSagi Grimberg 	*size += sizeof(struct mlx5_mkey_seg) / 16;
491234f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
49138a187ee5SSagi Grimberg 
4914064e5262SIdan Burstein 	if (umr_inline) {
491534f4c955SGuy Levi 		memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs,
491634f4c955SGuy Levi 				mr_list_size);
491734f4c955SGuy Levi 		*size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4);
4918064e5262SIdan Burstein 	} else {
49198a187ee5SSagi Grimberg 		set_reg_data_seg(*seg, mr, pd);
49208a187ee5SSagi Grimberg 		*seg += sizeof(struct mlx5_wqe_data_seg);
49218a187ee5SSagi Grimberg 		*size += (sizeof(struct mlx5_wqe_data_seg) / 16);
4922064e5262SIdan Burstein 	}
49238a187ee5SSagi Grimberg 	return 0;
49248a187ee5SSagi Grimberg }
49258a187ee5SSagi Grimberg 
492634f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size,
492734f4c955SGuy Levi 			void **cur_edge)
4928e126ba97SEli Cohen {
4929dd01e66aSSagi Grimberg 	set_linv_umr_seg(*seg);
4930e126ba97SEli Cohen 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
4931e126ba97SEli Cohen 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
493234f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4933dd01e66aSSagi Grimberg 	set_linv_mkey_seg(*seg);
4934e126ba97SEli Cohen 	*seg += sizeof(struct mlx5_mkey_seg);
4935e126ba97SEli Cohen 	*size += sizeof(struct mlx5_mkey_seg) / 16;
493634f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4937e126ba97SEli Cohen }
4938e126ba97SEli Cohen 
493934f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16)
4940e126ba97SEli Cohen {
4941e126ba97SEli Cohen 	__be32 *p = NULL;
4942e126ba97SEli Cohen 	int i, j;
4943e126ba97SEli Cohen 
494434f4c955SGuy Levi 	pr_debug("dump WQE index %u:\n", idx);
4945e126ba97SEli Cohen 	for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) {
4946e126ba97SEli Cohen 		if ((i & 0xf) == 0) {
49471e5887b7SArtemy Kovalyov 			p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx);
494834f4c955SGuy Levi 			pr_debug("WQBB at %p:\n", (void *)p);
4949e126ba97SEli Cohen 			j = 0;
49501e5887b7SArtemy Kovalyov 			idx = (idx + 1) & (qp->sq.wqe_cnt - 1);
4951e126ba97SEli Cohen 		}
4952e126ba97SEli Cohen 		pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]),
4953e126ba97SEli Cohen 			 be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]),
4954e126ba97SEli Cohen 			 be32_to_cpu(p[j + 3]));
4955e126ba97SEli Cohen 	}
4956e126ba97SEli Cohen }
4957e126ba97SEli Cohen 
49587bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg,
49596e5eadacSSagi Grimberg 		       struct mlx5_wqe_ctrl_seg **ctrl,
496034f4c955SGuy Levi 		       const struct ib_send_wr *wr, unsigned int *idx,
496134f4c955SGuy Levi 		       int *size, void **cur_edge, int nreq,
496234f4c955SGuy Levi 		       bool send_signaled, bool solicited)
49636e5eadacSSagi Grimberg {
4964b2a232d2SLeon Romanovsky 	if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)))
4965b2a232d2SLeon Romanovsky 		return -ENOMEM;
49666e5eadacSSagi Grimberg 
49676e5eadacSSagi Grimberg 	*idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1);
496834f4c955SGuy Levi 	*seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx);
49696e5eadacSSagi Grimberg 	*ctrl = *seg;
49706e5eadacSSagi Grimberg 	*(uint32_t *)(*seg + 8) = 0;
49716e5eadacSSagi Grimberg 	(*ctrl)->imm = send_ieth(wr);
49726e5eadacSSagi Grimberg 	(*ctrl)->fm_ce_se = qp->sq_signal_bits |
49737bb1fafcSBart Van Assche 		(send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) |
49747bb1fafcSBart Van Assche 		(solicited ? MLX5_WQE_CTRL_SOLICITED : 0);
49756e5eadacSSagi Grimberg 
49766e5eadacSSagi Grimberg 	*seg += sizeof(**ctrl);
49776e5eadacSSagi Grimberg 	*size = sizeof(**ctrl) / 16;
497834f4c955SGuy Levi 	*cur_edge = qp->sq.cur_edge;
49796e5eadacSSagi Grimberg 
4980b2a232d2SLeon Romanovsky 	return 0;
49816e5eadacSSagi Grimberg }
49826e5eadacSSagi Grimberg 
49837bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg,
49847bb1fafcSBart Van Assche 		     struct mlx5_wqe_ctrl_seg **ctrl,
49857bb1fafcSBart Van Assche 		     const struct ib_send_wr *wr, unsigned *idx,
498634f4c955SGuy Levi 		     int *size, void **cur_edge, int nreq)
49877bb1fafcSBart Van Assche {
498834f4c955SGuy Levi 	return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq,
49897bb1fafcSBart Van Assche 			   wr->send_flags & IB_SEND_SIGNALED,
49907bb1fafcSBart Van Assche 			   wr->send_flags & IB_SEND_SOLICITED);
49917bb1fafcSBart Van Assche }
49927bb1fafcSBart Van Assche 
49936e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp,
49946e5eadacSSagi Grimberg 		       struct mlx5_wqe_ctrl_seg *ctrl,
499534f4c955SGuy Levi 		       void *seg, u8 size, void *cur_edge,
499634f4c955SGuy Levi 		       unsigned int idx, u64 wr_id, int nreq, u8 fence,
499734f4c955SGuy Levi 		       u32 mlx5_opcode)
49986e5eadacSSagi Grimberg {
49996e5eadacSSagi Grimberg 	u8 opmod = 0;
50006e5eadacSSagi Grimberg 
50016e5eadacSSagi Grimberg 	ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) |
50026e5eadacSSagi Grimberg 					     mlx5_opcode | ((u32)opmod << 24));
500319098df2Smajd@mellanox.com 	ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8));
50046e5eadacSSagi Grimberg 	ctrl->fm_ce_se |= fence;
50056e5eadacSSagi Grimberg 	if (unlikely(qp->wq_sig))
50066e5eadacSSagi Grimberg 		ctrl->signature = wq_sig(ctrl);
50076e5eadacSSagi Grimberg 
50086e5eadacSSagi Grimberg 	qp->sq.wrid[idx] = wr_id;
50096e5eadacSSagi Grimberg 	qp->sq.w_list[idx].opcode = mlx5_opcode;
50106e5eadacSSagi Grimberg 	qp->sq.wqe_head[idx] = qp->sq.head + nreq;
50116e5eadacSSagi Grimberg 	qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB);
50126e5eadacSSagi Grimberg 	qp->sq.w_list[idx].next = qp->sq.cur_post;
501334f4c955SGuy Levi 
501434f4c955SGuy Levi 	/* We save the edge which was possibly updated during the WQE
501534f4c955SGuy Levi 	 * construction, into SQ's cache.
501634f4c955SGuy Levi 	 */
501734f4c955SGuy Levi 	seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB);
501834f4c955SGuy Levi 	qp->sq.cur_edge = (unlikely(seg == cur_edge)) ?
501934f4c955SGuy Levi 			  get_sq_edge(&qp->sq, qp->sq.cur_post &
502034f4c955SGuy Levi 				      (qp->sq.wqe_cnt - 1)) :
502134f4c955SGuy Levi 			  cur_edge;
50226e5eadacSSagi Grimberg }
50236e5eadacSSagi Grimberg 
5024d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
5025d34ac5cdSBart Van Assche 			      const struct ib_send_wr **bad_wr, bool drain)
5026e126ba97SEli Cohen {
5027e126ba97SEli Cohen 	struct mlx5_wqe_ctrl_seg *ctrl = NULL;  /* compiler warning */
5028e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
502989ea94a7SMaor Gottlieb 	struct mlx5_core_dev *mdev = dev->mdev;
503038ca87c6SMax Gurtovoy 	struct ib_reg_wr reg_pi_wr;
5031d16e91daSHaggai Eran 	struct mlx5_ib_qp *qp;
5032e6631814SSagi Grimberg 	struct mlx5_ib_mr *mr;
503338ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *pi_mr;
50342563e2f3SMax Gurtovoy 	struct mlx5_ib_mr pa_pi_mr;
503538ca87c6SMax Gurtovoy 	struct ib_sig_attrs *sig_attrs;
5036e126ba97SEli Cohen 	struct mlx5_wqe_xrc_seg *xrc;
5037d16e91daSHaggai Eran 	struct mlx5_bf *bf;
503834f4c955SGuy Levi 	void *cur_edge;
5039e126ba97SEli Cohen 	int uninitialized_var(size);
5040e126ba97SEli Cohen 	unsigned long flags;
5041e126ba97SEli Cohen 	unsigned idx;
5042e126ba97SEli Cohen 	int err = 0;
5043e126ba97SEli Cohen 	int num_sge;
5044e126ba97SEli Cohen 	void *seg;
5045e126ba97SEli Cohen 	int nreq;
5046e126ba97SEli Cohen 	int i;
5047e126ba97SEli Cohen 	u8 next_fence = 0;
5048e126ba97SEli Cohen 	u8 fence;
5049e126ba97SEli Cohen 
50506c75520fSParav Pandit 	if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR &&
50516c75520fSParav Pandit 		     !drain)) {
50526c75520fSParav Pandit 		*bad_wr = wr;
50536c75520fSParav Pandit 		return -EIO;
50546c75520fSParav Pandit 	}
50556c75520fSParav Pandit 
5056d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5057d16e91daSHaggai Eran 		return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr);
5058d16e91daSHaggai Eran 
5059d16e91daSHaggai Eran 	qp = to_mqp(ibqp);
50605fe9dec0SEli Cohen 	bf = &qp->bf;
5061d16e91daSHaggai Eran 
5062e126ba97SEli Cohen 	spin_lock_irqsave(&qp->sq.lock, flags);
5063e126ba97SEli Cohen 
5064e126ba97SEli Cohen 	for (nreq = 0; wr; nreq++, wr = wr->next) {
5065a8f731ebSFabian Frederick 		if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) {
5066e126ba97SEli Cohen 			mlx5_ib_warn(dev, "\n");
5067e126ba97SEli Cohen 			err = -EINVAL;
5068e126ba97SEli Cohen 			*bad_wr = wr;
5069e126ba97SEli Cohen 			goto out;
5070e126ba97SEli Cohen 		}
5071e126ba97SEli Cohen 
5072e126ba97SEli Cohen 		num_sge = wr->num_sge;
5073e126ba97SEli Cohen 		if (unlikely(num_sge > qp->sq.max_gs)) {
5074e126ba97SEli Cohen 			mlx5_ib_warn(dev, "\n");
507524be409bSChuck Lever 			err = -EINVAL;
5076e126ba97SEli Cohen 			*bad_wr = wr;
5077e126ba97SEli Cohen 			goto out;
5078e126ba97SEli Cohen 		}
5079e126ba97SEli Cohen 
508034f4c955SGuy Levi 		err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge,
508134f4c955SGuy Levi 				nreq);
50826e5eadacSSagi Grimberg 		if (err) {
50836e5eadacSSagi Grimberg 			mlx5_ib_warn(dev, "\n");
50846e5eadacSSagi Grimberg 			err = -ENOMEM;
50856e5eadacSSagi Grimberg 			*bad_wr = wr;
50866e5eadacSSagi Grimberg 			goto out;
50876e5eadacSSagi Grimberg 		}
5088e126ba97SEli Cohen 
508938ca87c6SMax Gurtovoy 		if (wr->opcode == IB_WR_REG_MR ||
509038ca87c6SMax Gurtovoy 		    wr->opcode == IB_WR_REG_MR_INTEGRITY) {
50916e8484c5SMax Gurtovoy 			fence = dev->umr_fence;
50926e8484c5SMax Gurtovoy 			next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL;
5093074fca3aSMajd Dibbiny 		} else  {
5094074fca3aSMajd Dibbiny 			if (wr->send_flags & IB_SEND_FENCE) {
50956e8484c5SMax Gurtovoy 				if (qp->next_fence)
50966e8484c5SMax Gurtovoy 					fence = MLX5_FENCE_MODE_SMALL_AND_FENCE;
50976e8484c5SMax Gurtovoy 				else
50986e8484c5SMax Gurtovoy 					fence = MLX5_FENCE_MODE_FENCE;
50996e8484c5SMax Gurtovoy 			} else {
51006e8484c5SMax Gurtovoy 				fence = qp->next_fence;
51016e8484c5SMax Gurtovoy 			}
5102074fca3aSMajd Dibbiny 		}
51036e8484c5SMax Gurtovoy 
5104e126ba97SEli Cohen 		switch (ibqp->qp_type) {
5105e126ba97SEli Cohen 		case IB_QPT_XRC_INI:
5106e126ba97SEli Cohen 			xrc = seg;
5107e126ba97SEli Cohen 			seg += sizeof(*xrc);
5108e126ba97SEli Cohen 			size += sizeof(*xrc) / 16;
5109e126ba97SEli Cohen 			/* fall through */
5110e126ba97SEli Cohen 		case IB_QPT_RC:
5111e126ba97SEli Cohen 			switch (wr->opcode) {
5112e126ba97SEli Cohen 			case IB_WR_RDMA_READ:
5113e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE:
5114e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE_WITH_IMM:
5115e622f2f4SChristoph Hellwig 				set_raddr_seg(seg, rdma_wr(wr)->remote_addr,
5116e622f2f4SChristoph Hellwig 					      rdma_wr(wr)->rkey);
5117e126ba97SEli Cohen 				seg += sizeof(struct mlx5_wqe_raddr_seg);
5118e126ba97SEli Cohen 				size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
5119e126ba97SEli Cohen 				break;
5120e126ba97SEli Cohen 
5121e126ba97SEli Cohen 			case IB_WR_ATOMIC_CMP_AND_SWP:
5122e126ba97SEli Cohen 			case IB_WR_ATOMIC_FETCH_AND_ADD:
5123e126ba97SEli Cohen 			case IB_WR_MASKED_ATOMIC_CMP_AND_SWP:
512481bea28fSEli Cohen 				mlx5_ib_warn(dev, "Atomic operations are not supported yet\n");
512581bea28fSEli Cohen 				err = -ENOSYS;
512681bea28fSEli Cohen 				*bad_wr = wr;
512781bea28fSEli Cohen 				goto out;
5128e126ba97SEli Cohen 
5129e126ba97SEli Cohen 			case IB_WR_LOCAL_INV:
5130e126ba97SEli Cohen 				qp->sq.wr_data[idx] = IB_WR_LOCAL_INV;
5131e126ba97SEli Cohen 				ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey);
513234f4c955SGuy Levi 				set_linv_wr(qp, &seg, &size, &cur_edge);
5133e126ba97SEli Cohen 				num_sge = 0;
5134e126ba97SEli Cohen 				break;
5135e126ba97SEli Cohen 
51368a187ee5SSagi Grimberg 			case IB_WR_REG_MR:
51378a187ee5SSagi Grimberg 				qp->sq.wr_data[idx] = IB_WR_REG_MR;
51388a187ee5SSagi Grimberg 				ctrl->imm = cpu_to_be32(reg_wr(wr)->key);
513934f4c955SGuy Levi 				err = set_reg_wr(qp, reg_wr(wr), &seg, &size,
51409ac7c4bcSMax Gurtovoy 						 &cur_edge, true);
51418a187ee5SSagi Grimberg 				if (err) {
51428a187ee5SSagi Grimberg 					*bad_wr = wr;
51438a187ee5SSagi Grimberg 					goto out;
51448a187ee5SSagi Grimberg 				}
51458a187ee5SSagi Grimberg 				num_sge = 0;
51468a187ee5SSagi Grimberg 				break;
51478a187ee5SSagi Grimberg 
514838ca87c6SMax Gurtovoy 			case IB_WR_REG_MR_INTEGRITY:
51492563e2f3SMax Gurtovoy 				qp->sq.wr_data[idx] = IB_WR_REG_MR_INTEGRITY;
515038ca87c6SMax Gurtovoy 
515138ca87c6SMax Gurtovoy 				mr = to_mmr(reg_wr(wr)->mr);
515238ca87c6SMax Gurtovoy 				pi_mr = mr->pi_mr;
515338ca87c6SMax Gurtovoy 
51542563e2f3SMax Gurtovoy 				if (pi_mr) {
51552563e2f3SMax Gurtovoy 					memset(&reg_pi_wr, 0,
51562563e2f3SMax Gurtovoy 					       sizeof(struct ib_reg_wr));
51572563e2f3SMax Gurtovoy 
515838ca87c6SMax Gurtovoy 					reg_pi_wr.mr = &pi_mr->ibmr;
515938ca87c6SMax Gurtovoy 					reg_pi_wr.access = reg_wr(wr)->access;
516038ca87c6SMax Gurtovoy 					reg_pi_wr.key = pi_mr->ibmr.rkey;
516138ca87c6SMax Gurtovoy 
516238ca87c6SMax Gurtovoy 					ctrl->imm = cpu_to_be32(reg_pi_wr.key);
51632563e2f3SMax Gurtovoy 					/* UMR for data + prot registration */
51642563e2f3SMax Gurtovoy 					err = set_reg_wr(qp, &reg_pi_wr, &seg,
51652563e2f3SMax Gurtovoy 							 &size, &cur_edge,
51662563e2f3SMax Gurtovoy 							 false);
516738ca87c6SMax Gurtovoy 					if (err) {
516838ca87c6SMax Gurtovoy 						*bad_wr = wr;
516938ca87c6SMax Gurtovoy 						goto out;
517038ca87c6SMax Gurtovoy 					}
51712563e2f3SMax Gurtovoy 					finish_wqe(qp, ctrl, seg, size,
51722563e2f3SMax Gurtovoy 						   cur_edge, idx, wr->wr_id,
51732563e2f3SMax Gurtovoy 						   nreq, fence,
517438ca87c6SMax Gurtovoy 						   MLX5_OPCODE_UMR);
517538ca87c6SMax Gurtovoy 
51762563e2f3SMax Gurtovoy 					err = begin_wqe(qp, &seg, &ctrl, wr,
51772563e2f3SMax Gurtovoy 							&idx, &size, &cur_edge,
51782563e2f3SMax Gurtovoy 							nreq);
517938ca87c6SMax Gurtovoy 					if (err) {
518038ca87c6SMax Gurtovoy 						mlx5_ib_warn(dev, "\n");
518138ca87c6SMax Gurtovoy 						err = -ENOMEM;
518238ca87c6SMax Gurtovoy 						*bad_wr = wr;
518338ca87c6SMax Gurtovoy 						goto out;
518438ca87c6SMax Gurtovoy 					}
51852563e2f3SMax Gurtovoy 				} else {
51862563e2f3SMax Gurtovoy 					memset(&pa_pi_mr, 0,
51872563e2f3SMax Gurtovoy 					       sizeof(struct mlx5_ib_mr));
51882563e2f3SMax Gurtovoy 					/* No UMR, use local_dma_lkey */
51892563e2f3SMax Gurtovoy 					pa_pi_mr.ibmr.lkey =
51902563e2f3SMax Gurtovoy 						mr->ibmr.pd->local_dma_lkey;
51912563e2f3SMax Gurtovoy 
51922563e2f3SMax Gurtovoy 					pa_pi_mr.ndescs = mr->ndescs;
51932563e2f3SMax Gurtovoy 					pa_pi_mr.data_length = mr->data_length;
51942563e2f3SMax Gurtovoy 					pa_pi_mr.data_iova = mr->data_iova;
51952563e2f3SMax Gurtovoy 					if (mr->meta_ndescs) {
51962563e2f3SMax Gurtovoy 						pa_pi_mr.meta_ndescs =
51972563e2f3SMax Gurtovoy 							mr->meta_ndescs;
51982563e2f3SMax Gurtovoy 						pa_pi_mr.meta_length =
51992563e2f3SMax Gurtovoy 							mr->meta_length;
52002563e2f3SMax Gurtovoy 						pa_pi_mr.pi_iova = mr->pi_iova;
52012563e2f3SMax Gurtovoy 					}
52022563e2f3SMax Gurtovoy 
52032563e2f3SMax Gurtovoy 					pa_pi_mr.ibmr.length = mr->ibmr.length;
52042563e2f3SMax Gurtovoy 					mr->pi_mr = &pa_pi_mr;
52052563e2f3SMax Gurtovoy 				}
520638ca87c6SMax Gurtovoy 				ctrl->imm = cpu_to_be32(mr->ibmr.rkey);
520738ca87c6SMax Gurtovoy 				/* UMR for sig MR */
520838ca87c6SMax Gurtovoy 				err = set_pi_umr_wr(wr, qp, &seg, &size,
520938ca87c6SMax Gurtovoy 						    &cur_edge);
521038ca87c6SMax Gurtovoy 				if (err) {
521138ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
521238ca87c6SMax Gurtovoy 					*bad_wr = wr;
521338ca87c6SMax Gurtovoy 					goto out;
521438ca87c6SMax Gurtovoy 				}
521538ca87c6SMax Gurtovoy 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
521638ca87c6SMax Gurtovoy 					   wr->wr_id, nreq, fence,
521738ca87c6SMax Gurtovoy 					   MLX5_OPCODE_UMR);
521838ca87c6SMax Gurtovoy 
521938ca87c6SMax Gurtovoy 				/*
522038ca87c6SMax Gurtovoy 				 * SET_PSV WQEs are not signaled and solicited
522138ca87c6SMax Gurtovoy 				 * on error
522238ca87c6SMax Gurtovoy 				 */
522338ca87c6SMax Gurtovoy 				sig_attrs = mr->ibmr.sig_attrs;
522438ca87c6SMax Gurtovoy 				err = __begin_wqe(qp, &seg, &ctrl, wr, &idx,
522538ca87c6SMax Gurtovoy 						  &size, &cur_edge, nreq, false,
522638ca87c6SMax Gurtovoy 						  true);
522738ca87c6SMax Gurtovoy 				if (err) {
522838ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
522938ca87c6SMax Gurtovoy 					err = -ENOMEM;
523038ca87c6SMax Gurtovoy 					*bad_wr = wr;
523138ca87c6SMax Gurtovoy 					goto out;
523238ca87c6SMax Gurtovoy 				}
523338ca87c6SMax Gurtovoy 				err = set_psv_wr(&sig_attrs->mem,
523438ca87c6SMax Gurtovoy 						 mr->sig->psv_memory.psv_idx,
523538ca87c6SMax Gurtovoy 						 &seg, &size);
523638ca87c6SMax Gurtovoy 				if (err) {
523738ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
523838ca87c6SMax Gurtovoy 					*bad_wr = wr;
523938ca87c6SMax Gurtovoy 					goto out;
524038ca87c6SMax Gurtovoy 				}
524138ca87c6SMax Gurtovoy 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
524238ca87c6SMax Gurtovoy 					   wr->wr_id, nreq, next_fence,
524338ca87c6SMax Gurtovoy 					   MLX5_OPCODE_SET_PSV);
524438ca87c6SMax Gurtovoy 
524538ca87c6SMax Gurtovoy 				err = __begin_wqe(qp, &seg, &ctrl, wr, &idx,
524638ca87c6SMax Gurtovoy 						  &size, &cur_edge, nreq, false,
524738ca87c6SMax Gurtovoy 						  true);
524838ca87c6SMax Gurtovoy 				if (err) {
524938ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
525038ca87c6SMax Gurtovoy 					err = -ENOMEM;
525138ca87c6SMax Gurtovoy 					*bad_wr = wr;
525238ca87c6SMax Gurtovoy 					goto out;
525338ca87c6SMax Gurtovoy 				}
525438ca87c6SMax Gurtovoy 				err = set_psv_wr(&sig_attrs->wire,
525538ca87c6SMax Gurtovoy 						 mr->sig->psv_wire.psv_idx,
525638ca87c6SMax Gurtovoy 						 &seg, &size);
525738ca87c6SMax Gurtovoy 				if (err) {
525838ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
525938ca87c6SMax Gurtovoy 					*bad_wr = wr;
526038ca87c6SMax Gurtovoy 					goto out;
526138ca87c6SMax Gurtovoy 				}
526238ca87c6SMax Gurtovoy 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
526338ca87c6SMax Gurtovoy 					   wr->wr_id, nreq, next_fence,
526438ca87c6SMax Gurtovoy 					   MLX5_OPCODE_SET_PSV);
526538ca87c6SMax Gurtovoy 
526638ca87c6SMax Gurtovoy 				qp->next_fence =
526738ca87c6SMax Gurtovoy 					MLX5_FENCE_MODE_INITIATOR_SMALL;
526838ca87c6SMax Gurtovoy 				num_sge = 0;
526938ca87c6SMax Gurtovoy 				goto skip_psv;
527038ca87c6SMax Gurtovoy 
5271e126ba97SEli Cohen 			default:
5272e126ba97SEli Cohen 				break;
5273e126ba97SEli Cohen 			}
5274e126ba97SEli Cohen 			break;
5275e126ba97SEli Cohen 
5276e126ba97SEli Cohen 		case IB_QPT_UC:
5277e126ba97SEli Cohen 			switch (wr->opcode) {
5278e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE:
5279e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE_WITH_IMM:
5280e622f2f4SChristoph Hellwig 				set_raddr_seg(seg, rdma_wr(wr)->remote_addr,
5281e622f2f4SChristoph Hellwig 					      rdma_wr(wr)->rkey);
5282e126ba97SEli Cohen 				seg  += sizeof(struct mlx5_wqe_raddr_seg);
5283e126ba97SEli Cohen 				size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
5284e126ba97SEli Cohen 				break;
5285e126ba97SEli Cohen 
5286e126ba97SEli Cohen 			default:
5287e126ba97SEli Cohen 				break;
5288e126ba97SEli Cohen 			}
5289e126ba97SEli Cohen 			break;
5290e126ba97SEli Cohen 
5291e126ba97SEli Cohen 		case IB_QPT_SMI:
52921e0e50b6SMaor Gottlieb 			if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) {
52931e0e50b6SMaor Gottlieb 				mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
52941e0e50b6SMaor Gottlieb 				err = -EPERM;
52951e0e50b6SMaor Gottlieb 				*bad_wr = wr;
52961e0e50b6SMaor Gottlieb 				goto out;
52971e0e50b6SMaor Gottlieb 			}
5298f6b1ee34SBart Van Assche 			/* fall through */
5299d16e91daSHaggai Eran 		case MLX5_IB_QPT_HW_GSI:
5300e126ba97SEli Cohen 			set_datagram_seg(seg, wr);
5301e126ba97SEli Cohen 			seg += sizeof(struct mlx5_wqe_datagram_seg);
5302e126ba97SEli Cohen 			size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
530334f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
530434f4c955SGuy Levi 
5305e126ba97SEli Cohen 			break;
5306f0313965SErez Shitrit 		case IB_QPT_UD:
5307f0313965SErez Shitrit 			set_datagram_seg(seg, wr);
5308f0313965SErez Shitrit 			seg += sizeof(struct mlx5_wqe_datagram_seg);
5309f0313965SErez Shitrit 			size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
531034f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5311f0313965SErez Shitrit 
5312f0313965SErez Shitrit 			/* handle qp that supports ud offload */
5313f0313965SErez Shitrit 			if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) {
5314f0313965SErez Shitrit 				struct mlx5_wqe_eth_pad *pad;
5315f0313965SErez Shitrit 
5316f0313965SErez Shitrit 				pad = seg;
5317f0313965SErez Shitrit 				memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad));
5318f0313965SErez Shitrit 				seg += sizeof(struct mlx5_wqe_eth_pad);
5319f0313965SErez Shitrit 				size += sizeof(struct mlx5_wqe_eth_pad) / 16;
532034f4c955SGuy Levi 				set_eth_seg(wr, qp, &seg, &size, &cur_edge);
532134f4c955SGuy Levi 				handle_post_send_edge(&qp->sq, &seg, size,
532234f4c955SGuy Levi 						      &cur_edge);
5323f0313965SErez Shitrit 			}
5324f0313965SErez Shitrit 			break;
5325e126ba97SEli Cohen 		case MLX5_IB_QPT_REG_UMR:
5326e126ba97SEli Cohen 			if (wr->opcode != MLX5_IB_WR_UMR) {
5327e126ba97SEli Cohen 				err = -EINVAL;
5328e126ba97SEli Cohen 				mlx5_ib_warn(dev, "bad opcode\n");
5329e126ba97SEli Cohen 				goto out;
5330e126ba97SEli Cohen 			}
5331e126ba97SEli Cohen 			qp->sq.wr_data[idx] = MLX5_IB_WR_UMR;
5332e622f2f4SChristoph Hellwig 			ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey);
5333c8d75a98SMajd Dibbiny 			err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic)));
5334c8d75a98SMajd Dibbiny 			if (unlikely(err))
5335c8d75a98SMajd Dibbiny 				goto out;
5336e126ba97SEli Cohen 			seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
5337e126ba97SEli Cohen 			size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
533834f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5339e126ba97SEli Cohen 			set_reg_mkey_segment(seg, wr);
5340e126ba97SEli Cohen 			seg += sizeof(struct mlx5_mkey_seg);
5341e126ba97SEli Cohen 			size += sizeof(struct mlx5_mkey_seg) / 16;
534234f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5343e126ba97SEli Cohen 			break;
5344e126ba97SEli Cohen 
5345e126ba97SEli Cohen 		default:
5346e126ba97SEli Cohen 			break;
5347e126ba97SEli Cohen 		}
5348e126ba97SEli Cohen 
5349e126ba97SEli Cohen 		if (wr->send_flags & IB_SEND_INLINE && num_sge) {
535034f4c955SGuy Levi 			err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge);
5351e126ba97SEli Cohen 			if (unlikely(err)) {
5352e126ba97SEli Cohen 				mlx5_ib_warn(dev, "\n");
5353e126ba97SEli Cohen 				*bad_wr = wr;
5354e126ba97SEli Cohen 				goto out;
5355e126ba97SEli Cohen 			}
5356e126ba97SEli Cohen 		} else {
5357e126ba97SEli Cohen 			for (i = 0; i < num_sge; i++) {
535834f4c955SGuy Levi 				handle_post_send_edge(&qp->sq, &seg, size,
535934f4c955SGuy Levi 						      &cur_edge);
5360e126ba97SEli Cohen 				if (likely(wr->sg_list[i].length)) {
536134f4c955SGuy Levi 					set_data_ptr_seg
536234f4c955SGuy Levi 					((struct mlx5_wqe_data_seg *)seg,
536334f4c955SGuy Levi 					 wr->sg_list + i);
5364e126ba97SEli Cohen 					size += sizeof(struct mlx5_wqe_data_seg) / 16;
536534f4c955SGuy Levi 					seg += sizeof(struct mlx5_wqe_data_seg);
5366e126ba97SEli Cohen 				}
5367e126ba97SEli Cohen 			}
5368e126ba97SEli Cohen 		}
5369e126ba97SEli Cohen 
53706e8484c5SMax Gurtovoy 		qp->next_fence = next_fence;
537134f4c955SGuy Levi 		finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq,
537234f4c955SGuy Levi 			   fence, mlx5_ib_opcode[wr->opcode]);
5373e6631814SSagi Grimberg skip_psv:
5374e126ba97SEli Cohen 		if (0)
5375e126ba97SEli Cohen 			dump_wqe(qp, idx, size);
5376e126ba97SEli Cohen 	}
5377e126ba97SEli Cohen 
5378e126ba97SEli Cohen out:
5379e126ba97SEli Cohen 	if (likely(nreq)) {
5380e126ba97SEli Cohen 		qp->sq.head += nreq;
5381e126ba97SEli Cohen 
5382e126ba97SEli Cohen 		/* Make sure that descriptors are written before
5383e126ba97SEli Cohen 		 * updating doorbell record and ringing the doorbell
5384e126ba97SEli Cohen 		 */
5385e126ba97SEli Cohen 		wmb();
5386e126ba97SEli Cohen 
5387e126ba97SEli Cohen 		qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post);
5388e126ba97SEli Cohen 
5389ada388f7SEli Cohen 		/* Make sure doorbell record is visible to the HCA before
5390ada388f7SEli Cohen 		 * we hit doorbell */
5391ada388f7SEli Cohen 		wmb();
5392ada388f7SEli Cohen 
5393bbf29f61SMaxim Mikityanskiy 		mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset);
5394e126ba97SEli Cohen 		/* Make sure doorbells don't leak out of SQ spinlock
5395e126ba97SEli Cohen 		 * and reach the HCA out of order.
5396e126ba97SEli Cohen 		 */
5397e126ba97SEli Cohen 		bf->offset ^= bf->buf_size;
5398e126ba97SEli Cohen 	}
5399e126ba97SEli Cohen 
5400e126ba97SEli Cohen 	spin_unlock_irqrestore(&qp->sq.lock, flags);
5401e126ba97SEli Cohen 
5402e126ba97SEli Cohen 	return err;
5403e126ba97SEli Cohen }
5404e126ba97SEli Cohen 
5405d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
5406d34ac5cdSBart Van Assche 		      const struct ib_send_wr **bad_wr)
5407d0e84c0aSYishai Hadas {
5408d0e84c0aSYishai Hadas 	return _mlx5_ib_post_send(ibqp, wr, bad_wr, false);
5409d0e84c0aSYishai Hadas }
5410d0e84c0aSYishai Hadas 
5411e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size)
5412e126ba97SEli Cohen {
5413e126ba97SEli Cohen 	sig->signature = calc_sig(sig, size);
5414e126ba97SEli Cohen }
5415e126ba97SEli Cohen 
5416d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
5417d34ac5cdSBart Van Assche 		      const struct ib_recv_wr **bad_wr, bool drain)
5418e126ba97SEli Cohen {
5419e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
5420e126ba97SEli Cohen 	struct mlx5_wqe_data_seg *scat;
5421e126ba97SEli Cohen 	struct mlx5_rwqe_sig *sig;
542289ea94a7SMaor Gottlieb 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
542389ea94a7SMaor Gottlieb 	struct mlx5_core_dev *mdev = dev->mdev;
5424e126ba97SEli Cohen 	unsigned long flags;
5425e126ba97SEli Cohen 	int err = 0;
5426e126ba97SEli Cohen 	int nreq;
5427e126ba97SEli Cohen 	int ind;
5428e126ba97SEli Cohen 	int i;
5429e126ba97SEli Cohen 
54306c75520fSParav Pandit 	if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR &&
54316c75520fSParav Pandit 		     !drain)) {
54326c75520fSParav Pandit 		*bad_wr = wr;
54336c75520fSParav Pandit 		return -EIO;
54346c75520fSParav Pandit 	}
54356c75520fSParav Pandit 
5436d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5437d16e91daSHaggai Eran 		return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr);
5438d16e91daSHaggai Eran 
5439e126ba97SEli Cohen 	spin_lock_irqsave(&qp->rq.lock, flags);
5440e126ba97SEli Cohen 
5441e126ba97SEli Cohen 	ind = qp->rq.head & (qp->rq.wqe_cnt - 1);
5442e126ba97SEli Cohen 
5443e126ba97SEli Cohen 	for (nreq = 0; wr; nreq++, wr = wr->next) {
5444e126ba97SEli Cohen 		if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
5445e126ba97SEli Cohen 			err = -ENOMEM;
5446e126ba97SEli Cohen 			*bad_wr = wr;
5447e126ba97SEli Cohen 			goto out;
5448e126ba97SEli Cohen 		}
5449e126ba97SEli Cohen 
5450e126ba97SEli Cohen 		if (unlikely(wr->num_sge > qp->rq.max_gs)) {
5451e126ba97SEli Cohen 			err = -EINVAL;
5452e126ba97SEli Cohen 			*bad_wr = wr;
5453e126ba97SEli Cohen 			goto out;
5454e126ba97SEli Cohen 		}
5455e126ba97SEli Cohen 
545634f4c955SGuy Levi 		scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind);
5457e126ba97SEli Cohen 		if (qp->wq_sig)
5458e126ba97SEli Cohen 			scat++;
5459e126ba97SEli Cohen 
5460e126ba97SEli Cohen 		for (i = 0; i < wr->num_sge; i++)
5461e126ba97SEli Cohen 			set_data_ptr_seg(scat + i, wr->sg_list + i);
5462e126ba97SEli Cohen 
5463e126ba97SEli Cohen 		if (i < qp->rq.max_gs) {
5464e126ba97SEli Cohen 			scat[i].byte_count = 0;
5465e126ba97SEli Cohen 			scat[i].lkey       = cpu_to_be32(MLX5_INVALID_LKEY);
5466e126ba97SEli Cohen 			scat[i].addr       = 0;
5467e126ba97SEli Cohen 		}
5468e126ba97SEli Cohen 
5469e126ba97SEli Cohen 		if (qp->wq_sig) {
5470e126ba97SEli Cohen 			sig = (struct mlx5_rwqe_sig *)scat;
5471e126ba97SEli Cohen 			set_sig_seg(sig, (qp->rq.max_gs + 1) << 2);
5472e126ba97SEli Cohen 		}
5473e126ba97SEli Cohen 
5474e126ba97SEli Cohen 		qp->rq.wrid[ind] = wr->wr_id;
5475e126ba97SEli Cohen 
5476e126ba97SEli Cohen 		ind = (ind + 1) & (qp->rq.wqe_cnt - 1);
5477e126ba97SEli Cohen 	}
5478e126ba97SEli Cohen 
5479e126ba97SEli Cohen out:
5480e126ba97SEli Cohen 	if (likely(nreq)) {
5481e126ba97SEli Cohen 		qp->rq.head += nreq;
5482e126ba97SEli Cohen 
5483e126ba97SEli Cohen 		/* Make sure that descriptors are written before
5484e126ba97SEli Cohen 		 * doorbell record.
5485e126ba97SEli Cohen 		 */
5486e126ba97SEli Cohen 		wmb();
5487e126ba97SEli Cohen 
5488e126ba97SEli Cohen 		*qp->db.db = cpu_to_be32(qp->rq.head & 0xffff);
5489e126ba97SEli Cohen 	}
5490e126ba97SEli Cohen 
5491e126ba97SEli Cohen 	spin_unlock_irqrestore(&qp->rq.lock, flags);
5492e126ba97SEli Cohen 
5493e126ba97SEli Cohen 	return err;
5494e126ba97SEli Cohen }
5495e126ba97SEli Cohen 
5496d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
5497d34ac5cdSBart Van Assche 		      const struct ib_recv_wr **bad_wr)
5498d0e84c0aSYishai Hadas {
5499d0e84c0aSYishai Hadas 	return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false);
5500d0e84c0aSYishai Hadas }
5501d0e84c0aSYishai Hadas 
5502e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state)
5503e126ba97SEli Cohen {
5504e126ba97SEli Cohen 	switch (mlx5_state) {
5505e126ba97SEli Cohen 	case MLX5_QP_STATE_RST:      return IB_QPS_RESET;
5506e126ba97SEli Cohen 	case MLX5_QP_STATE_INIT:     return IB_QPS_INIT;
5507e126ba97SEli Cohen 	case MLX5_QP_STATE_RTR:      return IB_QPS_RTR;
5508e126ba97SEli Cohen 	case MLX5_QP_STATE_RTS:      return IB_QPS_RTS;
5509e126ba97SEli Cohen 	case MLX5_QP_STATE_SQ_DRAINING:
5510e126ba97SEli Cohen 	case MLX5_QP_STATE_SQD:      return IB_QPS_SQD;
5511e126ba97SEli Cohen 	case MLX5_QP_STATE_SQER:     return IB_QPS_SQE;
5512e126ba97SEli Cohen 	case MLX5_QP_STATE_ERR:      return IB_QPS_ERR;
5513e126ba97SEli Cohen 	default:		     return -1;
5514e126ba97SEli Cohen 	}
5515e126ba97SEli Cohen }
5516e126ba97SEli Cohen 
5517e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state)
5518e126ba97SEli Cohen {
5519e126ba97SEli Cohen 	switch (mlx5_mig_state) {
5520e126ba97SEli Cohen 	case MLX5_QP_PM_ARMED:		return IB_MIG_ARMED;
5521e126ba97SEli Cohen 	case MLX5_QP_PM_REARM:		return IB_MIG_REARM;
5522e126ba97SEli Cohen 	case MLX5_QP_PM_MIGRATED:	return IB_MIG_MIGRATED;
5523e126ba97SEli Cohen 	default: return -1;
5524e126ba97SEli Cohen 	}
5525e126ba97SEli Cohen }
5526e126ba97SEli Cohen 
5527e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags)
5528e126ba97SEli Cohen {
5529e126ba97SEli Cohen 	int ib_flags = 0;
5530e126ba97SEli Cohen 
5531e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RRE)
5532e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_READ;
5533e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RWE)
5534e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_WRITE;
5535e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RAE)
5536e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_ATOMIC;
5537e126ba97SEli Cohen 
5538e126ba97SEli Cohen 	return ib_flags;
5539e126ba97SEli Cohen }
5540e126ba97SEli Cohen 
554138349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev,
5542d8966fcdSDasaratharaman Chandramouli 			    struct rdma_ah_attr *ah_attr,
5543e126ba97SEli Cohen 			    struct mlx5_qp_path *path)
5544e126ba97SEli Cohen {
5545e126ba97SEli Cohen 
5546d8966fcdSDasaratharaman Chandramouli 	memset(ah_attr, 0, sizeof(*ah_attr));
5547e126ba97SEli Cohen 
5548e7996a9aSJason Gunthorpe 	if (!path->port || path->port > ibdev->num_ports)
5549e126ba97SEli Cohen 		return;
5550e126ba97SEli Cohen 
5551ae59c3f0SLeon Romanovsky 	ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port);
5552ae59c3f0SLeon Romanovsky 
5553d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_port_num(ah_attr, path->port);
5554d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf);
5555e126ba97SEli Cohen 
5556d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid));
5557d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);
5558d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_static_rate(ah_attr,
5559d8966fcdSDasaratharaman Chandramouli 				path->static_rate ? path->static_rate - 5 : 0);
5560d8966fcdSDasaratharaman Chandramouli 	if (path->grh_mlid & (1 << 7)) {
5561d8966fcdSDasaratharaman Chandramouli 		u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);
5562d8966fcdSDasaratharaman Chandramouli 
5563d8966fcdSDasaratharaman Chandramouli 		rdma_ah_set_grh(ah_attr, NULL,
5564d8966fcdSDasaratharaman Chandramouli 				tc_fl & 0xfffff,
5565d8966fcdSDasaratharaman Chandramouli 				path->mgid_index,
5566d8966fcdSDasaratharaman Chandramouli 				path->hop_limit,
5567d8966fcdSDasaratharaman Chandramouli 				(tc_fl >> 20) & 0xff);
5568d8966fcdSDasaratharaman Chandramouli 		rdma_ah_set_dgid_raw(ah_attr, path->rgid);
5569e126ba97SEli Cohen 	}
5570e126ba97SEli Cohen }
5571e126ba97SEli Cohen 
55726d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev,
55736d2f89dfSmajd@mellanox.com 					struct mlx5_ib_sq *sq,
55746d2f89dfSmajd@mellanox.com 					u8 *sq_state)
5575e126ba97SEli Cohen {
55766d2f89dfSmajd@mellanox.com 	int err;
55776d2f89dfSmajd@mellanox.com 
557828160771SEran Ben Elisha 	err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state);
55796d2f89dfSmajd@mellanox.com 	if (err)
55806d2f89dfSmajd@mellanox.com 		goto out;
55816d2f89dfSmajd@mellanox.com 	sq->state = *sq_state;
55826d2f89dfSmajd@mellanox.com 
55836d2f89dfSmajd@mellanox.com out:
55846d2f89dfSmajd@mellanox.com 	return err;
55856d2f89dfSmajd@mellanox.com }
55866d2f89dfSmajd@mellanox.com 
55876d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev,
55886d2f89dfSmajd@mellanox.com 					struct mlx5_ib_rq *rq,
55896d2f89dfSmajd@mellanox.com 					u8 *rq_state)
55906d2f89dfSmajd@mellanox.com {
55916d2f89dfSmajd@mellanox.com 	void *out;
55926d2f89dfSmajd@mellanox.com 	void *rqc;
55936d2f89dfSmajd@mellanox.com 	int inlen;
55946d2f89dfSmajd@mellanox.com 	int err;
55956d2f89dfSmajd@mellanox.com 
55966d2f89dfSmajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(query_rq_out);
55971b9a07eeSLeon Romanovsky 	out = kvzalloc(inlen, GFP_KERNEL);
55986d2f89dfSmajd@mellanox.com 	if (!out)
55996d2f89dfSmajd@mellanox.com 		return -ENOMEM;
56006d2f89dfSmajd@mellanox.com 
56016d2f89dfSmajd@mellanox.com 	err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out);
56026d2f89dfSmajd@mellanox.com 	if (err)
56036d2f89dfSmajd@mellanox.com 		goto out;
56046d2f89dfSmajd@mellanox.com 
56056d2f89dfSmajd@mellanox.com 	rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context);
56066d2f89dfSmajd@mellanox.com 	*rq_state = MLX5_GET(rqc, rqc, state);
56076d2f89dfSmajd@mellanox.com 	rq->state = *rq_state;
56086d2f89dfSmajd@mellanox.com 
56096d2f89dfSmajd@mellanox.com out:
56106d2f89dfSmajd@mellanox.com 	kvfree(out);
56116d2f89dfSmajd@mellanox.com 	return err;
56126d2f89dfSmajd@mellanox.com }
56136d2f89dfSmajd@mellanox.com 
56146d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state,
56156d2f89dfSmajd@mellanox.com 				  struct mlx5_ib_qp *qp, u8 *qp_state)
56166d2f89dfSmajd@mellanox.com {
56176d2f89dfSmajd@mellanox.com 	static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = {
56186d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_RST] = {
56196d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]	= IB_QPS_RESET,
56206d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE_BAD,
56216d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= MLX5_QP_STATE_BAD,
56226d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= IB_QPS_RESET,
56236d2f89dfSmajd@mellanox.com 		},
56246d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_RDY] = {
56256d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]	= MLX5_QP_STATE_BAD,
56266d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE,
56276d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= IB_QPS_SQE,
56286d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= MLX5_QP_STATE,
56296d2f89dfSmajd@mellanox.com 		},
56306d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_ERR] = {
56316d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]    = MLX5_QP_STATE_BAD,
56326d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE_BAD,
56336d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= IB_QPS_ERR,
56346d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= IB_QPS_ERR,
56356d2f89dfSmajd@mellanox.com 		},
56366d2f89dfSmajd@mellanox.com 		[MLX5_RQ_STATE_NA] = {
56376d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]    = IB_QPS_RESET,
56386d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE,
56396d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= MLX5_QP_STATE,
56406d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= MLX5_QP_STATE_BAD,
56416d2f89dfSmajd@mellanox.com 		},
56426d2f89dfSmajd@mellanox.com 	};
56436d2f89dfSmajd@mellanox.com 
56446d2f89dfSmajd@mellanox.com 	*qp_state = sqrq_trans[rq_state][sq_state];
56456d2f89dfSmajd@mellanox.com 
56466d2f89dfSmajd@mellanox.com 	if (*qp_state == MLX5_QP_STATE_BAD) {
56476d2f89dfSmajd@mellanox.com 		WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x",
56486d2f89dfSmajd@mellanox.com 		     qp->raw_packet_qp.sq.base.mqp.qpn, sq_state,
56496d2f89dfSmajd@mellanox.com 		     qp->raw_packet_qp.rq.base.mqp.qpn, rq_state);
56506d2f89dfSmajd@mellanox.com 		return -EINVAL;
56516d2f89dfSmajd@mellanox.com 	}
56526d2f89dfSmajd@mellanox.com 
56536d2f89dfSmajd@mellanox.com 	if (*qp_state == MLX5_QP_STATE)
56546d2f89dfSmajd@mellanox.com 		*qp_state = qp->state;
56556d2f89dfSmajd@mellanox.com 
56566d2f89dfSmajd@mellanox.com 	return 0;
56576d2f89dfSmajd@mellanox.com }
56586d2f89dfSmajd@mellanox.com 
56596d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev,
56606d2f89dfSmajd@mellanox.com 				     struct mlx5_ib_qp *qp,
56616d2f89dfSmajd@mellanox.com 				     u8 *raw_packet_qp_state)
56626d2f89dfSmajd@mellanox.com {
56636d2f89dfSmajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
56646d2f89dfSmajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
56656d2f89dfSmajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
56666d2f89dfSmajd@mellanox.com 	int err;
56676d2f89dfSmajd@mellanox.com 	u8 sq_state = MLX5_SQ_STATE_NA;
56686d2f89dfSmajd@mellanox.com 	u8 rq_state = MLX5_RQ_STATE_NA;
56696d2f89dfSmajd@mellanox.com 
56706d2f89dfSmajd@mellanox.com 	if (qp->sq.wqe_cnt) {
56716d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_sq_state(dev, sq, &sq_state);
56726d2f89dfSmajd@mellanox.com 		if (err)
56736d2f89dfSmajd@mellanox.com 			return err;
56746d2f89dfSmajd@mellanox.com 	}
56756d2f89dfSmajd@mellanox.com 
56766d2f89dfSmajd@mellanox.com 	if (qp->rq.wqe_cnt) {
56776d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_rq_state(dev, rq, &rq_state);
56786d2f89dfSmajd@mellanox.com 		if (err)
56796d2f89dfSmajd@mellanox.com 			return err;
56806d2f89dfSmajd@mellanox.com 	}
56816d2f89dfSmajd@mellanox.com 
56826d2f89dfSmajd@mellanox.com 	return sqrq_state_to_qp_state(sq_state, rq_state, qp,
56836d2f89dfSmajd@mellanox.com 				      raw_packet_qp_state);
56846d2f89dfSmajd@mellanox.com }
56856d2f89dfSmajd@mellanox.com 
56866d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
56876d2f89dfSmajd@mellanox.com 			 struct ib_qp_attr *qp_attr)
56886d2f89dfSmajd@mellanox.com {
568909a7d9ecSSaeed Mahameed 	int outlen = MLX5_ST_SZ_BYTES(query_qp_out);
5690e126ba97SEli Cohen 	struct mlx5_qp_context *context;
5691e126ba97SEli Cohen 	int mlx5_state;
569209a7d9ecSSaeed Mahameed 	u32 *outb;
5693e126ba97SEli Cohen 	int err = 0;
5694e126ba97SEli Cohen 
569509a7d9ecSSaeed Mahameed 	outb = kzalloc(outlen, GFP_KERNEL);
56966d2f89dfSmajd@mellanox.com 	if (!outb)
56976d2f89dfSmajd@mellanox.com 		return -ENOMEM;
56986d2f89dfSmajd@mellanox.com 
569919098df2Smajd@mellanox.com 	err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb,
570009a7d9ecSSaeed Mahameed 				 outlen);
5701e126ba97SEli Cohen 	if (err)
57026d2f89dfSmajd@mellanox.com 		goto out;
5703e126ba97SEli Cohen 
570409a7d9ecSSaeed Mahameed 	/* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */
570509a7d9ecSSaeed Mahameed 	context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc);
570609a7d9ecSSaeed Mahameed 
5707e126ba97SEli Cohen 	mlx5_state = be32_to_cpu(context->flags) >> 28;
5708e126ba97SEli Cohen 
5709e126ba97SEli Cohen 	qp->state		     = to_ib_qp_state(mlx5_state);
5710e126ba97SEli Cohen 	qp_attr->path_mtu	     = context->mtu_msgmax >> 5;
5711e126ba97SEli Cohen 	qp_attr->path_mig_state	     =
5712e126ba97SEli Cohen 		to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3);
5713e126ba97SEli Cohen 	qp_attr->qkey		     = be32_to_cpu(context->qkey);
5714e126ba97SEli Cohen 	qp_attr->rq_psn		     = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff;
5715e126ba97SEli Cohen 	qp_attr->sq_psn		     = be32_to_cpu(context->next_send_psn) & 0xffffff;
5716e126ba97SEli Cohen 	qp_attr->dest_qp_num	     = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff;
5717e126ba97SEli Cohen 	qp_attr->qp_access_flags     =
5718e126ba97SEli Cohen 		to_ib_qp_access_flags(be32_to_cpu(context->params2));
5719e126ba97SEli Cohen 
5720e126ba97SEli Cohen 	if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
572138349389SDasaratharaman Chandramouli 		to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path);
572238349389SDasaratharaman Chandramouli 		to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path);
5723d3ae2bdeSNoa Osherovich 		qp_attr->alt_pkey_index =
5724d3ae2bdeSNoa Osherovich 			be16_to_cpu(context->alt_path.pkey_index);
5725d8966fcdSDasaratharaman Chandramouli 		qp_attr->alt_port_num	=
5726d8966fcdSDasaratharaman Chandramouli 			rdma_ah_get_port_num(&qp_attr->alt_ah_attr);
5727e126ba97SEli Cohen 	}
5728e126ba97SEli Cohen 
5729d3ae2bdeSNoa Osherovich 	qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index);
5730e126ba97SEli Cohen 	qp_attr->port_num = context->pri_path.port;
5731e126ba97SEli Cohen 
5732e126ba97SEli Cohen 	/* qp_attr->en_sqd_async_notify is only applicable in modify qp */
5733e126ba97SEli Cohen 	qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING;
5734e126ba97SEli Cohen 
5735e126ba97SEli Cohen 	qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7);
5736e126ba97SEli Cohen 
5737e126ba97SEli Cohen 	qp_attr->max_dest_rd_atomic =
5738e126ba97SEli Cohen 		1 << ((be32_to_cpu(context->params2) >> 21) & 0x7);
5739e126ba97SEli Cohen 	qp_attr->min_rnr_timer	    =
5740e126ba97SEli Cohen 		(be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f;
5741e126ba97SEli Cohen 	qp_attr->timeout	    = context->pri_path.ackto_lt >> 3;
5742e126ba97SEli Cohen 	qp_attr->retry_cnt	    = (be32_to_cpu(context->params1) >> 16) & 0x7;
5743e126ba97SEli Cohen 	qp_attr->rnr_retry	    = (be32_to_cpu(context->params1) >> 13) & 0x7;
5744e126ba97SEli Cohen 	qp_attr->alt_timeout	    = context->alt_path.ackto_lt >> 3;
57456d2f89dfSmajd@mellanox.com 
57466d2f89dfSmajd@mellanox.com out:
57476d2f89dfSmajd@mellanox.com 	kfree(outb);
57486d2f89dfSmajd@mellanox.com 	return err;
57496d2f89dfSmajd@mellanox.com }
57506d2f89dfSmajd@mellanox.com 
5751776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp,
5752776a3906SMoni Shoua 				struct ib_qp_attr *qp_attr, int qp_attr_mask,
5753776a3906SMoni Shoua 				struct ib_qp_init_attr *qp_init_attr)
5754776a3906SMoni Shoua {
5755776a3906SMoni Shoua 	struct mlx5_core_dct	*dct = &mqp->dct.mdct;
5756776a3906SMoni Shoua 	u32 *out;
5757776a3906SMoni Shoua 	u32 access_flags = 0;
5758776a3906SMoni Shoua 	int outlen = MLX5_ST_SZ_BYTES(query_dct_out);
5759776a3906SMoni Shoua 	void *dctc;
5760776a3906SMoni Shoua 	int err;
5761776a3906SMoni Shoua 	int supported_mask = IB_QP_STATE |
5762776a3906SMoni Shoua 			     IB_QP_ACCESS_FLAGS |
5763776a3906SMoni Shoua 			     IB_QP_PORT |
5764776a3906SMoni Shoua 			     IB_QP_MIN_RNR_TIMER |
5765776a3906SMoni Shoua 			     IB_QP_AV |
5766776a3906SMoni Shoua 			     IB_QP_PATH_MTU |
5767776a3906SMoni Shoua 			     IB_QP_PKEY_INDEX;
5768776a3906SMoni Shoua 
5769776a3906SMoni Shoua 	if (qp_attr_mask & ~supported_mask)
5770776a3906SMoni Shoua 		return -EINVAL;
5771776a3906SMoni Shoua 	if (mqp->state != IB_QPS_RTR)
5772776a3906SMoni Shoua 		return -EINVAL;
5773776a3906SMoni Shoua 
5774776a3906SMoni Shoua 	out = kzalloc(outlen, GFP_KERNEL);
5775776a3906SMoni Shoua 	if (!out)
5776776a3906SMoni Shoua 		return -ENOMEM;
5777776a3906SMoni Shoua 
5778776a3906SMoni Shoua 	err = mlx5_core_dct_query(dev->mdev, dct, out, outlen);
5779776a3906SMoni Shoua 	if (err)
5780776a3906SMoni Shoua 		goto out;
5781776a3906SMoni Shoua 
5782776a3906SMoni Shoua 	dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry);
5783776a3906SMoni Shoua 
5784776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_STATE)
5785776a3906SMoni Shoua 		qp_attr->qp_state = IB_QPS_RTR;
5786776a3906SMoni Shoua 
5787776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_ACCESS_FLAGS) {
5788776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rre))
5789776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_READ;
5790776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rwe))
5791776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_WRITE;
5792776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rae))
5793776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_ATOMIC;
5794776a3906SMoni Shoua 		qp_attr->qp_access_flags = access_flags;
5795776a3906SMoni Shoua 	}
5796776a3906SMoni Shoua 
5797776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PORT)
5798776a3906SMoni Shoua 		qp_attr->port_num = MLX5_GET(dctc, dctc, port);
5799776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_MIN_RNR_TIMER)
5800776a3906SMoni Shoua 		qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak);
5801776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_AV) {
5802776a3906SMoni Shoua 		qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass);
5803776a3906SMoni Shoua 		qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label);
5804776a3906SMoni Shoua 		qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index);
5805776a3906SMoni Shoua 		qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit);
5806776a3906SMoni Shoua 	}
5807776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PATH_MTU)
5808776a3906SMoni Shoua 		qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu);
5809776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PKEY_INDEX)
5810776a3906SMoni Shoua 		qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index);
5811776a3906SMoni Shoua out:
5812776a3906SMoni Shoua 	kfree(out);
5813776a3906SMoni Shoua 	return err;
5814776a3906SMoni Shoua }
5815776a3906SMoni Shoua 
58166d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
58176d2f89dfSmajd@mellanox.com 		     int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
58186d2f89dfSmajd@mellanox.com {
58196d2f89dfSmajd@mellanox.com 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
58206d2f89dfSmajd@mellanox.com 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
58216d2f89dfSmajd@mellanox.com 	int err = 0;
58226d2f89dfSmajd@mellanox.com 	u8 raw_packet_qp_state;
58236d2f89dfSmajd@mellanox.com 
582428d61370SYishai Hadas 	if (ibqp->rwq_ind_tbl)
582528d61370SYishai Hadas 		return -ENOSYS;
582628d61370SYishai Hadas 
5827d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5828d16e91daSHaggai Eran 		return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask,
5829d16e91daSHaggai Eran 					    qp_init_attr);
5830d16e91daSHaggai Eran 
5831c2e53b2cSYishai Hadas 	/* Not all of output fields are applicable, make sure to zero them */
5832c2e53b2cSYishai Hadas 	memset(qp_init_attr, 0, sizeof(*qp_init_attr));
5833c2e53b2cSYishai Hadas 	memset(qp_attr, 0, sizeof(*qp_attr));
5834c2e53b2cSYishai Hadas 
5835776a3906SMoni Shoua 	if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT))
5836776a3906SMoni Shoua 		return mlx5_ib_dct_query_qp(dev, qp, qp_attr,
5837776a3906SMoni Shoua 					    qp_attr_mask, qp_init_attr);
5838776a3906SMoni Shoua 
58396d2f89dfSmajd@mellanox.com 	mutex_lock(&qp->mutex);
58406d2f89dfSmajd@mellanox.com 
5841c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
5842c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
58436d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state);
58446d2f89dfSmajd@mellanox.com 		if (err)
58456d2f89dfSmajd@mellanox.com 			goto out;
58466d2f89dfSmajd@mellanox.com 		qp->state = raw_packet_qp_state;
58476d2f89dfSmajd@mellanox.com 		qp_attr->port_num = 1;
58486d2f89dfSmajd@mellanox.com 	} else {
58496d2f89dfSmajd@mellanox.com 		err = query_qp_attr(dev, qp, qp_attr);
58506d2f89dfSmajd@mellanox.com 		if (err)
58516d2f89dfSmajd@mellanox.com 			goto out;
58526d2f89dfSmajd@mellanox.com 	}
58536d2f89dfSmajd@mellanox.com 
58546d2f89dfSmajd@mellanox.com 	qp_attr->qp_state	     = qp->state;
5855e126ba97SEli Cohen 	qp_attr->cur_qp_state	     = qp_attr->qp_state;
5856e126ba97SEli Cohen 	qp_attr->cap.max_recv_wr     = qp->rq.wqe_cnt;
5857e126ba97SEli Cohen 	qp_attr->cap.max_recv_sge    = qp->rq.max_gs;
5858e126ba97SEli Cohen 
5859e126ba97SEli Cohen 	if (!ibqp->uobject) {
58600540d814SNoa Osherovich 		qp_attr->cap.max_send_wr  = qp->sq.max_post;
5861e126ba97SEli Cohen 		qp_attr->cap.max_send_sge = qp->sq.max_gs;
58620540d814SNoa Osherovich 		qp_init_attr->qp_context = ibqp->qp_context;
5863e126ba97SEli Cohen 	} else {
5864e126ba97SEli Cohen 		qp_attr->cap.max_send_wr  = 0;
5865e126ba97SEli Cohen 		qp_attr->cap.max_send_sge = 0;
5866e126ba97SEli Cohen 	}
5867e126ba97SEli Cohen 
58680540d814SNoa Osherovich 	qp_init_attr->qp_type = ibqp->qp_type;
58690540d814SNoa Osherovich 	qp_init_attr->recv_cq = ibqp->recv_cq;
58700540d814SNoa Osherovich 	qp_init_attr->send_cq = ibqp->send_cq;
58710540d814SNoa Osherovich 	qp_init_attr->srq = ibqp->srq;
58720540d814SNoa Osherovich 	qp_attr->cap.max_inline_data = qp->max_inline_data;
5873e126ba97SEli Cohen 
5874e126ba97SEli Cohen 	qp_init_attr->cap	     = qp_attr->cap;
5875e126ba97SEli Cohen 
5876e126ba97SEli Cohen 	qp_init_attr->create_flags = 0;
5877e126ba97SEli Cohen 	if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
5878e126ba97SEli Cohen 		qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK;
5879e126ba97SEli Cohen 
5880051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
5881051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL;
5882051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_SEND)
5883051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND;
5884051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_RECV)
5885051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV;
5886b11a4f9cSHaggai Eran 	if (qp->flags & MLX5_IB_QP_SQPN_QP1)
58873f89b01fSMichael Guralnik 		qp_init_attr->create_flags |= MLX5_IB_QP_CREATE_SQPN_QP1;
5888051f2630SLeon Romanovsky 
5889e126ba97SEli Cohen 	qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ?
5890e126ba97SEli Cohen 		IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR;
5891e126ba97SEli Cohen 
5892e126ba97SEli Cohen out:
5893e126ba97SEli Cohen 	mutex_unlock(&qp->mutex);
5894e126ba97SEli Cohen 	return err;
5895e126ba97SEli Cohen }
5896e126ba97SEli Cohen 
5897e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev,
5898e126ba97SEli Cohen 				   struct ib_udata *udata)
5899e126ba97SEli Cohen {
5900e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibdev);
5901e126ba97SEli Cohen 	struct mlx5_ib_xrcd *xrcd;
5902e126ba97SEli Cohen 	int err;
5903e126ba97SEli Cohen 
5904938fe83cSSaeed Mahameed 	if (!MLX5_CAP_GEN(dev->mdev, xrc))
5905e126ba97SEli Cohen 		return ERR_PTR(-ENOSYS);
5906e126ba97SEli Cohen 
5907e126ba97SEli Cohen 	xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL);
5908e126ba97SEli Cohen 	if (!xrcd)
5909e126ba97SEli Cohen 		return ERR_PTR(-ENOMEM);
5910e126ba97SEli Cohen 
59115aa3771dSYishai Hadas 	err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0);
5912e126ba97SEli Cohen 	if (err) {
5913e126ba97SEli Cohen 		kfree(xrcd);
5914e126ba97SEli Cohen 		return ERR_PTR(-ENOMEM);
5915e126ba97SEli Cohen 	}
5916e126ba97SEli Cohen 
5917e126ba97SEli Cohen 	return &xrcd->ibxrcd;
5918e126ba97SEli Cohen }
5919e126ba97SEli Cohen 
5920c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
5921e126ba97SEli Cohen {
5922e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(xrcd->device);
5923e126ba97SEli Cohen 	u32 xrcdn = to_mxrcd(xrcd)->xrcdn;
5924e126ba97SEli Cohen 	int err;
5925e126ba97SEli Cohen 
59265aa3771dSYishai Hadas 	err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0);
5927b081808aSLeon Romanovsky 	if (err)
5928e126ba97SEli Cohen 		mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn);
5929e126ba97SEli Cohen 
5930e126ba97SEli Cohen 	kfree(xrcd);
5931e126ba97SEli Cohen 	return 0;
5932e126ba97SEli Cohen }
593379b20a6cSYishai Hadas 
5934350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type)
5935350d0e4cSYishai Hadas {
5936350d0e4cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp);
5937350d0e4cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device);
5938350d0e4cSYishai Hadas 	struct ib_event event;
5939350d0e4cSYishai Hadas 
5940350d0e4cSYishai Hadas 	if (rwq->ibwq.event_handler) {
5941350d0e4cSYishai Hadas 		event.device     = rwq->ibwq.device;
5942350d0e4cSYishai Hadas 		event.element.wq = &rwq->ibwq;
5943350d0e4cSYishai Hadas 		switch (type) {
5944350d0e4cSYishai Hadas 		case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
5945350d0e4cSYishai Hadas 			event.event = IB_EVENT_WQ_FATAL;
5946350d0e4cSYishai Hadas 			break;
5947350d0e4cSYishai Hadas 		default:
5948350d0e4cSYishai Hadas 			mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn);
5949350d0e4cSYishai Hadas 			return;
5950350d0e4cSYishai Hadas 		}
5951350d0e4cSYishai Hadas 
5952350d0e4cSYishai Hadas 		rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context);
5953350d0e4cSYishai Hadas 	}
5954350d0e4cSYishai Hadas }
5955350d0e4cSYishai Hadas 
595603404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev)
595703404e8aSMaor Gottlieb {
595803404e8aSMaor Gottlieb 	int err = 0;
595903404e8aSMaor Gottlieb 
596003404e8aSMaor Gottlieb 	mutex_lock(&dev->delay_drop.lock);
596103404e8aSMaor Gottlieb 	if (dev->delay_drop.activate)
596203404e8aSMaor Gottlieb 		goto out;
596303404e8aSMaor Gottlieb 
596403404e8aSMaor Gottlieb 	err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout);
596503404e8aSMaor Gottlieb 	if (err)
596603404e8aSMaor Gottlieb 		goto out;
596703404e8aSMaor Gottlieb 
596803404e8aSMaor Gottlieb 	dev->delay_drop.activate = true;
596903404e8aSMaor Gottlieb out:
597003404e8aSMaor Gottlieb 	mutex_unlock(&dev->delay_drop.lock);
5971fe248c3aSMaor Gottlieb 
5972fe248c3aSMaor Gottlieb 	if (!err)
5973fe248c3aSMaor Gottlieb 		atomic_inc(&dev->delay_drop.rqs_cnt);
597403404e8aSMaor Gottlieb 	return err;
597503404e8aSMaor Gottlieb }
597603404e8aSMaor Gottlieb 
597779b20a6cSYishai Hadas static int  create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd,
597879b20a6cSYishai Hadas 		      struct ib_wq_init_attr *init_attr)
597979b20a6cSYishai Hadas {
598079b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev;
59814be6da1eSNoa Osherovich 	int has_net_offloads;
598279b20a6cSYishai Hadas 	__be64 *rq_pas0;
598379b20a6cSYishai Hadas 	void *in;
598479b20a6cSYishai Hadas 	void *rqc;
598579b20a6cSYishai Hadas 	void *wq;
598679b20a6cSYishai Hadas 	int inlen;
598779b20a6cSYishai Hadas 	int err;
598879b20a6cSYishai Hadas 
598979b20a6cSYishai Hadas 	dev = to_mdev(pd->device);
599079b20a6cSYishai Hadas 
599179b20a6cSYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas;
59921b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
599379b20a6cSYishai Hadas 	if (!in)
599479b20a6cSYishai Hadas 		return -ENOMEM;
599579b20a6cSYishai Hadas 
599634d57585SYishai Hadas 	MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid);
599779b20a6cSYishai Hadas 	rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
599879b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, mem_rq_type,
599979b20a6cSYishai Hadas 		 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE);
600079b20a6cSYishai Hadas 	MLX5_SET(rqc, rqc, user_index, rwq->user_index);
600179b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn);
600279b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, state, MLX5_RQC_STATE_RST);
600379b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, flush_in_error_en, 1);
600479b20a6cSYishai Hadas 	wq = MLX5_ADDR_OF(rqc, rqc, wq);
6005ccc87087SNoa Osherovich 	MLX5_SET(wq, wq, wq_type,
6006ccc87087SNoa Osherovich 		 rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ?
6007ccc87087SNoa Osherovich 		 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC);
6008b1383aa6SNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
6009b1383aa6SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
6010b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "Scatter end padding is not supported\n");
6011b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
6012b1383aa6SNoa Osherovich 			goto out;
6013b1383aa6SNoa Osherovich 		} else {
601479b20a6cSYishai Hadas 			MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
6015b1383aa6SNoa Osherovich 		}
6016b1383aa6SNoa Osherovich 	}
601779b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride);
6018ccc87087SNoa Osherovich 	if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) {
6019c16339b6SMark Zhang 		/*
6020c16339b6SMark Zhang 		 * In Firmware number of strides in each WQE is:
6021c16339b6SMark Zhang 		 *   "512 * 2^single_wqe_log_num_of_strides"
6022c16339b6SMark Zhang 		 * Values 3 to 8 are accepted as 10 to 15, 9 to 18 are
6023c16339b6SMark Zhang 		 * accepted as 0 to 9
6024c16339b6SMark Zhang 		 */
6025c16339b6SMark Zhang 		static const u8 fw_map[] = { 10, 11, 12, 13, 14, 15, 0, 1,
6026c16339b6SMark Zhang 					     2,  3,  4,  5,  6,  7,  8, 9 };
6027ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en);
6028ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, log_wqe_stride_size,
6029ccc87087SNoa Osherovich 			 rwq->single_stride_log_num_of_bytes -
6030ccc87087SNoa Osherovich 			 MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES);
6031c16339b6SMark Zhang 		MLX5_SET(wq, wq, log_wqe_num_of_strides,
6032c16339b6SMark Zhang 			 fw_map[rwq->log_num_strides -
6033c16339b6SMark Zhang 				MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES]);
6034ccc87087SNoa Osherovich 	}
603579b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size);
603679b20a6cSYishai Hadas 	MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn);
603779b20a6cSYishai Hadas 	MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset);
603879b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size);
603979b20a6cSYishai Hadas 	MLX5_SET(wq, wq, wq_signature, rwq->wq_sig);
604079b20a6cSYishai Hadas 	MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma);
60414be6da1eSNoa Osherovich 	has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads);
6042b1f74a84SNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) {
60434be6da1eSNoa Osherovich 		if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) {
6044b1f74a84SNoa Osherovich 			mlx5_ib_dbg(dev, "VLAN offloads are not supported\n");
6045b1f74a84SNoa Osherovich 			err = -EOPNOTSUPP;
6046b1f74a84SNoa Osherovich 			goto out;
6047b1f74a84SNoa Osherovich 		}
6048b1f74a84SNoa Osherovich 	} else {
6049b1f74a84SNoa Osherovich 		MLX5_SET(rqc, rqc, vsd, 1);
6050b1f74a84SNoa Osherovich 	}
60514be6da1eSNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) {
60524be6da1eSNoa Osherovich 		if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) {
60534be6da1eSNoa Osherovich 			mlx5_ib_dbg(dev, "Scatter FCS is not supported\n");
60544be6da1eSNoa Osherovich 			err = -EOPNOTSUPP;
60554be6da1eSNoa Osherovich 			goto out;
60564be6da1eSNoa Osherovich 		}
60574be6da1eSNoa Osherovich 		MLX5_SET(rqc, rqc, scatter_fcs, 1);
60584be6da1eSNoa Osherovich 	}
605903404e8aSMaor Gottlieb 	if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
606003404e8aSMaor Gottlieb 		if (!(dev->ib_dev.attrs.raw_packet_caps &
606103404e8aSMaor Gottlieb 		      IB_RAW_PACKET_CAP_DELAY_DROP)) {
606203404e8aSMaor Gottlieb 			mlx5_ib_dbg(dev, "Delay drop is not supported\n");
606303404e8aSMaor Gottlieb 			err = -EOPNOTSUPP;
606403404e8aSMaor Gottlieb 			goto out;
606503404e8aSMaor Gottlieb 		}
606603404e8aSMaor Gottlieb 		MLX5_SET(rqc, rqc, delay_drop_en, 1);
606703404e8aSMaor Gottlieb 	}
606879b20a6cSYishai Hadas 	rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
606979b20a6cSYishai Hadas 	mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0);
6070350d0e4cSYishai Hadas 	err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp);
607103404e8aSMaor Gottlieb 	if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
607203404e8aSMaor Gottlieb 		err = set_delay_drop(dev);
607303404e8aSMaor Gottlieb 		if (err) {
607403404e8aSMaor Gottlieb 			mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n",
607503404e8aSMaor Gottlieb 				     err);
607603404e8aSMaor Gottlieb 			mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
607703404e8aSMaor Gottlieb 		} else {
607803404e8aSMaor Gottlieb 			rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP;
607903404e8aSMaor Gottlieb 		}
608003404e8aSMaor Gottlieb 	}
6081b1f74a84SNoa Osherovich out:
608279b20a6cSYishai Hadas 	kvfree(in);
608379b20a6cSYishai Hadas 	return err;
608479b20a6cSYishai Hadas }
608579b20a6cSYishai Hadas 
608679b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev,
608779b20a6cSYishai Hadas 			    struct ib_wq_init_attr *wq_init_attr,
608879b20a6cSYishai Hadas 			    struct mlx5_ib_create_wq *ucmd,
608979b20a6cSYishai Hadas 			    struct mlx5_ib_rwq *rwq)
609079b20a6cSYishai Hadas {
609179b20a6cSYishai Hadas 	/* Sanity check RQ size before proceeding */
609279b20a6cSYishai Hadas 	if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz)))
609379b20a6cSYishai Hadas 		return -EINVAL;
609479b20a6cSYishai Hadas 
609579b20a6cSYishai Hadas 	if (!ucmd->rq_wqe_count)
609679b20a6cSYishai Hadas 		return -EINVAL;
609779b20a6cSYishai Hadas 
609879b20a6cSYishai Hadas 	rwq->wqe_count = ucmd->rq_wqe_count;
609979b20a6cSYishai Hadas 	rwq->wqe_shift = ucmd->rq_wqe_shift;
61000dfe4522SLeon Romanovsky 	if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size))
61010dfe4522SLeon Romanovsky 		return -EINVAL;
61020dfe4522SLeon Romanovsky 
610379b20a6cSYishai Hadas 	rwq->log_rq_stride = rwq->wqe_shift;
610479b20a6cSYishai Hadas 	rwq->log_rq_size = ilog2(rwq->wqe_count);
610579b20a6cSYishai Hadas 	return 0;
610679b20a6cSYishai Hadas }
610779b20a6cSYishai Hadas 
6108c16339b6SMark Zhang static bool log_of_strides_valid(struct mlx5_ib_dev *dev, u32 log_num_strides)
6109c16339b6SMark Zhang {
6110c16339b6SMark Zhang 	if ((log_num_strides > MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) ||
6111c16339b6SMark Zhang 	    (log_num_strides < MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES))
6112c16339b6SMark Zhang 		return false;
6113c16339b6SMark Zhang 
6114c16339b6SMark Zhang 	if (!MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) &&
6115c16339b6SMark Zhang 	    (log_num_strides < MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES))
6116c16339b6SMark Zhang 		return false;
6117c16339b6SMark Zhang 
6118c16339b6SMark Zhang 	return true;
6119c16339b6SMark Zhang }
6120c16339b6SMark Zhang 
612179b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd,
612279b20a6cSYishai Hadas 			   struct ib_wq_init_attr *init_attr,
612379b20a6cSYishai Hadas 			   struct ib_udata *udata,
612479b20a6cSYishai Hadas 			   struct mlx5_ib_rwq *rwq)
612579b20a6cSYishai Hadas {
612679b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(pd->device);
612779b20a6cSYishai Hadas 	struct mlx5_ib_create_wq ucmd = {};
612879b20a6cSYishai Hadas 	int err;
612979b20a6cSYishai Hadas 	size_t required_cmd_sz;
613079b20a6cSYishai Hadas 
6131ccc87087SNoa Osherovich 	required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes)
6132ccc87087SNoa Osherovich 		+ sizeof(ucmd.single_stride_log_num_of_bytes);
613379b20a6cSYishai Hadas 	if (udata->inlen < required_cmd_sz) {
613479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "invalid inlen\n");
613579b20a6cSYishai Hadas 		return -EINVAL;
613679b20a6cSYishai Hadas 	}
613779b20a6cSYishai Hadas 
613879b20a6cSYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
613979b20a6cSYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
614079b20a6cSYishai Hadas 				 udata->inlen - sizeof(ucmd))) {
614179b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "inlen is not supported\n");
614279b20a6cSYishai Hadas 		return -EOPNOTSUPP;
614379b20a6cSYishai Hadas 	}
614479b20a6cSYishai Hadas 
614579b20a6cSYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) {
614679b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
614779b20a6cSYishai Hadas 		return -EFAULT;
614879b20a6cSYishai Hadas 	}
614979b20a6cSYishai Hadas 
6150ccc87087SNoa Osherovich 	if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) {
615179b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "invalid comp mask\n");
615279b20a6cSYishai Hadas 		return -EOPNOTSUPP;
6153ccc87087SNoa Osherovich 	} else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) {
6154ccc87087SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) {
6155ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Striding RQ is not supported\n");
615679b20a6cSYishai Hadas 			return -EOPNOTSUPP;
615779b20a6cSYishai Hadas 		}
6158ccc87087SNoa Osherovich 		if ((ucmd.single_stride_log_num_of_bytes <
6159ccc87087SNoa Osherovich 		    MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) ||
6160ccc87087SNoa Osherovich 		    (ucmd.single_stride_log_num_of_bytes >
6161ccc87087SNoa Osherovich 		     MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) {
6162ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n",
6163ccc87087SNoa Osherovich 				    ucmd.single_stride_log_num_of_bytes,
6164ccc87087SNoa Osherovich 				    MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES,
6165ccc87087SNoa Osherovich 				    MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES);
6166ccc87087SNoa Osherovich 			return -EINVAL;
6167ccc87087SNoa Osherovich 		}
6168c16339b6SMark Zhang 		if (!log_of_strides_valid(dev,
6169c16339b6SMark Zhang 					  ucmd.single_wqe_log_num_of_strides)) {
6170c16339b6SMark Zhang 			mlx5_ib_dbg(
6171c16339b6SMark Zhang 				dev,
6172c16339b6SMark Zhang 				"Invalid log num strides (%u. Range is %u - %u)\n",
6173ccc87087SNoa Osherovich 				ucmd.single_wqe_log_num_of_strides,
6174c16339b6SMark Zhang 				MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) ?
6175c16339b6SMark Zhang 					MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES :
6176ccc87087SNoa Osherovich 					MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES,
6177ccc87087SNoa Osherovich 				MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES);
6178ccc87087SNoa Osherovich 			return -EINVAL;
6179ccc87087SNoa Osherovich 		}
6180ccc87087SNoa Osherovich 		rwq->single_stride_log_num_of_bytes =
6181ccc87087SNoa Osherovich 			ucmd.single_stride_log_num_of_bytes;
6182ccc87087SNoa Osherovich 		rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides;
6183ccc87087SNoa Osherovich 		rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en;
6184ccc87087SNoa Osherovich 		rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ;
6185ccc87087SNoa Osherovich 	}
618679b20a6cSYishai Hadas 
618779b20a6cSYishai Hadas 	err = set_user_rq_size(dev, init_attr, &ucmd, rwq);
618879b20a6cSYishai Hadas 	if (err) {
618979b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "err %d\n", err);
619079b20a6cSYishai Hadas 		return err;
619179b20a6cSYishai Hadas 	}
619279b20a6cSYishai Hadas 
6193b0ea0fa5SJason Gunthorpe 	err = create_user_rq(dev, pd, udata, rwq, &ucmd);
619479b20a6cSYishai Hadas 	if (err) {
619579b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "err %d\n", err);
619679b20a6cSYishai Hadas 		return err;
619779b20a6cSYishai Hadas 	}
619879b20a6cSYishai Hadas 
619979b20a6cSYishai Hadas 	rwq->user_index = ucmd.user_index;
620079b20a6cSYishai Hadas 	return 0;
620179b20a6cSYishai Hadas }
620279b20a6cSYishai Hadas 
620379b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd,
620479b20a6cSYishai Hadas 				struct ib_wq_init_attr *init_attr,
620579b20a6cSYishai Hadas 				struct ib_udata *udata)
620679b20a6cSYishai Hadas {
620779b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev;
620879b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq;
620979b20a6cSYishai Hadas 	struct mlx5_ib_create_wq_resp resp = {};
621079b20a6cSYishai Hadas 	size_t min_resp_len;
621179b20a6cSYishai Hadas 	int err;
621279b20a6cSYishai Hadas 
621379b20a6cSYishai Hadas 	if (!udata)
621479b20a6cSYishai Hadas 		return ERR_PTR(-ENOSYS);
621579b20a6cSYishai Hadas 
621679b20a6cSYishai Hadas 	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
621779b20a6cSYishai Hadas 	if (udata->outlen && udata->outlen < min_resp_len)
621879b20a6cSYishai Hadas 		return ERR_PTR(-EINVAL);
621979b20a6cSYishai Hadas 
622079b20a6cSYishai Hadas 	dev = to_mdev(pd->device);
622179b20a6cSYishai Hadas 	switch (init_attr->wq_type) {
622279b20a6cSYishai Hadas 	case IB_WQT_RQ:
622379b20a6cSYishai Hadas 		rwq = kzalloc(sizeof(*rwq), GFP_KERNEL);
622479b20a6cSYishai Hadas 		if (!rwq)
622579b20a6cSYishai Hadas 			return ERR_PTR(-ENOMEM);
622679b20a6cSYishai Hadas 		err = prepare_user_rq(pd, init_attr, udata, rwq);
622779b20a6cSYishai Hadas 		if (err)
622879b20a6cSYishai Hadas 			goto err;
622979b20a6cSYishai Hadas 		err = create_rq(rwq, pd, init_attr);
623079b20a6cSYishai Hadas 		if (err)
623179b20a6cSYishai Hadas 			goto err_user_rq;
623279b20a6cSYishai Hadas 		break;
623379b20a6cSYishai Hadas 	default:
623479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "unsupported wq type %d\n",
623579b20a6cSYishai Hadas 			    init_attr->wq_type);
623679b20a6cSYishai Hadas 		return ERR_PTR(-EINVAL);
623779b20a6cSYishai Hadas 	}
623879b20a6cSYishai Hadas 
6239350d0e4cSYishai Hadas 	rwq->ibwq.wq_num = rwq->core_qp.qpn;
624079b20a6cSYishai Hadas 	rwq->ibwq.state = IB_WQS_RESET;
624179b20a6cSYishai Hadas 	if (udata->outlen) {
624279b20a6cSYishai Hadas 		resp.response_length = offsetof(typeof(resp), response_length) +
624379b20a6cSYishai Hadas 				sizeof(resp.response_length);
624479b20a6cSYishai Hadas 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
624579b20a6cSYishai Hadas 		if (err)
624679b20a6cSYishai Hadas 			goto err_copy;
624779b20a6cSYishai Hadas 	}
624879b20a6cSYishai Hadas 
6249350d0e4cSYishai Hadas 	rwq->core_qp.event = mlx5_ib_wq_event;
6250350d0e4cSYishai Hadas 	rwq->ibwq.event_handler = init_attr->event_handler;
625179b20a6cSYishai Hadas 	return &rwq->ibwq;
625279b20a6cSYishai Hadas 
625379b20a6cSYishai Hadas err_copy:
6254350d0e4cSYishai Hadas 	mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
625579b20a6cSYishai Hadas err_user_rq:
6256bdeacabdSShamir Rabinovitch 	destroy_user_rq(dev, pd, rwq, udata);
625779b20a6cSYishai Hadas err:
625879b20a6cSYishai Hadas 	kfree(rwq);
625979b20a6cSYishai Hadas 	return ERR_PTR(err);
626079b20a6cSYishai Hadas }
626179b20a6cSYishai Hadas 
6262a49b1dc7SLeon Romanovsky void mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata)
626379b20a6cSYishai Hadas {
626479b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(wq->device);
626579b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mrwq(wq);
626679b20a6cSYishai Hadas 
6267350d0e4cSYishai Hadas 	mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
6268bdeacabdSShamir Rabinovitch 	destroy_user_rq(dev, wq->pd, rwq, udata);
626979b20a6cSYishai Hadas 	kfree(rwq);
627079b20a6cSYishai Hadas }
627179b20a6cSYishai Hadas 
6272c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device,
6273c5f90929SYishai Hadas 						      struct ib_rwq_ind_table_init_attr *init_attr,
6274c5f90929SYishai Hadas 						      struct ib_udata *udata)
6275c5f90929SYishai Hadas {
6276c5f90929SYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(device);
6277c5f90929SYishai Hadas 	struct mlx5_ib_rwq_ind_table *rwq_ind_tbl;
6278c5f90929SYishai Hadas 	int sz = 1 << init_attr->log_ind_tbl_size;
6279c5f90929SYishai Hadas 	struct mlx5_ib_create_rwq_ind_tbl_resp resp = {};
6280c5f90929SYishai Hadas 	size_t min_resp_len;
6281c5f90929SYishai Hadas 	int inlen;
6282c5f90929SYishai Hadas 	int err;
6283c5f90929SYishai Hadas 	int i;
6284c5f90929SYishai Hadas 	u32 *in;
6285c5f90929SYishai Hadas 	void *rqtc;
6286c5f90929SYishai Hadas 
6287c5f90929SYishai Hadas 	if (udata->inlen > 0 &&
6288c5f90929SYishai Hadas 	    !ib_is_udata_cleared(udata, 0,
6289c5f90929SYishai Hadas 				 udata->inlen))
6290c5f90929SYishai Hadas 		return ERR_PTR(-EOPNOTSUPP);
6291c5f90929SYishai Hadas 
6292efd7f400SMaor Gottlieb 	if (init_attr->log_ind_tbl_size >
6293efd7f400SMaor Gottlieb 	    MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
6294efd7f400SMaor Gottlieb 		mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n",
6295efd7f400SMaor Gottlieb 			    init_attr->log_ind_tbl_size,
6296efd7f400SMaor Gottlieb 			    MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
6297efd7f400SMaor Gottlieb 		return ERR_PTR(-EINVAL);
6298efd7f400SMaor Gottlieb 	}
6299efd7f400SMaor Gottlieb 
6300c5f90929SYishai Hadas 	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
6301c5f90929SYishai Hadas 	if (udata->outlen && udata->outlen < min_resp_len)
6302c5f90929SYishai Hadas 		return ERR_PTR(-EINVAL);
6303c5f90929SYishai Hadas 
6304c5f90929SYishai Hadas 	rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL);
6305c5f90929SYishai Hadas 	if (!rwq_ind_tbl)
6306c5f90929SYishai Hadas 		return ERR_PTR(-ENOMEM);
6307c5f90929SYishai Hadas 
6308c5f90929SYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
63091b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
6310c5f90929SYishai Hadas 	if (!in) {
6311c5f90929SYishai Hadas 		err = -ENOMEM;
6312c5f90929SYishai Hadas 		goto err;
6313c5f90929SYishai Hadas 	}
6314c5f90929SYishai Hadas 
6315c5f90929SYishai Hadas 	rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
6316c5f90929SYishai Hadas 
6317c5f90929SYishai Hadas 	MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
6318c5f90929SYishai Hadas 	MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
6319c5f90929SYishai Hadas 
6320c5f90929SYishai Hadas 	for (i = 0; i < sz; i++)
6321c5f90929SYishai Hadas 		MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num);
6322c5f90929SYishai Hadas 
63235deba86eSYishai Hadas 	rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid;
63245deba86eSYishai Hadas 	MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid);
63255deba86eSYishai Hadas 
6326c5f90929SYishai Hadas 	err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn);
6327c5f90929SYishai Hadas 	kvfree(in);
6328c5f90929SYishai Hadas 
6329c5f90929SYishai Hadas 	if (err)
6330c5f90929SYishai Hadas 		goto err;
6331c5f90929SYishai Hadas 
6332c5f90929SYishai Hadas 	rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn;
6333c5f90929SYishai Hadas 	if (udata->outlen) {
6334c5f90929SYishai Hadas 		resp.response_length = offsetof(typeof(resp), response_length) +
6335c5f90929SYishai Hadas 					sizeof(resp.response_length);
6336c5f90929SYishai Hadas 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
6337c5f90929SYishai Hadas 		if (err)
6338c5f90929SYishai Hadas 			goto err_copy;
6339c5f90929SYishai Hadas 	}
6340c5f90929SYishai Hadas 
6341c5f90929SYishai Hadas 	return &rwq_ind_tbl->ib_rwq_ind_tbl;
6342c5f90929SYishai Hadas 
6343c5f90929SYishai Hadas err_copy:
63445deba86eSYishai Hadas 	mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid);
6345c5f90929SYishai Hadas err:
6346c5f90929SYishai Hadas 	kfree(rwq_ind_tbl);
6347c5f90929SYishai Hadas 	return ERR_PTR(err);
6348c5f90929SYishai Hadas }
6349c5f90929SYishai Hadas 
6350c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl)
6351c5f90929SYishai Hadas {
6352c5f90929SYishai Hadas 	struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl);
6353c5f90929SYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device);
6354c5f90929SYishai Hadas 
63555deba86eSYishai Hadas 	mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid);
6356c5f90929SYishai Hadas 
6357c5f90929SYishai Hadas 	kfree(rwq_ind_tbl);
6358c5f90929SYishai Hadas 	return 0;
6359c5f90929SYishai Hadas }
6360c5f90929SYishai Hadas 
636179b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
636279b20a6cSYishai Hadas 		      u32 wq_attr_mask, struct ib_udata *udata)
636379b20a6cSYishai Hadas {
636479b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(wq->device);
636579b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mrwq(wq);
636679b20a6cSYishai Hadas 	struct mlx5_ib_modify_wq ucmd = {};
636779b20a6cSYishai Hadas 	size_t required_cmd_sz;
636879b20a6cSYishai Hadas 	int curr_wq_state;
636979b20a6cSYishai Hadas 	int wq_state;
637079b20a6cSYishai Hadas 	int inlen;
637179b20a6cSYishai Hadas 	int err;
637279b20a6cSYishai Hadas 	void *rqc;
637379b20a6cSYishai Hadas 	void *in;
637479b20a6cSYishai Hadas 
637579b20a6cSYishai Hadas 	required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved);
637679b20a6cSYishai Hadas 	if (udata->inlen < required_cmd_sz)
637779b20a6cSYishai Hadas 		return -EINVAL;
637879b20a6cSYishai Hadas 
637979b20a6cSYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
638079b20a6cSYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
638179b20a6cSYishai Hadas 				 udata->inlen - sizeof(ucmd)))
638279b20a6cSYishai Hadas 		return -EOPNOTSUPP;
638379b20a6cSYishai Hadas 
638479b20a6cSYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen)))
638579b20a6cSYishai Hadas 		return -EFAULT;
638679b20a6cSYishai Hadas 
638779b20a6cSYishai Hadas 	if (ucmd.comp_mask || ucmd.reserved)
638879b20a6cSYishai Hadas 		return -EOPNOTSUPP;
638979b20a6cSYishai Hadas 
639079b20a6cSYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(modify_rq_in);
63911b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
639279b20a6cSYishai Hadas 	if (!in)
639379b20a6cSYishai Hadas 		return -ENOMEM;
639479b20a6cSYishai Hadas 
639579b20a6cSYishai Hadas 	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
639679b20a6cSYishai Hadas 
639779b20a6cSYishai Hadas 	curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ?
639879b20a6cSYishai Hadas 		wq_attr->curr_wq_state : wq->state;
639979b20a6cSYishai Hadas 	wq_state = (wq_attr_mask & IB_WQ_STATE) ?
640079b20a6cSYishai Hadas 		wq_attr->wq_state : curr_wq_state;
640179b20a6cSYishai Hadas 	if (curr_wq_state == IB_WQS_ERR)
640279b20a6cSYishai Hadas 		curr_wq_state = MLX5_RQC_STATE_ERR;
640379b20a6cSYishai Hadas 	if (wq_state == IB_WQS_ERR)
640479b20a6cSYishai Hadas 		wq_state = MLX5_RQC_STATE_ERR;
640579b20a6cSYishai Hadas 	MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state);
640634d57585SYishai Hadas 	MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid);
640779b20a6cSYishai Hadas 	MLX5_SET(rqc, rqc, state, wq_state);
640879b20a6cSYishai Hadas 
6409b1f74a84SNoa Osherovich 	if (wq_attr_mask & IB_WQ_FLAGS) {
6410b1f74a84SNoa Osherovich 		if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) {
6411b1f74a84SNoa Osherovich 			if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
6412b1f74a84SNoa Osherovich 			      MLX5_CAP_ETH(dev->mdev, vlan_cap))) {
6413b1f74a84SNoa Osherovich 				mlx5_ib_dbg(dev, "VLAN offloads are not "
6414b1f74a84SNoa Osherovich 					    "supported\n");
6415b1f74a84SNoa Osherovich 				err = -EOPNOTSUPP;
6416b1f74a84SNoa Osherovich 				goto out;
6417b1f74a84SNoa Osherovich 			}
6418b1f74a84SNoa Osherovich 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
6419b1f74a84SNoa Osherovich 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD);
6420b1f74a84SNoa Osherovich 			MLX5_SET(rqc, rqc, vsd,
6421b1f74a84SNoa Osherovich 				 (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1);
6422b1f74a84SNoa Osherovich 		}
6423b1383aa6SNoa Osherovich 
6424b1383aa6SNoa Osherovich 		if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
6425b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n");
6426b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
6427b1383aa6SNoa Osherovich 			goto out;
6428b1383aa6SNoa Osherovich 		}
6429b1f74a84SNoa Osherovich 	}
6430b1f74a84SNoa Osherovich 
643123a6964eSMajd Dibbiny 	if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) {
64323e1f000fSParav Pandit 		u16 set_id;
64333e1f000fSParav Pandit 
64343e1f000fSParav Pandit 		set_id = mlx5_ib_get_counters_id(dev, 0);
643523a6964eSMajd Dibbiny 		if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
643623a6964eSMajd Dibbiny 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
643723a6964eSMajd Dibbiny 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID);
64383e1f000fSParav Pandit 			MLX5_SET(rqc, rqc, counter_set_id, set_id);
643923a6964eSMajd Dibbiny 		} else
64405a738b5dSJason Gunthorpe 			dev_info_once(
64415a738b5dSJason Gunthorpe 				&dev->ib_dev.dev,
64425a738b5dSJason Gunthorpe 				"Receive WQ counters are not supported on current FW\n");
644323a6964eSMajd Dibbiny 	}
644423a6964eSMajd Dibbiny 
6445350d0e4cSYishai Hadas 	err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen);
644679b20a6cSYishai Hadas 	if (!err)
644779b20a6cSYishai Hadas 		rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state;
644879b20a6cSYishai Hadas 
6449b1f74a84SNoa Osherovich out:
6450b1f74a84SNoa Osherovich 	kvfree(in);
645179b20a6cSYishai Hadas 	return err;
645279b20a6cSYishai Hadas }
6453d0e84c0aSYishai Hadas 
6454d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe {
6455d0e84c0aSYishai Hadas 	struct ib_cqe cqe;
6456d0e84c0aSYishai Hadas 	struct completion done;
6457d0e84c0aSYishai Hadas };
6458d0e84c0aSYishai Hadas 
6459d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
6460d0e84c0aSYishai Hadas {
6461d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe,
6462d0e84c0aSYishai Hadas 						     struct mlx5_ib_drain_cqe,
6463d0e84c0aSYishai Hadas 						     cqe);
6464d0e84c0aSYishai Hadas 
6465d0e84c0aSYishai Hadas 	complete(&cqe->done);
6466d0e84c0aSYishai Hadas }
6467d0e84c0aSYishai Hadas 
6468d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */
6469d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq,
6470d0e84c0aSYishai Hadas 				    struct mlx5_ib_drain_cqe *sdrain,
6471d0e84c0aSYishai Hadas 				    struct mlx5_ib_dev *dev)
6472d0e84c0aSYishai Hadas {
6473d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6474d0e84c0aSYishai Hadas 
6475d0e84c0aSYishai Hadas 	if (cq->poll_ctx == IB_POLL_DIRECT) {
6476d0e84c0aSYishai Hadas 		while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0)
6477d0e84c0aSYishai Hadas 			ib_process_cq_direct(cq, -1);
6478d0e84c0aSYishai Hadas 		return;
6479d0e84c0aSYishai Hadas 	}
6480d0e84c0aSYishai Hadas 
6481d0e84c0aSYishai Hadas 	if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6482d0e84c0aSYishai Hadas 		struct mlx5_ib_cq *mcq = to_mcq(cq);
6483d0e84c0aSYishai Hadas 		bool triggered = false;
6484d0e84c0aSYishai Hadas 		unsigned long flags;
6485d0e84c0aSYishai Hadas 
6486d0e84c0aSYishai Hadas 		spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
6487d0e84c0aSYishai Hadas 		/* Make sure that the CQ handler won't run if wasn't run yet */
6488d0e84c0aSYishai Hadas 		if (!mcq->mcq.reset_notify_added)
6489d0e84c0aSYishai Hadas 			mcq->mcq.reset_notify_added = 1;
6490d0e84c0aSYishai Hadas 		else
6491d0e84c0aSYishai Hadas 			triggered = true;
6492d0e84c0aSYishai Hadas 		spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
6493d0e84c0aSYishai Hadas 
6494d0e84c0aSYishai Hadas 		if (triggered) {
6495d0e84c0aSYishai Hadas 			/* Wait for any scheduled/running task to be ended */
6496d0e84c0aSYishai Hadas 			switch (cq->poll_ctx) {
6497d0e84c0aSYishai Hadas 			case IB_POLL_SOFTIRQ:
6498d0e84c0aSYishai Hadas 				irq_poll_disable(&cq->iop);
6499d0e84c0aSYishai Hadas 				irq_poll_enable(&cq->iop);
6500d0e84c0aSYishai Hadas 				break;
6501d0e84c0aSYishai Hadas 			case IB_POLL_WORKQUEUE:
6502d0e84c0aSYishai Hadas 				cancel_work_sync(&cq->work);
6503d0e84c0aSYishai Hadas 				break;
6504d0e84c0aSYishai Hadas 			default:
6505d0e84c0aSYishai Hadas 				WARN_ON_ONCE(1);
6506d0e84c0aSYishai Hadas 			}
6507d0e84c0aSYishai Hadas 		}
6508d0e84c0aSYishai Hadas 
6509d0e84c0aSYishai Hadas 		/* Run the CQ handler - this makes sure that the drain WR will
6510d0e84c0aSYishai Hadas 		 * be processed if wasn't processed yet.
6511d0e84c0aSYishai Hadas 		 */
65124e0e2ea1SYishai Hadas 		mcq->mcq.comp(&mcq->mcq, NULL);
6513d0e84c0aSYishai Hadas 	}
6514d0e84c0aSYishai Hadas 
6515d0e84c0aSYishai Hadas 	wait_for_completion(&sdrain->done);
6516d0e84c0aSYishai Hadas }
6517d0e84c0aSYishai Hadas 
6518d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp)
6519d0e84c0aSYishai Hadas {
6520d0e84c0aSYishai Hadas 	struct ib_cq *cq = qp->send_cq;
6521d0e84c0aSYishai Hadas 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
6522d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe sdrain;
6523d34ac5cdSBart Van Assche 	const struct ib_send_wr *bad_swr;
6524d0e84c0aSYishai Hadas 	struct ib_rdma_wr swr = {
6525d0e84c0aSYishai Hadas 		.wr = {
6526d0e84c0aSYishai Hadas 			.next = NULL,
6527d0e84c0aSYishai Hadas 			{ .wr_cqe	= &sdrain.cqe, },
6528d0e84c0aSYishai Hadas 			.opcode	= IB_WR_RDMA_WRITE,
6529d0e84c0aSYishai Hadas 		},
6530d0e84c0aSYishai Hadas 	};
6531d0e84c0aSYishai Hadas 	int ret;
6532d0e84c0aSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6533d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6534d0e84c0aSYishai Hadas 
6535d0e84c0aSYishai Hadas 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
6536d0e84c0aSYishai Hadas 	if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6537d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
6538d0e84c0aSYishai Hadas 		return;
6539d0e84c0aSYishai Hadas 	}
6540d0e84c0aSYishai Hadas 
6541d0e84c0aSYishai Hadas 	sdrain.cqe.done = mlx5_ib_drain_qp_done;
6542d0e84c0aSYishai Hadas 	init_completion(&sdrain.done);
6543d0e84c0aSYishai Hadas 
6544d0e84c0aSYishai Hadas 	ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true);
6545d0e84c0aSYishai Hadas 	if (ret) {
6546d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
6547d0e84c0aSYishai Hadas 		return;
6548d0e84c0aSYishai Hadas 	}
6549d0e84c0aSYishai Hadas 
6550d0e84c0aSYishai Hadas 	handle_drain_completion(cq, &sdrain, dev);
6551d0e84c0aSYishai Hadas }
6552d0e84c0aSYishai Hadas 
6553d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp)
6554d0e84c0aSYishai Hadas {
6555d0e84c0aSYishai Hadas 	struct ib_cq *cq = qp->recv_cq;
6556d0e84c0aSYishai Hadas 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
6557d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe rdrain;
6558d34ac5cdSBart Van Assche 	struct ib_recv_wr rwr = {};
6559d34ac5cdSBart Van Assche 	const struct ib_recv_wr *bad_rwr;
6560d0e84c0aSYishai Hadas 	int ret;
6561d0e84c0aSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6562d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6563d0e84c0aSYishai Hadas 
6564d0e84c0aSYishai Hadas 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
6565d0e84c0aSYishai Hadas 	if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6566d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
6567d0e84c0aSYishai Hadas 		return;
6568d0e84c0aSYishai Hadas 	}
6569d0e84c0aSYishai Hadas 
6570d0e84c0aSYishai Hadas 	rwr.wr_cqe = &rdrain.cqe;
6571d0e84c0aSYishai Hadas 	rdrain.cqe.done = mlx5_ib_drain_qp_done;
6572d0e84c0aSYishai Hadas 	init_completion(&rdrain.done);
6573d0e84c0aSYishai Hadas 
6574d0e84c0aSYishai Hadas 	ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true);
6575d0e84c0aSYishai Hadas 	if (ret) {
6576d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
6577d0e84c0aSYishai Hadas 		return;
6578d0e84c0aSYishai Hadas 	}
6579d0e84c0aSYishai Hadas 
6580d0e84c0aSYishai Hadas 	handle_drain_completion(cq, &rdrain, dev);
6581d0e84c0aSYishai Hadas }
6582d14133ddSMark Zhang 
6583d14133ddSMark Zhang /**
6584d14133ddSMark Zhang  * Bind a qp to a counter. If @counter is NULL then bind the qp to
6585d14133ddSMark Zhang  * the default counter
6586d14133ddSMark Zhang  */
6587d14133ddSMark Zhang int mlx5_ib_qp_set_counter(struct ib_qp *qp, struct rdma_counter *counter)
6588d14133ddSMark Zhang {
658910189e8eSMark Zhang 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6590d14133ddSMark Zhang 	struct mlx5_ib_qp *mqp = to_mqp(qp);
6591d14133ddSMark Zhang 	int err = 0;
6592d14133ddSMark Zhang 
6593d14133ddSMark Zhang 	mutex_lock(&mqp->mutex);
6594d14133ddSMark Zhang 	if (mqp->state == IB_QPS_RESET) {
6595d14133ddSMark Zhang 		qp->counter = counter;
6596d14133ddSMark Zhang 		goto out;
6597d14133ddSMark Zhang 	}
6598d14133ddSMark Zhang 
659910189e8eSMark Zhang 	if (!MLX5_CAP_GEN(dev->mdev, rts2rts_qp_counters_set_id)) {
660010189e8eSMark Zhang 		err = -EOPNOTSUPP;
660110189e8eSMark Zhang 		goto out;
660210189e8eSMark Zhang 	}
660310189e8eSMark Zhang 
6604d14133ddSMark Zhang 	if (mqp->state == IB_QPS_RTS) {
6605d14133ddSMark Zhang 		err = __mlx5_ib_qp_set_counter(qp, counter);
6606d14133ddSMark Zhang 		if (!err)
6607d14133ddSMark Zhang 			qp->counter = counter;
6608d14133ddSMark Zhang 
6609d14133ddSMark Zhang 		goto out;
6610d14133ddSMark Zhang 	}
6611d14133ddSMark Zhang 
6612d14133ddSMark Zhang 	mqp->counter_pending = 1;
6613d14133ddSMark Zhang 	qp->counter = counter;
6614d14133ddSMark Zhang 
6615d14133ddSMark Zhang out:
6616d14133ddSMark Zhang 	mutex_unlock(&mqp->mutex);
6617d14133ddSMark Zhang 	return err;
6618d14133ddSMark Zhang }
6619