1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111e126ba97SEli Cohen static void *get_wqe(struct mlx5_ib_qp *qp, int offset) 112e126ba97SEli Cohen { 113e126ba97SEli Cohen return mlx5_buf_offset(&qp->buf, offset); 114e126ba97SEli Cohen } 115e126ba97SEli Cohen 116e126ba97SEli Cohen static void *get_recv_wqe(struct mlx5_ib_qp *qp, int n) 117e126ba97SEli Cohen { 118e126ba97SEli Cohen return get_wqe(qp, qp->rq.offset + (n << qp->rq.wqe_shift)); 119e126ba97SEli Cohen } 120e126ba97SEli Cohen 121e126ba97SEli Cohen void *mlx5_get_send_wqe(struct mlx5_ib_qp *qp, int n) 122e126ba97SEli Cohen { 123e126ba97SEli Cohen return get_wqe(qp, qp->sq.offset + (n << MLX5_IB_SQ_STRIDE)); 124e126ba97SEli Cohen } 125e126ba97SEli Cohen 126c1395a2aSHaggai Eran /** 127c1395a2aSHaggai Eran * mlx5_ib_read_user_wqe() - Copy a user-space WQE to kernel space. 128c1395a2aSHaggai Eran * 129c1395a2aSHaggai Eran * @qp: QP to copy from. 130c1395a2aSHaggai Eran * @send: copy from the send queue when non-zero, use the receive queue 131c1395a2aSHaggai Eran * otherwise. 132c1395a2aSHaggai Eran * @wqe_index: index to start copying from. For send work queues, the 133c1395a2aSHaggai Eran * wqe_index is in units of MLX5_SEND_WQE_BB. 134c1395a2aSHaggai Eran * For receive work queue, it is the number of work queue 135c1395a2aSHaggai Eran * element in the queue. 136c1395a2aSHaggai Eran * @buffer: destination buffer. 137c1395a2aSHaggai Eran * @length: maximum number of bytes to copy. 138c1395a2aSHaggai Eran * 139c1395a2aSHaggai Eran * Copies at least a single WQE, but may copy more data. 140c1395a2aSHaggai Eran * 141c1395a2aSHaggai Eran * Return: the number of bytes copied, or an error code. 142c1395a2aSHaggai Eran */ 143c1395a2aSHaggai Eran int mlx5_ib_read_user_wqe(struct mlx5_ib_qp *qp, int send, int wqe_index, 14419098df2Smajd@mellanox.com void *buffer, u32 length, 14519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 146c1395a2aSHaggai Eran { 147c1395a2aSHaggai Eran struct ib_device *ibdev = qp->ibqp.device; 148c1395a2aSHaggai Eran struct mlx5_ib_dev *dev = to_mdev(ibdev); 149c1395a2aSHaggai Eran struct mlx5_ib_wq *wq = send ? &qp->sq : &qp->rq; 150c1395a2aSHaggai Eran size_t offset; 151c1395a2aSHaggai Eran size_t wq_end; 15219098df2Smajd@mellanox.com struct ib_umem *umem = base->ubuffer.umem; 153c1395a2aSHaggai Eran u32 first_copy_length; 154c1395a2aSHaggai Eran int wqe_length; 155c1395a2aSHaggai Eran int ret; 156c1395a2aSHaggai Eran 157c1395a2aSHaggai Eran if (wq->wqe_cnt == 0) { 158c1395a2aSHaggai Eran mlx5_ib_dbg(dev, "mlx5_ib_read_user_wqe for a QP with wqe_cnt == 0. qp_type: 0x%x\n", 159c1395a2aSHaggai Eran qp->ibqp.qp_type); 160c1395a2aSHaggai Eran return -EINVAL; 161c1395a2aSHaggai Eran } 162c1395a2aSHaggai Eran 163c1395a2aSHaggai Eran offset = wq->offset + ((wqe_index % wq->wqe_cnt) << wq->wqe_shift); 164c1395a2aSHaggai Eran wq_end = wq->offset + (wq->wqe_cnt << wq->wqe_shift); 165c1395a2aSHaggai Eran 166c1395a2aSHaggai Eran if (send && length < sizeof(struct mlx5_wqe_ctrl_seg)) 167c1395a2aSHaggai Eran return -EINVAL; 168c1395a2aSHaggai Eran 169c1395a2aSHaggai Eran if (offset > umem->length || 170c1395a2aSHaggai Eran (send && offset + sizeof(struct mlx5_wqe_ctrl_seg) > umem->length)) 171c1395a2aSHaggai Eran return -EINVAL; 172c1395a2aSHaggai Eran 173c1395a2aSHaggai Eran first_copy_length = min_t(u32, offset + length, wq_end) - offset; 174c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer, umem, offset, first_copy_length); 175c1395a2aSHaggai Eran if (ret) 176c1395a2aSHaggai Eran return ret; 177c1395a2aSHaggai Eran 178c1395a2aSHaggai Eran if (send) { 179c1395a2aSHaggai Eran struct mlx5_wqe_ctrl_seg *ctrl = buffer; 180c1395a2aSHaggai Eran int ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 181c1395a2aSHaggai Eran 182c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 183c1395a2aSHaggai Eran } else { 184c1395a2aSHaggai Eran wqe_length = 1 << wq->wqe_shift; 185c1395a2aSHaggai Eran } 186c1395a2aSHaggai Eran 187c1395a2aSHaggai Eran if (wqe_length <= first_copy_length) 188c1395a2aSHaggai Eran return first_copy_length; 189c1395a2aSHaggai Eran 190c1395a2aSHaggai Eran ret = ib_umem_copy_from(buffer + first_copy_length, umem, wq->offset, 191c1395a2aSHaggai Eran wqe_length - first_copy_length); 192c1395a2aSHaggai Eran if (ret) 193c1395a2aSHaggai Eran return ret; 194c1395a2aSHaggai Eran 195c1395a2aSHaggai Eran return wqe_length; 196c1395a2aSHaggai Eran } 197c1395a2aSHaggai Eran 198e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 199e126ba97SEli Cohen { 200e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 201e126ba97SEli Cohen struct ib_event event; 202e126ba97SEli Cohen 20319098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 20419098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 20519098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 20619098df2Smajd@mellanox.com } 207e126ba97SEli Cohen 208e126ba97SEli Cohen if (ibqp->event_handler) { 209e126ba97SEli Cohen event.device = ibqp->device; 210e126ba97SEli Cohen event.element.qp = ibqp; 211e126ba97SEli Cohen switch (type) { 212e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 213e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 214e126ba97SEli Cohen break; 215e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 216e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 217e126ba97SEli Cohen break; 218e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 219e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 220e126ba97SEli Cohen break; 221e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 222e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 223e126ba97SEli Cohen break; 224e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 225e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 226e126ba97SEli Cohen break; 227e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 228e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 229e126ba97SEli Cohen break; 230e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 231e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 232e126ba97SEli Cohen break; 233e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 234e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 235e126ba97SEli Cohen break; 236e126ba97SEli Cohen default: 237e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 238e126ba97SEli Cohen return; 239e126ba97SEli Cohen } 240e126ba97SEli Cohen 241e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 242e126ba97SEli Cohen } 243e126ba97SEli Cohen } 244e126ba97SEli Cohen 245e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 246e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 247e126ba97SEli Cohen { 248e126ba97SEli Cohen int wqe_size; 249e126ba97SEli Cohen int wq_size; 250e126ba97SEli Cohen 251e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 252938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 253e126ba97SEli Cohen return -EINVAL; 254e126ba97SEli Cohen 255e126ba97SEli Cohen if (!has_rq) { 256e126ba97SEli Cohen qp->rq.max_gs = 0; 257e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 258e126ba97SEli Cohen qp->rq.wqe_shift = 0; 2590540d814SNoa Osherovich cap->max_recv_wr = 0; 2600540d814SNoa Osherovich cap->max_recv_sge = 0; 261e126ba97SEli Cohen } else { 262e126ba97SEli Cohen if (ucmd) { 263e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 264002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 265002bf228SLeon Romanovsky return -EINVAL; 266e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 267002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 268002bf228SLeon Romanovsky return -EINVAL; 269e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 270e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 271e126ba97SEli Cohen } else { 272e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 273e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 274e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 275e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 276e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 277e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 278938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 279e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 280e126ba97SEli Cohen wqe_size, 281938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 282938fe83cSSaeed Mahameed max_wqe_sz_rq)); 283e126ba97SEli Cohen return -EINVAL; 284e126ba97SEli Cohen } 285e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 286e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 287e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 288e126ba97SEli Cohen } 289e126ba97SEli Cohen } 290e126ba97SEli Cohen 291e126ba97SEli Cohen return 0; 292e126ba97SEli Cohen } 293e126ba97SEli Cohen 294f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 295e126ba97SEli Cohen { 296618af384SAndi Shyti int size = 0; 297e126ba97SEli Cohen 298f0313965SErez Shitrit switch (attr->qp_type) { 299e126ba97SEli Cohen case IB_QPT_XRC_INI: 300b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 301e126ba97SEli Cohen /* fall through */ 302e126ba97SEli Cohen case IB_QPT_RC: 303e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 30475c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 30575c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 30675c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 307064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 308064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 309064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen 312b125a54bSEli Cohen case IB_QPT_XRC_TGT: 313b125a54bSEli Cohen return 0; 314b125a54bSEli Cohen 315e126ba97SEli Cohen case IB_QPT_UC: 316b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 31775c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 3189e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 31975c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 320e126ba97SEli Cohen break; 321e126ba97SEli Cohen 322e126ba97SEli Cohen case IB_QPT_UD: 323f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 324f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 325f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 326f0313965SErez Shitrit /* fall through */ 327e126ba97SEli Cohen case IB_QPT_SMI: 328d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 329b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 330e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 331e126ba97SEli Cohen break; 332e126ba97SEli Cohen 333e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 334b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 335e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 336e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 337e126ba97SEli Cohen break; 338e126ba97SEli Cohen 339e126ba97SEli Cohen default: 340e126ba97SEli Cohen return -EINVAL; 341e126ba97SEli Cohen } 342e126ba97SEli Cohen 343e126ba97SEli Cohen return size; 344e126ba97SEli Cohen } 345e126ba97SEli Cohen 346e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 347e126ba97SEli Cohen { 348e126ba97SEli Cohen int inl_size = 0; 349e126ba97SEli Cohen int size; 350e126ba97SEli Cohen 351f0313965SErez Shitrit size = sq_overhead(attr); 352e126ba97SEli Cohen if (size < 0) 353e126ba97SEli Cohen return size; 354e126ba97SEli Cohen 355e126ba97SEli Cohen if (attr->cap.max_inline_data) { 356e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 357e126ba97SEli Cohen attr->cap.max_inline_data; 358e126ba97SEli Cohen } 359e126ba97SEli Cohen 360e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 361e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN && 362e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 363e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 364e1e66cc2SSagi Grimberg else 365e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 366e126ba97SEli Cohen } 367e126ba97SEli Cohen 368288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 369288c01b7SEli Cohen { 370288c01b7SEli Cohen int max_sge; 371288c01b7SEli Cohen 372288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 373288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 374288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 375288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 376288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 377288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 378288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 379288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 380288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 381288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 382288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 383288c01b7SEli Cohen else 384288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 385288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 386288c01b7SEli Cohen 387288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 388288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 389288c01b7SEli Cohen } 390288c01b7SEli Cohen 391e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 392e126ba97SEli Cohen struct mlx5_ib_qp *qp) 393e126ba97SEli Cohen { 394e126ba97SEli Cohen int wqe_size; 395e126ba97SEli Cohen int wq_size; 396e126ba97SEli Cohen 397e126ba97SEli Cohen if (!attr->cap.max_send_wr) 398e126ba97SEli Cohen return 0; 399e126ba97SEli Cohen 400e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 401e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 402e126ba97SEli Cohen if (wqe_size < 0) 403e126ba97SEli Cohen return wqe_size; 404e126ba97SEli Cohen 405938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 406b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 407938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 408e126ba97SEli Cohen return -EINVAL; 409e126ba97SEli Cohen } 410e126ba97SEli Cohen 411f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 412e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 413e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 414e126ba97SEli Cohen 415e1e66cc2SSagi Grimberg if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) 416e1e66cc2SSagi Grimberg qp->signature_en = true; 417e1e66cc2SSagi Grimberg 418e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 419e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 420938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 4211974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 4221974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 423938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 424938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 425b125a54bSEli Cohen return -ENOMEM; 426b125a54bSEli Cohen } 427e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 428288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 429288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 430288c01b7SEli Cohen return -ENOMEM; 431288c01b7SEli Cohen 432288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 433b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 434b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 435e126ba97SEli Cohen 436e126ba97SEli Cohen return wq_size; 437e126ba97SEli Cohen } 438e126ba97SEli Cohen 439e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 440e126ba97SEli Cohen struct mlx5_ib_qp *qp, 44119098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 4420fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 4430fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 444e126ba97SEli Cohen { 445e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 446e126ba97SEli Cohen 447938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 448e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 449938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 450e126ba97SEli Cohen return -EINVAL; 451e126ba97SEli Cohen } 452e126ba97SEli Cohen 453e126ba97SEli Cohen if (ucmd->sq_wqe_count && ((1 << ilog2(ucmd->sq_wqe_count)) != ucmd->sq_wqe_count)) { 454e126ba97SEli Cohen mlx5_ib_warn(dev, "sq_wqe_count %d, sq_wqe_count %d\n", 455e126ba97SEli Cohen ucmd->sq_wqe_count, ucmd->sq_wqe_count); 456e126ba97SEli Cohen return -EINVAL; 457e126ba97SEli Cohen } 458e126ba97SEli Cohen 459e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 460e126ba97SEli Cohen 461938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 462e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 463938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 464938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 465e126ba97SEli Cohen return -EINVAL; 466e126ba97SEli Cohen } 467e126ba97SEli Cohen 468c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 469c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 4700fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 4710fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 4720fb2ed66Smajd@mellanox.com } else { 47319098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 474e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 4750fb2ed66Smajd@mellanox.com } 476e126ba97SEli Cohen 477e126ba97SEli Cohen return 0; 478e126ba97SEli Cohen } 479e126ba97SEli Cohen 480e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 481e126ba97SEli Cohen { 482e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 483e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 484e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 485e126ba97SEli Cohen !attr->cap.max_recv_wr) 486e126ba97SEli Cohen return 0; 487e126ba97SEli Cohen 488e126ba97SEli Cohen return 1; 489e126ba97SEli Cohen } 490e126ba97SEli Cohen 4910b80c14fSEli Cohen enum { 4920b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 4930b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 4940b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 4950b80c14fSEli Cohen * "odd/even" order 4960b80c14fSEli Cohen */ 4970b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 4980b80c14fSEli Cohen }; 4990b80c14fSEli Cohen 500b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 501b037c29aSEli Cohen { 50231a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 503b037c29aSEli Cohen } 504b037c29aSEli Cohen 505b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 506b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 507c1be5232SEli Cohen { 508c1be5232SEli Cohen int n; 509c1be5232SEli Cohen 510b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 511b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 512c1be5232SEli Cohen 513c1be5232SEli Cohen return n >= 0 ? n : 0; 514c1be5232SEli Cohen } 515c1be5232SEli Cohen 51618b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 51718b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 51818b0362eSYishai Hadas { 51918b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 52018b0362eSYishai Hadas } 52118b0362eSYishai Hadas 522b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 523b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 524c1be5232SEli Cohen { 525c1be5232SEli Cohen int med; 526c1be5232SEli Cohen 527b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 528b037c29aSEli Cohen return ++med; 529c1be5232SEli Cohen } 530c1be5232SEli Cohen 531b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 532b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 533e126ba97SEli Cohen { 534e126ba97SEli Cohen int i; 535e126ba97SEli Cohen 536b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 537b037c29aSEli Cohen if (!bfregi->count[i]) { 5382f5ff264SEli Cohen bfregi->count[i]++; 539e126ba97SEli Cohen return i; 540e126ba97SEli Cohen } 541e126ba97SEli Cohen } 542e126ba97SEli Cohen 543e126ba97SEli Cohen return -ENOMEM; 544e126ba97SEli Cohen } 545e126ba97SEli Cohen 546b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 547b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 548e126ba97SEli Cohen { 54918b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 550e126ba97SEli Cohen int i; 551e126ba97SEli Cohen 55218b0362eSYishai Hadas if (minidx < 0) 55318b0362eSYishai Hadas return minidx; 55418b0362eSYishai Hadas 55518b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 5562f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 557e126ba97SEli Cohen minidx = i; 5580b80c14fSEli Cohen if (!bfregi->count[minidx]) 5590b80c14fSEli Cohen break; 560e126ba97SEli Cohen } 561e126ba97SEli Cohen 5622f5ff264SEli Cohen bfregi->count[minidx]++; 563e126ba97SEli Cohen return minidx; 564e126ba97SEli Cohen } 565e126ba97SEli Cohen 566b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 567ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 568e126ba97SEli Cohen { 569ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 570e126ba97SEli Cohen 5712f5ff264SEli Cohen mutex_lock(&bfregi->lock); 572ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 573ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 574ffaf58deSLeon Romanovsky if (bfregn < 0) 575ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 576ffaf58deSLeon Romanovsky } 577ffaf58deSLeon Romanovsky 578ffaf58deSLeon Romanovsky if (bfregn < 0) { 5790b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 5802f5ff264SEli Cohen bfregn = 0; 5812f5ff264SEli Cohen bfregi->count[bfregn]++; 582e126ba97SEli Cohen } 5832f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 584e126ba97SEli Cohen 5852f5ff264SEli Cohen return bfregn; 586e126ba97SEli Cohen } 587e126ba97SEli Cohen 5884ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 589e126ba97SEli Cohen { 5902f5ff264SEli Cohen mutex_lock(&bfregi->lock); 591b037c29aSEli Cohen bfregi->count[bfregn]--; 5922f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 593e126ba97SEli Cohen } 594e126ba97SEli Cohen 595e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 596e126ba97SEli Cohen { 597e126ba97SEli Cohen switch (state) { 598e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 599e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 600e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 601e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 602e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 603e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 604e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 605e126ba97SEli Cohen default: return -1; 606e126ba97SEli Cohen } 607e126ba97SEli Cohen } 608e126ba97SEli Cohen 609e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 610e126ba97SEli Cohen { 611e126ba97SEli Cohen switch (type) { 612e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 613e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 614e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 615e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 616e126ba97SEli Cohen case IB_QPT_XRC_INI: 617e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 618e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 619d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 620c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 621e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 622e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 6230fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 624e126ba97SEli Cohen case IB_QPT_MAX: 625e126ba97SEli Cohen default: return -EINVAL; 626e126ba97SEli Cohen } 627e126ba97SEli Cohen } 628e126ba97SEli Cohen 62989ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 63089ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63189ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 63289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 63389ea94a7SMaor Gottlieb 6347c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 63505f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 6361ee47ab3SYishai Hadas bool dyn_bfreg) 637e126ba97SEli Cohen { 63805f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 63905f58cebSLeon Romanovsky u32 index_of_sys_page; 64005f58cebSLeon Romanovsky u32 offset; 641b037c29aSEli Cohen 642b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 643b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 644b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 645b037c29aSEli Cohen 64605f58cebSLeon Romanovsky if (dyn_bfreg) { 64705f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 64805f58cebSLeon Romanovsky 6497c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 6507c043e90SYishai Hadas return -EINVAL; 6517c043e90SYishai Hadas 6521ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 6531ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 6541ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 6551ee47ab3SYishai Hadas return -EINVAL; 6561ee47ab3SYishai Hadas } 6571ee47ab3SYishai Hadas } 658b037c29aSEli Cohen 6591ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 660b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 661e126ba97SEli Cohen } 662e126ba97SEli Cohen 66319098df2Smajd@mellanox.com static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, 66419098df2Smajd@mellanox.com struct ib_pd *pd, 66519098df2Smajd@mellanox.com unsigned long addr, size_t size, 66619098df2Smajd@mellanox.com struct ib_umem **umem, 66719098df2Smajd@mellanox.com int *npages, int *page_shift, int *ncont, 66819098df2Smajd@mellanox.com u32 *offset) 66919098df2Smajd@mellanox.com { 67019098df2Smajd@mellanox.com int err; 67119098df2Smajd@mellanox.com 67219098df2Smajd@mellanox.com *umem = ib_umem_get(pd->uobject->context, addr, size, 0, 0); 67319098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 67419098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 67519098df2Smajd@mellanox.com return PTR_ERR(*umem); 67619098df2Smajd@mellanox.com } 67719098df2Smajd@mellanox.com 678762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 67919098df2Smajd@mellanox.com 68019098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 68119098df2Smajd@mellanox.com if (err) { 68219098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 68319098df2Smajd@mellanox.com goto err_umem; 68419098df2Smajd@mellanox.com } 68519098df2Smajd@mellanox.com 68619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 68719098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 68819098df2Smajd@mellanox.com 68919098df2Smajd@mellanox.com return 0; 69019098df2Smajd@mellanox.com 69119098df2Smajd@mellanox.com err_umem: 69219098df2Smajd@mellanox.com ib_umem_release(*umem); 69319098df2Smajd@mellanox.com *umem = NULL; 69419098df2Smajd@mellanox.com 69519098df2Smajd@mellanox.com return err; 69619098df2Smajd@mellanox.com } 69719098df2Smajd@mellanox.com 698fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 699fe248c3aSMaor Gottlieb struct mlx5_ib_rwq *rwq) 70079b20a6cSYishai Hadas { 70179b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 70279b20a6cSYishai Hadas 703fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 704fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 705fe248c3aSMaor Gottlieb 70679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 70779b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 70879b20a6cSYishai Hadas if (rwq->umem) 70979b20a6cSYishai Hadas ib_umem_release(rwq->umem); 71079b20a6cSYishai Hadas } 71179b20a6cSYishai Hadas 71279b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 71379b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq, 71479b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 71579b20a6cSYishai Hadas { 71679b20a6cSYishai Hadas struct mlx5_ib_ucontext *context; 71779b20a6cSYishai Hadas int page_shift = 0; 71879b20a6cSYishai Hadas int npages; 71979b20a6cSYishai Hadas u32 offset = 0; 72079b20a6cSYishai Hadas int ncont = 0; 72179b20a6cSYishai Hadas int err; 72279b20a6cSYishai Hadas 72379b20a6cSYishai Hadas if (!ucmd->buf_addr) 72479b20a6cSYishai Hadas return -EINVAL; 72579b20a6cSYishai Hadas 72679b20a6cSYishai Hadas context = to_mucontext(pd->uobject->context); 72779b20a6cSYishai Hadas rwq->umem = ib_umem_get(pd->uobject->context, ucmd->buf_addr, 72879b20a6cSYishai Hadas rwq->buf_size, 0, 0); 72979b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 73079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 73179b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 73279b20a6cSYishai Hadas return err; 73379b20a6cSYishai Hadas } 73479b20a6cSYishai Hadas 735762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 73679b20a6cSYishai Hadas &ncont, NULL); 73779b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 73879b20a6cSYishai Hadas &rwq->rq_page_offset); 73979b20a6cSYishai Hadas if (err) { 74079b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 74179b20a6cSYishai Hadas goto err_umem; 74279b20a6cSYishai Hadas } 74379b20a6cSYishai Hadas 74479b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 74579b20a6cSYishai Hadas rwq->page_shift = page_shift; 74679b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 74779b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 74879b20a6cSYishai Hadas 74979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 75079b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 75179b20a6cSYishai Hadas npages, page_shift, ncont, offset); 75279b20a6cSYishai Hadas 75379b20a6cSYishai Hadas err = mlx5_ib_db_map_user(context, ucmd->db_addr, &rwq->db); 75479b20a6cSYishai Hadas if (err) { 75579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 75679b20a6cSYishai Hadas goto err_umem; 75779b20a6cSYishai Hadas } 75879b20a6cSYishai Hadas 75979b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 76079b20a6cSYishai Hadas return 0; 76179b20a6cSYishai Hadas 76279b20a6cSYishai Hadas err_umem: 76379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 76479b20a6cSYishai Hadas return err; 76579b20a6cSYishai Hadas } 76679b20a6cSYishai Hadas 767b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 768b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 769b037c29aSEli Cohen { 770b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 771b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 772b037c29aSEli Cohen } 773b037c29aSEli Cohen 774e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 775e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 7760fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 77709a7d9ecSSaeed Mahameed u32 **in, 77819098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 77919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 780e126ba97SEli Cohen { 781e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 782e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 78319098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 7849e9c47d0SEli Cohen int page_shift = 0; 7851ee47ab3SYishai Hadas int uar_index = 0; 786e126ba97SEli Cohen int npages; 7879e9c47d0SEli Cohen u32 offset = 0; 7882f5ff264SEli Cohen int bfregn; 7899e9c47d0SEli Cohen int ncont = 0; 79009a7d9ecSSaeed Mahameed __be64 *pas; 79109a7d9ecSSaeed Mahameed void *qpc; 792e126ba97SEli Cohen int err; 793e126ba97SEli Cohen 794e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 795e126ba97SEli Cohen if (err) { 796e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 797e126ba97SEli Cohen return err; 798e126ba97SEli Cohen } 799e126ba97SEli Cohen 800e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 8011ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8021ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8031ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8041ee47ab3SYishai Hadas if (uar_index < 0) 8051ee47ab3SYishai Hadas return uar_index; 8061ee47ab3SYishai Hadas 8071ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8081ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 809e126ba97SEli Cohen /* 810e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 811e126ba97SEli Cohen */ 812051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8132f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8141ee47ab3SYishai Hadas } 815051f2630SLeon Romanovsky else { 816ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 817ffaf58deSLeon Romanovsky if (bfregn < 0) 8182f5ff264SEli Cohen return bfregn; 819e126ba97SEli Cohen } 820e126ba97SEli Cohen 8212f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 8221ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8231ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 8241ee47ab3SYishai Hadas false); 825e126ba97SEli Cohen 82648fea837SHaggai Eran qp->rq.offset = 0; 82748fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 82848fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 82948fea837SHaggai Eran 8300fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 831e126ba97SEli Cohen if (err) 8322f5ff264SEli Cohen goto err_bfreg; 833e126ba97SEli Cohen 83419098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 83519098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 83619098df2Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, 83719098df2Smajd@mellanox.com ubuffer->buf_size, 83819098df2Smajd@mellanox.com &ubuffer->umem, &npages, &page_shift, 83919098df2Smajd@mellanox.com &ncont, &offset); 84019098df2Smajd@mellanox.com if (err) 8412f5ff264SEli Cohen goto err_bfreg; 8429e9c47d0SEli Cohen } else { 84319098df2Smajd@mellanox.com ubuffer->umem = NULL; 8449e9c47d0SEli Cohen } 845e126ba97SEli Cohen 84609a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 84709a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 8481b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 849e126ba97SEli Cohen if (!*in) { 850e126ba97SEli Cohen err = -ENOMEM; 851e126ba97SEli Cohen goto err_umem; 852e126ba97SEli Cohen } 853e126ba97SEli Cohen 854991d2198SYishai Hadas MLX5_SET(create_qp_in, *in, uid, to_mpd(pd)->uid); 85509a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 85609a7d9ecSSaeed Mahameed if (ubuffer->umem) 85709a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 85809a7d9ecSSaeed Mahameed 85909a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 86009a7d9ecSSaeed Mahameed 86109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 86209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 86309a7d9ecSSaeed Mahameed 86409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 8651ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 866b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 8671ee47ab3SYishai Hadas else 8681ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 8692f5ff264SEli Cohen qp->bfregn = bfregn; 870e126ba97SEli Cohen 871e126ba97SEli Cohen err = mlx5_ib_db_map_user(context, ucmd.db_addr, &qp->db); 872e126ba97SEli Cohen if (err) { 873e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 874e126ba97SEli Cohen goto err_free; 875e126ba97SEli Cohen } 876e126ba97SEli Cohen 87741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 878e126ba97SEli Cohen if (err) { 879e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 880e126ba97SEli Cohen goto err_unmap; 881e126ba97SEli Cohen } 882e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 883e126ba97SEli Cohen 884e126ba97SEli Cohen return 0; 885e126ba97SEli Cohen 886e126ba97SEli Cohen err_unmap: 887e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 888e126ba97SEli Cohen 889e126ba97SEli Cohen err_free: 890479163f4SAl Viro kvfree(*in); 891e126ba97SEli Cohen 892e126ba97SEli Cohen err_umem: 89319098df2Smajd@mellanox.com if (ubuffer->umem) 89419098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 895e126ba97SEli Cohen 8962f5ff264SEli Cohen err_bfreg: 8971ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 8984ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 899e126ba97SEli Cohen return err; 900e126ba97SEli Cohen } 901e126ba97SEli Cohen 902b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 903b037c29aSEli Cohen struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base) 904e126ba97SEli Cohen { 905e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 906e126ba97SEli Cohen 907e126ba97SEli Cohen context = to_mucontext(pd->uobject->context); 908e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 90919098df2Smajd@mellanox.com if (base->ubuffer.umem) 91019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9111ee47ab3SYishai Hadas 9121ee47ab3SYishai Hadas /* 9131ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9141ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 9151ee47ab3SYishai Hadas */ 9161ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 9174ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 918e126ba97SEli Cohen } 919e126ba97SEli Cohen 920e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 921e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 922e126ba97SEli Cohen struct mlx5_ib_qp *qp, 92309a7d9ecSSaeed Mahameed u32 **in, int *inlen, 92419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 925e126ba97SEli Cohen { 926e126ba97SEli Cohen int uar_index; 92709a7d9ecSSaeed Mahameed void *qpc; 928e126ba97SEli Cohen int err; 929e126ba97SEli Cohen 930f0313965SErez Shitrit if (init_attr->create_flags & ~(IB_QP_CREATE_SIGNATURE_EN | 931f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 932b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 93393d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 934b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 9351a4c3a3dSEli Cohen return -EINVAL; 936e126ba97SEli Cohen 937e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 9385fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 9395fe9dec0SEli Cohen else 9405fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 941e126ba97SEli Cohen 942d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 943d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 944d8030b0dSEli Cohen */ 945d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 9465fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 947e126ba97SEli Cohen 948e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 949e126ba97SEli Cohen if (err < 0) { 950e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9515fe9dec0SEli Cohen return err; 952e126ba97SEli Cohen } 953e126ba97SEli Cohen 954e126ba97SEli Cohen qp->rq.offset = 0; 955e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 95619098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 957e126ba97SEli Cohen 95819098df2Smajd@mellanox.com err = mlx5_buf_alloc(dev->mdev, base->ubuffer.buf_size, &qp->buf); 959e126ba97SEli Cohen if (err) { 960e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 9615fe9dec0SEli Cohen return err; 962e126ba97SEli Cohen } 963e126ba97SEli Cohen 964e126ba97SEli Cohen qp->sq.qend = mlx5_get_send_wqe(qp, qp->sq.wqe_cnt); 96509a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 96609a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 9671b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 968e126ba97SEli Cohen if (!*in) { 969e126ba97SEli Cohen err = -ENOMEM; 970e126ba97SEli Cohen goto err_buf; 971e126ba97SEli Cohen } 97209a7d9ecSSaeed Mahameed 97309a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 97409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 97509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 97609a7d9ecSSaeed Mahameed 977e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 97809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 97909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 980e126ba97SEli Cohen 981b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 98209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 983b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 984b11a4f9cSHaggai Eran } 985b11a4f9cSHaggai Eran 98609a7d9ecSSaeed Mahameed mlx5_fill_page_array(&qp->buf, 98709a7d9ecSSaeed Mahameed (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas)); 988e126ba97SEli Cohen 9899603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 990e126ba97SEli Cohen if (err) { 991e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 992e126ba97SEli Cohen goto err_free; 993e126ba97SEli Cohen } 994e126ba97SEli Cohen 995b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 996b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 997b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 998b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 999b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1000b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1001b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1002b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1003b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1004b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1005e126ba97SEli Cohen 1006e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1007e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1008e126ba97SEli Cohen err = -ENOMEM; 1009e126ba97SEli Cohen goto err_wrid; 1010e126ba97SEli Cohen } 1011e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1012e126ba97SEli Cohen 1013e126ba97SEli Cohen return 0; 1014e126ba97SEli Cohen 1015e126ba97SEli Cohen err_wrid: 1016b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1017b5883008SLi Dongyang kvfree(qp->sq.w_list); 1018b5883008SLi Dongyang kvfree(qp->sq.wrid); 1019b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1020b5883008SLi Dongyang kvfree(qp->rq.wrid); 1021f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1022e126ba97SEli Cohen 1023e126ba97SEli Cohen err_free: 1024479163f4SAl Viro kvfree(*in); 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen err_buf: 10279603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1028e126ba97SEli Cohen return err; 1029e126ba97SEli Cohen } 1030e126ba97SEli Cohen 1031e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1032e126ba97SEli Cohen { 1033b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1034b5883008SLi Dongyang kvfree(qp->sq.w_list); 1035b5883008SLi Dongyang kvfree(qp->sq.wrid); 1036b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1037b5883008SLi Dongyang kvfree(qp->rq.wrid); 1038f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 10399603b61dSJack Morgenstein mlx5_buf_free(dev->mdev, &qp->buf); 1040e126ba97SEli Cohen } 1041e126ba97SEli Cohen 104209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1043e126ba97SEli Cohen { 1044e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1045c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1046e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 104709a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1048e126ba97SEli Cohen else if (!qp->has_rq) 104909a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1050e126ba97SEli Cohen else 105109a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1052e126ba97SEli Cohen } 1053e126ba97SEli Cohen 1054e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1055e126ba97SEli Cohen { 10565d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 10575d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1058e126ba97SEli Cohen return 1; 1059e126ba97SEli Cohen 1060e126ba97SEli Cohen return 0; 1061e126ba97SEli Cohen } 1062e126ba97SEli Cohen 10630fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1064c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 10651cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 10661cd6dbd3SYishai Hadas struct ib_pd *pd) 10670fb2ed66Smajd@mellanox.com { 1068c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 10690fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 10700fb2ed66Smajd@mellanox.com 10711cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 10720fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1073c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1074c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1075c2e53b2cSYishai Hadas 10760fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 10770fb2ed66Smajd@mellanox.com } 10780fb2ed66Smajd@mellanox.com 10790fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 10801cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 10810fb2ed66Smajd@mellanox.com { 10821cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 10830fb2ed66Smajd@mellanox.com } 10840fb2ed66Smajd@mellanox.com 1085b96c9ddeSMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_dev *dev, 1086b96c9ddeSMark Bloch struct mlx5_ib_sq *sq) 1087b96c9ddeSMark Bloch { 1088b96c9ddeSMark Bloch if (sq->flow_rule) 1089b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1090b96c9ddeSMark Bloch } 1091b96c9ddeSMark Bloch 10920fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 10930fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 10940fb2ed66Smajd@mellanox.com struct ib_pd *pd) 10950fb2ed66Smajd@mellanox.com { 10960fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 10970fb2ed66Smajd@mellanox.com __be64 *pas; 10980fb2ed66Smajd@mellanox.com void *in; 10990fb2ed66Smajd@mellanox.com void *sqc; 11000fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 11010fb2ed66Smajd@mellanox.com void *wq; 11020fb2ed66Smajd@mellanox.com int inlen; 11030fb2ed66Smajd@mellanox.com int err; 11040fb2ed66Smajd@mellanox.com int page_shift = 0; 11050fb2ed66Smajd@mellanox.com int npages; 11060fb2ed66Smajd@mellanox.com int ncont = 0; 11070fb2ed66Smajd@mellanox.com u32 offset = 0; 11080fb2ed66Smajd@mellanox.com 11090fb2ed66Smajd@mellanox.com err = mlx5_ib_umem_get(dev, pd, ubuffer->buf_addr, ubuffer->buf_size, 11100fb2ed66Smajd@mellanox.com &sq->ubuffer.umem, &npages, &page_shift, 11110fb2ed66Smajd@mellanox.com &ncont, &offset); 11120fb2ed66Smajd@mellanox.com if (err) 11130fb2ed66Smajd@mellanox.com return err; 11140fb2ed66Smajd@mellanox.com 11150fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 11161b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 11170fb2ed66Smajd@mellanox.com if (!in) { 11180fb2ed66Smajd@mellanox.com err = -ENOMEM; 11190fb2ed66Smajd@mellanox.com goto err_umem; 11200fb2ed66Smajd@mellanox.com } 11210fb2ed66Smajd@mellanox.com 1122c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 11230fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 11240fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1125795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1126795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 11270fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 11280fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 11290fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 11300fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 11310fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 113296dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 113396dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 113496dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 11350fb2ed66Smajd@mellanox.com 11360fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 11370fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 11380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 11390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 11400fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 11410fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 11420fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 11430fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 11440fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 11450fb2ed66Smajd@mellanox.com 11460fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 11470fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 11480fb2ed66Smajd@mellanox.com 11490fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 11500fb2ed66Smajd@mellanox.com 11510fb2ed66Smajd@mellanox.com kvfree(in); 11520fb2ed66Smajd@mellanox.com 11530fb2ed66Smajd@mellanox.com if (err) 11540fb2ed66Smajd@mellanox.com goto err_umem; 11550fb2ed66Smajd@mellanox.com 1156b96c9ddeSMark Bloch err = create_flow_rule_vport_sq(dev, sq); 1157b96c9ddeSMark Bloch if (err) 1158b96c9ddeSMark Bloch goto err_flow; 1159b96c9ddeSMark Bloch 11600fb2ed66Smajd@mellanox.com return 0; 11610fb2ed66Smajd@mellanox.com 1162b96c9ddeSMark Bloch err_flow: 1163b96c9ddeSMark Bloch mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 1164b96c9ddeSMark Bloch 11650fb2ed66Smajd@mellanox.com err_umem: 11660fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11670fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 11680fb2ed66Smajd@mellanox.com 11690fb2ed66Smajd@mellanox.com return err; 11700fb2ed66Smajd@mellanox.com } 11710fb2ed66Smajd@mellanox.com 11720fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 11730fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 11740fb2ed66Smajd@mellanox.com { 1175b96c9ddeSMark Bloch destroy_flow_rule_vport_sq(dev, sq); 11760fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 11770fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 11780fb2ed66Smajd@mellanox.com } 11790fb2ed66Smajd@mellanox.com 11802c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 11810fb2ed66Smajd@mellanox.com { 11820fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 11830fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 11840fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 11850fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 11860fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 11870fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 11880fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 11890fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 11900fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 11910fb2ed66Smajd@mellanox.com 11920fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 11930fb2ed66Smajd@mellanox.com } 11940fb2ed66Smajd@mellanox.com 11950fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 11962c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 119734d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 11980fb2ed66Smajd@mellanox.com { 1199358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 12000fb2ed66Smajd@mellanox.com __be64 *pas; 12010fb2ed66Smajd@mellanox.com __be64 *qp_pas; 12020fb2ed66Smajd@mellanox.com void *in; 12030fb2ed66Smajd@mellanox.com void *rqc; 12040fb2ed66Smajd@mellanox.com void *wq; 12050fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12062c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 12072c292dbbSBoris Pismenny size_t inlen; 12080fb2ed66Smajd@mellanox.com int err; 12092c292dbbSBoris Pismenny 12102c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 12112c292dbbSBoris Pismenny return -EINVAL; 12120fb2ed66Smajd@mellanox.com 12130fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 12141b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12150fb2ed66Smajd@mellanox.com if (!in) 12160fb2ed66Smajd@mellanox.com return -ENOMEM; 12170fb2ed66Smajd@mellanox.com 121834d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 12190fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1220e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 12210fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 12220fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 12230fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 12240fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 12250fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12260fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 12270fb2ed66Smajd@mellanox.com 1228358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1229358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1230358e42eaSMajd Dibbiny 12310fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 12320fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1233b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1234b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 12350fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 12360fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12370fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12380fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 12390fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 12400fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 12410fb2ed66Smajd@mellanox.com 12420fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12430fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 12440fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 12450fb2ed66Smajd@mellanox.com 12460fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 12470fb2ed66Smajd@mellanox.com 12480fb2ed66Smajd@mellanox.com kvfree(in); 12490fb2ed66Smajd@mellanox.com 12500fb2ed66Smajd@mellanox.com return err; 12510fb2ed66Smajd@mellanox.com } 12520fb2ed66Smajd@mellanox.com 12530fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 12540fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 12550fb2ed66Smajd@mellanox.com { 12560fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 12570fb2ed66Smajd@mellanox.com } 12580fb2ed66Smajd@mellanox.com 1259f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1260f95ef6cbSMaor Gottlieb { 1261f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1262f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1263f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1264f95ef6cbSMaor Gottlieb } 1265f95ef6cbSMaor Gottlieb 12660042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 12670042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1268443c1cf9SYishai Hadas u32 qp_flags_en, 1269443c1cf9SYishai Hadas struct ib_pd *pd) 12700042f9e4SMark Bloch { 12710042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 12720042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 12730042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1274443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 12750042f9e4SMark Bloch } 12760042f9e4SMark Bloch 12770fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1278f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1279443c1cf9SYishai Hadas u32 *qp_flags_en, 1280443c1cf9SYishai Hadas struct ib_pd *pd) 12810fb2ed66Smajd@mellanox.com { 1282175edba8SMark Bloch u8 lb_flag = 0; 12830fb2ed66Smajd@mellanox.com u32 *in; 12840fb2ed66Smajd@mellanox.com void *tirc; 12850fb2ed66Smajd@mellanox.com int inlen; 12860fb2ed66Smajd@mellanox.com int err; 12870fb2ed66Smajd@mellanox.com 12880fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 12891b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12900fb2ed66Smajd@mellanox.com if (!in) 12910fb2ed66Smajd@mellanox.com return -ENOMEM; 12920fb2ed66Smajd@mellanox.com 1293443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 12940fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 12950fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 12960fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 12970fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1298175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1299f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 13000fb2ed66Smajd@mellanox.com 1301175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1302175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1303175edba8SMark Bloch 1304175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1305175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1306175edba8SMark Bloch 1307175edba8SMark Bloch if (dev->rep) { 1308175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1309175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1310175edba8SMark Bloch } 1311175edba8SMark Bloch 1312175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1313ec9c2fb8SMark Bloch 13140fb2ed66Smajd@mellanox.com err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn); 13150fb2ed66Smajd@mellanox.com 13160042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 13170042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 13180042f9e4SMark Bloch 13190042f9e4SMark Bloch if (err) 1320443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 13210042f9e4SMark Bloch } 13220fb2ed66Smajd@mellanox.com kvfree(in); 13230fb2ed66Smajd@mellanox.com 13240fb2ed66Smajd@mellanox.com return err; 13250fb2ed66Smajd@mellanox.com } 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 13282c292dbbSBoris Pismenny u32 *in, size_t inlen, 13297f72052cSYishai Hadas struct ib_pd *pd, 13307f72052cSYishai Hadas struct ib_udata *udata, 13317f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 13320fb2ed66Smajd@mellanox.com { 13330fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 13340fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 13350fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 13360fb2ed66Smajd@mellanox.com struct ib_uobject *uobj = pd->uobject; 13370fb2ed66Smajd@mellanox.com struct ib_ucontext *ucontext = uobj->context; 13380fb2ed66Smajd@mellanox.com struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 13390fb2ed66Smajd@mellanox.com int err; 13400fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 13417f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 13420fb2ed66Smajd@mellanox.com 13430fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 13441cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 13450fb2ed66Smajd@mellanox.com if (err) 13460fb2ed66Smajd@mellanox.com return err; 13470fb2ed66Smajd@mellanox.com 13480fb2ed66Smajd@mellanox.com err = create_raw_packet_qp_sq(dev, sq, in, pd); 13490fb2ed66Smajd@mellanox.com if (err) 13500fb2ed66Smajd@mellanox.com goto err_destroy_tis; 13510fb2ed66Smajd@mellanox.com 13527f72052cSYishai Hadas if (uid) { 13537f72052cSYishai Hadas resp->tisn = sq->tisn; 13547f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 13557f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 13567f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 13577f72052cSYishai Hadas } 13587f72052cSYishai Hadas 13590fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 13601d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 13610fb2ed66Smajd@mellanox.com } 13620fb2ed66Smajd@mellanox.com 13630fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1364358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1365358e42eaSMajd Dibbiny 1366e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1367e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1368b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1369b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 137034d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 13710fb2ed66Smajd@mellanox.com if (err) 13720fb2ed66Smajd@mellanox.com goto err_destroy_sq; 13730fb2ed66Smajd@mellanox.com 1374443c1cf9SYishai Hadas err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd); 13750fb2ed66Smajd@mellanox.com if (err) 13760fb2ed66Smajd@mellanox.com goto err_destroy_rq; 13777f72052cSYishai Hadas 13787f72052cSYishai Hadas if (uid) { 13797f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 13807f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 13817f72052cSYishai Hadas resp->tirn = rq->tirn; 13827f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 13837f72052cSYishai Hadas } 13840fb2ed66Smajd@mellanox.com } 13850fb2ed66Smajd@mellanox.com 13860fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 13870fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 13887f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 13897f72052cSYishai Hadas if (err) 13907f72052cSYishai Hadas goto err_destroy_tir; 13910fb2ed66Smajd@mellanox.com 13920fb2ed66Smajd@mellanox.com return 0; 13930fb2ed66Smajd@mellanox.com 13947f72052cSYishai Hadas err_destroy_tir: 13957f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 13960fb2ed66Smajd@mellanox.com err_destroy_rq: 13970fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 13980fb2ed66Smajd@mellanox.com err_destroy_sq: 13990fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 14000fb2ed66Smajd@mellanox.com return err; 14010fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14020fb2ed66Smajd@mellanox.com err_destroy_tis: 14031cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 14040fb2ed66Smajd@mellanox.com 14050fb2ed66Smajd@mellanox.com return err; 14060fb2ed66Smajd@mellanox.com } 14070fb2ed66Smajd@mellanox.com 14080fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 14090fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 14100fb2ed66Smajd@mellanox.com { 14110fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14120fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14130fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14140fb2ed66Smajd@mellanox.com 14150fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1416443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 14170fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 14180fb2ed66Smajd@mellanox.com } 14190fb2ed66Smajd@mellanox.com 14200fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14210fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 14221cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 14230fb2ed66Smajd@mellanox.com } 14240fb2ed66Smajd@mellanox.com } 14250fb2ed66Smajd@mellanox.com 14260fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 14270fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 14280fb2ed66Smajd@mellanox.com { 14290fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14300fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 14310fb2ed66Smajd@mellanox.com 14320fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 14330fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 14340fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 14350fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 14360fb2ed66Smajd@mellanox.com } 14370fb2ed66Smajd@mellanox.com 143828d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 143928d61370SYishai Hadas { 14400042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14410042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14420042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1443443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1444443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 144528d61370SYishai Hadas } 144628d61370SYishai Hadas 144728d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 144828d61370SYishai Hadas struct ib_pd *pd, 144928d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 145028d61370SYishai Hadas struct ib_udata *udata) 145128d61370SYishai Hadas { 145228d61370SYishai Hadas struct ib_uobject *uobj = pd->uobject; 145328d61370SYishai Hadas struct ib_ucontext *ucontext = uobj->context; 145428d61370SYishai Hadas struct mlx5_ib_ucontext *mucontext = to_mucontext(ucontext); 145528d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 145628d61370SYishai Hadas int inlen; 145728d61370SYishai Hadas int err; 145828d61370SYishai Hadas u32 *in; 145928d61370SYishai Hadas void *tirc; 146028d61370SYishai Hadas void *hfso; 146128d61370SYishai Hadas u32 selected_fields = 0; 14622d93fc85SMatan Barak u32 outer_l4; 146328d61370SYishai Hadas size_t min_resp_len; 146428d61370SYishai Hadas u32 tdn = mucontext->tdn; 146528d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 146628d61370SYishai Hadas size_t required_cmd_sz; 1467175edba8SMark Bloch u8 lb_flag = 0; 146828d61370SYishai Hadas 146928d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 147028d61370SYishai Hadas return -EOPNOTSUPP; 147128d61370SYishai Hadas 147228d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 147328d61370SYishai Hadas return -EINVAL; 147428d61370SYishai Hadas 14752f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 147628d61370SYishai Hadas if (udata->outlen < min_resp_len) 147728d61370SYishai Hadas return -EINVAL; 147828d61370SYishai Hadas 1479f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 148028d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 148128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 148228d61370SYishai Hadas return -EINVAL; 148328d61370SYishai Hadas } 148428d61370SYishai Hadas 148528d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 148628d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 148728d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 148828d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 148928d61370SYishai Hadas return -EOPNOTSUPP; 149028d61370SYishai Hadas } 149128d61370SYishai Hadas 149228d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 149328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 149428d61370SYishai Hadas return -EFAULT; 149528d61370SYishai Hadas } 149628d61370SYishai Hadas 149728d61370SYishai Hadas if (ucmd.comp_mask) { 149828d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 149928d61370SYishai Hadas return -EOPNOTSUPP; 150028d61370SYishai Hadas } 150128d61370SYishai Hadas 1502175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1503175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1504175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1505f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1506f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1507f95ef6cbSMaor Gottlieb } 1508f95ef6cbSMaor Gottlieb 1509f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1510f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1511f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 151228d61370SYishai Hadas return -EOPNOTSUPP; 151328d61370SYishai Hadas } 151428d61370SYishai Hadas 1515309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1516309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1517309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1518309fa347SMaor Gottlieb return -EOPNOTSUPP; 1519309fa347SMaor Gottlieb } 1520309fa347SMaor Gottlieb 1521175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->rep) { 1522175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1523175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1524175edba8SMark Bloch } 1525175edba8SMark Bloch 1526175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1527175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1528175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1529175edba8SMark Bloch } 1530175edba8SMark Bloch 153141d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 153228d61370SYishai Hadas if (err) { 153328d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 153428d61370SYishai Hadas return -EINVAL; 153528d61370SYishai Hadas } 153628d61370SYishai Hadas 153728d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 15381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 153928d61370SYishai Hadas if (!in) 154028d61370SYishai Hadas return -ENOMEM; 154128d61370SYishai Hadas 1542443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 154328d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 154428d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 154528d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 154628d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 154728d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 154828d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 154928d61370SYishai Hadas 155028d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1551f95ef6cbSMaor Gottlieb 1552f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1553f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1554f95ef6cbSMaor Gottlieb 1555175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1556175edba8SMark Bloch 1557309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1558309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1559309fa347SMaor Gottlieb else 1560309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1561309fa347SMaor Gottlieb 156228d61370SYishai Hadas switch (ucmd.rx_hash_function) { 156328d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 156428d61370SYishai Hadas { 156528d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 156628d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 156728d61370SYishai Hadas 156828d61370SYishai Hadas if (len != ucmd.rx_key_len) { 156928d61370SYishai Hadas err = -EINVAL; 157028d61370SYishai Hadas goto err; 157128d61370SYishai Hadas } 157228d61370SYishai Hadas 157328d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 157428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 157528d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 157628d61370SYishai Hadas break; 157728d61370SYishai Hadas } 157828d61370SYishai Hadas default: 157928d61370SYishai Hadas err = -EOPNOTSUPP; 158028d61370SYishai Hadas goto err; 158128d61370SYishai Hadas } 158228d61370SYishai Hadas 158328d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 158428d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 158528d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 158628d61370SYishai Hadas goto create_tir; 158728d61370SYishai Hadas err = -EINVAL; 158828d61370SYishai Hadas goto err; 158928d61370SYishai Hadas } 159028d61370SYishai Hadas 159128d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 159228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 159328d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 159428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 159528d61370SYishai Hadas err = -EINVAL; 159628d61370SYishai Hadas goto err; 159728d61370SYishai Hadas } 159828d61370SYishai Hadas 159928d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 160028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 160128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 160228d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 160328d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 160428d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 160528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 160628d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 160728d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 160828d61370SYishai Hadas 16092d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 16102d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 161128d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 16122d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 16132d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 16142d93fc85SMatan Barak 16152d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 16162d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 161728d61370SYishai Hadas err = -EINVAL; 161828d61370SYishai Hadas goto err; 161928d61370SYishai Hadas } 162028d61370SYishai Hadas 162128d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 162228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 162328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 162428d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 162528d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 162628d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 162728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 162828d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 162928d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 163028d61370SYishai Hadas 163128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 163228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 163328d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 163428d61370SYishai Hadas 163528d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 163628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 163728d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 163828d61370SYishai Hadas 163928d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 164028d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 164128d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 164228d61370SYishai Hadas 164328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 164428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 164528d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 164628d61370SYishai Hadas 16472d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 16482d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 16492d93fc85SMatan Barak 165028d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 165128d61370SYishai Hadas 165228d61370SYishai Hadas create_tir: 165328d61370SYishai Hadas err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn); 165428d61370SYishai Hadas 16550042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 16560042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 16570042f9e4SMark Bloch 16580042f9e4SMark Bloch if (err) 1659443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1660443c1cf9SYishai Hadas to_mpd(pd)->uid); 16610042f9e4SMark Bloch } 16620042f9e4SMark Bloch 166328d61370SYishai Hadas if (err) 166428d61370SYishai Hadas goto err; 166528d61370SYishai Hadas 16667f72052cSYishai Hadas if (mucontext->devx_uid) { 16677f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 16687f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 16697f72052cSYishai Hadas } 16707f72052cSYishai Hadas 16717f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 16727f72052cSYishai Hadas if (err) 16737f72052cSYishai Hadas goto err_copy; 16747f72052cSYishai Hadas 167528d61370SYishai Hadas kvfree(in); 167628d61370SYishai Hadas /* qpn is reserved for that QP */ 167728d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1678d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 167928d61370SYishai Hadas return 0; 168028d61370SYishai Hadas 16817f72052cSYishai Hadas err_copy: 16827f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 168328d61370SYishai Hadas err: 168428d61370SYishai Hadas kvfree(in); 168528d61370SYishai Hadas return err; 168628d61370SYishai Hadas } 168728d61370SYishai Hadas 16885d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 16895d6ff1baSYonatan Cohen void *qpc) 16905d6ff1baSYonatan Cohen { 16915d6ff1baSYonatan Cohen int rcqe_sz; 16925d6ff1baSYonatan Cohen 16935d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 16945d6ff1baSYonatan Cohen return; 16955d6ff1baSYonatan Cohen 16965d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 16975d6ff1baSYonatan Cohen 16985d6ff1baSYonatan Cohen if (rcqe_sz == 128) { 16995d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 17005d6ff1baSYonatan Cohen return; 17015d6ff1baSYonatan Cohen } 17025d6ff1baSYonatan Cohen 17035d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCT) 17045d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE); 17055d6ff1baSYonatan Cohen } 17065d6ff1baSYonatan Cohen 17075d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 17085d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 17096f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 17105d6ff1baSYonatan Cohen void *qpc) 17115d6ff1baSYonatan Cohen { 17125d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 17135d6ff1baSYonatan Cohen int scqe_sz; 17146f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 17155d6ff1baSYonatan Cohen 17165d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 17175d6ff1baSYonatan Cohen return; 17185d6ff1baSYonatan Cohen 17196f4bc0eaSYonatan Cohen if (ucmd) 17206f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 17216f4bc0eaSYonatan Cohen 17226f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 17235d6ff1baSYonatan Cohen return; 17245d6ff1baSYonatan Cohen 17255d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 17265d6ff1baSYonatan Cohen if (scqe_sz == 128) { 17275d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 17285d6ff1baSYonatan Cohen return; 17295d6ff1baSYonatan Cohen } 17305d6ff1baSYonatan Cohen 17315d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 17325d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 17335d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 17345d6ff1baSYonatan Cohen } 17355d6ff1baSYonatan Cohen 1736a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1737a60109dcSYonatan Cohen { 1738a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1739a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1740a60109dcSYonatan Cohen */ 1741a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1742a60109dcSYonatan Cohen int log_max_size; 1743a60109dcSYonatan Cohen 1744a60109dcSYonatan Cohen if (!supported_size_mask) 1745a60109dcSYonatan Cohen return -EOPNOTSUPP; 1746a60109dcSYonatan Cohen 1747a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1748a60109dcSYonatan Cohen 1749a60109dcSYonatan Cohen if (log_max_size > 3) 1750a60109dcSYonatan Cohen return log_max_size; 1751a60109dcSYonatan Cohen 1752a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1753a60109dcSYonatan Cohen } 1754a60109dcSYonatan Cohen 1755a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1756a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1757a60109dcSYonatan Cohen { 1758a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1759a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1760a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1761a60109dcSYonatan Cohen int atomic_size_mask; 1762a60109dcSYonatan Cohen 1763a60109dcSYonatan Cohen if (!atomic) 1764a60109dcSYonatan Cohen return -EOPNOTSUPP; 1765a60109dcSYonatan Cohen 1766a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1767a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1768a60109dcSYonatan Cohen else 1769a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1770a60109dcSYonatan Cohen 1771a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1772a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1773a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1774a60109dcSYonatan Cohen 1775a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1776a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1777a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1778a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1779a60109dcSYonatan Cohen 1780a60109dcSYonatan Cohen return atomic_mode; 1781a60109dcSYonatan Cohen } 1782a60109dcSYonatan Cohen 17832e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 17842e43bb31SYonatan Cohen { 17852e43bb31SYonatan Cohen return (input & ~supported) == 0; 17862e43bb31SYonatan Cohen } 17872e43bb31SYonatan Cohen 1788e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1789e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1790e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1791e126ba97SEli Cohen { 1792e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 179309a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1794938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 17950625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 179689ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 179789ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 179889ea94a7SMaor Gottlieb unsigned long flags; 1799cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 180009a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 180109a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1802e7b169f3SNoa Osherovich int mlx5_st; 1803cfb5e088SHaggai Abramovsky void *qpc; 180409a7d9ecSSaeed Mahameed u32 *in; 180509a7d9ecSSaeed Mahameed int err; 1806e126ba97SEli Cohen 1807e126ba97SEli Cohen mutex_init(&qp->mutex); 1808e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1809e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1810e126ba97SEli Cohen 1811e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1812e7b169f3SNoa Osherovich if (mlx5_st < 0) 1813e7b169f3SNoa Osherovich return -EINVAL; 1814e7b169f3SNoa Osherovich 181528d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 181628d61370SYishai Hadas if (!udata) 181728d61370SYishai Hadas return -ENOSYS; 181828d61370SYishai Hadas 181928d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 182028d61370SYishai Hadas return err; 182128d61370SYishai Hadas } 182228d61370SYishai Hadas 1823f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1824938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1825f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1826f360d88aSEli Cohen return -EINVAL; 1827f360d88aSEli Cohen } else { 1828f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1829f360d88aSEli Cohen } 1830f360d88aSEli Cohen } 1831f360d88aSEli Cohen 1832051f2630SLeon Romanovsky if (init_attr->create_flags & 1833051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1834051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1835051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1836051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1837051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1838051f2630SLeon Romanovsky return -EINVAL; 1839051f2630SLeon Romanovsky } 1840051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 1841051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 1842051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 1843051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 1844051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 1845051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 1846051f2630SLeon Romanovsky } 1847f0313965SErez Shitrit 1848f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 1849f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 1850f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 1851f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 1852f0313965SErez Shitrit return -EOPNOTSUPP; 1853f0313965SErez Shitrit } 1854f0313965SErez Shitrit 1855358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 1856358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1857358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 1858358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1859358e42eaSMajd Dibbiny } 1860358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 1861358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 1862358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 1863358e42eaSMajd Dibbiny return -EOPNOTSUPP; 1864358e42eaSMajd Dibbiny } 1865358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 1866358e42eaSMajd Dibbiny } 1867358e42eaSMajd Dibbiny 1868e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 1869e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 1870e126ba97SEli Cohen 1871e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 1872e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 1873e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 1874e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 1875e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 1876e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 1877e4cc4fa7SNoa Osherovich } 1878e4cc4fa7SNoa Osherovich 1879e126ba97SEli Cohen if (pd && pd->uobject) { 1880e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 1881e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1882e126ba97SEli Cohen return -EFAULT; 1883e126ba97SEli Cohen } 1884e126ba97SEli Cohen 18852e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 18862e43bb31SYonatan Cohen MLX5_QP_FLAG_SIGNATURE | 18872e43bb31SYonatan Cohen MLX5_QP_FLAG_SCATTER_CQE | 18882e43bb31SYonatan Cohen MLX5_QP_FLAG_TUNNEL_OFFLOADS | 18892e43bb31SYonatan Cohen MLX5_QP_FLAG_BFREG_INDEX | 18902e43bb31SYonatan Cohen MLX5_QP_FLAG_TYPE_DCT | 18916f4bc0eaSYonatan Cohen MLX5_QP_FLAG_TYPE_DCI | 18926f4bc0eaSYonatan Cohen MLX5_QP_FLAG_ALLOW_SCATTER_CQE)) 18932e43bb31SYonatan Cohen return -EINVAL; 18942e43bb31SYonatan Cohen 1895cfb5e088SHaggai Abramovsky err = get_qp_user_index(to_mucontext(pd->uobject->context), 1896cfb5e088SHaggai Abramovsky &ucmd, udata->inlen, &uidx); 1897cfb5e088SHaggai Abramovsky if (err) 1898cfb5e088SHaggai Abramovsky return err; 1899cfb5e088SHaggai Abramovsky 1900e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 19015d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 1902e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 1903f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 1904f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 1905f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 1906f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 1907f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1908f95ef6cbSMaor Gottlieb } 1909175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 1910175edba8SMark Bloch } 1911175edba8SMark Bloch 1912175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 1913175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1914175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 1915175edba8SMark Bloch return -EOPNOTSUPP; 1916175edba8SMark Bloch } 1917175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1918175edba8SMark Bloch } 1919175edba8SMark Bloch 1920175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1921175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 1922175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 1923175edba8SMark Bloch return -EOPNOTSUPP; 1924175edba8SMark Bloch } 1925175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1926f95ef6cbSMaor Gottlieb } 1927c2e53b2cSYishai Hadas 1928c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 1929c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 1930c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 1931c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 1932c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 1933c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 1934c2e53b2cSYishai Hadas return -EOPNOTSUPP; 1935c2e53b2cSYishai Hadas } 1936c2e53b2cSYishai Hadas 1937c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 1938c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 1939c2e53b2cSYishai Hadas } 1940e126ba97SEli Cohen } else { 1941e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 1942e126ba97SEli Cohen } 1943e126ba97SEli Cohen 1944c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 1945c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 1946c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 1947c2e53b2cSYishai Hadas &qp->trans_qp.base; 1948c2e53b2cSYishai Hadas 1949e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 1950e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 1951e126ba97SEli Cohen qp, (pd && pd->uobject) ? &ucmd : NULL); 1952e126ba97SEli Cohen if (err) { 1953e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1954e126ba97SEli Cohen return err; 1955e126ba97SEli Cohen } 1956e126ba97SEli Cohen 1957e126ba97SEli Cohen if (pd) { 1958e126ba97SEli Cohen if (pd->uobject) { 1959938fe83cSSaeed Mahameed __u32 max_wqes = 1960938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 1961e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 1962e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 1963e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 1964e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 1965e126ba97SEli Cohen return -EINVAL; 1966e126ba97SEli Cohen } 1967938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 1968e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 1969938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 1970e126ba97SEli Cohen return -EINVAL; 1971e126ba97SEli Cohen } 1972b11a4f9cSHaggai Eran if (init_attr->create_flags & 1973b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 1974b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 1975b11a4f9cSHaggai Eran return -EINVAL; 1976b11a4f9cSHaggai Eran } 19770fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 19780fb2ed66Smajd@mellanox.com &resp, &inlen, base); 1979e126ba97SEli Cohen if (err) 1980e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1981e126ba97SEli Cohen } else { 198219098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 198319098df2Smajd@mellanox.com base); 1984e126ba97SEli Cohen if (err) 1985e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1986e126ba97SEli Cohen } 1987e126ba97SEli Cohen 1988e126ba97SEli Cohen if (err) 1989e126ba97SEli Cohen return err; 1990e126ba97SEli Cohen } else { 19911b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 1992e126ba97SEli Cohen if (!in) 1993e126ba97SEli Cohen return -ENOMEM; 1994e126ba97SEli Cohen 1995e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 1996e126ba97SEli Cohen } 1997e126ba97SEli Cohen 1998e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 1999e126ba97SEli Cohen qp->port = init_attr->port_num; 2000e126ba97SEli Cohen 200109a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 200209a7d9ecSSaeed Mahameed 2003e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 200409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2005e126ba97SEli Cohen 2006e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 200709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2008e126ba97SEli Cohen else 200909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 201009a7d9ecSSaeed Mahameed 2011e126ba97SEli Cohen 2012e126ba97SEli Cohen if (qp->wq_sig) 201309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2014e126ba97SEli Cohen 2015f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 201609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2017f360d88aSEli Cohen 2018051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 201909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2020051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 202109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2022051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 202309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2024051f2630SLeon Romanovsky 2025e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 20265d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 20276f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 20286f4bc0eaSYonatan Cohen (pd && pd->uobject) ? &ucmd : NULL, 20296f4bc0eaSYonatan Cohen qpc); 2030e126ba97SEli Cohen } 2031e126ba97SEli Cohen 2032e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 203309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 203409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2035e126ba97SEli Cohen } 2036e126ba97SEli Cohen 203709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2038e126ba97SEli Cohen 20393fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 204009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 20413fd3307eSArtemy Kovalyov } else { 204209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 20433fd3307eSArtemy Kovalyov if (init_attr->srq && 20443fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 20453fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 20463fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 20473fd3307eSArtemy Kovalyov } 2048e126ba97SEli Cohen 2049e126ba97SEli Cohen /* Set default resources */ 2050e126ba97SEli Cohen switch (init_attr->qp_type) { 2051e126ba97SEli Cohen case IB_QPT_XRC_TGT: 205209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 205309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 205409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 205509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2056e126ba97SEli Cohen break; 2057e126ba97SEli Cohen case IB_QPT_XRC_INI: 205809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 205909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 206009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2061e126ba97SEli Cohen break; 2062e126ba97SEli Cohen default: 2063e126ba97SEli Cohen if (init_attr->srq) { 206409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 206509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2066e126ba97SEli Cohen } else { 206709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 206809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2069e126ba97SEli Cohen } 2070e126ba97SEli Cohen } 2071e126ba97SEli Cohen 2072e126ba97SEli Cohen if (init_attr->send_cq) 207309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2074e126ba97SEli Cohen 2075e126ba97SEli Cohen if (init_attr->recv_cq) 207609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2077e126ba97SEli Cohen 207809a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2079e126ba97SEli Cohen 2080cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 208109a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2082cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 208309a7d9ecSSaeed Mahameed 2084f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2085f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2086f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2087f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2088f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2089f0313965SErez Shitrit } 2090cfb5e088SHaggai Abramovsky 2091b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2092b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2093b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2094b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2095b1383aa6SNoa Osherovich goto err; 2096b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2097b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2098b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2099b1383aa6SNoa Osherovich } else { 2100b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2101b1383aa6SNoa Osherovich } 2102b1383aa6SNoa Osherovich } 2103b1383aa6SNoa Osherovich 21042c292dbbSBoris Pismenny if (inlen < 0) { 21052c292dbbSBoris Pismenny err = -EINVAL; 21062c292dbbSBoris Pismenny goto err; 21072c292dbbSBoris Pismenny } 21082c292dbbSBoris Pismenny 2109c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2110c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 21110fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 21120fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 21137f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 21147f72052cSYishai Hadas &resp); 21150fb2ed66Smajd@mellanox.com } else { 211619098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 21170fb2ed66Smajd@mellanox.com } 21180fb2ed66Smajd@mellanox.com 2119e126ba97SEli Cohen if (err) { 2120e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2121e126ba97SEli Cohen goto err_create; 2122e126ba97SEli Cohen } 2123e126ba97SEli Cohen 2124479163f4SAl Viro kvfree(in); 2125e126ba97SEli Cohen 212619098df2Smajd@mellanox.com base->container_mibqp = qp; 212719098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2128e126ba97SEli Cohen 212989ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 213089ea94a7SMaor Gottlieb &send_cq, &recv_cq); 213189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 213289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 213389ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 213489ea94a7SMaor Gottlieb * flow 213589ea94a7SMaor Gottlieb */ 213689ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 213789ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 213889ea94a7SMaor Gottlieb */ 213989ea94a7SMaor Gottlieb if (send_cq) 214089ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 214189ea94a7SMaor Gottlieb if (recv_cq) 214289ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 214389ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 214489ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 214589ea94a7SMaor Gottlieb 2146e126ba97SEli Cohen return 0; 2147e126ba97SEli Cohen 2148e126ba97SEli Cohen err_create: 2149e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2150b037c29aSEli Cohen destroy_qp_user(dev, pd, qp, base); 2151e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2152e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2153e126ba97SEli Cohen 2154b1383aa6SNoa Osherovich err: 2155479163f4SAl Viro kvfree(in); 2156e126ba97SEli Cohen return err; 2157e126ba97SEli Cohen } 2158e126ba97SEli Cohen 2159e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2160e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2161e126ba97SEli Cohen { 2162e126ba97SEli Cohen if (send_cq) { 2163e126ba97SEli Cohen if (recv_cq) { 2164e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 216589ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2166e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2167e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2168e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 216989ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2170e126ba97SEli Cohen __acquire(&recv_cq->lock); 2171e126ba97SEli Cohen } else { 217289ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2173e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2174e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2175e126ba97SEli Cohen } 2176e126ba97SEli Cohen } else { 217789ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 21786a4f139aSEli Cohen __acquire(&recv_cq->lock); 2179e126ba97SEli Cohen } 2180e126ba97SEli Cohen } else if (recv_cq) { 218189ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 21826a4f139aSEli Cohen __acquire(&send_cq->lock); 21836a4f139aSEli Cohen } else { 21846a4f139aSEli Cohen __acquire(&send_cq->lock); 21856a4f139aSEli Cohen __acquire(&recv_cq->lock); 2186e126ba97SEli Cohen } 2187e126ba97SEli Cohen } 2188e126ba97SEli Cohen 2189e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2190e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2191e126ba97SEli Cohen { 2192e126ba97SEli Cohen if (send_cq) { 2193e126ba97SEli Cohen if (recv_cq) { 2194e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2195e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 219689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2197e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2198e126ba97SEli Cohen __release(&recv_cq->lock); 219989ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2200e126ba97SEli Cohen } else { 2201e126ba97SEli Cohen spin_unlock(&send_cq->lock); 220289ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2203e126ba97SEli Cohen } 2204e126ba97SEli Cohen } else { 22056a4f139aSEli Cohen __release(&recv_cq->lock); 220689ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2207e126ba97SEli Cohen } 2208e126ba97SEli Cohen } else if (recv_cq) { 22096a4f139aSEli Cohen __release(&send_cq->lock); 221089ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 22116a4f139aSEli Cohen } else { 22126a4f139aSEli Cohen __release(&recv_cq->lock); 22136a4f139aSEli Cohen __release(&send_cq->lock); 2214e126ba97SEli Cohen } 2215e126ba97SEli Cohen } 2216e126ba97SEli Cohen 2217e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2218e126ba97SEli Cohen { 2219e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2220e126ba97SEli Cohen } 2221e126ba97SEli Cohen 222289ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 222389ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2224e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2225e126ba97SEli Cohen { 222689ea94a7SMaor Gottlieb switch (qp_type) { 2227e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2228e126ba97SEli Cohen *send_cq = NULL; 2229e126ba97SEli Cohen *recv_cq = NULL; 2230e126ba97SEli Cohen break; 2231e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2232e126ba97SEli Cohen case IB_QPT_XRC_INI: 223389ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2234e126ba97SEli Cohen *recv_cq = NULL; 2235e126ba97SEli Cohen break; 2236e126ba97SEli Cohen 2237e126ba97SEli Cohen case IB_QPT_SMI: 2238d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2239e126ba97SEli Cohen case IB_QPT_RC: 2240e126ba97SEli Cohen case IB_QPT_UC: 2241e126ba97SEli Cohen case IB_QPT_UD: 2242e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2243e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 22440fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 224589ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 224689ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2247e126ba97SEli Cohen break; 2248e126ba97SEli Cohen 2249e126ba97SEli Cohen case IB_QPT_MAX: 2250e126ba97SEli Cohen default: 2251e126ba97SEli Cohen *send_cq = NULL; 2252e126ba97SEli Cohen *recv_cq = NULL; 2253e126ba97SEli Cohen break; 2254e126ba97SEli Cohen } 2255e126ba97SEli Cohen } 2256e126ba97SEli Cohen 2257ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 225813eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 225913eab21fSAviv Heller u8 lag_tx_affinity); 2260ad5f8e96Smajd@mellanox.com 2261e126ba97SEli Cohen static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 2262e126ba97SEli Cohen { 2263e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2264c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 226589ea94a7SMaor Gottlieb unsigned long flags; 2266e126ba97SEli Cohen int err; 2267e126ba97SEli Cohen 226828d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 226928d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 227028d61370SYishai Hadas return; 227128d61370SYishai Hadas } 227228d61370SYishai Hadas 2273c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2274c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 22750fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 22760fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 22770fb2ed66Smajd@mellanox.com 22786aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2279c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2280c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2281ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 22821a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 22831a412fb1SSaeed Mahameed NULL, &base->mqp); 2284ad5f8e96Smajd@mellanox.com } else { 22850680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 22860680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 22870680efa2SAlex Vesker }; 22880680efa2SAlex Vesker 228913eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2290ad5f8e96Smajd@mellanox.com } 2291ad5f8e96Smajd@mellanox.com if (err) 2292427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 229319098df2Smajd@mellanox.com base->mqp.qpn); 22946aec21f6SHaggai Eran } 2295e126ba97SEli Cohen 229689ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 229789ea94a7SMaor Gottlieb &send_cq, &recv_cq); 229889ea94a7SMaor Gottlieb 229989ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 230089ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 230189ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 230289ea94a7SMaor Gottlieb list_del(&qp->qps_list); 230389ea94a7SMaor Gottlieb if (send_cq) 230489ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 230589ea94a7SMaor Gottlieb 230689ea94a7SMaor Gottlieb if (recv_cq) 230789ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2308e126ba97SEli Cohen 2309e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 231019098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2311e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2312e126ba97SEli Cohen if (send_cq != recv_cq) 231319098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 231419098df2Smajd@mellanox.com NULL); 2315e126ba97SEli Cohen } 231689ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 231789ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2318e126ba97SEli Cohen 2319c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2320c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 23210fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 23220fb2ed66Smajd@mellanox.com } else { 232319098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2324e126ba97SEli Cohen if (err) 23250fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 23260fb2ed66Smajd@mellanox.com base->mqp.qpn); 23270fb2ed66Smajd@mellanox.com } 2328e126ba97SEli Cohen 2329e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2330e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2331e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2332b037c29aSEli Cohen destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base); 2333e126ba97SEli Cohen } 2334e126ba97SEli Cohen 2335e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2336e126ba97SEli Cohen { 2337e126ba97SEli Cohen switch (type) { 2338e126ba97SEli Cohen case IB_QPT_SMI: 2339e126ba97SEli Cohen return "IB_QPT_SMI"; 2340e126ba97SEli Cohen case IB_QPT_GSI: 2341e126ba97SEli Cohen return "IB_QPT_GSI"; 2342e126ba97SEli Cohen case IB_QPT_RC: 2343e126ba97SEli Cohen return "IB_QPT_RC"; 2344e126ba97SEli Cohen case IB_QPT_UC: 2345e126ba97SEli Cohen return "IB_QPT_UC"; 2346e126ba97SEli Cohen case IB_QPT_UD: 2347e126ba97SEli Cohen return "IB_QPT_UD"; 2348e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2349e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2350e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2351e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2352e126ba97SEli Cohen case IB_QPT_XRC_INI: 2353e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2354e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2355e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2356e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2357e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2358e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2359e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2360b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2361b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2362e126ba97SEli Cohen case IB_QPT_MAX: 2363e126ba97SEli Cohen default: 2364e126ba97SEli Cohen return "Invalid QP type"; 2365e126ba97SEli Cohen } 2366e126ba97SEli Cohen } 2367e126ba97SEli Cohen 2368b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2369b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 2370b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd) 2371b4aaa1f0SMoni Shoua { 2372b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2373b4aaa1f0SMoni Shoua int err = 0; 2374b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2375b4aaa1f0SMoni Shoua void *dctc; 2376b4aaa1f0SMoni Shoua 2377b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2378b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2379b4aaa1f0SMoni Shoua 2380b4aaa1f0SMoni Shoua err = get_qp_user_index(to_mucontext(pd->uobject->context), 2381b4aaa1f0SMoni Shoua ucmd, sizeof(*ucmd), &uidx); 2382b4aaa1f0SMoni Shoua if (err) 2383b4aaa1f0SMoni Shoua return ERR_PTR(err); 2384b4aaa1f0SMoni Shoua 2385b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2386b4aaa1f0SMoni Shoua if (!qp) 2387b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2388b4aaa1f0SMoni Shoua 2389b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2390b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2391b4aaa1f0SMoni Shoua err = -ENOMEM; 2392b4aaa1f0SMoni Shoua goto err_free; 2393b4aaa1f0SMoni Shoua } 2394b4aaa1f0SMoni Shoua 2395a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2396b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2397776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2398b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2399b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2400b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2401b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2402b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2403b4aaa1f0SMoni Shoua 24045d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 24055d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 24065d6ff1baSYonatan Cohen 2407b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2408b4aaa1f0SMoni Shoua 2409b4aaa1f0SMoni Shoua return &qp->ibqp; 2410b4aaa1f0SMoni Shoua err_free: 2411b4aaa1f0SMoni Shoua kfree(qp); 2412b4aaa1f0SMoni Shoua return ERR_PTR(err); 2413b4aaa1f0SMoni Shoua } 2414b4aaa1f0SMoni Shoua 2415b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2416e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2417b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2418b4aaa1f0SMoni Shoua struct ib_udata *udata) 2419b4aaa1f0SMoni Shoua { 2420b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2421b4aaa1f0SMoni Shoua int err; 2422b4aaa1f0SMoni Shoua 2423b4aaa1f0SMoni Shoua if (!udata) 2424b4aaa1f0SMoni Shoua return -EINVAL; 2425b4aaa1f0SMoni Shoua 2426b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2427b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2428b4aaa1f0SMoni Shoua return -EINVAL; 2429b4aaa1f0SMoni Shoua } 2430b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2431b4aaa1f0SMoni Shoua if (err) 2432b4aaa1f0SMoni Shoua return err; 2433b4aaa1f0SMoni Shoua 2434b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2435b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2436b4aaa1f0SMoni Shoua } else { 2437b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2438b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2439b4aaa1f0SMoni Shoua } else { 2440b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2441b4aaa1f0SMoni Shoua return -EINVAL; 2442b4aaa1f0SMoni Shoua } 2443b4aaa1f0SMoni Shoua } 2444b4aaa1f0SMoni Shoua 2445b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2446b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2447b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2448b4aaa1f0SMoni Shoua } 2449b4aaa1f0SMoni Shoua 2450b4aaa1f0SMoni Shoua return 0; 2451b4aaa1f0SMoni Shoua } 2452b4aaa1f0SMoni Shoua 2453b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2454b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2455e126ba97SEli Cohen struct ib_udata *udata) 2456e126ba97SEli Cohen { 2457e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2458e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2459e126ba97SEli Cohen u16 xrcdn = 0; 2460e126ba97SEli Cohen int err; 2461b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2462b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 2463e126ba97SEli Cohen 2464e126ba97SEli Cohen if (pd) { 2465e126ba97SEli Cohen dev = to_mdev(pd->device); 24660fb2ed66Smajd@mellanox.com 24670fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 24680fb2ed66Smajd@mellanox.com if (!pd->uobject) { 24690fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 24700fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 24710fb2ed66Smajd@mellanox.com } else if (!to_mucontext(pd->uobject->context)->cqe_version) { 24720fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 24730fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 24740fb2ed66Smajd@mellanox.com } 24750fb2ed66Smajd@mellanox.com } 247609f16cf5SMajd Dibbiny } else { 247709f16cf5SMajd Dibbiny /* being cautious here */ 247809f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 247909f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 248009f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 248109f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 248209f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 248309f16cf5SMajd Dibbiny } 248409f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2485e126ba97SEli Cohen } 2486e126ba97SEli Cohen 2487b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2488b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2489b4aaa1f0SMoni Shoua 2490b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2491b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2492b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2493b4aaa1f0SMoni Shoua if (err) 2494b4aaa1f0SMoni Shoua return ERR_PTR(err); 2495c32a4f29SMoni Shoua 2496c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2497c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2498c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2499c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2500c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2501c32a4f29SMoni Shoua } 2502776a3906SMoni Shoua } else { 2503776a3906SMoni Shoua return mlx5_ib_create_dct(pd, init_attr, &ucmd); 2504c32a4f29SMoni Shoua } 2505b4aaa1f0SMoni Shoua } 2506b4aaa1f0SMoni Shoua 2507e126ba97SEli Cohen switch (init_attr->qp_type) { 2508e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2509e126ba97SEli Cohen case IB_QPT_XRC_INI: 2510938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2511e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2512e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2513e126ba97SEli Cohen } 2514e126ba97SEli Cohen init_attr->recv_cq = NULL; 2515e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2516e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2517e126ba97SEli Cohen init_attr->send_cq = NULL; 2518e126ba97SEli Cohen } 2519e126ba97SEli Cohen 2520e126ba97SEli Cohen /* fall through */ 25210fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2522e126ba97SEli Cohen case IB_QPT_RC: 2523e126ba97SEli Cohen case IB_QPT_UC: 2524e126ba97SEli Cohen case IB_QPT_UD: 2525e126ba97SEli Cohen case IB_QPT_SMI: 2526d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2527e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2528c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2529e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2530e126ba97SEli Cohen if (!qp) 2531e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2532e126ba97SEli Cohen 2533e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2534e126ba97SEli Cohen if (err) { 2535e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2536e126ba97SEli Cohen kfree(qp); 2537e126ba97SEli Cohen return ERR_PTR(err); 2538e126ba97SEli Cohen } 2539e126ba97SEli Cohen 2540e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2541e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2542e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2543e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2544e126ba97SEli Cohen else 254519098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2546e126ba97SEli Cohen 2547e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 254819098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2549a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2550a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2551e126ba97SEli Cohen 255219098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2553e126ba97SEli Cohen 2554e126ba97SEli Cohen break; 2555e126ba97SEli Cohen 2556d16e91daSHaggai Eran case IB_QPT_GSI: 2557d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2558d16e91daSHaggai Eran 2559e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2560e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2561e126ba97SEli Cohen case IB_QPT_MAX: 2562e126ba97SEli Cohen default: 2563e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2564e126ba97SEli Cohen init_attr->qp_type); 2565e126ba97SEli Cohen /* Don't support raw QPs */ 2566e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2567e126ba97SEli Cohen } 2568e126ba97SEli Cohen 2569b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2570b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2571b4aaa1f0SMoni Shoua 2572e126ba97SEli Cohen return &qp->ibqp; 2573e126ba97SEli Cohen } 2574e126ba97SEli Cohen 2575776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2576776a3906SMoni Shoua { 2577776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2578776a3906SMoni Shoua 2579776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2580776a3906SMoni Shoua int err; 2581776a3906SMoni Shoua 2582776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2583776a3906SMoni Shoua if (err) { 2584776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2585776a3906SMoni Shoua return err; 2586776a3906SMoni Shoua } 2587776a3906SMoni Shoua } 2588776a3906SMoni Shoua 2589776a3906SMoni Shoua kfree(mqp->dct.in); 2590776a3906SMoni Shoua kfree(mqp); 2591776a3906SMoni Shoua return 0; 2592776a3906SMoni Shoua } 2593776a3906SMoni Shoua 2594e126ba97SEli Cohen int mlx5_ib_destroy_qp(struct ib_qp *qp) 2595e126ba97SEli Cohen { 2596e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2597e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2598e126ba97SEli Cohen 2599d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2600d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2601d16e91daSHaggai Eran 2602776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2603776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2604776a3906SMoni Shoua 2605e126ba97SEli Cohen destroy_qp_common(dev, mqp); 2606e126ba97SEli Cohen 2607e126ba97SEli Cohen kfree(mqp); 2608e126ba97SEli Cohen 2609e126ba97SEli Cohen return 0; 2610e126ba97SEli Cohen } 2611e126ba97SEli Cohen 2612a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2613a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2614a60109dcSYonatan Cohen int attr_mask, __be32 *hw_access_flags) 2615e126ba97SEli Cohen { 2616e126ba97SEli Cohen u8 dest_rd_atomic; 2617e126ba97SEli Cohen u32 access_flags; 2618e126ba97SEli Cohen 2619a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2620a60109dcSYonatan Cohen 2621e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2622e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2623e126ba97SEli Cohen else 262419098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2625e126ba97SEli Cohen 2626e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2627e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2628e126ba97SEli Cohen else 262919098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2630e126ba97SEli Cohen 2631e126ba97SEli Cohen if (!dest_rd_atomic) 2632e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2633e126ba97SEli Cohen 2634e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2635a60109dcSYonatan Cohen *hw_access_flags |= MLX5_QP_BIT_RRE; 2636a60109dcSYonatan Cohen if ((access_flags & IB_ACCESS_REMOTE_ATOMIC) && 2637a60109dcSYonatan Cohen qp->ibqp.qp_type == IB_QPT_RC) { 2638a60109dcSYonatan Cohen int atomic_mode; 2639e126ba97SEli Cohen 2640a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2641a60109dcSYonatan Cohen if (atomic_mode < 0) 2642a60109dcSYonatan Cohen return -EOPNOTSUPP; 2643a60109dcSYonatan Cohen 2644a60109dcSYonatan Cohen *hw_access_flags |= MLX5_QP_BIT_RAE; 2645a60109dcSYonatan Cohen *hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2646a60109dcSYonatan Cohen } 2647a60109dcSYonatan Cohen 2648a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2649a60109dcSYonatan Cohen *hw_access_flags |= MLX5_QP_BIT_RWE; 2650a60109dcSYonatan Cohen 2651a60109dcSYonatan Cohen *hw_access_flags = cpu_to_be32(*hw_access_flags); 2652a60109dcSYonatan Cohen 2653a60109dcSYonatan Cohen return 0; 2654e126ba97SEli Cohen } 2655e126ba97SEli Cohen 2656e126ba97SEli Cohen enum { 2657e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2658e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2659e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2660e126ba97SEli Cohen }; 2661e126ba97SEli Cohen 2662e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2663e126ba97SEli Cohen { 26644f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2665e126ba97SEli Cohen return 0; 26664f32ac2eSDanit Goldberg 26674f32ac2eSDanit Goldberg if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_300_GBPS) 2668e126ba97SEli Cohen return -EINVAL; 26694f32ac2eSDanit Goldberg 26704f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2671e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2672938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2673e126ba97SEli Cohen --rate; 2674e126ba97SEli Cohen 26754f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2676e126ba97SEli Cohen } 2677e126ba97SEli Cohen 267875850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 26791cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 26801cd6dbd3SYishai Hadas struct ib_pd *pd) 268175850d0bSmajd@mellanox.com { 268275850d0bSmajd@mellanox.com void *in; 268375850d0bSmajd@mellanox.com void *tisc; 268475850d0bSmajd@mellanox.com int inlen; 268575850d0bSmajd@mellanox.com int err; 268675850d0bSmajd@mellanox.com 268775850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 26881b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 268975850d0bSmajd@mellanox.com if (!in) 269075850d0bSmajd@mellanox.com return -ENOMEM; 269175850d0bSmajd@mellanox.com 269275850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 26931cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 269475850d0bSmajd@mellanox.com 269575850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 269675850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 269775850d0bSmajd@mellanox.com 269875850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 269975850d0bSmajd@mellanox.com 270075850d0bSmajd@mellanox.com kvfree(in); 270175850d0bSmajd@mellanox.com 270275850d0bSmajd@mellanox.com return err; 270375850d0bSmajd@mellanox.com } 270475850d0bSmajd@mellanox.com 270513eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 27061cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 27071cd6dbd3SYishai Hadas struct ib_pd *pd) 270813eab21fSAviv Heller { 270913eab21fSAviv Heller void *in; 271013eab21fSAviv Heller void *tisc; 271113eab21fSAviv Heller int inlen; 271213eab21fSAviv Heller int err; 271313eab21fSAviv Heller 271413eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 27151b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 271613eab21fSAviv Heller if (!in) 271713eab21fSAviv Heller return -ENOMEM; 271813eab21fSAviv Heller 271913eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 27201cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 272113eab21fSAviv Heller 272213eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 272313eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 272413eab21fSAviv Heller 272513eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 272613eab21fSAviv Heller 272713eab21fSAviv Heller kvfree(in); 272813eab21fSAviv Heller 272913eab21fSAviv Heller return err; 273013eab21fSAviv Heller } 273113eab21fSAviv Heller 273275850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 273390898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2734e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2735f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2736f879ee8dSAchiad Shochat bool alt) 2737e126ba97SEli Cohen { 2738d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2739e126ba97SEli Cohen int err; 2740ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2741d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2742d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2743e126ba97SEli Cohen 2744e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2745f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2746f879ee8dSAchiad Shochat attr->pkey_index); 2747e126ba97SEli Cohen 2748d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2749d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2750938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2751f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2752d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2753938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2754f83b4263SEli Cohen return -EINVAL; 2755f83b4263SEli Cohen } 27562811ba51SAchiad Shochat } 275744c58487SDasaratharaman Chandramouli 275844c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2759d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 27602811ba51SAchiad Shochat return -EINVAL; 276147ec3866SParav Pandit 276244c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 27632b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 27642b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 27652b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 27662b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 276747ec3866SParav Pandit path->udp_sport = 276847ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2769d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 277047ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2771ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2772d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 27732811ba51SAchiad Shochat } else { 2774d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2775d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2776d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2777d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2778d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2779d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2780e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2781d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 27822811ba51SAchiad Shochat } 27832811ba51SAchiad Shochat 2784d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2785d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2786d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2787e126ba97SEli Cohen path->tclass_flowlabel = 2788d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2789d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2790d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2791e126ba97SEli Cohen } 2792e126ba97SEli Cohen 2793d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2794e126ba97SEli Cohen if (err < 0) 2795e126ba97SEli Cohen return err; 2796e126ba97SEli Cohen path->static_rate = err; 2797e126ba97SEli Cohen path->port = port; 2798e126ba97SEli Cohen 2799e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2800f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2801e126ba97SEli Cohen 280275850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 280375850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 280475850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 28051cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 280675850d0bSmajd@mellanox.com 2807e126ba97SEli Cohen return 0; 2808e126ba97SEli Cohen } 2809e126ba97SEli Cohen 2810e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2811e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2812e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2813e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2814e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2815e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2816e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2817e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2818e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2819e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2820e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2821e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2822e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2823e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2824e126ba97SEli Cohen }, 2825e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2826e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2827e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2828e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2829e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2830e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2831e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2832e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2833e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2834e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2835e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2836e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 2837e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 2838a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2839a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 2840a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2841a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2842a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 2843e126ba97SEli Cohen }, 2844e126ba97SEli Cohen }, 2845e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 2846e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2847e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2848e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 2849e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2850e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2851e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2852e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 2853e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 2854e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2855e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 2856e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2857e126ba97SEli Cohen }, 2858e126ba97SEli Cohen }, 2859e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2860e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2861e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2862e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2863e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2864e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 2865c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2866c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2867e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2868c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 2869c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 2870e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 2871e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 2872e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 2873e126ba97SEli Cohen }, 2874e126ba97SEli Cohen }, 2875e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 2876e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 2877e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 2878e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 287975959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 2880a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 2881a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 2882a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 2883a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 2884e126ba97SEli Cohen }, 2885e126ba97SEli Cohen }, 2886e126ba97SEli Cohen }; 2887e126ba97SEli Cohen 2888e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 2889e126ba97SEli Cohen { 2890e126ba97SEli Cohen switch (ib_mask) { 2891e126ba97SEli Cohen case IB_QP_STATE: 2892e126ba97SEli Cohen return 0; 2893e126ba97SEli Cohen case IB_QP_CUR_STATE: 2894e126ba97SEli Cohen return 0; 2895e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 2896e126ba97SEli Cohen return 0; 2897e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 2898e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 2899e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 2900e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 2901e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 2902e126ba97SEli Cohen case IB_QP_PORT: 2903e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 2904e126ba97SEli Cohen case IB_QP_QKEY: 2905e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 2906e126ba97SEli Cohen case IB_QP_AV: 2907e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 2908e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 2909e126ba97SEli Cohen case IB_QP_PATH_MTU: 2910e126ba97SEli Cohen return 0; 2911e126ba97SEli Cohen case IB_QP_TIMEOUT: 2912e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 2913e126ba97SEli Cohen case IB_QP_RETRY_CNT: 2914e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 2915e126ba97SEli Cohen case IB_QP_RNR_RETRY: 2916e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 2917e126ba97SEli Cohen case IB_QP_RQ_PSN: 2918e126ba97SEli Cohen return 0; 2919e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 2920e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 2921e126ba97SEli Cohen case IB_QP_ALT_PATH: 2922e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 2923e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 2924e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 2925e126ba97SEli Cohen case IB_QP_SQ_PSN: 2926e126ba97SEli Cohen return 0; 2927e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 2928e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 2929e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 2930e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 2931e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 2932e126ba97SEli Cohen case IB_QP_CAP: 2933e126ba97SEli Cohen return 0; 2934e126ba97SEli Cohen case IB_QP_DEST_QPN: 2935e126ba97SEli Cohen return 0; 2936e126ba97SEli Cohen } 2937e126ba97SEli Cohen return 0; 2938e126ba97SEli Cohen } 2939e126ba97SEli Cohen 2940e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 2941e126ba97SEli Cohen { 2942e126ba97SEli Cohen int result = 0; 2943e126ba97SEli Cohen int i; 2944e126ba97SEli Cohen 2945e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 2946e126ba97SEli Cohen if ((1 << i) & ib_mask) 2947e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 2948e126ba97SEli Cohen } 2949e126ba97SEli Cohen 2950e126ba97SEli Cohen return result; 2951e126ba97SEli Cohen } 2952e126ba97SEli Cohen 295334d57585SYishai Hadas static int modify_raw_packet_qp_rq( 295434d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 295534d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2956ad5f8e96Smajd@mellanox.com { 2957ad5f8e96Smajd@mellanox.com void *in; 2958ad5f8e96Smajd@mellanox.com void *rqc; 2959ad5f8e96Smajd@mellanox.com int inlen; 2960ad5f8e96Smajd@mellanox.com int err; 2961ad5f8e96Smajd@mellanox.com 2962ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 29631b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2964ad5f8e96Smajd@mellanox.com if (!in) 2965ad5f8e96Smajd@mellanox.com return -ENOMEM; 2966ad5f8e96Smajd@mellanox.com 2967ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 296834d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 2969ad5f8e96Smajd@mellanox.com 2970ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 2971ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 2972ad5f8e96Smajd@mellanox.com 2973eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 2974eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 2975eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 297623a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 2977eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 2978eb49ab0cSAlex Vesker } else 29795a738b5dSJason Gunthorpe dev_info_once( 29805a738b5dSJason Gunthorpe &dev->ib_dev.dev, 29815a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 2982eb49ab0cSAlex Vesker } 2983eb49ab0cSAlex Vesker 2984eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 2985ad5f8e96Smajd@mellanox.com if (err) 2986ad5f8e96Smajd@mellanox.com goto out; 2987ad5f8e96Smajd@mellanox.com 2988ad5f8e96Smajd@mellanox.com rq->state = new_state; 2989ad5f8e96Smajd@mellanox.com 2990ad5f8e96Smajd@mellanox.com out: 2991ad5f8e96Smajd@mellanox.com kvfree(in); 2992ad5f8e96Smajd@mellanox.com return err; 2993ad5f8e96Smajd@mellanox.com } 2994ad5f8e96Smajd@mellanox.com 2995c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 2996c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 2997c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 2998ad5f8e96Smajd@mellanox.com { 29997d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 300061147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 300161147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 300261147f39SBodong Wang bool new_rate_added = false; 30037d29f349SBodong Wang u16 rl_index = 0; 3004ad5f8e96Smajd@mellanox.com void *in; 3005ad5f8e96Smajd@mellanox.com void *sqc; 3006ad5f8e96Smajd@mellanox.com int inlen; 3007ad5f8e96Smajd@mellanox.com int err; 3008ad5f8e96Smajd@mellanox.com 3009ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 30101b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3011ad5f8e96Smajd@mellanox.com if (!in) 3012ad5f8e96Smajd@mellanox.com return -ENOMEM; 3013ad5f8e96Smajd@mellanox.com 3014c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3015ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3016ad5f8e96Smajd@mellanox.com 3017ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3018ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3019ad5f8e96Smajd@mellanox.com 30207d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 30217d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 30227d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 30237d29f349SBodong Wang __func__); 30247d29f349SBodong Wang else 302561147f39SBodong Wang new_rl = raw_qp_param->rl; 30267d29f349SBodong Wang } 3027ad5f8e96Smajd@mellanox.com 302861147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 302961147f39SBodong Wang if (new_rl.rate) { 303061147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 30317d29f349SBodong Wang if (err) { 303261147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 303361147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 303461147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 303561147f39SBodong Wang new_rl.typical_pkt_sz); 303661147f39SBodong Wang 30377d29f349SBodong Wang goto out; 30387d29f349SBodong Wang } 303961147f39SBodong Wang new_rate_added = true; 30407d29f349SBodong Wang } 30417d29f349SBodong Wang 30427d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 304361147f39SBodong Wang /* index 0 means no limit */ 30447d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 30457d29f349SBodong Wang } 30467d29f349SBodong Wang 30477d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 30487d29f349SBodong Wang if (err) { 30497d29f349SBodong Wang /* Remove new rate from table if failed */ 305061147f39SBodong Wang if (new_rate_added) 305161147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 30527d29f349SBodong Wang goto out; 30537d29f349SBodong Wang } 30547d29f349SBodong Wang 30557d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 305661147f39SBodong Wang if ((old_rl.rate && 305761147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 30587d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 305961147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 30607d29f349SBodong Wang 306161147f39SBodong Wang ibqp->rl = new_rl; 3062ad5f8e96Smajd@mellanox.com sq->state = new_state; 3063ad5f8e96Smajd@mellanox.com 3064ad5f8e96Smajd@mellanox.com out: 3065ad5f8e96Smajd@mellanox.com kvfree(in); 3066ad5f8e96Smajd@mellanox.com return err; 3067ad5f8e96Smajd@mellanox.com } 3068ad5f8e96Smajd@mellanox.com 3069ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 307013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 307113eab21fSAviv Heller u8 tx_affinity) 3072ad5f8e96Smajd@mellanox.com { 3073ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3074ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3075ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 30767d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 30777d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3078ad5f8e96Smajd@mellanox.com int rq_state; 3079ad5f8e96Smajd@mellanox.com int sq_state; 3080ad5f8e96Smajd@mellanox.com int err; 3081ad5f8e96Smajd@mellanox.com 30820680efa2SAlex Vesker switch (raw_qp_param->operation) { 3083ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3084ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3085ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3086ad5f8e96Smajd@mellanox.com break; 3087ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3088ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3089ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3090ad5f8e96Smajd@mellanox.com break; 3091ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3092ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3093ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3094ad5f8e96Smajd@mellanox.com break; 3095ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3096ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 30977d29f349SBodong Wang if (raw_qp_param->set_mask == 30987d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 30997d29f349SBodong Wang modify_rq = 0; 31007d29f349SBodong Wang sq_state = sq->state; 31017d29f349SBodong Wang } else { 31027d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 31037d29f349SBodong Wang } 31047d29f349SBodong Wang break; 31057d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 31067d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3107eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3108eb49ab0cSAlex Vesker return -EINVAL; 3109eb49ab0cSAlex Vesker else 3110ad5f8e96Smajd@mellanox.com return 0; 3111ad5f8e96Smajd@mellanox.com default: 3112ad5f8e96Smajd@mellanox.com WARN_ON(1); 3113ad5f8e96Smajd@mellanox.com return -EINVAL; 3114ad5f8e96Smajd@mellanox.com } 3115ad5f8e96Smajd@mellanox.com 31167d29f349SBodong Wang if (modify_rq) { 311734d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 311834d57585SYishai Hadas qp->ibqp.pd); 3119ad5f8e96Smajd@mellanox.com if (err) 3120ad5f8e96Smajd@mellanox.com return err; 3121ad5f8e96Smajd@mellanox.com } 3122ad5f8e96Smajd@mellanox.com 31237d29f349SBodong Wang if (modify_sq) { 312413eab21fSAviv Heller if (tx_affinity) { 312513eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 31261cd6dbd3SYishai Hadas tx_affinity, 31271cd6dbd3SYishai Hadas qp->ibqp.pd); 312813eab21fSAviv Heller if (err) 312913eab21fSAviv Heller return err; 313013eab21fSAviv Heller } 313113eab21fSAviv Heller 3132c14003f0SYishai Hadas return modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3133c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 313413eab21fSAviv Heller } 3135ad5f8e96Smajd@mellanox.com 3136ad5f8e96Smajd@mellanox.com return 0; 3137ad5f8e96Smajd@mellanox.com } 3138ad5f8e96Smajd@mellanox.com 3139c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3140c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3141c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 3142c6a21c38SMajd Dibbiny u8 port_num) 3143c6a21c38SMajd Dibbiny { 3144c6a21c38SMajd Dibbiny struct mlx5_ib_ucontext *ucontext = NULL; 3145c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3146c6a21c38SMajd Dibbiny 3147c6a21c38SMajd Dibbiny if (pd && pd->ibpd.uobject && pd->ibpd.uobject->context) 3148c6a21c38SMajd Dibbiny ucontext = to_mucontext(pd->ibpd.uobject->context); 3149c6a21c38SMajd Dibbiny 3150c6a21c38SMajd Dibbiny if (ucontext) { 3151c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3152c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3153c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3154c6a21c38SMajd Dibbiny 1; 3155c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3156c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3157c6a21c38SMajd Dibbiny } else { 3158c6a21c38SMajd Dibbiny tx_port_affinity = 3159c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 3160c6a21c38SMajd Dibbiny 1, &dev->roce[port_num].tx_port_affinity) % 3161c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3162c6a21c38SMajd Dibbiny 1; 3163c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3164c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3165c6a21c38SMajd Dibbiny } 3166c6a21c38SMajd Dibbiny 3167c6a21c38SMajd Dibbiny return tx_port_affinity; 3168c6a21c38SMajd Dibbiny } 3169c6a21c38SMajd Dibbiny 3170e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3171e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 317261147f39SBodong Wang enum ib_qp_state cur_state, enum ib_qp_state new_state, 317361147f39SBodong Wang const struct mlx5_ib_modify_qp *ucmd) 3174e126ba97SEli Cohen { 3175427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3176427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3177427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3178427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3179427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3180427c1e7bSmajd@mellanox.com }, 3181427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3182427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3183427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3184427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3185427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3186427c1e7bSmajd@mellanox.com }, 3187427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3188427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3189427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3190427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3191427c1e7bSmajd@mellanox.com }, 3192427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3193427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3194427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3195427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3196427c1e7bSmajd@mellanox.com }, 3197427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3198427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3199427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3200427c1e7bSmajd@mellanox.com }, 3201427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3202427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3203427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3204427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3205427c1e7bSmajd@mellanox.com }, 3206427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3207427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3208427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3209427c1e7bSmajd@mellanox.com } 3210427c1e7bSmajd@mellanox.com }; 3211427c1e7bSmajd@mellanox.com 3212e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3213e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 321419098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3215e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3216e126ba97SEli Cohen struct mlx5_qp_context *context; 3217e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3218eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3219e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3220e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3221e126ba97SEli Cohen int mlx5_st; 3222e126ba97SEli Cohen int err; 3223427c1e7bSmajd@mellanox.com u16 op; 322413eab21fSAviv Heller u8 tx_affinity = 0; 3225e126ba97SEli Cohen 322655de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 322755de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 322855de9a77SLeon Romanovsky if (mlx5_st < 0) 322955de9a77SLeon Romanovsky return -EINVAL; 323055de9a77SLeon Romanovsky 32311a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 32321a412fb1SSaeed Mahameed if (!context) 3233e126ba97SEli Cohen return -ENOMEM; 3234e126ba97SEli Cohen 3235c6a21c38SMajd Dibbiny pd = get_pd(qp); 323655de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3237e126ba97SEli Cohen 3238e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3239e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3240e126ba97SEli Cohen } else { 3241e126ba97SEli Cohen switch (attr->path_mig_state) { 3242e126ba97SEli Cohen case IB_MIG_MIGRATED: 3243e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3244e126ba97SEli Cohen break; 3245e126ba97SEli Cohen case IB_MIG_REARM: 3246e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3247e126ba97SEli Cohen break; 3248e126ba97SEli Cohen case IB_MIG_ARMED: 3249e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3250e126ba97SEli Cohen break; 3251e126ba97SEli Cohen } 3252e126ba97SEli Cohen } 3253e126ba97SEli Cohen 325413eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 325513eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 325613eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 325713eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 325813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 325913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 326013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 326113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 326213eab21fSAviv Heller if (mlx5_lag_is_active(dev->mdev)) { 32637fd8aefbSDaniel Jurgens u8 p = mlx5_core_native_port_num(dev->mdev); 3264c6a21c38SMajd Dibbiny tx_affinity = get_tx_affinity(dev, pd, base, p); 326513eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 326613eab21fSAviv Heller } 326713eab21fSAviv Heller } 326813eab21fSAviv Heller } 326913eab21fSAviv Heller 3270d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3271e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3272c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3273c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3274e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3275e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3276e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3277e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3278e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3279e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3280e126ba97SEli Cohen err = -EINVAL; 3281e126ba97SEli Cohen goto out; 3282e126ba97SEli Cohen } 3283938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3284938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3285e126ba97SEli Cohen } 3286e126ba97SEli Cohen 3287e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3288e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3289e126ba97SEli Cohen 3290e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3291d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3292e126ba97SEli Cohen 3293e126ba97SEli Cohen /* todo implement counter_index functionality */ 3294e126ba97SEli Cohen 3295e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3296e126ba97SEli Cohen context->pri_path.port = qp->port; 3297e126ba97SEli Cohen 3298e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3299e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3300e126ba97SEli Cohen 3301e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 330275850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3303e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3304f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3305e126ba97SEli Cohen if (err) 3306e126ba97SEli Cohen goto out; 3307e126ba97SEli Cohen } 3308e126ba97SEli Cohen 3309e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3310e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3311e126ba97SEli Cohen 3312e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 331375850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 331475850d0bSmajd@mellanox.com &context->alt_path, 3315f879ee8dSAchiad Shochat attr->alt_port_num, 3316f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3317f879ee8dSAchiad Shochat 0, attr, true); 3318e126ba97SEli Cohen if (err) 3319e126ba97SEli Cohen goto out; 3320e126ba97SEli Cohen } 3321e126ba97SEli Cohen 332289ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 332389ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3324e126ba97SEli Cohen 3325e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3326e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3327e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3328e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3329e126ba97SEli Cohen 3330e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3331e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3332e126ba97SEli Cohen 3333e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3334e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3335e126ba97SEli Cohen 3336e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3337e126ba97SEli Cohen if (attr->max_rd_atomic) 3338e126ba97SEli Cohen context->params1 |= 3339e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3340e126ba97SEli Cohen } 3341e126ba97SEli Cohen 3342e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3343e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3344e126ba97SEli Cohen 3345e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3346e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3347e126ba97SEli Cohen context->params2 |= 3348e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3349e126ba97SEli Cohen } 3350e126ba97SEli Cohen 3351a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3352a60109dcSYonatan Cohen __be32 access_flags = 0; 3353a60109dcSYonatan Cohen 3354a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3355a60109dcSYonatan Cohen if (err) 3356a60109dcSYonatan Cohen goto out; 3357a60109dcSYonatan Cohen 3358a60109dcSYonatan Cohen context->params2 |= access_flags; 3359a60109dcSYonatan Cohen } 3360e126ba97SEli Cohen 3361e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3362e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3363e126ba97SEli Cohen 3364e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3365e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3366e126ba97SEli Cohen 3367e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3368e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3369e126ba97SEli Cohen 3370e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3371e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3372e126ba97SEli Cohen 33730837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 33740837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 33750837e86aSMark Bloch qp->port) - 1; 3376c2e53b2cSYishai Hadas 3377c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3378c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3379c2e53b2cSYishai Hadas port_num = 0; 3380c2e53b2cSYishai Hadas 3381eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 33820837e86aSMark Bloch context->qp_counter_set_usr_page |= 3383e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 33840837e86aSMark Bloch } 33850837e86aSMark Bloch 3386e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3387e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3388e126ba97SEli Cohen 3389b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3390b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3391e126ba97SEli Cohen 3392e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3393e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3394e126ba97SEli Cohen 3395427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 33965d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 33975d414b17SDan Carpenter err = -EINVAL; 3398427c1e7bSmajd@mellanox.com goto out; 33995d414b17SDan Carpenter } 3400427c1e7bSmajd@mellanox.com 3401427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3402e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3403e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3404ad5f8e96Smajd@mellanox.com 3405c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3406c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 34070680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 34080680efa2SAlex Vesker 34090680efa2SAlex Vesker raw_qp_param.operation = op; 3410eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3411e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3412eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3413eb49ab0cSAlex Vesker } 34147d29f349SBodong Wang 34157d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 341661147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 341761147f39SBodong Wang 341861147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 341961147f39SBodong Wang if (attr->rate_limit && 342061147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 342161147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 342261147f39SBodong Wang ucmd->burst_info.max_burst_sz; 342361147f39SBodong Wang } else { 342461147f39SBodong Wang err = -EINVAL; 342561147f39SBodong Wang goto out; 342661147f39SBodong Wang } 342761147f39SBodong Wang } 342861147f39SBodong Wang 342961147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 343061147f39SBodong Wang if (attr->rate_limit && 343161147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 343261147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 343361147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 343461147f39SBodong Wang } else { 343561147f39SBodong Wang err = -EINVAL; 343661147f39SBodong Wang goto out; 343761147f39SBodong Wang } 343861147f39SBodong Wang } 343961147f39SBodong Wang 34407d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 34417d29f349SBodong Wang } 34427d29f349SBodong Wang 344313eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 34440680efa2SAlex Vesker } else { 34451a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 344619098df2Smajd@mellanox.com &base->mqp); 34470680efa2SAlex Vesker } 34480680efa2SAlex Vesker 3449e126ba97SEli Cohen if (err) 3450e126ba97SEli Cohen goto out; 3451e126ba97SEli Cohen 3452e126ba97SEli Cohen qp->state = new_state; 3453e126ba97SEli Cohen 3454e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 345519098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3456e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 345719098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3458e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3459e126ba97SEli Cohen qp->port = attr->port_num; 3460e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 346119098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3462e126ba97SEli Cohen 3463e126ba97SEli Cohen /* 3464e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3465e126ba97SEli Cohen * entries and reinitialize the QP. 3466e126ba97SEli Cohen */ 346775a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 346875a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 346919098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3470e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3471e126ba97SEli Cohen if (send_cq != recv_cq) 347219098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3473e126ba97SEli Cohen 3474e126ba97SEli Cohen qp->rq.head = 0; 3475e126ba97SEli Cohen qp->rq.tail = 0; 3476e126ba97SEli Cohen qp->sq.head = 0; 3477e126ba97SEli Cohen qp->sq.tail = 0; 3478e126ba97SEli Cohen qp->sq.cur_post = 0; 3479e126ba97SEli Cohen qp->sq.last_poll = 0; 3480e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3481e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3482e126ba97SEli Cohen } 3483e126ba97SEli Cohen 3484e126ba97SEli Cohen out: 34851a412fb1SSaeed Mahameed kfree(context); 3486e126ba97SEli Cohen return err; 3487e126ba97SEli Cohen } 3488e126ba97SEli Cohen 3489c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3490c32a4f29SMoni Shoua { 3491c32a4f29SMoni Shoua if ((mask & req) != req) 3492c32a4f29SMoni Shoua return false; 3493c32a4f29SMoni Shoua 3494c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3495c32a4f29SMoni Shoua return false; 3496c32a4f29SMoni Shoua 3497c32a4f29SMoni Shoua return true; 3498c32a4f29SMoni Shoua } 3499c32a4f29SMoni Shoua 3500c32a4f29SMoni Shoua /* check valid transition for driver QP types 3501c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3502c32a4f29SMoni Shoua */ 3503c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3504c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3505c32a4f29SMoni Shoua { 3506c32a4f29SMoni Shoua int req = IB_QP_STATE; 3507c32a4f29SMoni Shoua int opt = 0; 3508c32a4f29SMoni Shoua 350999ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 351099ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 351199ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3512c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3513c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3514c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3515c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3516c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3517c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3518c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 3519c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX; 3520c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3521c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3522c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3523c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3524c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3525c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3526c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3527c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3528c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3529c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3530c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3531c32a4f29SMoni Shoua } 3532c32a4f29SMoni Shoua return false; 3533c32a4f29SMoni Shoua } 3534c32a4f29SMoni Shoua 3535776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3536776a3906SMoni Shoua * valid transitions are: 3537776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3538776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3539776a3906SMoni Shoua * mtu, gid_index and hop_limit 3540776a3906SMoni Shoua * Other transitions and attributes are illegal 3541776a3906SMoni Shoua */ 3542776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3543776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3544776a3906SMoni Shoua { 3545776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3546776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3547776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3548776a3906SMoni Shoua int err = 0; 3549776a3906SMoni Shoua int required = IB_QP_STATE; 3550776a3906SMoni Shoua void *dctc; 3551776a3906SMoni Shoua 3552776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3553776a3906SMoni Shoua return -EINVAL; 3554776a3906SMoni Shoua 3555776a3906SMoni Shoua cur_state = qp->state; 3556776a3906SMoni Shoua new_state = attr->qp_state; 3557776a3906SMoni Shoua 3558776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3559776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3560776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3561776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3562776a3906SMoni Shoua return -EINVAL; 3563776a3906SMoni Shoua 3564776a3906SMoni Shoua if (attr->port_num == 0 || 3565776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3566776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3567776a3906SMoni Shoua attr->port_num, dev->num_ports); 3568776a3906SMoni Shoua return -EINVAL; 3569776a3906SMoni Shoua } 3570776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3571776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3572776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3573776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3574776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3575a60109dcSYonatan Cohen int atomic_mode; 3576a60109dcSYonatan Cohen 3577a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3578a60109dcSYonatan Cohen if (atomic_mode < 0) 3579776a3906SMoni Shoua return -EOPNOTSUPP; 3580a60109dcSYonatan Cohen 3581a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3582776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3583776a3906SMoni Shoua } 3584776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3585776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3586776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3587776a3906SMoni Shoua 3588776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3589776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3590776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3591776a3906SMoni Shoua sizeof(resp.dctn); 3592776a3906SMoni Shoua 3593776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3594776a3906SMoni Shoua return -EINVAL; 3595776a3906SMoni Shoua resp.response_length = min_resp_len; 3596776a3906SMoni Shoua 3597776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3598776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3599776a3906SMoni Shoua return -EINVAL; 3600776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3601776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3602776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3603776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3604776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3605776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3606776a3906SMoni Shoua 3607776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3608776a3906SMoni Shoua MLX5_ST_SZ_BYTES(create_dct_in)); 3609776a3906SMoni Shoua if (err) 3610776a3906SMoni Shoua return err; 3611776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3612776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3613776a3906SMoni Shoua if (err) { 3614776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3615776a3906SMoni Shoua return err; 3616776a3906SMoni Shoua } 3617776a3906SMoni Shoua } else { 3618776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3619776a3906SMoni Shoua return -EINVAL; 3620776a3906SMoni Shoua } 3621776a3906SMoni Shoua if (err) 3622776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3623776a3906SMoni Shoua else 3624776a3906SMoni Shoua qp->state = new_state; 3625776a3906SMoni Shoua return err; 3626776a3906SMoni Shoua } 3627776a3906SMoni Shoua 3628e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3629e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3630e126ba97SEli Cohen { 3631e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3632e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 363361147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3634d16e91daSHaggai Eran enum ib_qp_type qp_type; 3635e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 363661147f39SBodong Wang size_t required_cmd_sz; 3637e126ba97SEli Cohen int err = -EINVAL; 3638e126ba97SEli Cohen int port; 3639e126ba97SEli Cohen 364028d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 364128d61370SYishai Hadas return -ENOSYS; 364228d61370SYishai Hadas 364361147f39SBodong Wang if (udata && udata->inlen) { 364461147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 364561147f39SBodong Wang sizeof(ucmd.reserved); 364661147f39SBodong Wang if (udata->inlen < required_cmd_sz) 364761147f39SBodong Wang return -EINVAL; 364861147f39SBodong Wang 364961147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 365061147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 365161147f39SBodong Wang udata->inlen - sizeof(ucmd))) 365261147f39SBodong Wang return -EOPNOTSUPP; 365361147f39SBodong Wang 365461147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 365561147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 365661147f39SBodong Wang return -EFAULT; 365761147f39SBodong Wang 365861147f39SBodong Wang if (ucmd.comp_mask || 365961147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 366061147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 366161147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 366261147f39SBodong Wang return -EOPNOTSUPP; 366361147f39SBodong Wang } 366461147f39SBodong Wang 3665d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3666d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3667d16e91daSHaggai Eran 3668c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3669c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3670c32a4f29SMoni Shoua else 3671d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3672d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3673d16e91daSHaggai Eran 3674776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3675776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3676c32a4f29SMoni Shoua 3677e126ba97SEli Cohen mutex_lock(&qp->mutex); 3678e126ba97SEli Cohen 3679e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3680e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3681e126ba97SEli Cohen 36822811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 36832811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 36842811ba51SAchiad Shochat } 36852811ba51SAchiad Shochat 3686c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3687c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3688c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3689c2e53b2cSYishai Hadas attr_mask); 3690c2e53b2cSYishai Hadas goto out; 3691c2e53b2cSYishai Hadas } 3692c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3693c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3694d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3695d31131bbSKamal Heib attr_mask)) { 3696158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3697158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3698e126ba97SEli Cohen goto out; 3699c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3700c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3701c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3702c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3703c32a4f29SMoni Shoua goto out; 3704158abf86SHaggai Eran } 3705e126ba97SEli Cohen 3706e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3707938fe83cSSaeed Mahameed (attr->port_num == 0 || 3708508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3709158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3710158abf86SHaggai Eran attr->port_num, dev->num_ports); 3711e126ba97SEli Cohen goto out; 3712158abf86SHaggai Eran } 3713e126ba97SEli Cohen 3714e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3715e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3716938fe83cSSaeed Mahameed if (attr->pkey_index >= 3717158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3718158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3719158abf86SHaggai Eran attr->pkey_index); 3720e126ba97SEli Cohen goto out; 3721e126ba97SEli Cohen } 3722158abf86SHaggai Eran } 3723e126ba97SEli Cohen 3724e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3725938fe83cSSaeed Mahameed attr->max_rd_atomic > 3726158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3727158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3728158abf86SHaggai Eran attr->max_rd_atomic); 3729e126ba97SEli Cohen goto out; 3730158abf86SHaggai Eran } 3731e126ba97SEli Cohen 3732e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3733938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3734158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3735158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3736158abf86SHaggai Eran attr->max_dest_rd_atomic); 3737e126ba97SEli Cohen goto out; 3738158abf86SHaggai Eran } 3739e126ba97SEli Cohen 3740e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3741e126ba97SEli Cohen err = 0; 3742e126ba97SEli Cohen goto out; 3743e126ba97SEli Cohen } 3744e126ba97SEli Cohen 374561147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 374661147f39SBodong Wang new_state, &ucmd); 3747e126ba97SEli Cohen 3748e126ba97SEli Cohen out: 3749e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3750e126ba97SEli Cohen return err; 3751e126ba97SEli Cohen } 3752e126ba97SEli Cohen 3753e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 3754e126ba97SEli Cohen { 3755e126ba97SEli Cohen struct mlx5_ib_cq *cq; 3756e126ba97SEli Cohen unsigned cur; 3757e126ba97SEli Cohen 3758e126ba97SEli Cohen cur = wq->head - wq->tail; 3759e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 3760e126ba97SEli Cohen return 0; 3761e126ba97SEli Cohen 3762e126ba97SEli Cohen cq = to_mcq(ib_cq); 3763e126ba97SEli Cohen spin_lock(&cq->lock); 3764e126ba97SEli Cohen cur = wq->head - wq->tail; 3765e126ba97SEli Cohen spin_unlock(&cq->lock); 3766e126ba97SEli Cohen 3767e126ba97SEli Cohen return cur + nreq >= wq->max_post; 3768e126ba97SEli Cohen } 3769e126ba97SEli Cohen 3770e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 3771e126ba97SEli Cohen u64 remote_addr, u32 rkey) 3772e126ba97SEli Cohen { 3773e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 3774e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 3775e126ba97SEli Cohen rseg->reserved = 0; 3776e126ba97SEli Cohen } 3777e126ba97SEli Cohen 3778f0313965SErez Shitrit static void *set_eth_seg(struct mlx5_wqe_eth_seg *eseg, 3779f696bf6dSBart Van Assche const struct ib_send_wr *wr, void *qend, 3780f0313965SErez Shitrit struct mlx5_ib_qp *qp, int *size) 3781f0313965SErez Shitrit { 3782f0313965SErez Shitrit void *seg = eseg; 3783f0313965SErez Shitrit 3784f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 3785f0313965SErez Shitrit 3786f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 3787f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 3788f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 3789f0313965SErez Shitrit 3790f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_seg); 3791f0313965SErez Shitrit *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 3792f0313965SErez Shitrit 3793f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 3794f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 37952b31f7aeSSaeed Mahameed int size_of_inl_hdr_start = sizeof(eseg->inline_hdr.start); 3796f0313965SErez Shitrit u64 left, leftlen, copysz; 3797f0313965SErez Shitrit void *pdata = ud_wr->header; 3798f0313965SErez Shitrit 3799f0313965SErez Shitrit left = ud_wr->hlen; 3800f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 38012b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 3802f0313965SErez Shitrit 3803f0313965SErez Shitrit /* 3804f0313965SErez Shitrit * check if there is space till the end of queue, if yes, 3805f0313965SErez Shitrit * copy all in one shot, otherwise copy till the end of queue, 3806f0313965SErez Shitrit * rollback and than the copy the left 3807f0313965SErez Shitrit */ 38082b31f7aeSSaeed Mahameed leftlen = qend - (void *)eseg->inline_hdr.start; 3809f0313965SErez Shitrit copysz = min_t(u64, leftlen, left); 3810f0313965SErez Shitrit 3811f0313965SErez Shitrit memcpy(seg - size_of_inl_hdr_start, pdata, copysz); 3812f0313965SErez Shitrit 3813f0313965SErez Shitrit if (likely(copysz > size_of_inl_hdr_start)) { 3814f0313965SErez Shitrit seg += ALIGN(copysz - size_of_inl_hdr_start, 16); 3815f0313965SErez Shitrit *size += ALIGN(copysz - size_of_inl_hdr_start, 16) / 16; 3816f0313965SErez Shitrit } 3817f0313965SErez Shitrit 3818f0313965SErez Shitrit if (unlikely(copysz < left)) { /* the last wqe in the queue */ 3819f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 3820f0313965SErez Shitrit left -= copysz; 3821f0313965SErez Shitrit pdata += copysz; 3822f0313965SErez Shitrit memcpy(seg, pdata, left); 3823f0313965SErez Shitrit seg += ALIGN(left, 16); 3824f0313965SErez Shitrit *size += ALIGN(left, 16) / 16; 3825f0313965SErez Shitrit } 3826f0313965SErez Shitrit } 3827f0313965SErez Shitrit 3828f0313965SErez Shitrit return seg; 3829f0313965SErez Shitrit } 3830f0313965SErez Shitrit 3831e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 3832f696bf6dSBart Van Assche const struct ib_send_wr *wr) 3833e126ba97SEli Cohen { 3834e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 3835e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 3836e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 3837e126ba97SEli Cohen } 3838e126ba97SEli Cohen 3839e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 3840e126ba97SEli Cohen { 3841e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 3842e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 3843e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 3844e126ba97SEli Cohen } 3845e126ba97SEli Cohen 384631616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 3847e126ba97SEli Cohen { 384831616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 384931616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 3850e126ba97SEli Cohen } 3851e126ba97SEli Cohen 3852e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 3853e126ba97SEli Cohen { 3854e126ba97SEli Cohen u64 result; 3855e126ba97SEli Cohen 3856e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 3857e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 3858e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 3859e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 3860e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 3861e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 3862e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 3863e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 3864e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 3865e126ba97SEli Cohen MLX5_MKEY_MASK_A | 3866e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 3867e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3868e126ba97SEli Cohen 3869e126ba97SEli Cohen return cpu_to_be64(result); 3870e126ba97SEli Cohen } 3871e126ba97SEli Cohen 3872e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 3873e6631814SSagi Grimberg { 3874e6631814SSagi Grimberg u64 result; 3875e6631814SSagi Grimberg 3876e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 3877e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 3878e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 3879d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 3880e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 3881e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 3882e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 3883e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 3884e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 3885e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 3886e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 3887e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 3888e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 3889e6631814SSagi Grimberg 3890e6631814SSagi Grimberg return cpu_to_be64(result); 3891e6631814SSagi Grimberg } 3892e6631814SSagi Grimberg 38938a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 3894064e5262SIdan Burstein struct mlx5_ib_mr *mr, bool umr_inline) 38958a187ee5SSagi Grimberg { 389631616255SArtemy Kovalyov int size = mr->ndescs * mr->desc_size; 38978a187ee5SSagi Grimberg 38988a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 3899b005d316SSagi Grimberg 39008a187ee5SSagi Grimberg umr->flags = MLX5_UMR_CHECK_NOT_FREE; 3901064e5262SIdan Burstein if (umr_inline) 3902064e5262SIdan Burstein umr->flags |= MLX5_UMR_INLINE; 390331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 39048a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 39058a187ee5SSagi Grimberg } 39068a187ee5SSagi Grimberg 3907dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 3908e126ba97SEli Cohen { 3909e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 3910e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 39112d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 3912e126ba97SEli Cohen } 3913e126ba97SEli Cohen 391431616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 3915e126ba97SEli Cohen { 3916968e78ddSHaggai Eran u64 result; 3917e126ba97SEli Cohen 391831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 3919e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 3920968e78ddSHaggai Eran 3921968e78ddSHaggai Eran return cpu_to_be64(result); 3922968e78ddSHaggai Eran } 3923968e78ddSHaggai Eran 392431616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 3925968e78ddSHaggai Eran { 3926968e78ddSHaggai Eran u64 result; 3927968e78ddSHaggai Eran 3928968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 3929968e78ddSHaggai Eran 3930968e78ddSHaggai Eran return cpu_to_be64(result); 3931968e78ddSHaggai Eran } 3932968e78ddSHaggai Eran 393356e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 393456e11d62SNoa Osherovich { 393556e11d62SNoa Osherovich u64 result; 393656e11d62SNoa Osherovich 393756e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 393856e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 393931616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 394056e11d62SNoa Osherovich 394156e11d62SNoa Osherovich return cpu_to_be64(result); 394256e11d62SNoa Osherovich } 394356e11d62SNoa Osherovich 394431616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 394556e11d62SNoa Osherovich { 394656e11d62SNoa Osherovich u64 result; 394756e11d62SNoa Osherovich 394831616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 394931616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 395056e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 395131616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 395231616255SArtemy Kovalyov 395331616255SArtemy Kovalyov if (atomic) 395431616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 395556e11d62SNoa Osherovich 395656e11d62SNoa Osherovich return cpu_to_be64(result); 395756e11d62SNoa Osherovich } 395856e11d62SNoa Osherovich 395956e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 396056e11d62SNoa Osherovich { 396156e11d62SNoa Osherovich u64 result; 396256e11d62SNoa Osherovich 396331616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 396456e11d62SNoa Osherovich 396556e11d62SNoa Osherovich return cpu_to_be64(result); 396656e11d62SNoa Osherovich } 396756e11d62SNoa Osherovich 3968c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 3969c8d75a98SMajd Dibbiny { 3970c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 3971c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 3972c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 3973c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 3974c8d75a98SMajd Dibbiny return -EPERM; 3975c8d75a98SMajd Dibbiny return 0; 3976c8d75a98SMajd Dibbiny } 3977c8d75a98SMajd Dibbiny 3978c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 3979c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 3980f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 3981968e78ddSHaggai Eran { 3982f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 3983968e78ddSHaggai Eran 3984968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 3985968e78ddSHaggai Eran 3986968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 3987968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 3988968e78ddSHaggai Eran else 3989968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 3990968e78ddSHaggai Eran 399131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 399231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 399331616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 399431616255SArtemy Kovalyov 399531616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 399631616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 3997968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 3998968e78ddSHaggai Eran } 399956e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 400056e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 400131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 400231616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 400356e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4004e126ba97SEli Cohen } 400531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 400631616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 400731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 400831616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4009e126ba97SEli Cohen 4010e126ba97SEli Cohen if (!wr->num_sge) 4011968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4012c8d75a98SMajd Dibbiny 4013c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4014e126ba97SEli Cohen } 4015e126ba97SEli Cohen 4016e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4017e126ba97SEli Cohen { 4018e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4019e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4020e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4021e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 40222ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4023e126ba97SEli Cohen } 4024e126ba97SEli Cohen 40258a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 40268a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 40278a187ee5SSagi Grimberg u32 key, int access) 40288a187ee5SSagi Grimberg { 40298a187ee5SSagi Grimberg int ndescs = ALIGN(mr->ndescs, 8) >> 1; 40308a187ee5SSagi Grimberg 40318a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4032b005d316SSagi Grimberg 4033ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4034b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4035ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4036b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4037b005d316SSagi Grimberg ndescs *= 2; 4038b005d316SSagi Grimberg 4039b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 40408a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 40418a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 40428a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 40438a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 40448a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 40458a187ee5SSagi Grimberg } 40468a187ee5SSagi Grimberg 4047dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4048e126ba97SEli Cohen { 4049e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4050968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4051e126ba97SEli Cohen } 4052e126ba97SEli Cohen 4053f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4054f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4055e126ba97SEli Cohen { 4056f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4057968e78ddSHaggai Eran 4058e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 405931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4060968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4061e126ba97SEli Cohen 4062968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 406356e11d62SNoa Osherovich if (umrwr->pd) 4064968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 406531616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 406631616255SArtemy Kovalyov !umrwr->length) 406731616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 406831616255SArtemy Kovalyov 406931616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4070968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4071968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4072746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4073968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4074e126ba97SEli Cohen } 4075e126ba97SEli Cohen 40768a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 40778a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 40788a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 40798a187ee5SSagi Grimberg { 40808a187ee5SSagi Grimberg int bcount = mr->desc_size * mr->ndescs; 40818a187ee5SSagi Grimberg 40828a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 40838a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 40848a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 40858a187ee5SSagi Grimberg } 40868a187ee5SSagi Grimberg 4087064e5262SIdan Burstein static void set_reg_umr_inline_seg(void *seg, struct mlx5_ib_qp *qp, 4088064e5262SIdan Burstein struct mlx5_ib_mr *mr, int mr_list_size) 4089064e5262SIdan Burstein { 4090064e5262SIdan Burstein void *qend = qp->sq.qend; 4091064e5262SIdan Burstein void *addr = mr->descs; 4092064e5262SIdan Burstein int copy; 4093064e5262SIdan Burstein 4094064e5262SIdan Burstein if (unlikely(seg + mr_list_size > qend)) { 4095064e5262SIdan Burstein copy = qend - seg; 4096064e5262SIdan Burstein memcpy(seg, addr, copy); 4097064e5262SIdan Burstein addr += copy; 4098064e5262SIdan Burstein mr_list_size -= copy; 4099064e5262SIdan Burstein seg = mlx5_get_send_wqe(qp, 0); 4100064e5262SIdan Burstein } 4101064e5262SIdan Burstein memcpy(seg, addr, mr_list_size); 4102064e5262SIdan Burstein seg += mr_list_size; 4103064e5262SIdan Burstein } 4104064e5262SIdan Burstein 4105f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4106e126ba97SEli Cohen { 4107e126ba97SEli Cohen switch (wr->opcode) { 4108e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4109e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4110e126ba97SEli Cohen return wr->ex.imm_data; 4111e126ba97SEli Cohen 4112e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4113e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4114e126ba97SEli Cohen 4115e126ba97SEli Cohen default: 4116e126ba97SEli Cohen return 0; 4117e126ba97SEli Cohen } 4118e126ba97SEli Cohen } 4119e126ba97SEli Cohen 4120e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4121e126ba97SEli Cohen { 4122e126ba97SEli Cohen u8 *p = wqe; 4123e126ba97SEli Cohen u8 res = 0; 4124e126ba97SEli Cohen int i; 4125e126ba97SEli Cohen 4126e126ba97SEli Cohen for (i = 0; i < size; i++) 4127e126ba97SEli Cohen res ^= p[i]; 4128e126ba97SEli Cohen 4129e126ba97SEli Cohen return ~res; 4130e126ba97SEli Cohen } 4131e126ba97SEli Cohen 4132e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4133e126ba97SEli Cohen { 4134e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4135e126ba97SEli Cohen } 4136e126ba97SEli Cohen 4137f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 4138e126ba97SEli Cohen void *wqe, int *sz) 4139e126ba97SEli Cohen { 4140e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 4141e126ba97SEli Cohen void *qend = qp->sq.qend; 4142e126ba97SEli Cohen void *addr; 4143e126ba97SEli Cohen int inl = 0; 4144e126ba97SEli Cohen int copy; 4145e126ba97SEli Cohen int len; 4146e126ba97SEli Cohen int i; 4147e126ba97SEli Cohen 4148e126ba97SEli Cohen seg = wqe; 4149e126ba97SEli Cohen wqe += sizeof(*seg); 4150e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 4151e126ba97SEli Cohen addr = (void *)(unsigned long)(wr->sg_list[i].addr); 4152e126ba97SEli Cohen len = wr->sg_list[i].length; 4153e126ba97SEli Cohen inl += len; 4154e126ba97SEli Cohen 4155e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4156e126ba97SEli Cohen return -ENOMEM; 4157e126ba97SEli Cohen 4158e126ba97SEli Cohen if (unlikely(wqe + len > qend)) { 4159e126ba97SEli Cohen copy = qend - wqe; 4160e126ba97SEli Cohen memcpy(wqe, addr, copy); 4161e126ba97SEli Cohen addr += copy; 4162e126ba97SEli Cohen len -= copy; 4163e126ba97SEli Cohen wqe = mlx5_get_send_wqe(qp, 0); 4164e126ba97SEli Cohen } 4165e126ba97SEli Cohen memcpy(wqe, addr, len); 4166e126ba97SEli Cohen wqe += len; 4167e126ba97SEli Cohen } 4168e126ba97SEli Cohen 4169e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4170e126ba97SEli Cohen 4171e126ba97SEli Cohen *sz = ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4172e126ba97SEli Cohen 4173e126ba97SEli Cohen return 0; 4174e126ba97SEli Cohen } 4175e126ba97SEli Cohen 4176e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4177e6631814SSagi Grimberg { 4178e6631814SSagi Grimberg switch (type) { 4179e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4180e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4181e6631814SSagi Grimberg default: 4182e6631814SSagi Grimberg return 0; 4183e6631814SSagi Grimberg } 4184e6631814SSagi Grimberg } 4185e6631814SSagi Grimberg 4186e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4187e6631814SSagi Grimberg { 4188e6631814SSagi Grimberg switch (block_size) { 4189e6631814SSagi Grimberg case 512: return 0x1; 4190e6631814SSagi Grimberg case 520: return 0x2; 4191e6631814SSagi Grimberg case 4096: return 0x3; 4192e6631814SSagi Grimberg case 4160: return 0x4; 4193e6631814SSagi Grimberg case 1073741824: return 0x5; 4194e6631814SSagi Grimberg default: return 0; 4195e6631814SSagi Grimberg } 4196e6631814SSagi Grimberg } 4197e6631814SSagi Grimberg 419878eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4199142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4200e6631814SSagi Grimberg { 4201142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4202142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4203142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4204142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4205142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4206142537f4SSagi Grimberg /* repeating block */ 4207142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4208142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4209142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4210e6631814SSagi Grimberg 421178eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 421278eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4213e6631814SSagi Grimberg 421478eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 421578eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 421678eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 421778eda2bbSSagi Grimberg else 421878eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4219e6631814SSagi Grimberg } 4220e6631814SSagi Grimberg 422178eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 422278eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4223e6631814SSagi Grimberg } 4224e6631814SSagi Grimberg 4225e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4226e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4227e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4228e6631814SSagi Grimberg { 4229e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4230e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4231e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4232e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4233e6631814SSagi Grimberg 4234c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4235e6631814SSagi Grimberg 4236142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4237142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4238e6631814SSagi Grimberg /* Input domain check byte mask */ 4239e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 424078eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 424178eda2bbSSagi Grimberg 424278eda2bbSSagi Grimberg /* Memory domain */ 424378eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 424478eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 424578eda2bbSSagi Grimberg break; 424678eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 424778eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 424878eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 424978eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 425078eda2bbSSagi Grimberg break; 425178eda2bbSSagi Grimberg default: 425278eda2bbSSagi Grimberg return -EINVAL; 425378eda2bbSSagi Grimberg } 425478eda2bbSSagi Grimberg 425578eda2bbSSagi Grimberg /* Wire domain */ 425678eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 425778eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 425878eda2bbSSagi Grimberg break; 425978eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4260e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 426178eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4262e6631814SSagi Grimberg /* Same block structure */ 4263142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4264e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4265fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4266c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4267fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4268c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4269fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4270e6631814SSagi Grimberg } else 4271e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4272e6631814SSagi Grimberg 4273142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 427478eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4275e6631814SSagi Grimberg break; 4276e6631814SSagi Grimberg default: 4277e6631814SSagi Grimberg return -EINVAL; 4278e6631814SSagi Grimberg } 4279e6631814SSagi Grimberg 4280e6631814SSagi Grimberg return 0; 4281e6631814SSagi Grimberg } 4282e6631814SSagi Grimberg 4283f696bf6dSBart Van Assche static int set_sig_data_segment(const struct ib_sig_handover_wr *wr, 4284e622f2f4SChristoph Hellwig struct mlx5_ib_qp *qp, void **seg, int *size) 4285e6631814SSagi Grimberg { 4286e622f2f4SChristoph Hellwig struct ib_sig_attrs *sig_attrs = wr->sig_attrs; 4287e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4288e6631814SSagi Grimberg struct mlx5_bsf *bsf; 4289e622f2f4SChristoph Hellwig u32 data_len = wr->wr.sg_list->length; 4290e622f2f4SChristoph Hellwig u32 data_key = wr->wr.sg_list->lkey; 4291e622f2f4SChristoph Hellwig u64 data_va = wr->wr.sg_list->addr; 4292e6631814SSagi Grimberg int ret; 4293e6631814SSagi Grimberg int wqe_size; 4294e6631814SSagi Grimberg 4295e622f2f4SChristoph Hellwig if (!wr->prot || 4296e622f2f4SChristoph Hellwig (data_key == wr->prot->lkey && 4297e622f2f4SChristoph Hellwig data_va == wr->prot->addr && 4298e622f2f4SChristoph Hellwig data_len == wr->prot->length)) { 4299e6631814SSagi Grimberg /** 4300e6631814SSagi Grimberg * Source domain doesn't contain signature information 43015c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4302e6631814SSagi Grimberg * So need construct: 4303e6631814SSagi Grimberg * ------------------ 4304e6631814SSagi Grimberg * | data_klm | 4305e6631814SSagi Grimberg * ------------------ 4306e6631814SSagi Grimberg * | BSF | 4307e6631814SSagi Grimberg * ------------------ 4308e6631814SSagi Grimberg **/ 4309e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4310e6631814SSagi Grimberg 4311e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4312e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4313e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4314e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4315e6631814SSagi Grimberg } else { 4316e6631814SSagi Grimberg /** 4317e6631814SSagi Grimberg * Source domain contains signature information 4318e6631814SSagi Grimberg * So need construct a strided block format: 4319e6631814SSagi Grimberg * --------------------------- 4320e6631814SSagi Grimberg * | stride_block_ctrl | 4321e6631814SSagi Grimberg * --------------------------- 4322e6631814SSagi Grimberg * | data_klm | 4323e6631814SSagi Grimberg * --------------------------- 4324e6631814SSagi Grimberg * | prot_klm | 4325e6631814SSagi Grimberg * --------------------------- 4326e6631814SSagi Grimberg * | BSF | 4327e6631814SSagi Grimberg * --------------------------- 4328e6631814SSagi Grimberg **/ 4329e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4330e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4331e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4332e622f2f4SChristoph Hellwig u32 prot_key = wr->prot->lkey; 4333e622f2f4SChristoph Hellwig u64 prot_va = wr->prot->addr; 4334e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4335e6631814SSagi Grimberg int prot_size; 4336e6631814SSagi Grimberg 4337e6631814SSagi Grimberg sblock_ctrl = *seg; 4338e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4339e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4340e6631814SSagi Grimberg 4341e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4342e6631814SSagi Grimberg if (!prot_size) { 4343e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4344e6631814SSagi Grimberg return -EINVAL; 4345e6631814SSagi Grimberg } 4346e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4347e6631814SSagi Grimberg prot_size); 4348e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4349e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4350e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4351e6631814SSagi Grimberg 4352e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4353e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4354e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 43555c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 43565c273b16SSagi Grimberg 4357e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4358e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4359e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4360e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 43615c273b16SSagi Grimberg 4362e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4363e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4364e6631814SSagi Grimberg } 4365e6631814SSagi Grimberg 4366e6631814SSagi Grimberg *seg += wqe_size; 4367e6631814SSagi Grimberg *size += wqe_size / 16; 4368e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4369e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4370e6631814SSagi Grimberg 4371e6631814SSagi Grimberg bsf = *seg; 4372e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4373e6631814SSagi Grimberg if (ret) 4374e6631814SSagi Grimberg return -EINVAL; 4375e6631814SSagi Grimberg 4376e6631814SSagi Grimberg *seg += sizeof(*bsf); 4377e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 4378e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4379e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4380e6631814SSagi Grimberg 4381e6631814SSagi Grimberg return 0; 4382e6631814SSagi Grimberg } 4383e6631814SSagi Grimberg 4384e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 4385f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr, u32 size, 4386e6631814SSagi Grimberg u32 length, u32 pdn) 4387e6631814SSagi Grimberg { 4388e622f2f4SChristoph Hellwig struct ib_mr *sig_mr = wr->sig_mr; 4389e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4390d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4391e6631814SSagi Grimberg 4392e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4393e6631814SSagi Grimberg 4394e622f2f4SChristoph Hellwig seg->flags = get_umr_flags(wr->access_flags) | 4395ec22eb53SSaeed Mahameed MLX5_MKC_ACCESS_MODE_KLMS; 4396e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4397d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4398e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4399e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 440031616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4401e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4402e6631814SSagi Grimberg } 4403e6631814SSagi Grimberg 4404e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 440531616255SArtemy Kovalyov u32 size) 4406e6631814SSagi Grimberg { 4407e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4408e6631814SSagi Grimberg 4409e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 441031616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4411e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4412e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4413e6631814SSagi Grimberg } 4414e6631814SSagi Grimberg 4415e6631814SSagi Grimberg 4416f696bf6dSBart Van Assche static int set_sig_umr_wr(const struct ib_send_wr *send_wr, 4417f696bf6dSBart Van Assche struct mlx5_ib_qp *qp, void **seg, int *size) 4418e6631814SSagi Grimberg { 4419f696bf6dSBart Van Assche const struct ib_sig_handover_wr *wr = sig_handover_wr(send_wr); 4420e622f2f4SChristoph Hellwig struct mlx5_ib_mr *sig_mr = to_mmr(wr->sig_mr); 4421e6631814SSagi Grimberg u32 pdn = get_pd(qp)->pdn; 442231616255SArtemy Kovalyov u32 xlt_size; 4423e6631814SSagi Grimberg int region_len, ret; 4424e6631814SSagi Grimberg 4425e622f2f4SChristoph Hellwig if (unlikely(wr->wr.num_sge != 1) || 4426e622f2f4SChristoph Hellwig unlikely(wr->access_flags & IB_ACCESS_REMOTE_ATOMIC) || 4427d5436ba0SSagi Grimberg unlikely(!sig_mr->sig) || unlikely(!qp->signature_en) || 4428d5436ba0SSagi Grimberg unlikely(!sig_mr->sig->sig_status_checked)) 4429e6631814SSagi Grimberg return -EINVAL; 4430e6631814SSagi Grimberg 4431e6631814SSagi Grimberg /* length of the protected region, data + protection */ 4432e622f2f4SChristoph Hellwig region_len = wr->wr.sg_list->length; 4433e622f2f4SChristoph Hellwig if (wr->prot && 4434e622f2f4SChristoph Hellwig (wr->prot->lkey != wr->wr.sg_list->lkey || 4435e622f2f4SChristoph Hellwig wr->prot->addr != wr->wr.sg_list->addr || 4436e622f2f4SChristoph Hellwig wr->prot->length != wr->wr.sg_list->length)) 4437e622f2f4SChristoph Hellwig region_len += wr->prot->length; 4438e6631814SSagi Grimberg 4439e6631814SSagi Grimberg /** 4440e6631814SSagi Grimberg * KLM octoword size - if protection was provided 4441e6631814SSagi Grimberg * then we use strided block format (3 octowords), 4442e6631814SSagi Grimberg * else we use single KLM (1 octoword) 4443e6631814SSagi Grimberg **/ 444431616255SArtemy Kovalyov xlt_size = wr->prot ? 0x30 : sizeof(struct mlx5_klm); 4445e6631814SSagi Grimberg 444631616255SArtemy Kovalyov set_sig_umr_segment(*seg, xlt_size); 4447e6631814SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4448e6631814SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4449e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4450e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4451e6631814SSagi Grimberg 445231616255SArtemy Kovalyov set_sig_mkey_segment(*seg, wr, xlt_size, region_len, pdn); 4453e6631814SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 4454e6631814SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 4455e6631814SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 4456e6631814SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 4457e6631814SSagi Grimberg 4458e6631814SSagi Grimberg ret = set_sig_data_segment(wr, qp, seg, size); 4459e6631814SSagi Grimberg if (ret) 4460e6631814SSagi Grimberg return ret; 4461e6631814SSagi Grimberg 4462d5436ba0SSagi Grimberg sig_mr->sig->sig_status_checked = false; 4463e6631814SSagi Grimberg return 0; 4464e6631814SSagi Grimberg } 4465e6631814SSagi Grimberg 4466e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4467e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4468e6631814SSagi Grimberg { 4469e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4470e6631814SSagi Grimberg 4471e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4472e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4473e6631814SSagi Grimberg switch (domain->sig_type) { 447478eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 447578eda2bbSSagi Grimberg break; 4476e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4477e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4478e6631814SSagi Grimberg domain->sig.dif.app_tag); 4479e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4480e6631814SSagi Grimberg break; 4481e6631814SSagi Grimberg default: 448212bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 448312bbf1eaSLeon Romanovsky domain->sig_type); 448412bbf1eaSLeon Romanovsky return -EINVAL; 4485e6631814SSagi Grimberg } 4486e6631814SSagi Grimberg 448778eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 448878eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 448978eda2bbSSagi Grimberg 4490e6631814SSagi Grimberg return 0; 4491e6631814SSagi Grimberg } 4492e6631814SSagi Grimberg 44938a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4494f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 44958a187ee5SSagi Grimberg void **seg, int *size) 44968a187ee5SSagi Grimberg { 44978a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 44988a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 4499064e5262SIdan Burstein int mr_list_size = mr->ndescs * mr->desc_size; 4500064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 45018a187ee5SSagi Grimberg 45028a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 45038a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 45048a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 45058a187ee5SSagi Grimberg return -EINVAL; 45068a187ee5SSagi Grimberg } 45078a187ee5SSagi Grimberg 4508064e5262SIdan Burstein set_reg_umr_seg(*seg, mr, umr_inline); 45098a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 45108a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 45118a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 45128a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 45138a187ee5SSagi Grimberg 45148a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 45158a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 45168a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 45178a187ee5SSagi Grimberg if (unlikely((*seg == qp->sq.qend))) 45188a187ee5SSagi Grimberg *seg = mlx5_get_send_wqe(qp, 0); 45198a187ee5SSagi Grimberg 4520064e5262SIdan Burstein if (umr_inline) { 4521064e5262SIdan Burstein set_reg_umr_inline_seg(*seg, qp, mr, mr_list_size); 4522064e5262SIdan Burstein *size += get_xlt_octo(mr_list_size); 4523064e5262SIdan Burstein } else { 45248a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 45258a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 45268a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4527064e5262SIdan Burstein } 45288a187ee5SSagi Grimberg return 0; 45298a187ee5SSagi Grimberg } 45308a187ee5SSagi Grimberg 4531dd01e66aSSagi Grimberg static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size) 4532e126ba97SEli Cohen { 4533dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4534e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4535e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4536e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4537e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4538dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4539e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4540e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 4541e126ba97SEli Cohen if (unlikely((*seg == qp->sq.qend))) 4542e126ba97SEli Cohen *seg = mlx5_get_send_wqe(qp, 0); 4543e126ba97SEli Cohen } 4544e126ba97SEli Cohen 4545e126ba97SEli Cohen static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) 4546e126ba97SEli Cohen { 4547e126ba97SEli Cohen __be32 *p = NULL; 4548e126ba97SEli Cohen int tidx = idx; 4549e126ba97SEli Cohen int i, j; 4550e126ba97SEli Cohen 4551e126ba97SEli Cohen pr_debug("dump wqe at %p\n", mlx5_get_send_wqe(qp, tidx)); 4552e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4553e126ba97SEli Cohen if ((i & 0xf) == 0) { 4554e126ba97SEli Cohen void *buf = mlx5_get_send_wqe(qp, tidx); 4555e126ba97SEli Cohen tidx = (tidx + 1) & (qp->sq.wqe_cnt - 1); 4556e126ba97SEli Cohen p = buf; 4557e126ba97SEli Cohen j = 0; 4558e126ba97SEli Cohen } 4559e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4560e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4561e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4562e126ba97SEli Cohen } 4563e126ba97SEli Cohen } 4564e126ba97SEli Cohen 45657bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 45666e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 4567f696bf6dSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 45687bb1fafcSBart Van Assche int *size, int nreq, bool send_signaled, bool solicited) 45696e5eadacSSagi Grimberg { 4570b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4571b2a232d2SLeon Romanovsky return -ENOMEM; 45726e5eadacSSagi Grimberg 45736e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 45746e5eadacSSagi Grimberg *seg = mlx5_get_send_wqe(qp, *idx); 45756e5eadacSSagi Grimberg *ctrl = *seg; 45766e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 45776e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 45786e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 45797bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 45807bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 45816e5eadacSSagi Grimberg 45826e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 45836e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 45846e5eadacSSagi Grimberg 4585b2a232d2SLeon Romanovsky return 0; 45866e5eadacSSagi Grimberg } 45876e5eadacSSagi Grimberg 45887bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 45897bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 45907bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 45917bb1fafcSBart Van Assche int *size, int nreq) 45927bb1fafcSBart Van Assche { 45937bb1fafcSBart Van Assche return __begin_wqe(qp, seg, ctrl, wr, idx, size, nreq, 45947bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 45957bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 45967bb1fafcSBart Van Assche } 45977bb1fafcSBart Van Assche 45986e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 45996e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 46006e5eadacSSagi Grimberg u8 size, unsigned idx, u64 wr_id, 46016e8484c5SMax Gurtovoy int nreq, u8 fence, u32 mlx5_opcode) 46026e5eadacSSagi Grimberg { 46036e5eadacSSagi Grimberg u8 opmod = 0; 46046e5eadacSSagi Grimberg 46056e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 46066e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 460719098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 46086e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 46096e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 46106e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 46116e5eadacSSagi Grimberg 46126e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 46136e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 46146e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 46156e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 46166e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 46176e5eadacSSagi Grimberg } 46186e5eadacSSagi Grimberg 4619d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4620d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4621e126ba97SEli Cohen { 4622e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4623e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 462489ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4625d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4626e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 4627e126ba97SEli Cohen struct mlx5_wqe_data_seg *dpseg; 4628e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4629d16e91daSHaggai Eran struct mlx5_bf *bf; 4630e126ba97SEli Cohen int uninitialized_var(size); 4631d16e91daSHaggai Eran void *qend; 4632e126ba97SEli Cohen unsigned long flags; 4633e126ba97SEli Cohen unsigned idx; 4634e126ba97SEli Cohen int err = 0; 4635e126ba97SEli Cohen int num_sge; 4636e126ba97SEli Cohen void *seg; 4637e126ba97SEli Cohen int nreq; 4638e126ba97SEli Cohen int i; 4639e126ba97SEli Cohen u8 next_fence = 0; 4640e126ba97SEli Cohen u8 fence; 4641e126ba97SEli Cohen 46426c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 46436c75520fSParav Pandit !drain)) { 46446c75520fSParav Pandit *bad_wr = wr; 46456c75520fSParav Pandit return -EIO; 46466c75520fSParav Pandit } 46476c75520fSParav Pandit 4648d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4649d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4650d16e91daSHaggai Eran 4651d16e91daSHaggai Eran qp = to_mqp(ibqp); 46525fe9dec0SEli Cohen bf = &qp->bf; 4653d16e91daSHaggai Eran qend = qp->sq.qend; 4654d16e91daSHaggai Eran 4655e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4656e126ba97SEli Cohen 4657e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4658a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4659e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4660e126ba97SEli Cohen err = -EINVAL; 4661e126ba97SEli Cohen *bad_wr = wr; 4662e126ba97SEli Cohen goto out; 4663e126ba97SEli Cohen } 4664e126ba97SEli Cohen 4665e126ba97SEli Cohen num_sge = wr->num_sge; 4666e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4667e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 466824be409bSChuck Lever err = -EINVAL; 4669e126ba97SEli Cohen *bad_wr = wr; 4670e126ba97SEli Cohen goto out; 4671e126ba97SEli Cohen } 4672e126ba97SEli Cohen 46736e5eadacSSagi Grimberg err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, nreq); 46746e5eadacSSagi Grimberg if (err) { 46756e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 46766e5eadacSSagi Grimberg err = -ENOMEM; 46776e5eadacSSagi Grimberg *bad_wr = wr; 46786e5eadacSSagi Grimberg goto out; 46796e5eadacSSagi Grimberg } 4680e126ba97SEli Cohen 4681074fca3aSMajd Dibbiny if (wr->opcode == IB_WR_REG_MR) { 46826e8484c5SMax Gurtovoy fence = dev->umr_fence; 46836e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4684074fca3aSMajd Dibbiny } else { 4685074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 46866e8484c5SMax Gurtovoy if (qp->next_fence) 46876e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 46886e8484c5SMax Gurtovoy else 46896e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 46906e8484c5SMax Gurtovoy } else { 46916e8484c5SMax Gurtovoy fence = qp->next_fence; 46926e8484c5SMax Gurtovoy } 4693074fca3aSMajd Dibbiny } 46946e8484c5SMax Gurtovoy 4695e126ba97SEli Cohen switch (ibqp->qp_type) { 4696e126ba97SEli Cohen case IB_QPT_XRC_INI: 4697e126ba97SEli Cohen xrc = seg; 4698e126ba97SEli Cohen seg += sizeof(*xrc); 4699e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4700e126ba97SEli Cohen /* fall through */ 4701e126ba97SEli Cohen case IB_QPT_RC: 4702e126ba97SEli Cohen switch (wr->opcode) { 4703e126ba97SEli Cohen case IB_WR_RDMA_READ: 4704e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4705e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4706e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4707e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4708e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4709e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4710e126ba97SEli Cohen break; 4711e126ba97SEli Cohen 4712e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 4713e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 4714e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 471581bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 471681bea28fSEli Cohen err = -ENOSYS; 471781bea28fSEli Cohen *bad_wr = wr; 471881bea28fSEli Cohen goto out; 4719e126ba97SEli Cohen 4720e126ba97SEli Cohen case IB_WR_LOCAL_INV: 4721e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 4722e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 4723dd01e66aSSagi Grimberg set_linv_wr(qp, &seg, &size); 4724e126ba97SEli Cohen num_sge = 0; 4725e126ba97SEli Cohen break; 4726e126ba97SEli Cohen 47278a187ee5SSagi Grimberg case IB_WR_REG_MR: 47288a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 47298a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 47308a187ee5SSagi Grimberg err = set_reg_wr(qp, reg_wr(wr), &seg, &size); 47318a187ee5SSagi Grimberg if (err) { 47328a187ee5SSagi Grimberg *bad_wr = wr; 47338a187ee5SSagi Grimberg goto out; 47348a187ee5SSagi Grimberg } 47358a187ee5SSagi Grimberg num_sge = 0; 47368a187ee5SSagi Grimberg break; 47378a187ee5SSagi Grimberg 4738e6631814SSagi Grimberg case IB_WR_REG_SIG_MR: 4739e6631814SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_SIG_MR; 4740e622f2f4SChristoph Hellwig mr = to_mmr(sig_handover_wr(wr)->sig_mr); 4741e6631814SSagi Grimberg 4742e6631814SSagi Grimberg ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 4743e6631814SSagi Grimberg err = set_sig_umr_wr(wr, qp, &seg, &size); 4744e6631814SSagi Grimberg if (err) { 4745e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4746e6631814SSagi Grimberg *bad_wr = wr; 4747e6631814SSagi Grimberg goto out; 4748e6631814SSagi Grimberg } 4749e6631814SSagi Grimberg 47506e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 47516e8484c5SMax Gurtovoy fence, MLX5_OPCODE_UMR); 4752e6631814SSagi Grimberg /* 4753e6631814SSagi Grimberg * SET_PSV WQEs are not signaled and solicited 4754e6631814SSagi Grimberg * on error 4755e6631814SSagi Grimberg */ 47567bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 47577bb1fafcSBart Van Assche &size, nreq, false, true); 4758e6631814SSagi Grimberg if (err) { 4759e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4760e6631814SSagi Grimberg err = -ENOMEM; 4761e6631814SSagi Grimberg *bad_wr = wr; 4762e6631814SSagi Grimberg goto out; 4763e6631814SSagi Grimberg } 4764e6631814SSagi Grimberg 4765e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->mem, 4766e6631814SSagi Grimberg mr->sig->psv_memory.psv_idx, &seg, 4767e6631814SSagi Grimberg &size); 4768e6631814SSagi Grimberg if (err) { 4769e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4770e6631814SSagi Grimberg *bad_wr = wr; 4771e6631814SSagi Grimberg goto out; 4772e6631814SSagi Grimberg } 4773e6631814SSagi Grimberg 47746e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 47756e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 47767bb1fafcSBart Van Assche err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 47777bb1fafcSBart Van Assche &size, nreq, false, true); 4778e6631814SSagi Grimberg if (err) { 4779e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4780e6631814SSagi Grimberg err = -ENOMEM; 4781e6631814SSagi Grimberg *bad_wr = wr; 4782e6631814SSagi Grimberg goto out; 4783e6631814SSagi Grimberg } 4784e6631814SSagi Grimberg 4785e622f2f4SChristoph Hellwig err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, 4786e6631814SSagi Grimberg mr->sig->psv_wire.psv_idx, &seg, 4787e6631814SSagi Grimberg &size); 4788e6631814SSagi Grimberg if (err) { 4789e6631814SSagi Grimberg mlx5_ib_warn(dev, "\n"); 4790e6631814SSagi Grimberg *bad_wr = wr; 4791e6631814SSagi Grimberg goto out; 4792e6631814SSagi Grimberg } 4793e6631814SSagi Grimberg 47946e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, 47956e8484c5SMax Gurtovoy fence, MLX5_OPCODE_SET_PSV); 47966e8484c5SMax Gurtovoy qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4797e6631814SSagi Grimberg num_sge = 0; 4798e6631814SSagi Grimberg goto skip_psv; 4799e6631814SSagi Grimberg 4800e126ba97SEli Cohen default: 4801e126ba97SEli Cohen break; 4802e126ba97SEli Cohen } 4803e126ba97SEli Cohen break; 4804e126ba97SEli Cohen 4805e126ba97SEli Cohen case IB_QPT_UC: 4806e126ba97SEli Cohen switch (wr->opcode) { 4807e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4808e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4809e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4810e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4811e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4812e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4813e126ba97SEli Cohen break; 4814e126ba97SEli Cohen 4815e126ba97SEli Cohen default: 4816e126ba97SEli Cohen break; 4817e126ba97SEli Cohen } 4818e126ba97SEli Cohen break; 4819e126ba97SEli Cohen 4820e126ba97SEli Cohen case IB_QPT_SMI: 48211e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 48221e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 48231e0e50b6SMaor Gottlieb err = -EPERM; 48241e0e50b6SMaor Gottlieb *bad_wr = wr; 48251e0e50b6SMaor Gottlieb goto out; 48261e0e50b6SMaor Gottlieb } 4827f6b1ee34SBart Van Assche /* fall through */ 4828d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 4829e126ba97SEli Cohen set_datagram_seg(seg, wr); 4830e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 4831e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4832e126ba97SEli Cohen if (unlikely((seg == qend))) 4833e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4834e126ba97SEli Cohen break; 4835f0313965SErez Shitrit case IB_QPT_UD: 4836f0313965SErez Shitrit set_datagram_seg(seg, wr); 4837f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 4838f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 4839e126ba97SEli Cohen 4840f0313965SErez Shitrit if (unlikely((seg == qend))) 4841f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4842f0313965SErez Shitrit 4843f0313965SErez Shitrit /* handle qp that supports ud offload */ 4844f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 4845f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 4846f0313965SErez Shitrit 4847f0313965SErez Shitrit pad = seg; 4848f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 4849f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 4850f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 4851f0313965SErez Shitrit 4852f0313965SErez Shitrit seg = set_eth_seg(seg, wr, qend, qp, &size); 4853f0313965SErez Shitrit 4854f0313965SErez Shitrit if (unlikely((seg == qend))) 4855f0313965SErez Shitrit seg = mlx5_get_send_wqe(qp, 0); 4856f0313965SErez Shitrit } 4857f0313965SErez Shitrit break; 4858e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 4859e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 4860e126ba97SEli Cohen err = -EINVAL; 4861e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 4862e126ba97SEli Cohen goto out; 4863e126ba97SEli Cohen } 4864e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 4865e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 4866c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 4867c8d75a98SMajd Dibbiny if (unlikely(err)) 4868c8d75a98SMajd Dibbiny goto out; 4869e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4870e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 4871e126ba97SEli Cohen if (unlikely((seg == qend))) 4872e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4873e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 4874e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 4875e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 4876e126ba97SEli Cohen if (unlikely((seg == qend))) 4877e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4878e126ba97SEli Cohen break; 4879e126ba97SEli Cohen 4880e126ba97SEli Cohen default: 4881e126ba97SEli Cohen break; 4882e126ba97SEli Cohen } 4883e126ba97SEli Cohen 4884e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 4885e126ba97SEli Cohen int uninitialized_var(sz); 4886e126ba97SEli Cohen 4887e126ba97SEli Cohen err = set_data_inl_seg(qp, wr, seg, &sz); 4888e126ba97SEli Cohen if (unlikely(err)) { 4889e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4890e126ba97SEli Cohen *bad_wr = wr; 4891e126ba97SEli Cohen goto out; 4892e126ba97SEli Cohen } 4893e126ba97SEli Cohen size += sz; 4894e126ba97SEli Cohen } else { 4895e126ba97SEli Cohen dpseg = seg; 4896e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 4897e126ba97SEli Cohen if (unlikely(dpseg == qend)) { 4898e126ba97SEli Cohen seg = mlx5_get_send_wqe(qp, 0); 4899e126ba97SEli Cohen dpseg = seg; 4900e126ba97SEli Cohen } 4901e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 4902e126ba97SEli Cohen set_data_ptr_seg(dpseg, wr->sg_list + i); 4903e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 4904e126ba97SEli Cohen dpseg++; 4905e126ba97SEli Cohen } 4906e126ba97SEli Cohen } 4907e126ba97SEli Cohen } 4908e126ba97SEli Cohen 49096e8484c5SMax Gurtovoy qp->next_fence = next_fence; 49106e8484c5SMax Gurtovoy finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, 49116e5eadacSSagi Grimberg mlx5_ib_opcode[wr->opcode]); 4912e6631814SSagi Grimberg skip_psv: 4913e126ba97SEli Cohen if (0) 4914e126ba97SEli Cohen dump_wqe(qp, idx, size); 4915e126ba97SEli Cohen } 4916e126ba97SEli Cohen 4917e126ba97SEli Cohen out: 4918e126ba97SEli Cohen if (likely(nreq)) { 4919e126ba97SEli Cohen qp->sq.head += nreq; 4920e126ba97SEli Cohen 4921e126ba97SEli Cohen /* Make sure that descriptors are written before 4922e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 4923e126ba97SEli Cohen */ 4924e126ba97SEli Cohen wmb(); 4925e126ba97SEli Cohen 4926e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 4927e126ba97SEli Cohen 4928ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 4929ada388f7SEli Cohen * we hit doorbell */ 4930ada388f7SEli Cohen wmb(); 4931ada388f7SEli Cohen 49325fe9dec0SEli Cohen /* currently we support only regular doorbells */ 49335fe9dec0SEli Cohen mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 4934e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 4935e126ba97SEli Cohen * and reach the HCA out of order. 4936e126ba97SEli Cohen */ 4937e126ba97SEli Cohen mmiowb(); 4938e126ba97SEli Cohen bf->offset ^= bf->buf_size; 4939e126ba97SEli Cohen } 4940e126ba97SEli Cohen 4941e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 4942e126ba97SEli Cohen 4943e126ba97SEli Cohen return err; 4944e126ba97SEli Cohen } 4945e126ba97SEli Cohen 4946d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4947d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 4948d0e84c0aSYishai Hadas { 4949d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 4950d0e84c0aSYishai Hadas } 4951d0e84c0aSYishai Hadas 4952e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 4953e126ba97SEli Cohen { 4954e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 4955e126ba97SEli Cohen } 4956e126ba97SEli Cohen 4957d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 4958d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 4959e126ba97SEli Cohen { 4960e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 4961e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 4962e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 496389ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 496489ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 4965e126ba97SEli Cohen unsigned long flags; 4966e126ba97SEli Cohen int err = 0; 4967e126ba97SEli Cohen int nreq; 4968e126ba97SEli Cohen int ind; 4969e126ba97SEli Cohen int i; 4970e126ba97SEli Cohen 49716c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 49726c75520fSParav Pandit !drain)) { 49736c75520fSParav Pandit *bad_wr = wr; 49746c75520fSParav Pandit return -EIO; 49756c75520fSParav Pandit } 49766c75520fSParav Pandit 4977d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4978d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 4979d16e91daSHaggai Eran 4980e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 4981e126ba97SEli Cohen 4982e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 4983e126ba97SEli Cohen 4984e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4985e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 4986e126ba97SEli Cohen err = -ENOMEM; 4987e126ba97SEli Cohen *bad_wr = wr; 4988e126ba97SEli Cohen goto out; 4989e126ba97SEli Cohen } 4990e126ba97SEli Cohen 4991e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 4992e126ba97SEli Cohen err = -EINVAL; 4993e126ba97SEli Cohen *bad_wr = wr; 4994e126ba97SEli Cohen goto out; 4995e126ba97SEli Cohen } 4996e126ba97SEli Cohen 4997e126ba97SEli Cohen scat = get_recv_wqe(qp, ind); 4998e126ba97SEli Cohen if (qp->wq_sig) 4999e126ba97SEli Cohen scat++; 5000e126ba97SEli Cohen 5001e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5002e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5003e126ba97SEli Cohen 5004e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5005e126ba97SEli Cohen scat[i].byte_count = 0; 5006e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5007e126ba97SEli Cohen scat[i].addr = 0; 5008e126ba97SEli Cohen } 5009e126ba97SEli Cohen 5010e126ba97SEli Cohen if (qp->wq_sig) { 5011e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5012e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5013e126ba97SEli Cohen } 5014e126ba97SEli Cohen 5015e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5016e126ba97SEli Cohen 5017e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5018e126ba97SEli Cohen } 5019e126ba97SEli Cohen 5020e126ba97SEli Cohen out: 5021e126ba97SEli Cohen if (likely(nreq)) { 5022e126ba97SEli Cohen qp->rq.head += nreq; 5023e126ba97SEli Cohen 5024e126ba97SEli Cohen /* Make sure that descriptors are written before 5025e126ba97SEli Cohen * doorbell record. 5026e126ba97SEli Cohen */ 5027e126ba97SEli Cohen wmb(); 5028e126ba97SEli Cohen 5029e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5030e126ba97SEli Cohen } 5031e126ba97SEli Cohen 5032e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5033e126ba97SEli Cohen 5034e126ba97SEli Cohen return err; 5035e126ba97SEli Cohen } 5036e126ba97SEli Cohen 5037d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5038d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5039d0e84c0aSYishai Hadas { 5040d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5041d0e84c0aSYishai Hadas } 5042d0e84c0aSYishai Hadas 5043e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5044e126ba97SEli Cohen { 5045e126ba97SEli Cohen switch (mlx5_state) { 5046e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5047e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5048e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5049e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5050e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5051e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5052e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5053e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5054e126ba97SEli Cohen default: return -1; 5055e126ba97SEli Cohen } 5056e126ba97SEli Cohen } 5057e126ba97SEli Cohen 5058e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5059e126ba97SEli Cohen { 5060e126ba97SEli Cohen switch (mlx5_mig_state) { 5061e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5062e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5063e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5064e126ba97SEli Cohen default: return -1; 5065e126ba97SEli Cohen } 5066e126ba97SEli Cohen } 5067e126ba97SEli Cohen 5068e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5069e126ba97SEli Cohen { 5070e126ba97SEli Cohen int ib_flags = 0; 5071e126ba97SEli Cohen 5072e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5073e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5074e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5075e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5076e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5077e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5078e126ba97SEli Cohen 5079e126ba97SEli Cohen return ib_flags; 5080e126ba97SEli Cohen } 5081e126ba97SEli Cohen 508238349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5083d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5084e126ba97SEli Cohen struct mlx5_qp_path *path) 5085e126ba97SEli Cohen { 5086e126ba97SEli Cohen 5087d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5088e126ba97SEli Cohen 5089e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5090e126ba97SEli Cohen return; 5091e126ba97SEli Cohen 5092ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5093ae59c3f0SLeon Romanovsky 5094d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5095d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5096e126ba97SEli Cohen 5097d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5098d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5099d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5100d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5101d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5102d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5103d8966fcdSDasaratharaman Chandramouli 5104d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5105d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5106d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5107d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5108d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5109d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5110e126ba97SEli Cohen } 5111e126ba97SEli Cohen } 5112e126ba97SEli Cohen 51136d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 51146d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 51156d2f89dfSmajd@mellanox.com u8 *sq_state) 5116e126ba97SEli Cohen { 51176d2f89dfSmajd@mellanox.com int err; 51186d2f89dfSmajd@mellanox.com 511928160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 51206d2f89dfSmajd@mellanox.com if (err) 51216d2f89dfSmajd@mellanox.com goto out; 51226d2f89dfSmajd@mellanox.com sq->state = *sq_state; 51236d2f89dfSmajd@mellanox.com 51246d2f89dfSmajd@mellanox.com out: 51256d2f89dfSmajd@mellanox.com return err; 51266d2f89dfSmajd@mellanox.com } 51276d2f89dfSmajd@mellanox.com 51286d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 51296d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 51306d2f89dfSmajd@mellanox.com u8 *rq_state) 51316d2f89dfSmajd@mellanox.com { 51326d2f89dfSmajd@mellanox.com void *out; 51336d2f89dfSmajd@mellanox.com void *rqc; 51346d2f89dfSmajd@mellanox.com int inlen; 51356d2f89dfSmajd@mellanox.com int err; 51366d2f89dfSmajd@mellanox.com 51376d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 51381b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 51396d2f89dfSmajd@mellanox.com if (!out) 51406d2f89dfSmajd@mellanox.com return -ENOMEM; 51416d2f89dfSmajd@mellanox.com 51426d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 51436d2f89dfSmajd@mellanox.com if (err) 51446d2f89dfSmajd@mellanox.com goto out; 51456d2f89dfSmajd@mellanox.com 51466d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 51476d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 51486d2f89dfSmajd@mellanox.com rq->state = *rq_state; 51496d2f89dfSmajd@mellanox.com 51506d2f89dfSmajd@mellanox.com out: 51516d2f89dfSmajd@mellanox.com kvfree(out); 51526d2f89dfSmajd@mellanox.com return err; 51536d2f89dfSmajd@mellanox.com } 51546d2f89dfSmajd@mellanox.com 51556d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 51566d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 51576d2f89dfSmajd@mellanox.com { 51586d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 51596d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 51606d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 51616d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 51626d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 51636d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 51646d2f89dfSmajd@mellanox.com }, 51656d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 51666d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 51676d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 51686d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 51696d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 51706d2f89dfSmajd@mellanox.com }, 51716d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 51726d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 51736d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 51746d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 51756d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 51766d2f89dfSmajd@mellanox.com }, 51776d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 51786d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 51796d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 51806d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 51816d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 51826d2f89dfSmajd@mellanox.com }, 51836d2f89dfSmajd@mellanox.com }; 51846d2f89dfSmajd@mellanox.com 51856d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 51866d2f89dfSmajd@mellanox.com 51876d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 51886d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 51896d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 51906d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 51916d2f89dfSmajd@mellanox.com return -EINVAL; 51926d2f89dfSmajd@mellanox.com } 51936d2f89dfSmajd@mellanox.com 51946d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 51956d2f89dfSmajd@mellanox.com *qp_state = qp->state; 51966d2f89dfSmajd@mellanox.com 51976d2f89dfSmajd@mellanox.com return 0; 51986d2f89dfSmajd@mellanox.com } 51996d2f89dfSmajd@mellanox.com 52006d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 52016d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 52026d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 52036d2f89dfSmajd@mellanox.com { 52046d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 52056d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 52066d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 52076d2f89dfSmajd@mellanox.com int err; 52086d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 52096d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 52106d2f89dfSmajd@mellanox.com 52116d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 52126d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 52136d2f89dfSmajd@mellanox.com if (err) 52146d2f89dfSmajd@mellanox.com return err; 52156d2f89dfSmajd@mellanox.com } 52166d2f89dfSmajd@mellanox.com 52176d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 52186d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 52196d2f89dfSmajd@mellanox.com if (err) 52206d2f89dfSmajd@mellanox.com return err; 52216d2f89dfSmajd@mellanox.com } 52226d2f89dfSmajd@mellanox.com 52236d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 52246d2f89dfSmajd@mellanox.com raw_packet_qp_state); 52256d2f89dfSmajd@mellanox.com } 52266d2f89dfSmajd@mellanox.com 52276d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 52286d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 52296d2f89dfSmajd@mellanox.com { 523009a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5231e126ba97SEli Cohen struct mlx5_qp_context *context; 5232e126ba97SEli Cohen int mlx5_state; 523309a7d9ecSSaeed Mahameed u32 *outb; 5234e126ba97SEli Cohen int err = 0; 5235e126ba97SEli Cohen 523609a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 52376d2f89dfSmajd@mellanox.com if (!outb) 52386d2f89dfSmajd@mellanox.com return -ENOMEM; 52396d2f89dfSmajd@mellanox.com 524019098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 524109a7d9ecSSaeed Mahameed outlen); 5242e126ba97SEli Cohen if (err) 52436d2f89dfSmajd@mellanox.com goto out; 5244e126ba97SEli Cohen 524509a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 524609a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 524709a7d9ecSSaeed Mahameed 5248e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5249e126ba97SEli Cohen 5250e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5251e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5252e126ba97SEli Cohen qp_attr->path_mig_state = 5253e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5254e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5255e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5256e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5257e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5258e126ba97SEli Cohen qp_attr->qp_access_flags = 5259e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5260e126ba97SEli Cohen 5261e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 526238349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 526338349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5264d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5265d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5266d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5267d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5268e126ba97SEli Cohen } 5269e126ba97SEli Cohen 5270d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5271e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5272e126ba97SEli Cohen 5273e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5274e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5275e126ba97SEli Cohen 5276e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5277e126ba97SEli Cohen 5278e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5279e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5280e126ba97SEli Cohen qp_attr->min_rnr_timer = 5281e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5282e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5283e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5284e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5285e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 52866d2f89dfSmajd@mellanox.com 52876d2f89dfSmajd@mellanox.com out: 52886d2f89dfSmajd@mellanox.com kfree(outb); 52896d2f89dfSmajd@mellanox.com return err; 52906d2f89dfSmajd@mellanox.com } 52916d2f89dfSmajd@mellanox.com 5292776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5293776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5294776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5295776a3906SMoni Shoua { 5296776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5297776a3906SMoni Shoua u32 *out; 5298776a3906SMoni Shoua u32 access_flags = 0; 5299776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5300776a3906SMoni Shoua void *dctc; 5301776a3906SMoni Shoua int err; 5302776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5303776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5304776a3906SMoni Shoua IB_QP_PORT | 5305776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5306776a3906SMoni Shoua IB_QP_AV | 5307776a3906SMoni Shoua IB_QP_PATH_MTU | 5308776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5309776a3906SMoni Shoua 5310776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5311776a3906SMoni Shoua return -EINVAL; 5312776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5313776a3906SMoni Shoua return -EINVAL; 5314776a3906SMoni Shoua 5315776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5316776a3906SMoni Shoua if (!out) 5317776a3906SMoni Shoua return -ENOMEM; 5318776a3906SMoni Shoua 5319776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5320776a3906SMoni Shoua if (err) 5321776a3906SMoni Shoua goto out; 5322776a3906SMoni Shoua 5323776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5324776a3906SMoni Shoua 5325776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5326776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5327776a3906SMoni Shoua 5328776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5329776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5330776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5331776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5332776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5333776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5334776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5335776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5336776a3906SMoni Shoua } 5337776a3906SMoni Shoua 5338776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5339776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5340776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5341776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5342776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5343776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5344776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5345776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5346776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5347776a3906SMoni Shoua } 5348776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5349776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5350776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5351776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5352776a3906SMoni Shoua out: 5353776a3906SMoni Shoua kfree(out); 5354776a3906SMoni Shoua return err; 5355776a3906SMoni Shoua } 5356776a3906SMoni Shoua 53576d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 53586d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 53596d2f89dfSmajd@mellanox.com { 53606d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 53616d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 53626d2f89dfSmajd@mellanox.com int err = 0; 53636d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 53646d2f89dfSmajd@mellanox.com 536528d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 536628d61370SYishai Hadas return -ENOSYS; 536728d61370SYishai Hadas 5368d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5369d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5370d16e91daSHaggai Eran qp_init_attr); 5371d16e91daSHaggai Eran 5372c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5373c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5374c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5375c2e53b2cSYishai Hadas 5376776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5377776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5378776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5379776a3906SMoni Shoua 53806d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 53816d2f89dfSmajd@mellanox.com 5382c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5383c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 53846d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 53856d2f89dfSmajd@mellanox.com if (err) 53866d2f89dfSmajd@mellanox.com goto out; 53876d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 53886d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 53896d2f89dfSmajd@mellanox.com } else { 53906d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 53916d2f89dfSmajd@mellanox.com if (err) 53926d2f89dfSmajd@mellanox.com goto out; 53936d2f89dfSmajd@mellanox.com } 53946d2f89dfSmajd@mellanox.com 53956d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5396e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5397e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5398e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5399e126ba97SEli Cohen 5400e126ba97SEli Cohen if (!ibqp->uobject) { 54010540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5402e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 54030540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5404e126ba97SEli Cohen } else { 5405e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5406e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5407e126ba97SEli Cohen } 5408e126ba97SEli Cohen 54090540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 54100540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 54110540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 54120540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 54130540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5414e126ba97SEli Cohen 5415e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5416e126ba97SEli Cohen 5417e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5418e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5419e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5420e126ba97SEli Cohen 5421051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5422051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5423051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5424051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5425051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5426051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5427b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5428b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5429051f2630SLeon Romanovsky 5430e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5431e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5432e126ba97SEli Cohen 5433e126ba97SEli Cohen out: 5434e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5435e126ba97SEli Cohen return err; 5436e126ba97SEli Cohen } 5437e126ba97SEli Cohen 5438e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5439e126ba97SEli Cohen struct ib_ucontext *context, 5440e126ba97SEli Cohen struct ib_udata *udata) 5441e126ba97SEli Cohen { 5442e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5443e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5444e126ba97SEli Cohen int err; 5445d00614c0SYishai Hadas u16 uid; 5446e126ba97SEli Cohen 5447938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5448e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5449e126ba97SEli Cohen 5450e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5451e126ba97SEli Cohen if (!xrcd) 5452e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5453e126ba97SEli Cohen 5454d00614c0SYishai Hadas uid = context ? to_mucontext(context)->devx_uid : 0; 5455d00614c0SYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, uid); 5456e126ba97SEli Cohen if (err) { 5457e126ba97SEli Cohen kfree(xrcd); 5458e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5459e126ba97SEli Cohen } 5460e126ba97SEli Cohen 5461d00614c0SYishai Hadas xrcd->uid = uid; 5462e126ba97SEli Cohen return &xrcd->ibxrcd; 5463e126ba97SEli Cohen } 5464e126ba97SEli Cohen 5465e126ba97SEli Cohen int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 5466e126ba97SEli Cohen { 5467e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5468e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5469d00614c0SYishai Hadas u16 uid = to_mxrcd(xrcd)->uid; 5470e126ba97SEli Cohen int err; 5471e126ba97SEli Cohen 5472d00614c0SYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, uid); 5473b081808aSLeon Romanovsky if (err) 5474e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5475e126ba97SEli Cohen 5476e126ba97SEli Cohen kfree(xrcd); 5477e126ba97SEli Cohen return 0; 5478e126ba97SEli Cohen } 547979b20a6cSYishai Hadas 5480350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5481350d0e4cSYishai Hadas { 5482350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5483350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5484350d0e4cSYishai Hadas struct ib_event event; 5485350d0e4cSYishai Hadas 5486350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5487350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5488350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5489350d0e4cSYishai Hadas switch (type) { 5490350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5491350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5492350d0e4cSYishai Hadas break; 5493350d0e4cSYishai Hadas default: 5494350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5495350d0e4cSYishai Hadas return; 5496350d0e4cSYishai Hadas } 5497350d0e4cSYishai Hadas 5498350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5499350d0e4cSYishai Hadas } 5500350d0e4cSYishai Hadas } 5501350d0e4cSYishai Hadas 550203404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 550303404e8aSMaor Gottlieb { 550403404e8aSMaor Gottlieb int err = 0; 550503404e8aSMaor Gottlieb 550603404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 550703404e8aSMaor Gottlieb if (dev->delay_drop.activate) 550803404e8aSMaor Gottlieb goto out; 550903404e8aSMaor Gottlieb 551003404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 551103404e8aSMaor Gottlieb if (err) 551203404e8aSMaor Gottlieb goto out; 551303404e8aSMaor Gottlieb 551403404e8aSMaor Gottlieb dev->delay_drop.activate = true; 551503404e8aSMaor Gottlieb out: 551603404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5517fe248c3aSMaor Gottlieb 5518fe248c3aSMaor Gottlieb if (!err) 5519fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 552003404e8aSMaor Gottlieb return err; 552103404e8aSMaor Gottlieb } 552203404e8aSMaor Gottlieb 552379b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 552479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 552579b20a6cSYishai Hadas { 552679b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 55274be6da1eSNoa Osherovich int has_net_offloads; 552879b20a6cSYishai Hadas __be64 *rq_pas0; 552979b20a6cSYishai Hadas void *in; 553079b20a6cSYishai Hadas void *rqc; 553179b20a6cSYishai Hadas void *wq; 553279b20a6cSYishai Hadas int inlen; 553379b20a6cSYishai Hadas int err; 553479b20a6cSYishai Hadas 553579b20a6cSYishai Hadas dev = to_mdev(pd->device); 553679b20a6cSYishai Hadas 553779b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 55381b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 553979b20a6cSYishai Hadas if (!in) 554079b20a6cSYishai Hadas return -ENOMEM; 554179b20a6cSYishai Hadas 554234d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 554379b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 554479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 554579b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 554679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 554779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 554879b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 554979b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 555079b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5551ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5552ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5553ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5554b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5555b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5556b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5557b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5558b1383aa6SNoa Osherovich goto out; 5559b1383aa6SNoa Osherovich } else { 556079b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5561b1383aa6SNoa Osherovich } 5562b1383aa6SNoa Osherovich } 556379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5564ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5565ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5566ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5567ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5568ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5569ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5570ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5571ccc87087SNoa Osherovich } 557279b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 557379b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 557479b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 557579b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 557679b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 557779b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 55784be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5579b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 55804be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5581b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5582b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5583b1f74a84SNoa Osherovich goto out; 5584b1f74a84SNoa Osherovich } 5585b1f74a84SNoa Osherovich } else { 5586b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5587b1f74a84SNoa Osherovich } 55884be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 55894be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 55904be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 55914be6da1eSNoa Osherovich err = -EOPNOTSUPP; 55924be6da1eSNoa Osherovich goto out; 55934be6da1eSNoa Osherovich } 55944be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 55954be6da1eSNoa Osherovich } 559603404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 559703404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 559803404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 559903404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 560003404e8aSMaor Gottlieb err = -EOPNOTSUPP; 560103404e8aSMaor Gottlieb goto out; 560203404e8aSMaor Gottlieb } 560303404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 560403404e8aSMaor Gottlieb } 560579b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 560679b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5607350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 560803404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 560903404e8aSMaor Gottlieb err = set_delay_drop(dev); 561003404e8aSMaor Gottlieb if (err) { 561103404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 561203404e8aSMaor Gottlieb err); 561303404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 561403404e8aSMaor Gottlieb } else { 561503404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 561603404e8aSMaor Gottlieb } 561703404e8aSMaor Gottlieb } 5618b1f74a84SNoa Osherovich out: 561979b20a6cSYishai Hadas kvfree(in); 562079b20a6cSYishai Hadas return err; 562179b20a6cSYishai Hadas } 562279b20a6cSYishai Hadas 562379b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 562479b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 562579b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 562679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 562779b20a6cSYishai Hadas { 562879b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 562979b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 563079b20a6cSYishai Hadas return -EINVAL; 563179b20a6cSYishai Hadas 563279b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 563379b20a6cSYishai Hadas return -EINVAL; 563479b20a6cSYishai Hadas 563579b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 563679b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 56370dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 56380dfe4522SLeon Romanovsky return -EINVAL; 56390dfe4522SLeon Romanovsky 564079b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 564179b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 564279b20a6cSYishai Hadas return 0; 564379b20a6cSYishai Hadas } 564479b20a6cSYishai Hadas 564579b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 564679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 564779b20a6cSYishai Hadas struct ib_udata *udata, 564879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 564979b20a6cSYishai Hadas { 565079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 565179b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 565279b20a6cSYishai Hadas int err; 565379b20a6cSYishai Hadas size_t required_cmd_sz; 565479b20a6cSYishai Hadas 5655ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5656ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 565779b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 565879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 565979b20a6cSYishai Hadas return -EINVAL; 566079b20a6cSYishai Hadas } 566179b20a6cSYishai Hadas 566279b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 566379b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 566479b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 566579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 566679b20a6cSYishai Hadas return -EOPNOTSUPP; 566779b20a6cSYishai Hadas } 566879b20a6cSYishai Hadas 566979b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 567079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 567179b20a6cSYishai Hadas return -EFAULT; 567279b20a6cSYishai Hadas } 567379b20a6cSYishai Hadas 5674ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 567579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 567679b20a6cSYishai Hadas return -EOPNOTSUPP; 5677ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5678ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5679ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 568079b20a6cSYishai Hadas return -EOPNOTSUPP; 568179b20a6cSYishai Hadas } 5682ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5683ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5684ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5685ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5686ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5687ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5688ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5689ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5690ccc87087SNoa Osherovich return -EINVAL; 5691ccc87087SNoa Osherovich } 5692ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 5693ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 5694ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 5695ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 5696ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 5697ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 5698ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 5699ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 5700ccc87087SNoa Osherovich return -EINVAL; 5701ccc87087SNoa Osherovich } 5702ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 5703ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 5704ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 5705ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 5706ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 5707ccc87087SNoa Osherovich } 570879b20a6cSYishai Hadas 570979b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 571079b20a6cSYishai Hadas if (err) { 571179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 571279b20a6cSYishai Hadas return err; 571379b20a6cSYishai Hadas } 571479b20a6cSYishai Hadas 571579b20a6cSYishai Hadas err = create_user_rq(dev, pd, rwq, &ucmd); 571679b20a6cSYishai Hadas if (err) { 571779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 571879b20a6cSYishai Hadas return err; 571979b20a6cSYishai Hadas } 572079b20a6cSYishai Hadas 572179b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 572279b20a6cSYishai Hadas return 0; 572379b20a6cSYishai Hadas } 572479b20a6cSYishai Hadas 572579b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 572679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 572779b20a6cSYishai Hadas struct ib_udata *udata) 572879b20a6cSYishai Hadas { 572979b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 573079b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 573179b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 573279b20a6cSYishai Hadas size_t min_resp_len; 573379b20a6cSYishai Hadas int err; 573479b20a6cSYishai Hadas 573579b20a6cSYishai Hadas if (!udata) 573679b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 573779b20a6cSYishai Hadas 573879b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 573979b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 574079b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 574179b20a6cSYishai Hadas 574279b20a6cSYishai Hadas dev = to_mdev(pd->device); 574379b20a6cSYishai Hadas switch (init_attr->wq_type) { 574479b20a6cSYishai Hadas case IB_WQT_RQ: 574579b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 574679b20a6cSYishai Hadas if (!rwq) 574779b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 574879b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 574979b20a6cSYishai Hadas if (err) 575079b20a6cSYishai Hadas goto err; 575179b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 575279b20a6cSYishai Hadas if (err) 575379b20a6cSYishai Hadas goto err_user_rq; 575479b20a6cSYishai Hadas break; 575579b20a6cSYishai Hadas default: 575679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 575779b20a6cSYishai Hadas init_attr->wq_type); 575879b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 575979b20a6cSYishai Hadas } 576079b20a6cSYishai Hadas 5761350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 576279b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 576379b20a6cSYishai Hadas if (udata->outlen) { 576479b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 576579b20a6cSYishai Hadas sizeof(resp.response_length); 576679b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 576779b20a6cSYishai Hadas if (err) 576879b20a6cSYishai Hadas goto err_copy; 576979b20a6cSYishai Hadas } 577079b20a6cSYishai Hadas 5771350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 5772350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 577379b20a6cSYishai Hadas return &rwq->ibwq; 577479b20a6cSYishai Hadas 577579b20a6cSYishai Hadas err_copy: 5776350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 577779b20a6cSYishai Hadas err_user_rq: 5778fe248c3aSMaor Gottlieb destroy_user_rq(dev, pd, rwq); 577979b20a6cSYishai Hadas err: 578079b20a6cSYishai Hadas kfree(rwq); 578179b20a6cSYishai Hadas return ERR_PTR(err); 578279b20a6cSYishai Hadas } 578379b20a6cSYishai Hadas 578479b20a6cSYishai Hadas int mlx5_ib_destroy_wq(struct ib_wq *wq) 578579b20a6cSYishai Hadas { 578679b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 578779b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 578879b20a6cSYishai Hadas 5789350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 5790fe248c3aSMaor Gottlieb destroy_user_rq(dev, wq->pd, rwq); 579179b20a6cSYishai Hadas kfree(rwq); 579279b20a6cSYishai Hadas 579379b20a6cSYishai Hadas return 0; 579479b20a6cSYishai Hadas } 579579b20a6cSYishai Hadas 5796c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 5797c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 5798c5f90929SYishai Hadas struct ib_udata *udata) 5799c5f90929SYishai Hadas { 5800c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 5801c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 5802c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 5803c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 5804c5f90929SYishai Hadas size_t min_resp_len; 5805c5f90929SYishai Hadas int inlen; 5806c5f90929SYishai Hadas int err; 5807c5f90929SYishai Hadas int i; 5808c5f90929SYishai Hadas u32 *in; 5809c5f90929SYishai Hadas void *rqtc; 5810c5f90929SYishai Hadas 5811c5f90929SYishai Hadas if (udata->inlen > 0 && 5812c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 5813c5f90929SYishai Hadas udata->inlen)) 5814c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 5815c5f90929SYishai Hadas 5816efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 5817efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 5818efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 5819efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 5820efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 5821efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 5822efd7f400SMaor Gottlieb } 5823efd7f400SMaor Gottlieb 5824c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 5825c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 5826c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 5827c5f90929SYishai Hadas 5828c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 5829c5f90929SYishai Hadas if (!rwq_ind_tbl) 5830c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 5831c5f90929SYishai Hadas 5832c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 58331b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 5834c5f90929SYishai Hadas if (!in) { 5835c5f90929SYishai Hadas err = -ENOMEM; 5836c5f90929SYishai Hadas goto err; 5837c5f90929SYishai Hadas } 5838c5f90929SYishai Hadas 5839c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 5840c5f90929SYishai Hadas 5841c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 5842c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 5843c5f90929SYishai Hadas 5844c5f90929SYishai Hadas for (i = 0; i < sz; i++) 5845c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 5846c5f90929SYishai Hadas 58475deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 58485deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 58495deba86eSYishai Hadas 5850c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 5851c5f90929SYishai Hadas kvfree(in); 5852c5f90929SYishai Hadas 5853c5f90929SYishai Hadas if (err) 5854c5f90929SYishai Hadas goto err; 5855c5f90929SYishai Hadas 5856c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 5857c5f90929SYishai Hadas if (udata->outlen) { 5858c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 5859c5f90929SYishai Hadas sizeof(resp.response_length); 5860c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 5861c5f90929SYishai Hadas if (err) 5862c5f90929SYishai Hadas goto err_copy; 5863c5f90929SYishai Hadas } 5864c5f90929SYishai Hadas 5865c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 5866c5f90929SYishai Hadas 5867c5f90929SYishai Hadas err_copy: 58685deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5869c5f90929SYishai Hadas err: 5870c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5871c5f90929SYishai Hadas return ERR_PTR(err); 5872c5f90929SYishai Hadas } 5873c5f90929SYishai Hadas 5874c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 5875c5f90929SYishai Hadas { 5876c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 5877c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 5878c5f90929SYishai Hadas 58795deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 5880c5f90929SYishai Hadas 5881c5f90929SYishai Hadas kfree(rwq_ind_tbl); 5882c5f90929SYishai Hadas return 0; 5883c5f90929SYishai Hadas } 5884c5f90929SYishai Hadas 588579b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 588679b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 588779b20a6cSYishai Hadas { 588879b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 588979b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 589079b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 589179b20a6cSYishai Hadas size_t required_cmd_sz; 589279b20a6cSYishai Hadas int curr_wq_state; 589379b20a6cSYishai Hadas int wq_state; 589479b20a6cSYishai Hadas int inlen; 589579b20a6cSYishai Hadas int err; 589679b20a6cSYishai Hadas void *rqc; 589779b20a6cSYishai Hadas void *in; 589879b20a6cSYishai Hadas 589979b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 590079b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 590179b20a6cSYishai Hadas return -EINVAL; 590279b20a6cSYishai Hadas 590379b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 590479b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 590579b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 590679b20a6cSYishai Hadas return -EOPNOTSUPP; 590779b20a6cSYishai Hadas 590879b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 590979b20a6cSYishai Hadas return -EFAULT; 591079b20a6cSYishai Hadas 591179b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 591279b20a6cSYishai Hadas return -EOPNOTSUPP; 591379b20a6cSYishai Hadas 591479b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 59151b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 591679b20a6cSYishai Hadas if (!in) 591779b20a6cSYishai Hadas return -ENOMEM; 591879b20a6cSYishai Hadas 591979b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 592079b20a6cSYishai Hadas 592179b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 592279b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 592379b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 592479b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 592579b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 592679b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 592779b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 592879b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 592979b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 593034d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 593179b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 593279b20a6cSYishai Hadas 5933b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 5934b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 5935b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 5936b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5937b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 5938b1f74a84SNoa Osherovich "supported\n"); 5939b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5940b1f74a84SNoa Osherovich goto out; 5941b1f74a84SNoa Osherovich } 5942b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 5943b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 5944b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 5945b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 5946b1f74a84SNoa Osherovich } 5947b1383aa6SNoa Osherovich 5948b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5949b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 5950b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5951b1383aa6SNoa Osherovich goto out; 5952b1383aa6SNoa Osherovich } 5953b1f74a84SNoa Osherovich } 5954b1f74a84SNoa Osherovich 595523a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 595623a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 595723a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 595823a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 5959e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 5960e1f24a79SParav Pandit dev->port->cnts.set_id); 596123a6964eSMajd Dibbiny } else 59625a738b5dSJason Gunthorpe dev_info_once( 59635a738b5dSJason Gunthorpe &dev->ib_dev.dev, 59645a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 596523a6964eSMajd Dibbiny } 596623a6964eSMajd Dibbiny 5967350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 596879b20a6cSYishai Hadas if (!err) 596979b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 597079b20a6cSYishai Hadas 5971b1f74a84SNoa Osherovich out: 5972b1f74a84SNoa Osherovich kvfree(in); 597379b20a6cSYishai Hadas return err; 597479b20a6cSYishai Hadas } 5975d0e84c0aSYishai Hadas 5976d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 5977d0e84c0aSYishai Hadas struct ib_cqe cqe; 5978d0e84c0aSYishai Hadas struct completion done; 5979d0e84c0aSYishai Hadas }; 5980d0e84c0aSYishai Hadas 5981d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 5982d0e84c0aSYishai Hadas { 5983d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 5984d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 5985d0e84c0aSYishai Hadas cqe); 5986d0e84c0aSYishai Hadas 5987d0e84c0aSYishai Hadas complete(&cqe->done); 5988d0e84c0aSYishai Hadas } 5989d0e84c0aSYishai Hadas 5990d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 5991d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 5992d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 5993d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 5994d0e84c0aSYishai Hadas { 5995d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 5996d0e84c0aSYishai Hadas 5997d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 5998d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 5999d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6000d0e84c0aSYishai Hadas return; 6001d0e84c0aSYishai Hadas } 6002d0e84c0aSYishai Hadas 6003d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6004d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6005d0e84c0aSYishai Hadas bool triggered = false; 6006d0e84c0aSYishai Hadas unsigned long flags; 6007d0e84c0aSYishai Hadas 6008d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6009d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6010d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6011d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6012d0e84c0aSYishai Hadas else 6013d0e84c0aSYishai Hadas triggered = true; 6014d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6015d0e84c0aSYishai Hadas 6016d0e84c0aSYishai Hadas if (triggered) { 6017d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6018d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6019d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6020d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6021d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6022d0e84c0aSYishai Hadas break; 6023d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6024d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6025d0e84c0aSYishai Hadas break; 6026d0e84c0aSYishai Hadas default: 6027d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6028d0e84c0aSYishai Hadas } 6029d0e84c0aSYishai Hadas } 6030d0e84c0aSYishai Hadas 6031d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6032d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6033d0e84c0aSYishai Hadas */ 6034d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 6035d0e84c0aSYishai Hadas } 6036d0e84c0aSYishai Hadas 6037d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6038d0e84c0aSYishai Hadas } 6039d0e84c0aSYishai Hadas 6040d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6041d0e84c0aSYishai Hadas { 6042d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6043d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6044d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6045d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6046d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6047d0e84c0aSYishai Hadas .wr = { 6048d0e84c0aSYishai Hadas .next = NULL, 6049d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6050d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6051d0e84c0aSYishai Hadas }, 6052d0e84c0aSYishai Hadas }; 6053d0e84c0aSYishai Hadas int ret; 6054d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6055d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6056d0e84c0aSYishai Hadas 6057d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6058d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6059d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6060d0e84c0aSYishai Hadas return; 6061d0e84c0aSYishai Hadas } 6062d0e84c0aSYishai Hadas 6063d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6064d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6065d0e84c0aSYishai Hadas 6066d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6067d0e84c0aSYishai Hadas if (ret) { 6068d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6069d0e84c0aSYishai Hadas return; 6070d0e84c0aSYishai Hadas } 6071d0e84c0aSYishai Hadas 6072d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6073d0e84c0aSYishai Hadas } 6074d0e84c0aSYishai Hadas 6075d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6076d0e84c0aSYishai Hadas { 6077d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6078d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6079d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6080d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6081d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6082d0e84c0aSYishai Hadas int ret; 6083d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6084d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6085d0e84c0aSYishai Hadas 6086d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6087d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6088d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6089d0e84c0aSYishai Hadas return; 6090d0e84c0aSYishai Hadas } 6091d0e84c0aSYishai Hadas 6092d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6093d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6094d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6095d0e84c0aSYishai Hadas 6096d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6097d0e84c0aSYishai Hadas if (ret) { 6098d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6099d0e84c0aSYishai Hadas return; 6100d0e84c0aSYishai Hadas } 6101d0e84c0aSYishai Hadas 6102d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6103d0e84c0aSYishai Hadas } 6104