1 /* 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <linux/mlx5/vport.h> 44 #include <rdma/ib_smi.h> 45 #include <rdma/ib_umem.h> 46 #include "user.h" 47 #include "mlx5_ib.h" 48 49 #define DRIVER_NAME "mlx5_ib" 50 #define DRIVER_VERSION "2.2-1" 51 #define DRIVER_RELDATE "Feb 2014" 52 53 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 54 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 55 MODULE_LICENSE("Dual BSD/GPL"); 56 MODULE_VERSION(DRIVER_VERSION); 57 58 static int deprecated_prof_sel = 2; 59 module_param_named(prof_sel, deprecated_prof_sel, int, 0444); 60 MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); 61 62 static char mlx5_version[] = 63 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 64 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 65 66 static enum rdma_link_layer 67 mlx5_ib_port_link_layer(struct ib_device *device) 68 { 69 struct mlx5_ib_dev *dev = to_mdev(device); 70 71 switch (MLX5_CAP_GEN(dev->mdev, port_type)) { 72 case MLX5_CAP_PORT_TYPE_IB: 73 return IB_LINK_LAYER_INFINIBAND; 74 case MLX5_CAP_PORT_TYPE_ETH: 75 return IB_LINK_LAYER_ETHERNET; 76 default: 77 return IB_LINK_LAYER_UNSPECIFIED; 78 } 79 } 80 81 static int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev) 82 { 83 return !dev->mdev->issi; 84 } 85 86 enum { 87 MLX5_VPORT_ACCESS_METHOD_MAD, 88 MLX5_VPORT_ACCESS_METHOD_HCA, 89 MLX5_VPORT_ACCESS_METHOD_NIC, 90 }; 91 92 static int mlx5_get_vport_access_method(struct ib_device *ibdev) 93 { 94 if (mlx5_use_mad_ifc(to_mdev(ibdev))) 95 return MLX5_VPORT_ACCESS_METHOD_MAD; 96 97 if (mlx5_ib_port_link_layer(ibdev) == 98 IB_LINK_LAYER_ETHERNET) 99 return MLX5_VPORT_ACCESS_METHOD_NIC; 100 101 return MLX5_VPORT_ACCESS_METHOD_HCA; 102 } 103 104 static int mlx5_query_system_image_guid(struct ib_device *ibdev, 105 __be64 *sys_image_guid) 106 { 107 struct mlx5_ib_dev *dev = to_mdev(ibdev); 108 struct mlx5_core_dev *mdev = dev->mdev; 109 u64 tmp; 110 int err; 111 112 switch (mlx5_get_vport_access_method(ibdev)) { 113 case MLX5_VPORT_ACCESS_METHOD_MAD: 114 return mlx5_query_mad_ifc_system_image_guid(ibdev, 115 sys_image_guid); 116 117 case MLX5_VPORT_ACCESS_METHOD_HCA: 118 err = mlx5_query_hca_vport_system_image_guid(mdev, &tmp); 119 if (!err) 120 *sys_image_guid = cpu_to_be64(tmp); 121 return err; 122 123 default: 124 return -EINVAL; 125 } 126 } 127 128 static int mlx5_query_max_pkeys(struct ib_device *ibdev, 129 u16 *max_pkeys) 130 { 131 struct mlx5_ib_dev *dev = to_mdev(ibdev); 132 struct mlx5_core_dev *mdev = dev->mdev; 133 134 switch (mlx5_get_vport_access_method(ibdev)) { 135 case MLX5_VPORT_ACCESS_METHOD_MAD: 136 return mlx5_query_mad_ifc_max_pkeys(ibdev, max_pkeys); 137 138 case MLX5_VPORT_ACCESS_METHOD_HCA: 139 case MLX5_VPORT_ACCESS_METHOD_NIC: 140 *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, 141 pkey_table_size)); 142 return 0; 143 144 default: 145 return -EINVAL; 146 } 147 } 148 149 static int mlx5_query_vendor_id(struct ib_device *ibdev, 150 u32 *vendor_id) 151 { 152 struct mlx5_ib_dev *dev = to_mdev(ibdev); 153 154 switch (mlx5_get_vport_access_method(ibdev)) { 155 case MLX5_VPORT_ACCESS_METHOD_MAD: 156 return mlx5_query_mad_ifc_vendor_id(ibdev, vendor_id); 157 158 case MLX5_VPORT_ACCESS_METHOD_HCA: 159 case MLX5_VPORT_ACCESS_METHOD_NIC: 160 return mlx5_core_query_vendor_id(dev->mdev, vendor_id); 161 162 default: 163 return -EINVAL; 164 } 165 } 166 167 static int mlx5_query_node_guid(struct mlx5_ib_dev *dev, 168 __be64 *node_guid) 169 { 170 u64 tmp; 171 int err; 172 173 switch (mlx5_get_vport_access_method(&dev->ib_dev)) { 174 case MLX5_VPORT_ACCESS_METHOD_MAD: 175 return mlx5_query_mad_ifc_node_guid(dev, node_guid); 176 177 case MLX5_VPORT_ACCESS_METHOD_HCA: 178 err = mlx5_query_hca_vport_node_guid(dev->mdev, &tmp); 179 if (!err) 180 *node_guid = cpu_to_be64(tmp); 181 return err; 182 183 default: 184 return -EINVAL; 185 } 186 } 187 188 struct mlx5_reg_node_desc { 189 u8 desc[64]; 190 }; 191 192 static int mlx5_query_node_desc(struct mlx5_ib_dev *dev, char *node_desc) 193 { 194 struct mlx5_reg_node_desc in; 195 196 if (mlx5_use_mad_ifc(dev)) 197 return mlx5_query_mad_ifc_node_desc(dev, node_desc); 198 199 memset(&in, 0, sizeof(in)); 200 201 return mlx5_core_access_reg(dev->mdev, &in, sizeof(in), node_desc, 202 sizeof(struct mlx5_reg_node_desc), 203 MLX5_REG_NODE_DESC, 0, 0); 204 } 205 206 static int mlx5_ib_query_device(struct ib_device *ibdev, 207 struct ib_device_attr *props, 208 struct ib_udata *uhw) 209 { 210 struct mlx5_ib_dev *dev = to_mdev(ibdev); 211 struct mlx5_core_dev *mdev = dev->mdev; 212 int err = -ENOMEM; 213 int max_rq_sg; 214 int max_sq_sg; 215 u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); 216 217 if (uhw->inlen || uhw->outlen) 218 return -EINVAL; 219 220 memset(props, 0, sizeof(*props)); 221 err = mlx5_query_system_image_guid(ibdev, 222 &props->sys_image_guid); 223 if (err) 224 return err; 225 226 err = mlx5_query_max_pkeys(ibdev, &props->max_pkeys); 227 if (err) 228 return err; 229 230 err = mlx5_query_vendor_id(ibdev, &props->vendor_id); 231 if (err) 232 return err; 233 234 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 235 (fw_rev_min(dev->mdev) << 16) | 236 fw_rev_sub(dev->mdev); 237 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 238 IB_DEVICE_PORT_ACTIVE_EVENT | 239 IB_DEVICE_SYS_IMAGE_GUID | 240 IB_DEVICE_RC_RNR_NAK_GEN; 241 242 if (MLX5_CAP_GEN(mdev, pkv)) 243 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 244 if (MLX5_CAP_GEN(mdev, qkv)) 245 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 246 if (MLX5_CAP_GEN(mdev, apm)) 247 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 248 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 249 if (MLX5_CAP_GEN(mdev, xrc)) 250 props->device_cap_flags |= IB_DEVICE_XRC; 251 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 252 if (MLX5_CAP_GEN(mdev, sho)) { 253 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 254 /* At this stage no support for signature handover */ 255 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 256 IB_PROT_T10DIF_TYPE_2 | 257 IB_PROT_T10DIF_TYPE_3; 258 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 259 IB_GUARD_T10DIF_CSUM; 260 } 261 if (MLX5_CAP_GEN(mdev, block_lb_mc)) 262 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 263 264 props->vendor_part_id = mdev->pdev->device; 265 props->hw_ver = mdev->pdev->revision; 266 267 props->max_mr_size = ~0ull; 268 props->page_size_cap = ~(min_page_size - 1); 269 props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); 270 props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 271 max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / 272 sizeof(struct mlx5_wqe_data_seg); 273 max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - 274 sizeof(struct mlx5_wqe_ctrl_seg)) / 275 sizeof(struct mlx5_wqe_data_seg); 276 props->max_sge = min(max_rq_sg, max_sq_sg); 277 props->max_sge_rd = props->max_sge; 278 props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); 279 props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_eq_sz)) - 1; 280 props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 281 props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); 282 props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); 283 props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); 284 props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); 285 props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; 286 props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); 287 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 288 props->max_srq_sge = max_rq_sg - 1; 289 props->max_fast_reg_page_list_len = (unsigned int)-1; 290 props->atomic_cap = IB_ATOMIC_NONE; 291 props->masked_atomic_cap = IB_ATOMIC_NONE; 292 props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); 293 props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); 294 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 295 props->max_mcast_grp; 296 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 297 298 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 299 if (MLX5_CAP_GEN(mdev, pg)) 300 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; 301 props->odp_caps = dev->odp_caps; 302 #endif 303 304 return 0; 305 } 306 307 enum mlx5_ib_width { 308 MLX5_IB_WIDTH_1X = 1 << 0, 309 MLX5_IB_WIDTH_2X = 1 << 1, 310 MLX5_IB_WIDTH_4X = 1 << 2, 311 MLX5_IB_WIDTH_8X = 1 << 3, 312 MLX5_IB_WIDTH_12X = 1 << 4 313 }; 314 315 static int translate_active_width(struct ib_device *ibdev, u8 active_width, 316 u8 *ib_width) 317 { 318 struct mlx5_ib_dev *dev = to_mdev(ibdev); 319 int err = 0; 320 321 if (active_width & MLX5_IB_WIDTH_1X) { 322 *ib_width = IB_WIDTH_1X; 323 } else if (active_width & MLX5_IB_WIDTH_2X) { 324 mlx5_ib_dbg(dev, "active_width %d is not supported by IB spec\n", 325 (int)active_width); 326 err = -EINVAL; 327 } else if (active_width & MLX5_IB_WIDTH_4X) { 328 *ib_width = IB_WIDTH_4X; 329 } else if (active_width & MLX5_IB_WIDTH_8X) { 330 *ib_width = IB_WIDTH_8X; 331 } else if (active_width & MLX5_IB_WIDTH_12X) { 332 *ib_width = IB_WIDTH_12X; 333 } else { 334 mlx5_ib_dbg(dev, "Invalid active_width %d\n", 335 (int)active_width); 336 err = -EINVAL; 337 } 338 339 return err; 340 } 341 342 static int mlx5_mtu_to_ib_mtu(int mtu) 343 { 344 switch (mtu) { 345 case 256: return 1; 346 case 512: return 2; 347 case 1024: return 3; 348 case 2048: return 4; 349 case 4096: return 5; 350 default: 351 pr_warn("invalid mtu\n"); 352 return -1; 353 } 354 } 355 356 enum ib_max_vl_num { 357 __IB_MAX_VL_0 = 1, 358 __IB_MAX_VL_0_1 = 2, 359 __IB_MAX_VL_0_3 = 3, 360 __IB_MAX_VL_0_7 = 4, 361 __IB_MAX_VL_0_14 = 5, 362 }; 363 364 enum mlx5_vl_hw_cap { 365 MLX5_VL_HW_0 = 1, 366 MLX5_VL_HW_0_1 = 2, 367 MLX5_VL_HW_0_2 = 3, 368 MLX5_VL_HW_0_3 = 4, 369 MLX5_VL_HW_0_4 = 5, 370 MLX5_VL_HW_0_5 = 6, 371 MLX5_VL_HW_0_6 = 7, 372 MLX5_VL_HW_0_7 = 8, 373 MLX5_VL_HW_0_14 = 15 374 }; 375 376 static int translate_max_vl_num(struct ib_device *ibdev, u8 vl_hw_cap, 377 u8 *max_vl_num) 378 { 379 switch (vl_hw_cap) { 380 case MLX5_VL_HW_0: 381 *max_vl_num = __IB_MAX_VL_0; 382 break; 383 case MLX5_VL_HW_0_1: 384 *max_vl_num = __IB_MAX_VL_0_1; 385 break; 386 case MLX5_VL_HW_0_3: 387 *max_vl_num = __IB_MAX_VL_0_3; 388 break; 389 case MLX5_VL_HW_0_7: 390 *max_vl_num = __IB_MAX_VL_0_7; 391 break; 392 case MLX5_VL_HW_0_14: 393 *max_vl_num = __IB_MAX_VL_0_14; 394 break; 395 396 default: 397 return -EINVAL; 398 } 399 400 return 0; 401 } 402 403 static int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, 404 struct ib_port_attr *props) 405 { 406 struct mlx5_ib_dev *dev = to_mdev(ibdev); 407 struct mlx5_core_dev *mdev = dev->mdev; 408 struct mlx5_hca_vport_context *rep; 409 int max_mtu; 410 int oper_mtu; 411 int err; 412 u8 ib_link_width_oper; 413 u8 vl_hw_cap; 414 415 rep = kzalloc(sizeof(*rep), GFP_KERNEL); 416 if (!rep) { 417 err = -ENOMEM; 418 goto out; 419 } 420 421 memset(props, 0, sizeof(*props)); 422 423 err = mlx5_query_hca_vport_context(mdev, 0, port, 0, rep); 424 if (err) 425 goto out; 426 427 props->lid = rep->lid; 428 props->lmc = rep->lmc; 429 props->sm_lid = rep->sm_lid; 430 props->sm_sl = rep->sm_sl; 431 props->state = rep->vport_state; 432 props->phys_state = rep->port_physical_state; 433 props->port_cap_flags = rep->cap_mask1; 434 props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size)); 435 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); 436 props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size)); 437 props->bad_pkey_cntr = rep->pkey_violation_counter; 438 props->qkey_viol_cntr = rep->qkey_violation_counter; 439 props->subnet_timeout = rep->subnet_timeout; 440 props->init_type_reply = rep->init_type_reply; 441 442 err = mlx5_query_port_link_width_oper(mdev, &ib_link_width_oper, port); 443 if (err) 444 goto out; 445 446 err = translate_active_width(ibdev, ib_link_width_oper, 447 &props->active_width); 448 if (err) 449 goto out; 450 err = mlx5_query_port_proto_oper(mdev, &props->active_speed, MLX5_PTYS_IB, 451 port); 452 if (err) 453 goto out; 454 455 mlx5_query_port_max_mtu(mdev, &max_mtu, port); 456 457 props->max_mtu = mlx5_mtu_to_ib_mtu(max_mtu); 458 459 mlx5_query_port_oper_mtu(mdev, &oper_mtu, port); 460 461 props->active_mtu = mlx5_mtu_to_ib_mtu(oper_mtu); 462 463 err = mlx5_query_port_vl_hw_cap(mdev, &vl_hw_cap, port); 464 if (err) 465 goto out; 466 467 err = translate_max_vl_num(ibdev, vl_hw_cap, 468 &props->max_vl_num); 469 out: 470 kfree(rep); 471 return err; 472 } 473 474 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 475 struct ib_port_attr *props) 476 { 477 switch (mlx5_get_vport_access_method(ibdev)) { 478 case MLX5_VPORT_ACCESS_METHOD_MAD: 479 return mlx5_query_mad_ifc_port(ibdev, port, props); 480 481 case MLX5_VPORT_ACCESS_METHOD_HCA: 482 return mlx5_query_hca_port(ibdev, port, props); 483 484 default: 485 return -EINVAL; 486 } 487 } 488 489 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 490 union ib_gid *gid) 491 { 492 struct mlx5_ib_dev *dev = to_mdev(ibdev); 493 struct mlx5_core_dev *mdev = dev->mdev; 494 495 switch (mlx5_get_vport_access_method(ibdev)) { 496 case MLX5_VPORT_ACCESS_METHOD_MAD: 497 return mlx5_query_mad_ifc_gids(ibdev, port, index, gid); 498 499 case MLX5_VPORT_ACCESS_METHOD_HCA: 500 return mlx5_query_hca_vport_gid(mdev, 0, port, 0, index, gid); 501 502 default: 503 return -EINVAL; 504 } 505 506 } 507 508 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 509 u16 *pkey) 510 { 511 struct mlx5_ib_dev *dev = to_mdev(ibdev); 512 struct mlx5_core_dev *mdev = dev->mdev; 513 514 switch (mlx5_get_vport_access_method(ibdev)) { 515 case MLX5_VPORT_ACCESS_METHOD_MAD: 516 return mlx5_query_mad_ifc_pkey(ibdev, port, index, pkey); 517 518 case MLX5_VPORT_ACCESS_METHOD_HCA: 519 case MLX5_VPORT_ACCESS_METHOD_NIC: 520 return mlx5_query_hca_vport_pkey(mdev, 0, port, 0, index, 521 pkey); 522 default: 523 return -EINVAL; 524 } 525 } 526 527 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 528 struct ib_device_modify *props) 529 { 530 struct mlx5_ib_dev *dev = to_mdev(ibdev); 531 struct mlx5_reg_node_desc in; 532 struct mlx5_reg_node_desc out; 533 int err; 534 535 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 536 return -EOPNOTSUPP; 537 538 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 539 return 0; 540 541 /* 542 * If possible, pass node desc to FW, so it can generate 543 * a 144 trap. If cmd fails, just ignore. 544 */ 545 memcpy(&in, props->node_desc, 64); 546 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 547 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 548 if (err) 549 return err; 550 551 memcpy(ibdev->node_desc, props->node_desc, 64); 552 553 return err; 554 } 555 556 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 557 struct ib_port_modify *props) 558 { 559 struct mlx5_ib_dev *dev = to_mdev(ibdev); 560 struct ib_port_attr attr; 561 u32 tmp; 562 int err; 563 564 mutex_lock(&dev->cap_mask_mutex); 565 566 err = mlx5_ib_query_port(ibdev, port, &attr); 567 if (err) 568 goto out; 569 570 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 571 ~props->clr_port_cap_mask; 572 573 err = mlx5_set_port_caps(dev->mdev, port, tmp); 574 575 out: 576 mutex_unlock(&dev->cap_mask_mutex); 577 return err; 578 } 579 580 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 581 struct ib_udata *udata) 582 { 583 struct mlx5_ib_dev *dev = to_mdev(ibdev); 584 struct mlx5_ib_alloc_ucontext_req_v2 req; 585 struct mlx5_ib_alloc_ucontext_resp resp; 586 struct mlx5_ib_ucontext *context; 587 struct mlx5_uuar_info *uuari; 588 struct mlx5_uar *uars; 589 int gross_uuars; 590 int num_uars; 591 int ver; 592 int uuarn; 593 int err; 594 int i; 595 size_t reqlen; 596 597 if (!dev->ib_active) 598 return ERR_PTR(-EAGAIN); 599 600 memset(&req, 0, sizeof(req)); 601 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 602 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 603 ver = 0; 604 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 605 ver = 2; 606 else 607 return ERR_PTR(-EINVAL); 608 609 err = ib_copy_from_udata(&req, udata, reqlen); 610 if (err) 611 return ERR_PTR(err); 612 613 if (req.flags || req.reserved) 614 return ERR_PTR(-EINVAL); 615 616 if (req.total_num_uuars > MLX5_MAX_UUARS) 617 return ERR_PTR(-ENOMEM); 618 619 if (req.total_num_uuars == 0) 620 return ERR_PTR(-EINVAL); 621 622 req.total_num_uuars = ALIGN(req.total_num_uuars, 623 MLX5_NON_FP_BF_REGS_PER_PAGE); 624 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 625 return ERR_PTR(-EINVAL); 626 627 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 628 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 629 resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); 630 resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); 631 resp.cache_line_size = L1_CACHE_BYTES; 632 resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); 633 resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); 634 resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 635 resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 636 resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); 637 638 context = kzalloc(sizeof(*context), GFP_KERNEL); 639 if (!context) 640 return ERR_PTR(-ENOMEM); 641 642 uuari = &context->uuari; 643 mutex_init(&uuari->lock); 644 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 645 if (!uars) { 646 err = -ENOMEM; 647 goto out_ctx; 648 } 649 650 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 651 sizeof(*uuari->bitmap), 652 GFP_KERNEL); 653 if (!uuari->bitmap) { 654 err = -ENOMEM; 655 goto out_uar_ctx; 656 } 657 /* 658 * clear all fast path uuars 659 */ 660 for (i = 0; i < gross_uuars; i++) { 661 uuarn = i & 3; 662 if (uuarn == 2 || uuarn == 3) 663 set_bit(i, uuari->bitmap); 664 } 665 666 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 667 if (!uuari->count) { 668 err = -ENOMEM; 669 goto out_bitmap; 670 } 671 672 for (i = 0; i < num_uars; i++) { 673 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 674 if (err) 675 goto out_count; 676 } 677 678 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 679 context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; 680 #endif 681 682 INIT_LIST_HEAD(&context->db_page_list); 683 mutex_init(&context->db_page_mutex); 684 685 resp.tot_uuars = req.total_num_uuars; 686 resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports); 687 err = ib_copy_to_udata(udata, &resp, 688 sizeof(resp) - sizeof(resp.reserved)); 689 if (err) 690 goto out_uars; 691 692 uuari->ver = ver; 693 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 694 uuari->uars = uars; 695 uuari->num_uars = num_uars; 696 return &context->ibucontext; 697 698 out_uars: 699 for (i--; i >= 0; i--) 700 mlx5_cmd_free_uar(dev->mdev, uars[i].index); 701 out_count: 702 kfree(uuari->count); 703 704 out_bitmap: 705 kfree(uuari->bitmap); 706 707 out_uar_ctx: 708 kfree(uars); 709 710 out_ctx: 711 kfree(context); 712 return ERR_PTR(err); 713 } 714 715 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 716 { 717 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 718 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 719 struct mlx5_uuar_info *uuari = &context->uuari; 720 int i; 721 722 for (i = 0; i < uuari->num_uars; i++) { 723 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 724 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 725 } 726 727 kfree(uuari->count); 728 kfree(uuari->bitmap); 729 kfree(uuari->uars); 730 kfree(context); 731 732 return 0; 733 } 734 735 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 736 { 737 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 738 } 739 740 static int get_command(unsigned long offset) 741 { 742 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 743 } 744 745 static int get_arg(unsigned long offset) 746 { 747 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 748 } 749 750 static int get_index(unsigned long offset) 751 { 752 return get_arg(offset); 753 } 754 755 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 756 { 757 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 758 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 759 struct mlx5_uuar_info *uuari = &context->uuari; 760 unsigned long command; 761 unsigned long idx; 762 phys_addr_t pfn; 763 764 command = get_command(vma->vm_pgoff); 765 switch (command) { 766 case MLX5_IB_MMAP_REGULAR_PAGE: 767 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 768 return -EINVAL; 769 770 idx = get_index(vma->vm_pgoff); 771 if (idx >= uuari->num_uars) 772 return -EINVAL; 773 774 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 775 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 776 (unsigned long long)pfn); 777 778 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 779 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 780 PAGE_SIZE, vma->vm_page_prot)) 781 return -EAGAIN; 782 783 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 784 vma->vm_start, 785 (unsigned long long)pfn << PAGE_SHIFT); 786 break; 787 788 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 789 return -ENOSYS; 790 791 default: 792 return -EINVAL; 793 } 794 795 return 0; 796 } 797 798 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 799 { 800 struct mlx5_create_mkey_mbox_in *in; 801 struct mlx5_mkey_seg *seg; 802 struct mlx5_core_mr mr; 803 int err; 804 805 in = kzalloc(sizeof(*in), GFP_KERNEL); 806 if (!in) 807 return -ENOMEM; 808 809 seg = &in->seg; 810 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 811 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 812 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 813 seg->start_addr = 0; 814 815 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in), 816 NULL, NULL, NULL); 817 if (err) { 818 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 819 goto err_in; 820 } 821 822 kfree(in); 823 *key = mr.key; 824 825 return 0; 826 827 err_in: 828 kfree(in); 829 830 return err; 831 } 832 833 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 834 { 835 struct mlx5_core_mr mr; 836 int err; 837 838 memset(&mr, 0, sizeof(mr)); 839 mr.key = key; 840 err = mlx5_core_destroy_mkey(dev->mdev, &mr); 841 if (err) 842 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 843 } 844 845 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 846 struct ib_ucontext *context, 847 struct ib_udata *udata) 848 { 849 struct mlx5_ib_alloc_pd_resp resp; 850 struct mlx5_ib_pd *pd; 851 int err; 852 853 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 854 if (!pd) 855 return ERR_PTR(-ENOMEM); 856 857 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 858 if (err) { 859 kfree(pd); 860 return ERR_PTR(err); 861 } 862 863 if (context) { 864 resp.pdn = pd->pdn; 865 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 866 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 867 kfree(pd); 868 return ERR_PTR(-EFAULT); 869 } 870 } else { 871 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 872 if (err) { 873 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 874 kfree(pd); 875 return ERR_PTR(err); 876 } 877 } 878 879 return &pd->ibpd; 880 } 881 882 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 883 { 884 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 885 struct mlx5_ib_pd *mpd = to_mpd(pd); 886 887 if (!pd->uobject) 888 free_pa_mkey(mdev, mpd->pa_lkey); 889 890 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 891 kfree(mpd); 892 893 return 0; 894 } 895 896 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 897 { 898 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 899 int err; 900 901 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 902 if (err) 903 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 904 ibqp->qp_num, gid->raw); 905 906 return err; 907 } 908 909 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 910 { 911 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 912 int err; 913 914 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 915 if (err) 916 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 917 ibqp->qp_num, gid->raw); 918 919 return err; 920 } 921 922 static int init_node_data(struct mlx5_ib_dev *dev) 923 { 924 int err; 925 926 err = mlx5_query_node_desc(dev, dev->ib_dev.node_desc); 927 if (err) 928 return err; 929 930 dev->mdev->rev_id = dev->mdev->pdev->revision; 931 932 return mlx5_query_node_guid(dev, &dev->ib_dev.node_guid); 933 } 934 935 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 936 char *buf) 937 { 938 struct mlx5_ib_dev *dev = 939 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 940 941 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages); 942 } 943 944 static ssize_t show_reg_pages(struct device *device, 945 struct device_attribute *attr, char *buf) 946 { 947 struct mlx5_ib_dev *dev = 948 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 949 950 return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); 951 } 952 953 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 954 char *buf) 955 { 956 struct mlx5_ib_dev *dev = 957 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 958 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 959 } 960 961 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 962 char *buf) 963 { 964 struct mlx5_ib_dev *dev = 965 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 966 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev), 967 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 968 } 969 970 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 971 char *buf) 972 { 973 struct mlx5_ib_dev *dev = 974 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 975 return sprintf(buf, "%x\n", dev->mdev->rev_id); 976 } 977 978 static ssize_t show_board(struct device *device, struct device_attribute *attr, 979 char *buf) 980 { 981 struct mlx5_ib_dev *dev = 982 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 983 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 984 dev->mdev->board_id); 985 } 986 987 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 988 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 989 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 990 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 991 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 992 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 993 994 static struct device_attribute *mlx5_class_attributes[] = { 995 &dev_attr_hw_rev, 996 &dev_attr_fw_ver, 997 &dev_attr_hca_type, 998 &dev_attr_board_id, 999 &dev_attr_fw_pages, 1000 &dev_attr_reg_pages, 1001 }; 1002 1003 static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 1004 enum mlx5_dev_event event, unsigned long param) 1005 { 1006 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 1007 struct ib_event ibev; 1008 1009 u8 port = 0; 1010 1011 switch (event) { 1012 case MLX5_DEV_EVENT_SYS_ERROR: 1013 ibdev->ib_active = false; 1014 ibev.event = IB_EVENT_DEVICE_FATAL; 1015 break; 1016 1017 case MLX5_DEV_EVENT_PORT_UP: 1018 ibev.event = IB_EVENT_PORT_ACTIVE; 1019 port = (u8)param; 1020 break; 1021 1022 case MLX5_DEV_EVENT_PORT_DOWN: 1023 ibev.event = IB_EVENT_PORT_ERR; 1024 port = (u8)param; 1025 break; 1026 1027 case MLX5_DEV_EVENT_PORT_INITIALIZED: 1028 /* not used by ULPs */ 1029 return; 1030 1031 case MLX5_DEV_EVENT_LID_CHANGE: 1032 ibev.event = IB_EVENT_LID_CHANGE; 1033 port = (u8)param; 1034 break; 1035 1036 case MLX5_DEV_EVENT_PKEY_CHANGE: 1037 ibev.event = IB_EVENT_PKEY_CHANGE; 1038 port = (u8)param; 1039 break; 1040 1041 case MLX5_DEV_EVENT_GUID_CHANGE: 1042 ibev.event = IB_EVENT_GID_CHANGE; 1043 port = (u8)param; 1044 break; 1045 1046 case MLX5_DEV_EVENT_CLIENT_REREG: 1047 ibev.event = IB_EVENT_CLIENT_REREGISTER; 1048 port = (u8)param; 1049 break; 1050 } 1051 1052 ibev.device = &ibdev->ib_dev; 1053 ibev.element.port_num = port; 1054 1055 if (port < 1 || port > ibdev->num_ports) { 1056 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 1057 return; 1058 } 1059 1060 if (ibdev->ib_active) 1061 ib_dispatch_event(&ibev); 1062 } 1063 1064 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 1065 { 1066 int port; 1067 1068 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) 1069 mlx5_query_ext_port_caps(dev, port); 1070 } 1071 1072 static int get_port_caps(struct mlx5_ib_dev *dev) 1073 { 1074 struct ib_device_attr *dprops = NULL; 1075 struct ib_port_attr *pprops = NULL; 1076 int err = -ENOMEM; 1077 int port; 1078 struct ib_udata uhw = {.inlen = 0, .outlen = 0}; 1079 1080 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 1081 if (!pprops) 1082 goto out; 1083 1084 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 1085 if (!dprops) 1086 goto out; 1087 1088 err = mlx5_ib_query_device(&dev->ib_dev, dprops, &uhw); 1089 if (err) { 1090 mlx5_ib_warn(dev, "query_device failed %d\n", err); 1091 goto out; 1092 } 1093 1094 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) { 1095 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 1096 if (err) { 1097 mlx5_ib_warn(dev, "query_port %d failed %d\n", 1098 port, err); 1099 break; 1100 } 1101 dev->mdev->port_caps[port - 1].pkey_table_len = 1102 dprops->max_pkeys; 1103 dev->mdev->port_caps[port - 1].gid_table_len = 1104 pprops->gid_tbl_len; 1105 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 1106 dprops->max_pkeys, pprops->gid_tbl_len); 1107 } 1108 1109 out: 1110 kfree(pprops); 1111 kfree(dprops); 1112 1113 return err; 1114 } 1115 1116 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 1117 { 1118 int err; 1119 1120 err = mlx5_mr_cache_cleanup(dev); 1121 if (err) 1122 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 1123 1124 mlx5_ib_destroy_qp(dev->umrc.qp); 1125 ib_destroy_cq(dev->umrc.cq); 1126 ib_dealloc_pd(dev->umrc.pd); 1127 } 1128 1129 enum { 1130 MAX_UMR_WR = 128, 1131 }; 1132 1133 static int create_umr_res(struct mlx5_ib_dev *dev) 1134 { 1135 struct ib_qp_init_attr *init_attr = NULL; 1136 struct ib_qp_attr *attr = NULL; 1137 struct ib_pd *pd; 1138 struct ib_cq *cq; 1139 struct ib_qp *qp; 1140 struct ib_cq_init_attr cq_attr = {}; 1141 int ret; 1142 1143 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 1144 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 1145 if (!attr || !init_attr) { 1146 ret = -ENOMEM; 1147 goto error_0; 1148 } 1149 1150 pd = ib_alloc_pd(&dev->ib_dev); 1151 if (IS_ERR(pd)) { 1152 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 1153 ret = PTR_ERR(pd); 1154 goto error_0; 1155 } 1156 1157 cq_attr.cqe = 128; 1158 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 1159 &cq_attr); 1160 if (IS_ERR(cq)) { 1161 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 1162 ret = PTR_ERR(cq); 1163 goto error_2; 1164 } 1165 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1166 1167 init_attr->send_cq = cq; 1168 init_attr->recv_cq = cq; 1169 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1170 init_attr->cap.max_send_wr = MAX_UMR_WR; 1171 init_attr->cap.max_send_sge = 1; 1172 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1173 init_attr->port_num = 1; 1174 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1175 if (IS_ERR(qp)) { 1176 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1177 ret = PTR_ERR(qp); 1178 goto error_3; 1179 } 1180 qp->device = &dev->ib_dev; 1181 qp->real_qp = qp; 1182 qp->uobject = NULL; 1183 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1184 1185 attr->qp_state = IB_QPS_INIT; 1186 attr->port_num = 1; 1187 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1188 IB_QP_PORT, NULL); 1189 if (ret) { 1190 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1191 goto error_4; 1192 } 1193 1194 memset(attr, 0, sizeof(*attr)); 1195 attr->qp_state = IB_QPS_RTR; 1196 attr->path_mtu = IB_MTU_256; 1197 1198 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1199 if (ret) { 1200 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1201 goto error_4; 1202 } 1203 1204 memset(attr, 0, sizeof(*attr)); 1205 attr->qp_state = IB_QPS_RTS; 1206 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1207 if (ret) { 1208 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1209 goto error_4; 1210 } 1211 1212 dev->umrc.qp = qp; 1213 dev->umrc.cq = cq; 1214 dev->umrc.pd = pd; 1215 1216 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1217 ret = mlx5_mr_cache_init(dev); 1218 if (ret) { 1219 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1220 goto error_4; 1221 } 1222 1223 kfree(attr); 1224 kfree(init_attr); 1225 1226 return 0; 1227 1228 error_4: 1229 mlx5_ib_destroy_qp(qp); 1230 1231 error_3: 1232 ib_destroy_cq(cq); 1233 1234 error_2: 1235 ib_dealloc_pd(pd); 1236 1237 error_0: 1238 kfree(attr); 1239 kfree(init_attr); 1240 return ret; 1241 } 1242 1243 static int create_dev_resources(struct mlx5_ib_resources *devr) 1244 { 1245 struct ib_srq_init_attr attr; 1246 struct mlx5_ib_dev *dev; 1247 struct ib_cq_init_attr cq_attr = {.cqe = 1}; 1248 u32 rsvd_lkey; 1249 int ret = 0; 1250 1251 dev = container_of(devr, struct mlx5_ib_dev, devr); 1252 1253 ret = mlx5_core_query_special_context(dev->mdev, &rsvd_lkey); 1254 if (ret) { 1255 pr_err("Failed to query special context %d\n", ret); 1256 return ret; 1257 } 1258 dev->ib_dev.local_dma_lkey = rsvd_lkey; 1259 1260 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1261 if (IS_ERR(devr->p0)) { 1262 ret = PTR_ERR(devr->p0); 1263 goto error0; 1264 } 1265 devr->p0->device = &dev->ib_dev; 1266 devr->p0->uobject = NULL; 1267 atomic_set(&devr->p0->usecnt, 0); 1268 1269 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, &cq_attr, NULL, NULL); 1270 if (IS_ERR(devr->c0)) { 1271 ret = PTR_ERR(devr->c0); 1272 goto error1; 1273 } 1274 devr->c0->device = &dev->ib_dev; 1275 devr->c0->uobject = NULL; 1276 devr->c0->comp_handler = NULL; 1277 devr->c0->event_handler = NULL; 1278 devr->c0->cq_context = NULL; 1279 atomic_set(&devr->c0->usecnt, 0); 1280 1281 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1282 if (IS_ERR(devr->x0)) { 1283 ret = PTR_ERR(devr->x0); 1284 goto error2; 1285 } 1286 devr->x0->device = &dev->ib_dev; 1287 devr->x0->inode = NULL; 1288 atomic_set(&devr->x0->usecnt, 0); 1289 mutex_init(&devr->x0->tgt_qp_mutex); 1290 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1291 1292 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1293 if (IS_ERR(devr->x1)) { 1294 ret = PTR_ERR(devr->x1); 1295 goto error3; 1296 } 1297 devr->x1->device = &dev->ib_dev; 1298 devr->x1->inode = NULL; 1299 atomic_set(&devr->x1->usecnt, 0); 1300 mutex_init(&devr->x1->tgt_qp_mutex); 1301 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1302 1303 memset(&attr, 0, sizeof(attr)); 1304 attr.attr.max_sge = 1; 1305 attr.attr.max_wr = 1; 1306 attr.srq_type = IB_SRQT_XRC; 1307 attr.ext.xrc.cq = devr->c0; 1308 attr.ext.xrc.xrcd = devr->x0; 1309 1310 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1311 if (IS_ERR(devr->s0)) { 1312 ret = PTR_ERR(devr->s0); 1313 goto error4; 1314 } 1315 devr->s0->device = &dev->ib_dev; 1316 devr->s0->pd = devr->p0; 1317 devr->s0->uobject = NULL; 1318 devr->s0->event_handler = NULL; 1319 devr->s0->srq_context = NULL; 1320 devr->s0->srq_type = IB_SRQT_XRC; 1321 devr->s0->ext.xrc.xrcd = devr->x0; 1322 devr->s0->ext.xrc.cq = devr->c0; 1323 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1324 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1325 atomic_inc(&devr->p0->usecnt); 1326 atomic_set(&devr->s0->usecnt, 0); 1327 1328 memset(&attr, 0, sizeof(attr)); 1329 attr.attr.max_sge = 1; 1330 attr.attr.max_wr = 1; 1331 attr.srq_type = IB_SRQT_BASIC; 1332 devr->s1 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1333 if (IS_ERR(devr->s1)) { 1334 ret = PTR_ERR(devr->s1); 1335 goto error5; 1336 } 1337 devr->s1->device = &dev->ib_dev; 1338 devr->s1->pd = devr->p0; 1339 devr->s1->uobject = NULL; 1340 devr->s1->event_handler = NULL; 1341 devr->s1->srq_context = NULL; 1342 devr->s1->srq_type = IB_SRQT_BASIC; 1343 devr->s1->ext.xrc.cq = devr->c0; 1344 atomic_inc(&devr->p0->usecnt); 1345 atomic_set(&devr->s0->usecnt, 0); 1346 1347 return 0; 1348 1349 error5: 1350 mlx5_ib_destroy_srq(devr->s0); 1351 error4: 1352 mlx5_ib_dealloc_xrcd(devr->x1); 1353 error3: 1354 mlx5_ib_dealloc_xrcd(devr->x0); 1355 error2: 1356 mlx5_ib_destroy_cq(devr->c0); 1357 error1: 1358 mlx5_ib_dealloc_pd(devr->p0); 1359 error0: 1360 return ret; 1361 } 1362 1363 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1364 { 1365 mlx5_ib_destroy_srq(devr->s1); 1366 mlx5_ib_destroy_srq(devr->s0); 1367 mlx5_ib_dealloc_xrcd(devr->x0); 1368 mlx5_ib_dealloc_xrcd(devr->x1); 1369 mlx5_ib_destroy_cq(devr->c0); 1370 mlx5_ib_dealloc_pd(devr->p0); 1371 } 1372 1373 static int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num, 1374 struct ib_port_immutable *immutable) 1375 { 1376 struct ib_port_attr attr; 1377 int err; 1378 1379 err = mlx5_ib_query_port(ibdev, port_num, &attr); 1380 if (err) 1381 return err; 1382 1383 immutable->pkey_tbl_len = attr.pkey_tbl_len; 1384 immutable->gid_tbl_len = attr.gid_tbl_len; 1385 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 1386 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 1387 1388 return 0; 1389 } 1390 1391 static void *mlx5_ib_add(struct mlx5_core_dev *mdev) 1392 { 1393 struct mlx5_ib_dev *dev; 1394 int err; 1395 int i; 1396 1397 /* don't create IB instance over Eth ports, no RoCE yet! */ 1398 if (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) 1399 return NULL; 1400 1401 printk_once(KERN_INFO "%s", mlx5_version); 1402 1403 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1404 if (!dev) 1405 return NULL; 1406 1407 dev->mdev = mdev; 1408 1409 err = get_port_caps(dev); 1410 if (err) 1411 goto err_dealloc; 1412 1413 if (mlx5_use_mad_ifc(dev)) 1414 get_ext_port_caps(dev); 1415 1416 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1417 1418 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1419 dev->ib_dev.owner = THIS_MODULE; 1420 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1421 dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); 1422 dev->ib_dev.phys_port_cnt = dev->num_ports; 1423 dev->ib_dev.num_comp_vectors = 1424 dev->mdev->priv.eq_table.num_comp_vectors; 1425 dev->ib_dev.dma_device = &mdev->pdev->dev; 1426 1427 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1428 dev->ib_dev.uverbs_cmd_mask = 1429 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1430 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1431 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1432 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1433 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1434 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1435 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1436 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1437 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1438 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1439 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1440 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1441 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1442 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1443 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1444 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1445 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1446 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1447 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1448 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1449 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1450 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1451 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1452 dev->ib_dev.uverbs_ex_cmd_mask = 1453 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE); 1454 1455 dev->ib_dev.query_device = mlx5_ib_query_device; 1456 dev->ib_dev.query_port = mlx5_ib_query_port; 1457 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1458 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1459 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1460 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1461 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1462 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1463 dev->ib_dev.mmap = mlx5_ib_mmap; 1464 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1465 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1466 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1467 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1468 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1469 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1470 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1471 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1472 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1473 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1474 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1475 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1476 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1477 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1478 dev->ib_dev.post_send = mlx5_ib_post_send; 1479 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1480 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1481 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1482 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1483 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1484 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1485 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1486 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1487 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1488 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1489 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1490 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1491 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1492 dev->ib_dev.alloc_mr = mlx5_ib_alloc_mr; 1493 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1494 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1495 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 1496 dev->ib_dev.get_port_immutable = mlx5_port_immutable; 1497 1498 mlx5_ib_internal_fill_odp_caps(dev); 1499 1500 if (MLX5_CAP_GEN(mdev, xrc)) { 1501 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1502 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1503 dev->ib_dev.uverbs_cmd_mask |= 1504 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1505 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1506 } 1507 1508 err = init_node_data(dev); 1509 if (err) 1510 goto err_dealloc; 1511 1512 mutex_init(&dev->cap_mask_mutex); 1513 1514 err = create_dev_resources(&dev->devr); 1515 if (err) 1516 goto err_dealloc; 1517 1518 err = mlx5_ib_odp_init_one(dev); 1519 if (err) 1520 goto err_rsrc; 1521 1522 err = ib_register_device(&dev->ib_dev, NULL); 1523 if (err) 1524 goto err_odp; 1525 1526 err = create_umr_res(dev); 1527 if (err) 1528 goto err_dev; 1529 1530 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1531 err = device_create_file(&dev->ib_dev.dev, 1532 mlx5_class_attributes[i]); 1533 if (err) 1534 goto err_umrc; 1535 } 1536 1537 dev->ib_active = true; 1538 1539 return dev; 1540 1541 err_umrc: 1542 destroy_umrc_res(dev); 1543 1544 err_dev: 1545 ib_unregister_device(&dev->ib_dev); 1546 1547 err_odp: 1548 mlx5_ib_odp_remove_one(dev); 1549 1550 err_rsrc: 1551 destroy_dev_resources(&dev->devr); 1552 1553 err_dealloc: 1554 ib_dealloc_device((struct ib_device *)dev); 1555 1556 return NULL; 1557 } 1558 1559 static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 1560 { 1561 struct mlx5_ib_dev *dev = context; 1562 1563 ib_unregister_device(&dev->ib_dev); 1564 destroy_umrc_res(dev); 1565 mlx5_ib_odp_remove_one(dev); 1566 destroy_dev_resources(&dev->devr); 1567 ib_dealloc_device(&dev->ib_dev); 1568 } 1569 1570 static struct mlx5_interface mlx5_ib_interface = { 1571 .add = mlx5_ib_add, 1572 .remove = mlx5_ib_remove, 1573 .event = mlx5_ib_event, 1574 .protocol = MLX5_INTERFACE_PROTOCOL_IB, 1575 }; 1576 1577 static int __init mlx5_ib_init(void) 1578 { 1579 int err; 1580 1581 if (deprecated_prof_sel != 2) 1582 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); 1583 1584 err = mlx5_ib_odp_init(); 1585 if (err) 1586 return err; 1587 1588 err = mlx5_register_interface(&mlx5_ib_interface); 1589 if (err) 1590 goto clean_odp; 1591 1592 return err; 1593 1594 clean_odp: 1595 mlx5_ib_odp_cleanup(); 1596 return err; 1597 } 1598 1599 static void __exit mlx5_ib_cleanup(void) 1600 { 1601 mlx5_unregister_interface(&mlx5_ib_interface); 1602 mlx5_ib_odp_cleanup(); 1603 } 1604 1605 module_init(mlx5_ib_init); 1606 module_exit(mlx5_ib_cleanup); 1607