1 /* 2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <rdma/ib_smi.h> 44 #include <rdma/ib_umem.h> 45 #include "user.h" 46 #include "mlx5_ib.h" 47 48 #define DRIVER_NAME "mlx5_ib" 49 #define DRIVER_VERSION "2.2-1" 50 #define DRIVER_RELDATE "Feb 2014" 51 52 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 53 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 54 MODULE_LICENSE("Dual BSD/GPL"); 55 MODULE_VERSION(DRIVER_VERSION); 56 57 static int prof_sel = 2; 58 module_param_named(prof_sel, prof_sel, int, 0444); 59 MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); 60 61 static char mlx5_version[] = 62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 64 65 static struct mlx5_profile profile[] = { 66 [0] = { 67 .mask = 0, 68 }, 69 [1] = { 70 .mask = MLX5_PROF_MASK_QP_SIZE, 71 .log_max_qp = 12, 72 }, 73 [2] = { 74 .mask = MLX5_PROF_MASK_QP_SIZE | 75 MLX5_PROF_MASK_MR_CACHE, 76 .log_max_qp = 17, 77 .mr_cache[0] = { 78 .size = 500, 79 .limit = 250 80 }, 81 .mr_cache[1] = { 82 .size = 500, 83 .limit = 250 84 }, 85 .mr_cache[2] = { 86 .size = 500, 87 .limit = 250 88 }, 89 .mr_cache[3] = { 90 .size = 500, 91 .limit = 250 92 }, 93 .mr_cache[4] = { 94 .size = 500, 95 .limit = 250 96 }, 97 .mr_cache[5] = { 98 .size = 500, 99 .limit = 250 100 }, 101 .mr_cache[6] = { 102 .size = 500, 103 .limit = 250 104 }, 105 .mr_cache[7] = { 106 .size = 500, 107 .limit = 250 108 }, 109 .mr_cache[8] = { 110 .size = 500, 111 .limit = 250 112 }, 113 .mr_cache[9] = { 114 .size = 500, 115 .limit = 250 116 }, 117 .mr_cache[10] = { 118 .size = 500, 119 .limit = 250 120 }, 121 .mr_cache[11] = { 122 .size = 500, 123 .limit = 250 124 }, 125 .mr_cache[12] = { 126 .size = 64, 127 .limit = 32 128 }, 129 .mr_cache[13] = { 130 .size = 32, 131 .limit = 16 132 }, 133 .mr_cache[14] = { 134 .size = 16, 135 .limit = 8 136 }, 137 .mr_cache[15] = { 138 .size = 8, 139 .limit = 4 140 }, 141 }, 142 }; 143 144 int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn) 145 { 146 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; 147 struct mlx5_eq *eq, *n; 148 int err = -ENOENT; 149 150 spin_lock(&table->lock); 151 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 152 if (eq->index == vector) { 153 *eqn = eq->eqn; 154 *irqn = eq->irqn; 155 err = 0; 156 break; 157 } 158 } 159 spin_unlock(&table->lock); 160 161 return err; 162 } 163 164 static int alloc_comp_eqs(struct mlx5_ib_dev *dev) 165 { 166 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; 167 char name[MLX5_MAX_EQ_NAME]; 168 struct mlx5_eq *eq, *n; 169 int ncomp_vec; 170 int nent; 171 int err; 172 int i; 173 174 INIT_LIST_HEAD(&dev->eqs_list); 175 ncomp_vec = table->num_comp_vectors; 176 nent = MLX5_COMP_EQ_SIZE; 177 for (i = 0; i < ncomp_vec; i++) { 178 eq = kzalloc(sizeof(*eq), GFP_KERNEL); 179 if (!eq) { 180 err = -ENOMEM; 181 goto clean; 182 } 183 184 snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i); 185 err = mlx5_create_map_eq(&dev->mdev, eq, 186 i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 187 name, &dev->mdev.priv.uuari.uars[0]); 188 if (err) { 189 kfree(eq); 190 goto clean; 191 } 192 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 193 eq->index = i; 194 spin_lock(&table->lock); 195 list_add_tail(&eq->list, &dev->eqs_list); 196 spin_unlock(&table->lock); 197 } 198 199 dev->num_comp_vectors = ncomp_vec; 200 return 0; 201 202 clean: 203 spin_lock(&table->lock); 204 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 205 list_del(&eq->list); 206 spin_unlock(&table->lock); 207 if (mlx5_destroy_unmap_eq(&dev->mdev, eq)) 208 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 209 kfree(eq); 210 spin_lock(&table->lock); 211 } 212 spin_unlock(&table->lock); 213 return err; 214 } 215 216 static void free_comp_eqs(struct mlx5_ib_dev *dev) 217 { 218 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; 219 struct mlx5_eq *eq, *n; 220 221 spin_lock(&table->lock); 222 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 223 list_del(&eq->list); 224 spin_unlock(&table->lock); 225 if (mlx5_destroy_unmap_eq(&dev->mdev, eq)) 226 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 227 kfree(eq); 228 spin_lock(&table->lock); 229 } 230 spin_unlock(&table->lock); 231 } 232 233 static int mlx5_ib_query_device(struct ib_device *ibdev, 234 struct ib_device_attr *props) 235 { 236 struct mlx5_ib_dev *dev = to_mdev(ibdev); 237 struct ib_smp *in_mad = NULL; 238 struct ib_smp *out_mad = NULL; 239 int err = -ENOMEM; 240 int max_rq_sg; 241 int max_sq_sg; 242 u64 flags; 243 244 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 245 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 246 if (!in_mad || !out_mad) 247 goto out; 248 249 init_query_mad(in_mad); 250 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 251 252 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); 253 if (err) 254 goto out; 255 256 memset(props, 0, sizeof(*props)); 257 258 props->fw_ver = ((u64)fw_rev_maj(&dev->mdev) << 32) | 259 (fw_rev_min(&dev->mdev) << 16) | 260 fw_rev_sub(&dev->mdev); 261 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 262 IB_DEVICE_PORT_ACTIVE_EVENT | 263 IB_DEVICE_SYS_IMAGE_GUID | 264 IB_DEVICE_RC_RNR_NAK_GEN; 265 flags = dev->mdev.caps.flags; 266 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR) 267 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 268 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR) 269 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 270 if (flags & MLX5_DEV_CAP_FLAG_APM) 271 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 272 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 273 if (flags & MLX5_DEV_CAP_FLAG_XRC) 274 props->device_cap_flags |= IB_DEVICE_XRC; 275 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 276 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) { 277 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 278 /* At this stage no support for signature handover */ 279 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 280 IB_PROT_T10DIF_TYPE_2 | 281 IB_PROT_T10DIF_TYPE_3; 282 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 283 IB_GUARD_T10DIF_CSUM; 284 } 285 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST) 286 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 287 288 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 289 0xffffff; 290 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); 291 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); 292 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 293 294 props->max_mr_size = ~0ull; 295 props->page_size_cap = dev->mdev.caps.min_page_sz; 296 props->max_qp = 1 << dev->mdev.caps.log_max_qp; 297 props->max_qp_wr = dev->mdev.caps.max_wqes; 298 max_rq_sg = dev->mdev.caps.max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg); 299 max_sq_sg = (dev->mdev.caps.max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) / 300 sizeof(struct mlx5_wqe_data_seg); 301 props->max_sge = min(max_rq_sg, max_sq_sg); 302 props->max_cq = 1 << dev->mdev.caps.log_max_cq; 303 props->max_cqe = dev->mdev.caps.max_cqes - 1; 304 props->max_mr = 1 << dev->mdev.caps.log_max_mkey; 305 props->max_pd = 1 << dev->mdev.caps.log_max_pd; 306 props->max_qp_rd_atom = dev->mdev.caps.max_ra_req_qp; 307 props->max_qp_init_rd_atom = dev->mdev.caps.max_ra_res_qp; 308 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 309 props->max_srq = 1 << dev->mdev.caps.log_max_srq; 310 props->max_srq_wr = dev->mdev.caps.max_srq_wqes - 1; 311 props->max_srq_sge = max_rq_sg - 1; 312 props->max_fast_reg_page_list_len = (unsigned int)-1; 313 props->local_ca_ack_delay = dev->mdev.caps.local_ca_ack_delay; 314 props->atomic_cap = IB_ATOMIC_NONE; 315 props->masked_atomic_cap = IB_ATOMIC_NONE; 316 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); 317 props->max_mcast_grp = 1 << dev->mdev.caps.log_max_mcg; 318 props->max_mcast_qp_attach = dev->mdev.caps.max_qp_mcg; 319 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 320 props->max_mcast_grp; 321 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 322 323 out: 324 kfree(in_mad); 325 kfree(out_mad); 326 327 return err; 328 } 329 330 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 331 struct ib_port_attr *props) 332 { 333 struct mlx5_ib_dev *dev = to_mdev(ibdev); 334 struct ib_smp *in_mad = NULL; 335 struct ib_smp *out_mad = NULL; 336 int ext_active_speed; 337 int err = -ENOMEM; 338 339 if (port < 1 || port > dev->mdev.caps.num_ports) { 340 mlx5_ib_warn(dev, "invalid port number %d\n", port); 341 return -EINVAL; 342 } 343 344 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 345 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 346 if (!in_mad || !out_mad) 347 goto out; 348 349 memset(props, 0, sizeof(*props)); 350 351 init_query_mad(in_mad); 352 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 353 in_mad->attr_mod = cpu_to_be32(port); 354 355 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); 356 if (err) { 357 mlx5_ib_warn(dev, "err %d\n", err); 358 goto out; 359 } 360 361 362 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); 363 props->lmc = out_mad->data[34] & 0x7; 364 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); 365 props->sm_sl = out_mad->data[36] & 0xf; 366 props->state = out_mad->data[32] & 0xf; 367 props->phys_state = out_mad->data[33] >> 4; 368 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); 369 props->gid_tbl_len = out_mad->data[50]; 370 props->max_msg_sz = 1 << to_mdev(ibdev)->mdev.caps.log_max_msg; 371 props->pkey_tbl_len = to_mdev(ibdev)->mdev.caps.port[port - 1].pkey_table_len; 372 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); 373 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); 374 props->active_width = out_mad->data[31] & 0xf; 375 props->active_speed = out_mad->data[35] >> 4; 376 props->max_mtu = out_mad->data[41] & 0xf; 377 props->active_mtu = out_mad->data[36] >> 4; 378 props->subnet_timeout = out_mad->data[51] & 0x1f; 379 props->max_vl_num = out_mad->data[37] >> 4; 380 props->init_type_reply = out_mad->data[41] >> 4; 381 382 /* Check if extended speeds (EDR/FDR/...) are supported */ 383 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 384 ext_active_speed = out_mad->data[62] >> 4; 385 386 switch (ext_active_speed) { 387 case 1: 388 props->active_speed = 16; /* FDR */ 389 break; 390 case 2: 391 props->active_speed = 32; /* EDR */ 392 break; 393 } 394 } 395 396 /* If reported active speed is QDR, check if is FDR-10 */ 397 if (props->active_speed == 4) { 398 if (dev->mdev.caps.ext_port_cap[port - 1] & 399 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { 400 init_query_mad(in_mad); 401 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; 402 in_mad->attr_mod = cpu_to_be32(port); 403 404 err = mlx5_MAD_IFC(dev, 1, 1, port, 405 NULL, NULL, in_mad, out_mad); 406 if (err) 407 goto out; 408 409 /* Checking LinkSpeedActive for FDR-10 */ 410 if (out_mad->data[15] & 0x1) 411 props->active_speed = 8; 412 } 413 } 414 415 out: 416 kfree(in_mad); 417 kfree(out_mad); 418 419 return err; 420 } 421 422 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 423 union ib_gid *gid) 424 { 425 struct ib_smp *in_mad = NULL; 426 struct ib_smp *out_mad = NULL; 427 int err = -ENOMEM; 428 429 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 430 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 431 if (!in_mad || !out_mad) 432 goto out; 433 434 init_query_mad(in_mad); 435 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 436 in_mad->attr_mod = cpu_to_be32(port); 437 438 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 439 if (err) 440 goto out; 441 442 memcpy(gid->raw, out_mad->data + 8, 8); 443 444 init_query_mad(in_mad); 445 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 446 in_mad->attr_mod = cpu_to_be32(index / 8); 447 448 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 449 if (err) 450 goto out; 451 452 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 453 454 out: 455 kfree(in_mad); 456 kfree(out_mad); 457 return err; 458 } 459 460 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 461 u16 *pkey) 462 { 463 struct ib_smp *in_mad = NULL; 464 struct ib_smp *out_mad = NULL; 465 int err = -ENOMEM; 466 467 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 468 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 469 if (!in_mad || !out_mad) 470 goto out; 471 472 init_query_mad(in_mad); 473 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 474 in_mad->attr_mod = cpu_to_be32(index / 32); 475 476 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 477 if (err) 478 goto out; 479 480 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); 481 482 out: 483 kfree(in_mad); 484 kfree(out_mad); 485 return err; 486 } 487 488 struct mlx5_reg_node_desc { 489 u8 desc[64]; 490 }; 491 492 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 493 struct ib_device_modify *props) 494 { 495 struct mlx5_ib_dev *dev = to_mdev(ibdev); 496 struct mlx5_reg_node_desc in; 497 struct mlx5_reg_node_desc out; 498 int err; 499 500 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 501 return -EOPNOTSUPP; 502 503 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 504 return 0; 505 506 /* 507 * If possible, pass node desc to FW, so it can generate 508 * a 144 trap. If cmd fails, just ignore. 509 */ 510 memcpy(&in, props->node_desc, 64); 511 err = mlx5_core_access_reg(&dev->mdev, &in, sizeof(in), &out, 512 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 513 if (err) 514 return err; 515 516 memcpy(ibdev->node_desc, props->node_desc, 64); 517 518 return err; 519 } 520 521 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 522 struct ib_port_modify *props) 523 { 524 struct mlx5_ib_dev *dev = to_mdev(ibdev); 525 struct ib_port_attr attr; 526 u32 tmp; 527 int err; 528 529 mutex_lock(&dev->cap_mask_mutex); 530 531 err = mlx5_ib_query_port(ibdev, port, &attr); 532 if (err) 533 goto out; 534 535 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 536 ~props->clr_port_cap_mask; 537 538 err = mlx5_set_port_caps(&dev->mdev, port, tmp); 539 540 out: 541 mutex_unlock(&dev->cap_mask_mutex); 542 return err; 543 } 544 545 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 546 struct ib_udata *udata) 547 { 548 struct mlx5_ib_dev *dev = to_mdev(ibdev); 549 struct mlx5_ib_alloc_ucontext_req_v2 req; 550 struct mlx5_ib_alloc_ucontext_resp resp; 551 struct mlx5_ib_ucontext *context; 552 struct mlx5_uuar_info *uuari; 553 struct mlx5_uar *uars; 554 int gross_uuars; 555 int num_uars; 556 int ver; 557 int uuarn; 558 int err; 559 int i; 560 int reqlen; 561 562 if (!dev->ib_active) 563 return ERR_PTR(-EAGAIN); 564 565 memset(&req, 0, sizeof(req)); 566 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 567 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 568 ver = 0; 569 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 570 ver = 2; 571 else 572 return ERR_PTR(-EINVAL); 573 574 err = ib_copy_from_udata(&req, udata, reqlen); 575 if (err) 576 return ERR_PTR(err); 577 578 if (req.flags || req.reserved) 579 return ERR_PTR(-EINVAL); 580 581 if (req.total_num_uuars > MLX5_MAX_UUARS) 582 return ERR_PTR(-ENOMEM); 583 584 if (req.total_num_uuars == 0) 585 return ERR_PTR(-EINVAL); 586 587 req.total_num_uuars = ALIGN(req.total_num_uuars, 588 MLX5_NON_FP_BF_REGS_PER_PAGE); 589 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 590 return ERR_PTR(-EINVAL); 591 592 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 593 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 594 resp.qp_tab_size = 1 << dev->mdev.caps.log_max_qp; 595 resp.bf_reg_size = dev->mdev.caps.bf_reg_size; 596 resp.cache_line_size = L1_CACHE_BYTES; 597 resp.max_sq_desc_sz = dev->mdev.caps.max_sq_desc_sz; 598 resp.max_rq_desc_sz = dev->mdev.caps.max_rq_desc_sz; 599 resp.max_send_wqebb = dev->mdev.caps.max_wqes; 600 resp.max_recv_wr = dev->mdev.caps.max_wqes; 601 resp.max_srq_recv_wr = dev->mdev.caps.max_srq_wqes; 602 603 context = kzalloc(sizeof(*context), GFP_KERNEL); 604 if (!context) 605 return ERR_PTR(-ENOMEM); 606 607 uuari = &context->uuari; 608 mutex_init(&uuari->lock); 609 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 610 if (!uars) { 611 err = -ENOMEM; 612 goto out_ctx; 613 } 614 615 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 616 sizeof(*uuari->bitmap), 617 GFP_KERNEL); 618 if (!uuari->bitmap) { 619 err = -ENOMEM; 620 goto out_uar_ctx; 621 } 622 /* 623 * clear all fast path uuars 624 */ 625 for (i = 0; i < gross_uuars; i++) { 626 uuarn = i & 3; 627 if (uuarn == 2 || uuarn == 3) 628 set_bit(i, uuari->bitmap); 629 } 630 631 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 632 if (!uuari->count) { 633 err = -ENOMEM; 634 goto out_bitmap; 635 } 636 637 for (i = 0; i < num_uars; i++) { 638 err = mlx5_cmd_alloc_uar(&dev->mdev, &uars[i].index); 639 if (err) 640 goto out_count; 641 } 642 643 INIT_LIST_HEAD(&context->db_page_list); 644 mutex_init(&context->db_page_mutex); 645 646 resp.tot_uuars = req.total_num_uuars; 647 resp.num_ports = dev->mdev.caps.num_ports; 648 err = ib_copy_to_udata(udata, &resp, 649 sizeof(resp) - sizeof(resp.reserved)); 650 if (err) 651 goto out_uars; 652 653 uuari->ver = ver; 654 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 655 uuari->uars = uars; 656 uuari->num_uars = num_uars; 657 return &context->ibucontext; 658 659 out_uars: 660 for (i--; i >= 0; i--) 661 mlx5_cmd_free_uar(&dev->mdev, uars[i].index); 662 out_count: 663 kfree(uuari->count); 664 665 out_bitmap: 666 kfree(uuari->bitmap); 667 668 out_uar_ctx: 669 kfree(uars); 670 671 out_ctx: 672 kfree(context); 673 return ERR_PTR(err); 674 } 675 676 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 677 { 678 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 679 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 680 struct mlx5_uuar_info *uuari = &context->uuari; 681 int i; 682 683 for (i = 0; i < uuari->num_uars; i++) { 684 if (mlx5_cmd_free_uar(&dev->mdev, uuari->uars[i].index)) 685 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 686 } 687 688 kfree(uuari->count); 689 kfree(uuari->bitmap); 690 kfree(uuari->uars); 691 kfree(context); 692 693 return 0; 694 } 695 696 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 697 { 698 return (pci_resource_start(dev->mdev.pdev, 0) >> PAGE_SHIFT) + index; 699 } 700 701 static int get_command(unsigned long offset) 702 { 703 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 704 } 705 706 static int get_arg(unsigned long offset) 707 { 708 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 709 } 710 711 static int get_index(unsigned long offset) 712 { 713 return get_arg(offset); 714 } 715 716 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 717 { 718 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 719 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 720 struct mlx5_uuar_info *uuari = &context->uuari; 721 unsigned long command; 722 unsigned long idx; 723 phys_addr_t pfn; 724 725 command = get_command(vma->vm_pgoff); 726 switch (command) { 727 case MLX5_IB_MMAP_REGULAR_PAGE: 728 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 729 return -EINVAL; 730 731 idx = get_index(vma->vm_pgoff); 732 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 733 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 734 (unsigned long long)pfn); 735 736 if (idx >= uuari->num_uars) 737 return -EINVAL; 738 739 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 740 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 741 PAGE_SIZE, vma->vm_page_prot)) 742 return -EAGAIN; 743 744 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 745 vma->vm_start, 746 (unsigned long long)pfn << PAGE_SHIFT); 747 break; 748 749 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 750 return -ENOSYS; 751 752 default: 753 return -EINVAL; 754 } 755 756 return 0; 757 } 758 759 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 760 { 761 struct mlx5_create_mkey_mbox_in *in; 762 struct mlx5_mkey_seg *seg; 763 struct mlx5_core_mr mr; 764 int err; 765 766 in = kzalloc(sizeof(*in), GFP_KERNEL); 767 if (!in) 768 return -ENOMEM; 769 770 seg = &in->seg; 771 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 772 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 773 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 774 seg->start_addr = 0; 775 776 err = mlx5_core_create_mkey(&dev->mdev, &mr, in, sizeof(*in), 777 NULL, NULL, NULL); 778 if (err) { 779 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 780 goto err_in; 781 } 782 783 kfree(in); 784 *key = mr.key; 785 786 return 0; 787 788 err_in: 789 kfree(in); 790 791 return err; 792 } 793 794 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 795 { 796 struct mlx5_core_mr mr; 797 int err; 798 799 memset(&mr, 0, sizeof(mr)); 800 mr.key = key; 801 err = mlx5_core_destroy_mkey(&dev->mdev, &mr); 802 if (err) 803 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 804 } 805 806 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 807 struct ib_ucontext *context, 808 struct ib_udata *udata) 809 { 810 struct mlx5_ib_alloc_pd_resp resp; 811 struct mlx5_ib_pd *pd; 812 int err; 813 814 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 815 if (!pd) 816 return ERR_PTR(-ENOMEM); 817 818 err = mlx5_core_alloc_pd(&to_mdev(ibdev)->mdev, &pd->pdn); 819 if (err) { 820 kfree(pd); 821 return ERR_PTR(err); 822 } 823 824 if (context) { 825 resp.pdn = pd->pdn; 826 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 827 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn); 828 kfree(pd); 829 return ERR_PTR(-EFAULT); 830 } 831 } else { 832 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 833 if (err) { 834 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn); 835 kfree(pd); 836 return ERR_PTR(err); 837 } 838 } 839 840 return &pd->ibpd; 841 } 842 843 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 844 { 845 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 846 struct mlx5_ib_pd *mpd = to_mpd(pd); 847 848 if (!pd->uobject) 849 free_pa_mkey(mdev, mpd->pa_lkey); 850 851 mlx5_core_dealloc_pd(&mdev->mdev, mpd->pdn); 852 kfree(mpd); 853 854 return 0; 855 } 856 857 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 858 { 859 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 860 int err; 861 862 err = mlx5_core_attach_mcg(&dev->mdev, gid, ibqp->qp_num); 863 if (err) 864 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 865 ibqp->qp_num, gid->raw); 866 867 return err; 868 } 869 870 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 871 { 872 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 873 int err; 874 875 err = mlx5_core_detach_mcg(&dev->mdev, gid, ibqp->qp_num); 876 if (err) 877 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 878 ibqp->qp_num, gid->raw); 879 880 return err; 881 } 882 883 static int init_node_data(struct mlx5_ib_dev *dev) 884 { 885 struct ib_smp *in_mad = NULL; 886 struct ib_smp *out_mad = NULL; 887 int err = -ENOMEM; 888 889 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 890 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 891 if (!in_mad || !out_mad) 892 goto out; 893 894 init_query_mad(in_mad); 895 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 896 897 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 898 if (err) 899 goto out; 900 901 memcpy(dev->ib_dev.node_desc, out_mad->data, 64); 902 903 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 904 905 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 906 if (err) 907 goto out; 908 909 dev->mdev.rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); 910 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 911 912 out: 913 kfree(in_mad); 914 kfree(out_mad); 915 return err; 916 } 917 918 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 919 char *buf) 920 { 921 struct mlx5_ib_dev *dev = 922 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 923 924 return sprintf(buf, "%d\n", dev->mdev.priv.fw_pages); 925 } 926 927 static ssize_t show_reg_pages(struct device *device, 928 struct device_attribute *attr, char *buf) 929 { 930 struct mlx5_ib_dev *dev = 931 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 932 933 return sprintf(buf, "%d\n", dev->mdev.priv.reg_pages); 934 } 935 936 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 937 char *buf) 938 { 939 struct mlx5_ib_dev *dev = 940 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 941 return sprintf(buf, "MT%d\n", dev->mdev.pdev->device); 942 } 943 944 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 945 char *buf) 946 { 947 struct mlx5_ib_dev *dev = 948 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 949 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(&dev->mdev), 950 fw_rev_min(&dev->mdev), fw_rev_sub(&dev->mdev)); 951 } 952 953 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 954 char *buf) 955 { 956 struct mlx5_ib_dev *dev = 957 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 958 return sprintf(buf, "%x\n", dev->mdev.rev_id); 959 } 960 961 static ssize_t show_board(struct device *device, struct device_attribute *attr, 962 char *buf) 963 { 964 struct mlx5_ib_dev *dev = 965 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 966 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 967 dev->mdev.board_id); 968 } 969 970 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 971 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 972 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 973 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 974 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 975 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 976 977 static struct device_attribute *mlx5_class_attributes[] = { 978 &dev_attr_hw_rev, 979 &dev_attr_fw_ver, 980 &dev_attr_hca_type, 981 &dev_attr_board_id, 982 &dev_attr_fw_pages, 983 &dev_attr_reg_pages, 984 }; 985 986 static void mlx5_ib_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 987 void *data) 988 { 989 struct mlx5_ib_dev *ibdev = container_of(dev, struct mlx5_ib_dev, mdev); 990 struct ib_event ibev; 991 u8 port = 0; 992 993 switch (event) { 994 case MLX5_DEV_EVENT_SYS_ERROR: 995 ibdev->ib_active = false; 996 ibev.event = IB_EVENT_DEVICE_FATAL; 997 break; 998 999 case MLX5_DEV_EVENT_PORT_UP: 1000 ibev.event = IB_EVENT_PORT_ACTIVE; 1001 port = *(u8 *)data; 1002 break; 1003 1004 case MLX5_DEV_EVENT_PORT_DOWN: 1005 ibev.event = IB_EVENT_PORT_ERR; 1006 port = *(u8 *)data; 1007 break; 1008 1009 case MLX5_DEV_EVENT_PORT_INITIALIZED: 1010 /* not used by ULPs */ 1011 return; 1012 1013 case MLX5_DEV_EVENT_LID_CHANGE: 1014 ibev.event = IB_EVENT_LID_CHANGE; 1015 port = *(u8 *)data; 1016 break; 1017 1018 case MLX5_DEV_EVENT_PKEY_CHANGE: 1019 ibev.event = IB_EVENT_PKEY_CHANGE; 1020 port = *(u8 *)data; 1021 break; 1022 1023 case MLX5_DEV_EVENT_GUID_CHANGE: 1024 ibev.event = IB_EVENT_GID_CHANGE; 1025 port = *(u8 *)data; 1026 break; 1027 1028 case MLX5_DEV_EVENT_CLIENT_REREG: 1029 ibev.event = IB_EVENT_CLIENT_REREGISTER; 1030 port = *(u8 *)data; 1031 break; 1032 } 1033 1034 ibev.device = &ibdev->ib_dev; 1035 ibev.element.port_num = port; 1036 1037 if (port < 1 || port > ibdev->num_ports) { 1038 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 1039 return; 1040 } 1041 1042 if (ibdev->ib_active) 1043 ib_dispatch_event(&ibev); 1044 } 1045 1046 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 1047 { 1048 int port; 1049 1050 for (port = 1; port <= dev->mdev.caps.num_ports; port++) 1051 mlx5_query_ext_port_caps(dev, port); 1052 } 1053 1054 static int get_port_caps(struct mlx5_ib_dev *dev) 1055 { 1056 struct ib_device_attr *dprops = NULL; 1057 struct ib_port_attr *pprops = NULL; 1058 int err = 0; 1059 int port; 1060 1061 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 1062 if (!pprops) 1063 goto out; 1064 1065 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 1066 if (!dprops) 1067 goto out; 1068 1069 err = mlx5_ib_query_device(&dev->ib_dev, dprops); 1070 if (err) { 1071 mlx5_ib_warn(dev, "query_device failed %d\n", err); 1072 goto out; 1073 } 1074 1075 for (port = 1; port <= dev->mdev.caps.num_ports; port++) { 1076 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 1077 if (err) { 1078 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err); 1079 break; 1080 } 1081 dev->mdev.caps.port[port - 1].pkey_table_len = dprops->max_pkeys; 1082 dev->mdev.caps.port[port - 1].gid_table_len = pprops->gid_tbl_len; 1083 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 1084 dprops->max_pkeys, pprops->gid_tbl_len); 1085 } 1086 1087 out: 1088 kfree(pprops); 1089 kfree(dprops); 1090 1091 return err; 1092 } 1093 1094 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 1095 { 1096 int err; 1097 1098 err = mlx5_mr_cache_cleanup(dev); 1099 if (err) 1100 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 1101 1102 mlx5_ib_destroy_qp(dev->umrc.qp); 1103 ib_destroy_cq(dev->umrc.cq); 1104 ib_dereg_mr(dev->umrc.mr); 1105 ib_dealloc_pd(dev->umrc.pd); 1106 } 1107 1108 enum { 1109 MAX_UMR_WR = 128, 1110 }; 1111 1112 static int create_umr_res(struct mlx5_ib_dev *dev) 1113 { 1114 struct ib_qp_init_attr *init_attr = NULL; 1115 struct ib_qp_attr *attr = NULL; 1116 struct ib_pd *pd; 1117 struct ib_cq *cq; 1118 struct ib_qp *qp; 1119 struct ib_mr *mr; 1120 int ret; 1121 1122 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 1123 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 1124 if (!attr || !init_attr) { 1125 ret = -ENOMEM; 1126 goto error_0; 1127 } 1128 1129 pd = ib_alloc_pd(&dev->ib_dev); 1130 if (IS_ERR(pd)) { 1131 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 1132 ret = PTR_ERR(pd); 1133 goto error_0; 1134 } 1135 1136 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); 1137 if (IS_ERR(mr)) { 1138 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); 1139 ret = PTR_ERR(mr); 1140 goto error_1; 1141 } 1142 1143 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128, 1144 0); 1145 if (IS_ERR(cq)) { 1146 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 1147 ret = PTR_ERR(cq); 1148 goto error_2; 1149 } 1150 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1151 1152 init_attr->send_cq = cq; 1153 init_attr->recv_cq = cq; 1154 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1155 init_attr->cap.max_send_wr = MAX_UMR_WR; 1156 init_attr->cap.max_send_sge = 1; 1157 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1158 init_attr->port_num = 1; 1159 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1160 if (IS_ERR(qp)) { 1161 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1162 ret = PTR_ERR(qp); 1163 goto error_3; 1164 } 1165 qp->device = &dev->ib_dev; 1166 qp->real_qp = qp; 1167 qp->uobject = NULL; 1168 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1169 1170 attr->qp_state = IB_QPS_INIT; 1171 attr->port_num = 1; 1172 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1173 IB_QP_PORT, NULL); 1174 if (ret) { 1175 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1176 goto error_4; 1177 } 1178 1179 memset(attr, 0, sizeof(*attr)); 1180 attr->qp_state = IB_QPS_RTR; 1181 attr->path_mtu = IB_MTU_256; 1182 1183 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1184 if (ret) { 1185 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1186 goto error_4; 1187 } 1188 1189 memset(attr, 0, sizeof(*attr)); 1190 attr->qp_state = IB_QPS_RTS; 1191 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1192 if (ret) { 1193 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1194 goto error_4; 1195 } 1196 1197 dev->umrc.qp = qp; 1198 dev->umrc.cq = cq; 1199 dev->umrc.mr = mr; 1200 dev->umrc.pd = pd; 1201 1202 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1203 ret = mlx5_mr_cache_init(dev); 1204 if (ret) { 1205 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1206 goto error_4; 1207 } 1208 1209 kfree(attr); 1210 kfree(init_attr); 1211 1212 return 0; 1213 1214 error_4: 1215 mlx5_ib_destroy_qp(qp); 1216 1217 error_3: 1218 ib_destroy_cq(cq); 1219 1220 error_2: 1221 ib_dereg_mr(mr); 1222 1223 error_1: 1224 ib_dealloc_pd(pd); 1225 1226 error_0: 1227 kfree(attr); 1228 kfree(init_attr); 1229 return ret; 1230 } 1231 1232 static int create_dev_resources(struct mlx5_ib_resources *devr) 1233 { 1234 struct ib_srq_init_attr attr; 1235 struct mlx5_ib_dev *dev; 1236 int ret = 0; 1237 1238 dev = container_of(devr, struct mlx5_ib_dev, devr); 1239 1240 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1241 if (IS_ERR(devr->p0)) { 1242 ret = PTR_ERR(devr->p0); 1243 goto error0; 1244 } 1245 devr->p0->device = &dev->ib_dev; 1246 devr->p0->uobject = NULL; 1247 atomic_set(&devr->p0->usecnt, 0); 1248 1249 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL); 1250 if (IS_ERR(devr->c0)) { 1251 ret = PTR_ERR(devr->c0); 1252 goto error1; 1253 } 1254 devr->c0->device = &dev->ib_dev; 1255 devr->c0->uobject = NULL; 1256 devr->c0->comp_handler = NULL; 1257 devr->c0->event_handler = NULL; 1258 devr->c0->cq_context = NULL; 1259 atomic_set(&devr->c0->usecnt, 0); 1260 1261 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1262 if (IS_ERR(devr->x0)) { 1263 ret = PTR_ERR(devr->x0); 1264 goto error2; 1265 } 1266 devr->x0->device = &dev->ib_dev; 1267 devr->x0->inode = NULL; 1268 atomic_set(&devr->x0->usecnt, 0); 1269 mutex_init(&devr->x0->tgt_qp_mutex); 1270 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1271 1272 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1273 if (IS_ERR(devr->x1)) { 1274 ret = PTR_ERR(devr->x1); 1275 goto error3; 1276 } 1277 devr->x1->device = &dev->ib_dev; 1278 devr->x1->inode = NULL; 1279 atomic_set(&devr->x1->usecnt, 0); 1280 mutex_init(&devr->x1->tgt_qp_mutex); 1281 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1282 1283 memset(&attr, 0, sizeof(attr)); 1284 attr.attr.max_sge = 1; 1285 attr.attr.max_wr = 1; 1286 attr.srq_type = IB_SRQT_XRC; 1287 attr.ext.xrc.cq = devr->c0; 1288 attr.ext.xrc.xrcd = devr->x0; 1289 1290 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1291 if (IS_ERR(devr->s0)) { 1292 ret = PTR_ERR(devr->s0); 1293 goto error4; 1294 } 1295 devr->s0->device = &dev->ib_dev; 1296 devr->s0->pd = devr->p0; 1297 devr->s0->uobject = NULL; 1298 devr->s0->event_handler = NULL; 1299 devr->s0->srq_context = NULL; 1300 devr->s0->srq_type = IB_SRQT_XRC; 1301 devr->s0->ext.xrc.xrcd = devr->x0; 1302 devr->s0->ext.xrc.cq = devr->c0; 1303 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1304 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1305 atomic_inc(&devr->p0->usecnt); 1306 atomic_set(&devr->s0->usecnt, 0); 1307 1308 return 0; 1309 1310 error4: 1311 mlx5_ib_dealloc_xrcd(devr->x1); 1312 error3: 1313 mlx5_ib_dealloc_xrcd(devr->x0); 1314 error2: 1315 mlx5_ib_destroy_cq(devr->c0); 1316 error1: 1317 mlx5_ib_dealloc_pd(devr->p0); 1318 error0: 1319 return ret; 1320 } 1321 1322 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1323 { 1324 mlx5_ib_destroy_srq(devr->s0); 1325 mlx5_ib_dealloc_xrcd(devr->x0); 1326 mlx5_ib_dealloc_xrcd(devr->x1); 1327 mlx5_ib_destroy_cq(devr->c0); 1328 mlx5_ib_dealloc_pd(devr->p0); 1329 } 1330 1331 static int init_one(struct pci_dev *pdev, 1332 const struct pci_device_id *id) 1333 { 1334 struct mlx5_core_dev *mdev; 1335 struct mlx5_ib_dev *dev; 1336 int err; 1337 int i; 1338 1339 printk_once(KERN_INFO "%s", mlx5_version); 1340 1341 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1342 if (!dev) 1343 return -ENOMEM; 1344 1345 mdev = &dev->mdev; 1346 mdev->event = mlx5_ib_event; 1347 if (prof_sel >= ARRAY_SIZE(profile)) { 1348 pr_warn("selected pofile out of range, selceting default\n"); 1349 prof_sel = 0; 1350 } 1351 mdev->profile = &profile[prof_sel]; 1352 err = mlx5_dev_init(mdev, pdev); 1353 if (err) 1354 goto err_free; 1355 1356 err = get_port_caps(dev); 1357 if (err) 1358 goto err_cleanup; 1359 1360 get_ext_port_caps(dev); 1361 1362 err = alloc_comp_eqs(dev); 1363 if (err) 1364 goto err_cleanup; 1365 1366 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1367 1368 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1369 dev->ib_dev.owner = THIS_MODULE; 1370 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1371 dev->ib_dev.local_dma_lkey = mdev->caps.reserved_lkey; 1372 dev->num_ports = mdev->caps.num_ports; 1373 dev->ib_dev.phys_port_cnt = dev->num_ports; 1374 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors; 1375 dev->ib_dev.dma_device = &mdev->pdev->dev; 1376 1377 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1378 dev->ib_dev.uverbs_cmd_mask = 1379 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1380 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1381 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1382 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1383 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1384 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1385 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1386 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1387 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1388 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1389 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1390 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1391 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1392 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1393 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1394 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1395 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1396 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1397 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1398 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1399 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1400 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1401 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1402 1403 dev->ib_dev.query_device = mlx5_ib_query_device; 1404 dev->ib_dev.query_port = mlx5_ib_query_port; 1405 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1406 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1407 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1408 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1409 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1410 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1411 dev->ib_dev.mmap = mlx5_ib_mmap; 1412 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1413 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1414 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1415 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1416 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1417 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1418 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1419 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1420 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1421 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1422 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1423 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1424 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1425 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1426 dev->ib_dev.post_send = mlx5_ib_post_send; 1427 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1428 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1429 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1430 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1431 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1432 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1433 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1434 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1435 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1436 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1437 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr; 1438 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1439 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1440 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1441 dev->ib_dev.create_mr = mlx5_ib_create_mr; 1442 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; 1443 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1444 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1445 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 1446 1447 if (mdev->caps.flags & MLX5_DEV_CAP_FLAG_XRC) { 1448 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1449 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1450 dev->ib_dev.uverbs_cmd_mask |= 1451 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1452 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1453 } 1454 1455 err = init_node_data(dev); 1456 if (err) 1457 goto err_eqs; 1458 1459 mutex_init(&dev->cap_mask_mutex); 1460 spin_lock_init(&dev->mr_lock); 1461 1462 err = create_dev_resources(&dev->devr); 1463 if (err) 1464 goto err_eqs; 1465 1466 err = ib_register_device(&dev->ib_dev, NULL); 1467 if (err) 1468 goto err_rsrc; 1469 1470 err = create_umr_res(dev); 1471 if (err) 1472 goto err_dev; 1473 1474 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1475 err = device_create_file(&dev->ib_dev.dev, 1476 mlx5_class_attributes[i]); 1477 if (err) 1478 goto err_umrc; 1479 } 1480 1481 dev->ib_active = true; 1482 1483 return 0; 1484 1485 err_umrc: 1486 destroy_umrc_res(dev); 1487 1488 err_dev: 1489 ib_unregister_device(&dev->ib_dev); 1490 1491 err_rsrc: 1492 destroy_dev_resources(&dev->devr); 1493 1494 err_eqs: 1495 free_comp_eqs(dev); 1496 1497 err_cleanup: 1498 mlx5_dev_cleanup(mdev); 1499 1500 err_free: 1501 ib_dealloc_device((struct ib_device *)dev); 1502 1503 return err; 1504 } 1505 1506 static void remove_one(struct pci_dev *pdev) 1507 { 1508 struct mlx5_ib_dev *dev = mlx5_pci2ibdev(pdev); 1509 1510 destroy_umrc_res(dev); 1511 ib_unregister_device(&dev->ib_dev); 1512 destroy_dev_resources(&dev->devr); 1513 free_comp_eqs(dev); 1514 mlx5_dev_cleanup(&dev->mdev); 1515 ib_dealloc_device(&dev->ib_dev); 1516 } 1517 1518 static DEFINE_PCI_DEVICE_TABLE(mlx5_ib_pci_table) = { 1519 { PCI_VDEVICE(MELLANOX, 4113) }, /* MT4113 Connect-IB */ 1520 { 0, } 1521 }; 1522 1523 MODULE_DEVICE_TABLE(pci, mlx5_ib_pci_table); 1524 1525 static struct pci_driver mlx5_ib_driver = { 1526 .name = DRIVER_NAME, 1527 .id_table = mlx5_ib_pci_table, 1528 .probe = init_one, 1529 .remove = remove_one 1530 }; 1531 1532 static int __init mlx5_ib_init(void) 1533 { 1534 return pci_register_driver(&mlx5_ib_driver); 1535 } 1536 1537 static void __exit mlx5_ib_cleanup(void) 1538 { 1539 pci_unregister_driver(&mlx5_ib_driver); 1540 } 1541 1542 module_init(mlx5_ib_init); 1543 module_exit(mlx5_ib_cleanup); 1544