1 /* 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <linux/mlx5/vport.h> 44 #include <rdma/ib_smi.h> 45 #include <rdma/ib_umem.h> 46 #include "user.h" 47 #include "mlx5_ib.h" 48 49 #define DRIVER_NAME "mlx5_ib" 50 #define DRIVER_VERSION "2.2-1" 51 #define DRIVER_RELDATE "Feb 2014" 52 53 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 54 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 55 MODULE_LICENSE("Dual BSD/GPL"); 56 MODULE_VERSION(DRIVER_VERSION); 57 58 static int deprecated_prof_sel = 2; 59 module_param_named(prof_sel, deprecated_prof_sel, int, 0444); 60 MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); 61 62 static char mlx5_version[] = 63 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 64 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 65 66 static enum rdma_link_layer 67 mlx5_ib_port_link_layer(struct ib_device *device) 68 { 69 struct mlx5_ib_dev *dev = to_mdev(device); 70 71 switch (MLX5_CAP_GEN(dev->mdev, port_type)) { 72 case MLX5_CAP_PORT_TYPE_IB: 73 return IB_LINK_LAYER_INFINIBAND; 74 case MLX5_CAP_PORT_TYPE_ETH: 75 return IB_LINK_LAYER_ETHERNET; 76 default: 77 return IB_LINK_LAYER_UNSPECIFIED; 78 } 79 } 80 81 static int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev) 82 { 83 return !dev->mdev->issi; 84 } 85 86 enum { 87 MLX5_VPORT_ACCESS_METHOD_MAD, 88 MLX5_VPORT_ACCESS_METHOD_HCA, 89 MLX5_VPORT_ACCESS_METHOD_NIC, 90 }; 91 92 static int mlx5_get_vport_access_method(struct ib_device *ibdev) 93 { 94 if (mlx5_use_mad_ifc(to_mdev(ibdev))) 95 return MLX5_VPORT_ACCESS_METHOD_MAD; 96 97 if (mlx5_ib_port_link_layer(ibdev) == 98 IB_LINK_LAYER_ETHERNET) 99 return MLX5_VPORT_ACCESS_METHOD_NIC; 100 101 return MLX5_VPORT_ACCESS_METHOD_HCA; 102 } 103 104 static int mlx5_query_system_image_guid(struct ib_device *ibdev, 105 __be64 *sys_image_guid) 106 { 107 struct mlx5_ib_dev *dev = to_mdev(ibdev); 108 struct mlx5_core_dev *mdev = dev->mdev; 109 u64 tmp; 110 int err; 111 112 switch (mlx5_get_vport_access_method(ibdev)) { 113 case MLX5_VPORT_ACCESS_METHOD_MAD: 114 return mlx5_query_mad_ifc_system_image_guid(ibdev, 115 sys_image_guid); 116 117 case MLX5_VPORT_ACCESS_METHOD_HCA: 118 err = mlx5_query_hca_vport_system_image_guid(mdev, &tmp); 119 if (!err) 120 *sys_image_guid = cpu_to_be64(tmp); 121 return err; 122 123 default: 124 return -EINVAL; 125 } 126 } 127 128 static int mlx5_query_max_pkeys(struct ib_device *ibdev, 129 u16 *max_pkeys) 130 { 131 struct mlx5_ib_dev *dev = to_mdev(ibdev); 132 struct mlx5_core_dev *mdev = dev->mdev; 133 134 switch (mlx5_get_vport_access_method(ibdev)) { 135 case MLX5_VPORT_ACCESS_METHOD_MAD: 136 return mlx5_query_mad_ifc_max_pkeys(ibdev, max_pkeys); 137 138 case MLX5_VPORT_ACCESS_METHOD_HCA: 139 case MLX5_VPORT_ACCESS_METHOD_NIC: 140 *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, 141 pkey_table_size)); 142 return 0; 143 144 default: 145 return -EINVAL; 146 } 147 } 148 149 static int mlx5_query_vendor_id(struct ib_device *ibdev, 150 u32 *vendor_id) 151 { 152 struct mlx5_ib_dev *dev = to_mdev(ibdev); 153 154 switch (mlx5_get_vport_access_method(ibdev)) { 155 case MLX5_VPORT_ACCESS_METHOD_MAD: 156 return mlx5_query_mad_ifc_vendor_id(ibdev, vendor_id); 157 158 case MLX5_VPORT_ACCESS_METHOD_HCA: 159 case MLX5_VPORT_ACCESS_METHOD_NIC: 160 return mlx5_core_query_vendor_id(dev->mdev, vendor_id); 161 162 default: 163 return -EINVAL; 164 } 165 } 166 167 static int mlx5_query_node_guid(struct mlx5_ib_dev *dev, 168 __be64 *node_guid) 169 { 170 u64 tmp; 171 int err; 172 173 switch (mlx5_get_vport_access_method(&dev->ib_dev)) { 174 case MLX5_VPORT_ACCESS_METHOD_MAD: 175 return mlx5_query_mad_ifc_node_guid(dev, node_guid); 176 177 case MLX5_VPORT_ACCESS_METHOD_HCA: 178 err = mlx5_query_hca_vport_node_guid(dev->mdev, &tmp); 179 if (!err) 180 *node_guid = cpu_to_be64(tmp); 181 return err; 182 183 default: 184 return -EINVAL; 185 } 186 } 187 188 struct mlx5_reg_node_desc { 189 u8 desc[64]; 190 }; 191 192 static int mlx5_query_node_desc(struct mlx5_ib_dev *dev, char *node_desc) 193 { 194 struct mlx5_reg_node_desc in; 195 196 if (mlx5_use_mad_ifc(dev)) 197 return mlx5_query_mad_ifc_node_desc(dev, node_desc); 198 199 memset(&in, 0, sizeof(in)); 200 201 return mlx5_core_access_reg(dev->mdev, &in, sizeof(in), node_desc, 202 sizeof(struct mlx5_reg_node_desc), 203 MLX5_REG_NODE_DESC, 0, 0); 204 } 205 206 static int mlx5_ib_query_device(struct ib_device *ibdev, 207 struct ib_device_attr *props, 208 struct ib_udata *uhw) 209 { 210 struct mlx5_ib_dev *dev = to_mdev(ibdev); 211 struct mlx5_core_dev *mdev = dev->mdev; 212 int err = -ENOMEM; 213 int max_rq_sg; 214 int max_sq_sg; 215 216 if (uhw->inlen || uhw->outlen) 217 return -EINVAL; 218 219 memset(props, 0, sizeof(*props)); 220 err = mlx5_query_system_image_guid(ibdev, 221 &props->sys_image_guid); 222 if (err) 223 return err; 224 225 err = mlx5_query_max_pkeys(ibdev, &props->max_pkeys); 226 if (err) 227 return err; 228 229 err = mlx5_query_vendor_id(ibdev, &props->vendor_id); 230 if (err) 231 return err; 232 233 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 234 (fw_rev_min(dev->mdev) << 16) | 235 fw_rev_sub(dev->mdev); 236 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 237 IB_DEVICE_PORT_ACTIVE_EVENT | 238 IB_DEVICE_SYS_IMAGE_GUID | 239 IB_DEVICE_RC_RNR_NAK_GEN; 240 241 if (MLX5_CAP_GEN(mdev, pkv)) 242 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 243 if (MLX5_CAP_GEN(mdev, qkv)) 244 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 245 if (MLX5_CAP_GEN(mdev, apm)) 246 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 247 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 248 if (MLX5_CAP_GEN(mdev, xrc)) 249 props->device_cap_flags |= IB_DEVICE_XRC; 250 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 251 if (MLX5_CAP_GEN(mdev, sho)) { 252 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 253 /* At this stage no support for signature handover */ 254 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 255 IB_PROT_T10DIF_TYPE_2 | 256 IB_PROT_T10DIF_TYPE_3; 257 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 258 IB_GUARD_T10DIF_CSUM; 259 } 260 if (MLX5_CAP_GEN(mdev, block_lb_mc)) 261 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 262 263 props->vendor_part_id = mdev->pdev->device; 264 props->hw_ver = mdev->pdev->revision; 265 266 props->max_mr_size = ~0ull; 267 props->page_size_cap = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); 268 props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); 269 props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 270 max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / 271 sizeof(struct mlx5_wqe_data_seg); 272 max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - 273 sizeof(struct mlx5_wqe_ctrl_seg)) / 274 sizeof(struct mlx5_wqe_data_seg); 275 props->max_sge = min(max_rq_sg, max_sq_sg); 276 props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); 277 props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_eq_sz)) - 1; 278 props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 279 props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); 280 props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); 281 props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); 282 props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); 283 props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; 284 props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); 285 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 286 props->max_srq_sge = max_rq_sg - 1; 287 props->max_fast_reg_page_list_len = (unsigned int)-1; 288 props->atomic_cap = IB_ATOMIC_NONE; 289 props->masked_atomic_cap = IB_ATOMIC_NONE; 290 props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); 291 props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); 292 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 293 props->max_mcast_grp; 294 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 295 296 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 297 if (MLX5_CAP_GEN(mdev, pg)) 298 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; 299 props->odp_caps = dev->odp_caps; 300 #endif 301 302 return 0; 303 } 304 305 enum mlx5_ib_width { 306 MLX5_IB_WIDTH_1X = 1 << 0, 307 MLX5_IB_WIDTH_2X = 1 << 1, 308 MLX5_IB_WIDTH_4X = 1 << 2, 309 MLX5_IB_WIDTH_8X = 1 << 3, 310 MLX5_IB_WIDTH_12X = 1 << 4 311 }; 312 313 static int translate_active_width(struct ib_device *ibdev, u8 active_width, 314 u8 *ib_width) 315 { 316 struct mlx5_ib_dev *dev = to_mdev(ibdev); 317 int err = 0; 318 319 if (active_width & MLX5_IB_WIDTH_1X) { 320 *ib_width = IB_WIDTH_1X; 321 } else if (active_width & MLX5_IB_WIDTH_2X) { 322 mlx5_ib_dbg(dev, "active_width %d is not supported by IB spec\n", 323 (int)active_width); 324 err = -EINVAL; 325 } else if (active_width & MLX5_IB_WIDTH_4X) { 326 *ib_width = IB_WIDTH_4X; 327 } else if (active_width & MLX5_IB_WIDTH_8X) { 328 *ib_width = IB_WIDTH_8X; 329 } else if (active_width & MLX5_IB_WIDTH_12X) { 330 *ib_width = IB_WIDTH_12X; 331 } else { 332 mlx5_ib_dbg(dev, "Invalid active_width %d\n", 333 (int)active_width); 334 err = -EINVAL; 335 } 336 337 return err; 338 } 339 340 static int mlx5_mtu_to_ib_mtu(int mtu) 341 { 342 switch (mtu) { 343 case 256: return 1; 344 case 512: return 2; 345 case 1024: return 3; 346 case 2048: return 4; 347 case 4096: return 5; 348 default: 349 pr_warn("invalid mtu\n"); 350 return -1; 351 } 352 } 353 354 enum ib_max_vl_num { 355 __IB_MAX_VL_0 = 1, 356 __IB_MAX_VL_0_1 = 2, 357 __IB_MAX_VL_0_3 = 3, 358 __IB_MAX_VL_0_7 = 4, 359 __IB_MAX_VL_0_14 = 5, 360 }; 361 362 enum mlx5_vl_hw_cap { 363 MLX5_VL_HW_0 = 1, 364 MLX5_VL_HW_0_1 = 2, 365 MLX5_VL_HW_0_2 = 3, 366 MLX5_VL_HW_0_3 = 4, 367 MLX5_VL_HW_0_4 = 5, 368 MLX5_VL_HW_0_5 = 6, 369 MLX5_VL_HW_0_6 = 7, 370 MLX5_VL_HW_0_7 = 8, 371 MLX5_VL_HW_0_14 = 15 372 }; 373 374 static int translate_max_vl_num(struct ib_device *ibdev, u8 vl_hw_cap, 375 u8 *max_vl_num) 376 { 377 switch (vl_hw_cap) { 378 case MLX5_VL_HW_0: 379 *max_vl_num = __IB_MAX_VL_0; 380 break; 381 case MLX5_VL_HW_0_1: 382 *max_vl_num = __IB_MAX_VL_0_1; 383 break; 384 case MLX5_VL_HW_0_3: 385 *max_vl_num = __IB_MAX_VL_0_3; 386 break; 387 case MLX5_VL_HW_0_7: 388 *max_vl_num = __IB_MAX_VL_0_7; 389 break; 390 case MLX5_VL_HW_0_14: 391 *max_vl_num = __IB_MAX_VL_0_14; 392 break; 393 394 default: 395 return -EINVAL; 396 } 397 398 return 0; 399 } 400 401 static int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, 402 struct ib_port_attr *props) 403 { 404 struct mlx5_ib_dev *dev = to_mdev(ibdev); 405 struct mlx5_core_dev *mdev = dev->mdev; 406 struct mlx5_hca_vport_context *rep; 407 int max_mtu; 408 int oper_mtu; 409 int err; 410 u8 ib_link_width_oper; 411 u8 vl_hw_cap; 412 413 rep = kzalloc(sizeof(*rep), GFP_KERNEL); 414 if (!rep) { 415 err = -ENOMEM; 416 goto out; 417 } 418 419 memset(props, 0, sizeof(*props)); 420 421 err = mlx5_query_hca_vport_context(mdev, 0, port, 0, rep); 422 if (err) 423 goto out; 424 425 props->lid = rep->lid; 426 props->lmc = rep->lmc; 427 props->sm_lid = rep->sm_lid; 428 props->sm_sl = rep->sm_sl; 429 props->state = rep->vport_state; 430 props->phys_state = rep->port_physical_state; 431 props->port_cap_flags = rep->cap_mask1; 432 props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size)); 433 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); 434 props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size)); 435 props->bad_pkey_cntr = rep->pkey_violation_counter; 436 props->qkey_viol_cntr = rep->qkey_violation_counter; 437 props->subnet_timeout = rep->subnet_timeout; 438 props->init_type_reply = rep->init_type_reply; 439 440 err = mlx5_query_port_link_width_oper(mdev, &ib_link_width_oper, port); 441 if (err) 442 goto out; 443 444 err = translate_active_width(ibdev, ib_link_width_oper, 445 &props->active_width); 446 if (err) 447 goto out; 448 err = mlx5_query_port_proto_oper(mdev, &props->active_speed, MLX5_PTYS_IB, 449 port); 450 if (err) 451 goto out; 452 453 mlx5_query_port_max_mtu(mdev, &max_mtu, port); 454 455 props->max_mtu = mlx5_mtu_to_ib_mtu(max_mtu); 456 457 mlx5_query_port_oper_mtu(mdev, &oper_mtu, port); 458 459 props->active_mtu = mlx5_mtu_to_ib_mtu(oper_mtu); 460 461 err = mlx5_query_port_vl_hw_cap(mdev, &vl_hw_cap, port); 462 if (err) 463 goto out; 464 465 err = translate_max_vl_num(ibdev, vl_hw_cap, 466 &props->max_vl_num); 467 out: 468 kfree(rep); 469 return err; 470 } 471 472 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 473 struct ib_port_attr *props) 474 { 475 switch (mlx5_get_vport_access_method(ibdev)) { 476 case MLX5_VPORT_ACCESS_METHOD_MAD: 477 return mlx5_query_mad_ifc_port(ibdev, port, props); 478 479 case MLX5_VPORT_ACCESS_METHOD_HCA: 480 return mlx5_query_hca_port(ibdev, port, props); 481 482 default: 483 return -EINVAL; 484 } 485 } 486 487 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 488 union ib_gid *gid) 489 { 490 struct mlx5_ib_dev *dev = to_mdev(ibdev); 491 struct mlx5_core_dev *mdev = dev->mdev; 492 493 switch (mlx5_get_vport_access_method(ibdev)) { 494 case MLX5_VPORT_ACCESS_METHOD_MAD: 495 return mlx5_query_mad_ifc_gids(ibdev, port, index, gid); 496 497 case MLX5_VPORT_ACCESS_METHOD_HCA: 498 return mlx5_query_hca_vport_gid(mdev, 0, port, 0, index, gid); 499 500 default: 501 return -EINVAL; 502 } 503 504 } 505 506 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 507 u16 *pkey) 508 { 509 struct mlx5_ib_dev *dev = to_mdev(ibdev); 510 struct mlx5_core_dev *mdev = dev->mdev; 511 512 switch (mlx5_get_vport_access_method(ibdev)) { 513 case MLX5_VPORT_ACCESS_METHOD_MAD: 514 return mlx5_query_mad_ifc_pkey(ibdev, port, index, pkey); 515 516 case MLX5_VPORT_ACCESS_METHOD_HCA: 517 case MLX5_VPORT_ACCESS_METHOD_NIC: 518 return mlx5_query_hca_vport_pkey(mdev, 0, port, 0, index, 519 pkey); 520 default: 521 return -EINVAL; 522 } 523 } 524 525 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 526 struct ib_device_modify *props) 527 { 528 struct mlx5_ib_dev *dev = to_mdev(ibdev); 529 struct mlx5_reg_node_desc in; 530 struct mlx5_reg_node_desc out; 531 int err; 532 533 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 534 return -EOPNOTSUPP; 535 536 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 537 return 0; 538 539 /* 540 * If possible, pass node desc to FW, so it can generate 541 * a 144 trap. If cmd fails, just ignore. 542 */ 543 memcpy(&in, props->node_desc, 64); 544 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 545 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 546 if (err) 547 return err; 548 549 memcpy(ibdev->node_desc, props->node_desc, 64); 550 551 return err; 552 } 553 554 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 555 struct ib_port_modify *props) 556 { 557 struct mlx5_ib_dev *dev = to_mdev(ibdev); 558 struct ib_port_attr attr; 559 u32 tmp; 560 int err; 561 562 mutex_lock(&dev->cap_mask_mutex); 563 564 err = mlx5_ib_query_port(ibdev, port, &attr); 565 if (err) 566 goto out; 567 568 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 569 ~props->clr_port_cap_mask; 570 571 err = mlx5_set_port_caps(dev->mdev, port, tmp); 572 573 out: 574 mutex_unlock(&dev->cap_mask_mutex); 575 return err; 576 } 577 578 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 579 struct ib_udata *udata) 580 { 581 struct mlx5_ib_dev *dev = to_mdev(ibdev); 582 struct mlx5_ib_alloc_ucontext_req_v2 req; 583 struct mlx5_ib_alloc_ucontext_resp resp; 584 struct mlx5_ib_ucontext *context; 585 struct mlx5_uuar_info *uuari; 586 struct mlx5_uar *uars; 587 int gross_uuars; 588 int num_uars; 589 int ver; 590 int uuarn; 591 int err; 592 int i; 593 size_t reqlen; 594 595 if (!dev->ib_active) 596 return ERR_PTR(-EAGAIN); 597 598 memset(&req, 0, sizeof(req)); 599 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 600 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 601 ver = 0; 602 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 603 ver = 2; 604 else 605 return ERR_PTR(-EINVAL); 606 607 err = ib_copy_from_udata(&req, udata, reqlen); 608 if (err) 609 return ERR_PTR(err); 610 611 if (req.flags || req.reserved) 612 return ERR_PTR(-EINVAL); 613 614 if (req.total_num_uuars > MLX5_MAX_UUARS) 615 return ERR_PTR(-ENOMEM); 616 617 if (req.total_num_uuars == 0) 618 return ERR_PTR(-EINVAL); 619 620 req.total_num_uuars = ALIGN(req.total_num_uuars, 621 MLX5_NON_FP_BF_REGS_PER_PAGE); 622 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 623 return ERR_PTR(-EINVAL); 624 625 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 626 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 627 resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); 628 resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); 629 resp.cache_line_size = L1_CACHE_BYTES; 630 resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); 631 resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); 632 resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 633 resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 634 resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); 635 636 context = kzalloc(sizeof(*context), GFP_KERNEL); 637 if (!context) 638 return ERR_PTR(-ENOMEM); 639 640 uuari = &context->uuari; 641 mutex_init(&uuari->lock); 642 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 643 if (!uars) { 644 err = -ENOMEM; 645 goto out_ctx; 646 } 647 648 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 649 sizeof(*uuari->bitmap), 650 GFP_KERNEL); 651 if (!uuari->bitmap) { 652 err = -ENOMEM; 653 goto out_uar_ctx; 654 } 655 /* 656 * clear all fast path uuars 657 */ 658 for (i = 0; i < gross_uuars; i++) { 659 uuarn = i & 3; 660 if (uuarn == 2 || uuarn == 3) 661 set_bit(i, uuari->bitmap); 662 } 663 664 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 665 if (!uuari->count) { 666 err = -ENOMEM; 667 goto out_bitmap; 668 } 669 670 for (i = 0; i < num_uars; i++) { 671 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 672 if (err) 673 goto out_count; 674 } 675 676 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 677 context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; 678 #endif 679 680 INIT_LIST_HEAD(&context->db_page_list); 681 mutex_init(&context->db_page_mutex); 682 683 resp.tot_uuars = req.total_num_uuars; 684 resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports); 685 err = ib_copy_to_udata(udata, &resp, 686 sizeof(resp) - sizeof(resp.reserved)); 687 if (err) 688 goto out_uars; 689 690 uuari->ver = ver; 691 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 692 uuari->uars = uars; 693 uuari->num_uars = num_uars; 694 return &context->ibucontext; 695 696 out_uars: 697 for (i--; i >= 0; i--) 698 mlx5_cmd_free_uar(dev->mdev, uars[i].index); 699 out_count: 700 kfree(uuari->count); 701 702 out_bitmap: 703 kfree(uuari->bitmap); 704 705 out_uar_ctx: 706 kfree(uars); 707 708 out_ctx: 709 kfree(context); 710 return ERR_PTR(err); 711 } 712 713 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 714 { 715 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 716 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 717 struct mlx5_uuar_info *uuari = &context->uuari; 718 int i; 719 720 for (i = 0; i < uuari->num_uars; i++) { 721 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 722 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 723 } 724 725 kfree(uuari->count); 726 kfree(uuari->bitmap); 727 kfree(uuari->uars); 728 kfree(context); 729 730 return 0; 731 } 732 733 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 734 { 735 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 736 } 737 738 static int get_command(unsigned long offset) 739 { 740 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 741 } 742 743 static int get_arg(unsigned long offset) 744 { 745 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 746 } 747 748 static int get_index(unsigned long offset) 749 { 750 return get_arg(offset); 751 } 752 753 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 754 { 755 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 756 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 757 struct mlx5_uuar_info *uuari = &context->uuari; 758 unsigned long command; 759 unsigned long idx; 760 phys_addr_t pfn; 761 762 command = get_command(vma->vm_pgoff); 763 switch (command) { 764 case MLX5_IB_MMAP_REGULAR_PAGE: 765 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 766 return -EINVAL; 767 768 idx = get_index(vma->vm_pgoff); 769 if (idx >= uuari->num_uars) 770 return -EINVAL; 771 772 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 773 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 774 (unsigned long long)pfn); 775 776 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 777 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 778 PAGE_SIZE, vma->vm_page_prot)) 779 return -EAGAIN; 780 781 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 782 vma->vm_start, 783 (unsigned long long)pfn << PAGE_SHIFT); 784 break; 785 786 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 787 return -ENOSYS; 788 789 default: 790 return -EINVAL; 791 } 792 793 return 0; 794 } 795 796 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 797 { 798 struct mlx5_create_mkey_mbox_in *in; 799 struct mlx5_mkey_seg *seg; 800 struct mlx5_core_mr mr; 801 int err; 802 803 in = kzalloc(sizeof(*in), GFP_KERNEL); 804 if (!in) 805 return -ENOMEM; 806 807 seg = &in->seg; 808 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 809 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 810 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 811 seg->start_addr = 0; 812 813 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in), 814 NULL, NULL, NULL); 815 if (err) { 816 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 817 goto err_in; 818 } 819 820 kfree(in); 821 *key = mr.key; 822 823 return 0; 824 825 err_in: 826 kfree(in); 827 828 return err; 829 } 830 831 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 832 { 833 struct mlx5_core_mr mr; 834 int err; 835 836 memset(&mr, 0, sizeof(mr)); 837 mr.key = key; 838 err = mlx5_core_destroy_mkey(dev->mdev, &mr); 839 if (err) 840 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 841 } 842 843 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 844 struct ib_ucontext *context, 845 struct ib_udata *udata) 846 { 847 struct mlx5_ib_alloc_pd_resp resp; 848 struct mlx5_ib_pd *pd; 849 int err; 850 851 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 852 if (!pd) 853 return ERR_PTR(-ENOMEM); 854 855 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 856 if (err) { 857 kfree(pd); 858 return ERR_PTR(err); 859 } 860 861 if (context) { 862 resp.pdn = pd->pdn; 863 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 864 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 865 kfree(pd); 866 return ERR_PTR(-EFAULT); 867 } 868 } else { 869 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 870 if (err) { 871 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 872 kfree(pd); 873 return ERR_PTR(err); 874 } 875 } 876 877 return &pd->ibpd; 878 } 879 880 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 881 { 882 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 883 struct mlx5_ib_pd *mpd = to_mpd(pd); 884 885 if (!pd->uobject) 886 free_pa_mkey(mdev, mpd->pa_lkey); 887 888 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 889 kfree(mpd); 890 891 return 0; 892 } 893 894 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 895 { 896 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 897 int err; 898 899 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 900 if (err) 901 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 902 ibqp->qp_num, gid->raw); 903 904 return err; 905 } 906 907 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 908 { 909 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 910 int err; 911 912 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 913 if (err) 914 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 915 ibqp->qp_num, gid->raw); 916 917 return err; 918 } 919 920 static int init_node_data(struct mlx5_ib_dev *dev) 921 { 922 int err; 923 924 err = mlx5_query_node_desc(dev, dev->ib_dev.node_desc); 925 if (err) 926 return err; 927 928 dev->mdev->rev_id = dev->mdev->pdev->revision; 929 930 return mlx5_query_node_guid(dev, &dev->ib_dev.node_guid); 931 } 932 933 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 934 char *buf) 935 { 936 struct mlx5_ib_dev *dev = 937 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 938 939 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages); 940 } 941 942 static ssize_t show_reg_pages(struct device *device, 943 struct device_attribute *attr, char *buf) 944 { 945 struct mlx5_ib_dev *dev = 946 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 947 948 return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); 949 } 950 951 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 952 char *buf) 953 { 954 struct mlx5_ib_dev *dev = 955 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 956 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 957 } 958 959 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 960 char *buf) 961 { 962 struct mlx5_ib_dev *dev = 963 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 964 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev), 965 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 966 } 967 968 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 969 char *buf) 970 { 971 struct mlx5_ib_dev *dev = 972 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 973 return sprintf(buf, "%x\n", dev->mdev->rev_id); 974 } 975 976 static ssize_t show_board(struct device *device, struct device_attribute *attr, 977 char *buf) 978 { 979 struct mlx5_ib_dev *dev = 980 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 981 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 982 dev->mdev->board_id); 983 } 984 985 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 986 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 987 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 988 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 989 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 990 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 991 992 static struct device_attribute *mlx5_class_attributes[] = { 993 &dev_attr_hw_rev, 994 &dev_attr_fw_ver, 995 &dev_attr_hca_type, 996 &dev_attr_board_id, 997 &dev_attr_fw_pages, 998 &dev_attr_reg_pages, 999 }; 1000 1001 static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 1002 enum mlx5_dev_event event, unsigned long param) 1003 { 1004 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 1005 struct ib_event ibev; 1006 1007 u8 port = 0; 1008 1009 switch (event) { 1010 case MLX5_DEV_EVENT_SYS_ERROR: 1011 ibdev->ib_active = false; 1012 ibev.event = IB_EVENT_DEVICE_FATAL; 1013 break; 1014 1015 case MLX5_DEV_EVENT_PORT_UP: 1016 ibev.event = IB_EVENT_PORT_ACTIVE; 1017 port = (u8)param; 1018 break; 1019 1020 case MLX5_DEV_EVENT_PORT_DOWN: 1021 ibev.event = IB_EVENT_PORT_ERR; 1022 port = (u8)param; 1023 break; 1024 1025 case MLX5_DEV_EVENT_PORT_INITIALIZED: 1026 /* not used by ULPs */ 1027 return; 1028 1029 case MLX5_DEV_EVENT_LID_CHANGE: 1030 ibev.event = IB_EVENT_LID_CHANGE; 1031 port = (u8)param; 1032 break; 1033 1034 case MLX5_DEV_EVENT_PKEY_CHANGE: 1035 ibev.event = IB_EVENT_PKEY_CHANGE; 1036 port = (u8)param; 1037 break; 1038 1039 case MLX5_DEV_EVENT_GUID_CHANGE: 1040 ibev.event = IB_EVENT_GID_CHANGE; 1041 port = (u8)param; 1042 break; 1043 1044 case MLX5_DEV_EVENT_CLIENT_REREG: 1045 ibev.event = IB_EVENT_CLIENT_REREGISTER; 1046 port = (u8)param; 1047 break; 1048 } 1049 1050 ibev.device = &ibdev->ib_dev; 1051 ibev.element.port_num = port; 1052 1053 if (port < 1 || port > ibdev->num_ports) { 1054 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 1055 return; 1056 } 1057 1058 if (ibdev->ib_active) 1059 ib_dispatch_event(&ibev); 1060 } 1061 1062 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 1063 { 1064 int port; 1065 1066 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) 1067 mlx5_query_ext_port_caps(dev, port); 1068 } 1069 1070 static int get_port_caps(struct mlx5_ib_dev *dev) 1071 { 1072 struct ib_device_attr *dprops = NULL; 1073 struct ib_port_attr *pprops = NULL; 1074 int err = -ENOMEM; 1075 int port; 1076 struct ib_udata uhw = {.inlen = 0, .outlen = 0}; 1077 1078 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 1079 if (!pprops) 1080 goto out; 1081 1082 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 1083 if (!dprops) 1084 goto out; 1085 1086 err = mlx5_ib_query_device(&dev->ib_dev, dprops, &uhw); 1087 if (err) { 1088 mlx5_ib_warn(dev, "query_device failed %d\n", err); 1089 goto out; 1090 } 1091 1092 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) { 1093 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 1094 if (err) { 1095 mlx5_ib_warn(dev, "query_port %d failed %d\n", 1096 port, err); 1097 break; 1098 } 1099 dev->mdev->port_caps[port - 1].pkey_table_len = 1100 dprops->max_pkeys; 1101 dev->mdev->port_caps[port - 1].gid_table_len = 1102 pprops->gid_tbl_len; 1103 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 1104 dprops->max_pkeys, pprops->gid_tbl_len); 1105 } 1106 1107 out: 1108 kfree(pprops); 1109 kfree(dprops); 1110 1111 return err; 1112 } 1113 1114 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 1115 { 1116 int err; 1117 1118 err = mlx5_mr_cache_cleanup(dev); 1119 if (err) 1120 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 1121 1122 mlx5_ib_destroy_qp(dev->umrc.qp); 1123 ib_destroy_cq(dev->umrc.cq); 1124 ib_dereg_mr(dev->umrc.mr); 1125 ib_dealloc_pd(dev->umrc.pd); 1126 } 1127 1128 enum { 1129 MAX_UMR_WR = 128, 1130 }; 1131 1132 static int create_umr_res(struct mlx5_ib_dev *dev) 1133 { 1134 struct ib_qp_init_attr *init_attr = NULL; 1135 struct ib_qp_attr *attr = NULL; 1136 struct ib_pd *pd; 1137 struct ib_cq *cq; 1138 struct ib_qp *qp; 1139 struct ib_mr *mr; 1140 struct ib_cq_init_attr cq_attr = {}; 1141 int ret; 1142 1143 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 1144 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 1145 if (!attr || !init_attr) { 1146 ret = -ENOMEM; 1147 goto error_0; 1148 } 1149 1150 pd = ib_alloc_pd(&dev->ib_dev); 1151 if (IS_ERR(pd)) { 1152 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 1153 ret = PTR_ERR(pd); 1154 goto error_0; 1155 } 1156 1157 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); 1158 if (IS_ERR(mr)) { 1159 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); 1160 ret = PTR_ERR(mr); 1161 goto error_1; 1162 } 1163 1164 cq_attr.cqe = 128; 1165 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 1166 &cq_attr); 1167 if (IS_ERR(cq)) { 1168 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 1169 ret = PTR_ERR(cq); 1170 goto error_2; 1171 } 1172 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1173 1174 init_attr->send_cq = cq; 1175 init_attr->recv_cq = cq; 1176 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1177 init_attr->cap.max_send_wr = MAX_UMR_WR; 1178 init_attr->cap.max_send_sge = 1; 1179 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1180 init_attr->port_num = 1; 1181 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1182 if (IS_ERR(qp)) { 1183 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1184 ret = PTR_ERR(qp); 1185 goto error_3; 1186 } 1187 qp->device = &dev->ib_dev; 1188 qp->real_qp = qp; 1189 qp->uobject = NULL; 1190 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1191 1192 attr->qp_state = IB_QPS_INIT; 1193 attr->port_num = 1; 1194 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1195 IB_QP_PORT, NULL); 1196 if (ret) { 1197 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1198 goto error_4; 1199 } 1200 1201 memset(attr, 0, sizeof(*attr)); 1202 attr->qp_state = IB_QPS_RTR; 1203 attr->path_mtu = IB_MTU_256; 1204 1205 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1206 if (ret) { 1207 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1208 goto error_4; 1209 } 1210 1211 memset(attr, 0, sizeof(*attr)); 1212 attr->qp_state = IB_QPS_RTS; 1213 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1214 if (ret) { 1215 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1216 goto error_4; 1217 } 1218 1219 dev->umrc.qp = qp; 1220 dev->umrc.cq = cq; 1221 dev->umrc.mr = mr; 1222 dev->umrc.pd = pd; 1223 1224 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1225 ret = mlx5_mr_cache_init(dev); 1226 if (ret) { 1227 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1228 goto error_4; 1229 } 1230 1231 kfree(attr); 1232 kfree(init_attr); 1233 1234 return 0; 1235 1236 error_4: 1237 mlx5_ib_destroy_qp(qp); 1238 1239 error_3: 1240 ib_destroy_cq(cq); 1241 1242 error_2: 1243 ib_dereg_mr(mr); 1244 1245 error_1: 1246 ib_dealloc_pd(pd); 1247 1248 error_0: 1249 kfree(attr); 1250 kfree(init_attr); 1251 return ret; 1252 } 1253 1254 static int create_dev_resources(struct mlx5_ib_resources *devr) 1255 { 1256 struct ib_srq_init_attr attr; 1257 struct mlx5_ib_dev *dev; 1258 struct ib_cq_init_attr cq_attr = {.cqe = 1}; 1259 int ret = 0; 1260 1261 dev = container_of(devr, struct mlx5_ib_dev, devr); 1262 1263 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1264 if (IS_ERR(devr->p0)) { 1265 ret = PTR_ERR(devr->p0); 1266 goto error0; 1267 } 1268 devr->p0->device = &dev->ib_dev; 1269 devr->p0->uobject = NULL; 1270 atomic_set(&devr->p0->usecnt, 0); 1271 1272 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, &cq_attr, NULL, NULL); 1273 if (IS_ERR(devr->c0)) { 1274 ret = PTR_ERR(devr->c0); 1275 goto error1; 1276 } 1277 devr->c0->device = &dev->ib_dev; 1278 devr->c0->uobject = NULL; 1279 devr->c0->comp_handler = NULL; 1280 devr->c0->event_handler = NULL; 1281 devr->c0->cq_context = NULL; 1282 atomic_set(&devr->c0->usecnt, 0); 1283 1284 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1285 if (IS_ERR(devr->x0)) { 1286 ret = PTR_ERR(devr->x0); 1287 goto error2; 1288 } 1289 devr->x0->device = &dev->ib_dev; 1290 devr->x0->inode = NULL; 1291 atomic_set(&devr->x0->usecnt, 0); 1292 mutex_init(&devr->x0->tgt_qp_mutex); 1293 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1294 1295 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1296 if (IS_ERR(devr->x1)) { 1297 ret = PTR_ERR(devr->x1); 1298 goto error3; 1299 } 1300 devr->x1->device = &dev->ib_dev; 1301 devr->x1->inode = NULL; 1302 atomic_set(&devr->x1->usecnt, 0); 1303 mutex_init(&devr->x1->tgt_qp_mutex); 1304 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1305 1306 memset(&attr, 0, sizeof(attr)); 1307 attr.attr.max_sge = 1; 1308 attr.attr.max_wr = 1; 1309 attr.srq_type = IB_SRQT_XRC; 1310 attr.ext.xrc.cq = devr->c0; 1311 attr.ext.xrc.xrcd = devr->x0; 1312 1313 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1314 if (IS_ERR(devr->s0)) { 1315 ret = PTR_ERR(devr->s0); 1316 goto error4; 1317 } 1318 devr->s0->device = &dev->ib_dev; 1319 devr->s0->pd = devr->p0; 1320 devr->s0->uobject = NULL; 1321 devr->s0->event_handler = NULL; 1322 devr->s0->srq_context = NULL; 1323 devr->s0->srq_type = IB_SRQT_XRC; 1324 devr->s0->ext.xrc.xrcd = devr->x0; 1325 devr->s0->ext.xrc.cq = devr->c0; 1326 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1327 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1328 atomic_inc(&devr->p0->usecnt); 1329 atomic_set(&devr->s0->usecnt, 0); 1330 1331 memset(&attr, 0, sizeof(attr)); 1332 attr.attr.max_sge = 1; 1333 attr.attr.max_wr = 1; 1334 attr.srq_type = IB_SRQT_BASIC; 1335 devr->s1 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1336 if (IS_ERR(devr->s1)) { 1337 ret = PTR_ERR(devr->s1); 1338 goto error5; 1339 } 1340 devr->s1->device = &dev->ib_dev; 1341 devr->s1->pd = devr->p0; 1342 devr->s1->uobject = NULL; 1343 devr->s1->event_handler = NULL; 1344 devr->s1->srq_context = NULL; 1345 devr->s1->srq_type = IB_SRQT_BASIC; 1346 devr->s1->ext.xrc.cq = devr->c0; 1347 atomic_inc(&devr->p0->usecnt); 1348 atomic_set(&devr->s0->usecnt, 0); 1349 1350 return 0; 1351 1352 error5: 1353 mlx5_ib_destroy_srq(devr->s0); 1354 error4: 1355 mlx5_ib_dealloc_xrcd(devr->x1); 1356 error3: 1357 mlx5_ib_dealloc_xrcd(devr->x0); 1358 error2: 1359 mlx5_ib_destroy_cq(devr->c0); 1360 error1: 1361 mlx5_ib_dealloc_pd(devr->p0); 1362 error0: 1363 return ret; 1364 } 1365 1366 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1367 { 1368 mlx5_ib_destroy_srq(devr->s1); 1369 mlx5_ib_destroy_srq(devr->s0); 1370 mlx5_ib_dealloc_xrcd(devr->x0); 1371 mlx5_ib_dealloc_xrcd(devr->x1); 1372 mlx5_ib_destroy_cq(devr->c0); 1373 mlx5_ib_dealloc_pd(devr->p0); 1374 } 1375 1376 static int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num, 1377 struct ib_port_immutable *immutable) 1378 { 1379 struct ib_port_attr attr; 1380 int err; 1381 1382 err = mlx5_ib_query_port(ibdev, port_num, &attr); 1383 if (err) 1384 return err; 1385 1386 immutable->pkey_tbl_len = attr.pkey_tbl_len; 1387 immutable->gid_tbl_len = attr.gid_tbl_len; 1388 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 1389 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 1390 1391 return 0; 1392 } 1393 1394 static void *mlx5_ib_add(struct mlx5_core_dev *mdev) 1395 { 1396 struct mlx5_ib_dev *dev; 1397 int err; 1398 int i; 1399 1400 /* don't create IB instance over Eth ports, no RoCE yet! */ 1401 if (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) 1402 return NULL; 1403 1404 printk_once(KERN_INFO "%s", mlx5_version); 1405 1406 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1407 if (!dev) 1408 return NULL; 1409 1410 dev->mdev = mdev; 1411 1412 err = get_port_caps(dev); 1413 if (err) 1414 goto err_dealloc; 1415 1416 if (mlx5_use_mad_ifc(dev)) 1417 get_ext_port_caps(dev); 1418 1419 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1420 1421 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1422 dev->ib_dev.owner = THIS_MODULE; 1423 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1424 dev->ib_dev.local_dma_lkey = 0 /* not supported for now */; 1425 dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); 1426 dev->ib_dev.phys_port_cnt = dev->num_ports; 1427 dev->ib_dev.num_comp_vectors = 1428 dev->mdev->priv.eq_table.num_comp_vectors; 1429 dev->ib_dev.dma_device = &mdev->pdev->dev; 1430 1431 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1432 dev->ib_dev.uverbs_cmd_mask = 1433 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1434 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1435 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1436 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1437 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1438 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1439 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1440 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1441 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1442 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1443 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1444 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1445 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1446 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1447 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1448 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1449 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1450 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1451 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1452 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1453 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1454 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1455 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1456 dev->ib_dev.uverbs_ex_cmd_mask = 1457 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE); 1458 1459 dev->ib_dev.query_device = mlx5_ib_query_device; 1460 dev->ib_dev.query_port = mlx5_ib_query_port; 1461 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1462 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1463 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1464 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1465 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1466 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1467 dev->ib_dev.mmap = mlx5_ib_mmap; 1468 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1469 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1470 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1471 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1472 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1473 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1474 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1475 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1476 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1477 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1478 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1479 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1480 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1481 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1482 dev->ib_dev.post_send = mlx5_ib_post_send; 1483 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1484 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1485 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1486 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1487 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1488 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1489 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1490 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1491 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1492 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1493 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr; 1494 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1495 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1496 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1497 dev->ib_dev.create_mr = mlx5_ib_create_mr; 1498 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; 1499 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1500 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1501 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 1502 dev->ib_dev.get_port_immutable = mlx5_port_immutable; 1503 1504 mlx5_ib_internal_fill_odp_caps(dev); 1505 1506 if (MLX5_CAP_GEN(mdev, xrc)) { 1507 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1508 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1509 dev->ib_dev.uverbs_cmd_mask |= 1510 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1511 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1512 } 1513 1514 err = init_node_data(dev); 1515 if (err) 1516 goto err_dealloc; 1517 1518 mutex_init(&dev->cap_mask_mutex); 1519 1520 err = create_dev_resources(&dev->devr); 1521 if (err) 1522 goto err_dealloc; 1523 1524 err = mlx5_ib_odp_init_one(dev); 1525 if (err) 1526 goto err_rsrc; 1527 1528 err = ib_register_device(&dev->ib_dev, NULL); 1529 if (err) 1530 goto err_odp; 1531 1532 err = create_umr_res(dev); 1533 if (err) 1534 goto err_dev; 1535 1536 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1537 err = device_create_file(&dev->ib_dev.dev, 1538 mlx5_class_attributes[i]); 1539 if (err) 1540 goto err_umrc; 1541 } 1542 1543 dev->ib_active = true; 1544 1545 return dev; 1546 1547 err_umrc: 1548 destroy_umrc_res(dev); 1549 1550 err_dev: 1551 ib_unregister_device(&dev->ib_dev); 1552 1553 err_odp: 1554 mlx5_ib_odp_remove_one(dev); 1555 1556 err_rsrc: 1557 destroy_dev_resources(&dev->devr); 1558 1559 err_dealloc: 1560 ib_dealloc_device((struct ib_device *)dev); 1561 1562 return NULL; 1563 } 1564 1565 static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 1566 { 1567 struct mlx5_ib_dev *dev = context; 1568 1569 ib_unregister_device(&dev->ib_dev); 1570 destroy_umrc_res(dev); 1571 mlx5_ib_odp_remove_one(dev); 1572 destroy_dev_resources(&dev->devr); 1573 ib_dealloc_device(&dev->ib_dev); 1574 } 1575 1576 static struct mlx5_interface mlx5_ib_interface = { 1577 .add = mlx5_ib_add, 1578 .remove = mlx5_ib_remove, 1579 .event = mlx5_ib_event, 1580 .protocol = MLX5_INTERFACE_PROTOCOL_IB, 1581 }; 1582 1583 static int __init mlx5_ib_init(void) 1584 { 1585 int err; 1586 1587 if (deprecated_prof_sel != 2) 1588 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); 1589 1590 err = mlx5_ib_odp_init(); 1591 if (err) 1592 return err; 1593 1594 err = mlx5_register_interface(&mlx5_ib_interface); 1595 if (err) 1596 goto clean_odp; 1597 1598 return err; 1599 1600 clean_odp: 1601 mlx5_ib_odp_cleanup(); 1602 return err; 1603 } 1604 1605 static void __exit mlx5_ib_cleanup(void) 1606 { 1607 mlx5_unregister_interface(&mlx5_ib_interface); 1608 mlx5_ib_odp_cleanup(); 1609 } 1610 1611 module_init(mlx5_ib_init); 1612 module_exit(mlx5_ib_cleanup); 1613