1 /* 2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <rdma/ib_smi.h> 44 #include <rdma/ib_umem.h> 45 #include "user.h" 46 #include "mlx5_ib.h" 47 48 #define DRIVER_NAME "mlx5_ib" 49 #define DRIVER_VERSION "2.2-1" 50 #define DRIVER_RELDATE "Feb 2014" 51 52 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 53 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 54 MODULE_LICENSE("Dual BSD/GPL"); 55 MODULE_VERSION(DRIVER_VERSION); 56 57 static int prof_sel = 2; 58 module_param_named(prof_sel, prof_sel, int, 0444); 59 MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); 60 61 static char mlx5_version[] = 62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 64 65 static struct mlx5_profile profile[] = { 66 [0] = { 67 .mask = 0, 68 }, 69 [1] = { 70 .mask = MLX5_PROF_MASK_QP_SIZE, 71 .log_max_qp = 12, 72 }, 73 [2] = { 74 .mask = MLX5_PROF_MASK_QP_SIZE | 75 MLX5_PROF_MASK_MR_CACHE, 76 .log_max_qp = 17, 77 .mr_cache[0] = { 78 .size = 500, 79 .limit = 250 80 }, 81 .mr_cache[1] = { 82 .size = 500, 83 .limit = 250 84 }, 85 .mr_cache[2] = { 86 .size = 500, 87 .limit = 250 88 }, 89 .mr_cache[3] = { 90 .size = 500, 91 .limit = 250 92 }, 93 .mr_cache[4] = { 94 .size = 500, 95 .limit = 250 96 }, 97 .mr_cache[5] = { 98 .size = 500, 99 .limit = 250 100 }, 101 .mr_cache[6] = { 102 .size = 500, 103 .limit = 250 104 }, 105 .mr_cache[7] = { 106 .size = 500, 107 .limit = 250 108 }, 109 .mr_cache[8] = { 110 .size = 500, 111 .limit = 250 112 }, 113 .mr_cache[9] = { 114 .size = 500, 115 .limit = 250 116 }, 117 .mr_cache[10] = { 118 .size = 500, 119 .limit = 250 120 }, 121 .mr_cache[11] = { 122 .size = 500, 123 .limit = 250 124 }, 125 .mr_cache[12] = { 126 .size = 64, 127 .limit = 32 128 }, 129 .mr_cache[13] = { 130 .size = 32, 131 .limit = 16 132 }, 133 .mr_cache[14] = { 134 .size = 16, 135 .limit = 8 136 }, 137 .mr_cache[15] = { 138 .size = 8, 139 .limit = 4 140 }, 141 }, 142 }; 143 144 int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn) 145 { 146 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; 147 struct mlx5_eq *eq, *n; 148 int err = -ENOENT; 149 150 spin_lock(&table->lock); 151 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 152 if (eq->index == vector) { 153 *eqn = eq->eqn; 154 *irqn = eq->irqn; 155 err = 0; 156 break; 157 } 158 } 159 spin_unlock(&table->lock); 160 161 return err; 162 } 163 164 static int alloc_comp_eqs(struct mlx5_ib_dev *dev) 165 { 166 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; 167 char name[MLX5_MAX_EQ_NAME]; 168 struct mlx5_eq *eq, *n; 169 int ncomp_vec; 170 int nent; 171 int err; 172 int i; 173 174 INIT_LIST_HEAD(&dev->eqs_list); 175 ncomp_vec = table->num_comp_vectors; 176 nent = MLX5_COMP_EQ_SIZE; 177 for (i = 0; i < ncomp_vec; i++) { 178 eq = kzalloc(sizeof(*eq), GFP_KERNEL); 179 if (!eq) { 180 err = -ENOMEM; 181 goto clean; 182 } 183 184 snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i); 185 err = mlx5_create_map_eq(&dev->mdev, eq, 186 i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 187 name, &dev->mdev.priv.uuari.uars[0]); 188 if (err) { 189 kfree(eq); 190 goto clean; 191 } 192 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 193 eq->index = i; 194 spin_lock(&table->lock); 195 list_add_tail(&eq->list, &dev->eqs_list); 196 spin_unlock(&table->lock); 197 } 198 199 dev->num_comp_vectors = ncomp_vec; 200 return 0; 201 202 clean: 203 spin_lock(&table->lock); 204 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 205 list_del(&eq->list); 206 spin_unlock(&table->lock); 207 if (mlx5_destroy_unmap_eq(&dev->mdev, eq)) 208 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 209 kfree(eq); 210 spin_lock(&table->lock); 211 } 212 spin_unlock(&table->lock); 213 return err; 214 } 215 216 static void free_comp_eqs(struct mlx5_ib_dev *dev) 217 { 218 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table; 219 struct mlx5_eq *eq, *n; 220 221 spin_lock(&table->lock); 222 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 223 list_del(&eq->list); 224 spin_unlock(&table->lock); 225 if (mlx5_destroy_unmap_eq(&dev->mdev, eq)) 226 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 227 kfree(eq); 228 spin_lock(&table->lock); 229 } 230 spin_unlock(&table->lock); 231 } 232 233 static int mlx5_ib_query_device(struct ib_device *ibdev, 234 struct ib_device_attr *props) 235 { 236 struct mlx5_ib_dev *dev = to_mdev(ibdev); 237 struct ib_smp *in_mad = NULL; 238 struct ib_smp *out_mad = NULL; 239 int err = -ENOMEM; 240 int max_rq_sg; 241 int max_sq_sg; 242 u64 flags; 243 244 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 245 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 246 if (!in_mad || !out_mad) 247 goto out; 248 249 init_query_mad(in_mad); 250 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 251 252 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); 253 if (err) 254 goto out; 255 256 memset(props, 0, sizeof(*props)); 257 258 props->fw_ver = ((u64)fw_rev_maj(&dev->mdev) << 32) | 259 (fw_rev_min(&dev->mdev) << 16) | 260 fw_rev_sub(&dev->mdev); 261 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 262 IB_DEVICE_PORT_ACTIVE_EVENT | 263 IB_DEVICE_SYS_IMAGE_GUID | 264 IB_DEVICE_RC_RNR_NAK_GEN; 265 flags = dev->mdev.caps.flags; 266 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR) 267 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 268 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR) 269 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 270 if (flags & MLX5_DEV_CAP_FLAG_APM) 271 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 272 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 273 if (flags & MLX5_DEV_CAP_FLAG_XRC) 274 props->device_cap_flags |= IB_DEVICE_XRC; 275 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 276 277 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 278 0xffffff; 279 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); 280 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); 281 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 282 283 props->max_mr_size = ~0ull; 284 props->page_size_cap = dev->mdev.caps.min_page_sz; 285 props->max_qp = 1 << dev->mdev.caps.log_max_qp; 286 props->max_qp_wr = dev->mdev.caps.max_wqes; 287 max_rq_sg = dev->mdev.caps.max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg); 288 max_sq_sg = (dev->mdev.caps.max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) / 289 sizeof(struct mlx5_wqe_data_seg); 290 props->max_sge = min(max_rq_sg, max_sq_sg); 291 props->max_cq = 1 << dev->mdev.caps.log_max_cq; 292 props->max_cqe = dev->mdev.caps.max_cqes - 1; 293 props->max_mr = 1 << dev->mdev.caps.log_max_mkey; 294 props->max_pd = 1 << dev->mdev.caps.log_max_pd; 295 props->max_qp_rd_atom = dev->mdev.caps.max_ra_req_qp; 296 props->max_qp_init_rd_atom = dev->mdev.caps.max_ra_res_qp; 297 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 298 props->max_srq = 1 << dev->mdev.caps.log_max_srq; 299 props->max_srq_wr = dev->mdev.caps.max_srq_wqes - 1; 300 props->max_srq_sge = max_rq_sg - 1; 301 props->max_fast_reg_page_list_len = (unsigned int)-1; 302 props->local_ca_ack_delay = dev->mdev.caps.local_ca_ack_delay; 303 props->atomic_cap = IB_ATOMIC_NONE; 304 props->masked_atomic_cap = IB_ATOMIC_NONE; 305 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); 306 props->max_mcast_grp = 1 << dev->mdev.caps.log_max_mcg; 307 props->max_mcast_qp_attach = dev->mdev.caps.max_qp_mcg; 308 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 309 props->max_mcast_grp; 310 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 311 312 out: 313 kfree(in_mad); 314 kfree(out_mad); 315 316 return err; 317 } 318 319 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 320 struct ib_port_attr *props) 321 { 322 struct mlx5_ib_dev *dev = to_mdev(ibdev); 323 struct ib_smp *in_mad = NULL; 324 struct ib_smp *out_mad = NULL; 325 int ext_active_speed; 326 int err = -ENOMEM; 327 328 if (port < 1 || port > dev->mdev.caps.num_ports) { 329 mlx5_ib_warn(dev, "invalid port number %d\n", port); 330 return -EINVAL; 331 } 332 333 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 334 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 335 if (!in_mad || !out_mad) 336 goto out; 337 338 memset(props, 0, sizeof(*props)); 339 340 init_query_mad(in_mad); 341 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 342 in_mad->attr_mod = cpu_to_be32(port); 343 344 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); 345 if (err) { 346 mlx5_ib_warn(dev, "err %d\n", err); 347 goto out; 348 } 349 350 351 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); 352 props->lmc = out_mad->data[34] & 0x7; 353 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); 354 props->sm_sl = out_mad->data[36] & 0xf; 355 props->state = out_mad->data[32] & 0xf; 356 props->phys_state = out_mad->data[33] >> 4; 357 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); 358 props->gid_tbl_len = out_mad->data[50]; 359 props->max_msg_sz = 1 << to_mdev(ibdev)->mdev.caps.log_max_msg; 360 props->pkey_tbl_len = to_mdev(ibdev)->mdev.caps.port[port - 1].pkey_table_len; 361 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); 362 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); 363 props->active_width = out_mad->data[31] & 0xf; 364 props->active_speed = out_mad->data[35] >> 4; 365 props->max_mtu = out_mad->data[41] & 0xf; 366 props->active_mtu = out_mad->data[36] >> 4; 367 props->subnet_timeout = out_mad->data[51] & 0x1f; 368 props->max_vl_num = out_mad->data[37] >> 4; 369 props->init_type_reply = out_mad->data[41] >> 4; 370 371 /* Check if extended speeds (EDR/FDR/...) are supported */ 372 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 373 ext_active_speed = out_mad->data[62] >> 4; 374 375 switch (ext_active_speed) { 376 case 1: 377 props->active_speed = 16; /* FDR */ 378 break; 379 case 2: 380 props->active_speed = 32; /* EDR */ 381 break; 382 } 383 } 384 385 /* If reported active speed is QDR, check if is FDR-10 */ 386 if (props->active_speed == 4) { 387 if (dev->mdev.caps.ext_port_cap[port - 1] & 388 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { 389 init_query_mad(in_mad); 390 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; 391 in_mad->attr_mod = cpu_to_be32(port); 392 393 err = mlx5_MAD_IFC(dev, 1, 1, port, 394 NULL, NULL, in_mad, out_mad); 395 if (err) 396 goto out; 397 398 /* Checking LinkSpeedActive for FDR-10 */ 399 if (out_mad->data[15] & 0x1) 400 props->active_speed = 8; 401 } 402 } 403 404 out: 405 kfree(in_mad); 406 kfree(out_mad); 407 408 return err; 409 } 410 411 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 412 union ib_gid *gid) 413 { 414 struct ib_smp *in_mad = NULL; 415 struct ib_smp *out_mad = NULL; 416 int err = -ENOMEM; 417 418 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 419 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 420 if (!in_mad || !out_mad) 421 goto out; 422 423 init_query_mad(in_mad); 424 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 425 in_mad->attr_mod = cpu_to_be32(port); 426 427 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 428 if (err) 429 goto out; 430 431 memcpy(gid->raw, out_mad->data + 8, 8); 432 433 init_query_mad(in_mad); 434 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 435 in_mad->attr_mod = cpu_to_be32(index / 8); 436 437 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 438 if (err) 439 goto out; 440 441 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 442 443 out: 444 kfree(in_mad); 445 kfree(out_mad); 446 return err; 447 } 448 449 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 450 u16 *pkey) 451 { 452 struct ib_smp *in_mad = NULL; 453 struct ib_smp *out_mad = NULL; 454 int err = -ENOMEM; 455 456 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 457 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 458 if (!in_mad || !out_mad) 459 goto out; 460 461 init_query_mad(in_mad); 462 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 463 in_mad->attr_mod = cpu_to_be32(index / 32); 464 465 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 466 if (err) 467 goto out; 468 469 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); 470 471 out: 472 kfree(in_mad); 473 kfree(out_mad); 474 return err; 475 } 476 477 struct mlx5_reg_node_desc { 478 u8 desc[64]; 479 }; 480 481 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 482 struct ib_device_modify *props) 483 { 484 struct mlx5_ib_dev *dev = to_mdev(ibdev); 485 struct mlx5_reg_node_desc in; 486 struct mlx5_reg_node_desc out; 487 int err; 488 489 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 490 return -EOPNOTSUPP; 491 492 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 493 return 0; 494 495 /* 496 * If possible, pass node desc to FW, so it can generate 497 * a 144 trap. If cmd fails, just ignore. 498 */ 499 memcpy(&in, props->node_desc, 64); 500 err = mlx5_core_access_reg(&dev->mdev, &in, sizeof(in), &out, 501 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 502 if (err) 503 return err; 504 505 memcpy(ibdev->node_desc, props->node_desc, 64); 506 507 return err; 508 } 509 510 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 511 struct ib_port_modify *props) 512 { 513 struct mlx5_ib_dev *dev = to_mdev(ibdev); 514 struct ib_port_attr attr; 515 u32 tmp; 516 int err; 517 518 mutex_lock(&dev->cap_mask_mutex); 519 520 err = mlx5_ib_query_port(ibdev, port, &attr); 521 if (err) 522 goto out; 523 524 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 525 ~props->clr_port_cap_mask; 526 527 err = mlx5_set_port_caps(&dev->mdev, port, tmp); 528 529 out: 530 mutex_unlock(&dev->cap_mask_mutex); 531 return err; 532 } 533 534 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 535 struct ib_udata *udata) 536 { 537 struct mlx5_ib_dev *dev = to_mdev(ibdev); 538 struct mlx5_ib_alloc_ucontext_req_v2 req; 539 struct mlx5_ib_alloc_ucontext_resp resp; 540 struct mlx5_ib_ucontext *context; 541 struct mlx5_uuar_info *uuari; 542 struct mlx5_uar *uars; 543 int gross_uuars; 544 int num_uars; 545 int ver; 546 int uuarn; 547 int err; 548 int i; 549 int reqlen; 550 551 if (!dev->ib_active) 552 return ERR_PTR(-EAGAIN); 553 554 memset(&req, 0, sizeof(req)); 555 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 556 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 557 ver = 0; 558 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 559 ver = 2; 560 else 561 return ERR_PTR(-EINVAL); 562 563 err = ib_copy_from_udata(&req, udata, reqlen); 564 if (err) 565 return ERR_PTR(err); 566 567 if (req.flags || req.reserved) 568 return ERR_PTR(-EINVAL); 569 570 if (req.total_num_uuars > MLX5_MAX_UUARS) 571 return ERR_PTR(-ENOMEM); 572 573 if (req.total_num_uuars == 0) 574 return ERR_PTR(-EINVAL); 575 576 req.total_num_uuars = ALIGN(req.total_num_uuars, 577 MLX5_NON_FP_BF_REGS_PER_PAGE); 578 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 579 return ERR_PTR(-EINVAL); 580 581 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 582 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 583 resp.qp_tab_size = 1 << dev->mdev.caps.log_max_qp; 584 resp.bf_reg_size = dev->mdev.caps.bf_reg_size; 585 resp.cache_line_size = L1_CACHE_BYTES; 586 resp.max_sq_desc_sz = dev->mdev.caps.max_sq_desc_sz; 587 resp.max_rq_desc_sz = dev->mdev.caps.max_rq_desc_sz; 588 resp.max_send_wqebb = dev->mdev.caps.max_wqes; 589 resp.max_recv_wr = dev->mdev.caps.max_wqes; 590 resp.max_srq_recv_wr = dev->mdev.caps.max_srq_wqes; 591 592 context = kzalloc(sizeof(*context), GFP_KERNEL); 593 if (!context) 594 return ERR_PTR(-ENOMEM); 595 596 uuari = &context->uuari; 597 mutex_init(&uuari->lock); 598 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 599 if (!uars) { 600 err = -ENOMEM; 601 goto out_ctx; 602 } 603 604 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 605 sizeof(*uuari->bitmap), 606 GFP_KERNEL); 607 if (!uuari->bitmap) { 608 err = -ENOMEM; 609 goto out_uar_ctx; 610 } 611 /* 612 * clear all fast path uuars 613 */ 614 for (i = 0; i < gross_uuars; i++) { 615 uuarn = i & 3; 616 if (uuarn == 2 || uuarn == 3) 617 set_bit(i, uuari->bitmap); 618 } 619 620 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 621 if (!uuari->count) { 622 err = -ENOMEM; 623 goto out_bitmap; 624 } 625 626 for (i = 0; i < num_uars; i++) { 627 err = mlx5_cmd_alloc_uar(&dev->mdev, &uars[i].index); 628 if (err) 629 goto out_count; 630 } 631 632 INIT_LIST_HEAD(&context->db_page_list); 633 mutex_init(&context->db_page_mutex); 634 635 resp.tot_uuars = req.total_num_uuars; 636 resp.num_ports = dev->mdev.caps.num_ports; 637 err = ib_copy_to_udata(udata, &resp, 638 sizeof(resp) - sizeof(resp.reserved)); 639 if (err) 640 goto out_uars; 641 642 uuari->ver = ver; 643 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 644 uuari->uars = uars; 645 uuari->num_uars = num_uars; 646 return &context->ibucontext; 647 648 out_uars: 649 for (i--; i >= 0; i--) 650 mlx5_cmd_free_uar(&dev->mdev, uars[i].index); 651 out_count: 652 kfree(uuari->count); 653 654 out_bitmap: 655 kfree(uuari->bitmap); 656 657 out_uar_ctx: 658 kfree(uars); 659 660 out_ctx: 661 kfree(context); 662 return ERR_PTR(err); 663 } 664 665 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 666 { 667 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 668 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 669 struct mlx5_uuar_info *uuari = &context->uuari; 670 int i; 671 672 for (i = 0; i < uuari->num_uars; i++) { 673 if (mlx5_cmd_free_uar(&dev->mdev, uuari->uars[i].index)) 674 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 675 } 676 677 kfree(uuari->count); 678 kfree(uuari->bitmap); 679 kfree(uuari->uars); 680 kfree(context); 681 682 return 0; 683 } 684 685 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 686 { 687 return (pci_resource_start(dev->mdev.pdev, 0) >> PAGE_SHIFT) + index; 688 } 689 690 static int get_command(unsigned long offset) 691 { 692 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 693 } 694 695 static int get_arg(unsigned long offset) 696 { 697 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 698 } 699 700 static int get_index(unsigned long offset) 701 { 702 return get_arg(offset); 703 } 704 705 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 706 { 707 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 708 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 709 struct mlx5_uuar_info *uuari = &context->uuari; 710 unsigned long command; 711 unsigned long idx; 712 phys_addr_t pfn; 713 714 command = get_command(vma->vm_pgoff); 715 switch (command) { 716 case MLX5_IB_MMAP_REGULAR_PAGE: 717 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 718 return -EINVAL; 719 720 idx = get_index(vma->vm_pgoff); 721 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 722 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 723 (unsigned long long)pfn); 724 725 if (idx >= uuari->num_uars) 726 return -EINVAL; 727 728 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 729 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 730 PAGE_SIZE, vma->vm_page_prot)) 731 return -EAGAIN; 732 733 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 734 vma->vm_start, 735 (unsigned long long)pfn << PAGE_SHIFT); 736 break; 737 738 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 739 return -ENOSYS; 740 741 default: 742 return -EINVAL; 743 } 744 745 return 0; 746 } 747 748 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 749 { 750 struct mlx5_create_mkey_mbox_in *in; 751 struct mlx5_mkey_seg *seg; 752 struct mlx5_core_mr mr; 753 int err; 754 755 in = kzalloc(sizeof(*in), GFP_KERNEL); 756 if (!in) 757 return -ENOMEM; 758 759 seg = &in->seg; 760 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 761 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 762 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 763 seg->start_addr = 0; 764 765 err = mlx5_core_create_mkey(&dev->mdev, &mr, in, sizeof(*in), 766 NULL, NULL, NULL); 767 if (err) { 768 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 769 goto err_in; 770 } 771 772 kfree(in); 773 *key = mr.key; 774 775 return 0; 776 777 err_in: 778 kfree(in); 779 780 return err; 781 } 782 783 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 784 { 785 struct mlx5_core_mr mr; 786 int err; 787 788 memset(&mr, 0, sizeof(mr)); 789 mr.key = key; 790 err = mlx5_core_destroy_mkey(&dev->mdev, &mr); 791 if (err) 792 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 793 } 794 795 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 796 struct ib_ucontext *context, 797 struct ib_udata *udata) 798 { 799 struct mlx5_ib_alloc_pd_resp resp; 800 struct mlx5_ib_pd *pd; 801 int err; 802 803 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 804 if (!pd) 805 return ERR_PTR(-ENOMEM); 806 807 err = mlx5_core_alloc_pd(&to_mdev(ibdev)->mdev, &pd->pdn); 808 if (err) { 809 kfree(pd); 810 return ERR_PTR(err); 811 } 812 813 if (context) { 814 resp.pdn = pd->pdn; 815 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 816 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn); 817 kfree(pd); 818 return ERR_PTR(-EFAULT); 819 } 820 } else { 821 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 822 if (err) { 823 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn); 824 kfree(pd); 825 return ERR_PTR(err); 826 } 827 } 828 829 return &pd->ibpd; 830 } 831 832 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 833 { 834 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 835 struct mlx5_ib_pd *mpd = to_mpd(pd); 836 837 if (!pd->uobject) 838 free_pa_mkey(mdev, mpd->pa_lkey); 839 840 mlx5_core_dealloc_pd(&mdev->mdev, mpd->pdn); 841 kfree(mpd); 842 843 return 0; 844 } 845 846 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 847 { 848 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 849 int err; 850 851 err = mlx5_core_attach_mcg(&dev->mdev, gid, ibqp->qp_num); 852 if (err) 853 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 854 ibqp->qp_num, gid->raw); 855 856 return err; 857 } 858 859 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 860 { 861 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 862 int err; 863 864 err = mlx5_core_detach_mcg(&dev->mdev, gid, ibqp->qp_num); 865 if (err) 866 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 867 ibqp->qp_num, gid->raw); 868 869 return err; 870 } 871 872 static int init_node_data(struct mlx5_ib_dev *dev) 873 { 874 struct ib_smp *in_mad = NULL; 875 struct ib_smp *out_mad = NULL; 876 int err = -ENOMEM; 877 878 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 879 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 880 if (!in_mad || !out_mad) 881 goto out; 882 883 init_query_mad(in_mad); 884 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 885 886 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 887 if (err) 888 goto out; 889 890 memcpy(dev->ib_dev.node_desc, out_mad->data, 64); 891 892 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 893 894 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 895 if (err) 896 goto out; 897 898 dev->mdev.rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); 899 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 900 901 out: 902 kfree(in_mad); 903 kfree(out_mad); 904 return err; 905 } 906 907 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 908 char *buf) 909 { 910 struct mlx5_ib_dev *dev = 911 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 912 913 return sprintf(buf, "%d\n", dev->mdev.priv.fw_pages); 914 } 915 916 static ssize_t show_reg_pages(struct device *device, 917 struct device_attribute *attr, char *buf) 918 { 919 struct mlx5_ib_dev *dev = 920 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 921 922 return sprintf(buf, "%d\n", dev->mdev.priv.reg_pages); 923 } 924 925 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 926 char *buf) 927 { 928 struct mlx5_ib_dev *dev = 929 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 930 return sprintf(buf, "MT%d\n", dev->mdev.pdev->device); 931 } 932 933 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 934 char *buf) 935 { 936 struct mlx5_ib_dev *dev = 937 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 938 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(&dev->mdev), 939 fw_rev_min(&dev->mdev), fw_rev_sub(&dev->mdev)); 940 } 941 942 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 943 char *buf) 944 { 945 struct mlx5_ib_dev *dev = 946 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 947 return sprintf(buf, "%x\n", dev->mdev.rev_id); 948 } 949 950 static ssize_t show_board(struct device *device, struct device_attribute *attr, 951 char *buf) 952 { 953 struct mlx5_ib_dev *dev = 954 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 955 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 956 dev->mdev.board_id); 957 } 958 959 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 960 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 961 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 962 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 963 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 964 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 965 966 static struct device_attribute *mlx5_class_attributes[] = { 967 &dev_attr_hw_rev, 968 &dev_attr_fw_ver, 969 &dev_attr_hca_type, 970 &dev_attr_board_id, 971 &dev_attr_fw_pages, 972 &dev_attr_reg_pages, 973 }; 974 975 static void mlx5_ib_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 976 void *data) 977 { 978 struct mlx5_ib_dev *ibdev = container_of(dev, struct mlx5_ib_dev, mdev); 979 struct ib_event ibev; 980 u8 port = 0; 981 982 switch (event) { 983 case MLX5_DEV_EVENT_SYS_ERROR: 984 ibdev->ib_active = false; 985 ibev.event = IB_EVENT_DEVICE_FATAL; 986 break; 987 988 case MLX5_DEV_EVENT_PORT_UP: 989 ibev.event = IB_EVENT_PORT_ACTIVE; 990 port = *(u8 *)data; 991 break; 992 993 case MLX5_DEV_EVENT_PORT_DOWN: 994 ibev.event = IB_EVENT_PORT_ERR; 995 port = *(u8 *)data; 996 break; 997 998 case MLX5_DEV_EVENT_PORT_INITIALIZED: 999 /* not used by ULPs */ 1000 return; 1001 1002 case MLX5_DEV_EVENT_LID_CHANGE: 1003 ibev.event = IB_EVENT_LID_CHANGE; 1004 port = *(u8 *)data; 1005 break; 1006 1007 case MLX5_DEV_EVENT_PKEY_CHANGE: 1008 ibev.event = IB_EVENT_PKEY_CHANGE; 1009 port = *(u8 *)data; 1010 break; 1011 1012 case MLX5_DEV_EVENT_GUID_CHANGE: 1013 ibev.event = IB_EVENT_GID_CHANGE; 1014 port = *(u8 *)data; 1015 break; 1016 1017 case MLX5_DEV_EVENT_CLIENT_REREG: 1018 ibev.event = IB_EVENT_CLIENT_REREGISTER; 1019 port = *(u8 *)data; 1020 break; 1021 } 1022 1023 ibev.device = &ibdev->ib_dev; 1024 ibev.element.port_num = port; 1025 1026 if (port < 1 || port > ibdev->num_ports) { 1027 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 1028 return; 1029 } 1030 1031 if (ibdev->ib_active) 1032 ib_dispatch_event(&ibev); 1033 } 1034 1035 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 1036 { 1037 int port; 1038 1039 for (port = 1; port <= dev->mdev.caps.num_ports; port++) 1040 mlx5_query_ext_port_caps(dev, port); 1041 } 1042 1043 static int get_port_caps(struct mlx5_ib_dev *dev) 1044 { 1045 struct ib_device_attr *dprops = NULL; 1046 struct ib_port_attr *pprops = NULL; 1047 int err = 0; 1048 int port; 1049 1050 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 1051 if (!pprops) 1052 goto out; 1053 1054 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 1055 if (!dprops) 1056 goto out; 1057 1058 err = mlx5_ib_query_device(&dev->ib_dev, dprops); 1059 if (err) { 1060 mlx5_ib_warn(dev, "query_device failed %d\n", err); 1061 goto out; 1062 } 1063 1064 for (port = 1; port <= dev->mdev.caps.num_ports; port++) { 1065 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 1066 if (err) { 1067 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err); 1068 break; 1069 } 1070 dev->mdev.caps.port[port - 1].pkey_table_len = dprops->max_pkeys; 1071 dev->mdev.caps.port[port - 1].gid_table_len = pprops->gid_tbl_len; 1072 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 1073 dprops->max_pkeys, pprops->gid_tbl_len); 1074 } 1075 1076 out: 1077 kfree(pprops); 1078 kfree(dprops); 1079 1080 return err; 1081 } 1082 1083 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 1084 { 1085 int err; 1086 1087 err = mlx5_mr_cache_cleanup(dev); 1088 if (err) 1089 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 1090 1091 mlx5_ib_destroy_qp(dev->umrc.qp); 1092 ib_destroy_cq(dev->umrc.cq); 1093 ib_dereg_mr(dev->umrc.mr); 1094 ib_dealloc_pd(dev->umrc.pd); 1095 } 1096 1097 enum { 1098 MAX_UMR_WR = 128, 1099 }; 1100 1101 static int create_umr_res(struct mlx5_ib_dev *dev) 1102 { 1103 struct ib_qp_init_attr *init_attr = NULL; 1104 struct ib_qp_attr *attr = NULL; 1105 struct ib_pd *pd; 1106 struct ib_cq *cq; 1107 struct ib_qp *qp; 1108 struct ib_mr *mr; 1109 int ret; 1110 1111 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 1112 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 1113 if (!attr || !init_attr) { 1114 ret = -ENOMEM; 1115 goto error_0; 1116 } 1117 1118 pd = ib_alloc_pd(&dev->ib_dev); 1119 if (IS_ERR(pd)) { 1120 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 1121 ret = PTR_ERR(pd); 1122 goto error_0; 1123 } 1124 1125 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); 1126 if (IS_ERR(mr)) { 1127 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); 1128 ret = PTR_ERR(mr); 1129 goto error_1; 1130 } 1131 1132 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128, 1133 0); 1134 if (IS_ERR(cq)) { 1135 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 1136 ret = PTR_ERR(cq); 1137 goto error_2; 1138 } 1139 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1140 1141 init_attr->send_cq = cq; 1142 init_attr->recv_cq = cq; 1143 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1144 init_attr->cap.max_send_wr = MAX_UMR_WR; 1145 init_attr->cap.max_send_sge = 1; 1146 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1147 init_attr->port_num = 1; 1148 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1149 if (IS_ERR(qp)) { 1150 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1151 ret = PTR_ERR(qp); 1152 goto error_3; 1153 } 1154 qp->device = &dev->ib_dev; 1155 qp->real_qp = qp; 1156 qp->uobject = NULL; 1157 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1158 1159 attr->qp_state = IB_QPS_INIT; 1160 attr->port_num = 1; 1161 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1162 IB_QP_PORT, NULL); 1163 if (ret) { 1164 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1165 goto error_4; 1166 } 1167 1168 memset(attr, 0, sizeof(*attr)); 1169 attr->qp_state = IB_QPS_RTR; 1170 attr->path_mtu = IB_MTU_256; 1171 1172 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1173 if (ret) { 1174 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1175 goto error_4; 1176 } 1177 1178 memset(attr, 0, sizeof(*attr)); 1179 attr->qp_state = IB_QPS_RTS; 1180 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1181 if (ret) { 1182 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1183 goto error_4; 1184 } 1185 1186 dev->umrc.qp = qp; 1187 dev->umrc.cq = cq; 1188 dev->umrc.mr = mr; 1189 dev->umrc.pd = pd; 1190 1191 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1192 ret = mlx5_mr_cache_init(dev); 1193 if (ret) { 1194 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1195 goto error_4; 1196 } 1197 1198 kfree(attr); 1199 kfree(init_attr); 1200 1201 return 0; 1202 1203 error_4: 1204 mlx5_ib_destroy_qp(qp); 1205 1206 error_3: 1207 ib_destroy_cq(cq); 1208 1209 error_2: 1210 ib_dereg_mr(mr); 1211 1212 error_1: 1213 ib_dealloc_pd(pd); 1214 1215 error_0: 1216 kfree(attr); 1217 kfree(init_attr); 1218 return ret; 1219 } 1220 1221 static int create_dev_resources(struct mlx5_ib_resources *devr) 1222 { 1223 struct ib_srq_init_attr attr; 1224 struct mlx5_ib_dev *dev; 1225 int ret = 0; 1226 1227 dev = container_of(devr, struct mlx5_ib_dev, devr); 1228 1229 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1230 if (IS_ERR(devr->p0)) { 1231 ret = PTR_ERR(devr->p0); 1232 goto error0; 1233 } 1234 devr->p0->device = &dev->ib_dev; 1235 devr->p0->uobject = NULL; 1236 atomic_set(&devr->p0->usecnt, 0); 1237 1238 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL); 1239 if (IS_ERR(devr->c0)) { 1240 ret = PTR_ERR(devr->c0); 1241 goto error1; 1242 } 1243 devr->c0->device = &dev->ib_dev; 1244 devr->c0->uobject = NULL; 1245 devr->c0->comp_handler = NULL; 1246 devr->c0->event_handler = NULL; 1247 devr->c0->cq_context = NULL; 1248 atomic_set(&devr->c0->usecnt, 0); 1249 1250 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1251 if (IS_ERR(devr->x0)) { 1252 ret = PTR_ERR(devr->x0); 1253 goto error2; 1254 } 1255 devr->x0->device = &dev->ib_dev; 1256 devr->x0->inode = NULL; 1257 atomic_set(&devr->x0->usecnt, 0); 1258 mutex_init(&devr->x0->tgt_qp_mutex); 1259 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1260 1261 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1262 if (IS_ERR(devr->x1)) { 1263 ret = PTR_ERR(devr->x1); 1264 goto error3; 1265 } 1266 devr->x1->device = &dev->ib_dev; 1267 devr->x1->inode = NULL; 1268 atomic_set(&devr->x1->usecnt, 0); 1269 mutex_init(&devr->x1->tgt_qp_mutex); 1270 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1271 1272 memset(&attr, 0, sizeof(attr)); 1273 attr.attr.max_sge = 1; 1274 attr.attr.max_wr = 1; 1275 attr.srq_type = IB_SRQT_XRC; 1276 attr.ext.xrc.cq = devr->c0; 1277 attr.ext.xrc.xrcd = devr->x0; 1278 1279 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1280 if (IS_ERR(devr->s0)) { 1281 ret = PTR_ERR(devr->s0); 1282 goto error4; 1283 } 1284 devr->s0->device = &dev->ib_dev; 1285 devr->s0->pd = devr->p0; 1286 devr->s0->uobject = NULL; 1287 devr->s0->event_handler = NULL; 1288 devr->s0->srq_context = NULL; 1289 devr->s0->srq_type = IB_SRQT_XRC; 1290 devr->s0->ext.xrc.xrcd = devr->x0; 1291 devr->s0->ext.xrc.cq = devr->c0; 1292 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1293 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1294 atomic_inc(&devr->p0->usecnt); 1295 atomic_set(&devr->s0->usecnt, 0); 1296 1297 return 0; 1298 1299 error4: 1300 mlx5_ib_dealloc_xrcd(devr->x1); 1301 error3: 1302 mlx5_ib_dealloc_xrcd(devr->x0); 1303 error2: 1304 mlx5_ib_destroy_cq(devr->c0); 1305 error1: 1306 mlx5_ib_dealloc_pd(devr->p0); 1307 error0: 1308 return ret; 1309 } 1310 1311 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1312 { 1313 mlx5_ib_destroy_srq(devr->s0); 1314 mlx5_ib_dealloc_xrcd(devr->x0); 1315 mlx5_ib_dealloc_xrcd(devr->x1); 1316 mlx5_ib_destroy_cq(devr->c0); 1317 mlx5_ib_dealloc_pd(devr->p0); 1318 } 1319 1320 static int init_one(struct pci_dev *pdev, 1321 const struct pci_device_id *id) 1322 { 1323 struct mlx5_core_dev *mdev; 1324 struct mlx5_ib_dev *dev; 1325 int err; 1326 int i; 1327 1328 printk_once(KERN_INFO "%s", mlx5_version); 1329 1330 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1331 if (!dev) 1332 return -ENOMEM; 1333 1334 mdev = &dev->mdev; 1335 mdev->event = mlx5_ib_event; 1336 if (prof_sel >= ARRAY_SIZE(profile)) { 1337 pr_warn("selected pofile out of range, selceting default\n"); 1338 prof_sel = 0; 1339 } 1340 mdev->profile = &profile[prof_sel]; 1341 err = mlx5_dev_init(mdev, pdev); 1342 if (err) 1343 goto err_free; 1344 1345 err = get_port_caps(dev); 1346 if (err) 1347 goto err_cleanup; 1348 1349 get_ext_port_caps(dev); 1350 1351 err = alloc_comp_eqs(dev); 1352 if (err) 1353 goto err_cleanup; 1354 1355 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1356 1357 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1358 dev->ib_dev.owner = THIS_MODULE; 1359 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1360 dev->ib_dev.local_dma_lkey = mdev->caps.reserved_lkey; 1361 dev->num_ports = mdev->caps.num_ports; 1362 dev->ib_dev.phys_port_cnt = dev->num_ports; 1363 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors; 1364 dev->ib_dev.dma_device = &mdev->pdev->dev; 1365 1366 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1367 dev->ib_dev.uverbs_cmd_mask = 1368 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1369 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1370 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1371 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1372 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1373 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1374 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1375 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1376 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1377 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1378 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1379 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1380 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1381 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1382 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1383 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1384 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1385 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1386 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1387 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1388 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1389 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1390 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1391 1392 dev->ib_dev.query_device = mlx5_ib_query_device; 1393 dev->ib_dev.query_port = mlx5_ib_query_port; 1394 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1395 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1396 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1397 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1398 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1399 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1400 dev->ib_dev.mmap = mlx5_ib_mmap; 1401 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1402 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1403 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1404 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1405 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1406 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1407 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1408 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1409 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1410 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1411 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1412 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1413 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1414 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1415 dev->ib_dev.post_send = mlx5_ib_post_send; 1416 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1417 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1418 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1419 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1420 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1421 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1422 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1423 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1424 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1425 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1426 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1427 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1428 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1429 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; 1430 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1431 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1432 1433 if (mdev->caps.flags & MLX5_DEV_CAP_FLAG_XRC) { 1434 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1435 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1436 dev->ib_dev.uverbs_cmd_mask |= 1437 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1438 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1439 } 1440 1441 err = init_node_data(dev); 1442 if (err) 1443 goto err_eqs; 1444 1445 mutex_init(&dev->cap_mask_mutex); 1446 spin_lock_init(&dev->mr_lock); 1447 1448 err = create_dev_resources(&dev->devr); 1449 if (err) 1450 goto err_eqs; 1451 1452 err = ib_register_device(&dev->ib_dev, NULL); 1453 if (err) 1454 goto err_rsrc; 1455 1456 err = create_umr_res(dev); 1457 if (err) 1458 goto err_dev; 1459 1460 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1461 err = device_create_file(&dev->ib_dev.dev, 1462 mlx5_class_attributes[i]); 1463 if (err) 1464 goto err_umrc; 1465 } 1466 1467 dev->ib_active = true; 1468 1469 return 0; 1470 1471 err_umrc: 1472 destroy_umrc_res(dev); 1473 1474 err_dev: 1475 ib_unregister_device(&dev->ib_dev); 1476 1477 err_rsrc: 1478 destroy_dev_resources(&dev->devr); 1479 1480 err_eqs: 1481 free_comp_eqs(dev); 1482 1483 err_cleanup: 1484 mlx5_dev_cleanup(mdev); 1485 1486 err_free: 1487 ib_dealloc_device((struct ib_device *)dev); 1488 1489 return err; 1490 } 1491 1492 static void remove_one(struct pci_dev *pdev) 1493 { 1494 struct mlx5_ib_dev *dev = mlx5_pci2ibdev(pdev); 1495 1496 destroy_umrc_res(dev); 1497 ib_unregister_device(&dev->ib_dev); 1498 destroy_dev_resources(&dev->devr); 1499 free_comp_eqs(dev); 1500 mlx5_dev_cleanup(&dev->mdev); 1501 ib_dealloc_device(&dev->ib_dev); 1502 } 1503 1504 static DEFINE_PCI_DEVICE_TABLE(mlx5_ib_pci_table) = { 1505 { PCI_VDEVICE(MELLANOX, 4113) }, /* MT4113 Connect-IB */ 1506 { 0, } 1507 }; 1508 1509 MODULE_DEVICE_TABLE(pci, mlx5_ib_pci_table); 1510 1511 static struct pci_driver mlx5_ib_driver = { 1512 .name = DRIVER_NAME, 1513 .id_table = mlx5_ib_pci_table, 1514 .probe = init_one, 1515 .remove = remove_one 1516 }; 1517 1518 static int __init mlx5_ib_init(void) 1519 { 1520 return pci_register_driver(&mlx5_ib_driver); 1521 } 1522 1523 static void __exit mlx5_ib_cleanup(void) 1524 { 1525 pci_unregister_driver(&mlx5_ib_driver); 1526 } 1527 1528 module_init(mlx5_ib_init); 1529 module_exit(mlx5_ib_cleanup); 1530