1 /* 2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <rdma/ib_smi.h> 44 #include <rdma/ib_umem.h> 45 #include "user.h" 46 #include "mlx5_ib.h" 47 48 #define DRIVER_NAME "mlx5_ib" 49 #define DRIVER_VERSION "2.2-1" 50 #define DRIVER_RELDATE "Feb 2014" 51 52 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 53 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 54 MODULE_LICENSE("Dual BSD/GPL"); 55 MODULE_VERSION(DRIVER_VERSION); 56 57 static int deprecated_prof_sel = 2; 58 module_param_named(prof_sel, deprecated_prof_sel, int, 0444); 59 MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); 60 61 static char mlx5_version[] = 62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 64 65 int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn) 66 { 67 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table; 68 struct mlx5_eq *eq, *n; 69 int err = -ENOENT; 70 71 spin_lock(&table->lock); 72 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 73 if (eq->index == vector) { 74 *eqn = eq->eqn; 75 *irqn = eq->irqn; 76 err = 0; 77 break; 78 } 79 } 80 spin_unlock(&table->lock); 81 82 return err; 83 } 84 85 static int alloc_comp_eqs(struct mlx5_ib_dev *dev) 86 { 87 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table; 88 char name[MLX5_MAX_EQ_NAME]; 89 struct mlx5_eq *eq, *n; 90 int ncomp_vec; 91 int nent; 92 int err; 93 int i; 94 95 INIT_LIST_HEAD(&dev->eqs_list); 96 ncomp_vec = table->num_comp_vectors; 97 nent = MLX5_COMP_EQ_SIZE; 98 for (i = 0; i < ncomp_vec; i++) { 99 eq = kzalloc(sizeof(*eq), GFP_KERNEL); 100 if (!eq) { 101 err = -ENOMEM; 102 goto clean; 103 } 104 105 snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i); 106 err = mlx5_create_map_eq(dev->mdev, eq, 107 i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 108 name, &dev->mdev->priv.uuari.uars[0]); 109 if (err) { 110 kfree(eq); 111 goto clean; 112 } 113 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 114 eq->index = i; 115 spin_lock(&table->lock); 116 list_add_tail(&eq->list, &dev->eqs_list); 117 spin_unlock(&table->lock); 118 } 119 120 dev->num_comp_vectors = ncomp_vec; 121 return 0; 122 123 clean: 124 spin_lock(&table->lock); 125 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 126 list_del(&eq->list); 127 spin_unlock(&table->lock); 128 if (mlx5_destroy_unmap_eq(dev->mdev, eq)) 129 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 130 kfree(eq); 131 spin_lock(&table->lock); 132 } 133 spin_unlock(&table->lock); 134 return err; 135 } 136 137 static void free_comp_eqs(struct mlx5_ib_dev *dev) 138 { 139 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table; 140 struct mlx5_eq *eq, *n; 141 142 spin_lock(&table->lock); 143 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 144 list_del(&eq->list); 145 spin_unlock(&table->lock); 146 if (mlx5_destroy_unmap_eq(dev->mdev, eq)) 147 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 148 kfree(eq); 149 spin_lock(&table->lock); 150 } 151 spin_unlock(&table->lock); 152 } 153 154 static int mlx5_ib_query_device(struct ib_device *ibdev, 155 struct ib_device_attr *props) 156 { 157 struct mlx5_ib_dev *dev = to_mdev(ibdev); 158 struct ib_smp *in_mad = NULL; 159 struct ib_smp *out_mad = NULL; 160 struct mlx5_general_caps *gen; 161 int err = -ENOMEM; 162 int max_rq_sg; 163 int max_sq_sg; 164 u64 flags; 165 166 gen = &dev->mdev->caps.gen; 167 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 168 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 169 if (!in_mad || !out_mad) 170 goto out; 171 172 init_query_mad(in_mad); 173 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 174 175 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); 176 if (err) 177 goto out; 178 179 memset(props, 0, sizeof(*props)); 180 181 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 182 (fw_rev_min(dev->mdev) << 16) | 183 fw_rev_sub(dev->mdev); 184 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 185 IB_DEVICE_PORT_ACTIVE_EVENT | 186 IB_DEVICE_SYS_IMAGE_GUID | 187 IB_DEVICE_RC_RNR_NAK_GEN; 188 flags = gen->flags; 189 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR) 190 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 191 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR) 192 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 193 if (flags & MLX5_DEV_CAP_FLAG_APM) 194 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 195 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 196 if (flags & MLX5_DEV_CAP_FLAG_XRC) 197 props->device_cap_flags |= IB_DEVICE_XRC; 198 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 199 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) { 200 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 201 /* At this stage no support for signature handover */ 202 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 203 IB_PROT_T10DIF_TYPE_2 | 204 IB_PROT_T10DIF_TYPE_3; 205 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 206 IB_GUARD_T10DIF_CSUM; 207 } 208 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST) 209 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 210 211 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 212 0xffffff; 213 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); 214 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); 215 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 216 217 props->max_mr_size = ~0ull; 218 props->page_size_cap = gen->min_page_sz; 219 props->max_qp = 1 << gen->log_max_qp; 220 props->max_qp_wr = gen->max_wqes; 221 max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg); 222 max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) / 223 sizeof(struct mlx5_wqe_data_seg); 224 props->max_sge = min(max_rq_sg, max_sq_sg); 225 props->max_cq = 1 << gen->log_max_cq; 226 props->max_cqe = gen->max_cqes - 1; 227 props->max_mr = 1 << gen->log_max_mkey; 228 props->max_pd = 1 << gen->log_max_pd; 229 props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp; 230 props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp; 231 props->max_srq = 1 << gen->log_max_srq; 232 props->max_srq_wr = gen->max_srq_wqes - 1; 233 props->local_ca_ack_delay = gen->local_ca_ack_delay; 234 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 235 props->max_srq_sge = max_rq_sg - 1; 236 props->max_fast_reg_page_list_len = (unsigned int)-1; 237 props->local_ca_ack_delay = gen->local_ca_ack_delay; 238 props->atomic_cap = IB_ATOMIC_NONE; 239 props->masked_atomic_cap = IB_ATOMIC_NONE; 240 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); 241 props->max_mcast_grp = 1 << gen->log_max_mcg; 242 props->max_mcast_qp_attach = gen->max_qp_mcg; 243 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 244 props->max_mcast_grp; 245 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 246 247 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 248 if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG) 249 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; 250 props->odp_caps = dev->odp_caps; 251 #endif 252 253 out: 254 kfree(in_mad); 255 kfree(out_mad); 256 257 return err; 258 } 259 260 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 261 struct ib_port_attr *props) 262 { 263 struct mlx5_ib_dev *dev = to_mdev(ibdev); 264 struct ib_smp *in_mad = NULL; 265 struct ib_smp *out_mad = NULL; 266 struct mlx5_general_caps *gen; 267 int ext_active_speed; 268 int err = -ENOMEM; 269 270 gen = &dev->mdev->caps.gen; 271 if (port < 1 || port > gen->num_ports) { 272 mlx5_ib_warn(dev, "invalid port number %d\n", port); 273 return -EINVAL; 274 } 275 276 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 277 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 278 if (!in_mad || !out_mad) 279 goto out; 280 281 memset(props, 0, sizeof(*props)); 282 283 init_query_mad(in_mad); 284 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 285 in_mad->attr_mod = cpu_to_be32(port); 286 287 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); 288 if (err) { 289 mlx5_ib_warn(dev, "err %d\n", err); 290 goto out; 291 } 292 293 294 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); 295 props->lmc = out_mad->data[34] & 0x7; 296 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); 297 props->sm_sl = out_mad->data[36] & 0xf; 298 props->state = out_mad->data[32] & 0xf; 299 props->phys_state = out_mad->data[33] >> 4; 300 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); 301 props->gid_tbl_len = out_mad->data[50]; 302 props->max_msg_sz = 1 << gen->log_max_msg; 303 props->pkey_tbl_len = gen->port[port - 1].pkey_table_len; 304 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); 305 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); 306 props->active_width = out_mad->data[31] & 0xf; 307 props->active_speed = out_mad->data[35] >> 4; 308 props->max_mtu = out_mad->data[41] & 0xf; 309 props->active_mtu = out_mad->data[36] >> 4; 310 props->subnet_timeout = out_mad->data[51] & 0x1f; 311 props->max_vl_num = out_mad->data[37] >> 4; 312 props->init_type_reply = out_mad->data[41] >> 4; 313 314 /* Check if extended speeds (EDR/FDR/...) are supported */ 315 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 316 ext_active_speed = out_mad->data[62] >> 4; 317 318 switch (ext_active_speed) { 319 case 1: 320 props->active_speed = 16; /* FDR */ 321 break; 322 case 2: 323 props->active_speed = 32; /* EDR */ 324 break; 325 } 326 } 327 328 /* If reported active speed is QDR, check if is FDR-10 */ 329 if (props->active_speed == 4) { 330 if (gen->ext_port_cap[port - 1] & 331 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { 332 init_query_mad(in_mad); 333 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; 334 in_mad->attr_mod = cpu_to_be32(port); 335 336 err = mlx5_MAD_IFC(dev, 1, 1, port, 337 NULL, NULL, in_mad, out_mad); 338 if (err) 339 goto out; 340 341 /* Checking LinkSpeedActive for FDR-10 */ 342 if (out_mad->data[15] & 0x1) 343 props->active_speed = 8; 344 } 345 } 346 347 out: 348 kfree(in_mad); 349 kfree(out_mad); 350 351 return err; 352 } 353 354 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 355 union ib_gid *gid) 356 { 357 struct ib_smp *in_mad = NULL; 358 struct ib_smp *out_mad = NULL; 359 int err = -ENOMEM; 360 361 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 362 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 363 if (!in_mad || !out_mad) 364 goto out; 365 366 init_query_mad(in_mad); 367 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 368 in_mad->attr_mod = cpu_to_be32(port); 369 370 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 371 if (err) 372 goto out; 373 374 memcpy(gid->raw, out_mad->data + 8, 8); 375 376 init_query_mad(in_mad); 377 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 378 in_mad->attr_mod = cpu_to_be32(index / 8); 379 380 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 381 if (err) 382 goto out; 383 384 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 385 386 out: 387 kfree(in_mad); 388 kfree(out_mad); 389 return err; 390 } 391 392 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 393 u16 *pkey) 394 { 395 struct ib_smp *in_mad = NULL; 396 struct ib_smp *out_mad = NULL; 397 int err = -ENOMEM; 398 399 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 400 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 401 if (!in_mad || !out_mad) 402 goto out; 403 404 init_query_mad(in_mad); 405 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 406 in_mad->attr_mod = cpu_to_be32(index / 32); 407 408 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 409 if (err) 410 goto out; 411 412 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); 413 414 out: 415 kfree(in_mad); 416 kfree(out_mad); 417 return err; 418 } 419 420 struct mlx5_reg_node_desc { 421 u8 desc[64]; 422 }; 423 424 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 425 struct ib_device_modify *props) 426 { 427 struct mlx5_ib_dev *dev = to_mdev(ibdev); 428 struct mlx5_reg_node_desc in; 429 struct mlx5_reg_node_desc out; 430 int err; 431 432 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 433 return -EOPNOTSUPP; 434 435 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 436 return 0; 437 438 /* 439 * If possible, pass node desc to FW, so it can generate 440 * a 144 trap. If cmd fails, just ignore. 441 */ 442 memcpy(&in, props->node_desc, 64); 443 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 444 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 445 if (err) 446 return err; 447 448 memcpy(ibdev->node_desc, props->node_desc, 64); 449 450 return err; 451 } 452 453 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 454 struct ib_port_modify *props) 455 { 456 struct mlx5_ib_dev *dev = to_mdev(ibdev); 457 struct ib_port_attr attr; 458 u32 tmp; 459 int err; 460 461 mutex_lock(&dev->cap_mask_mutex); 462 463 err = mlx5_ib_query_port(ibdev, port, &attr); 464 if (err) 465 goto out; 466 467 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 468 ~props->clr_port_cap_mask; 469 470 err = mlx5_set_port_caps(dev->mdev, port, tmp); 471 472 out: 473 mutex_unlock(&dev->cap_mask_mutex); 474 return err; 475 } 476 477 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 478 struct ib_udata *udata) 479 { 480 struct mlx5_ib_dev *dev = to_mdev(ibdev); 481 struct mlx5_ib_alloc_ucontext_req_v2 req; 482 struct mlx5_ib_alloc_ucontext_resp resp; 483 struct mlx5_ib_ucontext *context; 484 struct mlx5_general_caps *gen; 485 struct mlx5_uuar_info *uuari; 486 struct mlx5_uar *uars; 487 int gross_uuars; 488 int num_uars; 489 int ver; 490 int uuarn; 491 int err; 492 int i; 493 size_t reqlen; 494 495 gen = &dev->mdev->caps.gen; 496 if (!dev->ib_active) 497 return ERR_PTR(-EAGAIN); 498 499 memset(&req, 0, sizeof(req)); 500 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 501 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 502 ver = 0; 503 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 504 ver = 2; 505 else 506 return ERR_PTR(-EINVAL); 507 508 err = ib_copy_from_udata(&req, udata, reqlen); 509 if (err) 510 return ERR_PTR(err); 511 512 if (req.flags || req.reserved) 513 return ERR_PTR(-EINVAL); 514 515 if (req.total_num_uuars > MLX5_MAX_UUARS) 516 return ERR_PTR(-ENOMEM); 517 518 if (req.total_num_uuars == 0) 519 return ERR_PTR(-EINVAL); 520 521 req.total_num_uuars = ALIGN(req.total_num_uuars, 522 MLX5_NON_FP_BF_REGS_PER_PAGE); 523 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 524 return ERR_PTR(-EINVAL); 525 526 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 527 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 528 resp.qp_tab_size = 1 << gen->log_max_qp; 529 resp.bf_reg_size = gen->bf_reg_size; 530 resp.cache_line_size = L1_CACHE_BYTES; 531 resp.max_sq_desc_sz = gen->max_sq_desc_sz; 532 resp.max_rq_desc_sz = gen->max_rq_desc_sz; 533 resp.max_send_wqebb = gen->max_wqes; 534 resp.max_recv_wr = gen->max_wqes; 535 resp.max_srq_recv_wr = gen->max_srq_wqes; 536 537 context = kzalloc(sizeof(*context), GFP_KERNEL); 538 if (!context) 539 return ERR_PTR(-ENOMEM); 540 541 uuari = &context->uuari; 542 mutex_init(&uuari->lock); 543 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 544 if (!uars) { 545 err = -ENOMEM; 546 goto out_ctx; 547 } 548 549 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 550 sizeof(*uuari->bitmap), 551 GFP_KERNEL); 552 if (!uuari->bitmap) { 553 err = -ENOMEM; 554 goto out_uar_ctx; 555 } 556 /* 557 * clear all fast path uuars 558 */ 559 for (i = 0; i < gross_uuars; i++) { 560 uuarn = i & 3; 561 if (uuarn == 2 || uuarn == 3) 562 set_bit(i, uuari->bitmap); 563 } 564 565 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 566 if (!uuari->count) { 567 err = -ENOMEM; 568 goto out_bitmap; 569 } 570 571 for (i = 0; i < num_uars; i++) { 572 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 573 if (err) 574 goto out_count; 575 } 576 577 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 578 context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; 579 #endif 580 581 INIT_LIST_HEAD(&context->db_page_list); 582 mutex_init(&context->db_page_mutex); 583 584 resp.tot_uuars = req.total_num_uuars; 585 resp.num_ports = gen->num_ports; 586 err = ib_copy_to_udata(udata, &resp, 587 sizeof(resp) - sizeof(resp.reserved)); 588 if (err) 589 goto out_uars; 590 591 uuari->ver = ver; 592 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 593 uuari->uars = uars; 594 uuari->num_uars = num_uars; 595 return &context->ibucontext; 596 597 out_uars: 598 for (i--; i >= 0; i--) 599 mlx5_cmd_free_uar(dev->mdev, uars[i].index); 600 out_count: 601 kfree(uuari->count); 602 603 out_bitmap: 604 kfree(uuari->bitmap); 605 606 out_uar_ctx: 607 kfree(uars); 608 609 out_ctx: 610 kfree(context); 611 return ERR_PTR(err); 612 } 613 614 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 615 { 616 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 617 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 618 struct mlx5_uuar_info *uuari = &context->uuari; 619 int i; 620 621 for (i = 0; i < uuari->num_uars; i++) { 622 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 623 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 624 } 625 626 kfree(uuari->count); 627 kfree(uuari->bitmap); 628 kfree(uuari->uars); 629 kfree(context); 630 631 return 0; 632 } 633 634 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 635 { 636 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 637 } 638 639 static int get_command(unsigned long offset) 640 { 641 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 642 } 643 644 static int get_arg(unsigned long offset) 645 { 646 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 647 } 648 649 static int get_index(unsigned long offset) 650 { 651 return get_arg(offset); 652 } 653 654 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 655 { 656 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 657 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 658 struct mlx5_uuar_info *uuari = &context->uuari; 659 unsigned long command; 660 unsigned long idx; 661 phys_addr_t pfn; 662 663 command = get_command(vma->vm_pgoff); 664 switch (command) { 665 case MLX5_IB_MMAP_REGULAR_PAGE: 666 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 667 return -EINVAL; 668 669 idx = get_index(vma->vm_pgoff); 670 if (idx >= uuari->num_uars) 671 return -EINVAL; 672 673 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 674 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 675 (unsigned long long)pfn); 676 677 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 678 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 679 PAGE_SIZE, vma->vm_page_prot)) 680 return -EAGAIN; 681 682 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 683 vma->vm_start, 684 (unsigned long long)pfn << PAGE_SHIFT); 685 break; 686 687 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 688 return -ENOSYS; 689 690 default: 691 return -EINVAL; 692 } 693 694 return 0; 695 } 696 697 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 698 { 699 struct mlx5_create_mkey_mbox_in *in; 700 struct mlx5_mkey_seg *seg; 701 struct mlx5_core_mr mr; 702 int err; 703 704 in = kzalloc(sizeof(*in), GFP_KERNEL); 705 if (!in) 706 return -ENOMEM; 707 708 seg = &in->seg; 709 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 710 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 711 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 712 seg->start_addr = 0; 713 714 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in), 715 NULL, NULL, NULL); 716 if (err) { 717 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 718 goto err_in; 719 } 720 721 kfree(in); 722 *key = mr.key; 723 724 return 0; 725 726 err_in: 727 kfree(in); 728 729 return err; 730 } 731 732 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 733 { 734 struct mlx5_core_mr mr; 735 int err; 736 737 memset(&mr, 0, sizeof(mr)); 738 mr.key = key; 739 err = mlx5_core_destroy_mkey(dev->mdev, &mr); 740 if (err) 741 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 742 } 743 744 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 745 struct ib_ucontext *context, 746 struct ib_udata *udata) 747 { 748 struct mlx5_ib_alloc_pd_resp resp; 749 struct mlx5_ib_pd *pd; 750 int err; 751 752 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 753 if (!pd) 754 return ERR_PTR(-ENOMEM); 755 756 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 757 if (err) { 758 kfree(pd); 759 return ERR_PTR(err); 760 } 761 762 if (context) { 763 resp.pdn = pd->pdn; 764 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 765 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 766 kfree(pd); 767 return ERR_PTR(-EFAULT); 768 } 769 } else { 770 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 771 if (err) { 772 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 773 kfree(pd); 774 return ERR_PTR(err); 775 } 776 } 777 778 return &pd->ibpd; 779 } 780 781 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 782 { 783 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 784 struct mlx5_ib_pd *mpd = to_mpd(pd); 785 786 if (!pd->uobject) 787 free_pa_mkey(mdev, mpd->pa_lkey); 788 789 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 790 kfree(mpd); 791 792 return 0; 793 } 794 795 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 796 { 797 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 798 int err; 799 800 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 801 if (err) 802 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 803 ibqp->qp_num, gid->raw); 804 805 return err; 806 } 807 808 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 809 { 810 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 811 int err; 812 813 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 814 if (err) 815 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 816 ibqp->qp_num, gid->raw); 817 818 return err; 819 } 820 821 static int init_node_data(struct mlx5_ib_dev *dev) 822 { 823 struct ib_smp *in_mad = NULL; 824 struct ib_smp *out_mad = NULL; 825 int err = -ENOMEM; 826 827 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 828 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 829 if (!in_mad || !out_mad) 830 goto out; 831 832 init_query_mad(in_mad); 833 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 834 835 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 836 if (err) 837 goto out; 838 839 memcpy(dev->ib_dev.node_desc, out_mad->data, 64); 840 841 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 842 843 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 844 if (err) 845 goto out; 846 847 dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); 848 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 849 850 out: 851 kfree(in_mad); 852 kfree(out_mad); 853 return err; 854 } 855 856 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 857 char *buf) 858 { 859 struct mlx5_ib_dev *dev = 860 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 861 862 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages); 863 } 864 865 static ssize_t show_reg_pages(struct device *device, 866 struct device_attribute *attr, char *buf) 867 { 868 struct mlx5_ib_dev *dev = 869 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 870 871 return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); 872 } 873 874 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 875 char *buf) 876 { 877 struct mlx5_ib_dev *dev = 878 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 879 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 880 } 881 882 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 883 char *buf) 884 { 885 struct mlx5_ib_dev *dev = 886 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 887 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev), 888 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 889 } 890 891 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 892 char *buf) 893 { 894 struct mlx5_ib_dev *dev = 895 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 896 return sprintf(buf, "%x\n", dev->mdev->rev_id); 897 } 898 899 static ssize_t show_board(struct device *device, struct device_attribute *attr, 900 char *buf) 901 { 902 struct mlx5_ib_dev *dev = 903 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 904 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 905 dev->mdev->board_id); 906 } 907 908 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 909 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 910 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 911 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 912 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 913 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 914 915 static struct device_attribute *mlx5_class_attributes[] = { 916 &dev_attr_hw_rev, 917 &dev_attr_fw_ver, 918 &dev_attr_hca_type, 919 &dev_attr_board_id, 920 &dev_attr_fw_pages, 921 &dev_attr_reg_pages, 922 }; 923 924 static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 925 enum mlx5_dev_event event, unsigned long param) 926 { 927 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 928 struct ib_event ibev; 929 930 u8 port = 0; 931 932 switch (event) { 933 case MLX5_DEV_EVENT_SYS_ERROR: 934 ibdev->ib_active = false; 935 ibev.event = IB_EVENT_DEVICE_FATAL; 936 break; 937 938 case MLX5_DEV_EVENT_PORT_UP: 939 ibev.event = IB_EVENT_PORT_ACTIVE; 940 port = (u8)param; 941 break; 942 943 case MLX5_DEV_EVENT_PORT_DOWN: 944 ibev.event = IB_EVENT_PORT_ERR; 945 port = (u8)param; 946 break; 947 948 case MLX5_DEV_EVENT_PORT_INITIALIZED: 949 /* not used by ULPs */ 950 return; 951 952 case MLX5_DEV_EVENT_LID_CHANGE: 953 ibev.event = IB_EVENT_LID_CHANGE; 954 port = (u8)param; 955 break; 956 957 case MLX5_DEV_EVENT_PKEY_CHANGE: 958 ibev.event = IB_EVENT_PKEY_CHANGE; 959 port = (u8)param; 960 break; 961 962 case MLX5_DEV_EVENT_GUID_CHANGE: 963 ibev.event = IB_EVENT_GID_CHANGE; 964 port = (u8)param; 965 break; 966 967 case MLX5_DEV_EVENT_CLIENT_REREG: 968 ibev.event = IB_EVENT_CLIENT_REREGISTER; 969 port = (u8)param; 970 break; 971 } 972 973 ibev.device = &ibdev->ib_dev; 974 ibev.element.port_num = port; 975 976 if (port < 1 || port > ibdev->num_ports) { 977 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 978 return; 979 } 980 981 if (ibdev->ib_active) 982 ib_dispatch_event(&ibev); 983 } 984 985 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 986 { 987 struct mlx5_general_caps *gen; 988 int port; 989 990 gen = &dev->mdev->caps.gen; 991 for (port = 1; port <= gen->num_ports; port++) 992 mlx5_query_ext_port_caps(dev, port); 993 } 994 995 static int get_port_caps(struct mlx5_ib_dev *dev) 996 { 997 struct ib_device_attr *dprops = NULL; 998 struct ib_port_attr *pprops = NULL; 999 struct mlx5_general_caps *gen; 1000 int err = 0; 1001 int port; 1002 1003 gen = &dev->mdev->caps.gen; 1004 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 1005 if (!pprops) 1006 goto out; 1007 1008 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 1009 if (!dprops) 1010 goto out; 1011 1012 err = mlx5_ib_query_device(&dev->ib_dev, dprops); 1013 if (err) { 1014 mlx5_ib_warn(dev, "query_device failed %d\n", err); 1015 goto out; 1016 } 1017 1018 for (port = 1; port <= gen->num_ports; port++) { 1019 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 1020 if (err) { 1021 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err); 1022 break; 1023 } 1024 gen->port[port - 1].pkey_table_len = dprops->max_pkeys; 1025 gen->port[port - 1].gid_table_len = pprops->gid_tbl_len; 1026 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 1027 dprops->max_pkeys, pprops->gid_tbl_len); 1028 } 1029 1030 out: 1031 kfree(pprops); 1032 kfree(dprops); 1033 1034 return err; 1035 } 1036 1037 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 1038 { 1039 int err; 1040 1041 err = mlx5_mr_cache_cleanup(dev); 1042 if (err) 1043 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 1044 1045 mlx5_ib_destroy_qp(dev->umrc.qp); 1046 ib_destroy_cq(dev->umrc.cq); 1047 ib_dereg_mr(dev->umrc.mr); 1048 ib_dealloc_pd(dev->umrc.pd); 1049 } 1050 1051 enum { 1052 MAX_UMR_WR = 128, 1053 }; 1054 1055 static int create_umr_res(struct mlx5_ib_dev *dev) 1056 { 1057 struct ib_qp_init_attr *init_attr = NULL; 1058 struct ib_qp_attr *attr = NULL; 1059 struct ib_pd *pd; 1060 struct ib_cq *cq; 1061 struct ib_qp *qp; 1062 struct ib_mr *mr; 1063 int ret; 1064 1065 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 1066 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 1067 if (!attr || !init_attr) { 1068 ret = -ENOMEM; 1069 goto error_0; 1070 } 1071 1072 pd = ib_alloc_pd(&dev->ib_dev); 1073 if (IS_ERR(pd)) { 1074 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 1075 ret = PTR_ERR(pd); 1076 goto error_0; 1077 } 1078 1079 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); 1080 if (IS_ERR(mr)) { 1081 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); 1082 ret = PTR_ERR(mr); 1083 goto error_1; 1084 } 1085 1086 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128, 1087 0); 1088 if (IS_ERR(cq)) { 1089 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 1090 ret = PTR_ERR(cq); 1091 goto error_2; 1092 } 1093 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1094 1095 init_attr->send_cq = cq; 1096 init_attr->recv_cq = cq; 1097 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1098 init_attr->cap.max_send_wr = MAX_UMR_WR; 1099 init_attr->cap.max_send_sge = 1; 1100 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1101 init_attr->port_num = 1; 1102 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1103 if (IS_ERR(qp)) { 1104 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1105 ret = PTR_ERR(qp); 1106 goto error_3; 1107 } 1108 qp->device = &dev->ib_dev; 1109 qp->real_qp = qp; 1110 qp->uobject = NULL; 1111 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1112 1113 attr->qp_state = IB_QPS_INIT; 1114 attr->port_num = 1; 1115 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1116 IB_QP_PORT, NULL); 1117 if (ret) { 1118 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1119 goto error_4; 1120 } 1121 1122 memset(attr, 0, sizeof(*attr)); 1123 attr->qp_state = IB_QPS_RTR; 1124 attr->path_mtu = IB_MTU_256; 1125 1126 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1127 if (ret) { 1128 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1129 goto error_4; 1130 } 1131 1132 memset(attr, 0, sizeof(*attr)); 1133 attr->qp_state = IB_QPS_RTS; 1134 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1135 if (ret) { 1136 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1137 goto error_4; 1138 } 1139 1140 dev->umrc.qp = qp; 1141 dev->umrc.cq = cq; 1142 dev->umrc.mr = mr; 1143 dev->umrc.pd = pd; 1144 1145 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1146 ret = mlx5_mr_cache_init(dev); 1147 if (ret) { 1148 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1149 goto error_4; 1150 } 1151 1152 kfree(attr); 1153 kfree(init_attr); 1154 1155 return 0; 1156 1157 error_4: 1158 mlx5_ib_destroy_qp(qp); 1159 1160 error_3: 1161 ib_destroy_cq(cq); 1162 1163 error_2: 1164 ib_dereg_mr(mr); 1165 1166 error_1: 1167 ib_dealloc_pd(pd); 1168 1169 error_0: 1170 kfree(attr); 1171 kfree(init_attr); 1172 return ret; 1173 } 1174 1175 static int create_dev_resources(struct mlx5_ib_resources *devr) 1176 { 1177 struct ib_srq_init_attr attr; 1178 struct mlx5_ib_dev *dev; 1179 int ret = 0; 1180 1181 dev = container_of(devr, struct mlx5_ib_dev, devr); 1182 1183 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1184 if (IS_ERR(devr->p0)) { 1185 ret = PTR_ERR(devr->p0); 1186 goto error0; 1187 } 1188 devr->p0->device = &dev->ib_dev; 1189 devr->p0->uobject = NULL; 1190 atomic_set(&devr->p0->usecnt, 0); 1191 1192 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL); 1193 if (IS_ERR(devr->c0)) { 1194 ret = PTR_ERR(devr->c0); 1195 goto error1; 1196 } 1197 devr->c0->device = &dev->ib_dev; 1198 devr->c0->uobject = NULL; 1199 devr->c0->comp_handler = NULL; 1200 devr->c0->event_handler = NULL; 1201 devr->c0->cq_context = NULL; 1202 atomic_set(&devr->c0->usecnt, 0); 1203 1204 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1205 if (IS_ERR(devr->x0)) { 1206 ret = PTR_ERR(devr->x0); 1207 goto error2; 1208 } 1209 devr->x0->device = &dev->ib_dev; 1210 devr->x0->inode = NULL; 1211 atomic_set(&devr->x0->usecnt, 0); 1212 mutex_init(&devr->x0->tgt_qp_mutex); 1213 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1214 1215 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1216 if (IS_ERR(devr->x1)) { 1217 ret = PTR_ERR(devr->x1); 1218 goto error3; 1219 } 1220 devr->x1->device = &dev->ib_dev; 1221 devr->x1->inode = NULL; 1222 atomic_set(&devr->x1->usecnt, 0); 1223 mutex_init(&devr->x1->tgt_qp_mutex); 1224 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1225 1226 memset(&attr, 0, sizeof(attr)); 1227 attr.attr.max_sge = 1; 1228 attr.attr.max_wr = 1; 1229 attr.srq_type = IB_SRQT_XRC; 1230 attr.ext.xrc.cq = devr->c0; 1231 attr.ext.xrc.xrcd = devr->x0; 1232 1233 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1234 if (IS_ERR(devr->s0)) { 1235 ret = PTR_ERR(devr->s0); 1236 goto error4; 1237 } 1238 devr->s0->device = &dev->ib_dev; 1239 devr->s0->pd = devr->p0; 1240 devr->s0->uobject = NULL; 1241 devr->s0->event_handler = NULL; 1242 devr->s0->srq_context = NULL; 1243 devr->s0->srq_type = IB_SRQT_XRC; 1244 devr->s0->ext.xrc.xrcd = devr->x0; 1245 devr->s0->ext.xrc.cq = devr->c0; 1246 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1247 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1248 atomic_inc(&devr->p0->usecnt); 1249 atomic_set(&devr->s0->usecnt, 0); 1250 1251 return 0; 1252 1253 error4: 1254 mlx5_ib_dealloc_xrcd(devr->x1); 1255 error3: 1256 mlx5_ib_dealloc_xrcd(devr->x0); 1257 error2: 1258 mlx5_ib_destroy_cq(devr->c0); 1259 error1: 1260 mlx5_ib_dealloc_pd(devr->p0); 1261 error0: 1262 return ret; 1263 } 1264 1265 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1266 { 1267 mlx5_ib_destroy_srq(devr->s0); 1268 mlx5_ib_dealloc_xrcd(devr->x0); 1269 mlx5_ib_dealloc_xrcd(devr->x1); 1270 mlx5_ib_destroy_cq(devr->c0); 1271 mlx5_ib_dealloc_pd(devr->p0); 1272 } 1273 1274 static void *mlx5_ib_add(struct mlx5_core_dev *mdev) 1275 { 1276 struct mlx5_ib_dev *dev; 1277 int err; 1278 int i; 1279 1280 printk_once(KERN_INFO "%s", mlx5_version); 1281 1282 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1283 if (!dev) 1284 return NULL; 1285 1286 dev->mdev = mdev; 1287 1288 err = get_port_caps(dev); 1289 if (err) 1290 goto err_dealloc; 1291 1292 get_ext_port_caps(dev); 1293 1294 err = alloc_comp_eqs(dev); 1295 if (err) 1296 goto err_dealloc; 1297 1298 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1299 1300 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1301 dev->ib_dev.owner = THIS_MODULE; 1302 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1303 dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey; 1304 dev->num_ports = mdev->caps.gen.num_ports; 1305 dev->ib_dev.phys_port_cnt = dev->num_ports; 1306 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors; 1307 dev->ib_dev.dma_device = &mdev->pdev->dev; 1308 1309 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1310 dev->ib_dev.uverbs_cmd_mask = 1311 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1312 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1313 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1314 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1315 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1316 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1317 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1318 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1319 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1320 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1321 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1322 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1323 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1324 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1325 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1326 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1327 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1328 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1329 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1330 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1331 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1332 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1333 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1334 dev->ib_dev.uverbs_ex_cmd_mask = 1335 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE); 1336 1337 dev->ib_dev.query_device = mlx5_ib_query_device; 1338 dev->ib_dev.query_port = mlx5_ib_query_port; 1339 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1340 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1341 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1342 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1343 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1344 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1345 dev->ib_dev.mmap = mlx5_ib_mmap; 1346 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1347 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1348 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1349 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1350 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1351 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1352 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1353 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1354 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1355 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1356 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1357 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1358 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1359 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1360 dev->ib_dev.post_send = mlx5_ib_post_send; 1361 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1362 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1363 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1364 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1365 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1366 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1367 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1368 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1369 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1370 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1371 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr; 1372 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1373 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1374 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1375 dev->ib_dev.create_mr = mlx5_ib_create_mr; 1376 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; 1377 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1378 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1379 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 1380 1381 mlx5_ib_internal_query_odp_caps(dev); 1382 1383 if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) { 1384 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1385 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1386 dev->ib_dev.uverbs_cmd_mask |= 1387 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1388 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1389 } 1390 1391 err = init_node_data(dev); 1392 if (err) 1393 goto err_eqs; 1394 1395 mutex_init(&dev->cap_mask_mutex); 1396 1397 err = create_dev_resources(&dev->devr); 1398 if (err) 1399 goto err_eqs; 1400 1401 err = mlx5_ib_odp_init_one(dev); 1402 if (err) 1403 goto err_rsrc; 1404 1405 err = ib_register_device(&dev->ib_dev, NULL); 1406 if (err) 1407 goto err_odp; 1408 1409 err = create_umr_res(dev); 1410 if (err) 1411 goto err_dev; 1412 1413 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1414 err = device_create_file(&dev->ib_dev.dev, 1415 mlx5_class_attributes[i]); 1416 if (err) 1417 goto err_umrc; 1418 } 1419 1420 dev->ib_active = true; 1421 1422 return dev; 1423 1424 err_umrc: 1425 destroy_umrc_res(dev); 1426 1427 err_dev: 1428 ib_unregister_device(&dev->ib_dev); 1429 1430 err_odp: 1431 mlx5_ib_odp_remove_one(dev); 1432 1433 err_rsrc: 1434 destroy_dev_resources(&dev->devr); 1435 1436 err_eqs: 1437 free_comp_eqs(dev); 1438 1439 err_dealloc: 1440 ib_dealloc_device((struct ib_device *)dev); 1441 1442 return NULL; 1443 } 1444 1445 static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 1446 { 1447 struct mlx5_ib_dev *dev = context; 1448 1449 ib_unregister_device(&dev->ib_dev); 1450 destroy_umrc_res(dev); 1451 mlx5_ib_odp_remove_one(dev); 1452 destroy_dev_resources(&dev->devr); 1453 free_comp_eqs(dev); 1454 ib_dealloc_device(&dev->ib_dev); 1455 } 1456 1457 static struct mlx5_interface mlx5_ib_interface = { 1458 .add = mlx5_ib_add, 1459 .remove = mlx5_ib_remove, 1460 .event = mlx5_ib_event, 1461 }; 1462 1463 static int __init mlx5_ib_init(void) 1464 { 1465 int err; 1466 1467 if (deprecated_prof_sel != 2) 1468 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); 1469 1470 err = mlx5_ib_odp_init(); 1471 if (err) 1472 return err; 1473 1474 err = mlx5_register_interface(&mlx5_ib_interface); 1475 if (err) 1476 goto clean_odp; 1477 1478 return err; 1479 1480 clean_odp: 1481 mlx5_ib_odp_cleanup(); 1482 return err; 1483 } 1484 1485 static void __exit mlx5_ib_cleanup(void) 1486 { 1487 mlx5_unregister_interface(&mlx5_ib_interface); 1488 mlx5_ib_odp_cleanup(); 1489 } 1490 1491 module_init(mlx5_ib_init); 1492 module_exit(mlx5_ib_cleanup); 1493