1 /* 2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <rdma/ib_smi.h> 44 #include <rdma/ib_umem.h> 45 #include "user.h" 46 #include "mlx5_ib.h" 47 48 #define DRIVER_NAME "mlx5_ib" 49 #define DRIVER_VERSION "2.2-1" 50 #define DRIVER_RELDATE "Feb 2014" 51 52 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 53 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 54 MODULE_LICENSE("Dual BSD/GPL"); 55 MODULE_VERSION(DRIVER_VERSION); 56 57 static int deprecated_prof_sel = 2; 58 module_param_named(prof_sel, deprecated_prof_sel, int, 0444); 59 MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); 60 61 static char mlx5_version[] = 62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 64 65 int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn) 66 { 67 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table; 68 struct mlx5_eq *eq, *n; 69 int err = -ENOENT; 70 71 spin_lock(&table->lock); 72 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 73 if (eq->index == vector) { 74 *eqn = eq->eqn; 75 *irqn = eq->irqn; 76 err = 0; 77 break; 78 } 79 } 80 spin_unlock(&table->lock); 81 82 return err; 83 } 84 85 static int alloc_comp_eqs(struct mlx5_ib_dev *dev) 86 { 87 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table; 88 char name[MLX5_MAX_EQ_NAME]; 89 struct mlx5_eq *eq, *n; 90 int ncomp_vec; 91 int nent; 92 int err; 93 int i; 94 95 INIT_LIST_HEAD(&dev->eqs_list); 96 ncomp_vec = table->num_comp_vectors; 97 nent = MLX5_COMP_EQ_SIZE; 98 for (i = 0; i < ncomp_vec; i++) { 99 eq = kzalloc(sizeof(*eq), GFP_KERNEL); 100 if (!eq) { 101 err = -ENOMEM; 102 goto clean; 103 } 104 105 snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i); 106 err = mlx5_create_map_eq(dev->mdev, eq, 107 i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 108 name, &dev->mdev->priv.uuari.uars[0]); 109 if (err) { 110 kfree(eq); 111 goto clean; 112 } 113 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 114 eq->index = i; 115 spin_lock(&table->lock); 116 list_add_tail(&eq->list, &dev->eqs_list); 117 spin_unlock(&table->lock); 118 } 119 120 dev->num_comp_vectors = ncomp_vec; 121 return 0; 122 123 clean: 124 spin_lock(&table->lock); 125 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 126 list_del(&eq->list); 127 spin_unlock(&table->lock); 128 if (mlx5_destroy_unmap_eq(dev->mdev, eq)) 129 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 130 kfree(eq); 131 spin_lock(&table->lock); 132 } 133 spin_unlock(&table->lock); 134 return err; 135 } 136 137 static void free_comp_eqs(struct mlx5_ib_dev *dev) 138 { 139 struct mlx5_eq_table *table = &dev->mdev->priv.eq_table; 140 struct mlx5_eq *eq, *n; 141 142 spin_lock(&table->lock); 143 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) { 144 list_del(&eq->list); 145 spin_unlock(&table->lock); 146 if (mlx5_destroy_unmap_eq(dev->mdev, eq)) 147 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn); 148 kfree(eq); 149 spin_lock(&table->lock); 150 } 151 spin_unlock(&table->lock); 152 } 153 154 static int mlx5_ib_query_device(struct ib_device *ibdev, 155 struct ib_device_attr *props) 156 { 157 struct mlx5_ib_dev *dev = to_mdev(ibdev); 158 struct ib_smp *in_mad = NULL; 159 struct ib_smp *out_mad = NULL; 160 int err = -ENOMEM; 161 int max_rq_sg; 162 int max_sq_sg; 163 u64 flags; 164 165 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 166 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 167 if (!in_mad || !out_mad) 168 goto out; 169 170 init_query_mad(in_mad); 171 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 172 173 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); 174 if (err) 175 goto out; 176 177 memset(props, 0, sizeof(*props)); 178 179 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 180 (fw_rev_min(dev->mdev) << 16) | 181 fw_rev_sub(dev->mdev); 182 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 183 IB_DEVICE_PORT_ACTIVE_EVENT | 184 IB_DEVICE_SYS_IMAGE_GUID | 185 IB_DEVICE_RC_RNR_NAK_GEN; 186 flags = dev->mdev->caps.flags; 187 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR) 188 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 189 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR) 190 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 191 if (flags & MLX5_DEV_CAP_FLAG_APM) 192 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 193 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 194 if (flags & MLX5_DEV_CAP_FLAG_XRC) 195 props->device_cap_flags |= IB_DEVICE_XRC; 196 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 197 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) { 198 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 199 /* At this stage no support for signature handover */ 200 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 201 IB_PROT_T10DIF_TYPE_2 | 202 IB_PROT_T10DIF_TYPE_3; 203 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 204 IB_GUARD_T10DIF_CSUM; 205 } 206 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST) 207 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 208 209 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 210 0xffffff; 211 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); 212 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); 213 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 214 215 props->max_mr_size = ~0ull; 216 props->page_size_cap = dev->mdev->caps.min_page_sz; 217 props->max_qp = 1 << dev->mdev->caps.log_max_qp; 218 props->max_qp_wr = dev->mdev->caps.max_wqes; 219 max_rq_sg = dev->mdev->caps.max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg); 220 max_sq_sg = (dev->mdev->caps.max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) / 221 sizeof(struct mlx5_wqe_data_seg); 222 props->max_sge = min(max_rq_sg, max_sq_sg); 223 props->max_cq = 1 << dev->mdev->caps.log_max_cq; 224 props->max_cqe = dev->mdev->caps.max_cqes - 1; 225 props->max_mr = 1 << dev->mdev->caps.log_max_mkey; 226 props->max_pd = 1 << dev->mdev->caps.log_max_pd; 227 props->max_qp_rd_atom = dev->mdev->caps.max_ra_req_qp; 228 props->max_qp_init_rd_atom = dev->mdev->caps.max_ra_res_qp; 229 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 230 props->max_srq = 1 << dev->mdev->caps.log_max_srq; 231 props->max_srq_wr = dev->mdev->caps.max_srq_wqes - 1; 232 props->max_srq_sge = max_rq_sg - 1; 233 props->max_fast_reg_page_list_len = (unsigned int)-1; 234 props->local_ca_ack_delay = dev->mdev->caps.local_ca_ack_delay; 235 props->atomic_cap = IB_ATOMIC_NONE; 236 props->masked_atomic_cap = IB_ATOMIC_NONE; 237 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); 238 props->max_mcast_grp = 1 << dev->mdev->caps.log_max_mcg; 239 props->max_mcast_qp_attach = dev->mdev->caps.max_qp_mcg; 240 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 241 props->max_mcast_grp; 242 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 243 244 out: 245 kfree(in_mad); 246 kfree(out_mad); 247 248 return err; 249 } 250 251 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 252 struct ib_port_attr *props) 253 { 254 struct mlx5_ib_dev *dev = to_mdev(ibdev); 255 struct ib_smp *in_mad = NULL; 256 struct ib_smp *out_mad = NULL; 257 int ext_active_speed; 258 int err = -ENOMEM; 259 260 if (port < 1 || port > dev->mdev->caps.num_ports) { 261 mlx5_ib_warn(dev, "invalid port number %d\n", port); 262 return -EINVAL; 263 } 264 265 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 266 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 267 if (!in_mad || !out_mad) 268 goto out; 269 270 memset(props, 0, sizeof(*props)); 271 272 init_query_mad(in_mad); 273 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 274 in_mad->attr_mod = cpu_to_be32(port); 275 276 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); 277 if (err) { 278 mlx5_ib_warn(dev, "err %d\n", err); 279 goto out; 280 } 281 282 283 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); 284 props->lmc = out_mad->data[34] & 0x7; 285 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); 286 props->sm_sl = out_mad->data[36] & 0xf; 287 props->state = out_mad->data[32] & 0xf; 288 props->phys_state = out_mad->data[33] >> 4; 289 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); 290 props->gid_tbl_len = out_mad->data[50]; 291 props->max_msg_sz = 1 << to_mdev(ibdev)->mdev->caps.log_max_msg; 292 props->pkey_tbl_len = to_mdev(ibdev)->mdev->caps.port[port - 1].pkey_table_len; 293 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); 294 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); 295 props->active_width = out_mad->data[31] & 0xf; 296 props->active_speed = out_mad->data[35] >> 4; 297 props->max_mtu = out_mad->data[41] & 0xf; 298 props->active_mtu = out_mad->data[36] >> 4; 299 props->subnet_timeout = out_mad->data[51] & 0x1f; 300 props->max_vl_num = out_mad->data[37] >> 4; 301 props->init_type_reply = out_mad->data[41] >> 4; 302 303 /* Check if extended speeds (EDR/FDR/...) are supported */ 304 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 305 ext_active_speed = out_mad->data[62] >> 4; 306 307 switch (ext_active_speed) { 308 case 1: 309 props->active_speed = 16; /* FDR */ 310 break; 311 case 2: 312 props->active_speed = 32; /* EDR */ 313 break; 314 } 315 } 316 317 /* If reported active speed is QDR, check if is FDR-10 */ 318 if (props->active_speed == 4) { 319 if (dev->mdev->caps.ext_port_cap[port - 1] & 320 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { 321 init_query_mad(in_mad); 322 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; 323 in_mad->attr_mod = cpu_to_be32(port); 324 325 err = mlx5_MAD_IFC(dev, 1, 1, port, 326 NULL, NULL, in_mad, out_mad); 327 if (err) 328 goto out; 329 330 /* Checking LinkSpeedActive for FDR-10 */ 331 if (out_mad->data[15] & 0x1) 332 props->active_speed = 8; 333 } 334 } 335 336 out: 337 kfree(in_mad); 338 kfree(out_mad); 339 340 return err; 341 } 342 343 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 344 union ib_gid *gid) 345 { 346 struct ib_smp *in_mad = NULL; 347 struct ib_smp *out_mad = NULL; 348 int err = -ENOMEM; 349 350 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 351 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 352 if (!in_mad || !out_mad) 353 goto out; 354 355 init_query_mad(in_mad); 356 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 357 in_mad->attr_mod = cpu_to_be32(port); 358 359 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 360 if (err) 361 goto out; 362 363 memcpy(gid->raw, out_mad->data + 8, 8); 364 365 init_query_mad(in_mad); 366 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 367 in_mad->attr_mod = cpu_to_be32(index / 8); 368 369 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 370 if (err) 371 goto out; 372 373 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 374 375 out: 376 kfree(in_mad); 377 kfree(out_mad); 378 return err; 379 } 380 381 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 382 u16 *pkey) 383 { 384 struct ib_smp *in_mad = NULL; 385 struct ib_smp *out_mad = NULL; 386 int err = -ENOMEM; 387 388 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 389 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 390 if (!in_mad || !out_mad) 391 goto out; 392 393 init_query_mad(in_mad); 394 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 395 in_mad->attr_mod = cpu_to_be32(index / 32); 396 397 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 398 if (err) 399 goto out; 400 401 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); 402 403 out: 404 kfree(in_mad); 405 kfree(out_mad); 406 return err; 407 } 408 409 struct mlx5_reg_node_desc { 410 u8 desc[64]; 411 }; 412 413 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 414 struct ib_device_modify *props) 415 { 416 struct mlx5_ib_dev *dev = to_mdev(ibdev); 417 struct mlx5_reg_node_desc in; 418 struct mlx5_reg_node_desc out; 419 int err; 420 421 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 422 return -EOPNOTSUPP; 423 424 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 425 return 0; 426 427 /* 428 * If possible, pass node desc to FW, so it can generate 429 * a 144 trap. If cmd fails, just ignore. 430 */ 431 memcpy(&in, props->node_desc, 64); 432 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 433 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 434 if (err) 435 return err; 436 437 memcpy(ibdev->node_desc, props->node_desc, 64); 438 439 return err; 440 } 441 442 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 443 struct ib_port_modify *props) 444 { 445 struct mlx5_ib_dev *dev = to_mdev(ibdev); 446 struct ib_port_attr attr; 447 u32 tmp; 448 int err; 449 450 mutex_lock(&dev->cap_mask_mutex); 451 452 err = mlx5_ib_query_port(ibdev, port, &attr); 453 if (err) 454 goto out; 455 456 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 457 ~props->clr_port_cap_mask; 458 459 err = mlx5_set_port_caps(dev->mdev, port, tmp); 460 461 out: 462 mutex_unlock(&dev->cap_mask_mutex); 463 return err; 464 } 465 466 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 467 struct ib_udata *udata) 468 { 469 struct mlx5_ib_dev *dev = to_mdev(ibdev); 470 struct mlx5_ib_alloc_ucontext_req_v2 req; 471 struct mlx5_ib_alloc_ucontext_resp resp; 472 struct mlx5_ib_ucontext *context; 473 struct mlx5_uuar_info *uuari; 474 struct mlx5_uar *uars; 475 int gross_uuars; 476 int num_uars; 477 int ver; 478 int uuarn; 479 int err; 480 int i; 481 size_t reqlen; 482 483 if (!dev->ib_active) 484 return ERR_PTR(-EAGAIN); 485 486 memset(&req, 0, sizeof(req)); 487 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 488 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 489 ver = 0; 490 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 491 ver = 2; 492 else 493 return ERR_PTR(-EINVAL); 494 495 err = ib_copy_from_udata(&req, udata, reqlen); 496 if (err) 497 return ERR_PTR(err); 498 499 if (req.flags || req.reserved) 500 return ERR_PTR(-EINVAL); 501 502 if (req.total_num_uuars > MLX5_MAX_UUARS) 503 return ERR_PTR(-ENOMEM); 504 505 if (req.total_num_uuars == 0) 506 return ERR_PTR(-EINVAL); 507 508 req.total_num_uuars = ALIGN(req.total_num_uuars, 509 MLX5_NON_FP_BF_REGS_PER_PAGE); 510 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 511 return ERR_PTR(-EINVAL); 512 513 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 514 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 515 resp.qp_tab_size = 1 << dev->mdev->caps.log_max_qp; 516 resp.bf_reg_size = dev->mdev->caps.bf_reg_size; 517 resp.cache_line_size = L1_CACHE_BYTES; 518 resp.max_sq_desc_sz = dev->mdev->caps.max_sq_desc_sz; 519 resp.max_rq_desc_sz = dev->mdev->caps.max_rq_desc_sz; 520 resp.max_send_wqebb = dev->mdev->caps.max_wqes; 521 resp.max_recv_wr = dev->mdev->caps.max_wqes; 522 resp.max_srq_recv_wr = dev->mdev->caps.max_srq_wqes; 523 524 context = kzalloc(sizeof(*context), GFP_KERNEL); 525 if (!context) 526 return ERR_PTR(-ENOMEM); 527 528 uuari = &context->uuari; 529 mutex_init(&uuari->lock); 530 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 531 if (!uars) { 532 err = -ENOMEM; 533 goto out_ctx; 534 } 535 536 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 537 sizeof(*uuari->bitmap), 538 GFP_KERNEL); 539 if (!uuari->bitmap) { 540 err = -ENOMEM; 541 goto out_uar_ctx; 542 } 543 /* 544 * clear all fast path uuars 545 */ 546 for (i = 0; i < gross_uuars; i++) { 547 uuarn = i & 3; 548 if (uuarn == 2 || uuarn == 3) 549 set_bit(i, uuari->bitmap); 550 } 551 552 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 553 if (!uuari->count) { 554 err = -ENOMEM; 555 goto out_bitmap; 556 } 557 558 for (i = 0; i < num_uars; i++) { 559 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 560 if (err) 561 goto out_count; 562 } 563 564 INIT_LIST_HEAD(&context->db_page_list); 565 mutex_init(&context->db_page_mutex); 566 567 resp.tot_uuars = req.total_num_uuars; 568 resp.num_ports = dev->mdev->caps.num_ports; 569 err = ib_copy_to_udata(udata, &resp, 570 sizeof(resp) - sizeof(resp.reserved)); 571 if (err) 572 goto out_uars; 573 574 uuari->ver = ver; 575 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 576 uuari->uars = uars; 577 uuari->num_uars = num_uars; 578 return &context->ibucontext; 579 580 out_uars: 581 for (i--; i >= 0; i--) 582 mlx5_cmd_free_uar(dev->mdev, uars[i].index); 583 out_count: 584 kfree(uuari->count); 585 586 out_bitmap: 587 kfree(uuari->bitmap); 588 589 out_uar_ctx: 590 kfree(uars); 591 592 out_ctx: 593 kfree(context); 594 return ERR_PTR(err); 595 } 596 597 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 598 { 599 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 600 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 601 struct mlx5_uuar_info *uuari = &context->uuari; 602 int i; 603 604 for (i = 0; i < uuari->num_uars; i++) { 605 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 606 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 607 } 608 609 kfree(uuari->count); 610 kfree(uuari->bitmap); 611 kfree(uuari->uars); 612 kfree(context); 613 614 return 0; 615 } 616 617 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 618 { 619 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 620 } 621 622 static int get_command(unsigned long offset) 623 { 624 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 625 } 626 627 static int get_arg(unsigned long offset) 628 { 629 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 630 } 631 632 static int get_index(unsigned long offset) 633 { 634 return get_arg(offset); 635 } 636 637 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 638 { 639 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 640 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 641 struct mlx5_uuar_info *uuari = &context->uuari; 642 unsigned long command; 643 unsigned long idx; 644 phys_addr_t pfn; 645 646 command = get_command(vma->vm_pgoff); 647 switch (command) { 648 case MLX5_IB_MMAP_REGULAR_PAGE: 649 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 650 return -EINVAL; 651 652 idx = get_index(vma->vm_pgoff); 653 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 654 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 655 (unsigned long long)pfn); 656 657 if (idx >= uuari->num_uars) 658 return -EINVAL; 659 660 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 661 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 662 PAGE_SIZE, vma->vm_page_prot)) 663 return -EAGAIN; 664 665 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 666 vma->vm_start, 667 (unsigned long long)pfn << PAGE_SHIFT); 668 break; 669 670 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 671 return -ENOSYS; 672 673 default: 674 return -EINVAL; 675 } 676 677 return 0; 678 } 679 680 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 681 { 682 struct mlx5_create_mkey_mbox_in *in; 683 struct mlx5_mkey_seg *seg; 684 struct mlx5_core_mr mr; 685 int err; 686 687 in = kzalloc(sizeof(*in), GFP_KERNEL); 688 if (!in) 689 return -ENOMEM; 690 691 seg = &in->seg; 692 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 693 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 694 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 695 seg->start_addr = 0; 696 697 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in), 698 NULL, NULL, NULL); 699 if (err) { 700 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 701 goto err_in; 702 } 703 704 kfree(in); 705 *key = mr.key; 706 707 return 0; 708 709 err_in: 710 kfree(in); 711 712 return err; 713 } 714 715 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 716 { 717 struct mlx5_core_mr mr; 718 int err; 719 720 memset(&mr, 0, sizeof(mr)); 721 mr.key = key; 722 err = mlx5_core_destroy_mkey(dev->mdev, &mr); 723 if (err) 724 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 725 } 726 727 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 728 struct ib_ucontext *context, 729 struct ib_udata *udata) 730 { 731 struct mlx5_ib_alloc_pd_resp resp; 732 struct mlx5_ib_pd *pd; 733 int err; 734 735 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 736 if (!pd) 737 return ERR_PTR(-ENOMEM); 738 739 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 740 if (err) { 741 kfree(pd); 742 return ERR_PTR(err); 743 } 744 745 if (context) { 746 resp.pdn = pd->pdn; 747 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 748 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 749 kfree(pd); 750 return ERR_PTR(-EFAULT); 751 } 752 } else { 753 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 754 if (err) { 755 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 756 kfree(pd); 757 return ERR_PTR(err); 758 } 759 } 760 761 return &pd->ibpd; 762 } 763 764 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 765 { 766 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 767 struct mlx5_ib_pd *mpd = to_mpd(pd); 768 769 if (!pd->uobject) 770 free_pa_mkey(mdev, mpd->pa_lkey); 771 772 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 773 kfree(mpd); 774 775 return 0; 776 } 777 778 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 779 { 780 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 781 int err; 782 783 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 784 if (err) 785 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 786 ibqp->qp_num, gid->raw); 787 788 return err; 789 } 790 791 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 792 { 793 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 794 int err; 795 796 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 797 if (err) 798 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 799 ibqp->qp_num, gid->raw); 800 801 return err; 802 } 803 804 static int init_node_data(struct mlx5_ib_dev *dev) 805 { 806 struct ib_smp *in_mad = NULL; 807 struct ib_smp *out_mad = NULL; 808 int err = -ENOMEM; 809 810 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 811 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 812 if (!in_mad || !out_mad) 813 goto out; 814 815 init_query_mad(in_mad); 816 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 817 818 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 819 if (err) 820 goto out; 821 822 memcpy(dev->ib_dev.node_desc, out_mad->data, 64); 823 824 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 825 826 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 827 if (err) 828 goto out; 829 830 dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); 831 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 832 833 out: 834 kfree(in_mad); 835 kfree(out_mad); 836 return err; 837 } 838 839 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 840 char *buf) 841 { 842 struct mlx5_ib_dev *dev = 843 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 844 845 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages); 846 } 847 848 static ssize_t show_reg_pages(struct device *device, 849 struct device_attribute *attr, char *buf) 850 { 851 struct mlx5_ib_dev *dev = 852 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 853 854 return sprintf(buf, "%d\n", dev->mdev->priv.reg_pages); 855 } 856 857 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 858 char *buf) 859 { 860 struct mlx5_ib_dev *dev = 861 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 862 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 863 } 864 865 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 866 char *buf) 867 { 868 struct mlx5_ib_dev *dev = 869 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 870 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev), 871 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 872 } 873 874 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 875 char *buf) 876 { 877 struct mlx5_ib_dev *dev = 878 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 879 return sprintf(buf, "%x\n", dev->mdev->rev_id); 880 } 881 882 static ssize_t show_board(struct device *device, struct device_attribute *attr, 883 char *buf) 884 { 885 struct mlx5_ib_dev *dev = 886 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 887 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 888 dev->mdev->board_id); 889 } 890 891 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 892 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 893 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 894 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 895 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 896 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 897 898 static struct device_attribute *mlx5_class_attributes[] = { 899 &dev_attr_hw_rev, 900 &dev_attr_fw_ver, 901 &dev_attr_hca_type, 902 &dev_attr_board_id, 903 &dev_attr_fw_pages, 904 &dev_attr_reg_pages, 905 }; 906 907 static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 908 enum mlx5_dev_event event, unsigned long param) 909 { 910 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 911 struct ib_event ibev; 912 913 u8 port = 0; 914 915 switch (event) { 916 case MLX5_DEV_EVENT_SYS_ERROR: 917 ibdev->ib_active = false; 918 ibev.event = IB_EVENT_DEVICE_FATAL; 919 break; 920 921 case MLX5_DEV_EVENT_PORT_UP: 922 ibev.event = IB_EVENT_PORT_ACTIVE; 923 port = (u8)param; 924 break; 925 926 case MLX5_DEV_EVENT_PORT_DOWN: 927 ibev.event = IB_EVENT_PORT_ERR; 928 port = (u8)param; 929 break; 930 931 case MLX5_DEV_EVENT_PORT_INITIALIZED: 932 /* not used by ULPs */ 933 return; 934 935 case MLX5_DEV_EVENT_LID_CHANGE: 936 ibev.event = IB_EVENT_LID_CHANGE; 937 port = (u8)param; 938 break; 939 940 case MLX5_DEV_EVENT_PKEY_CHANGE: 941 ibev.event = IB_EVENT_PKEY_CHANGE; 942 port = (u8)param; 943 break; 944 945 case MLX5_DEV_EVENT_GUID_CHANGE: 946 ibev.event = IB_EVENT_GID_CHANGE; 947 port = (u8)param; 948 break; 949 950 case MLX5_DEV_EVENT_CLIENT_REREG: 951 ibev.event = IB_EVENT_CLIENT_REREGISTER; 952 port = (u8)param; 953 break; 954 } 955 956 ibev.device = &ibdev->ib_dev; 957 ibev.element.port_num = port; 958 959 if (port < 1 || port > ibdev->num_ports) { 960 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 961 return; 962 } 963 964 if (ibdev->ib_active) 965 ib_dispatch_event(&ibev); 966 } 967 968 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 969 { 970 int port; 971 972 for (port = 1; port <= dev->mdev->caps.num_ports; port++) 973 mlx5_query_ext_port_caps(dev, port); 974 } 975 976 static int get_port_caps(struct mlx5_ib_dev *dev) 977 { 978 struct ib_device_attr *dprops = NULL; 979 struct ib_port_attr *pprops = NULL; 980 int err = 0; 981 int port; 982 983 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 984 if (!pprops) 985 goto out; 986 987 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 988 if (!dprops) 989 goto out; 990 991 err = mlx5_ib_query_device(&dev->ib_dev, dprops); 992 if (err) { 993 mlx5_ib_warn(dev, "query_device failed %d\n", err); 994 goto out; 995 } 996 997 for (port = 1; port <= dev->mdev->caps.num_ports; port++) { 998 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 999 if (err) { 1000 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err); 1001 break; 1002 } 1003 dev->mdev->caps.port[port - 1].pkey_table_len = dprops->max_pkeys; 1004 dev->mdev->caps.port[port - 1].gid_table_len = pprops->gid_tbl_len; 1005 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 1006 dprops->max_pkeys, pprops->gid_tbl_len); 1007 } 1008 1009 out: 1010 kfree(pprops); 1011 kfree(dprops); 1012 1013 return err; 1014 } 1015 1016 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 1017 { 1018 int err; 1019 1020 err = mlx5_mr_cache_cleanup(dev); 1021 if (err) 1022 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 1023 1024 mlx5_ib_destroy_qp(dev->umrc.qp); 1025 ib_destroy_cq(dev->umrc.cq); 1026 ib_dereg_mr(dev->umrc.mr); 1027 ib_dealloc_pd(dev->umrc.pd); 1028 } 1029 1030 enum { 1031 MAX_UMR_WR = 128, 1032 }; 1033 1034 static int create_umr_res(struct mlx5_ib_dev *dev) 1035 { 1036 struct ib_qp_init_attr *init_attr = NULL; 1037 struct ib_qp_attr *attr = NULL; 1038 struct ib_pd *pd; 1039 struct ib_cq *cq; 1040 struct ib_qp *qp; 1041 struct ib_mr *mr; 1042 int ret; 1043 1044 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 1045 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 1046 if (!attr || !init_attr) { 1047 ret = -ENOMEM; 1048 goto error_0; 1049 } 1050 1051 pd = ib_alloc_pd(&dev->ib_dev); 1052 if (IS_ERR(pd)) { 1053 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 1054 ret = PTR_ERR(pd); 1055 goto error_0; 1056 } 1057 1058 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); 1059 if (IS_ERR(mr)) { 1060 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); 1061 ret = PTR_ERR(mr); 1062 goto error_1; 1063 } 1064 1065 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128, 1066 0); 1067 if (IS_ERR(cq)) { 1068 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 1069 ret = PTR_ERR(cq); 1070 goto error_2; 1071 } 1072 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1073 1074 init_attr->send_cq = cq; 1075 init_attr->recv_cq = cq; 1076 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1077 init_attr->cap.max_send_wr = MAX_UMR_WR; 1078 init_attr->cap.max_send_sge = 1; 1079 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1080 init_attr->port_num = 1; 1081 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1082 if (IS_ERR(qp)) { 1083 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1084 ret = PTR_ERR(qp); 1085 goto error_3; 1086 } 1087 qp->device = &dev->ib_dev; 1088 qp->real_qp = qp; 1089 qp->uobject = NULL; 1090 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1091 1092 attr->qp_state = IB_QPS_INIT; 1093 attr->port_num = 1; 1094 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1095 IB_QP_PORT, NULL); 1096 if (ret) { 1097 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1098 goto error_4; 1099 } 1100 1101 memset(attr, 0, sizeof(*attr)); 1102 attr->qp_state = IB_QPS_RTR; 1103 attr->path_mtu = IB_MTU_256; 1104 1105 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1106 if (ret) { 1107 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1108 goto error_4; 1109 } 1110 1111 memset(attr, 0, sizeof(*attr)); 1112 attr->qp_state = IB_QPS_RTS; 1113 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1114 if (ret) { 1115 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1116 goto error_4; 1117 } 1118 1119 dev->umrc.qp = qp; 1120 dev->umrc.cq = cq; 1121 dev->umrc.mr = mr; 1122 dev->umrc.pd = pd; 1123 1124 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1125 ret = mlx5_mr_cache_init(dev); 1126 if (ret) { 1127 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1128 goto error_4; 1129 } 1130 1131 kfree(attr); 1132 kfree(init_attr); 1133 1134 return 0; 1135 1136 error_4: 1137 mlx5_ib_destroy_qp(qp); 1138 1139 error_3: 1140 ib_destroy_cq(cq); 1141 1142 error_2: 1143 ib_dereg_mr(mr); 1144 1145 error_1: 1146 ib_dealloc_pd(pd); 1147 1148 error_0: 1149 kfree(attr); 1150 kfree(init_attr); 1151 return ret; 1152 } 1153 1154 static int create_dev_resources(struct mlx5_ib_resources *devr) 1155 { 1156 struct ib_srq_init_attr attr; 1157 struct mlx5_ib_dev *dev; 1158 int ret = 0; 1159 1160 dev = container_of(devr, struct mlx5_ib_dev, devr); 1161 1162 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1163 if (IS_ERR(devr->p0)) { 1164 ret = PTR_ERR(devr->p0); 1165 goto error0; 1166 } 1167 devr->p0->device = &dev->ib_dev; 1168 devr->p0->uobject = NULL; 1169 atomic_set(&devr->p0->usecnt, 0); 1170 1171 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL); 1172 if (IS_ERR(devr->c0)) { 1173 ret = PTR_ERR(devr->c0); 1174 goto error1; 1175 } 1176 devr->c0->device = &dev->ib_dev; 1177 devr->c0->uobject = NULL; 1178 devr->c0->comp_handler = NULL; 1179 devr->c0->event_handler = NULL; 1180 devr->c0->cq_context = NULL; 1181 atomic_set(&devr->c0->usecnt, 0); 1182 1183 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1184 if (IS_ERR(devr->x0)) { 1185 ret = PTR_ERR(devr->x0); 1186 goto error2; 1187 } 1188 devr->x0->device = &dev->ib_dev; 1189 devr->x0->inode = NULL; 1190 atomic_set(&devr->x0->usecnt, 0); 1191 mutex_init(&devr->x0->tgt_qp_mutex); 1192 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1193 1194 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1195 if (IS_ERR(devr->x1)) { 1196 ret = PTR_ERR(devr->x1); 1197 goto error3; 1198 } 1199 devr->x1->device = &dev->ib_dev; 1200 devr->x1->inode = NULL; 1201 atomic_set(&devr->x1->usecnt, 0); 1202 mutex_init(&devr->x1->tgt_qp_mutex); 1203 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1204 1205 memset(&attr, 0, sizeof(attr)); 1206 attr.attr.max_sge = 1; 1207 attr.attr.max_wr = 1; 1208 attr.srq_type = IB_SRQT_XRC; 1209 attr.ext.xrc.cq = devr->c0; 1210 attr.ext.xrc.xrcd = devr->x0; 1211 1212 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1213 if (IS_ERR(devr->s0)) { 1214 ret = PTR_ERR(devr->s0); 1215 goto error4; 1216 } 1217 devr->s0->device = &dev->ib_dev; 1218 devr->s0->pd = devr->p0; 1219 devr->s0->uobject = NULL; 1220 devr->s0->event_handler = NULL; 1221 devr->s0->srq_context = NULL; 1222 devr->s0->srq_type = IB_SRQT_XRC; 1223 devr->s0->ext.xrc.xrcd = devr->x0; 1224 devr->s0->ext.xrc.cq = devr->c0; 1225 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1226 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1227 atomic_inc(&devr->p0->usecnt); 1228 atomic_set(&devr->s0->usecnt, 0); 1229 1230 return 0; 1231 1232 error4: 1233 mlx5_ib_dealloc_xrcd(devr->x1); 1234 error3: 1235 mlx5_ib_dealloc_xrcd(devr->x0); 1236 error2: 1237 mlx5_ib_destroy_cq(devr->c0); 1238 error1: 1239 mlx5_ib_dealloc_pd(devr->p0); 1240 error0: 1241 return ret; 1242 } 1243 1244 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1245 { 1246 mlx5_ib_destroy_srq(devr->s0); 1247 mlx5_ib_dealloc_xrcd(devr->x0); 1248 mlx5_ib_dealloc_xrcd(devr->x1); 1249 mlx5_ib_destroy_cq(devr->c0); 1250 mlx5_ib_dealloc_pd(devr->p0); 1251 } 1252 1253 static void *mlx5_ib_add(struct mlx5_core_dev *mdev) 1254 { 1255 struct mlx5_ib_dev *dev; 1256 int err; 1257 int i; 1258 1259 printk_once(KERN_INFO "%s", mlx5_version); 1260 1261 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1262 if (!dev) 1263 return NULL; 1264 1265 dev->mdev = mdev; 1266 1267 err = get_port_caps(dev); 1268 if (err) 1269 goto err_dealloc; 1270 1271 get_ext_port_caps(dev); 1272 1273 err = alloc_comp_eqs(dev); 1274 if (err) 1275 goto err_dealloc; 1276 1277 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1278 1279 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1280 dev->ib_dev.owner = THIS_MODULE; 1281 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1282 dev->ib_dev.local_dma_lkey = mdev->caps.reserved_lkey; 1283 dev->num_ports = mdev->caps.num_ports; 1284 dev->ib_dev.phys_port_cnt = dev->num_ports; 1285 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors; 1286 dev->ib_dev.dma_device = &mdev->pdev->dev; 1287 1288 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1289 dev->ib_dev.uverbs_cmd_mask = 1290 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1291 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1292 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1293 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1294 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1295 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1296 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1297 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1298 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1299 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1300 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1301 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1302 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1303 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1304 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1305 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1306 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1307 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1308 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1309 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1310 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1311 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1312 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1313 1314 dev->ib_dev.query_device = mlx5_ib_query_device; 1315 dev->ib_dev.query_port = mlx5_ib_query_port; 1316 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1317 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1318 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1319 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1320 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1321 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1322 dev->ib_dev.mmap = mlx5_ib_mmap; 1323 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1324 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1325 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1326 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1327 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1328 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1329 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1330 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1331 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1332 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1333 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1334 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1335 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1336 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1337 dev->ib_dev.post_send = mlx5_ib_post_send; 1338 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1339 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1340 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1341 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1342 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1343 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1344 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1345 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1346 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1347 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1348 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr; 1349 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1350 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1351 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1352 dev->ib_dev.create_mr = mlx5_ib_create_mr; 1353 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; 1354 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1355 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1356 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 1357 1358 if (mdev->caps.flags & MLX5_DEV_CAP_FLAG_XRC) { 1359 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1360 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1361 dev->ib_dev.uverbs_cmd_mask |= 1362 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1363 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1364 } 1365 1366 err = init_node_data(dev); 1367 if (err) 1368 goto err_eqs; 1369 1370 mutex_init(&dev->cap_mask_mutex); 1371 spin_lock_init(&dev->mr_lock); 1372 1373 err = create_dev_resources(&dev->devr); 1374 if (err) 1375 goto err_eqs; 1376 1377 err = ib_register_device(&dev->ib_dev, NULL); 1378 if (err) 1379 goto err_rsrc; 1380 1381 err = create_umr_res(dev); 1382 if (err) 1383 goto err_dev; 1384 1385 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1386 err = device_create_file(&dev->ib_dev.dev, 1387 mlx5_class_attributes[i]); 1388 if (err) 1389 goto err_umrc; 1390 } 1391 1392 dev->ib_active = true; 1393 1394 return dev; 1395 1396 err_umrc: 1397 destroy_umrc_res(dev); 1398 1399 err_dev: 1400 ib_unregister_device(&dev->ib_dev); 1401 1402 err_rsrc: 1403 destroy_dev_resources(&dev->devr); 1404 1405 err_eqs: 1406 free_comp_eqs(dev); 1407 1408 err_dealloc: 1409 ib_dealloc_device((struct ib_device *)dev); 1410 1411 return NULL; 1412 } 1413 1414 static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 1415 { 1416 struct mlx5_ib_dev *dev = context; 1417 destroy_umrc_res(dev); 1418 ib_unregister_device(&dev->ib_dev); 1419 destroy_dev_resources(&dev->devr); 1420 free_comp_eqs(dev); 1421 ib_dealloc_device(&dev->ib_dev); 1422 } 1423 1424 static struct mlx5_interface mlx5_ib_interface = { 1425 .add = mlx5_ib_add, 1426 .remove = mlx5_ib_remove, 1427 .event = mlx5_ib_event, 1428 }; 1429 1430 static int __init mlx5_ib_init(void) 1431 { 1432 if (deprecated_prof_sel != 2) 1433 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); 1434 1435 return mlx5_register_interface(&mlx5_ib_interface); 1436 } 1437 1438 static void __exit mlx5_ib_cleanup(void) 1439 { 1440 mlx5_unregister_interface(&mlx5_ib_interface); 1441 } 1442 1443 module_init(mlx5_ib_init); 1444 module_exit(mlx5_ib_cleanup); 1445