xref: /openbmc/linux/drivers/infiniband/hw/mlx5/devx.c (revision 7a2eb736)
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3  * Copyright (c) 2018, Mellanox Technologies inc.  All rights reserved.
4  */
5 
6 #include <rdma/ib_user_verbs.h>
7 #include <rdma/ib_verbs.h>
8 #include <rdma/uverbs_types.h>
9 #include <rdma/uverbs_ioctl.h>
10 #include <rdma/mlx5_user_ioctl_cmds.h>
11 #include <rdma/mlx5_user_ioctl_verbs.h>
12 #include <rdma/ib_umem.h>
13 #include <rdma/uverbs_std_types.h>
14 #include <linux/mlx5/driver.h>
15 #include <linux/mlx5/fs.h>
16 #include "mlx5_ib.h"
17 #include <linux/xarray.h>
18 
19 #define UVERBS_MODULE_NAME mlx5_ib
20 #include <rdma/uverbs_named_ioctl.h>
21 
22 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
23 
24 enum devx_obj_flags {
25 	DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
26 	DEVX_OBJ_FLAGS_DCT = 1 << 1,
27 	DEVX_OBJ_FLAGS_CQ = 1 << 2,
28 };
29 
30 struct devx_async_data {
31 	struct mlx5_ib_dev *mdev;
32 	struct list_head list;
33 	struct ib_uobject *fd_uobj;
34 	struct mlx5_async_work cb_work;
35 	u16 cmd_out_len;
36 	/* must be last field in this structure */
37 	struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
38 };
39 
40 struct devx_async_event_data {
41 	struct list_head list; /* headed in ev_file->event_list */
42 	struct mlx5_ib_uapi_devx_async_event_hdr hdr;
43 };
44 
45 /* first level XA value data structure */
46 struct devx_event {
47 	struct xarray object_ids; /* second XA level, Key = object id */
48 	struct list_head unaffiliated_list;
49 };
50 
51 /* second level XA value data structure */
52 struct devx_obj_event {
53 	struct rcu_head rcu;
54 	struct list_head obj_sub_list;
55 };
56 
57 struct devx_event_subscription {
58 	struct list_head file_list; /* headed in ev_file->
59 				     * subscribed_events_list
60 				     */
61 	struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
62 				   * devx_obj_event->obj_sub_list
63 				   */
64 	struct list_head obj_list; /* headed in devx_object */
65 	struct list_head event_list; /* headed in ev_file->event_list or in
66 				      * temp list via subscription
67 				      */
68 
69 	u8 is_cleaned:1;
70 	u32 xa_key_level1;
71 	u32 xa_key_level2;
72 	struct rcu_head	rcu;
73 	u64 cookie;
74 	struct devx_async_event_file *ev_file;
75 	struct file *filp; /* Upon hot unplug we need a direct access to */
76 	struct eventfd_ctx *eventfd;
77 };
78 
79 struct devx_async_event_file {
80 	struct ib_uobject uobj;
81 	/* Head of events that are subscribed to this FD */
82 	struct list_head subscribed_events_list;
83 	spinlock_t lock;
84 	wait_queue_head_t poll_wait;
85 	struct list_head event_list;
86 	struct mlx5_ib_dev *dev;
87 	u8 omit_data:1;
88 	u8 is_overflow_err:1;
89 	u8 is_destroyed:1;
90 };
91 
92 #define MLX5_MAX_DESTROY_INBOX_SIZE_DW MLX5_ST_SZ_DW(delete_fte_in)
93 struct devx_obj {
94 	struct mlx5_ib_dev	*ib_dev;
95 	u64			obj_id;
96 	u32			dinlen; /* destroy inbox length */
97 	u32			dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW];
98 	u32			flags;
99 	union {
100 		struct mlx5_ib_devx_mr	devx_mr;
101 		struct mlx5_core_dct	core_dct;
102 		struct mlx5_core_cq	core_cq;
103 	};
104 	struct list_head event_sub; /* holds devx_event_subscription entries */
105 };
106 
107 struct devx_umem {
108 	struct mlx5_core_dev		*mdev;
109 	struct ib_umem			*umem;
110 	u32				page_offset;
111 	int				page_shift;
112 	int				ncont;
113 	u32				dinlen;
114 	u32				dinbox[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)];
115 };
116 
117 struct devx_umem_reg_cmd {
118 	void				*in;
119 	u32				inlen;
120 	u32				out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
121 };
122 
123 static struct mlx5_ib_ucontext *
124 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
125 {
126 	return to_mucontext(ib_uverbs_get_ucontext(attrs));
127 }
128 
129 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
130 {
131 	u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {0};
132 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
133 	void *uctx;
134 	int err;
135 	u16 uid;
136 	u32 cap = 0;
137 
138 	/* 0 means not supported */
139 	if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
140 		return -EINVAL;
141 
142 	uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
143 	if (is_user && capable(CAP_NET_RAW) &&
144 	    (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
145 		cap |= MLX5_UCTX_CAP_RAW_TX;
146 	if (is_user && capable(CAP_SYS_RAWIO) &&
147 	    (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
148 	     MLX5_UCTX_CAP_INTERNAL_DEV_RES))
149 		cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
150 
151 	MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
152 	MLX5_SET(uctx, uctx, cap, cap);
153 
154 	err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
155 	if (err)
156 		return err;
157 
158 	uid = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
159 	return uid;
160 }
161 
162 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
163 {
164 	u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {0};
165 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
166 
167 	MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
168 	MLX5_SET(destroy_uctx_in, in, uid, uid);
169 
170 	mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
171 }
172 
173 bool mlx5_ib_devx_is_flow_dest(void *obj, int *dest_id, int *dest_type)
174 {
175 	struct devx_obj *devx_obj = obj;
176 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode);
177 
178 	switch (opcode) {
179 	case MLX5_CMD_OP_DESTROY_TIR:
180 		*dest_type = MLX5_FLOW_DESTINATION_TYPE_TIR;
181 		*dest_id = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox,
182 				    obj_id);
183 		return true;
184 
185 	case MLX5_CMD_OP_DESTROY_FLOW_TABLE:
186 		*dest_type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
187 		*dest_id = MLX5_GET(destroy_flow_table_in, devx_obj->dinbox,
188 				    table_id);
189 		return true;
190 	default:
191 		return false;
192 	}
193 }
194 
195 bool mlx5_ib_devx_is_flow_counter(void *obj, u32 *counter_id)
196 {
197 	struct devx_obj *devx_obj = obj;
198 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode);
199 
200 	if (opcode == MLX5_CMD_OP_DEALLOC_FLOW_COUNTER) {
201 		*counter_id = MLX5_GET(dealloc_flow_counter_in,
202 				       devx_obj->dinbox,
203 				       flow_counter_id);
204 		return true;
205 	}
206 
207 	return false;
208 }
209 
210 static bool is_legacy_unaffiliated_event_num(u16 event_num)
211 {
212 	switch (event_num) {
213 	case MLX5_EVENT_TYPE_PORT_CHANGE:
214 		return true;
215 	default:
216 		return false;
217 	}
218 }
219 
220 static bool is_legacy_obj_event_num(u16 event_num)
221 {
222 	switch (event_num) {
223 	case MLX5_EVENT_TYPE_PATH_MIG:
224 	case MLX5_EVENT_TYPE_COMM_EST:
225 	case MLX5_EVENT_TYPE_SQ_DRAINED:
226 	case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
227 	case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
228 	case MLX5_EVENT_TYPE_CQ_ERROR:
229 	case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
230 	case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
231 	case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
232 	case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
233 	case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
234 	case MLX5_EVENT_TYPE_DCT_DRAINED:
235 	case MLX5_EVENT_TYPE_COMP:
236 		return true;
237 	default:
238 		return false;
239 	}
240 }
241 
242 static u16 get_legacy_obj_type(u16 opcode)
243 {
244 	switch (opcode) {
245 	case MLX5_CMD_OP_CREATE_RQ:
246 		return MLX5_EVENT_QUEUE_TYPE_RQ;
247 	case MLX5_CMD_OP_CREATE_QP:
248 		return MLX5_EVENT_QUEUE_TYPE_QP;
249 	case MLX5_CMD_OP_CREATE_SQ:
250 		return MLX5_EVENT_QUEUE_TYPE_SQ;
251 	case MLX5_CMD_OP_CREATE_DCT:
252 		return MLX5_EVENT_QUEUE_TYPE_DCT;
253 	default:
254 		return 0;
255 	}
256 }
257 
258 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
259 {
260 	u16 opcode;
261 
262 	opcode = (obj->obj_id >> 32) & 0xffff;
263 
264 	if (is_legacy_obj_event_num(event_num))
265 		return get_legacy_obj_type(opcode);
266 
267 	switch (opcode) {
268 	case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
269 		return (obj->obj_id >> 48);
270 	case MLX5_CMD_OP_CREATE_RQ:
271 		return MLX5_OBJ_TYPE_RQ;
272 	case MLX5_CMD_OP_CREATE_QP:
273 		return MLX5_OBJ_TYPE_QP;
274 	case MLX5_CMD_OP_CREATE_SQ:
275 		return MLX5_OBJ_TYPE_SQ;
276 	case MLX5_CMD_OP_CREATE_DCT:
277 		return MLX5_OBJ_TYPE_DCT;
278 	case MLX5_CMD_OP_CREATE_TIR:
279 		return MLX5_OBJ_TYPE_TIR;
280 	case MLX5_CMD_OP_CREATE_TIS:
281 		return MLX5_OBJ_TYPE_TIS;
282 	case MLX5_CMD_OP_CREATE_PSV:
283 		return MLX5_OBJ_TYPE_PSV;
284 	case MLX5_OBJ_TYPE_MKEY:
285 		return MLX5_OBJ_TYPE_MKEY;
286 	case MLX5_CMD_OP_CREATE_RMP:
287 		return MLX5_OBJ_TYPE_RMP;
288 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
289 		return MLX5_OBJ_TYPE_XRC_SRQ;
290 	case MLX5_CMD_OP_CREATE_XRQ:
291 		return MLX5_OBJ_TYPE_XRQ;
292 	case MLX5_CMD_OP_CREATE_RQT:
293 		return MLX5_OBJ_TYPE_RQT;
294 	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
295 		return MLX5_OBJ_TYPE_FLOW_COUNTER;
296 	case MLX5_CMD_OP_CREATE_CQ:
297 		return MLX5_OBJ_TYPE_CQ;
298 	default:
299 		return 0;
300 	}
301 }
302 
303 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
304 {
305 	switch (event_type) {
306 	case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
307 	case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
308 	case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
309 	case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
310 	case MLX5_EVENT_TYPE_PATH_MIG:
311 	case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
312 	case MLX5_EVENT_TYPE_COMM_EST:
313 	case MLX5_EVENT_TYPE_SQ_DRAINED:
314 	case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
315 	case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
316 		return eqe->data.qp_srq.type;
317 	case MLX5_EVENT_TYPE_CQ_ERROR:
318 		return 0;
319 	case MLX5_EVENT_TYPE_DCT_DRAINED:
320 		return MLX5_EVENT_QUEUE_TYPE_DCT;
321 	default:
322 		return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
323 	}
324 }
325 
326 static u32 get_dec_obj_id(u64 obj_id)
327 {
328 	return (obj_id & 0xffffffff);
329 }
330 
331 /*
332  * As the obj_id in the firmware is not globally unique the object type
333  * must be considered upon checking for a valid object id.
334  * For that the opcode of the creator command is encoded as part of the obj_id.
335  */
336 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
337 {
338 	return ((u64)opcode << 32) | obj_id;
339 }
340 
341 static u64 devx_get_obj_id(const void *in)
342 {
343 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
344 	u64 obj_id;
345 
346 	switch (opcode) {
347 	case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
348 	case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
349 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
350 					MLX5_GET(general_obj_in_cmd_hdr, in,
351 						 obj_type) << 16,
352 					MLX5_GET(general_obj_in_cmd_hdr, in,
353 						 obj_id));
354 		break;
355 	case MLX5_CMD_OP_QUERY_MKEY:
356 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
357 					MLX5_GET(query_mkey_in, in,
358 						 mkey_index));
359 		break;
360 	case MLX5_CMD_OP_QUERY_CQ:
361 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
362 					MLX5_GET(query_cq_in, in, cqn));
363 		break;
364 	case MLX5_CMD_OP_MODIFY_CQ:
365 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
366 					MLX5_GET(modify_cq_in, in, cqn));
367 		break;
368 	case MLX5_CMD_OP_QUERY_SQ:
369 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
370 					MLX5_GET(query_sq_in, in, sqn));
371 		break;
372 	case MLX5_CMD_OP_MODIFY_SQ:
373 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
374 					MLX5_GET(modify_sq_in, in, sqn));
375 		break;
376 	case MLX5_CMD_OP_QUERY_RQ:
377 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
378 					MLX5_GET(query_rq_in, in, rqn));
379 		break;
380 	case MLX5_CMD_OP_MODIFY_RQ:
381 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
382 					MLX5_GET(modify_rq_in, in, rqn));
383 		break;
384 	case MLX5_CMD_OP_QUERY_RMP:
385 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
386 					MLX5_GET(query_rmp_in, in, rmpn));
387 		break;
388 	case MLX5_CMD_OP_MODIFY_RMP:
389 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
390 					MLX5_GET(modify_rmp_in, in, rmpn));
391 		break;
392 	case MLX5_CMD_OP_QUERY_RQT:
393 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
394 					MLX5_GET(query_rqt_in, in, rqtn));
395 		break;
396 	case MLX5_CMD_OP_MODIFY_RQT:
397 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
398 					MLX5_GET(modify_rqt_in, in, rqtn));
399 		break;
400 	case MLX5_CMD_OP_QUERY_TIR:
401 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
402 					MLX5_GET(query_tir_in, in, tirn));
403 		break;
404 	case MLX5_CMD_OP_MODIFY_TIR:
405 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
406 					MLX5_GET(modify_tir_in, in, tirn));
407 		break;
408 	case MLX5_CMD_OP_QUERY_TIS:
409 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
410 					MLX5_GET(query_tis_in, in, tisn));
411 		break;
412 	case MLX5_CMD_OP_MODIFY_TIS:
413 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
414 					MLX5_GET(modify_tis_in, in, tisn));
415 		break;
416 	case MLX5_CMD_OP_QUERY_FLOW_TABLE:
417 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
418 					MLX5_GET(query_flow_table_in, in,
419 						 table_id));
420 		break;
421 	case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
422 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
423 					MLX5_GET(modify_flow_table_in, in,
424 						 table_id));
425 		break;
426 	case MLX5_CMD_OP_QUERY_FLOW_GROUP:
427 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
428 					MLX5_GET(query_flow_group_in, in,
429 						 group_id));
430 		break;
431 	case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
432 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
433 					MLX5_GET(query_fte_in, in,
434 						 flow_index));
435 		break;
436 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
437 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
438 					MLX5_GET(set_fte_in, in, flow_index));
439 		break;
440 	case MLX5_CMD_OP_QUERY_Q_COUNTER:
441 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
442 					MLX5_GET(query_q_counter_in, in,
443 						 counter_set_id));
444 		break;
445 	case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
446 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
447 					MLX5_GET(query_flow_counter_in, in,
448 						 flow_counter_id));
449 		break;
450 	case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
451 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
452 					MLX5_GET(general_obj_in_cmd_hdr, in,
453 						 obj_id));
454 		break;
455 	case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
456 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
457 					MLX5_GET(query_scheduling_element_in,
458 						 in, scheduling_element_id));
459 		break;
460 	case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
461 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
462 					MLX5_GET(modify_scheduling_element_in,
463 						 in, scheduling_element_id));
464 		break;
465 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
466 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
467 					MLX5_GET(add_vxlan_udp_dport_in, in,
468 						 vxlan_udp_port));
469 		break;
470 	case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
471 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
472 					MLX5_GET(query_l2_table_entry_in, in,
473 						 table_index));
474 		break;
475 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
476 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
477 					MLX5_GET(set_l2_table_entry_in, in,
478 						 table_index));
479 		break;
480 	case MLX5_CMD_OP_QUERY_QP:
481 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
482 					MLX5_GET(query_qp_in, in, qpn));
483 		break;
484 	case MLX5_CMD_OP_RST2INIT_QP:
485 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
486 					MLX5_GET(rst2init_qp_in, in, qpn));
487 		break;
488 	case MLX5_CMD_OP_INIT2RTR_QP:
489 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
490 					MLX5_GET(init2rtr_qp_in, in, qpn));
491 		break;
492 	case MLX5_CMD_OP_RTR2RTS_QP:
493 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
494 					MLX5_GET(rtr2rts_qp_in, in, qpn));
495 		break;
496 	case MLX5_CMD_OP_RTS2RTS_QP:
497 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
498 					MLX5_GET(rts2rts_qp_in, in, qpn));
499 		break;
500 	case MLX5_CMD_OP_SQERR2RTS_QP:
501 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
502 					MLX5_GET(sqerr2rts_qp_in, in, qpn));
503 		break;
504 	case MLX5_CMD_OP_2ERR_QP:
505 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
506 					MLX5_GET(qp_2err_in, in, qpn));
507 		break;
508 	case MLX5_CMD_OP_2RST_QP:
509 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
510 					MLX5_GET(qp_2rst_in, in, qpn));
511 		break;
512 	case MLX5_CMD_OP_QUERY_DCT:
513 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
514 					MLX5_GET(query_dct_in, in, dctn));
515 		break;
516 	case MLX5_CMD_OP_QUERY_XRQ:
517 	case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
518 	case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
519 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
520 					MLX5_GET(query_xrq_in, in, xrqn));
521 		break;
522 	case MLX5_CMD_OP_QUERY_XRC_SRQ:
523 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
524 					MLX5_GET(query_xrc_srq_in, in,
525 						 xrc_srqn));
526 		break;
527 	case MLX5_CMD_OP_ARM_XRC_SRQ:
528 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
529 					MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
530 		break;
531 	case MLX5_CMD_OP_QUERY_SRQ:
532 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
533 					MLX5_GET(query_srq_in, in, srqn));
534 		break;
535 	case MLX5_CMD_OP_ARM_RQ:
536 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
537 					MLX5_GET(arm_rq_in, in, srq_number));
538 		break;
539 	case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
540 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
541 					MLX5_GET(drain_dct_in, in, dctn));
542 		break;
543 	case MLX5_CMD_OP_ARM_XRQ:
544 	case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
545 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
546 					MLX5_GET(arm_xrq_in, in, xrqn));
547 		break;
548 	case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
549 		obj_id = get_enc_obj_id
550 				(MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
551 				 MLX5_GET(query_packet_reformat_context_in,
552 					  in, packet_reformat_id));
553 		break;
554 	default:
555 		obj_id = 0;
556 	}
557 
558 	return obj_id;
559 }
560 
561 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
562 				 struct ib_uobject *uobj, const void *in)
563 {
564 	struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
565 	u64 obj_id = devx_get_obj_id(in);
566 
567 	if (!obj_id)
568 		return false;
569 
570 	switch (uobj_get_object_id(uobj)) {
571 	case UVERBS_OBJECT_CQ:
572 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
573 				      to_mcq(uobj->object)->mcq.cqn) ==
574 				      obj_id;
575 
576 	case UVERBS_OBJECT_SRQ:
577 	{
578 		struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
579 		u16 opcode;
580 
581 		switch (srq->common.res) {
582 		case MLX5_RES_XSRQ:
583 			opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
584 			break;
585 		case MLX5_RES_XRQ:
586 			opcode = MLX5_CMD_OP_CREATE_XRQ;
587 			break;
588 		default:
589 			if (!dev->mdev->issi)
590 				opcode = MLX5_CMD_OP_CREATE_SRQ;
591 			else
592 				opcode = MLX5_CMD_OP_CREATE_RMP;
593 		}
594 
595 		return get_enc_obj_id(opcode,
596 				      to_msrq(uobj->object)->msrq.srqn) ==
597 				      obj_id;
598 	}
599 
600 	case UVERBS_OBJECT_QP:
601 	{
602 		struct mlx5_ib_qp *qp = to_mqp(uobj->object);
603 		enum ib_qp_type	qp_type = qp->ibqp.qp_type;
604 
605 		if (qp_type == IB_QPT_RAW_PACKET ||
606 		    (qp->flags & MLX5_IB_QP_UNDERLAY)) {
607 			struct mlx5_ib_raw_packet_qp *raw_packet_qp =
608 							 &qp->raw_packet_qp;
609 			struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
610 			struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
611 
612 			return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
613 					       rq->base.mqp.qpn) == obj_id ||
614 				get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
615 					       sq->base.mqp.qpn) == obj_id ||
616 				get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
617 					       rq->tirn) == obj_id ||
618 				get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
619 					       sq->tisn) == obj_id);
620 		}
621 
622 		if (qp_type == MLX5_IB_QPT_DCT)
623 			return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
624 					      qp->dct.mdct.mqp.qpn) == obj_id;
625 
626 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
627 				      qp->ibqp.qp_num) == obj_id;
628 	}
629 
630 	case UVERBS_OBJECT_WQ:
631 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
632 				      to_mrwq(uobj->object)->core_qp.qpn) ==
633 				      obj_id;
634 
635 	case UVERBS_OBJECT_RWQ_IND_TBL:
636 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
637 				      to_mrwq_ind_table(uobj->object)->rqtn) ==
638 				      obj_id;
639 
640 	case MLX5_IB_OBJECT_DEVX_OBJ:
641 		return ((struct devx_obj *)uobj->object)->obj_id == obj_id;
642 
643 	default:
644 		return false;
645 	}
646 }
647 
648 static void devx_set_umem_valid(const void *in)
649 {
650 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
651 
652 	switch (opcode) {
653 	case MLX5_CMD_OP_CREATE_MKEY:
654 		MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
655 		break;
656 	case MLX5_CMD_OP_CREATE_CQ:
657 	{
658 		void *cqc;
659 
660 		MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
661 		cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
662 		MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
663 		break;
664 	}
665 	case MLX5_CMD_OP_CREATE_QP:
666 	{
667 		void *qpc;
668 
669 		qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
670 		MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
671 		MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
672 		break;
673 	}
674 
675 	case MLX5_CMD_OP_CREATE_RQ:
676 	{
677 		void *rqc, *wq;
678 
679 		rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
680 		wq  = MLX5_ADDR_OF(rqc, rqc, wq);
681 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
682 		MLX5_SET(wq, wq, wq_umem_valid, 1);
683 		break;
684 	}
685 
686 	case MLX5_CMD_OP_CREATE_SQ:
687 	{
688 		void *sqc, *wq;
689 
690 		sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
691 		wq = MLX5_ADDR_OF(sqc, sqc, wq);
692 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
693 		MLX5_SET(wq, wq, wq_umem_valid, 1);
694 		break;
695 	}
696 
697 	case MLX5_CMD_OP_MODIFY_CQ:
698 		MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
699 		break;
700 
701 	case MLX5_CMD_OP_CREATE_RMP:
702 	{
703 		void *rmpc, *wq;
704 
705 		rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
706 		wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
707 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
708 		MLX5_SET(wq, wq, wq_umem_valid, 1);
709 		break;
710 	}
711 
712 	case MLX5_CMD_OP_CREATE_XRQ:
713 	{
714 		void *xrqc, *wq;
715 
716 		xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
717 		wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
718 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
719 		MLX5_SET(wq, wq, wq_umem_valid, 1);
720 		break;
721 	}
722 
723 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
724 	{
725 		void *xrc_srqc;
726 
727 		MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
728 		xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
729 					xrc_srq_context_entry);
730 		MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
731 		break;
732 	}
733 
734 	default:
735 		return;
736 	}
737 }
738 
739 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
740 {
741 	*opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
742 
743 	switch (*opcode) {
744 	case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
745 	case MLX5_CMD_OP_CREATE_MKEY:
746 	case MLX5_CMD_OP_CREATE_CQ:
747 	case MLX5_CMD_OP_ALLOC_PD:
748 	case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
749 	case MLX5_CMD_OP_CREATE_RMP:
750 	case MLX5_CMD_OP_CREATE_SQ:
751 	case MLX5_CMD_OP_CREATE_RQ:
752 	case MLX5_CMD_OP_CREATE_RQT:
753 	case MLX5_CMD_OP_CREATE_TIR:
754 	case MLX5_CMD_OP_CREATE_TIS:
755 	case MLX5_CMD_OP_ALLOC_Q_COUNTER:
756 	case MLX5_CMD_OP_CREATE_FLOW_TABLE:
757 	case MLX5_CMD_OP_CREATE_FLOW_GROUP:
758 	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
759 	case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
760 	case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
761 	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
762 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
763 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
764 	case MLX5_CMD_OP_CREATE_QP:
765 	case MLX5_CMD_OP_CREATE_SRQ:
766 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
767 	case MLX5_CMD_OP_CREATE_DCT:
768 	case MLX5_CMD_OP_CREATE_XRQ:
769 	case MLX5_CMD_OP_ATTACH_TO_MCG:
770 	case MLX5_CMD_OP_ALLOC_XRCD:
771 		return true;
772 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
773 	{
774 		u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
775 		if (op_mod == 0)
776 			return true;
777 		return false;
778 	}
779 	default:
780 		return false;
781 	}
782 }
783 
784 static bool devx_is_obj_modify_cmd(const void *in)
785 {
786 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
787 
788 	switch (opcode) {
789 	case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
790 	case MLX5_CMD_OP_MODIFY_CQ:
791 	case MLX5_CMD_OP_MODIFY_RMP:
792 	case MLX5_CMD_OP_MODIFY_SQ:
793 	case MLX5_CMD_OP_MODIFY_RQ:
794 	case MLX5_CMD_OP_MODIFY_RQT:
795 	case MLX5_CMD_OP_MODIFY_TIR:
796 	case MLX5_CMD_OP_MODIFY_TIS:
797 	case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
798 	case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
799 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
800 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
801 	case MLX5_CMD_OP_RST2INIT_QP:
802 	case MLX5_CMD_OP_INIT2RTR_QP:
803 	case MLX5_CMD_OP_RTR2RTS_QP:
804 	case MLX5_CMD_OP_RTS2RTS_QP:
805 	case MLX5_CMD_OP_SQERR2RTS_QP:
806 	case MLX5_CMD_OP_2ERR_QP:
807 	case MLX5_CMD_OP_2RST_QP:
808 	case MLX5_CMD_OP_ARM_XRC_SRQ:
809 	case MLX5_CMD_OP_ARM_RQ:
810 	case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
811 	case MLX5_CMD_OP_ARM_XRQ:
812 	case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
813 		return true;
814 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
815 	{
816 		u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
817 
818 		if (op_mod == 1)
819 			return true;
820 		return false;
821 	}
822 	default:
823 		return false;
824 	}
825 }
826 
827 static bool devx_is_obj_query_cmd(const void *in)
828 {
829 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
830 
831 	switch (opcode) {
832 	case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
833 	case MLX5_CMD_OP_QUERY_MKEY:
834 	case MLX5_CMD_OP_QUERY_CQ:
835 	case MLX5_CMD_OP_QUERY_RMP:
836 	case MLX5_CMD_OP_QUERY_SQ:
837 	case MLX5_CMD_OP_QUERY_RQ:
838 	case MLX5_CMD_OP_QUERY_RQT:
839 	case MLX5_CMD_OP_QUERY_TIR:
840 	case MLX5_CMD_OP_QUERY_TIS:
841 	case MLX5_CMD_OP_QUERY_Q_COUNTER:
842 	case MLX5_CMD_OP_QUERY_FLOW_TABLE:
843 	case MLX5_CMD_OP_QUERY_FLOW_GROUP:
844 	case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
845 	case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
846 	case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
847 	case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
848 	case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
849 	case MLX5_CMD_OP_QUERY_QP:
850 	case MLX5_CMD_OP_QUERY_SRQ:
851 	case MLX5_CMD_OP_QUERY_XRC_SRQ:
852 	case MLX5_CMD_OP_QUERY_DCT:
853 	case MLX5_CMD_OP_QUERY_XRQ:
854 	case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
855 	case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
856 	case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
857 		return true;
858 	default:
859 		return false;
860 	}
861 }
862 
863 static bool devx_is_whitelist_cmd(void *in)
864 {
865 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
866 
867 	switch (opcode) {
868 	case MLX5_CMD_OP_QUERY_HCA_CAP:
869 	case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
870 	case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
871 		return true;
872 	default:
873 		return false;
874 	}
875 }
876 
877 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
878 {
879 	if (devx_is_whitelist_cmd(cmd_in)) {
880 		struct mlx5_ib_dev *dev;
881 
882 		if (c->devx_uid)
883 			return c->devx_uid;
884 
885 		dev = to_mdev(c->ibucontext.device);
886 		if (dev->devx_whitelist_uid)
887 			return dev->devx_whitelist_uid;
888 
889 		return -EOPNOTSUPP;
890 	}
891 
892 	if (!c->devx_uid)
893 		return -EINVAL;
894 
895 	return c->devx_uid;
896 }
897 
898 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
899 {
900 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
901 
902 	/* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
903 	if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
904 	     MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
905 	    (opcode >= MLX5_CMD_OP_GENERAL_START &&
906 	     opcode < MLX5_CMD_OP_GENERAL_END))
907 		return true;
908 
909 	switch (opcode) {
910 	case MLX5_CMD_OP_QUERY_HCA_CAP:
911 	case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
912 	case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
913 	case MLX5_CMD_OP_QUERY_VPORT_STATE:
914 	case MLX5_CMD_OP_QUERY_ADAPTER:
915 	case MLX5_CMD_OP_QUERY_ISSI:
916 	case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
917 	case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
918 	case MLX5_CMD_OP_QUERY_VNIC_ENV:
919 	case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
920 	case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
921 	case MLX5_CMD_OP_NOP:
922 	case MLX5_CMD_OP_QUERY_CONG_STATUS:
923 	case MLX5_CMD_OP_QUERY_CONG_PARAMS:
924 	case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
925 	case MLX5_CMD_OP_QUERY_LAG:
926 		return true;
927 	default:
928 		return false;
929 	}
930 }
931 
932 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
933 	struct uverbs_attr_bundle *attrs)
934 {
935 	struct mlx5_ib_ucontext *c;
936 	struct mlx5_ib_dev *dev;
937 	int user_vector;
938 	int dev_eqn;
939 	unsigned int irqn;
940 	int err;
941 
942 	if (uverbs_copy_from(&user_vector, attrs,
943 			     MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
944 		return -EFAULT;
945 
946 	c = devx_ufile2uctx(attrs);
947 	if (IS_ERR(c))
948 		return PTR_ERR(c);
949 	dev = to_mdev(c->ibucontext.device);
950 
951 	err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn, &irqn);
952 	if (err < 0)
953 		return err;
954 
955 	if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
956 			   &dev_eqn, sizeof(dev_eqn)))
957 		return -EFAULT;
958 
959 	return 0;
960 }
961 
962 /*
963  *Security note:
964  * The hardware protection mechanism works like this: Each device object that
965  * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
966  * the device specification manual) upon its creation. Then upon doorbell,
967  * hardware fetches the object context for which the doorbell was rang, and
968  * validates that the UAR through which the DB was rang matches the UAR ID
969  * of the object.
970  * If no match the doorbell is silently ignored by the hardware. Of course,
971  * the user cannot ring a doorbell on a UAR that was not mapped to it.
972  * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
973  * mailboxes (except tagging them with UID), we expose to the user its UAR
974  * ID, so it can embed it in these objects in the expected specification
975  * format. So the only thing the user can do is hurt itself by creating a
976  * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
977  * may ring a doorbell on its objects.
978  * The consequence of that will be that another user can schedule a QP/SQ
979  * of the buggy user for execution (just insert it to the hardware schedule
980  * queue or arm its CQ for event generation), no further harm is expected.
981  */
982 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
983 	struct uverbs_attr_bundle *attrs)
984 {
985 	struct mlx5_ib_ucontext *c;
986 	struct mlx5_ib_dev *dev;
987 	u32 user_idx;
988 	s32 dev_idx;
989 
990 	c = devx_ufile2uctx(attrs);
991 	if (IS_ERR(c))
992 		return PTR_ERR(c);
993 	dev = to_mdev(c->ibucontext.device);
994 
995 	if (uverbs_copy_from(&user_idx, attrs,
996 			     MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
997 		return -EFAULT;
998 
999 	dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1000 	if (dev_idx < 0)
1001 		return dev_idx;
1002 
1003 	if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1004 			   &dev_idx, sizeof(dev_idx)))
1005 		return -EFAULT;
1006 
1007 	return 0;
1008 }
1009 
1010 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1011 	struct uverbs_attr_bundle *attrs)
1012 {
1013 	struct mlx5_ib_ucontext *c;
1014 	struct mlx5_ib_dev *dev;
1015 	void *cmd_in = uverbs_attr_get_alloced_ptr(
1016 		attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1017 	int cmd_out_len = uverbs_attr_get_len(attrs,
1018 					MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1019 	void *cmd_out;
1020 	int err;
1021 	int uid;
1022 
1023 	c = devx_ufile2uctx(attrs);
1024 	if (IS_ERR(c))
1025 		return PTR_ERR(c);
1026 	dev = to_mdev(c->ibucontext.device);
1027 
1028 	uid = devx_get_uid(c, cmd_in);
1029 	if (uid < 0)
1030 		return uid;
1031 
1032 	/* Only white list of some general HCA commands are allowed for this method. */
1033 	if (!devx_is_general_cmd(cmd_in, dev))
1034 		return -EINVAL;
1035 
1036 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1037 	if (IS_ERR(cmd_out))
1038 		return PTR_ERR(cmd_out);
1039 
1040 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1041 	err = mlx5_cmd_exec(dev->mdev, cmd_in,
1042 			    uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1043 			    cmd_out, cmd_out_len);
1044 	if (err)
1045 		return err;
1046 
1047 	return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1048 			      cmd_out_len);
1049 }
1050 
1051 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1052 				       u32 *dinlen,
1053 				       u32 *obj_id)
1054 {
1055 	u16 obj_type = MLX5_GET(general_obj_in_cmd_hdr, in, obj_type);
1056 	u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1057 
1058 	*obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
1059 	*dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1060 
1061 	MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1062 	MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1063 
1064 	switch (MLX5_GET(general_obj_in_cmd_hdr, in, opcode)) {
1065 	case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1066 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1067 		MLX5_SET(general_obj_in_cmd_hdr, din, obj_type, obj_type);
1068 		break;
1069 
1070 	case MLX5_CMD_OP_CREATE_UMEM:
1071 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1072 			 MLX5_CMD_OP_DESTROY_UMEM);
1073 		break;
1074 	case MLX5_CMD_OP_CREATE_MKEY:
1075 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_MKEY);
1076 		break;
1077 	case MLX5_CMD_OP_CREATE_CQ:
1078 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1079 		break;
1080 	case MLX5_CMD_OP_ALLOC_PD:
1081 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1082 		break;
1083 	case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1084 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1085 			 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1086 		break;
1087 	case MLX5_CMD_OP_CREATE_RMP:
1088 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1089 		break;
1090 	case MLX5_CMD_OP_CREATE_SQ:
1091 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1092 		break;
1093 	case MLX5_CMD_OP_CREATE_RQ:
1094 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1095 		break;
1096 	case MLX5_CMD_OP_CREATE_RQT:
1097 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1098 		break;
1099 	case MLX5_CMD_OP_CREATE_TIR:
1100 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1101 		break;
1102 	case MLX5_CMD_OP_CREATE_TIS:
1103 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1104 		break;
1105 	case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1106 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1107 			 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1108 		break;
1109 	case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1110 		*dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1111 		*obj_id = MLX5_GET(create_flow_table_out, out, table_id);
1112 		MLX5_SET(destroy_flow_table_in, din, other_vport,
1113 			 MLX5_GET(create_flow_table_in,  in, other_vport));
1114 		MLX5_SET(destroy_flow_table_in, din, vport_number,
1115 			 MLX5_GET(create_flow_table_in,  in, vport_number));
1116 		MLX5_SET(destroy_flow_table_in, din, table_type,
1117 			 MLX5_GET(create_flow_table_in,  in, table_type));
1118 		MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1119 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1120 			 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1121 		break;
1122 	case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1123 		*dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1124 		*obj_id = MLX5_GET(create_flow_group_out, out, group_id);
1125 		MLX5_SET(destroy_flow_group_in, din, other_vport,
1126 			 MLX5_GET(create_flow_group_in, in, other_vport));
1127 		MLX5_SET(destroy_flow_group_in, din, vport_number,
1128 			 MLX5_GET(create_flow_group_in, in, vport_number));
1129 		MLX5_SET(destroy_flow_group_in, din, table_type,
1130 			 MLX5_GET(create_flow_group_in, in, table_type));
1131 		MLX5_SET(destroy_flow_group_in, din, table_id,
1132 			 MLX5_GET(create_flow_group_in, in, table_id));
1133 		MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1134 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1135 			 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1136 		break;
1137 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1138 		*dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1139 		*obj_id = MLX5_GET(set_fte_in, in, flow_index);
1140 		MLX5_SET(delete_fte_in, din, other_vport,
1141 			 MLX5_GET(set_fte_in,  in, other_vport));
1142 		MLX5_SET(delete_fte_in, din, vport_number,
1143 			 MLX5_GET(set_fte_in, in, vport_number));
1144 		MLX5_SET(delete_fte_in, din, table_type,
1145 			 MLX5_GET(set_fte_in, in, table_type));
1146 		MLX5_SET(delete_fte_in, din, table_id,
1147 			 MLX5_GET(set_fte_in, in, table_id));
1148 		MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1149 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1150 			 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1151 		break;
1152 	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1153 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1154 			 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1155 		break;
1156 	case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1157 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1158 			 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1159 		break;
1160 	case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1161 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1162 			 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1163 		break;
1164 	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1165 		*dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1166 		*obj_id = MLX5_GET(create_scheduling_element_out, out,
1167 				   scheduling_element_id);
1168 		MLX5_SET(destroy_scheduling_element_in, din,
1169 			 scheduling_hierarchy,
1170 			 MLX5_GET(create_scheduling_element_in, in,
1171 				  scheduling_hierarchy));
1172 		MLX5_SET(destroy_scheduling_element_in, din,
1173 			 scheduling_element_id, *obj_id);
1174 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1175 			 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1176 		break;
1177 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1178 		*dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1179 		*obj_id = MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
1180 		MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1181 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1182 			 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1183 		break;
1184 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1185 		*dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1186 		*obj_id = MLX5_GET(set_l2_table_entry_in, in, table_index);
1187 		MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1188 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1189 			 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1190 		break;
1191 	case MLX5_CMD_OP_CREATE_QP:
1192 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1193 		break;
1194 	case MLX5_CMD_OP_CREATE_SRQ:
1195 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1196 		break;
1197 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
1198 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1199 			 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1200 		break;
1201 	case MLX5_CMD_OP_CREATE_DCT:
1202 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1203 		break;
1204 	case MLX5_CMD_OP_CREATE_XRQ:
1205 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1206 		break;
1207 	case MLX5_CMD_OP_ATTACH_TO_MCG:
1208 		*dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1209 		MLX5_SET(detach_from_mcg_in, din, qpn,
1210 			 MLX5_GET(attach_to_mcg_in, in, qpn));
1211 		memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1212 		       MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1213 		       MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1214 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DETACH_FROM_MCG);
1215 		break;
1216 	case MLX5_CMD_OP_ALLOC_XRCD:
1217 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
1218 		break;
1219 	default:
1220 		/* The entry must match to one of the devx_is_obj_create_cmd */
1221 		WARN_ON(true);
1222 		break;
1223 	}
1224 }
1225 
1226 static int devx_handle_mkey_indirect(struct devx_obj *obj,
1227 				     struct mlx5_ib_dev *dev,
1228 				     void *in, void *out)
1229 {
1230 	struct mlx5_ib_devx_mr *devx_mr = &obj->devx_mr;
1231 	struct mlx5_core_mkey *mkey;
1232 	void *mkc;
1233 	u8 key;
1234 
1235 	mkey = &devx_mr->mmkey;
1236 	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1237 	key = MLX5_GET(mkc, mkc, mkey_7_0);
1238 	mkey->key = mlx5_idx_to_mkey(
1239 			MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1240 	mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1241 	mkey->iova = MLX5_GET64(mkc, mkc, start_addr);
1242 	mkey->size = MLX5_GET64(mkc, mkc, len);
1243 	mkey->pd = MLX5_GET(mkc, mkc, pd);
1244 	devx_mr->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1245 
1246 	return xa_err(xa_store(&dev->mdev->priv.mkey_table,
1247 			       mlx5_base_mkey(mkey->key), mkey, GFP_KERNEL));
1248 }
1249 
1250 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1251 				   struct devx_obj *obj,
1252 				   void *in, int in_len)
1253 {
1254 	int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1255 			MLX5_FLD_SZ_BYTES(create_mkey_in,
1256 			memory_key_mkey_entry);
1257 	void *mkc;
1258 	u8 access_mode;
1259 
1260 	if (in_len < min_len)
1261 		return -EINVAL;
1262 
1263 	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1264 
1265 	access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1266 	access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1267 
1268 	if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1269 		access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1270 		if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1271 			obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1272 		return 0;
1273 	}
1274 
1275 	MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1276 	return 0;
1277 }
1278 
1279 static void devx_free_indirect_mkey(struct rcu_head *rcu)
1280 {
1281 	kfree(container_of(rcu, struct devx_obj, devx_mr.rcu));
1282 }
1283 
1284 /* This function to delete from the radix tree needs to be called before
1285  * destroying the underlying mkey. Otherwise a race might occur in case that
1286  * other thread will get the same mkey before this one will be deleted,
1287  * in that case it will fail via inserting to the tree its own data.
1288  *
1289  * Note:
1290  * An error in the destroy is not expected unless there is some other indirect
1291  * mkey which points to this one. In a kernel cleanup flow it will be just
1292  * destroyed in the iterative destruction call. In a user flow, in case
1293  * the application didn't close in the expected order it's its own problem,
1294  * the mkey won't be part of the tree, in both cases the kernel is safe.
1295  */
1296 static void devx_cleanup_mkey(struct devx_obj *obj)
1297 {
1298 	xa_erase(&obj->ib_dev->mdev->priv.mkey_table,
1299 		 mlx5_base_mkey(obj->devx_mr.mmkey.key));
1300 }
1301 
1302 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1303 				      struct devx_event_subscription *sub)
1304 {
1305 	struct devx_event *event;
1306 	struct devx_obj_event *xa_val_level2;
1307 
1308 	if (sub->is_cleaned)
1309 		return;
1310 
1311 	sub->is_cleaned = 1;
1312 	list_del_rcu(&sub->xa_list);
1313 
1314 	if (list_empty(&sub->obj_list))
1315 		return;
1316 
1317 	list_del_rcu(&sub->obj_list);
1318 	/* check whether key level 1 for this obj_sub_list is empty */
1319 	event = xa_load(&dev->devx_event_table.event_xa,
1320 			sub->xa_key_level1);
1321 	WARN_ON(!event);
1322 
1323 	xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1324 	if (list_empty(&xa_val_level2->obj_sub_list)) {
1325 		xa_erase(&event->object_ids,
1326 			 sub->xa_key_level2);
1327 		kfree_rcu(xa_val_level2, rcu);
1328 	}
1329 }
1330 
1331 static int devx_obj_cleanup(struct ib_uobject *uobject,
1332 			    enum rdma_remove_reason why,
1333 			    struct uverbs_attr_bundle *attrs)
1334 {
1335 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1336 	struct mlx5_devx_event_table *devx_event_table;
1337 	struct devx_obj *obj = uobject->object;
1338 	struct devx_event_subscription *sub_entry, *tmp;
1339 	struct mlx5_ib_dev *dev;
1340 	int ret;
1341 
1342 	dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1343 	if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY)
1344 		devx_cleanup_mkey(obj);
1345 
1346 	if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1347 		ret = mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct);
1348 	else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1349 		ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1350 	else
1351 		ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1352 				    obj->dinlen, out, sizeof(out));
1353 	if (ib_is_destroy_retryable(ret, why, uobject))
1354 		return ret;
1355 
1356 	devx_event_table = &dev->devx_event_table;
1357 
1358 	mutex_lock(&devx_event_table->event_xa_lock);
1359 	list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1360 		devx_cleanup_subscription(dev, sub_entry);
1361 	mutex_unlock(&devx_event_table->event_xa_lock);
1362 
1363 	if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1364 		call_srcu(&dev->mr_srcu, &obj->devx_mr.rcu,
1365 			  devx_free_indirect_mkey);
1366 		return ret;
1367 	}
1368 
1369 	kfree(obj);
1370 	return ret;
1371 }
1372 
1373 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1374 {
1375 	struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1376 	struct mlx5_devx_event_table *table;
1377 	struct devx_event *event;
1378 	struct devx_obj_event *obj_event;
1379 	u32 obj_id = mcq->cqn;
1380 
1381 	table = &obj->ib_dev->devx_event_table;
1382 	rcu_read_lock();
1383 	event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1384 	if (!event)
1385 		goto out;
1386 
1387 	obj_event = xa_load(&event->object_ids, obj_id);
1388 	if (!obj_event)
1389 		goto out;
1390 
1391 	dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1392 out:
1393 	rcu_read_unlock();
1394 }
1395 
1396 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1397 	struct uverbs_attr_bundle *attrs)
1398 {
1399 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1400 	int cmd_out_len =  uverbs_attr_get_len(attrs,
1401 					MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1402 	int cmd_in_len = uverbs_attr_get_len(attrs,
1403 					MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1404 	void *cmd_out;
1405 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1406 		attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1407 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1408 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1409 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1410 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1411 	struct devx_obj *obj;
1412 	u16 obj_type = 0;
1413 	int err;
1414 	int uid;
1415 	u32 obj_id;
1416 	u16 opcode;
1417 
1418 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1419 		return -EINVAL;
1420 
1421 	uid = devx_get_uid(c, cmd_in);
1422 	if (uid < 0)
1423 		return uid;
1424 
1425 	if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1426 		return -EINVAL;
1427 
1428 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1429 	if (IS_ERR(cmd_out))
1430 		return PTR_ERR(cmd_out);
1431 
1432 	obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1433 	if (!obj)
1434 		return -ENOMEM;
1435 
1436 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1437 	if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1438 		err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1439 		if (err)
1440 			goto obj_free;
1441 	} else {
1442 		devx_set_umem_valid(cmd_in);
1443 	}
1444 
1445 	if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1446 		obj->flags |= DEVX_OBJ_FLAGS_DCT;
1447 		err = mlx5_core_create_dct(dev->mdev, &obj->core_dct,
1448 					   cmd_in, cmd_in_len,
1449 					   cmd_out, cmd_out_len);
1450 	} else if (opcode == MLX5_CMD_OP_CREATE_CQ) {
1451 		obj->flags |= DEVX_OBJ_FLAGS_CQ;
1452 		obj->core_cq.comp = devx_cq_comp;
1453 		err = mlx5_core_create_cq(dev->mdev, &obj->core_cq,
1454 					  cmd_in, cmd_in_len, cmd_out,
1455 					  cmd_out_len);
1456 	} else {
1457 		err = mlx5_cmd_exec(dev->mdev, cmd_in,
1458 				    cmd_in_len,
1459 				    cmd_out, cmd_out_len);
1460 	}
1461 
1462 	if (err)
1463 		goto obj_free;
1464 
1465 	uobj->object = obj;
1466 	INIT_LIST_HEAD(&obj->event_sub);
1467 	obj->ib_dev = dev;
1468 	devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1469 				   &obj_id);
1470 	WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1471 
1472 	if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1473 		err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1474 		if (err)
1475 			goto obj_destroy;
1476 	}
1477 
1478 	err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1479 	if (err)
1480 		goto err_copy;
1481 
1482 	if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1483 		obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1484 
1485 	obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1486 
1487 	return 0;
1488 
1489 err_copy:
1490 	if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY)
1491 		devx_cleanup_mkey(obj);
1492 obj_destroy:
1493 	if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1494 		mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct);
1495 	else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1496 		mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1497 	else
1498 		mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1499 			      sizeof(out));
1500 obj_free:
1501 	kfree(obj);
1502 	return err;
1503 }
1504 
1505 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1506 	struct uverbs_attr_bundle *attrs)
1507 {
1508 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1509 	int cmd_out_len = uverbs_attr_get_len(attrs,
1510 					MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1511 	struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1512 							  MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1513 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1514 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1515 	struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1516 	void *cmd_out;
1517 	int err;
1518 	int uid;
1519 
1520 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1521 		return -EINVAL;
1522 
1523 	uid = devx_get_uid(c, cmd_in);
1524 	if (uid < 0)
1525 		return uid;
1526 
1527 	if (!devx_is_obj_modify_cmd(cmd_in))
1528 		return -EINVAL;
1529 
1530 	if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1531 		return -EINVAL;
1532 
1533 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1534 	if (IS_ERR(cmd_out))
1535 		return PTR_ERR(cmd_out);
1536 
1537 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1538 	devx_set_umem_valid(cmd_in);
1539 
1540 	err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1541 			    uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1542 			    cmd_out, cmd_out_len);
1543 	if (err)
1544 		return err;
1545 
1546 	return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1547 			      cmd_out, cmd_out_len);
1548 }
1549 
1550 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1551 	struct uverbs_attr_bundle *attrs)
1552 {
1553 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1554 	int cmd_out_len = uverbs_attr_get_len(attrs,
1555 					      MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1556 	struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1557 							  MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1558 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1559 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1560 	void *cmd_out;
1561 	int err;
1562 	int uid;
1563 	struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1564 
1565 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1566 		return -EINVAL;
1567 
1568 	uid = devx_get_uid(c, cmd_in);
1569 	if (uid < 0)
1570 		return uid;
1571 
1572 	if (!devx_is_obj_query_cmd(cmd_in))
1573 		return -EINVAL;
1574 
1575 	if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1576 		return -EINVAL;
1577 
1578 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1579 	if (IS_ERR(cmd_out))
1580 		return PTR_ERR(cmd_out);
1581 
1582 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1583 	err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1584 			    uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1585 			    cmd_out, cmd_out_len);
1586 	if (err)
1587 		return err;
1588 
1589 	return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1590 			      cmd_out, cmd_out_len);
1591 }
1592 
1593 struct devx_async_event_queue {
1594 	spinlock_t		lock;
1595 	wait_queue_head_t	poll_wait;
1596 	struct list_head	event_list;
1597 	atomic_t		bytes_in_use;
1598 	u8			is_destroyed:1;
1599 };
1600 
1601 struct devx_async_cmd_event_file {
1602 	struct ib_uobject		uobj;
1603 	struct devx_async_event_queue	ev_queue;
1604 	struct mlx5_async_ctx		async_ctx;
1605 };
1606 
1607 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1608 {
1609 	spin_lock_init(&ev_queue->lock);
1610 	INIT_LIST_HEAD(&ev_queue->event_list);
1611 	init_waitqueue_head(&ev_queue->poll_wait);
1612 	atomic_set(&ev_queue->bytes_in_use, 0);
1613 	ev_queue->is_destroyed = 0;
1614 }
1615 
1616 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1617 	struct uverbs_attr_bundle *attrs)
1618 {
1619 	struct devx_async_cmd_event_file *ev_file;
1620 
1621 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1622 		attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1623 	struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1624 
1625 	ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1626 			       uobj);
1627 	devx_init_event_queue(&ev_file->ev_queue);
1628 	mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1629 	return 0;
1630 }
1631 
1632 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1633 	struct uverbs_attr_bundle *attrs)
1634 {
1635 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1636 		attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1637 	struct devx_async_event_file *ev_file;
1638 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1639 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1640 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1641 	u32 flags;
1642 	int err;
1643 
1644 	err = uverbs_get_flags32(&flags, attrs,
1645 		MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1646 		MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1647 
1648 	if (err)
1649 		return err;
1650 
1651 	ev_file = container_of(uobj, struct devx_async_event_file,
1652 			       uobj);
1653 	spin_lock_init(&ev_file->lock);
1654 	INIT_LIST_HEAD(&ev_file->event_list);
1655 	init_waitqueue_head(&ev_file->poll_wait);
1656 	if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1657 		ev_file->omit_data = 1;
1658 	INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1659 	ev_file->dev = dev;
1660 	get_device(&dev->ib_dev.dev);
1661 	return 0;
1662 }
1663 
1664 static void devx_query_callback(int status, struct mlx5_async_work *context)
1665 {
1666 	struct devx_async_data *async_data =
1667 		container_of(context, struct devx_async_data, cb_work);
1668 	struct ib_uobject *fd_uobj = async_data->fd_uobj;
1669 	struct devx_async_cmd_event_file *ev_file;
1670 	struct devx_async_event_queue *ev_queue;
1671 	unsigned long flags;
1672 
1673 	ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1674 			       uobj);
1675 	ev_queue = &ev_file->ev_queue;
1676 
1677 	spin_lock_irqsave(&ev_queue->lock, flags);
1678 	list_add_tail(&async_data->list, &ev_queue->event_list);
1679 	spin_unlock_irqrestore(&ev_queue->lock, flags);
1680 
1681 	wake_up_interruptible(&ev_queue->poll_wait);
1682 	fput(fd_uobj->object);
1683 }
1684 
1685 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1686 
1687 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1688 	struct uverbs_attr_bundle *attrs)
1689 {
1690 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1691 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1692 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1693 				attrs,
1694 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1695 	u16 cmd_out_len;
1696 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1697 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1698 	struct ib_uobject *fd_uobj;
1699 	int err;
1700 	int uid;
1701 	struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1702 	struct devx_async_cmd_event_file *ev_file;
1703 	struct devx_async_data *async_data;
1704 
1705 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1706 		return -EINVAL;
1707 
1708 	uid = devx_get_uid(c, cmd_in);
1709 	if (uid < 0)
1710 		return uid;
1711 
1712 	if (!devx_is_obj_query_cmd(cmd_in))
1713 		return -EINVAL;
1714 
1715 	err = uverbs_get_const(&cmd_out_len, attrs,
1716 			       MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1717 	if (err)
1718 		return err;
1719 
1720 	if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1721 		return -EINVAL;
1722 
1723 	fd_uobj = uverbs_attr_get_uobject(attrs,
1724 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1725 	if (IS_ERR(fd_uobj))
1726 		return PTR_ERR(fd_uobj);
1727 
1728 	ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1729 			       uobj);
1730 
1731 	if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1732 			MAX_ASYNC_BYTES_IN_USE) {
1733 		atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1734 		return -EAGAIN;
1735 	}
1736 
1737 	async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1738 					  cmd_out_len), GFP_KERNEL);
1739 	if (!async_data) {
1740 		err = -ENOMEM;
1741 		goto sub_bytes;
1742 	}
1743 
1744 	err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1745 			       MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1746 	if (err)
1747 		goto free_async;
1748 
1749 	async_data->cmd_out_len = cmd_out_len;
1750 	async_data->mdev = mdev;
1751 	async_data->fd_uobj = fd_uobj;
1752 
1753 	get_file(fd_uobj->object);
1754 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1755 	err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1756 		    uverbs_attr_get_len(attrs,
1757 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1758 		    async_data->hdr.out_data,
1759 		    async_data->cmd_out_len,
1760 		    devx_query_callback, &async_data->cb_work);
1761 
1762 	if (err)
1763 		goto cb_err;
1764 
1765 	return 0;
1766 
1767 cb_err:
1768 	fput(fd_uobj->object);
1769 free_async:
1770 	kvfree(async_data);
1771 sub_bytes:
1772 	atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1773 	return err;
1774 }
1775 
1776 static void
1777 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1778 			   u32 key_level1,
1779 			   bool is_level2,
1780 			   u32 key_level2)
1781 {
1782 	struct devx_event *event;
1783 	struct devx_obj_event *xa_val_level2;
1784 
1785 	/* Level 1 is valid for future use, no need to free */
1786 	if (!is_level2)
1787 		return;
1788 
1789 	event = xa_load(&devx_event_table->event_xa, key_level1);
1790 	WARN_ON(!event);
1791 
1792 	xa_val_level2 = xa_load(&event->object_ids,
1793 				key_level2);
1794 	if (list_empty(&xa_val_level2->obj_sub_list)) {
1795 		xa_erase(&event->object_ids,
1796 			 key_level2);
1797 		kfree_rcu(xa_val_level2, rcu);
1798 	}
1799 }
1800 
1801 static int
1802 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1803 			 u32 key_level1,
1804 			 bool is_level2,
1805 			 u32 key_level2)
1806 {
1807 	struct devx_obj_event *obj_event;
1808 	struct devx_event *event;
1809 	int err;
1810 
1811 	event = xa_load(&devx_event_table->event_xa, key_level1);
1812 	if (!event) {
1813 		event = kzalloc(sizeof(*event), GFP_KERNEL);
1814 		if (!event)
1815 			return -ENOMEM;
1816 
1817 		INIT_LIST_HEAD(&event->unaffiliated_list);
1818 		xa_init(&event->object_ids);
1819 
1820 		err = xa_insert(&devx_event_table->event_xa,
1821 				key_level1,
1822 				event,
1823 				GFP_KERNEL);
1824 		if (err) {
1825 			kfree(event);
1826 			return err;
1827 		}
1828 	}
1829 
1830 	if (!is_level2)
1831 		return 0;
1832 
1833 	obj_event = xa_load(&event->object_ids, key_level2);
1834 	if (!obj_event) {
1835 		obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1836 		if (!obj_event)
1837 			/* Level1 is valid for future use, no need to free */
1838 			return -ENOMEM;
1839 
1840 		err = xa_insert(&event->object_ids,
1841 				key_level2,
1842 				obj_event,
1843 				GFP_KERNEL);
1844 		if (err)
1845 			return err;
1846 		INIT_LIST_HEAD(&obj_event->obj_sub_list);
1847 	}
1848 
1849 	return 0;
1850 }
1851 
1852 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1853 				   struct devx_obj *obj)
1854 {
1855 	int i;
1856 
1857 	for (i = 0; i < num_events; i++) {
1858 		if (obj) {
1859 			if (!is_legacy_obj_event_num(event_type_num_list[i]))
1860 				return false;
1861 		} else if (!is_legacy_unaffiliated_event_num(
1862 				event_type_num_list[i])) {
1863 			return false;
1864 		}
1865 	}
1866 
1867 	return true;
1868 }
1869 
1870 #define MAX_SUPP_EVENT_NUM 255
1871 static bool is_valid_events(struct mlx5_core_dev *dev,
1872 			    int num_events, u16 *event_type_num_list,
1873 			    struct devx_obj *obj)
1874 {
1875 	__be64 *aff_events;
1876 	__be64 *unaff_events;
1877 	int mask_entry;
1878 	int mask_bit;
1879 	int i;
1880 
1881 	if (MLX5_CAP_GEN(dev, event_cap)) {
1882 		aff_events = MLX5_CAP_DEV_EVENT(dev,
1883 						user_affiliated_events);
1884 		unaff_events = MLX5_CAP_DEV_EVENT(dev,
1885 						  user_unaffiliated_events);
1886 	} else {
1887 		return is_valid_events_legacy(num_events, event_type_num_list,
1888 					      obj);
1889 	}
1890 
1891 	for (i = 0; i < num_events; i++) {
1892 		if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1893 			return false;
1894 
1895 		mask_entry = event_type_num_list[i] / 64;
1896 		mask_bit = event_type_num_list[i] % 64;
1897 
1898 		if (obj) {
1899 			/* CQ completion */
1900 			if (event_type_num_list[i] == 0)
1901 				continue;
1902 
1903 			if (!(be64_to_cpu(aff_events[mask_entry]) &
1904 					(1ull << mask_bit)))
1905 				return false;
1906 
1907 			continue;
1908 		}
1909 
1910 		if (!(be64_to_cpu(unaff_events[mask_entry]) &
1911 				(1ull << mask_bit)))
1912 			return false;
1913 	}
1914 
1915 	return true;
1916 }
1917 
1918 #define MAX_NUM_EVENTS 16
1919 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1920 	struct uverbs_attr_bundle *attrs)
1921 {
1922 	struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1923 				attrs,
1924 				MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1925 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1926 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1927 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1928 	struct ib_uobject *fd_uobj;
1929 	struct devx_obj *obj = NULL;
1930 	struct devx_async_event_file *ev_file;
1931 	struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
1932 	u16 *event_type_num_list;
1933 	struct devx_event_subscription *event_sub, *tmp_sub;
1934 	struct list_head sub_list;
1935 	int redirect_fd;
1936 	bool use_eventfd = false;
1937 	int num_events;
1938 	int num_alloc_xa_entries = 0;
1939 	u16 obj_type = 0;
1940 	u64 cookie = 0;
1941 	u32 obj_id = 0;
1942 	int err;
1943 	int i;
1944 
1945 	if (!c->devx_uid)
1946 		return -EINVAL;
1947 
1948 	if (!IS_ERR(devx_uobj)) {
1949 		obj = (struct devx_obj *)devx_uobj->object;
1950 		if (obj)
1951 			obj_id = get_dec_obj_id(obj->obj_id);
1952 	}
1953 
1954 	fd_uobj = uverbs_attr_get_uobject(attrs,
1955 				MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
1956 	if (IS_ERR(fd_uobj))
1957 		return PTR_ERR(fd_uobj);
1958 
1959 	ev_file = container_of(fd_uobj, struct devx_async_event_file,
1960 			       uobj);
1961 
1962 	if (uverbs_attr_is_valid(attrs,
1963 				 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
1964 		err = uverbs_copy_from(&redirect_fd, attrs,
1965 			       MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
1966 		if (err)
1967 			return err;
1968 
1969 		use_eventfd = true;
1970 	}
1971 
1972 	if (uverbs_attr_is_valid(attrs,
1973 				 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
1974 		if (use_eventfd)
1975 			return -EINVAL;
1976 
1977 		err = uverbs_copy_from(&cookie, attrs,
1978 				MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
1979 		if (err)
1980 			return err;
1981 	}
1982 
1983 	num_events = uverbs_attr_ptr_get_array_size(
1984 		attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
1985 		sizeof(u16));
1986 
1987 	if (num_events < 0)
1988 		return num_events;
1989 
1990 	if (num_events > MAX_NUM_EVENTS)
1991 		return -EINVAL;
1992 
1993 	event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
1994 			MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
1995 
1996 	if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
1997 		return -EINVAL;
1998 
1999 	INIT_LIST_HEAD(&sub_list);
2000 
2001 	/* Protect from concurrent subscriptions to same XA entries to allow
2002 	 * both to succeed
2003 	 */
2004 	mutex_lock(&devx_event_table->event_xa_lock);
2005 	for (i = 0; i < num_events; i++) {
2006 		u32 key_level1;
2007 
2008 		if (obj)
2009 			obj_type = get_dec_obj_type(obj,
2010 						    event_type_num_list[i]);
2011 		key_level1 = event_type_num_list[i] | obj_type << 16;
2012 
2013 		err = subscribe_event_xa_alloc(devx_event_table,
2014 					       key_level1,
2015 					       obj,
2016 					       obj_id);
2017 		if (err)
2018 			goto err;
2019 
2020 		num_alloc_xa_entries++;
2021 		event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2022 		if (!event_sub)
2023 			goto err;
2024 
2025 		list_add_tail(&event_sub->event_list, &sub_list);
2026 		if (use_eventfd) {
2027 			event_sub->eventfd =
2028 				eventfd_ctx_fdget(redirect_fd);
2029 
2030 			if (IS_ERR(event_sub->eventfd)) {
2031 				err = PTR_ERR(event_sub->eventfd);
2032 				event_sub->eventfd = NULL;
2033 				goto err;
2034 			}
2035 		}
2036 
2037 		event_sub->cookie = cookie;
2038 		event_sub->ev_file = ev_file;
2039 		event_sub->filp = fd_uobj->object;
2040 		/* May be needed upon cleanup the devx object/subscription */
2041 		event_sub->xa_key_level1 = key_level1;
2042 		event_sub->xa_key_level2 = obj_id;
2043 		INIT_LIST_HEAD(&event_sub->obj_list);
2044 	}
2045 
2046 	/* Once all the allocations and the XA data insertions were done we
2047 	 * can go ahead and add all the subscriptions to the relevant lists
2048 	 * without concern of a failure.
2049 	 */
2050 	list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2051 		struct devx_event *event;
2052 		struct devx_obj_event *obj_event;
2053 
2054 		list_del_init(&event_sub->event_list);
2055 
2056 		spin_lock_irq(&ev_file->lock);
2057 		list_add_tail_rcu(&event_sub->file_list,
2058 				  &ev_file->subscribed_events_list);
2059 		spin_unlock_irq(&ev_file->lock);
2060 
2061 		event = xa_load(&devx_event_table->event_xa,
2062 				event_sub->xa_key_level1);
2063 		WARN_ON(!event);
2064 
2065 		if (!obj) {
2066 			list_add_tail_rcu(&event_sub->xa_list,
2067 					  &event->unaffiliated_list);
2068 			continue;
2069 		}
2070 
2071 		obj_event = xa_load(&event->object_ids, obj_id);
2072 		WARN_ON(!obj_event);
2073 		list_add_tail_rcu(&event_sub->xa_list,
2074 				  &obj_event->obj_sub_list);
2075 		list_add_tail_rcu(&event_sub->obj_list,
2076 				  &obj->event_sub);
2077 	}
2078 
2079 	mutex_unlock(&devx_event_table->event_xa_lock);
2080 	return 0;
2081 
2082 err:
2083 	list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2084 		list_del(&event_sub->event_list);
2085 
2086 		subscribe_event_xa_dealloc(devx_event_table,
2087 					   event_sub->xa_key_level1,
2088 					   obj,
2089 					   obj_id);
2090 
2091 		if (event_sub->eventfd)
2092 			eventfd_ctx_put(event_sub->eventfd);
2093 
2094 		kfree(event_sub);
2095 	}
2096 
2097 	mutex_unlock(&devx_event_table->event_xa_lock);
2098 	return err;
2099 }
2100 
2101 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2102 			 struct uverbs_attr_bundle *attrs,
2103 			 struct devx_umem *obj)
2104 {
2105 	u64 addr;
2106 	size_t size;
2107 	u32 access;
2108 	int npages;
2109 	int err;
2110 	u32 page_mask;
2111 
2112 	if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2113 	    uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2114 		return -EFAULT;
2115 
2116 	err = uverbs_get_flags32(&access, attrs,
2117 				 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2118 				 IB_ACCESS_LOCAL_WRITE |
2119 				 IB_ACCESS_REMOTE_WRITE |
2120 				 IB_ACCESS_REMOTE_READ);
2121 	if (err)
2122 		return err;
2123 
2124 	err = ib_check_mr_access(access);
2125 	if (err)
2126 		return err;
2127 
2128 	obj->umem = ib_umem_get(&attrs->driver_udata, addr, size, access, 0);
2129 	if (IS_ERR(obj->umem))
2130 		return PTR_ERR(obj->umem);
2131 
2132 	mlx5_ib_cont_pages(obj->umem, obj->umem->address,
2133 			   MLX5_MKEY_PAGE_SHIFT_MASK, &npages,
2134 			   &obj->page_shift, &obj->ncont, NULL);
2135 
2136 	if (!npages) {
2137 		ib_umem_release(obj->umem);
2138 		return -EINVAL;
2139 	}
2140 
2141 	page_mask = (1 << obj->page_shift) - 1;
2142 	obj->page_offset = obj->umem->address & page_mask;
2143 
2144 	return 0;
2145 }
2146 
2147 static int devx_umem_reg_cmd_alloc(struct uverbs_attr_bundle *attrs,
2148 				   struct devx_umem *obj,
2149 				   struct devx_umem_reg_cmd *cmd)
2150 {
2151 	cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2152 		    (MLX5_ST_SZ_BYTES(mtt) * obj->ncont);
2153 	cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2154 	return PTR_ERR_OR_ZERO(cmd->in);
2155 }
2156 
2157 static void devx_umem_reg_cmd_build(struct mlx5_ib_dev *dev,
2158 				    struct devx_umem *obj,
2159 				    struct devx_umem_reg_cmd *cmd)
2160 {
2161 	void *umem;
2162 	__be64 *mtt;
2163 
2164 	umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2165 	mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2166 
2167 	MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2168 	MLX5_SET64(umem, umem, num_of_mtt, obj->ncont);
2169 	MLX5_SET(umem, umem, log_page_size, obj->page_shift -
2170 					    MLX5_ADAPTER_PAGE_SHIFT);
2171 	MLX5_SET(umem, umem, page_offset, obj->page_offset);
2172 	mlx5_ib_populate_pas(dev, obj->umem, obj->page_shift, mtt,
2173 			     (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2174 			     MLX5_IB_MTT_READ);
2175 }
2176 
2177 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2178 	struct uverbs_attr_bundle *attrs)
2179 {
2180 	struct devx_umem_reg_cmd cmd;
2181 	struct devx_umem *obj;
2182 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
2183 		attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2184 	u32 obj_id;
2185 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2186 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2187 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2188 	int err;
2189 
2190 	if (!c->devx_uid)
2191 		return -EINVAL;
2192 
2193 	obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2194 	if (!obj)
2195 		return -ENOMEM;
2196 
2197 	err = devx_umem_get(dev, &c->ibucontext, attrs, obj);
2198 	if (err)
2199 		goto err_obj_free;
2200 
2201 	err = devx_umem_reg_cmd_alloc(attrs, obj, &cmd);
2202 	if (err)
2203 		goto err_umem_release;
2204 
2205 	devx_umem_reg_cmd_build(dev, obj, &cmd);
2206 
2207 	MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2208 	err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2209 			    sizeof(cmd.out));
2210 	if (err)
2211 		goto err_umem_release;
2212 
2213 	obj->mdev = dev->mdev;
2214 	uobj->object = obj;
2215 	devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2216 	err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id, sizeof(obj_id));
2217 	if (err)
2218 		goto err_umem_destroy;
2219 
2220 	return 0;
2221 
2222 err_umem_destroy:
2223 	mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, cmd.out, sizeof(cmd.out));
2224 err_umem_release:
2225 	ib_umem_release(obj->umem);
2226 err_obj_free:
2227 	kfree(obj);
2228 	return err;
2229 }
2230 
2231 static int devx_umem_cleanup(struct ib_uobject *uobject,
2232 			     enum rdma_remove_reason why,
2233 			     struct uverbs_attr_bundle *attrs)
2234 {
2235 	struct devx_umem *obj = uobject->object;
2236 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2237 	int err;
2238 
2239 	err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2240 	if (ib_is_destroy_retryable(err, why, uobject))
2241 		return err;
2242 
2243 	ib_umem_release(obj->umem);
2244 	kfree(obj);
2245 	return 0;
2246 }
2247 
2248 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2249 				  unsigned long event_type)
2250 {
2251 	__be64 *unaff_events;
2252 	int mask_entry;
2253 	int mask_bit;
2254 
2255 	if (!MLX5_CAP_GEN(dev, event_cap))
2256 		return is_legacy_unaffiliated_event_num(event_type);
2257 
2258 	unaff_events = MLX5_CAP_DEV_EVENT(dev,
2259 					  user_unaffiliated_events);
2260 	WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2261 
2262 	mask_entry = event_type / 64;
2263 	mask_bit = event_type % 64;
2264 
2265 	if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2266 		return false;
2267 
2268 	return true;
2269 }
2270 
2271 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2272 {
2273 	struct mlx5_eqe *eqe = data;
2274 	u32 obj_id = 0;
2275 
2276 	switch (event_type) {
2277 	case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2278 	case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2279 	case MLX5_EVENT_TYPE_PATH_MIG:
2280 	case MLX5_EVENT_TYPE_COMM_EST:
2281 	case MLX5_EVENT_TYPE_SQ_DRAINED:
2282 	case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2283 	case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2284 	case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2285 	case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2286 	case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2287 		obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2288 		break;
2289 	case MLX5_EVENT_TYPE_DCT_DRAINED:
2290 		obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2291 		break;
2292 	case MLX5_EVENT_TYPE_CQ_ERROR:
2293 		obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2294 		break;
2295 	default:
2296 		obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2297 		break;
2298 	}
2299 
2300 	return obj_id;
2301 }
2302 
2303 static int deliver_event(struct devx_event_subscription *event_sub,
2304 			 const void *data)
2305 {
2306 	struct devx_async_event_file *ev_file;
2307 	struct devx_async_event_data *event_data;
2308 	unsigned long flags;
2309 
2310 	ev_file = event_sub->ev_file;
2311 
2312 	if (ev_file->omit_data) {
2313 		spin_lock_irqsave(&ev_file->lock, flags);
2314 		if (!list_empty(&event_sub->event_list)) {
2315 			spin_unlock_irqrestore(&ev_file->lock, flags);
2316 			return 0;
2317 		}
2318 
2319 		list_add_tail(&event_sub->event_list, &ev_file->event_list);
2320 		spin_unlock_irqrestore(&ev_file->lock, flags);
2321 		wake_up_interruptible(&ev_file->poll_wait);
2322 		return 0;
2323 	}
2324 
2325 	event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2326 			     GFP_ATOMIC);
2327 	if (!event_data) {
2328 		spin_lock_irqsave(&ev_file->lock, flags);
2329 		ev_file->is_overflow_err = 1;
2330 		spin_unlock_irqrestore(&ev_file->lock, flags);
2331 		return -ENOMEM;
2332 	}
2333 
2334 	event_data->hdr.cookie = event_sub->cookie;
2335 	memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2336 
2337 	spin_lock_irqsave(&ev_file->lock, flags);
2338 	list_add_tail(&event_data->list, &ev_file->event_list);
2339 	spin_unlock_irqrestore(&ev_file->lock, flags);
2340 	wake_up_interruptible(&ev_file->poll_wait);
2341 
2342 	return 0;
2343 }
2344 
2345 static void dispatch_event_fd(struct list_head *fd_list,
2346 			      const void *data)
2347 {
2348 	struct devx_event_subscription *item;
2349 
2350 	list_for_each_entry_rcu(item, fd_list, xa_list) {
2351 		if (!get_file_rcu(item->filp))
2352 			continue;
2353 
2354 		if (item->eventfd) {
2355 			eventfd_signal(item->eventfd, 1);
2356 			fput(item->filp);
2357 			continue;
2358 		}
2359 
2360 		deliver_event(item, data);
2361 		fput(item->filp);
2362 	}
2363 }
2364 
2365 static int devx_event_notifier(struct notifier_block *nb,
2366 			       unsigned long event_type, void *data)
2367 {
2368 	struct mlx5_devx_event_table *table;
2369 	struct mlx5_ib_dev *dev;
2370 	struct devx_event *event;
2371 	struct devx_obj_event *obj_event;
2372 	u16 obj_type = 0;
2373 	bool is_unaffiliated;
2374 	u32 obj_id;
2375 
2376 	/* Explicit filtering to kernel events which may occur frequently */
2377 	if (event_type == MLX5_EVENT_TYPE_CMD ||
2378 	    event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2379 		return NOTIFY_OK;
2380 
2381 	table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2382 	dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2383 	is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2384 
2385 	if (!is_unaffiliated)
2386 		obj_type = get_event_obj_type(event_type, data);
2387 
2388 	rcu_read_lock();
2389 	event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2390 	if (!event) {
2391 		rcu_read_unlock();
2392 		return NOTIFY_DONE;
2393 	}
2394 
2395 	if (is_unaffiliated) {
2396 		dispatch_event_fd(&event->unaffiliated_list, data);
2397 		rcu_read_unlock();
2398 		return NOTIFY_OK;
2399 	}
2400 
2401 	obj_id = devx_get_obj_id_from_event(event_type, data);
2402 	obj_event = xa_load(&event->object_ids, obj_id);
2403 	if (!obj_event) {
2404 		rcu_read_unlock();
2405 		return NOTIFY_DONE;
2406 	}
2407 
2408 	dispatch_event_fd(&obj_event->obj_sub_list, data);
2409 
2410 	rcu_read_unlock();
2411 	return NOTIFY_OK;
2412 }
2413 
2414 void mlx5_ib_devx_init_event_table(struct mlx5_ib_dev *dev)
2415 {
2416 	struct mlx5_devx_event_table *table = &dev->devx_event_table;
2417 
2418 	xa_init(&table->event_xa);
2419 	mutex_init(&table->event_xa_lock);
2420 	MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2421 	mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2422 }
2423 
2424 void mlx5_ib_devx_cleanup_event_table(struct mlx5_ib_dev *dev)
2425 {
2426 	struct mlx5_devx_event_table *table = &dev->devx_event_table;
2427 	struct devx_event_subscription *sub, *tmp;
2428 	struct devx_event *event;
2429 	void *entry;
2430 	unsigned long id;
2431 
2432 	mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2433 	mutex_lock(&dev->devx_event_table.event_xa_lock);
2434 	xa_for_each(&table->event_xa, id, entry) {
2435 		event = entry;
2436 		list_for_each_entry_safe(sub, tmp, &event->unaffiliated_list,
2437 					 xa_list)
2438 			devx_cleanup_subscription(dev, sub);
2439 		kfree(entry);
2440 	}
2441 	mutex_unlock(&dev->devx_event_table.event_xa_lock);
2442 	xa_destroy(&table->event_xa);
2443 }
2444 
2445 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2446 					 size_t count, loff_t *pos)
2447 {
2448 	struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2449 	struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2450 	struct devx_async_data *event;
2451 	int ret = 0;
2452 	size_t eventsz;
2453 
2454 	spin_lock_irq(&ev_queue->lock);
2455 
2456 	while (list_empty(&ev_queue->event_list)) {
2457 		spin_unlock_irq(&ev_queue->lock);
2458 
2459 		if (filp->f_flags & O_NONBLOCK)
2460 			return -EAGAIN;
2461 
2462 		if (wait_event_interruptible(
2463 			    ev_queue->poll_wait,
2464 			    (!list_empty(&ev_queue->event_list) ||
2465 			     ev_queue->is_destroyed))) {
2466 			return -ERESTARTSYS;
2467 		}
2468 
2469 		if (list_empty(&ev_queue->event_list) &&
2470 		    ev_queue->is_destroyed)
2471 			return -EIO;
2472 
2473 		spin_lock_irq(&ev_queue->lock);
2474 	}
2475 
2476 	event = list_entry(ev_queue->event_list.next,
2477 			   struct devx_async_data, list);
2478 	eventsz = event->cmd_out_len +
2479 			sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2480 
2481 	if (eventsz > count) {
2482 		spin_unlock_irq(&ev_queue->lock);
2483 		return -ENOSPC;
2484 	}
2485 
2486 	list_del(ev_queue->event_list.next);
2487 	spin_unlock_irq(&ev_queue->lock);
2488 
2489 	if (copy_to_user(buf, &event->hdr, eventsz))
2490 		ret = -EFAULT;
2491 	else
2492 		ret = eventsz;
2493 
2494 	atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2495 	kvfree(event);
2496 	return ret;
2497 }
2498 
2499 static int devx_async_cmd_event_close(struct inode *inode, struct file *filp)
2500 {
2501 	struct ib_uobject *uobj = filp->private_data;
2502 	struct devx_async_cmd_event_file *comp_ev_file = container_of(
2503 		uobj, struct devx_async_cmd_event_file, uobj);
2504 	struct devx_async_data *entry, *tmp;
2505 
2506 	spin_lock_irq(&comp_ev_file->ev_queue.lock);
2507 	list_for_each_entry_safe(entry, tmp,
2508 				 &comp_ev_file->ev_queue.event_list, list)
2509 		kvfree(entry);
2510 	spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2511 
2512 	uverbs_close_fd(filp);
2513 	return 0;
2514 }
2515 
2516 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2517 					      struct poll_table_struct *wait)
2518 {
2519 	struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2520 	struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2521 	__poll_t pollflags = 0;
2522 
2523 	poll_wait(filp, &ev_queue->poll_wait, wait);
2524 
2525 	spin_lock_irq(&ev_queue->lock);
2526 	if (ev_queue->is_destroyed)
2527 		pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2528 	else if (!list_empty(&ev_queue->event_list))
2529 		pollflags = EPOLLIN | EPOLLRDNORM;
2530 	spin_unlock_irq(&ev_queue->lock);
2531 
2532 	return pollflags;
2533 }
2534 
2535 static const struct file_operations devx_async_cmd_event_fops = {
2536 	.owner	 = THIS_MODULE,
2537 	.read	 = devx_async_cmd_event_read,
2538 	.poll    = devx_async_cmd_event_poll,
2539 	.release = devx_async_cmd_event_close,
2540 	.llseek	 = no_llseek,
2541 };
2542 
2543 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2544 				     size_t count, loff_t *pos)
2545 {
2546 	struct devx_async_event_file *ev_file = filp->private_data;
2547 	struct devx_event_subscription *event_sub;
2548 	struct devx_async_event_data *uninitialized_var(event);
2549 	int ret = 0;
2550 	size_t eventsz;
2551 	bool omit_data;
2552 	void *event_data;
2553 
2554 	omit_data = ev_file->omit_data;
2555 
2556 	spin_lock_irq(&ev_file->lock);
2557 
2558 	if (ev_file->is_overflow_err) {
2559 		ev_file->is_overflow_err = 0;
2560 		spin_unlock_irq(&ev_file->lock);
2561 		return -EOVERFLOW;
2562 	}
2563 
2564 	if (ev_file->is_destroyed) {
2565 		spin_unlock_irq(&ev_file->lock);
2566 		return -EIO;
2567 	}
2568 
2569 	while (list_empty(&ev_file->event_list)) {
2570 		spin_unlock_irq(&ev_file->lock);
2571 
2572 		if (filp->f_flags & O_NONBLOCK)
2573 			return -EAGAIN;
2574 
2575 		if (wait_event_interruptible(ev_file->poll_wait,
2576 			    (!list_empty(&ev_file->event_list) ||
2577 			     ev_file->is_destroyed))) {
2578 			return -ERESTARTSYS;
2579 		}
2580 
2581 		spin_lock_irq(&ev_file->lock);
2582 		if (ev_file->is_destroyed) {
2583 			spin_unlock_irq(&ev_file->lock);
2584 			return -EIO;
2585 		}
2586 	}
2587 
2588 	if (omit_data) {
2589 		event_sub = list_first_entry(&ev_file->event_list,
2590 					struct devx_event_subscription,
2591 					event_list);
2592 		eventsz = sizeof(event_sub->cookie);
2593 		event_data = &event_sub->cookie;
2594 	} else {
2595 		event = list_first_entry(&ev_file->event_list,
2596 				      struct devx_async_event_data, list);
2597 		eventsz = sizeof(struct mlx5_eqe) +
2598 			sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2599 		event_data = &event->hdr;
2600 	}
2601 
2602 	if (eventsz > count) {
2603 		spin_unlock_irq(&ev_file->lock);
2604 		return -EINVAL;
2605 	}
2606 
2607 	if (omit_data)
2608 		list_del_init(&event_sub->event_list);
2609 	else
2610 		list_del(&event->list);
2611 
2612 	spin_unlock_irq(&ev_file->lock);
2613 
2614 	if (copy_to_user(buf, event_data, eventsz))
2615 		/* This points to an application issue, not a kernel concern */
2616 		ret = -EFAULT;
2617 	else
2618 		ret = eventsz;
2619 
2620 	if (!omit_data)
2621 		kfree(event);
2622 	return ret;
2623 }
2624 
2625 static __poll_t devx_async_event_poll(struct file *filp,
2626 				      struct poll_table_struct *wait)
2627 {
2628 	struct devx_async_event_file *ev_file = filp->private_data;
2629 	__poll_t pollflags = 0;
2630 
2631 	poll_wait(filp, &ev_file->poll_wait, wait);
2632 
2633 	spin_lock_irq(&ev_file->lock);
2634 	if (ev_file->is_destroyed)
2635 		pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2636 	else if (!list_empty(&ev_file->event_list))
2637 		pollflags = EPOLLIN | EPOLLRDNORM;
2638 	spin_unlock_irq(&ev_file->lock);
2639 
2640 	return pollflags;
2641 }
2642 
2643 static int devx_async_event_close(struct inode *inode, struct file *filp)
2644 {
2645 	struct devx_async_event_file *ev_file = filp->private_data;
2646 	struct devx_event_subscription *event_sub, *event_sub_tmp;
2647 	struct devx_async_event_data *entry, *tmp;
2648 	struct mlx5_ib_dev *dev = ev_file->dev;
2649 
2650 	mutex_lock(&dev->devx_event_table.event_xa_lock);
2651 	/* delete the subscriptions which are related to this FD */
2652 	list_for_each_entry_safe(event_sub, event_sub_tmp,
2653 				 &ev_file->subscribed_events_list, file_list) {
2654 		devx_cleanup_subscription(dev, event_sub);
2655 		if (event_sub->eventfd)
2656 			eventfd_ctx_put(event_sub->eventfd);
2657 
2658 		list_del_rcu(&event_sub->file_list);
2659 		/* subscription may not be used by the read API any more */
2660 		kfree_rcu(event_sub, rcu);
2661 	}
2662 
2663 	mutex_unlock(&dev->devx_event_table.event_xa_lock);
2664 
2665 	/* free the pending events allocation */
2666 	if (!ev_file->omit_data) {
2667 		spin_lock_irq(&ev_file->lock);
2668 		list_for_each_entry_safe(entry, tmp,
2669 					 &ev_file->event_list, list)
2670 			kfree(entry); /* read can't come any more */
2671 		spin_unlock_irq(&ev_file->lock);
2672 	}
2673 
2674 	uverbs_close_fd(filp);
2675 	put_device(&dev->ib_dev.dev);
2676 	return 0;
2677 }
2678 
2679 static const struct file_operations devx_async_event_fops = {
2680 	.owner	 = THIS_MODULE,
2681 	.read	 = devx_async_event_read,
2682 	.poll    = devx_async_event_poll,
2683 	.release = devx_async_event_close,
2684 	.llseek	 = no_llseek,
2685 };
2686 
2687 static int devx_hot_unplug_async_cmd_event_file(struct ib_uobject *uobj,
2688 						   enum rdma_remove_reason why)
2689 {
2690 	struct devx_async_cmd_event_file *comp_ev_file =
2691 		container_of(uobj, struct devx_async_cmd_event_file,
2692 			     uobj);
2693 	struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2694 
2695 	spin_lock_irq(&ev_queue->lock);
2696 	ev_queue->is_destroyed = 1;
2697 	spin_unlock_irq(&ev_queue->lock);
2698 
2699 	if (why == RDMA_REMOVE_DRIVER_REMOVE)
2700 		wake_up_interruptible(&ev_queue->poll_wait);
2701 
2702 	mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2703 	return 0;
2704 };
2705 
2706 static int devx_hot_unplug_async_event_file(struct ib_uobject *uobj,
2707 					    enum rdma_remove_reason why)
2708 {
2709 	struct devx_async_event_file *ev_file =
2710 		container_of(uobj, struct devx_async_event_file,
2711 			     uobj);
2712 
2713 	spin_lock_irq(&ev_file->lock);
2714 	ev_file->is_destroyed = 1;
2715 	spin_unlock_irq(&ev_file->lock);
2716 
2717 	wake_up_interruptible(&ev_file->poll_wait);
2718 	return 0;
2719 };
2720 
2721 DECLARE_UVERBS_NAMED_METHOD(
2722 	MLX5_IB_METHOD_DEVX_UMEM_REG,
2723 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2724 			MLX5_IB_OBJECT_DEVX_UMEM,
2725 			UVERBS_ACCESS_NEW,
2726 			UA_MANDATORY),
2727 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2728 			   UVERBS_ATTR_TYPE(u64),
2729 			   UA_MANDATORY),
2730 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2731 			   UVERBS_ATTR_TYPE(u64),
2732 			   UA_MANDATORY),
2733 	UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2734 			     enum ib_access_flags),
2735 	UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2736 			    UVERBS_ATTR_TYPE(u32),
2737 			    UA_MANDATORY));
2738 
2739 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2740 	MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2741 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2742 			MLX5_IB_OBJECT_DEVX_UMEM,
2743 			UVERBS_ACCESS_DESTROY,
2744 			UA_MANDATORY));
2745 
2746 DECLARE_UVERBS_NAMED_METHOD(
2747 	MLX5_IB_METHOD_DEVX_QUERY_EQN,
2748 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2749 			   UVERBS_ATTR_TYPE(u32),
2750 			   UA_MANDATORY),
2751 	UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2752 			    UVERBS_ATTR_TYPE(u32),
2753 			    UA_MANDATORY));
2754 
2755 DECLARE_UVERBS_NAMED_METHOD(
2756 	MLX5_IB_METHOD_DEVX_QUERY_UAR,
2757 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2758 			   UVERBS_ATTR_TYPE(u32),
2759 			   UA_MANDATORY),
2760 	UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2761 			    UVERBS_ATTR_TYPE(u32),
2762 			    UA_MANDATORY));
2763 
2764 DECLARE_UVERBS_NAMED_METHOD(
2765 	MLX5_IB_METHOD_DEVX_OTHER,
2766 	UVERBS_ATTR_PTR_IN(
2767 		MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2768 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2769 		UA_MANDATORY,
2770 		UA_ALLOC_AND_COPY),
2771 	UVERBS_ATTR_PTR_OUT(
2772 		MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2773 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2774 		UA_MANDATORY));
2775 
2776 DECLARE_UVERBS_NAMED_METHOD(
2777 	MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2778 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2779 			MLX5_IB_OBJECT_DEVX_OBJ,
2780 			UVERBS_ACCESS_NEW,
2781 			UA_MANDATORY),
2782 	UVERBS_ATTR_PTR_IN(
2783 		MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2784 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2785 		UA_MANDATORY,
2786 		UA_ALLOC_AND_COPY),
2787 	UVERBS_ATTR_PTR_OUT(
2788 		MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2789 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2790 		UA_MANDATORY));
2791 
2792 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2793 	MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2794 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2795 			MLX5_IB_OBJECT_DEVX_OBJ,
2796 			UVERBS_ACCESS_DESTROY,
2797 			UA_MANDATORY));
2798 
2799 DECLARE_UVERBS_NAMED_METHOD(
2800 	MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2801 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2802 			UVERBS_IDR_ANY_OBJECT,
2803 			UVERBS_ACCESS_WRITE,
2804 			UA_MANDATORY),
2805 	UVERBS_ATTR_PTR_IN(
2806 		MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2807 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2808 		UA_MANDATORY,
2809 		UA_ALLOC_AND_COPY),
2810 	UVERBS_ATTR_PTR_OUT(
2811 		MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2812 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2813 		UA_MANDATORY));
2814 
2815 DECLARE_UVERBS_NAMED_METHOD(
2816 	MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2817 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2818 			UVERBS_IDR_ANY_OBJECT,
2819 			UVERBS_ACCESS_READ,
2820 			UA_MANDATORY),
2821 	UVERBS_ATTR_PTR_IN(
2822 		MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2823 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2824 		UA_MANDATORY,
2825 		UA_ALLOC_AND_COPY),
2826 	UVERBS_ATTR_PTR_OUT(
2827 		MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2828 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2829 		UA_MANDATORY));
2830 
2831 DECLARE_UVERBS_NAMED_METHOD(
2832 	MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2833 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2834 			UVERBS_IDR_ANY_OBJECT,
2835 			UVERBS_ACCESS_READ,
2836 			UA_MANDATORY),
2837 	UVERBS_ATTR_PTR_IN(
2838 		MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2839 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2840 		UA_MANDATORY,
2841 		UA_ALLOC_AND_COPY),
2842 	UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2843 		u16, UA_MANDATORY),
2844 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2845 		MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2846 		UVERBS_ACCESS_READ,
2847 		UA_MANDATORY),
2848 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2849 		UVERBS_ATTR_TYPE(u64),
2850 		UA_MANDATORY));
2851 
2852 DECLARE_UVERBS_NAMED_METHOD(
2853 	MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2854 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2855 		MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2856 		UVERBS_ACCESS_READ,
2857 		UA_MANDATORY),
2858 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2859 		MLX5_IB_OBJECT_DEVX_OBJ,
2860 		UVERBS_ACCESS_READ,
2861 		UA_OPTIONAL),
2862 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2863 		UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2864 		UA_MANDATORY,
2865 		UA_ALLOC_AND_COPY),
2866 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2867 		UVERBS_ATTR_TYPE(u64),
2868 		UA_OPTIONAL),
2869 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
2870 		UVERBS_ATTR_TYPE(u32),
2871 		UA_OPTIONAL));
2872 
2873 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
2874 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
2875 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
2876 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
2877 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
2878 
2879 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
2880 			    UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
2881 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
2882 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
2883 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
2884 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
2885 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
2886 
2887 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
2888 			    UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
2889 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
2890 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
2891 
2892 
2893 DECLARE_UVERBS_NAMED_METHOD(
2894 	MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
2895 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
2896 			MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2897 			UVERBS_ACCESS_NEW,
2898 			UA_MANDATORY));
2899 
2900 DECLARE_UVERBS_NAMED_OBJECT(
2901 	MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2902 	UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
2903 			     devx_hot_unplug_async_cmd_event_file,
2904 			     &devx_async_cmd_event_fops, "[devx_async_cmd]",
2905 			     O_RDONLY),
2906 	&UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
2907 
2908 DECLARE_UVERBS_NAMED_METHOD(
2909 	MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
2910 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
2911 			MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2912 			UVERBS_ACCESS_NEW,
2913 			UA_MANDATORY),
2914 	UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
2915 			enum mlx5_ib_uapi_devx_create_event_channel_flags,
2916 			UA_MANDATORY));
2917 
2918 DECLARE_UVERBS_NAMED_OBJECT(
2919 	MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2920 	UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
2921 			     devx_hot_unplug_async_event_file,
2922 			     &devx_async_event_fops, "[devx_async_event]",
2923 			     O_RDONLY),
2924 	&UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
2925 
2926 static bool devx_is_supported(struct ib_device *device)
2927 {
2928 	struct mlx5_ib_dev *dev = to_mdev(device);
2929 
2930 	return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
2931 }
2932 
2933 const struct uapi_definition mlx5_ib_devx_defs[] = {
2934 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2935 		MLX5_IB_OBJECT_DEVX,
2936 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2937 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2938 		MLX5_IB_OBJECT_DEVX_OBJ,
2939 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2940 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2941 		MLX5_IB_OBJECT_DEVX_UMEM,
2942 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2943 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2944 		MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2945 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2946 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2947 		MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2948 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2949 	{},
2950 };
2951