1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <linux/sched/mm.h> 43 #include <linux/sched/task.h> 44 45 #include <net/ipv6.h> 46 #include <net/addrconf.h> 47 #include <net/devlink.h> 48 49 #include <rdma/ib_smi.h> 50 #include <rdma/ib_user_verbs.h> 51 #include <rdma/ib_addr.h> 52 #include <rdma/ib_cache.h> 53 54 #include <net/bonding.h> 55 56 #include <linux/mlx4/driver.h> 57 #include <linux/mlx4/cmd.h> 58 #include <linux/mlx4/qp.h> 59 60 #include "mlx4_ib.h" 61 #include <rdma/mlx4-abi.h> 62 63 #define DRV_NAME MLX4_IB_DRV_NAME 64 #define DRV_VERSION "4.0-0" 65 66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 68 #define MLX4_IB_CARD_REV_A0 0xA0 69 70 MODULE_AUTHOR("Roland Dreier"); 71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 72 MODULE_LICENSE("Dual BSD/GPL"); 73 74 int mlx4_ib_sm_guid_assign = 0; 75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 77 78 static const char mlx4_ib_version[] = 79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 80 DRV_VERSION "\n"; 81 82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device, 84 u32 port_num); 85 86 static struct workqueue_struct *wq; 87 88 static int check_flow_steering_support(struct mlx4_dev *dev) 89 { 90 int eth_num_ports = 0; 91 int ib_num_ports = 0; 92 93 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 94 95 if (dmfs) { 96 int i; 97 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 98 eth_num_ports++; 99 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 100 ib_num_ports++; 101 dmfs &= (!ib_num_ports || 102 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 103 (!eth_num_ports || 104 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 105 if (ib_num_ports && mlx4_is_mfunc(dev)) { 106 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 107 dmfs = 0; 108 } 109 } 110 return dmfs; 111 } 112 113 static int num_ib_ports(struct mlx4_dev *dev) 114 { 115 int ib_ports = 0; 116 int i; 117 118 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 119 ib_ports++; 120 121 return ib_ports; 122 } 123 124 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, 125 u32 port_num) 126 { 127 struct mlx4_ib_dev *ibdev = to_mdev(device); 128 struct net_device *dev; 129 130 rcu_read_lock(); 131 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num); 132 133 if (dev) { 134 if (mlx4_is_bonded(ibdev->dev)) { 135 struct net_device *upper = NULL; 136 137 upper = netdev_master_upper_dev_get_rcu(dev); 138 if (upper) { 139 struct net_device *active; 140 141 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 142 if (active) 143 dev = active; 144 } 145 } 146 } 147 dev_hold(dev); 148 149 rcu_read_unlock(); 150 return dev; 151 } 152 153 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 154 struct mlx4_ib_dev *ibdev, 155 u32 port_num) 156 { 157 struct mlx4_cmd_mailbox *mailbox; 158 int err; 159 struct mlx4_dev *dev = ibdev->dev; 160 int i; 161 union ib_gid *gid_tbl; 162 163 mailbox = mlx4_alloc_cmd_mailbox(dev); 164 if (IS_ERR(mailbox)) 165 return -ENOMEM; 166 167 gid_tbl = mailbox->buf; 168 169 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 170 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 171 172 err = mlx4_cmd(dev, mailbox->dma, 173 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 174 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 175 MLX4_CMD_WRAPPED); 176 if (mlx4_is_bonded(dev)) 177 err += mlx4_cmd(dev, mailbox->dma, 178 MLX4_SET_PORT_GID_TABLE << 8 | 2, 179 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 180 MLX4_CMD_WRAPPED); 181 182 mlx4_free_cmd_mailbox(dev, mailbox); 183 return err; 184 } 185 186 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 187 struct mlx4_ib_dev *ibdev, 188 u32 port_num) 189 { 190 struct mlx4_cmd_mailbox *mailbox; 191 int err; 192 struct mlx4_dev *dev = ibdev->dev; 193 int i; 194 struct { 195 union ib_gid gid; 196 __be32 rsrvd1[2]; 197 __be16 rsrvd2; 198 u8 type; 199 u8 version; 200 __be32 rsrvd3; 201 } *gid_tbl; 202 203 mailbox = mlx4_alloc_cmd_mailbox(dev); 204 if (IS_ERR(mailbox)) 205 return -ENOMEM; 206 207 gid_tbl = mailbox->buf; 208 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 209 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 210 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 211 gid_tbl[i].version = 2; 212 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 213 gid_tbl[i].type = 1; 214 } 215 } 216 217 err = mlx4_cmd(dev, mailbox->dma, 218 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 219 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 220 MLX4_CMD_WRAPPED); 221 if (mlx4_is_bonded(dev)) 222 err += mlx4_cmd(dev, mailbox->dma, 223 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 224 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 225 MLX4_CMD_WRAPPED); 226 227 mlx4_free_cmd_mailbox(dev, mailbox); 228 return err; 229 } 230 231 static int mlx4_ib_update_gids(struct gid_entry *gids, 232 struct mlx4_ib_dev *ibdev, 233 u32 port_num) 234 { 235 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 236 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 237 238 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 239 } 240 241 static void free_gid_entry(struct gid_entry *entry) 242 { 243 memset(&entry->gid, 0, sizeof(entry->gid)); 244 kfree(entry->ctx); 245 entry->ctx = NULL; 246 } 247 248 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context) 249 { 250 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 251 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 252 struct mlx4_port_gid_table *port_gid_table; 253 int free = -1, found = -1; 254 int ret = 0; 255 int hw_update = 0; 256 int i; 257 struct gid_entry *gids = NULL; 258 u16 vlan_id = 0xffff; 259 u8 mac[ETH_ALEN]; 260 261 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 262 return -EINVAL; 263 264 if (attr->port_num > MLX4_MAX_PORTS) 265 return -EINVAL; 266 267 if (!context) 268 return -EINVAL; 269 270 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]); 271 if (ret) 272 return ret; 273 port_gid_table = &iboe->gids[attr->port_num - 1]; 274 spin_lock_bh(&iboe->lock); 275 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 276 if (!memcmp(&port_gid_table->gids[i].gid, 277 &attr->gid, sizeof(attr->gid)) && 278 port_gid_table->gids[i].gid_type == attr->gid_type && 279 port_gid_table->gids[i].vlan_id == vlan_id) { 280 found = i; 281 break; 282 } 283 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid)) 284 free = i; /* HW has space */ 285 } 286 287 if (found < 0) { 288 if (free < 0) { 289 ret = -ENOSPC; 290 } else { 291 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 292 if (!port_gid_table->gids[free].ctx) { 293 ret = -ENOMEM; 294 } else { 295 *context = port_gid_table->gids[free].ctx; 296 memcpy(&port_gid_table->gids[free].gid, 297 &attr->gid, sizeof(attr->gid)); 298 port_gid_table->gids[free].gid_type = attr->gid_type; 299 port_gid_table->gids[free].vlan_id = vlan_id; 300 port_gid_table->gids[free].ctx->real_index = free; 301 port_gid_table->gids[free].ctx->refcount = 1; 302 hw_update = 1; 303 } 304 } 305 } else { 306 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 307 *context = ctx; 308 ctx->refcount++; 309 } 310 if (!ret && hw_update) { 311 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids), 312 GFP_ATOMIC); 313 if (!gids) { 314 ret = -ENOMEM; 315 *context = NULL; 316 free_gid_entry(&port_gid_table->gids[free]); 317 } else { 318 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 319 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 320 gids[i].gid_type = port_gid_table->gids[i].gid_type; 321 } 322 } 323 } 324 spin_unlock_bh(&iboe->lock); 325 326 if (!ret && hw_update) { 327 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 328 if (ret) { 329 spin_lock_bh(&iboe->lock); 330 *context = NULL; 331 free_gid_entry(&port_gid_table->gids[free]); 332 spin_unlock_bh(&iboe->lock); 333 } 334 kfree(gids); 335 } 336 337 return ret; 338 } 339 340 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context) 341 { 342 struct gid_cache_context *ctx = *context; 343 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 344 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 345 struct mlx4_port_gid_table *port_gid_table; 346 int ret = 0; 347 int hw_update = 0; 348 struct gid_entry *gids = NULL; 349 350 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 351 return -EINVAL; 352 353 if (attr->port_num > MLX4_MAX_PORTS) 354 return -EINVAL; 355 356 port_gid_table = &iboe->gids[attr->port_num - 1]; 357 spin_lock_bh(&iboe->lock); 358 if (ctx) { 359 ctx->refcount--; 360 if (!ctx->refcount) { 361 unsigned int real_index = ctx->real_index; 362 363 free_gid_entry(&port_gid_table->gids[real_index]); 364 hw_update = 1; 365 } 366 } 367 if (!ret && hw_update) { 368 int i; 369 370 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids), 371 GFP_ATOMIC); 372 if (!gids) { 373 ret = -ENOMEM; 374 } else { 375 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 376 memcpy(&gids[i].gid, 377 &port_gid_table->gids[i].gid, 378 sizeof(union ib_gid)); 379 gids[i].gid_type = 380 port_gid_table->gids[i].gid_type; 381 } 382 } 383 } 384 spin_unlock_bh(&iboe->lock); 385 386 if (!ret && hw_update) { 387 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 388 kfree(gids); 389 } 390 return ret; 391 } 392 393 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 394 const struct ib_gid_attr *attr) 395 { 396 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 397 struct gid_cache_context *ctx = NULL; 398 struct mlx4_port_gid_table *port_gid_table; 399 int real_index = -EINVAL; 400 int i; 401 unsigned long flags; 402 u32 port_num = attr->port_num; 403 404 if (port_num > MLX4_MAX_PORTS) 405 return -EINVAL; 406 407 if (mlx4_is_bonded(ibdev->dev)) 408 port_num = 1; 409 410 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 411 return attr->index; 412 413 spin_lock_irqsave(&iboe->lock, flags); 414 port_gid_table = &iboe->gids[port_num - 1]; 415 416 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 417 if (!memcmp(&port_gid_table->gids[i].gid, 418 &attr->gid, sizeof(attr->gid)) && 419 attr->gid_type == port_gid_table->gids[i].gid_type) { 420 ctx = port_gid_table->gids[i].ctx; 421 break; 422 } 423 if (ctx) 424 real_index = ctx->real_index; 425 spin_unlock_irqrestore(&iboe->lock, flags); 426 return real_index; 427 } 428 429 static int mlx4_ib_query_device(struct ib_device *ibdev, 430 struct ib_device_attr *props, 431 struct ib_udata *uhw) 432 { 433 struct mlx4_ib_dev *dev = to_mdev(ibdev); 434 struct ib_smp *in_mad = NULL; 435 struct ib_smp *out_mad = NULL; 436 int err; 437 int have_ib_ports; 438 struct mlx4_uverbs_ex_query_device cmd; 439 struct mlx4_uverbs_ex_query_device_resp resp = {}; 440 struct mlx4_clock_params clock_params; 441 442 if (uhw->inlen) { 443 if (uhw->inlen < sizeof(cmd)) 444 return -EINVAL; 445 446 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 447 if (err) 448 return err; 449 450 if (cmd.comp_mask) 451 return -EINVAL; 452 453 if (cmd.reserved) 454 return -EINVAL; 455 } 456 457 resp.response_length = offsetof(typeof(resp), response_length) + 458 sizeof(resp.response_length); 459 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 460 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 461 err = -ENOMEM; 462 if (!in_mad || !out_mad) 463 goto out; 464 465 ib_init_query_mad(in_mad); 466 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 467 468 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 469 1, NULL, NULL, in_mad, out_mad); 470 if (err) 471 goto out; 472 473 memset(props, 0, sizeof *props); 474 475 have_ib_ports = num_ib_ports(dev->dev); 476 477 props->fw_ver = dev->dev->caps.fw_ver; 478 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 479 IB_DEVICE_PORT_ACTIVE_EVENT | 480 IB_DEVICE_SYS_IMAGE_GUID | 481 IB_DEVICE_RC_RNR_NAK_GEN; 482 props->kernel_cap_flags = IBK_BLOCK_MULTICAST_LOOPBACK; 483 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 484 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 485 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 486 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 487 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 488 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 489 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 490 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 491 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 492 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 493 if (dev->dev->caps.max_gso_sz && 494 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 495 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 496 props->kernel_cap_flags |= IBK_UD_TSO; 497 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 498 props->kernel_cap_flags |= IBK_LOCAL_DMA_LKEY; 499 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 500 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 501 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 502 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 503 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 504 props->device_cap_flags |= IB_DEVICE_XRC; 505 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 506 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 507 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 508 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 509 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 510 else 511 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 512 } 513 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 514 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 515 516 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 517 518 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 519 0xffffff; 520 props->vendor_part_id = dev->dev->persist->pdev->device; 521 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 522 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 523 524 props->max_mr_size = ~0ull; 525 props->page_size_cap = dev->dev->caps.page_size_cap; 526 props->max_qp = dev->dev->quotas.qp; 527 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 528 props->max_send_sge = 529 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 530 props->max_recv_sge = 531 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 532 props->max_sge_rd = MLX4_MAX_SGE_RD; 533 props->max_cq = dev->dev->quotas.cq; 534 props->max_cqe = dev->dev->caps.max_cqes; 535 props->max_mr = dev->dev->quotas.mpt; 536 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 537 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 538 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 539 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 540 props->max_srq = dev->dev->quotas.srq; 541 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 542 props->max_srq_sge = dev->dev->caps.max_srq_sge; 543 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 544 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 545 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 546 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 547 props->masked_atomic_cap = props->atomic_cap; 548 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 549 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 550 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 551 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 552 props->max_mcast_grp; 553 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 554 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 555 props->max_ah = INT_MAX; 556 557 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET || 558 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) { 559 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) { 560 props->rss_caps.max_rwq_indirection_tables = 561 props->max_qp; 562 props->rss_caps.max_rwq_indirection_table_size = 563 dev->dev->caps.max_rss_tbl_sz; 564 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET; 565 props->max_wq_type_rq = props->max_qp; 566 } 567 568 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 569 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS; 570 } 571 572 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT; 573 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD; 574 575 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 576 resp.response_length += sizeof(resp.hca_core_clock_offset); 577 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) { 578 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET; 579 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 580 } 581 } 582 583 if (uhw->outlen >= resp.response_length + 584 sizeof(resp.max_inl_recv_sz)) { 585 resp.response_length += sizeof(resp.max_inl_recv_sz); 586 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg * 587 sizeof(struct mlx4_wqe_data_seg); 588 } 589 590 if (offsetofend(typeof(resp), rss_caps) <= uhw->outlen) { 591 if (props->rss_caps.supported_qpts) { 592 resp.rss_caps.rx_hash_function = 593 MLX4_IB_RX_HASH_FUNC_TOEPLITZ; 594 595 resp.rss_caps.rx_hash_fields_mask = 596 MLX4_IB_RX_HASH_SRC_IPV4 | 597 MLX4_IB_RX_HASH_DST_IPV4 | 598 MLX4_IB_RX_HASH_SRC_IPV6 | 599 MLX4_IB_RX_HASH_DST_IPV6 | 600 MLX4_IB_RX_HASH_SRC_PORT_TCP | 601 MLX4_IB_RX_HASH_DST_PORT_TCP | 602 MLX4_IB_RX_HASH_SRC_PORT_UDP | 603 MLX4_IB_RX_HASH_DST_PORT_UDP; 604 605 if (dev->dev->caps.tunnel_offload_mode == 606 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 607 resp.rss_caps.rx_hash_fields_mask |= 608 MLX4_IB_RX_HASH_INNER; 609 } 610 resp.response_length = offsetof(typeof(resp), rss_caps) + 611 sizeof(resp.rss_caps); 612 } 613 614 if (offsetofend(typeof(resp), tso_caps) <= uhw->outlen) { 615 if (dev->dev->caps.max_gso_sz && 616 ((mlx4_ib_port_link_layer(ibdev, 1) == 617 IB_LINK_LAYER_ETHERNET) || 618 (mlx4_ib_port_link_layer(ibdev, 2) == 619 IB_LINK_LAYER_ETHERNET))) { 620 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz; 621 resp.tso_caps.supported_qpts |= 622 1 << IB_QPT_RAW_PACKET; 623 } 624 resp.response_length = offsetof(typeof(resp), tso_caps) + 625 sizeof(resp.tso_caps); 626 } 627 628 if (uhw->outlen) { 629 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 630 if (err) 631 goto out; 632 } 633 out: 634 kfree(in_mad); 635 kfree(out_mad); 636 637 return err; 638 } 639 640 static enum rdma_link_layer 641 mlx4_ib_port_link_layer(struct ib_device *device, u32 port_num) 642 { 643 struct mlx4_dev *dev = to_mdev(device)->dev; 644 645 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 646 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 647 } 648 649 static int ib_link_query_port(struct ib_device *ibdev, u32 port, 650 struct ib_port_attr *props, int netw_view) 651 { 652 struct ib_smp *in_mad = NULL; 653 struct ib_smp *out_mad = NULL; 654 int ext_active_speed; 655 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 656 int err = -ENOMEM; 657 658 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 659 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 660 if (!in_mad || !out_mad) 661 goto out; 662 663 ib_init_query_mad(in_mad); 664 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 665 in_mad->attr_mod = cpu_to_be32(port); 666 667 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 668 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 669 670 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 671 in_mad, out_mad); 672 if (err) 673 goto out; 674 675 676 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 677 props->lmc = out_mad->data[34] & 0x7; 678 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 679 props->sm_sl = out_mad->data[36] & 0xf; 680 props->state = out_mad->data[32] & 0xf; 681 props->phys_state = out_mad->data[33] >> 4; 682 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 683 if (netw_view) 684 props->gid_tbl_len = out_mad->data[50]; 685 else 686 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 687 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 688 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 689 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 690 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 691 props->active_width = out_mad->data[31] & 0xf; 692 props->active_speed = out_mad->data[35] >> 4; 693 props->max_mtu = out_mad->data[41] & 0xf; 694 props->active_mtu = out_mad->data[36] >> 4; 695 props->subnet_timeout = out_mad->data[51] & 0x1f; 696 props->max_vl_num = out_mad->data[37] >> 4; 697 props->init_type_reply = out_mad->data[41] >> 4; 698 699 /* Check if extended speeds (EDR/FDR/...) are supported */ 700 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 701 ext_active_speed = out_mad->data[62] >> 4; 702 703 switch (ext_active_speed) { 704 case 1: 705 props->active_speed = IB_SPEED_FDR; 706 break; 707 case 2: 708 props->active_speed = IB_SPEED_EDR; 709 break; 710 } 711 } 712 713 /* If reported active speed is QDR, check if is FDR-10 */ 714 if (props->active_speed == IB_SPEED_QDR) { 715 ib_init_query_mad(in_mad); 716 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 717 in_mad->attr_mod = cpu_to_be32(port); 718 719 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 720 NULL, NULL, in_mad, out_mad); 721 if (err) 722 goto out; 723 724 /* Checking LinkSpeedActive for FDR-10 */ 725 if (out_mad->data[15] & 0x1) 726 props->active_speed = IB_SPEED_FDR10; 727 } 728 729 /* Avoid wrong speed value returned by FW if the IB link is down. */ 730 if (props->state == IB_PORT_DOWN) 731 props->active_speed = IB_SPEED_SDR; 732 733 out: 734 kfree(in_mad); 735 kfree(out_mad); 736 return err; 737 } 738 739 static u8 state_to_phys_state(enum ib_port_state state) 740 { 741 return state == IB_PORT_ACTIVE ? 742 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED; 743 } 744 745 static int eth_link_query_port(struct ib_device *ibdev, u32 port, 746 struct ib_port_attr *props) 747 { 748 749 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 750 struct mlx4_ib_iboe *iboe = &mdev->iboe; 751 struct net_device *ndev; 752 enum ib_mtu tmp; 753 struct mlx4_cmd_mailbox *mailbox; 754 int err = 0; 755 int is_bonded = mlx4_is_bonded(mdev->dev); 756 757 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 758 if (IS_ERR(mailbox)) 759 return PTR_ERR(mailbox); 760 761 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 762 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 763 MLX4_CMD_WRAPPED); 764 if (err) 765 goto out; 766 767 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) || 768 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 769 IB_WIDTH_4X : IB_WIDTH_1X; 770 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 771 IB_SPEED_FDR : IB_SPEED_QDR; 772 props->port_cap_flags = IB_PORT_CM_SUP; 773 props->ip_gids = true; 774 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 775 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 776 if (mdev->dev->caps.pkey_table_len[port]) 777 props->pkey_tbl_len = 1; 778 props->max_mtu = IB_MTU_4096; 779 props->max_vl_num = 2; 780 props->state = IB_PORT_DOWN; 781 props->phys_state = state_to_phys_state(props->state); 782 props->active_mtu = IB_MTU_256; 783 spin_lock_bh(&iboe->lock); 784 ndev = iboe->netdevs[port - 1]; 785 if (ndev && is_bonded) { 786 rcu_read_lock(); /* required to get upper dev */ 787 ndev = netdev_master_upper_dev_get_rcu(ndev); 788 rcu_read_unlock(); 789 } 790 if (!ndev) 791 goto out_unlock; 792 793 tmp = iboe_get_mtu(ndev->mtu); 794 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 795 796 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 797 IB_PORT_ACTIVE : IB_PORT_DOWN; 798 props->phys_state = state_to_phys_state(props->state); 799 out_unlock: 800 spin_unlock_bh(&iboe->lock); 801 out: 802 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 803 return err; 804 } 805 806 int __mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 807 struct ib_port_attr *props, int netw_view) 808 { 809 int err; 810 811 /* props being zeroed by the caller, avoid zeroing it here */ 812 813 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 814 ib_link_query_port(ibdev, port, props, netw_view) : 815 eth_link_query_port(ibdev, port, props); 816 817 return err; 818 } 819 820 static int mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 821 struct ib_port_attr *props) 822 { 823 /* returns host view */ 824 return __mlx4_ib_query_port(ibdev, port, props, 0); 825 } 826 827 int __mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 828 union ib_gid *gid, int netw_view) 829 { 830 struct ib_smp *in_mad = NULL; 831 struct ib_smp *out_mad = NULL; 832 int err = -ENOMEM; 833 struct mlx4_ib_dev *dev = to_mdev(ibdev); 834 int clear = 0; 835 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 836 837 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 838 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 839 if (!in_mad || !out_mad) 840 goto out; 841 842 ib_init_query_mad(in_mad); 843 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 844 in_mad->attr_mod = cpu_to_be32(port); 845 846 if (mlx4_is_mfunc(dev->dev) && netw_view) 847 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 848 849 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 850 if (err) 851 goto out; 852 853 memcpy(gid->raw, out_mad->data + 8, 8); 854 855 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 856 if (index) { 857 /* For any index > 0, return the null guid */ 858 err = 0; 859 clear = 1; 860 goto out; 861 } 862 } 863 864 ib_init_query_mad(in_mad); 865 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 866 in_mad->attr_mod = cpu_to_be32(index / 8); 867 868 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 869 NULL, NULL, in_mad, out_mad); 870 if (err) 871 goto out; 872 873 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 874 875 out: 876 if (clear) 877 memset(gid->raw + 8, 0, 8); 878 kfree(in_mad); 879 kfree(out_mad); 880 return err; 881 } 882 883 static int mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 884 union ib_gid *gid) 885 { 886 if (rdma_protocol_ib(ibdev, port)) 887 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 888 return 0; 889 } 890 891 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u32 port, 892 u64 *sl2vl_tbl) 893 { 894 union sl2vl_tbl_to_u64 sl2vl64; 895 struct ib_smp *in_mad = NULL; 896 struct ib_smp *out_mad = NULL; 897 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 898 int err = -ENOMEM; 899 int jj; 900 901 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 902 *sl2vl_tbl = 0; 903 return 0; 904 } 905 906 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 907 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 908 if (!in_mad || !out_mad) 909 goto out; 910 911 ib_init_query_mad(in_mad); 912 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 913 in_mad->attr_mod = 0; 914 915 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 916 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 917 918 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 919 in_mad, out_mad); 920 if (err) 921 goto out; 922 923 for (jj = 0; jj < 8; jj++) 924 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 925 *sl2vl_tbl = sl2vl64.sl64; 926 927 out: 928 kfree(in_mad); 929 kfree(out_mad); 930 return err; 931 } 932 933 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 934 { 935 u64 sl2vl; 936 int i; 937 int err; 938 939 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 940 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 941 continue; 942 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 943 if (err) { 944 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 945 i, err); 946 sl2vl = 0; 947 } 948 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 949 } 950 } 951 952 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 953 u16 *pkey, int netw_view) 954 { 955 struct ib_smp *in_mad = NULL; 956 struct ib_smp *out_mad = NULL; 957 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 958 int err = -ENOMEM; 959 960 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 961 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 962 if (!in_mad || !out_mad) 963 goto out; 964 965 ib_init_query_mad(in_mad); 966 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 967 in_mad->attr_mod = cpu_to_be32(index / 32); 968 969 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 970 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 971 972 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 973 in_mad, out_mad); 974 if (err) 975 goto out; 976 977 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 978 979 out: 980 kfree(in_mad); 981 kfree(out_mad); 982 return err; 983 } 984 985 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 986 u16 *pkey) 987 { 988 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 989 } 990 991 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 992 struct ib_device_modify *props) 993 { 994 struct mlx4_cmd_mailbox *mailbox; 995 unsigned long flags; 996 997 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 998 return -EOPNOTSUPP; 999 1000 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 1001 return 0; 1002 1003 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 1004 return -EOPNOTSUPP; 1005 1006 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 1007 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1008 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 1009 1010 /* 1011 * If possible, pass node desc to FW, so it can generate 1012 * a 144 trap. If cmd fails, just ignore. 1013 */ 1014 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 1015 if (IS_ERR(mailbox)) 1016 return 0; 1017 1018 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1019 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 1020 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 1021 1022 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 1023 1024 return 0; 1025 } 1026 1027 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u32 port, 1028 int reset_qkey_viols, u32 cap_mask) 1029 { 1030 struct mlx4_cmd_mailbox *mailbox; 1031 int err; 1032 1033 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 1034 if (IS_ERR(mailbox)) 1035 return PTR_ERR(mailbox); 1036 1037 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1038 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 1039 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 1040 } else { 1041 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 1042 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 1043 } 1044 1045 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 1046 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1047 MLX4_CMD_WRAPPED); 1048 1049 mlx4_free_cmd_mailbox(dev->dev, mailbox); 1050 return err; 1051 } 1052 1053 static int mlx4_ib_modify_port(struct ib_device *ibdev, u32 port, int mask, 1054 struct ib_port_modify *props) 1055 { 1056 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1057 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1058 struct ib_port_attr attr; 1059 u32 cap_mask; 1060 int err; 1061 1062 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1063 * of whether port link layer is ETH or IB. For ETH ports, qkey 1064 * violations and port capabilities are not meaningful. 1065 */ 1066 if (is_eth) 1067 return 0; 1068 1069 mutex_lock(&mdev->cap_mask_mutex); 1070 1071 err = ib_query_port(ibdev, port, &attr); 1072 if (err) 1073 goto out; 1074 1075 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1076 ~props->clr_port_cap_mask; 1077 1078 err = mlx4_ib_SET_PORT(mdev, port, 1079 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1080 cap_mask); 1081 1082 out: 1083 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1084 return err; 1085 } 1086 1087 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx, 1088 struct ib_udata *udata) 1089 { 1090 struct ib_device *ibdev = uctx->device; 1091 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1092 struct mlx4_ib_ucontext *context = to_mucontext(uctx); 1093 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1094 struct mlx4_ib_alloc_ucontext_resp resp; 1095 int err; 1096 1097 if (!dev->ib_active) 1098 return -EAGAIN; 1099 1100 if (ibdev->ops.uverbs_abi_ver == 1101 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1102 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1103 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1104 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1105 } else { 1106 resp.dev_caps = dev->dev->caps.userspace_caps; 1107 resp.qp_tab_size = dev->dev->caps.num_qps; 1108 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1109 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1110 resp.cqe_size = dev->dev->caps.cqe_size; 1111 } 1112 1113 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1114 if (err) 1115 return err; 1116 1117 INIT_LIST_HEAD(&context->db_page_list); 1118 mutex_init(&context->db_page_mutex); 1119 1120 INIT_LIST_HEAD(&context->wqn_ranges_list); 1121 mutex_init(&context->wqn_ranges_mutex); 1122 1123 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1124 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1125 else 1126 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1127 1128 if (err) { 1129 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1130 return -EFAULT; 1131 } 1132 1133 return err; 1134 } 1135 1136 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1137 { 1138 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1139 1140 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1141 } 1142 1143 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1144 { 1145 } 1146 1147 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1148 { 1149 struct mlx4_ib_dev *dev = to_mdev(context->device); 1150 1151 switch (vma->vm_pgoff) { 1152 case 0: 1153 return rdma_user_mmap_io(context, vma, 1154 to_mucontext(context)->uar.pfn, 1155 PAGE_SIZE, 1156 pgprot_noncached(vma->vm_page_prot), 1157 NULL); 1158 1159 case 1: 1160 if (dev->dev->caps.bf_reg_size == 0) 1161 return -EINVAL; 1162 return rdma_user_mmap_io( 1163 context, vma, 1164 to_mucontext(context)->uar.pfn + 1165 dev->dev->caps.num_uars, 1166 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot), 1167 NULL); 1168 1169 case 3: { 1170 struct mlx4_clock_params params; 1171 int ret; 1172 1173 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1174 if (ret) 1175 return ret; 1176 1177 return rdma_user_mmap_io( 1178 context, vma, 1179 (pci_resource_start(dev->dev->persist->pdev, 1180 params.bar) + 1181 params.offset) >> 1182 PAGE_SHIFT, 1183 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot), 1184 NULL); 1185 } 1186 1187 default: 1188 return -EINVAL; 1189 } 1190 } 1191 1192 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata) 1193 { 1194 struct mlx4_ib_pd *pd = to_mpd(ibpd); 1195 struct ib_device *ibdev = ibpd->device; 1196 int err; 1197 1198 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1199 if (err) 1200 return err; 1201 1202 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) { 1203 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1204 return -EFAULT; 1205 } 1206 return 0; 1207 } 1208 1209 static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata) 1210 { 1211 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1212 return 0; 1213 } 1214 1215 static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata) 1216 { 1217 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device); 1218 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd); 1219 struct ib_cq_init_attr cq_attr = {}; 1220 int err; 1221 1222 if (!(dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1223 return -EOPNOTSUPP; 1224 1225 err = mlx4_xrcd_alloc(dev->dev, &xrcd->xrcdn); 1226 if (err) 1227 return err; 1228 1229 xrcd->pd = ib_alloc_pd(ibxrcd->device, 0); 1230 if (IS_ERR(xrcd->pd)) { 1231 err = PTR_ERR(xrcd->pd); 1232 goto err2; 1233 } 1234 1235 cq_attr.cqe = 1; 1236 xrcd->cq = ib_create_cq(ibxrcd->device, NULL, NULL, xrcd, &cq_attr); 1237 if (IS_ERR(xrcd->cq)) { 1238 err = PTR_ERR(xrcd->cq); 1239 goto err3; 1240 } 1241 1242 return 0; 1243 1244 err3: 1245 ib_dealloc_pd(xrcd->pd); 1246 err2: 1247 mlx4_xrcd_free(dev->dev, xrcd->xrcdn); 1248 return err; 1249 } 1250 1251 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 1252 { 1253 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1254 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1255 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1256 return 0; 1257 } 1258 1259 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1260 { 1261 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1262 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1263 struct mlx4_ib_gid_entry *ge; 1264 1265 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1266 if (!ge) 1267 return -ENOMEM; 1268 1269 ge->gid = *gid; 1270 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1271 ge->port = mqp->port; 1272 ge->added = 1; 1273 } 1274 1275 mutex_lock(&mqp->mutex); 1276 list_add_tail(&ge->list, &mqp->gid_list); 1277 mutex_unlock(&mqp->mutex); 1278 1279 return 0; 1280 } 1281 1282 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1283 struct mlx4_ib_counters *ctr_table) 1284 { 1285 struct counter_index *counter, *tmp_count; 1286 1287 mutex_lock(&ctr_table->mutex); 1288 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1289 list) { 1290 if (counter->allocated) 1291 mlx4_counter_free(ibdev->dev, counter->index); 1292 list_del(&counter->list); 1293 kfree(counter); 1294 } 1295 mutex_unlock(&ctr_table->mutex); 1296 } 1297 1298 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1299 union ib_gid *gid) 1300 { 1301 struct net_device *ndev; 1302 int ret = 0; 1303 1304 if (!mqp->port) 1305 return 0; 1306 1307 spin_lock_bh(&mdev->iboe.lock); 1308 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1309 dev_hold(ndev); 1310 spin_unlock_bh(&mdev->iboe.lock); 1311 1312 if (ndev) { 1313 ret = 1; 1314 dev_put(ndev); 1315 } 1316 1317 return ret; 1318 } 1319 1320 struct mlx4_ib_steering { 1321 struct list_head list; 1322 struct mlx4_flow_reg_id reg_id; 1323 union ib_gid gid; 1324 }; 1325 1326 #define LAST_ETH_FIELD vlan_tag 1327 #define LAST_IB_FIELD sl 1328 #define LAST_IPV4_FIELD dst_ip 1329 #define LAST_TCP_UDP_FIELD src_port 1330 1331 /* Field is the last supported field */ 1332 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1333 memchr_inv((void *)&filter.field +\ 1334 sizeof(filter.field), 0,\ 1335 sizeof(filter) -\ 1336 offsetof(typeof(filter), field) -\ 1337 sizeof(filter.field)) 1338 1339 static int parse_flow_attr(struct mlx4_dev *dev, 1340 u32 qp_num, 1341 union ib_flow_spec *ib_spec, 1342 struct _rule_hw *mlx4_spec) 1343 { 1344 enum mlx4_net_trans_rule_id type; 1345 1346 switch (ib_spec->type) { 1347 case IB_FLOW_SPEC_ETH: 1348 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1349 return -ENOTSUPP; 1350 1351 type = MLX4_NET_TRANS_RULE_ID_ETH; 1352 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1353 ETH_ALEN); 1354 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1355 ETH_ALEN); 1356 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1357 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1358 break; 1359 case IB_FLOW_SPEC_IB: 1360 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1361 return -ENOTSUPP; 1362 1363 type = MLX4_NET_TRANS_RULE_ID_IB; 1364 mlx4_spec->ib.l3_qpn = 1365 cpu_to_be32(qp_num); 1366 mlx4_spec->ib.qpn_mask = 1367 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1368 break; 1369 1370 1371 case IB_FLOW_SPEC_IPV4: 1372 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1373 return -ENOTSUPP; 1374 1375 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1376 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1377 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1378 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1379 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1380 break; 1381 1382 case IB_FLOW_SPEC_TCP: 1383 case IB_FLOW_SPEC_UDP: 1384 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1385 return -ENOTSUPP; 1386 1387 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1388 MLX4_NET_TRANS_RULE_ID_TCP : 1389 MLX4_NET_TRANS_RULE_ID_UDP; 1390 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1391 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1392 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1393 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1394 break; 1395 1396 default: 1397 return -EINVAL; 1398 } 1399 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1400 mlx4_hw_rule_sz(dev, type) < 0) 1401 return -EINVAL; 1402 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1403 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1404 return mlx4_hw_rule_sz(dev, type); 1405 } 1406 1407 struct default_rules { 1408 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1409 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1410 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1411 __u8 link_layer; 1412 }; 1413 static const struct default_rules default_table[] = { 1414 { 1415 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1416 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1417 .rules_create_list = {IB_FLOW_SPEC_IB}, 1418 .link_layer = IB_LINK_LAYER_INFINIBAND 1419 } 1420 }; 1421 1422 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1423 struct ib_flow_attr *flow_attr) 1424 { 1425 int i, j, k; 1426 void *ib_flow; 1427 const struct default_rules *pdefault_rules = default_table; 1428 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1429 1430 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1431 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1432 memset(&field_types, 0, sizeof(field_types)); 1433 1434 if (link_layer != pdefault_rules->link_layer) 1435 continue; 1436 1437 ib_flow = flow_attr + 1; 1438 /* we assume the specs are sorted */ 1439 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1440 j < flow_attr->num_of_specs; k++) { 1441 union ib_flow_spec *current_flow = 1442 (union ib_flow_spec *)ib_flow; 1443 1444 /* same layer but different type */ 1445 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1446 (pdefault_rules->mandatory_fields[k] & 1447 IB_FLOW_SPEC_LAYER_MASK)) && 1448 (current_flow->type != 1449 pdefault_rules->mandatory_fields[k])) 1450 goto out; 1451 1452 /* same layer, try match next one */ 1453 if (current_flow->type == 1454 pdefault_rules->mandatory_fields[k]) { 1455 j++; 1456 ib_flow += 1457 ((union ib_flow_spec *)ib_flow)->size; 1458 } 1459 } 1460 1461 ib_flow = flow_attr + 1; 1462 for (j = 0; j < flow_attr->num_of_specs; 1463 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1464 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1465 /* same layer and same type */ 1466 if (((union ib_flow_spec *)ib_flow)->type == 1467 pdefault_rules->mandatory_not_fields[k]) 1468 goto out; 1469 1470 return i; 1471 } 1472 out: 1473 return -1; 1474 } 1475 1476 static int __mlx4_ib_create_default_rules( 1477 struct mlx4_ib_dev *mdev, 1478 struct ib_qp *qp, 1479 const struct default_rules *pdefault_rules, 1480 struct _rule_hw *mlx4_spec) { 1481 int size = 0; 1482 int i; 1483 1484 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1485 union ib_flow_spec ib_spec = {}; 1486 int ret; 1487 1488 switch (pdefault_rules->rules_create_list[i]) { 1489 case 0: 1490 /* no rule */ 1491 continue; 1492 case IB_FLOW_SPEC_IB: 1493 ib_spec.type = IB_FLOW_SPEC_IB; 1494 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1495 1496 break; 1497 default: 1498 /* invalid rule */ 1499 return -EINVAL; 1500 } 1501 /* We must put empty rule, qpn is being ignored */ 1502 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1503 mlx4_spec); 1504 if (ret < 0) { 1505 pr_info("invalid parsing\n"); 1506 return -EINVAL; 1507 } 1508 1509 mlx4_spec = (void *)mlx4_spec + ret; 1510 size += ret; 1511 } 1512 return size; 1513 } 1514 1515 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1516 int domain, 1517 enum mlx4_net_trans_promisc_mode flow_type, 1518 u64 *reg_id) 1519 { 1520 int ret, i; 1521 int size = 0; 1522 void *ib_flow; 1523 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1524 struct mlx4_cmd_mailbox *mailbox; 1525 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1526 int default_flow; 1527 1528 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1529 pr_err("Invalid priority value %d\n", flow_attr->priority); 1530 return -EINVAL; 1531 } 1532 1533 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1534 return -EINVAL; 1535 1536 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1537 if (IS_ERR(mailbox)) 1538 return PTR_ERR(mailbox); 1539 ctrl = mailbox->buf; 1540 1541 ctrl->prio = cpu_to_be16(domain | flow_attr->priority); 1542 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1543 ctrl->port = flow_attr->port; 1544 ctrl->qpn = cpu_to_be32(qp->qp_num); 1545 1546 ib_flow = flow_attr + 1; 1547 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1548 /* Add default flows */ 1549 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1550 if (default_flow >= 0) { 1551 ret = __mlx4_ib_create_default_rules( 1552 mdev, qp, default_table + default_flow, 1553 mailbox->buf + size); 1554 if (ret < 0) { 1555 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1556 return -EINVAL; 1557 } 1558 size += ret; 1559 } 1560 for (i = 0; i < flow_attr->num_of_specs; i++) { 1561 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1562 mailbox->buf + size); 1563 if (ret < 0) { 1564 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1565 return -EINVAL; 1566 } 1567 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1568 size += ret; 1569 } 1570 1571 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR && 1572 flow_attr->num_of_specs == 1) { 1573 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1); 1574 enum ib_flow_spec_type header_spec = 1575 ((union ib_flow_spec *)(flow_attr + 1))->type; 1576 1577 if (header_spec == IB_FLOW_SPEC_ETH) 1578 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header); 1579 } 1580 1581 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1582 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1583 MLX4_CMD_NATIVE); 1584 if (ret == -ENOMEM) 1585 pr_err("mcg table is full. Fail to register network rule.\n"); 1586 else if (ret == -ENXIO) 1587 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1588 else if (ret) 1589 pr_err("Invalid argument. Fail to register network rule.\n"); 1590 1591 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1592 return ret; 1593 } 1594 1595 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1596 { 1597 int err; 1598 err = mlx4_cmd(dev, reg_id, 0, 0, 1599 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1600 MLX4_CMD_NATIVE); 1601 if (err) 1602 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1603 reg_id); 1604 return err; 1605 } 1606 1607 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1608 u64 *reg_id) 1609 { 1610 void *ib_flow; 1611 union ib_flow_spec *ib_spec; 1612 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1613 int err = 0; 1614 1615 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1616 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1617 return 0; /* do nothing */ 1618 1619 ib_flow = flow_attr + 1; 1620 ib_spec = (union ib_flow_spec *)ib_flow; 1621 1622 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1623 return 0; /* do nothing */ 1624 1625 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1626 flow_attr->port, qp->qp_num, 1627 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1628 reg_id); 1629 return err; 1630 } 1631 1632 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1633 struct ib_flow_attr *flow_attr, 1634 enum mlx4_net_trans_promisc_mode *type) 1635 { 1636 int err = 0; 1637 1638 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1639 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1640 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1641 return -EOPNOTSUPP; 1642 } 1643 1644 if (flow_attr->num_of_specs == 0) { 1645 type[0] = MLX4_FS_MC_SNIFFER; 1646 type[1] = MLX4_FS_UC_SNIFFER; 1647 } else { 1648 union ib_flow_spec *ib_spec; 1649 1650 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1651 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1652 return -EINVAL; 1653 1654 /* if all is zero than MC and UC */ 1655 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1656 type[0] = MLX4_FS_MC_SNIFFER; 1657 type[1] = MLX4_FS_UC_SNIFFER; 1658 } else { 1659 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1660 ib_spec->eth.mask.dst_mac[1], 1661 ib_spec->eth.mask.dst_mac[2], 1662 ib_spec->eth.mask.dst_mac[3], 1663 ib_spec->eth.mask.dst_mac[4], 1664 ib_spec->eth.mask.dst_mac[5]}; 1665 1666 /* Above xor was only on MC bit, non empty mask is valid 1667 * only if this bit is set and rest are zero. 1668 */ 1669 if (!is_zero_ether_addr(&mac[0])) 1670 return -EINVAL; 1671 1672 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1673 type[0] = MLX4_FS_MC_SNIFFER; 1674 else 1675 type[0] = MLX4_FS_UC_SNIFFER; 1676 } 1677 } 1678 1679 return err; 1680 } 1681 1682 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1683 struct ib_flow_attr *flow_attr, 1684 struct ib_udata *udata) 1685 { 1686 int err = 0, i = 0, j = 0; 1687 struct mlx4_ib_flow *mflow; 1688 enum mlx4_net_trans_promisc_mode type[2]; 1689 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1690 int is_bonded = mlx4_is_bonded(dev); 1691 1692 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP) 1693 return ERR_PTR(-EOPNOTSUPP); 1694 1695 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1696 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1697 return ERR_PTR(-EOPNOTSUPP); 1698 1699 if (udata && 1700 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen)) 1701 return ERR_PTR(-EOPNOTSUPP); 1702 1703 memset(type, 0, sizeof(type)); 1704 1705 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1706 if (!mflow) { 1707 err = -ENOMEM; 1708 goto err_free; 1709 } 1710 1711 switch (flow_attr->type) { 1712 case IB_FLOW_ATTR_NORMAL: 1713 /* If dont trap flag (continue match) is set, under specific 1714 * condition traffic be replicated to given qp, 1715 * without stealing it 1716 */ 1717 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1718 err = mlx4_ib_add_dont_trap_rule(dev, 1719 flow_attr, 1720 type); 1721 if (err) 1722 goto err_free; 1723 } else { 1724 type[0] = MLX4_FS_REGULAR; 1725 } 1726 break; 1727 1728 case IB_FLOW_ATTR_ALL_DEFAULT: 1729 type[0] = MLX4_FS_ALL_DEFAULT; 1730 break; 1731 1732 case IB_FLOW_ATTR_MC_DEFAULT: 1733 type[0] = MLX4_FS_MC_DEFAULT; 1734 break; 1735 1736 case IB_FLOW_ATTR_SNIFFER: 1737 type[0] = MLX4_FS_MIRROR_RX_PORT; 1738 type[1] = MLX4_FS_MIRROR_SX_PORT; 1739 break; 1740 1741 default: 1742 err = -EINVAL; 1743 goto err_free; 1744 } 1745 1746 while (i < ARRAY_SIZE(type) && type[i]) { 1747 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS, 1748 type[i], &mflow->reg_id[i].id); 1749 if (err) 1750 goto err_create_flow; 1751 if (is_bonded) { 1752 /* Application always sees one port so the mirror rule 1753 * must be on port #2 1754 */ 1755 flow_attr->port = 2; 1756 err = __mlx4_ib_create_flow(qp, flow_attr, 1757 MLX4_DOMAIN_UVERBS, type[j], 1758 &mflow->reg_id[j].mirror); 1759 flow_attr->port = 1; 1760 if (err) 1761 goto err_create_flow; 1762 j++; 1763 } 1764 1765 i++; 1766 } 1767 1768 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1769 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1770 &mflow->reg_id[i].id); 1771 if (err) 1772 goto err_create_flow; 1773 1774 if (is_bonded) { 1775 flow_attr->port = 2; 1776 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1777 &mflow->reg_id[j].mirror); 1778 flow_attr->port = 1; 1779 if (err) 1780 goto err_create_flow; 1781 j++; 1782 } 1783 /* function to create mirror rule */ 1784 i++; 1785 } 1786 1787 return &mflow->ibflow; 1788 1789 err_create_flow: 1790 while (i) { 1791 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1792 mflow->reg_id[i].id); 1793 i--; 1794 } 1795 1796 while (j) { 1797 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1798 mflow->reg_id[j].mirror); 1799 j--; 1800 } 1801 err_free: 1802 kfree(mflow); 1803 return ERR_PTR(err); 1804 } 1805 1806 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1807 { 1808 int err, ret = 0; 1809 int i = 0; 1810 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1811 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1812 1813 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1814 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1815 if (err) 1816 ret = err; 1817 if (mflow->reg_id[i].mirror) { 1818 err = __mlx4_ib_destroy_flow(mdev->dev, 1819 mflow->reg_id[i].mirror); 1820 if (err) 1821 ret = err; 1822 } 1823 i++; 1824 } 1825 1826 kfree(mflow); 1827 return ret; 1828 } 1829 1830 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1831 { 1832 int err; 1833 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1834 struct mlx4_dev *dev = mdev->dev; 1835 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1836 struct mlx4_ib_steering *ib_steering = NULL; 1837 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1838 struct mlx4_flow_reg_id reg_id; 1839 1840 if (mdev->dev->caps.steering_mode == 1841 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1842 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1843 if (!ib_steering) 1844 return -ENOMEM; 1845 } 1846 1847 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1848 !!(mqp->flags & 1849 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1850 prot, ®_id.id); 1851 if (err) { 1852 pr_err("multicast attach op failed, err %d\n", err); 1853 goto err_malloc; 1854 } 1855 1856 reg_id.mirror = 0; 1857 if (mlx4_is_bonded(dev)) { 1858 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1859 (mqp->port == 1) ? 2 : 1, 1860 !!(mqp->flags & 1861 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1862 prot, ®_id.mirror); 1863 if (err) 1864 goto err_add; 1865 } 1866 1867 err = add_gid_entry(ibqp, gid); 1868 if (err) 1869 goto err_add; 1870 1871 if (ib_steering) { 1872 memcpy(ib_steering->gid.raw, gid->raw, 16); 1873 ib_steering->reg_id = reg_id; 1874 mutex_lock(&mqp->mutex); 1875 list_add(&ib_steering->list, &mqp->steering_rules); 1876 mutex_unlock(&mqp->mutex); 1877 } 1878 return 0; 1879 1880 err_add: 1881 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1882 prot, reg_id.id); 1883 if (reg_id.mirror) 1884 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1885 prot, reg_id.mirror); 1886 err_malloc: 1887 kfree(ib_steering); 1888 1889 return err; 1890 } 1891 1892 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1893 { 1894 struct mlx4_ib_gid_entry *ge; 1895 struct mlx4_ib_gid_entry *tmp; 1896 struct mlx4_ib_gid_entry *ret = NULL; 1897 1898 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1899 if (!memcmp(raw, ge->gid.raw, 16)) { 1900 ret = ge; 1901 break; 1902 } 1903 } 1904 1905 return ret; 1906 } 1907 1908 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1909 { 1910 int err; 1911 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1912 struct mlx4_dev *dev = mdev->dev; 1913 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1914 struct net_device *ndev; 1915 struct mlx4_ib_gid_entry *ge; 1916 struct mlx4_flow_reg_id reg_id = {0, 0}; 1917 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1918 1919 if (mdev->dev->caps.steering_mode == 1920 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1921 struct mlx4_ib_steering *ib_steering; 1922 1923 mutex_lock(&mqp->mutex); 1924 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 1925 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 1926 list_del(&ib_steering->list); 1927 break; 1928 } 1929 } 1930 mutex_unlock(&mqp->mutex); 1931 if (&ib_steering->list == &mqp->steering_rules) { 1932 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 1933 return -EINVAL; 1934 } 1935 reg_id = ib_steering->reg_id; 1936 kfree(ib_steering); 1937 } 1938 1939 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1940 prot, reg_id.id); 1941 if (err) 1942 return err; 1943 1944 if (mlx4_is_bonded(dev)) { 1945 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1946 prot, reg_id.mirror); 1947 if (err) 1948 return err; 1949 } 1950 1951 mutex_lock(&mqp->mutex); 1952 ge = find_gid_entry(mqp, gid->raw); 1953 if (ge) { 1954 spin_lock_bh(&mdev->iboe.lock); 1955 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 1956 dev_hold(ndev); 1957 spin_unlock_bh(&mdev->iboe.lock); 1958 dev_put(ndev); 1959 list_del(&ge->list); 1960 kfree(ge); 1961 } else 1962 pr_warn("could not find mgid entry\n"); 1963 1964 mutex_unlock(&mqp->mutex); 1965 1966 return 0; 1967 } 1968 1969 static int init_node_data(struct mlx4_ib_dev *dev) 1970 { 1971 struct ib_smp *in_mad = NULL; 1972 struct ib_smp *out_mad = NULL; 1973 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 1974 int err = -ENOMEM; 1975 1976 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 1977 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 1978 if (!in_mad || !out_mad) 1979 goto out; 1980 1981 ib_init_query_mad(in_mad); 1982 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 1983 if (mlx4_is_master(dev->dev)) 1984 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 1985 1986 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1987 if (err) 1988 goto out; 1989 1990 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 1991 1992 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 1993 1994 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1995 if (err) 1996 goto out; 1997 1998 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 1999 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2000 2001 out: 2002 kfree(in_mad); 2003 kfree(out_mad); 2004 return err; 2005 } 2006 2007 static ssize_t hca_type_show(struct device *device, 2008 struct device_attribute *attr, char *buf) 2009 { 2010 struct mlx4_ib_dev *dev = 2011 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2012 2013 return sysfs_emit(buf, "MT%d\n", dev->dev->persist->pdev->device); 2014 } 2015 static DEVICE_ATTR_RO(hca_type); 2016 2017 static ssize_t hw_rev_show(struct device *device, 2018 struct device_attribute *attr, char *buf) 2019 { 2020 struct mlx4_ib_dev *dev = 2021 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2022 2023 return sysfs_emit(buf, "%x\n", dev->dev->rev_id); 2024 } 2025 static DEVICE_ATTR_RO(hw_rev); 2026 2027 static ssize_t board_id_show(struct device *device, 2028 struct device_attribute *attr, char *buf) 2029 { 2030 struct mlx4_ib_dev *dev = 2031 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2032 2033 return sysfs_emit(buf, "%.*s\n", MLX4_BOARD_ID_LEN, dev->dev->board_id); 2034 } 2035 static DEVICE_ATTR_RO(board_id); 2036 2037 static struct attribute *mlx4_class_attributes[] = { 2038 &dev_attr_hw_rev.attr, 2039 &dev_attr_hca_type.attr, 2040 &dev_attr_board_id.attr, 2041 NULL 2042 }; 2043 2044 static const struct attribute_group mlx4_attr_group = { 2045 .attrs = mlx4_class_attributes, 2046 }; 2047 2048 struct diag_counter { 2049 const char *name; 2050 u32 offset; 2051 }; 2052 2053 #define DIAG_COUNTER(_name, _offset) \ 2054 { .name = #_name, .offset = _offset } 2055 2056 static const struct diag_counter diag_basic[] = { 2057 DIAG_COUNTER(rq_num_lle, 0x00), 2058 DIAG_COUNTER(sq_num_lle, 0x04), 2059 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2060 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2061 DIAG_COUNTER(rq_num_lpe, 0x18), 2062 DIAG_COUNTER(sq_num_lpe, 0x1C), 2063 DIAG_COUNTER(rq_num_wrfe, 0x20), 2064 DIAG_COUNTER(sq_num_wrfe, 0x24), 2065 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2066 DIAG_COUNTER(sq_num_bre, 0x34), 2067 DIAG_COUNTER(sq_num_rire, 0x44), 2068 DIAG_COUNTER(rq_num_rire, 0x48), 2069 DIAG_COUNTER(sq_num_rae, 0x4C), 2070 DIAG_COUNTER(rq_num_rae, 0x50), 2071 DIAG_COUNTER(sq_num_roe, 0x54), 2072 DIAG_COUNTER(sq_num_tree, 0x5C), 2073 DIAG_COUNTER(sq_num_rree, 0x64), 2074 DIAG_COUNTER(rq_num_rnr, 0x68), 2075 DIAG_COUNTER(sq_num_rnr, 0x6C), 2076 DIAG_COUNTER(rq_num_oos, 0x100), 2077 DIAG_COUNTER(sq_num_oos, 0x104), 2078 }; 2079 2080 static const struct diag_counter diag_ext[] = { 2081 DIAG_COUNTER(rq_num_dup, 0x130), 2082 DIAG_COUNTER(sq_num_to, 0x134), 2083 }; 2084 2085 static const struct diag_counter diag_device_only[] = { 2086 DIAG_COUNTER(num_cqovf, 0x1A0), 2087 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2088 }; 2089 2090 static struct rdma_hw_stats * 2091 mlx4_ib_alloc_hw_device_stats(struct ib_device *ibdev) 2092 { 2093 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2094 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2095 2096 if (!diag[0].descs) 2097 return NULL; 2098 2099 return rdma_alloc_hw_stats_struct(diag[0].descs, diag[0].num_counters, 2100 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2101 } 2102 2103 static struct rdma_hw_stats * 2104 mlx4_ib_alloc_hw_port_stats(struct ib_device *ibdev, u32 port_num) 2105 { 2106 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2107 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2108 2109 if (!diag[1].descs) 2110 return NULL; 2111 2112 return rdma_alloc_hw_stats_struct(diag[1].descs, diag[1].num_counters, 2113 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2114 } 2115 2116 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2117 struct rdma_hw_stats *stats, 2118 u32 port, int index) 2119 { 2120 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2121 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2122 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2123 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2124 int ret; 2125 int i; 2126 2127 ret = mlx4_query_diag_counters(dev->dev, 2128 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2129 diag[!!port].offset, hw_value, 2130 diag[!!port].num_counters, port); 2131 2132 if (ret) 2133 return ret; 2134 2135 for (i = 0; i < diag[!!port].num_counters; i++) 2136 stats->value[i] = hw_value[i]; 2137 2138 return diag[!!port].num_counters; 2139 } 2140 2141 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2142 struct rdma_stat_desc **pdescs, 2143 u32 **offset, u32 *num, bool port) 2144 { 2145 u32 num_counters; 2146 2147 num_counters = ARRAY_SIZE(diag_basic); 2148 2149 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2150 num_counters += ARRAY_SIZE(diag_ext); 2151 2152 if (!port) 2153 num_counters += ARRAY_SIZE(diag_device_only); 2154 2155 *pdescs = kcalloc(num_counters, sizeof(struct rdma_stat_desc), 2156 GFP_KERNEL); 2157 if (!*pdescs) 2158 return -ENOMEM; 2159 2160 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2161 if (!*offset) 2162 goto err; 2163 2164 *num = num_counters; 2165 2166 return 0; 2167 2168 err: 2169 kfree(*pdescs); 2170 return -ENOMEM; 2171 } 2172 2173 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2174 struct rdma_stat_desc *descs, 2175 u32 *offset, bool port) 2176 { 2177 int i; 2178 int j; 2179 2180 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2181 descs[i].name = diag_basic[i].name; 2182 offset[i] = diag_basic[i].offset; 2183 } 2184 2185 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2186 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2187 descs[j].name = diag_ext[i].name; 2188 offset[j] = diag_ext[i].offset; 2189 } 2190 } 2191 2192 if (!port) { 2193 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2194 descs[j].name = diag_device_only[i].name; 2195 offset[j] = diag_device_only[i].offset; 2196 } 2197 } 2198 } 2199 2200 static const struct ib_device_ops mlx4_ib_hw_stats_ops = { 2201 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats, 2202 .alloc_hw_port_stats = mlx4_ib_alloc_hw_port_stats, 2203 .get_hw_stats = mlx4_ib_get_hw_stats, 2204 }; 2205 2206 static const struct ib_device_ops mlx4_ib_hw_stats_ops1 = { 2207 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats, 2208 .get_hw_stats = mlx4_ib_get_hw_stats, 2209 }; 2210 2211 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2212 { 2213 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2214 int i; 2215 int ret; 2216 bool per_port = !!(ibdev->dev->caps.flags2 & 2217 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2218 2219 if (mlx4_is_slave(ibdev->dev)) 2220 return 0; 2221 2222 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2223 /* 2224 * i == 1 means we are building port counters, set a different 2225 * stats ops without port stats callback. 2226 */ 2227 if (i && !per_port) { 2228 ib_set_device_ops(&ibdev->ib_dev, 2229 &mlx4_ib_hw_stats_ops1); 2230 2231 return 0; 2232 } 2233 2234 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].descs, 2235 &diag[i].offset, 2236 &diag[i].num_counters, i); 2237 if (ret) 2238 goto err_alloc; 2239 2240 mlx4_ib_fill_diag_counters(ibdev, diag[i].descs, 2241 diag[i].offset, i); 2242 } 2243 2244 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops); 2245 2246 return 0; 2247 2248 err_alloc: 2249 if (i) { 2250 kfree(diag[i - 1].descs); 2251 kfree(diag[i - 1].offset); 2252 } 2253 2254 return ret; 2255 } 2256 2257 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2258 { 2259 int i; 2260 2261 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2262 kfree(ibdev->diag_counters[i].offset); 2263 kfree(ibdev->diag_counters[i].descs); 2264 } 2265 } 2266 2267 #define MLX4_IB_INVALID_MAC ((u64)-1) 2268 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2269 struct net_device *dev, 2270 int port) 2271 { 2272 u64 new_smac = 0; 2273 u64 release_mac = MLX4_IB_INVALID_MAC; 2274 struct mlx4_ib_qp *qp; 2275 2276 new_smac = ether_addr_to_u64(dev->dev_addr); 2277 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2278 2279 /* no need for update QP1 and mac registration in non-SRIOV */ 2280 if (!mlx4_is_mfunc(ibdev->dev)) 2281 return; 2282 2283 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2284 qp = ibdev->qp1_proxy[port - 1]; 2285 if (qp) { 2286 int new_smac_index; 2287 u64 old_smac; 2288 struct mlx4_update_qp_params update_params; 2289 2290 mutex_lock(&qp->mutex); 2291 old_smac = qp->pri.smac; 2292 if (new_smac == old_smac) 2293 goto unlock; 2294 2295 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2296 2297 if (new_smac_index < 0) 2298 goto unlock; 2299 2300 update_params.smac_index = new_smac_index; 2301 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2302 &update_params)) { 2303 release_mac = new_smac; 2304 goto unlock; 2305 } 2306 /* if old port was zero, no mac was yet registered for this QP */ 2307 if (qp->pri.smac_port) 2308 release_mac = old_smac; 2309 qp->pri.smac = new_smac; 2310 qp->pri.smac_port = port; 2311 qp->pri.smac_index = new_smac_index; 2312 } 2313 2314 unlock: 2315 if (release_mac != MLX4_IB_INVALID_MAC) 2316 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2317 if (qp) 2318 mutex_unlock(&qp->mutex); 2319 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2320 } 2321 2322 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 2323 struct net_device *dev, 2324 unsigned long event) 2325 2326 { 2327 struct mlx4_ib_iboe *iboe; 2328 int update_qps_port = -1; 2329 int port; 2330 2331 ASSERT_RTNL(); 2332 2333 iboe = &ibdev->iboe; 2334 2335 spin_lock_bh(&iboe->lock); 2336 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 2337 2338 iboe->netdevs[port - 1] = 2339 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 2340 2341 if (dev == iboe->netdevs[port - 1] && 2342 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2343 event == NETDEV_UP || event == NETDEV_CHANGE)) 2344 update_qps_port = port; 2345 2346 if (dev == iboe->netdevs[port - 1] && 2347 (event == NETDEV_UP || event == NETDEV_DOWN)) { 2348 enum ib_port_state port_state; 2349 struct ib_event ibev = { }; 2350 2351 if (ib_get_cached_port_state(&ibdev->ib_dev, port, 2352 &port_state)) 2353 continue; 2354 2355 if (event == NETDEV_UP && 2356 (port_state != IB_PORT_ACTIVE || 2357 iboe->last_port_state[port - 1] != IB_PORT_DOWN)) 2358 continue; 2359 if (event == NETDEV_DOWN && 2360 (port_state != IB_PORT_DOWN || 2361 iboe->last_port_state[port - 1] != IB_PORT_ACTIVE)) 2362 continue; 2363 iboe->last_port_state[port - 1] = port_state; 2364 2365 ibev.device = &ibdev->ib_dev; 2366 ibev.element.port_num = port; 2367 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE : 2368 IB_EVENT_PORT_ERR; 2369 ib_dispatch_event(&ibev); 2370 } 2371 2372 } 2373 spin_unlock_bh(&iboe->lock); 2374 2375 if (update_qps_port > 0) 2376 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2377 } 2378 2379 static int mlx4_ib_netdev_event(struct notifier_block *this, 2380 unsigned long event, void *ptr) 2381 { 2382 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2383 struct mlx4_ib_dev *ibdev; 2384 2385 if (!net_eq(dev_net(dev), &init_net)) 2386 return NOTIFY_DONE; 2387 2388 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2389 mlx4_ib_scan_netdevs(ibdev, dev, event); 2390 2391 return NOTIFY_DONE; 2392 } 2393 2394 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2395 { 2396 int port; 2397 int slave; 2398 int i; 2399 2400 if (mlx4_is_master(ibdev->dev)) { 2401 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2402 ++slave) { 2403 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2404 for (i = 0; 2405 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2406 ++i) { 2407 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2408 /* master has the identity virt2phys pkey mapping */ 2409 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2410 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2411 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2412 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2413 } 2414 } 2415 } 2416 /* initialize pkey cache */ 2417 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2418 for (i = 0; 2419 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2420 ++i) 2421 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2422 (i) ? 0 : 0xFFFF; 2423 } 2424 } 2425 } 2426 2427 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2428 { 2429 int i, j, eq = 0, total_eqs = 0; 2430 2431 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2432 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2433 if (!ibdev->eq_table) 2434 return; 2435 2436 for (i = 1; i <= dev->caps.num_ports; i++) { 2437 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2438 j++, total_eqs++) { 2439 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2440 continue; 2441 ibdev->eq_table[eq] = total_eqs; 2442 if (!mlx4_assign_eq(dev, i, 2443 &ibdev->eq_table[eq])) 2444 eq++; 2445 else 2446 ibdev->eq_table[eq] = -1; 2447 } 2448 } 2449 2450 for (i = eq; i < dev->caps.num_comp_vectors; 2451 ibdev->eq_table[i++] = -1) 2452 ; 2453 2454 /* Advertise the new number of EQs to clients */ 2455 ibdev->ib_dev.num_comp_vectors = eq; 2456 } 2457 2458 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2459 { 2460 int i; 2461 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2462 2463 /* no eqs were allocated */ 2464 if (!ibdev->eq_table) 2465 return; 2466 2467 /* Reset the advertised EQ number */ 2468 ibdev->ib_dev.num_comp_vectors = 0; 2469 2470 for (i = 0; i < total_eqs; i++) 2471 mlx4_release_eq(dev, ibdev->eq_table[i]); 2472 2473 kfree(ibdev->eq_table); 2474 ibdev->eq_table = NULL; 2475 } 2476 2477 static int mlx4_port_immutable(struct ib_device *ibdev, u32 port_num, 2478 struct ib_port_immutable *immutable) 2479 { 2480 struct ib_port_attr attr; 2481 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2482 int err; 2483 2484 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2485 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2486 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2487 } else { 2488 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2489 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2490 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2491 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2492 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2493 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET; 2494 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE | 2495 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP)) 2496 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2497 } 2498 2499 err = ib_query_port(ibdev, port_num, &attr); 2500 if (err) 2501 return err; 2502 2503 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2504 immutable->gid_tbl_len = attr.gid_tbl_len; 2505 2506 return 0; 2507 } 2508 2509 static void get_fw_ver_str(struct ib_device *device, char *str) 2510 { 2511 struct mlx4_ib_dev *dev = 2512 container_of(device, struct mlx4_ib_dev, ib_dev); 2513 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d", 2514 (int) (dev->dev->caps.fw_ver >> 32), 2515 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2516 (int) dev->dev->caps.fw_ver & 0xffff); 2517 } 2518 2519 static const struct ib_device_ops mlx4_ib_dev_ops = { 2520 .owner = THIS_MODULE, 2521 .driver_id = RDMA_DRIVER_MLX4, 2522 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION, 2523 2524 .add_gid = mlx4_ib_add_gid, 2525 .alloc_mr = mlx4_ib_alloc_mr, 2526 .alloc_pd = mlx4_ib_alloc_pd, 2527 .alloc_ucontext = mlx4_ib_alloc_ucontext, 2528 .attach_mcast = mlx4_ib_mcg_attach, 2529 .create_ah = mlx4_ib_create_ah, 2530 .create_cq = mlx4_ib_create_cq, 2531 .create_qp = mlx4_ib_create_qp, 2532 .create_srq = mlx4_ib_create_srq, 2533 .dealloc_pd = mlx4_ib_dealloc_pd, 2534 .dealloc_ucontext = mlx4_ib_dealloc_ucontext, 2535 .del_gid = mlx4_ib_del_gid, 2536 .dereg_mr = mlx4_ib_dereg_mr, 2537 .destroy_ah = mlx4_ib_destroy_ah, 2538 .destroy_cq = mlx4_ib_destroy_cq, 2539 .destroy_qp = mlx4_ib_destroy_qp, 2540 .destroy_srq = mlx4_ib_destroy_srq, 2541 .detach_mcast = mlx4_ib_mcg_detach, 2542 .device_group = &mlx4_attr_group, 2543 .disassociate_ucontext = mlx4_ib_disassociate_ucontext, 2544 .drain_rq = mlx4_ib_drain_rq, 2545 .drain_sq = mlx4_ib_drain_sq, 2546 .get_dev_fw_str = get_fw_ver_str, 2547 .get_dma_mr = mlx4_ib_get_dma_mr, 2548 .get_link_layer = mlx4_ib_port_link_layer, 2549 .get_netdev = mlx4_ib_get_netdev, 2550 .get_port_immutable = mlx4_port_immutable, 2551 .map_mr_sg = mlx4_ib_map_mr_sg, 2552 .mmap = mlx4_ib_mmap, 2553 .modify_cq = mlx4_ib_modify_cq, 2554 .modify_device = mlx4_ib_modify_device, 2555 .modify_port = mlx4_ib_modify_port, 2556 .modify_qp = mlx4_ib_modify_qp, 2557 .modify_srq = mlx4_ib_modify_srq, 2558 .poll_cq = mlx4_ib_poll_cq, 2559 .post_recv = mlx4_ib_post_recv, 2560 .post_send = mlx4_ib_post_send, 2561 .post_srq_recv = mlx4_ib_post_srq_recv, 2562 .process_mad = mlx4_ib_process_mad, 2563 .query_ah = mlx4_ib_query_ah, 2564 .query_device = mlx4_ib_query_device, 2565 .query_gid = mlx4_ib_query_gid, 2566 .query_pkey = mlx4_ib_query_pkey, 2567 .query_port = mlx4_ib_query_port, 2568 .query_qp = mlx4_ib_query_qp, 2569 .query_srq = mlx4_ib_query_srq, 2570 .reg_user_mr = mlx4_ib_reg_user_mr, 2571 .req_notify_cq = mlx4_ib_arm_cq, 2572 .rereg_user_mr = mlx4_ib_rereg_user_mr, 2573 .resize_cq = mlx4_ib_resize_cq, 2574 2575 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah), 2576 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq), 2577 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd), 2578 INIT_RDMA_OBJ_SIZE(ib_qp, mlx4_ib_qp, ibqp), 2579 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq), 2580 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext), 2581 }; 2582 2583 static const struct ib_device_ops mlx4_ib_dev_wq_ops = { 2584 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table, 2585 .create_wq = mlx4_ib_create_wq, 2586 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table, 2587 .destroy_wq = mlx4_ib_destroy_wq, 2588 .modify_wq = mlx4_ib_modify_wq, 2589 2590 INIT_RDMA_OBJ_SIZE(ib_rwq_ind_table, mlx4_ib_rwq_ind_table, 2591 ib_rwq_ind_tbl), 2592 }; 2593 2594 static const struct ib_device_ops mlx4_ib_dev_mw_ops = { 2595 .alloc_mw = mlx4_ib_alloc_mw, 2596 .dealloc_mw = mlx4_ib_dealloc_mw, 2597 2598 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw), 2599 }; 2600 2601 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = { 2602 .alloc_xrcd = mlx4_ib_alloc_xrcd, 2603 .dealloc_xrcd = mlx4_ib_dealloc_xrcd, 2604 2605 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd), 2606 }; 2607 2608 static const struct ib_device_ops mlx4_ib_dev_fs_ops = { 2609 .create_flow = mlx4_ib_create_flow, 2610 .destroy_flow = mlx4_ib_destroy_flow, 2611 }; 2612 2613 static void *mlx4_ib_add(struct mlx4_dev *dev) 2614 { 2615 struct mlx4_ib_dev *ibdev; 2616 int num_ports = 0; 2617 int i, j; 2618 int err; 2619 struct mlx4_ib_iboe *iboe; 2620 int ib_num_ports = 0; 2621 int num_req_counters; 2622 int allocated; 2623 u32 counter_index; 2624 struct counter_index *new_counter_index = NULL; 2625 2626 pr_info_once("%s", mlx4_ib_version); 2627 2628 num_ports = 0; 2629 mlx4_foreach_ib_transport_port(i, dev) 2630 num_ports++; 2631 2632 /* No point in registering a device with no ports... */ 2633 if (num_ports == 0) 2634 return NULL; 2635 2636 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev); 2637 if (!ibdev) { 2638 dev_err(&dev->persist->pdev->dev, 2639 "Device struct alloc failed\n"); 2640 return NULL; 2641 } 2642 2643 iboe = &ibdev->iboe; 2644 2645 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2646 goto err_dealloc; 2647 2648 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2649 goto err_pd; 2650 2651 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2652 PAGE_SIZE); 2653 if (!ibdev->uar_map) 2654 goto err_uar; 2655 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2656 2657 ibdev->dev = dev; 2658 ibdev->bond_next_port = 0; 2659 2660 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2661 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2662 ibdev->num_ports = num_ports; 2663 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2664 1 : ibdev->num_ports; 2665 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2666 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev; 2667 2668 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops); 2669 2670 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) && 2671 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) == 2672 IB_LINK_LAYER_ETHERNET) || 2673 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) == 2674 IB_LINK_LAYER_ETHERNET))) 2675 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops); 2676 2677 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2678 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) 2679 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops); 2680 2681 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2682 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops); 2683 } 2684 2685 if (check_flow_steering_support(dev)) { 2686 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2687 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops); 2688 } 2689 2690 if (!dev->caps.userspace_caps) 2691 ibdev->ib_dev.ops.uverbs_abi_ver = 2692 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2693 2694 mlx4_ib_alloc_eqs(dev, ibdev); 2695 2696 spin_lock_init(&iboe->lock); 2697 2698 if (init_node_data(ibdev)) 2699 goto err_map; 2700 mlx4_init_sl2vl_tbl(ibdev); 2701 2702 for (i = 0; i < ibdev->num_ports; ++i) { 2703 mutex_init(&ibdev->counters_table[i].mutex); 2704 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2705 iboe->last_port_state[i] = IB_PORT_DOWN; 2706 } 2707 2708 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2709 for (i = 0; i < num_req_counters; ++i) { 2710 mutex_init(&ibdev->qp1_proxy_lock[i]); 2711 allocated = 0; 2712 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2713 IB_LINK_LAYER_ETHERNET) { 2714 err = mlx4_counter_alloc(ibdev->dev, &counter_index, 2715 MLX4_RES_USAGE_DRIVER); 2716 /* if failed to allocate a new counter, use default */ 2717 if (err) 2718 counter_index = 2719 mlx4_get_default_counter_index(dev, 2720 i + 1); 2721 else 2722 allocated = 1; 2723 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2724 counter_index = mlx4_get_default_counter_index(dev, 2725 i + 1); 2726 } 2727 new_counter_index = kmalloc(sizeof(*new_counter_index), 2728 GFP_KERNEL); 2729 if (!new_counter_index) { 2730 if (allocated) 2731 mlx4_counter_free(ibdev->dev, counter_index); 2732 goto err_counter; 2733 } 2734 new_counter_index->index = counter_index; 2735 new_counter_index->allocated = allocated; 2736 list_add_tail(&new_counter_index->list, 2737 &ibdev->counters_table[i].counters_list); 2738 ibdev->counters_table[i].default_counter = counter_index; 2739 pr_info("counter index %d for port %d allocated %d\n", 2740 counter_index, i + 1, allocated); 2741 } 2742 if (mlx4_is_bonded(dev)) 2743 for (i = 1; i < ibdev->num_ports ; ++i) { 2744 new_counter_index = 2745 kmalloc(sizeof(struct counter_index), 2746 GFP_KERNEL); 2747 if (!new_counter_index) 2748 goto err_counter; 2749 new_counter_index->index = counter_index; 2750 new_counter_index->allocated = 0; 2751 list_add_tail(&new_counter_index->list, 2752 &ibdev->counters_table[i].counters_list); 2753 ibdev->counters_table[i].default_counter = 2754 counter_index; 2755 } 2756 2757 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2758 ib_num_ports++; 2759 2760 spin_lock_init(&ibdev->sm_lock); 2761 mutex_init(&ibdev->cap_mask_mutex); 2762 INIT_LIST_HEAD(&ibdev->qp_list); 2763 spin_lock_init(&ibdev->reset_flow_resource_lock); 2764 2765 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2766 ib_num_ports) { 2767 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2768 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2769 MLX4_IB_UC_STEER_QPN_ALIGN, 2770 &ibdev->steer_qpn_base, 0, 2771 MLX4_RES_USAGE_DRIVER); 2772 if (err) 2773 goto err_counter; 2774 2775 ibdev->ib_uc_qpns_bitmap = bitmap_alloc(ibdev->steer_qpn_count, 2776 GFP_KERNEL); 2777 if (!ibdev->ib_uc_qpns_bitmap) 2778 goto err_steer_qp_release; 2779 2780 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) { 2781 bitmap_zero(ibdev->ib_uc_qpns_bitmap, 2782 ibdev->steer_qpn_count); 2783 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2784 dev, ibdev->steer_qpn_base, 2785 ibdev->steer_qpn_base + 2786 ibdev->steer_qpn_count - 1); 2787 if (err) 2788 goto err_steer_free_bitmap; 2789 } else { 2790 bitmap_fill(ibdev->ib_uc_qpns_bitmap, 2791 ibdev->steer_qpn_count); 2792 } 2793 } 2794 2795 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2796 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2797 2798 if (mlx4_ib_alloc_diag_counters(ibdev)) 2799 goto err_steer_free_bitmap; 2800 2801 if (ib_register_device(&ibdev->ib_dev, "mlx4_%d", 2802 &dev->persist->pdev->dev)) 2803 goto err_diag_counters; 2804 2805 if (mlx4_ib_mad_init(ibdev)) 2806 goto err_reg; 2807 2808 if (mlx4_ib_init_sriov(ibdev)) 2809 goto err_mad; 2810 2811 if (!iboe->nb.notifier_call) { 2812 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2813 err = register_netdevice_notifier(&iboe->nb); 2814 if (err) { 2815 iboe->nb.notifier_call = NULL; 2816 goto err_notif; 2817 } 2818 } 2819 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2820 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2821 if (err) 2822 goto err_notif; 2823 } 2824 2825 ibdev->ib_active = true; 2826 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2827 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2828 &ibdev->ib_dev); 2829 2830 if (mlx4_is_mfunc(ibdev->dev)) 2831 init_pkeys(ibdev); 2832 2833 /* create paravirt contexts for any VFs which are active */ 2834 if (mlx4_is_master(ibdev->dev)) { 2835 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2836 if (j == mlx4_master_func_num(ibdev->dev)) 2837 continue; 2838 if (mlx4_is_slave_active(ibdev->dev, j)) 2839 do_slave_init(ibdev, j, 1); 2840 } 2841 } 2842 return ibdev; 2843 2844 err_notif: 2845 if (ibdev->iboe.nb.notifier_call) { 2846 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2847 pr_warn("failure unregistering notifier\n"); 2848 ibdev->iboe.nb.notifier_call = NULL; 2849 } 2850 flush_workqueue(wq); 2851 2852 mlx4_ib_close_sriov(ibdev); 2853 2854 err_mad: 2855 mlx4_ib_mad_cleanup(ibdev); 2856 2857 err_reg: 2858 ib_unregister_device(&ibdev->ib_dev); 2859 2860 err_diag_counters: 2861 mlx4_ib_diag_cleanup(ibdev); 2862 2863 err_steer_free_bitmap: 2864 bitmap_free(ibdev->ib_uc_qpns_bitmap); 2865 2866 err_steer_qp_release: 2867 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2868 ibdev->steer_qpn_count); 2869 err_counter: 2870 for (i = 0; i < ibdev->num_ports; ++i) 2871 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2872 2873 err_map: 2874 mlx4_ib_free_eqs(dev, ibdev); 2875 iounmap(ibdev->uar_map); 2876 2877 err_uar: 2878 mlx4_uar_free(dev, &ibdev->priv_uar); 2879 2880 err_pd: 2881 mlx4_pd_free(dev, ibdev->priv_pdn); 2882 2883 err_dealloc: 2884 ib_dealloc_device(&ibdev->ib_dev); 2885 2886 return NULL; 2887 } 2888 2889 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2890 { 2891 int offset; 2892 2893 WARN_ON(!dev->ib_uc_qpns_bitmap); 2894 2895 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2896 dev->steer_qpn_count, 2897 get_count_order(count)); 2898 if (offset < 0) 2899 return offset; 2900 2901 *qpn = dev->steer_qpn_base + offset; 2902 return 0; 2903 } 2904 2905 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2906 { 2907 if (!qpn || 2908 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2909 return; 2910 2911 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n", 2912 qpn, dev->steer_qpn_base)) 2913 /* not supposed to be here */ 2914 return; 2915 2916 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2917 qpn - dev->steer_qpn_base, 2918 get_count_order(count)); 2919 } 2920 2921 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2922 int is_attach) 2923 { 2924 int err; 2925 size_t flow_size; 2926 struct ib_flow_attr *flow = NULL; 2927 struct ib_flow_spec_ib *ib_spec; 2928 2929 if (is_attach) { 2930 flow_size = sizeof(struct ib_flow_attr) + 2931 sizeof(struct ib_flow_spec_ib); 2932 flow = kzalloc(flow_size, GFP_KERNEL); 2933 if (!flow) 2934 return -ENOMEM; 2935 flow->port = mqp->port; 2936 flow->num_of_specs = 1; 2937 flow->size = flow_size; 2938 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2939 ib_spec->type = IB_FLOW_SPEC_IB; 2940 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2941 /* Add an empty rule for IB L2 */ 2942 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2943 2944 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC, 2945 MLX4_FS_REGULAR, &mqp->reg_id); 2946 } else { 2947 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 2948 } 2949 kfree(flow); 2950 return err; 2951 } 2952 2953 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 2954 { 2955 struct mlx4_ib_dev *ibdev = ibdev_ptr; 2956 int p; 2957 int i; 2958 2959 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2960 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 2961 ibdev->ib_active = false; 2962 flush_workqueue(wq); 2963 2964 if (ibdev->iboe.nb.notifier_call) { 2965 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2966 pr_warn("failure unregistering notifier\n"); 2967 ibdev->iboe.nb.notifier_call = NULL; 2968 } 2969 2970 mlx4_ib_close_sriov(ibdev); 2971 mlx4_ib_mad_cleanup(ibdev); 2972 ib_unregister_device(&ibdev->ib_dev); 2973 mlx4_ib_diag_cleanup(ibdev); 2974 2975 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2976 ibdev->steer_qpn_count); 2977 bitmap_free(ibdev->ib_uc_qpns_bitmap); 2978 2979 iounmap(ibdev->uar_map); 2980 for (p = 0; p < ibdev->num_ports; ++p) 2981 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 2982 2983 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 2984 mlx4_CLOSE_PORT(dev, p); 2985 2986 mlx4_ib_free_eqs(dev, ibdev); 2987 2988 mlx4_uar_free(dev, &ibdev->priv_uar); 2989 mlx4_pd_free(dev, ibdev->priv_pdn); 2990 ib_dealloc_device(&ibdev->ib_dev); 2991 } 2992 2993 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 2994 { 2995 struct mlx4_ib_demux_work **dm = NULL; 2996 struct mlx4_dev *dev = ibdev->dev; 2997 int i; 2998 unsigned long flags; 2999 struct mlx4_active_ports actv_ports; 3000 unsigned int ports; 3001 unsigned int first_port; 3002 3003 if (!mlx4_is_master(dev)) 3004 return; 3005 3006 actv_ports = mlx4_get_active_ports(dev, slave); 3007 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3008 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3009 3010 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 3011 if (!dm) 3012 return; 3013 3014 for (i = 0; i < ports; i++) { 3015 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3016 if (!dm[i]) { 3017 while (--i >= 0) 3018 kfree(dm[i]); 3019 goto out; 3020 } 3021 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3022 dm[i]->port = first_port + i + 1; 3023 dm[i]->slave = slave; 3024 dm[i]->do_init = do_init; 3025 dm[i]->dev = ibdev; 3026 } 3027 /* initialize or tear down tunnel QPs for the slave */ 3028 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3029 if (!ibdev->sriov.is_going_down) { 3030 for (i = 0; i < ports; i++) 3031 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3032 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3033 } else { 3034 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3035 for (i = 0; i < ports; i++) 3036 kfree(dm[i]); 3037 } 3038 out: 3039 kfree(dm); 3040 return; 3041 } 3042 3043 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3044 { 3045 struct mlx4_ib_qp *mqp; 3046 unsigned long flags_qp; 3047 unsigned long flags_cq; 3048 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3049 struct list_head cq_notify_list; 3050 struct mlx4_cq *mcq; 3051 unsigned long flags; 3052 3053 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3054 INIT_LIST_HEAD(&cq_notify_list); 3055 3056 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3057 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3058 3059 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3060 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3061 if (mqp->sq.tail != mqp->sq.head) { 3062 send_mcq = to_mcq(mqp->ibqp.send_cq); 3063 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3064 if (send_mcq->mcq.comp && 3065 mqp->ibqp.send_cq->comp_handler) { 3066 if (!send_mcq->mcq.reset_notify_added) { 3067 send_mcq->mcq.reset_notify_added = 1; 3068 list_add_tail(&send_mcq->mcq.reset_notify, 3069 &cq_notify_list); 3070 } 3071 } 3072 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3073 } 3074 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3075 /* Now, handle the QP's receive queue */ 3076 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3077 /* no handling is needed for SRQ */ 3078 if (!mqp->ibqp.srq) { 3079 if (mqp->rq.tail != mqp->rq.head) { 3080 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3081 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3082 if (recv_mcq->mcq.comp && 3083 mqp->ibqp.recv_cq->comp_handler) { 3084 if (!recv_mcq->mcq.reset_notify_added) { 3085 recv_mcq->mcq.reset_notify_added = 1; 3086 list_add_tail(&recv_mcq->mcq.reset_notify, 3087 &cq_notify_list); 3088 } 3089 } 3090 spin_unlock_irqrestore(&recv_mcq->lock, 3091 flags_cq); 3092 } 3093 } 3094 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3095 } 3096 3097 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3098 mcq->comp(mcq); 3099 } 3100 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3101 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3102 } 3103 3104 static void handle_bonded_port_state_event(struct work_struct *work) 3105 { 3106 struct ib_event_work *ew = 3107 container_of(work, struct ib_event_work, work); 3108 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3109 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3110 int i; 3111 struct ib_event ibev; 3112 3113 kfree(ew); 3114 spin_lock_bh(&ibdev->iboe.lock); 3115 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3116 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3117 enum ib_port_state curr_port_state; 3118 3119 if (!curr_netdev) 3120 continue; 3121 3122 curr_port_state = 3123 (netif_running(curr_netdev) && 3124 netif_carrier_ok(curr_netdev)) ? 3125 IB_PORT_ACTIVE : IB_PORT_DOWN; 3126 3127 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3128 curr_port_state : IB_PORT_ACTIVE; 3129 } 3130 spin_unlock_bh(&ibdev->iboe.lock); 3131 3132 ibev.device = &ibdev->ib_dev; 3133 ibev.element.port_num = 1; 3134 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3135 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3136 3137 ib_dispatch_event(&ibev); 3138 } 3139 3140 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3141 { 3142 u64 sl2vl; 3143 int err; 3144 3145 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3146 if (err) { 3147 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3148 port, err); 3149 sl2vl = 0; 3150 } 3151 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3152 } 3153 3154 static void ib_sl2vl_update_work(struct work_struct *work) 3155 { 3156 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3157 struct mlx4_ib_dev *mdev = ew->ib_dev; 3158 int port = ew->port; 3159 3160 mlx4_ib_sl2vl_update(mdev, port); 3161 3162 kfree(ew); 3163 } 3164 3165 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3166 int port) 3167 { 3168 struct ib_event_work *ew; 3169 3170 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3171 if (ew) { 3172 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3173 ew->port = port; 3174 ew->ib_dev = ibdev; 3175 queue_work(wq, &ew->work); 3176 } 3177 } 3178 3179 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 3180 enum mlx4_dev_event event, unsigned long param) 3181 { 3182 struct ib_event ibev; 3183 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 3184 struct mlx4_eqe *eqe = NULL; 3185 struct ib_event_work *ew; 3186 int p = 0; 3187 3188 if (mlx4_is_bonded(dev) && 3189 ((event == MLX4_DEV_EVENT_PORT_UP) || 3190 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3191 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3192 if (!ew) 3193 return; 3194 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3195 ew->ib_dev = ibdev; 3196 queue_work(wq, &ew->work); 3197 return; 3198 } 3199 3200 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 3201 eqe = (struct mlx4_eqe *)param; 3202 else 3203 p = (int) param; 3204 3205 switch (event) { 3206 case MLX4_DEV_EVENT_PORT_UP: 3207 if (p > ibdev->num_ports) 3208 return; 3209 if (!mlx4_is_slave(dev) && 3210 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3211 IB_LINK_LAYER_INFINIBAND) { 3212 if (mlx4_is_master(dev)) 3213 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3214 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3215 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3216 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3217 } 3218 ibev.event = IB_EVENT_PORT_ACTIVE; 3219 break; 3220 3221 case MLX4_DEV_EVENT_PORT_DOWN: 3222 if (p > ibdev->num_ports) 3223 return; 3224 ibev.event = IB_EVENT_PORT_ERR; 3225 break; 3226 3227 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3228 ibdev->ib_active = false; 3229 ibev.event = IB_EVENT_DEVICE_FATAL; 3230 mlx4_ib_handle_catas_error(ibdev); 3231 break; 3232 3233 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3234 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3235 if (!ew) 3236 return; 3237 3238 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3239 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3240 ew->ib_dev = ibdev; 3241 /* need to queue only for port owner, which uses GEN_EQE */ 3242 if (mlx4_is_master(dev)) 3243 queue_work(wq, &ew->work); 3244 else 3245 handle_port_mgmt_change_event(&ew->work); 3246 return; 3247 3248 case MLX4_DEV_EVENT_SLAVE_INIT: 3249 /* here, p is the slave id */ 3250 do_slave_init(ibdev, p, 1); 3251 if (mlx4_is_master(dev)) { 3252 int i; 3253 3254 for (i = 1; i <= ibdev->num_ports; i++) { 3255 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3256 == IB_LINK_LAYER_INFINIBAND) 3257 mlx4_ib_slave_alias_guid_event(ibdev, 3258 p, i, 3259 1); 3260 } 3261 } 3262 return; 3263 3264 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3265 if (mlx4_is_master(dev)) { 3266 int i; 3267 3268 for (i = 1; i <= ibdev->num_ports; i++) { 3269 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3270 == IB_LINK_LAYER_INFINIBAND) 3271 mlx4_ib_slave_alias_guid_event(ibdev, 3272 p, i, 3273 0); 3274 } 3275 } 3276 /* here, p is the slave id */ 3277 do_slave_init(ibdev, p, 0); 3278 return; 3279 3280 default: 3281 return; 3282 } 3283 3284 ibev.device = ibdev_ptr; 3285 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3286 3287 ib_dispatch_event(&ibev); 3288 } 3289 3290 static struct mlx4_interface mlx4_ib_interface = { 3291 .add = mlx4_ib_add, 3292 .remove = mlx4_ib_remove, 3293 .event = mlx4_ib_event, 3294 .protocol = MLX4_PROT_IB_IPV6, 3295 .flags = MLX4_INTFF_BONDING 3296 }; 3297 3298 static int __init mlx4_ib_init(void) 3299 { 3300 int err; 3301 3302 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3303 if (!wq) 3304 return -ENOMEM; 3305 3306 err = mlx4_ib_qp_event_init(); 3307 if (err) 3308 goto clean_qp_event; 3309 3310 err = mlx4_ib_cm_init(); 3311 if (err) 3312 goto clean_wq; 3313 3314 err = mlx4_ib_mcg_init(); 3315 if (err) 3316 goto clean_cm; 3317 3318 err = mlx4_register_interface(&mlx4_ib_interface); 3319 if (err) 3320 goto clean_mcg; 3321 3322 return 0; 3323 3324 clean_mcg: 3325 mlx4_ib_mcg_destroy(); 3326 3327 clean_cm: 3328 mlx4_ib_cm_destroy(); 3329 3330 clean_wq: 3331 mlx4_ib_qp_event_cleanup(); 3332 3333 clean_qp_event: 3334 destroy_workqueue(wq); 3335 return err; 3336 } 3337 3338 static void __exit mlx4_ib_cleanup(void) 3339 { 3340 mlx4_unregister_interface(&mlx4_ib_interface); 3341 mlx4_ib_mcg_destroy(); 3342 mlx4_ib_cm_destroy(); 3343 mlx4_ib_qp_event_cleanup(); 3344 destroy_workqueue(wq); 3345 } 3346 3347 module_init(mlx4_ib_init); 3348 module_exit(mlx4_ib_cleanup); 3349