1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <linux/sched/mm.h> 43 #include <linux/sched/task.h> 44 45 #include <net/ipv6.h> 46 #include <net/addrconf.h> 47 #include <net/devlink.h> 48 49 #include <rdma/ib_smi.h> 50 #include <rdma/ib_user_verbs.h> 51 #include <rdma/ib_addr.h> 52 #include <rdma/ib_cache.h> 53 54 #include <net/bonding.h> 55 56 #include <linux/mlx4/driver.h> 57 #include <linux/mlx4/cmd.h> 58 #include <linux/mlx4/qp.h> 59 60 #include "mlx4_ib.h" 61 #include <rdma/mlx4-abi.h> 62 63 #define DRV_NAME MLX4_IB_DRV_NAME 64 #define DRV_VERSION "4.0-0" 65 66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 68 #define MLX4_IB_CARD_REV_A0 0xA0 69 70 MODULE_AUTHOR("Roland Dreier"); 71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 72 MODULE_LICENSE("Dual BSD/GPL"); 73 74 int mlx4_ib_sm_guid_assign = 0; 75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 77 78 static const char mlx4_ib_version[] = 79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 80 DRV_VERSION "\n"; 81 82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device, 84 u8 port_num); 85 86 static struct workqueue_struct *wq; 87 88 static void init_query_mad(struct ib_smp *mad) 89 { 90 mad->base_version = 1; 91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 92 mad->class_version = 1; 93 mad->method = IB_MGMT_METHOD_GET; 94 } 95 96 static int check_flow_steering_support(struct mlx4_dev *dev) 97 { 98 int eth_num_ports = 0; 99 int ib_num_ports = 0; 100 101 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 102 103 if (dmfs) { 104 int i; 105 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 106 eth_num_ports++; 107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 108 ib_num_ports++; 109 dmfs &= (!ib_num_ports || 110 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 111 (!eth_num_ports || 112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 113 if (ib_num_ports && mlx4_is_mfunc(dev)) { 114 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 115 dmfs = 0; 116 } 117 } 118 return dmfs; 119 } 120 121 static int num_ib_ports(struct mlx4_dev *dev) 122 { 123 int ib_ports = 0; 124 int i; 125 126 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 127 ib_ports++; 128 129 return ib_ports; 130 } 131 132 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num) 133 { 134 struct mlx4_ib_dev *ibdev = to_mdev(device); 135 struct net_device *dev; 136 137 rcu_read_lock(); 138 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num); 139 140 if (dev) { 141 if (mlx4_is_bonded(ibdev->dev)) { 142 struct net_device *upper = NULL; 143 144 upper = netdev_master_upper_dev_get_rcu(dev); 145 if (upper) { 146 struct net_device *active; 147 148 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 149 if (active) 150 dev = active; 151 } 152 } 153 } 154 if (dev) 155 dev_hold(dev); 156 157 rcu_read_unlock(); 158 return dev; 159 } 160 161 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 162 struct mlx4_ib_dev *ibdev, 163 u8 port_num) 164 { 165 struct mlx4_cmd_mailbox *mailbox; 166 int err; 167 struct mlx4_dev *dev = ibdev->dev; 168 int i; 169 union ib_gid *gid_tbl; 170 171 mailbox = mlx4_alloc_cmd_mailbox(dev); 172 if (IS_ERR(mailbox)) 173 return -ENOMEM; 174 175 gid_tbl = mailbox->buf; 176 177 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 178 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 179 180 err = mlx4_cmd(dev, mailbox->dma, 181 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 182 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 183 MLX4_CMD_WRAPPED); 184 if (mlx4_is_bonded(dev)) 185 err += mlx4_cmd(dev, mailbox->dma, 186 MLX4_SET_PORT_GID_TABLE << 8 | 2, 187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 188 MLX4_CMD_WRAPPED); 189 190 mlx4_free_cmd_mailbox(dev, mailbox); 191 return err; 192 } 193 194 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 195 struct mlx4_ib_dev *ibdev, 196 u8 port_num) 197 { 198 struct mlx4_cmd_mailbox *mailbox; 199 int err; 200 struct mlx4_dev *dev = ibdev->dev; 201 int i; 202 struct { 203 union ib_gid gid; 204 __be32 rsrvd1[2]; 205 __be16 rsrvd2; 206 u8 type; 207 u8 version; 208 __be32 rsrvd3; 209 } *gid_tbl; 210 211 mailbox = mlx4_alloc_cmd_mailbox(dev); 212 if (IS_ERR(mailbox)) 213 return -ENOMEM; 214 215 gid_tbl = mailbox->buf; 216 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 217 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 218 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 219 gid_tbl[i].version = 2; 220 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 221 gid_tbl[i].type = 1; 222 } 223 } 224 225 err = mlx4_cmd(dev, mailbox->dma, 226 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 227 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 228 MLX4_CMD_WRAPPED); 229 if (mlx4_is_bonded(dev)) 230 err += mlx4_cmd(dev, mailbox->dma, 231 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 232 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 233 MLX4_CMD_WRAPPED); 234 235 mlx4_free_cmd_mailbox(dev, mailbox); 236 return err; 237 } 238 239 static int mlx4_ib_update_gids(struct gid_entry *gids, 240 struct mlx4_ib_dev *ibdev, 241 u8 port_num) 242 { 243 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 244 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 245 246 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 247 } 248 249 static void free_gid_entry(struct gid_entry *entry) 250 { 251 memset(&entry->gid, 0, sizeof(entry->gid)); 252 kfree(entry->ctx); 253 entry->ctx = NULL; 254 } 255 256 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context) 257 { 258 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 259 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 260 struct mlx4_port_gid_table *port_gid_table; 261 int free = -1, found = -1; 262 int ret = 0; 263 int hw_update = 0; 264 int i; 265 struct gid_entry *gids = NULL; 266 u16 vlan_id = 0xffff; 267 u8 mac[ETH_ALEN]; 268 269 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 270 return -EINVAL; 271 272 if (attr->port_num > MLX4_MAX_PORTS) 273 return -EINVAL; 274 275 if (!context) 276 return -EINVAL; 277 278 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]); 279 if (ret) 280 return ret; 281 port_gid_table = &iboe->gids[attr->port_num - 1]; 282 spin_lock_bh(&iboe->lock); 283 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 284 if (!memcmp(&port_gid_table->gids[i].gid, 285 &attr->gid, sizeof(attr->gid)) && 286 port_gid_table->gids[i].gid_type == attr->gid_type && 287 port_gid_table->gids[i].vlan_id == vlan_id) { 288 found = i; 289 break; 290 } 291 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid)) 292 free = i; /* HW has space */ 293 } 294 295 if (found < 0) { 296 if (free < 0) { 297 ret = -ENOSPC; 298 } else { 299 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 300 if (!port_gid_table->gids[free].ctx) { 301 ret = -ENOMEM; 302 } else { 303 *context = port_gid_table->gids[free].ctx; 304 memcpy(&port_gid_table->gids[free].gid, 305 &attr->gid, sizeof(attr->gid)); 306 port_gid_table->gids[free].gid_type = attr->gid_type; 307 port_gid_table->gids[free].vlan_id = vlan_id; 308 port_gid_table->gids[free].ctx->real_index = free; 309 port_gid_table->gids[free].ctx->refcount = 1; 310 hw_update = 1; 311 } 312 } 313 } else { 314 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 315 *context = ctx; 316 ctx->refcount++; 317 } 318 if (!ret && hw_update) { 319 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids), 320 GFP_ATOMIC); 321 if (!gids) { 322 ret = -ENOMEM; 323 *context = NULL; 324 free_gid_entry(&port_gid_table->gids[free]); 325 } else { 326 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 327 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 328 gids[i].gid_type = port_gid_table->gids[i].gid_type; 329 } 330 } 331 } 332 spin_unlock_bh(&iboe->lock); 333 334 if (!ret && hw_update) { 335 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 336 if (ret) { 337 spin_lock_bh(&iboe->lock); 338 *context = NULL; 339 free_gid_entry(&port_gid_table->gids[free]); 340 spin_unlock_bh(&iboe->lock); 341 } 342 kfree(gids); 343 } 344 345 return ret; 346 } 347 348 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context) 349 { 350 struct gid_cache_context *ctx = *context; 351 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 352 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 353 struct mlx4_port_gid_table *port_gid_table; 354 int ret = 0; 355 int hw_update = 0; 356 struct gid_entry *gids = NULL; 357 358 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 359 return -EINVAL; 360 361 if (attr->port_num > MLX4_MAX_PORTS) 362 return -EINVAL; 363 364 port_gid_table = &iboe->gids[attr->port_num - 1]; 365 spin_lock_bh(&iboe->lock); 366 if (ctx) { 367 ctx->refcount--; 368 if (!ctx->refcount) { 369 unsigned int real_index = ctx->real_index; 370 371 free_gid_entry(&port_gid_table->gids[real_index]); 372 hw_update = 1; 373 } 374 } 375 if (!ret && hw_update) { 376 int i; 377 378 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids), 379 GFP_ATOMIC); 380 if (!gids) { 381 ret = -ENOMEM; 382 } else { 383 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 384 memcpy(&gids[i].gid, 385 &port_gid_table->gids[i].gid, 386 sizeof(union ib_gid)); 387 gids[i].gid_type = 388 port_gid_table->gids[i].gid_type; 389 } 390 } 391 } 392 spin_unlock_bh(&iboe->lock); 393 394 if (!ret && hw_update) { 395 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 396 kfree(gids); 397 } 398 return ret; 399 } 400 401 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 402 const struct ib_gid_attr *attr) 403 { 404 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 405 struct gid_cache_context *ctx = NULL; 406 struct mlx4_port_gid_table *port_gid_table; 407 int real_index = -EINVAL; 408 int i; 409 unsigned long flags; 410 u8 port_num = attr->port_num; 411 412 if (port_num > MLX4_MAX_PORTS) 413 return -EINVAL; 414 415 if (mlx4_is_bonded(ibdev->dev)) 416 port_num = 1; 417 418 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 419 return attr->index; 420 421 spin_lock_irqsave(&iboe->lock, flags); 422 port_gid_table = &iboe->gids[port_num - 1]; 423 424 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 425 if (!memcmp(&port_gid_table->gids[i].gid, 426 &attr->gid, sizeof(attr->gid)) && 427 attr->gid_type == port_gid_table->gids[i].gid_type) { 428 ctx = port_gid_table->gids[i].ctx; 429 break; 430 } 431 if (ctx) 432 real_index = ctx->real_index; 433 spin_unlock_irqrestore(&iboe->lock, flags); 434 return real_index; 435 } 436 437 static int mlx4_ib_query_device(struct ib_device *ibdev, 438 struct ib_device_attr *props, 439 struct ib_udata *uhw) 440 { 441 struct mlx4_ib_dev *dev = to_mdev(ibdev); 442 struct ib_smp *in_mad = NULL; 443 struct ib_smp *out_mad = NULL; 444 int err; 445 int have_ib_ports; 446 struct mlx4_uverbs_ex_query_device cmd; 447 struct mlx4_uverbs_ex_query_device_resp resp = {}; 448 struct mlx4_clock_params clock_params; 449 450 if (uhw->inlen) { 451 if (uhw->inlen < sizeof(cmd)) 452 return -EINVAL; 453 454 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 455 if (err) 456 return err; 457 458 if (cmd.comp_mask) 459 return -EINVAL; 460 461 if (cmd.reserved) 462 return -EINVAL; 463 } 464 465 resp.response_length = offsetof(typeof(resp), response_length) + 466 sizeof(resp.response_length); 467 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 468 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 469 err = -ENOMEM; 470 if (!in_mad || !out_mad) 471 goto out; 472 473 init_query_mad(in_mad); 474 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 475 476 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 477 1, NULL, NULL, in_mad, out_mad); 478 if (err) 479 goto out; 480 481 memset(props, 0, sizeof *props); 482 483 have_ib_ports = num_ib_ports(dev->dev); 484 485 props->fw_ver = dev->dev->caps.fw_ver; 486 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 487 IB_DEVICE_PORT_ACTIVE_EVENT | 488 IB_DEVICE_SYS_IMAGE_GUID | 489 IB_DEVICE_RC_RNR_NAK_GEN | 490 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 491 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 492 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 493 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 494 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 495 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 496 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 497 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 498 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 499 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 500 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 501 if (dev->dev->caps.max_gso_sz && 502 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 503 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 504 props->device_cap_flags |= IB_DEVICE_UD_TSO; 505 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 506 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 507 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 508 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 510 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 511 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 512 props->device_cap_flags |= IB_DEVICE_XRC; 513 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 514 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 515 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 517 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 518 else 519 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 520 } 521 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 522 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 523 524 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 525 526 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 527 0xffffff; 528 props->vendor_part_id = dev->dev->persist->pdev->device; 529 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 530 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 531 532 props->max_mr_size = ~0ull; 533 props->page_size_cap = dev->dev->caps.page_size_cap; 534 props->max_qp = dev->dev->quotas.qp; 535 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 536 props->max_send_sge = 537 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 538 props->max_recv_sge = 539 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 540 props->max_sge_rd = MLX4_MAX_SGE_RD; 541 props->max_cq = dev->dev->quotas.cq; 542 props->max_cqe = dev->dev->caps.max_cqes; 543 props->max_mr = dev->dev->quotas.mpt; 544 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 545 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 546 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 547 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 548 props->max_srq = dev->dev->quotas.srq; 549 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 550 props->max_srq_sge = dev->dev->caps.max_srq_sge; 551 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 552 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 553 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 554 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 555 props->masked_atomic_cap = props->atomic_cap; 556 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 557 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 558 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 559 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 560 props->max_mcast_grp; 561 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 562 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 563 props->max_ah = INT_MAX; 564 565 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET || 566 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) { 567 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) { 568 props->rss_caps.max_rwq_indirection_tables = 569 props->max_qp; 570 props->rss_caps.max_rwq_indirection_table_size = 571 dev->dev->caps.max_rss_tbl_sz; 572 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET; 573 props->max_wq_type_rq = props->max_qp; 574 } 575 576 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 577 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS; 578 } 579 580 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT; 581 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD; 582 583 if (!mlx4_is_slave(dev->dev)) 584 err = mlx4_get_internal_clock_params(dev->dev, &clock_params); 585 586 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 587 resp.response_length += sizeof(resp.hca_core_clock_offset); 588 if (!err && !mlx4_is_slave(dev->dev)) { 589 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET; 590 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 591 } 592 } 593 594 if (uhw->outlen >= resp.response_length + 595 sizeof(resp.max_inl_recv_sz)) { 596 resp.response_length += sizeof(resp.max_inl_recv_sz); 597 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg * 598 sizeof(struct mlx4_wqe_data_seg); 599 } 600 601 if (offsetofend(typeof(resp), rss_caps) <= uhw->outlen) { 602 if (props->rss_caps.supported_qpts) { 603 resp.rss_caps.rx_hash_function = 604 MLX4_IB_RX_HASH_FUNC_TOEPLITZ; 605 606 resp.rss_caps.rx_hash_fields_mask = 607 MLX4_IB_RX_HASH_SRC_IPV4 | 608 MLX4_IB_RX_HASH_DST_IPV4 | 609 MLX4_IB_RX_HASH_SRC_IPV6 | 610 MLX4_IB_RX_HASH_DST_IPV6 | 611 MLX4_IB_RX_HASH_SRC_PORT_TCP | 612 MLX4_IB_RX_HASH_DST_PORT_TCP | 613 MLX4_IB_RX_HASH_SRC_PORT_UDP | 614 MLX4_IB_RX_HASH_DST_PORT_UDP; 615 616 if (dev->dev->caps.tunnel_offload_mode == 617 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 618 resp.rss_caps.rx_hash_fields_mask |= 619 MLX4_IB_RX_HASH_INNER; 620 } 621 resp.response_length = offsetof(typeof(resp), rss_caps) + 622 sizeof(resp.rss_caps); 623 } 624 625 if (offsetofend(typeof(resp), tso_caps) <= uhw->outlen) { 626 if (dev->dev->caps.max_gso_sz && 627 ((mlx4_ib_port_link_layer(ibdev, 1) == 628 IB_LINK_LAYER_ETHERNET) || 629 (mlx4_ib_port_link_layer(ibdev, 2) == 630 IB_LINK_LAYER_ETHERNET))) { 631 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz; 632 resp.tso_caps.supported_qpts |= 633 1 << IB_QPT_RAW_PACKET; 634 } 635 resp.response_length = offsetof(typeof(resp), tso_caps) + 636 sizeof(resp.tso_caps); 637 } 638 639 if (uhw->outlen) { 640 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 641 if (err) 642 goto out; 643 } 644 out: 645 kfree(in_mad); 646 kfree(out_mad); 647 648 return err; 649 } 650 651 static enum rdma_link_layer 652 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 653 { 654 struct mlx4_dev *dev = to_mdev(device)->dev; 655 656 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 657 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 658 } 659 660 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 661 struct ib_port_attr *props, int netw_view) 662 { 663 struct ib_smp *in_mad = NULL; 664 struct ib_smp *out_mad = NULL; 665 int ext_active_speed; 666 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 667 int err = -ENOMEM; 668 669 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 670 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 671 if (!in_mad || !out_mad) 672 goto out; 673 674 init_query_mad(in_mad); 675 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 676 in_mad->attr_mod = cpu_to_be32(port); 677 678 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 679 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 680 681 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 682 in_mad, out_mad); 683 if (err) 684 goto out; 685 686 687 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 688 props->lmc = out_mad->data[34] & 0x7; 689 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 690 props->sm_sl = out_mad->data[36] & 0xf; 691 props->state = out_mad->data[32] & 0xf; 692 props->phys_state = out_mad->data[33] >> 4; 693 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 694 if (netw_view) 695 props->gid_tbl_len = out_mad->data[50]; 696 else 697 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 698 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 699 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 700 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 701 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 702 props->active_width = out_mad->data[31] & 0xf; 703 props->active_speed = out_mad->data[35] >> 4; 704 props->max_mtu = out_mad->data[41] & 0xf; 705 props->active_mtu = out_mad->data[36] >> 4; 706 props->subnet_timeout = out_mad->data[51] & 0x1f; 707 props->max_vl_num = out_mad->data[37] >> 4; 708 props->init_type_reply = out_mad->data[41] >> 4; 709 710 /* Check if extended speeds (EDR/FDR/...) are supported */ 711 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 712 ext_active_speed = out_mad->data[62] >> 4; 713 714 switch (ext_active_speed) { 715 case 1: 716 props->active_speed = IB_SPEED_FDR; 717 break; 718 case 2: 719 props->active_speed = IB_SPEED_EDR; 720 break; 721 } 722 } 723 724 /* If reported active speed is QDR, check if is FDR-10 */ 725 if (props->active_speed == IB_SPEED_QDR) { 726 init_query_mad(in_mad); 727 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 728 in_mad->attr_mod = cpu_to_be32(port); 729 730 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 731 NULL, NULL, in_mad, out_mad); 732 if (err) 733 goto out; 734 735 /* Checking LinkSpeedActive for FDR-10 */ 736 if (out_mad->data[15] & 0x1) 737 props->active_speed = IB_SPEED_FDR10; 738 } 739 740 /* Avoid wrong speed value returned by FW if the IB link is down. */ 741 if (props->state == IB_PORT_DOWN) 742 props->active_speed = IB_SPEED_SDR; 743 744 out: 745 kfree(in_mad); 746 kfree(out_mad); 747 return err; 748 } 749 750 static u8 state_to_phys_state(enum ib_port_state state) 751 { 752 return state == IB_PORT_ACTIVE ? 753 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED; 754 } 755 756 static int eth_link_query_port(struct ib_device *ibdev, u8 port, 757 struct ib_port_attr *props) 758 { 759 760 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 761 struct mlx4_ib_iboe *iboe = &mdev->iboe; 762 struct net_device *ndev; 763 enum ib_mtu tmp; 764 struct mlx4_cmd_mailbox *mailbox; 765 int err = 0; 766 int is_bonded = mlx4_is_bonded(mdev->dev); 767 768 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 769 if (IS_ERR(mailbox)) 770 return PTR_ERR(mailbox); 771 772 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 773 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 774 MLX4_CMD_WRAPPED); 775 if (err) 776 goto out; 777 778 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) || 779 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 780 IB_WIDTH_4X : IB_WIDTH_1X; 781 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 782 IB_SPEED_FDR : IB_SPEED_QDR; 783 props->port_cap_flags = IB_PORT_CM_SUP; 784 props->ip_gids = true; 785 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 786 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 787 props->pkey_tbl_len = 1; 788 props->max_mtu = IB_MTU_4096; 789 props->max_vl_num = 2; 790 props->state = IB_PORT_DOWN; 791 props->phys_state = state_to_phys_state(props->state); 792 props->active_mtu = IB_MTU_256; 793 spin_lock_bh(&iboe->lock); 794 ndev = iboe->netdevs[port - 1]; 795 if (ndev && is_bonded) { 796 rcu_read_lock(); /* required to get upper dev */ 797 ndev = netdev_master_upper_dev_get_rcu(ndev); 798 rcu_read_unlock(); 799 } 800 if (!ndev) 801 goto out_unlock; 802 803 tmp = iboe_get_mtu(ndev->mtu); 804 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 805 806 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 807 IB_PORT_ACTIVE : IB_PORT_DOWN; 808 props->phys_state = state_to_phys_state(props->state); 809 out_unlock: 810 spin_unlock_bh(&iboe->lock); 811 out: 812 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 813 return err; 814 } 815 816 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 817 struct ib_port_attr *props, int netw_view) 818 { 819 int err; 820 821 /* props being zeroed by the caller, avoid zeroing it here */ 822 823 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 824 ib_link_query_port(ibdev, port, props, netw_view) : 825 eth_link_query_port(ibdev, port, props); 826 827 return err; 828 } 829 830 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 831 struct ib_port_attr *props) 832 { 833 /* returns host view */ 834 return __mlx4_ib_query_port(ibdev, port, props, 0); 835 } 836 837 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 838 union ib_gid *gid, int netw_view) 839 { 840 struct ib_smp *in_mad = NULL; 841 struct ib_smp *out_mad = NULL; 842 int err = -ENOMEM; 843 struct mlx4_ib_dev *dev = to_mdev(ibdev); 844 int clear = 0; 845 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 846 847 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 848 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 849 if (!in_mad || !out_mad) 850 goto out; 851 852 init_query_mad(in_mad); 853 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 854 in_mad->attr_mod = cpu_to_be32(port); 855 856 if (mlx4_is_mfunc(dev->dev) && netw_view) 857 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 858 859 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 860 if (err) 861 goto out; 862 863 memcpy(gid->raw, out_mad->data + 8, 8); 864 865 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 866 if (index) { 867 /* For any index > 0, return the null guid */ 868 err = 0; 869 clear = 1; 870 goto out; 871 } 872 } 873 874 init_query_mad(in_mad); 875 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 876 in_mad->attr_mod = cpu_to_be32(index / 8); 877 878 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 879 NULL, NULL, in_mad, out_mad); 880 if (err) 881 goto out; 882 883 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 884 885 out: 886 if (clear) 887 memset(gid->raw + 8, 0, 8); 888 kfree(in_mad); 889 kfree(out_mad); 890 return err; 891 } 892 893 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 894 union ib_gid *gid) 895 { 896 if (rdma_protocol_ib(ibdev, port)) 897 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 898 return 0; 899 } 900 901 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl) 902 { 903 union sl2vl_tbl_to_u64 sl2vl64; 904 struct ib_smp *in_mad = NULL; 905 struct ib_smp *out_mad = NULL; 906 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 907 int err = -ENOMEM; 908 int jj; 909 910 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 911 *sl2vl_tbl = 0; 912 return 0; 913 } 914 915 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 916 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 917 if (!in_mad || !out_mad) 918 goto out; 919 920 init_query_mad(in_mad); 921 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 922 in_mad->attr_mod = 0; 923 924 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 925 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 926 927 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 928 in_mad, out_mad); 929 if (err) 930 goto out; 931 932 for (jj = 0; jj < 8; jj++) 933 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 934 *sl2vl_tbl = sl2vl64.sl64; 935 936 out: 937 kfree(in_mad); 938 kfree(out_mad); 939 return err; 940 } 941 942 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 943 { 944 u64 sl2vl; 945 int i; 946 int err; 947 948 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 949 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 950 continue; 951 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 952 if (err) { 953 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 954 i, err); 955 sl2vl = 0; 956 } 957 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 958 } 959 } 960 961 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 962 u16 *pkey, int netw_view) 963 { 964 struct ib_smp *in_mad = NULL; 965 struct ib_smp *out_mad = NULL; 966 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 967 int err = -ENOMEM; 968 969 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 970 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 971 if (!in_mad || !out_mad) 972 goto out; 973 974 init_query_mad(in_mad); 975 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 976 in_mad->attr_mod = cpu_to_be32(index / 32); 977 978 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 979 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 980 981 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 982 in_mad, out_mad); 983 if (err) 984 goto out; 985 986 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 987 988 out: 989 kfree(in_mad); 990 kfree(out_mad); 991 return err; 992 } 993 994 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 995 { 996 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 997 } 998 999 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 1000 struct ib_device_modify *props) 1001 { 1002 struct mlx4_cmd_mailbox *mailbox; 1003 unsigned long flags; 1004 1005 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 1006 return -EOPNOTSUPP; 1007 1008 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 1009 return 0; 1010 1011 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 1012 return -EOPNOTSUPP; 1013 1014 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 1015 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1016 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 1017 1018 /* 1019 * If possible, pass node desc to FW, so it can generate 1020 * a 144 trap. If cmd fails, just ignore. 1021 */ 1022 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 1023 if (IS_ERR(mailbox)) 1024 return 0; 1025 1026 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1027 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 1028 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 1029 1030 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 1031 1032 return 0; 1033 } 1034 1035 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, 1036 u32 cap_mask) 1037 { 1038 struct mlx4_cmd_mailbox *mailbox; 1039 int err; 1040 1041 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 1042 if (IS_ERR(mailbox)) 1043 return PTR_ERR(mailbox); 1044 1045 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1046 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 1047 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 1048 } else { 1049 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 1050 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 1051 } 1052 1053 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 1054 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1055 MLX4_CMD_WRAPPED); 1056 1057 mlx4_free_cmd_mailbox(dev->dev, mailbox); 1058 return err; 1059 } 1060 1061 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 1062 struct ib_port_modify *props) 1063 { 1064 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1065 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1066 struct ib_port_attr attr; 1067 u32 cap_mask; 1068 int err; 1069 1070 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1071 * of whether port link layer is ETH or IB. For ETH ports, qkey 1072 * violations and port capabilities are not meaningful. 1073 */ 1074 if (is_eth) 1075 return 0; 1076 1077 mutex_lock(&mdev->cap_mask_mutex); 1078 1079 err = ib_query_port(ibdev, port, &attr); 1080 if (err) 1081 goto out; 1082 1083 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1084 ~props->clr_port_cap_mask; 1085 1086 err = mlx4_ib_SET_PORT(mdev, port, 1087 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1088 cap_mask); 1089 1090 out: 1091 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1092 return err; 1093 } 1094 1095 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx, 1096 struct ib_udata *udata) 1097 { 1098 struct ib_device *ibdev = uctx->device; 1099 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1100 struct mlx4_ib_ucontext *context = to_mucontext(uctx); 1101 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1102 struct mlx4_ib_alloc_ucontext_resp resp; 1103 int err; 1104 1105 if (!dev->ib_active) 1106 return -EAGAIN; 1107 1108 if (ibdev->ops.uverbs_abi_ver == 1109 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1110 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1111 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1112 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1113 } else { 1114 resp.dev_caps = dev->dev->caps.userspace_caps; 1115 resp.qp_tab_size = dev->dev->caps.num_qps; 1116 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1117 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1118 resp.cqe_size = dev->dev->caps.cqe_size; 1119 } 1120 1121 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1122 if (err) 1123 return err; 1124 1125 INIT_LIST_HEAD(&context->db_page_list); 1126 mutex_init(&context->db_page_mutex); 1127 1128 INIT_LIST_HEAD(&context->wqn_ranges_list); 1129 mutex_init(&context->wqn_ranges_mutex); 1130 1131 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1132 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1133 else 1134 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1135 1136 if (err) { 1137 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1138 return -EFAULT; 1139 } 1140 1141 return err; 1142 } 1143 1144 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1145 { 1146 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1147 1148 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1149 } 1150 1151 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1152 { 1153 } 1154 1155 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1156 { 1157 struct mlx4_ib_dev *dev = to_mdev(context->device); 1158 1159 switch (vma->vm_pgoff) { 1160 case 0: 1161 return rdma_user_mmap_io(context, vma, 1162 to_mucontext(context)->uar.pfn, 1163 PAGE_SIZE, 1164 pgprot_noncached(vma->vm_page_prot), 1165 NULL); 1166 1167 case 1: 1168 if (dev->dev->caps.bf_reg_size == 0) 1169 return -EINVAL; 1170 return rdma_user_mmap_io( 1171 context, vma, 1172 to_mucontext(context)->uar.pfn + 1173 dev->dev->caps.num_uars, 1174 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot), 1175 NULL); 1176 1177 case 3: { 1178 struct mlx4_clock_params params; 1179 int ret; 1180 1181 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1182 if (ret) 1183 return ret; 1184 1185 return rdma_user_mmap_io( 1186 context, vma, 1187 (pci_resource_start(dev->dev->persist->pdev, 1188 params.bar) + 1189 params.offset) >> 1190 PAGE_SHIFT, 1191 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot), 1192 NULL); 1193 } 1194 1195 default: 1196 return -EINVAL; 1197 } 1198 } 1199 1200 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata) 1201 { 1202 struct mlx4_ib_pd *pd = to_mpd(ibpd); 1203 struct ib_device *ibdev = ibpd->device; 1204 int err; 1205 1206 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1207 if (err) 1208 return err; 1209 1210 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) { 1211 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1212 return -EFAULT; 1213 } 1214 return 0; 1215 } 1216 1217 static void mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata) 1218 { 1219 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1220 } 1221 1222 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 1223 struct ib_udata *udata) 1224 { 1225 struct mlx4_ib_xrcd *xrcd; 1226 struct ib_cq_init_attr cq_attr = {}; 1227 int err; 1228 1229 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1230 return ERR_PTR(-ENOSYS); 1231 1232 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 1233 if (!xrcd) 1234 return ERR_PTR(-ENOMEM); 1235 1236 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 1237 if (err) 1238 goto err1; 1239 1240 xrcd->pd = ib_alloc_pd(ibdev, 0); 1241 if (IS_ERR(xrcd->pd)) { 1242 err = PTR_ERR(xrcd->pd); 1243 goto err2; 1244 } 1245 1246 cq_attr.cqe = 1; 1247 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr); 1248 if (IS_ERR(xrcd->cq)) { 1249 err = PTR_ERR(xrcd->cq); 1250 goto err3; 1251 } 1252 1253 return &xrcd->ibxrcd; 1254 1255 err3: 1256 ib_dealloc_pd(xrcd->pd); 1257 err2: 1258 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 1259 err1: 1260 kfree(xrcd); 1261 return ERR_PTR(err); 1262 } 1263 1264 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 1265 { 1266 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1267 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1268 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1269 kfree(xrcd); 1270 1271 return 0; 1272 } 1273 1274 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1275 { 1276 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1277 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1278 struct mlx4_ib_gid_entry *ge; 1279 1280 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1281 if (!ge) 1282 return -ENOMEM; 1283 1284 ge->gid = *gid; 1285 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1286 ge->port = mqp->port; 1287 ge->added = 1; 1288 } 1289 1290 mutex_lock(&mqp->mutex); 1291 list_add_tail(&ge->list, &mqp->gid_list); 1292 mutex_unlock(&mqp->mutex); 1293 1294 return 0; 1295 } 1296 1297 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1298 struct mlx4_ib_counters *ctr_table) 1299 { 1300 struct counter_index *counter, *tmp_count; 1301 1302 mutex_lock(&ctr_table->mutex); 1303 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1304 list) { 1305 if (counter->allocated) 1306 mlx4_counter_free(ibdev->dev, counter->index); 1307 list_del(&counter->list); 1308 kfree(counter); 1309 } 1310 mutex_unlock(&ctr_table->mutex); 1311 } 1312 1313 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1314 union ib_gid *gid) 1315 { 1316 struct net_device *ndev; 1317 int ret = 0; 1318 1319 if (!mqp->port) 1320 return 0; 1321 1322 spin_lock_bh(&mdev->iboe.lock); 1323 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1324 if (ndev) 1325 dev_hold(ndev); 1326 spin_unlock_bh(&mdev->iboe.lock); 1327 1328 if (ndev) { 1329 ret = 1; 1330 dev_put(ndev); 1331 } 1332 1333 return ret; 1334 } 1335 1336 struct mlx4_ib_steering { 1337 struct list_head list; 1338 struct mlx4_flow_reg_id reg_id; 1339 union ib_gid gid; 1340 }; 1341 1342 #define LAST_ETH_FIELD vlan_tag 1343 #define LAST_IB_FIELD sl 1344 #define LAST_IPV4_FIELD dst_ip 1345 #define LAST_TCP_UDP_FIELD src_port 1346 1347 /* Field is the last supported field */ 1348 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1349 memchr_inv((void *)&filter.field +\ 1350 sizeof(filter.field), 0,\ 1351 sizeof(filter) -\ 1352 offsetof(typeof(filter), field) -\ 1353 sizeof(filter.field)) 1354 1355 static int parse_flow_attr(struct mlx4_dev *dev, 1356 u32 qp_num, 1357 union ib_flow_spec *ib_spec, 1358 struct _rule_hw *mlx4_spec) 1359 { 1360 enum mlx4_net_trans_rule_id type; 1361 1362 switch (ib_spec->type) { 1363 case IB_FLOW_SPEC_ETH: 1364 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1365 return -ENOTSUPP; 1366 1367 type = MLX4_NET_TRANS_RULE_ID_ETH; 1368 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1369 ETH_ALEN); 1370 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1371 ETH_ALEN); 1372 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1373 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1374 break; 1375 case IB_FLOW_SPEC_IB: 1376 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1377 return -ENOTSUPP; 1378 1379 type = MLX4_NET_TRANS_RULE_ID_IB; 1380 mlx4_spec->ib.l3_qpn = 1381 cpu_to_be32(qp_num); 1382 mlx4_spec->ib.qpn_mask = 1383 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1384 break; 1385 1386 1387 case IB_FLOW_SPEC_IPV4: 1388 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1389 return -ENOTSUPP; 1390 1391 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1392 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1393 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1394 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1395 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1396 break; 1397 1398 case IB_FLOW_SPEC_TCP: 1399 case IB_FLOW_SPEC_UDP: 1400 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1401 return -ENOTSUPP; 1402 1403 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1404 MLX4_NET_TRANS_RULE_ID_TCP : 1405 MLX4_NET_TRANS_RULE_ID_UDP; 1406 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1407 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1408 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1409 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1410 break; 1411 1412 default: 1413 return -EINVAL; 1414 } 1415 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1416 mlx4_hw_rule_sz(dev, type) < 0) 1417 return -EINVAL; 1418 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1419 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1420 return mlx4_hw_rule_sz(dev, type); 1421 } 1422 1423 struct default_rules { 1424 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1425 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1426 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1427 __u8 link_layer; 1428 }; 1429 static const struct default_rules default_table[] = { 1430 { 1431 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1432 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1433 .rules_create_list = {IB_FLOW_SPEC_IB}, 1434 .link_layer = IB_LINK_LAYER_INFINIBAND 1435 } 1436 }; 1437 1438 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1439 struct ib_flow_attr *flow_attr) 1440 { 1441 int i, j, k; 1442 void *ib_flow; 1443 const struct default_rules *pdefault_rules = default_table; 1444 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1445 1446 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1447 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1448 memset(&field_types, 0, sizeof(field_types)); 1449 1450 if (link_layer != pdefault_rules->link_layer) 1451 continue; 1452 1453 ib_flow = flow_attr + 1; 1454 /* we assume the specs are sorted */ 1455 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1456 j < flow_attr->num_of_specs; k++) { 1457 union ib_flow_spec *current_flow = 1458 (union ib_flow_spec *)ib_flow; 1459 1460 /* same layer but different type */ 1461 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1462 (pdefault_rules->mandatory_fields[k] & 1463 IB_FLOW_SPEC_LAYER_MASK)) && 1464 (current_flow->type != 1465 pdefault_rules->mandatory_fields[k])) 1466 goto out; 1467 1468 /* same layer, try match next one */ 1469 if (current_flow->type == 1470 pdefault_rules->mandatory_fields[k]) { 1471 j++; 1472 ib_flow += 1473 ((union ib_flow_spec *)ib_flow)->size; 1474 } 1475 } 1476 1477 ib_flow = flow_attr + 1; 1478 for (j = 0; j < flow_attr->num_of_specs; 1479 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1480 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1481 /* same layer and same type */ 1482 if (((union ib_flow_spec *)ib_flow)->type == 1483 pdefault_rules->mandatory_not_fields[k]) 1484 goto out; 1485 1486 return i; 1487 } 1488 out: 1489 return -1; 1490 } 1491 1492 static int __mlx4_ib_create_default_rules( 1493 struct mlx4_ib_dev *mdev, 1494 struct ib_qp *qp, 1495 const struct default_rules *pdefault_rules, 1496 struct _rule_hw *mlx4_spec) { 1497 int size = 0; 1498 int i; 1499 1500 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1501 union ib_flow_spec ib_spec = {}; 1502 int ret; 1503 1504 switch (pdefault_rules->rules_create_list[i]) { 1505 case 0: 1506 /* no rule */ 1507 continue; 1508 case IB_FLOW_SPEC_IB: 1509 ib_spec.type = IB_FLOW_SPEC_IB; 1510 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1511 1512 break; 1513 default: 1514 /* invalid rule */ 1515 return -EINVAL; 1516 } 1517 /* We must put empty rule, qpn is being ignored */ 1518 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1519 mlx4_spec); 1520 if (ret < 0) { 1521 pr_info("invalid parsing\n"); 1522 return -EINVAL; 1523 } 1524 1525 mlx4_spec = (void *)mlx4_spec + ret; 1526 size += ret; 1527 } 1528 return size; 1529 } 1530 1531 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1532 int domain, 1533 enum mlx4_net_trans_promisc_mode flow_type, 1534 u64 *reg_id) 1535 { 1536 int ret, i; 1537 int size = 0; 1538 void *ib_flow; 1539 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1540 struct mlx4_cmd_mailbox *mailbox; 1541 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1542 int default_flow; 1543 1544 static const u16 __mlx4_domain[] = { 1545 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 1546 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL, 1547 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS, 1548 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC, 1549 }; 1550 1551 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1552 pr_err("Invalid priority value %d\n", flow_attr->priority); 1553 return -EINVAL; 1554 } 1555 1556 if (domain >= IB_FLOW_DOMAIN_NUM) { 1557 pr_err("Invalid domain value %d\n", domain); 1558 return -EINVAL; 1559 } 1560 1561 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1562 return -EINVAL; 1563 1564 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1565 if (IS_ERR(mailbox)) 1566 return PTR_ERR(mailbox); 1567 ctrl = mailbox->buf; 1568 1569 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 1570 flow_attr->priority); 1571 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1572 ctrl->port = flow_attr->port; 1573 ctrl->qpn = cpu_to_be32(qp->qp_num); 1574 1575 ib_flow = flow_attr + 1; 1576 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1577 /* Add default flows */ 1578 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1579 if (default_flow >= 0) { 1580 ret = __mlx4_ib_create_default_rules( 1581 mdev, qp, default_table + default_flow, 1582 mailbox->buf + size); 1583 if (ret < 0) { 1584 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1585 return -EINVAL; 1586 } 1587 size += ret; 1588 } 1589 for (i = 0; i < flow_attr->num_of_specs; i++) { 1590 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1591 mailbox->buf + size); 1592 if (ret < 0) { 1593 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1594 return -EINVAL; 1595 } 1596 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1597 size += ret; 1598 } 1599 1600 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR && 1601 flow_attr->num_of_specs == 1) { 1602 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1); 1603 enum ib_flow_spec_type header_spec = 1604 ((union ib_flow_spec *)(flow_attr + 1))->type; 1605 1606 if (header_spec == IB_FLOW_SPEC_ETH) 1607 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header); 1608 } 1609 1610 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1611 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1612 MLX4_CMD_NATIVE); 1613 if (ret == -ENOMEM) 1614 pr_err("mcg table is full. Fail to register network rule.\n"); 1615 else if (ret == -ENXIO) 1616 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1617 else if (ret) 1618 pr_err("Invalid argument. Fail to register network rule.\n"); 1619 1620 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1621 return ret; 1622 } 1623 1624 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1625 { 1626 int err; 1627 err = mlx4_cmd(dev, reg_id, 0, 0, 1628 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1629 MLX4_CMD_NATIVE); 1630 if (err) 1631 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1632 reg_id); 1633 return err; 1634 } 1635 1636 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1637 u64 *reg_id) 1638 { 1639 void *ib_flow; 1640 union ib_flow_spec *ib_spec; 1641 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1642 int err = 0; 1643 1644 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1645 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1646 return 0; /* do nothing */ 1647 1648 ib_flow = flow_attr + 1; 1649 ib_spec = (union ib_flow_spec *)ib_flow; 1650 1651 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1652 return 0; /* do nothing */ 1653 1654 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1655 flow_attr->port, qp->qp_num, 1656 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1657 reg_id); 1658 return err; 1659 } 1660 1661 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1662 struct ib_flow_attr *flow_attr, 1663 enum mlx4_net_trans_promisc_mode *type) 1664 { 1665 int err = 0; 1666 1667 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1668 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1669 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1670 return -EOPNOTSUPP; 1671 } 1672 1673 if (flow_attr->num_of_specs == 0) { 1674 type[0] = MLX4_FS_MC_SNIFFER; 1675 type[1] = MLX4_FS_UC_SNIFFER; 1676 } else { 1677 union ib_flow_spec *ib_spec; 1678 1679 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1680 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1681 return -EINVAL; 1682 1683 /* if all is zero than MC and UC */ 1684 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1685 type[0] = MLX4_FS_MC_SNIFFER; 1686 type[1] = MLX4_FS_UC_SNIFFER; 1687 } else { 1688 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1689 ib_spec->eth.mask.dst_mac[1], 1690 ib_spec->eth.mask.dst_mac[2], 1691 ib_spec->eth.mask.dst_mac[3], 1692 ib_spec->eth.mask.dst_mac[4], 1693 ib_spec->eth.mask.dst_mac[5]}; 1694 1695 /* Above xor was only on MC bit, non empty mask is valid 1696 * only if this bit is set and rest are zero. 1697 */ 1698 if (!is_zero_ether_addr(&mac[0])) 1699 return -EINVAL; 1700 1701 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1702 type[0] = MLX4_FS_MC_SNIFFER; 1703 else 1704 type[0] = MLX4_FS_UC_SNIFFER; 1705 } 1706 } 1707 1708 return err; 1709 } 1710 1711 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1712 struct ib_flow_attr *flow_attr, 1713 int domain, struct ib_udata *udata) 1714 { 1715 int err = 0, i = 0, j = 0; 1716 struct mlx4_ib_flow *mflow; 1717 enum mlx4_net_trans_promisc_mode type[2]; 1718 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1719 int is_bonded = mlx4_is_bonded(dev); 1720 1721 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt) 1722 return ERR_PTR(-EINVAL); 1723 1724 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP) 1725 return ERR_PTR(-EOPNOTSUPP); 1726 1727 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1728 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1729 return ERR_PTR(-EOPNOTSUPP); 1730 1731 if (udata && 1732 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen)) 1733 return ERR_PTR(-EOPNOTSUPP); 1734 1735 memset(type, 0, sizeof(type)); 1736 1737 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1738 if (!mflow) { 1739 err = -ENOMEM; 1740 goto err_free; 1741 } 1742 1743 switch (flow_attr->type) { 1744 case IB_FLOW_ATTR_NORMAL: 1745 /* If dont trap flag (continue match) is set, under specific 1746 * condition traffic be replicated to given qp, 1747 * without stealing it 1748 */ 1749 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1750 err = mlx4_ib_add_dont_trap_rule(dev, 1751 flow_attr, 1752 type); 1753 if (err) 1754 goto err_free; 1755 } else { 1756 type[0] = MLX4_FS_REGULAR; 1757 } 1758 break; 1759 1760 case IB_FLOW_ATTR_ALL_DEFAULT: 1761 type[0] = MLX4_FS_ALL_DEFAULT; 1762 break; 1763 1764 case IB_FLOW_ATTR_MC_DEFAULT: 1765 type[0] = MLX4_FS_MC_DEFAULT; 1766 break; 1767 1768 case IB_FLOW_ATTR_SNIFFER: 1769 type[0] = MLX4_FS_MIRROR_RX_PORT; 1770 type[1] = MLX4_FS_MIRROR_SX_PORT; 1771 break; 1772 1773 default: 1774 err = -EINVAL; 1775 goto err_free; 1776 } 1777 1778 while (i < ARRAY_SIZE(type) && type[i]) { 1779 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i], 1780 &mflow->reg_id[i].id); 1781 if (err) 1782 goto err_create_flow; 1783 if (is_bonded) { 1784 /* Application always sees one port so the mirror rule 1785 * must be on port #2 1786 */ 1787 flow_attr->port = 2; 1788 err = __mlx4_ib_create_flow(qp, flow_attr, 1789 domain, type[j], 1790 &mflow->reg_id[j].mirror); 1791 flow_attr->port = 1; 1792 if (err) 1793 goto err_create_flow; 1794 j++; 1795 } 1796 1797 i++; 1798 } 1799 1800 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1801 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1802 &mflow->reg_id[i].id); 1803 if (err) 1804 goto err_create_flow; 1805 1806 if (is_bonded) { 1807 flow_attr->port = 2; 1808 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1809 &mflow->reg_id[j].mirror); 1810 flow_attr->port = 1; 1811 if (err) 1812 goto err_create_flow; 1813 j++; 1814 } 1815 /* function to create mirror rule */ 1816 i++; 1817 } 1818 1819 return &mflow->ibflow; 1820 1821 err_create_flow: 1822 while (i) { 1823 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1824 mflow->reg_id[i].id); 1825 i--; 1826 } 1827 1828 while (j) { 1829 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1830 mflow->reg_id[j].mirror); 1831 j--; 1832 } 1833 err_free: 1834 kfree(mflow); 1835 return ERR_PTR(err); 1836 } 1837 1838 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1839 { 1840 int err, ret = 0; 1841 int i = 0; 1842 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1843 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1844 1845 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1846 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1847 if (err) 1848 ret = err; 1849 if (mflow->reg_id[i].mirror) { 1850 err = __mlx4_ib_destroy_flow(mdev->dev, 1851 mflow->reg_id[i].mirror); 1852 if (err) 1853 ret = err; 1854 } 1855 i++; 1856 } 1857 1858 kfree(mflow); 1859 return ret; 1860 } 1861 1862 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1863 { 1864 int err; 1865 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1866 struct mlx4_dev *dev = mdev->dev; 1867 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1868 struct mlx4_ib_steering *ib_steering = NULL; 1869 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1870 struct mlx4_flow_reg_id reg_id; 1871 1872 if (mdev->dev->caps.steering_mode == 1873 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1874 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1875 if (!ib_steering) 1876 return -ENOMEM; 1877 } 1878 1879 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1880 !!(mqp->flags & 1881 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1882 prot, ®_id.id); 1883 if (err) { 1884 pr_err("multicast attach op failed, err %d\n", err); 1885 goto err_malloc; 1886 } 1887 1888 reg_id.mirror = 0; 1889 if (mlx4_is_bonded(dev)) { 1890 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1891 (mqp->port == 1) ? 2 : 1, 1892 !!(mqp->flags & 1893 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1894 prot, ®_id.mirror); 1895 if (err) 1896 goto err_add; 1897 } 1898 1899 err = add_gid_entry(ibqp, gid); 1900 if (err) 1901 goto err_add; 1902 1903 if (ib_steering) { 1904 memcpy(ib_steering->gid.raw, gid->raw, 16); 1905 ib_steering->reg_id = reg_id; 1906 mutex_lock(&mqp->mutex); 1907 list_add(&ib_steering->list, &mqp->steering_rules); 1908 mutex_unlock(&mqp->mutex); 1909 } 1910 return 0; 1911 1912 err_add: 1913 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1914 prot, reg_id.id); 1915 if (reg_id.mirror) 1916 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1917 prot, reg_id.mirror); 1918 err_malloc: 1919 kfree(ib_steering); 1920 1921 return err; 1922 } 1923 1924 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1925 { 1926 struct mlx4_ib_gid_entry *ge; 1927 struct mlx4_ib_gid_entry *tmp; 1928 struct mlx4_ib_gid_entry *ret = NULL; 1929 1930 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1931 if (!memcmp(raw, ge->gid.raw, 16)) { 1932 ret = ge; 1933 break; 1934 } 1935 } 1936 1937 return ret; 1938 } 1939 1940 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1941 { 1942 int err; 1943 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1944 struct mlx4_dev *dev = mdev->dev; 1945 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1946 struct net_device *ndev; 1947 struct mlx4_ib_gid_entry *ge; 1948 struct mlx4_flow_reg_id reg_id = {0, 0}; 1949 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1950 1951 if (mdev->dev->caps.steering_mode == 1952 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1953 struct mlx4_ib_steering *ib_steering; 1954 1955 mutex_lock(&mqp->mutex); 1956 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 1957 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 1958 list_del(&ib_steering->list); 1959 break; 1960 } 1961 } 1962 mutex_unlock(&mqp->mutex); 1963 if (&ib_steering->list == &mqp->steering_rules) { 1964 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 1965 return -EINVAL; 1966 } 1967 reg_id = ib_steering->reg_id; 1968 kfree(ib_steering); 1969 } 1970 1971 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1972 prot, reg_id.id); 1973 if (err) 1974 return err; 1975 1976 if (mlx4_is_bonded(dev)) { 1977 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1978 prot, reg_id.mirror); 1979 if (err) 1980 return err; 1981 } 1982 1983 mutex_lock(&mqp->mutex); 1984 ge = find_gid_entry(mqp, gid->raw); 1985 if (ge) { 1986 spin_lock_bh(&mdev->iboe.lock); 1987 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 1988 if (ndev) 1989 dev_hold(ndev); 1990 spin_unlock_bh(&mdev->iboe.lock); 1991 if (ndev) 1992 dev_put(ndev); 1993 list_del(&ge->list); 1994 kfree(ge); 1995 } else 1996 pr_warn("could not find mgid entry\n"); 1997 1998 mutex_unlock(&mqp->mutex); 1999 2000 return 0; 2001 } 2002 2003 static int init_node_data(struct mlx4_ib_dev *dev) 2004 { 2005 struct ib_smp *in_mad = NULL; 2006 struct ib_smp *out_mad = NULL; 2007 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 2008 int err = -ENOMEM; 2009 2010 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 2011 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 2012 if (!in_mad || !out_mad) 2013 goto out; 2014 2015 init_query_mad(in_mad); 2016 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 2017 if (mlx4_is_master(dev->dev)) 2018 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 2019 2020 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2021 if (err) 2022 goto out; 2023 2024 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 2025 2026 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 2027 2028 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2029 if (err) 2030 goto out; 2031 2032 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2033 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2034 2035 out: 2036 kfree(in_mad); 2037 kfree(out_mad); 2038 return err; 2039 } 2040 2041 static ssize_t hca_type_show(struct device *device, 2042 struct device_attribute *attr, char *buf) 2043 { 2044 struct mlx4_ib_dev *dev = 2045 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2046 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device); 2047 } 2048 static DEVICE_ATTR_RO(hca_type); 2049 2050 static ssize_t hw_rev_show(struct device *device, 2051 struct device_attribute *attr, char *buf) 2052 { 2053 struct mlx4_ib_dev *dev = 2054 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2055 return sprintf(buf, "%x\n", dev->dev->rev_id); 2056 } 2057 static DEVICE_ATTR_RO(hw_rev); 2058 2059 static ssize_t board_id_show(struct device *device, 2060 struct device_attribute *attr, char *buf) 2061 { 2062 struct mlx4_ib_dev *dev = 2063 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2064 2065 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN, 2066 dev->dev->board_id); 2067 } 2068 static DEVICE_ATTR_RO(board_id); 2069 2070 static struct attribute *mlx4_class_attributes[] = { 2071 &dev_attr_hw_rev.attr, 2072 &dev_attr_hca_type.attr, 2073 &dev_attr_board_id.attr, 2074 NULL 2075 }; 2076 2077 static const struct attribute_group mlx4_attr_group = { 2078 .attrs = mlx4_class_attributes, 2079 }; 2080 2081 struct diag_counter { 2082 const char *name; 2083 u32 offset; 2084 }; 2085 2086 #define DIAG_COUNTER(_name, _offset) \ 2087 { .name = #_name, .offset = _offset } 2088 2089 static const struct diag_counter diag_basic[] = { 2090 DIAG_COUNTER(rq_num_lle, 0x00), 2091 DIAG_COUNTER(sq_num_lle, 0x04), 2092 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2093 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2094 DIAG_COUNTER(rq_num_lpe, 0x18), 2095 DIAG_COUNTER(sq_num_lpe, 0x1C), 2096 DIAG_COUNTER(rq_num_wrfe, 0x20), 2097 DIAG_COUNTER(sq_num_wrfe, 0x24), 2098 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2099 DIAG_COUNTER(sq_num_bre, 0x34), 2100 DIAG_COUNTER(sq_num_rire, 0x44), 2101 DIAG_COUNTER(rq_num_rire, 0x48), 2102 DIAG_COUNTER(sq_num_rae, 0x4C), 2103 DIAG_COUNTER(rq_num_rae, 0x50), 2104 DIAG_COUNTER(sq_num_roe, 0x54), 2105 DIAG_COUNTER(sq_num_tree, 0x5C), 2106 DIAG_COUNTER(sq_num_rree, 0x64), 2107 DIAG_COUNTER(rq_num_rnr, 0x68), 2108 DIAG_COUNTER(sq_num_rnr, 0x6C), 2109 DIAG_COUNTER(rq_num_oos, 0x100), 2110 DIAG_COUNTER(sq_num_oos, 0x104), 2111 }; 2112 2113 static const struct diag_counter diag_ext[] = { 2114 DIAG_COUNTER(rq_num_dup, 0x130), 2115 DIAG_COUNTER(sq_num_to, 0x134), 2116 }; 2117 2118 static const struct diag_counter diag_device_only[] = { 2119 DIAG_COUNTER(num_cqovf, 0x1A0), 2120 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2121 }; 2122 2123 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev, 2124 u8 port_num) 2125 { 2126 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2127 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2128 2129 if (!diag[!!port_num].name) 2130 return NULL; 2131 2132 return rdma_alloc_hw_stats_struct(diag[!!port_num].name, 2133 diag[!!port_num].num_counters, 2134 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2135 } 2136 2137 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2138 struct rdma_hw_stats *stats, 2139 u8 port, int index) 2140 { 2141 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2142 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2143 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2144 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2145 int ret; 2146 int i; 2147 2148 ret = mlx4_query_diag_counters(dev->dev, 2149 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2150 diag[!!port].offset, hw_value, 2151 diag[!!port].num_counters, port); 2152 2153 if (ret) 2154 return ret; 2155 2156 for (i = 0; i < diag[!!port].num_counters; i++) 2157 stats->value[i] = hw_value[i]; 2158 2159 return diag[!!port].num_counters; 2160 } 2161 2162 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2163 const char ***name, 2164 u32 **offset, 2165 u32 *num, 2166 bool port) 2167 { 2168 u32 num_counters; 2169 2170 num_counters = ARRAY_SIZE(diag_basic); 2171 2172 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2173 num_counters += ARRAY_SIZE(diag_ext); 2174 2175 if (!port) 2176 num_counters += ARRAY_SIZE(diag_device_only); 2177 2178 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL); 2179 if (!*name) 2180 return -ENOMEM; 2181 2182 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2183 if (!*offset) 2184 goto err_name; 2185 2186 *num = num_counters; 2187 2188 return 0; 2189 2190 err_name: 2191 kfree(*name); 2192 return -ENOMEM; 2193 } 2194 2195 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2196 const char **name, 2197 u32 *offset, 2198 bool port) 2199 { 2200 int i; 2201 int j; 2202 2203 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2204 name[i] = diag_basic[i].name; 2205 offset[i] = diag_basic[i].offset; 2206 } 2207 2208 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2209 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2210 name[j] = diag_ext[i].name; 2211 offset[j] = diag_ext[i].offset; 2212 } 2213 } 2214 2215 if (!port) { 2216 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2217 name[j] = diag_device_only[i].name; 2218 offset[j] = diag_device_only[i].offset; 2219 } 2220 } 2221 } 2222 2223 static const struct ib_device_ops mlx4_ib_hw_stats_ops = { 2224 .alloc_hw_stats = mlx4_ib_alloc_hw_stats, 2225 .get_hw_stats = mlx4_ib_get_hw_stats, 2226 }; 2227 2228 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2229 { 2230 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2231 int i; 2232 int ret; 2233 bool per_port = !!(ibdev->dev->caps.flags2 & 2234 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2235 2236 if (mlx4_is_slave(ibdev->dev)) 2237 return 0; 2238 2239 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2240 /* i == 1 means we are building port counters */ 2241 if (i && !per_port) 2242 continue; 2243 2244 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name, 2245 &diag[i].offset, 2246 &diag[i].num_counters, i); 2247 if (ret) 2248 goto err_alloc; 2249 2250 mlx4_ib_fill_diag_counters(ibdev, diag[i].name, 2251 diag[i].offset, i); 2252 } 2253 2254 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops); 2255 2256 return 0; 2257 2258 err_alloc: 2259 if (i) { 2260 kfree(diag[i - 1].name); 2261 kfree(diag[i - 1].offset); 2262 } 2263 2264 return ret; 2265 } 2266 2267 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2268 { 2269 int i; 2270 2271 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2272 kfree(ibdev->diag_counters[i].offset); 2273 kfree(ibdev->diag_counters[i].name); 2274 } 2275 } 2276 2277 #define MLX4_IB_INVALID_MAC ((u64)-1) 2278 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2279 struct net_device *dev, 2280 int port) 2281 { 2282 u64 new_smac = 0; 2283 u64 release_mac = MLX4_IB_INVALID_MAC; 2284 struct mlx4_ib_qp *qp; 2285 2286 read_lock(&dev_base_lock); 2287 new_smac = mlx4_mac_to_u64(dev->dev_addr); 2288 read_unlock(&dev_base_lock); 2289 2290 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2291 2292 /* no need for update QP1 and mac registration in non-SRIOV */ 2293 if (!mlx4_is_mfunc(ibdev->dev)) 2294 return; 2295 2296 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2297 qp = ibdev->qp1_proxy[port - 1]; 2298 if (qp) { 2299 int new_smac_index; 2300 u64 old_smac; 2301 struct mlx4_update_qp_params update_params; 2302 2303 mutex_lock(&qp->mutex); 2304 old_smac = qp->pri.smac; 2305 if (new_smac == old_smac) 2306 goto unlock; 2307 2308 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2309 2310 if (new_smac_index < 0) 2311 goto unlock; 2312 2313 update_params.smac_index = new_smac_index; 2314 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2315 &update_params)) { 2316 release_mac = new_smac; 2317 goto unlock; 2318 } 2319 /* if old port was zero, no mac was yet registered for this QP */ 2320 if (qp->pri.smac_port) 2321 release_mac = old_smac; 2322 qp->pri.smac = new_smac; 2323 qp->pri.smac_port = port; 2324 qp->pri.smac_index = new_smac_index; 2325 } 2326 2327 unlock: 2328 if (release_mac != MLX4_IB_INVALID_MAC) 2329 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2330 if (qp) 2331 mutex_unlock(&qp->mutex); 2332 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2333 } 2334 2335 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 2336 struct net_device *dev, 2337 unsigned long event) 2338 2339 { 2340 struct mlx4_ib_iboe *iboe; 2341 int update_qps_port = -1; 2342 int port; 2343 2344 ASSERT_RTNL(); 2345 2346 iboe = &ibdev->iboe; 2347 2348 spin_lock_bh(&iboe->lock); 2349 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 2350 2351 iboe->netdevs[port - 1] = 2352 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 2353 2354 if (dev == iboe->netdevs[port - 1] && 2355 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2356 event == NETDEV_UP || event == NETDEV_CHANGE)) 2357 update_qps_port = port; 2358 2359 if (dev == iboe->netdevs[port - 1] && 2360 (event == NETDEV_UP || event == NETDEV_DOWN)) { 2361 enum ib_port_state port_state; 2362 struct ib_event ibev = { }; 2363 2364 if (ib_get_cached_port_state(&ibdev->ib_dev, port, 2365 &port_state)) 2366 continue; 2367 2368 if (event == NETDEV_UP && 2369 (port_state != IB_PORT_ACTIVE || 2370 iboe->last_port_state[port - 1] != IB_PORT_DOWN)) 2371 continue; 2372 if (event == NETDEV_DOWN && 2373 (port_state != IB_PORT_DOWN || 2374 iboe->last_port_state[port - 1] != IB_PORT_ACTIVE)) 2375 continue; 2376 iboe->last_port_state[port - 1] = port_state; 2377 2378 ibev.device = &ibdev->ib_dev; 2379 ibev.element.port_num = port; 2380 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE : 2381 IB_EVENT_PORT_ERR; 2382 ib_dispatch_event(&ibev); 2383 } 2384 2385 } 2386 spin_unlock_bh(&iboe->lock); 2387 2388 if (update_qps_port > 0) 2389 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2390 } 2391 2392 static int mlx4_ib_netdev_event(struct notifier_block *this, 2393 unsigned long event, void *ptr) 2394 { 2395 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2396 struct mlx4_ib_dev *ibdev; 2397 2398 if (!net_eq(dev_net(dev), &init_net)) 2399 return NOTIFY_DONE; 2400 2401 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2402 mlx4_ib_scan_netdevs(ibdev, dev, event); 2403 2404 return NOTIFY_DONE; 2405 } 2406 2407 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2408 { 2409 int port; 2410 int slave; 2411 int i; 2412 2413 if (mlx4_is_master(ibdev->dev)) { 2414 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2415 ++slave) { 2416 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2417 for (i = 0; 2418 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2419 ++i) { 2420 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2421 /* master has the identity virt2phys pkey mapping */ 2422 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2423 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2424 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2425 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2426 } 2427 } 2428 } 2429 /* initialize pkey cache */ 2430 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2431 for (i = 0; 2432 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2433 ++i) 2434 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2435 (i) ? 0 : 0xFFFF; 2436 } 2437 } 2438 } 2439 2440 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2441 { 2442 int i, j, eq = 0, total_eqs = 0; 2443 2444 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2445 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2446 if (!ibdev->eq_table) 2447 return; 2448 2449 for (i = 1; i <= dev->caps.num_ports; i++) { 2450 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2451 j++, total_eqs++) { 2452 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2453 continue; 2454 ibdev->eq_table[eq] = total_eqs; 2455 if (!mlx4_assign_eq(dev, i, 2456 &ibdev->eq_table[eq])) 2457 eq++; 2458 else 2459 ibdev->eq_table[eq] = -1; 2460 } 2461 } 2462 2463 for (i = eq; i < dev->caps.num_comp_vectors; 2464 ibdev->eq_table[i++] = -1) 2465 ; 2466 2467 /* Advertise the new number of EQs to clients */ 2468 ibdev->ib_dev.num_comp_vectors = eq; 2469 } 2470 2471 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2472 { 2473 int i; 2474 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2475 2476 /* no eqs were allocated */ 2477 if (!ibdev->eq_table) 2478 return; 2479 2480 /* Reset the advertised EQ number */ 2481 ibdev->ib_dev.num_comp_vectors = 0; 2482 2483 for (i = 0; i < total_eqs; i++) 2484 mlx4_release_eq(dev, ibdev->eq_table[i]); 2485 2486 kfree(ibdev->eq_table); 2487 ibdev->eq_table = NULL; 2488 } 2489 2490 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, 2491 struct ib_port_immutable *immutable) 2492 { 2493 struct ib_port_attr attr; 2494 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2495 int err; 2496 2497 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2498 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2499 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2500 } else { 2501 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2502 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2503 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2504 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2505 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2506 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET; 2507 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE | 2508 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP)) 2509 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2510 } 2511 2512 err = ib_query_port(ibdev, port_num, &attr); 2513 if (err) 2514 return err; 2515 2516 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2517 immutable->gid_tbl_len = attr.gid_tbl_len; 2518 2519 return 0; 2520 } 2521 2522 static void get_fw_ver_str(struct ib_device *device, char *str) 2523 { 2524 struct mlx4_ib_dev *dev = 2525 container_of(device, struct mlx4_ib_dev, ib_dev); 2526 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d", 2527 (int) (dev->dev->caps.fw_ver >> 32), 2528 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2529 (int) dev->dev->caps.fw_ver & 0xffff); 2530 } 2531 2532 static const struct ib_device_ops mlx4_ib_dev_ops = { 2533 .owner = THIS_MODULE, 2534 .driver_id = RDMA_DRIVER_MLX4, 2535 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION, 2536 2537 .add_gid = mlx4_ib_add_gid, 2538 .alloc_mr = mlx4_ib_alloc_mr, 2539 .alloc_pd = mlx4_ib_alloc_pd, 2540 .alloc_ucontext = mlx4_ib_alloc_ucontext, 2541 .attach_mcast = mlx4_ib_mcg_attach, 2542 .create_ah = mlx4_ib_create_ah, 2543 .create_cq = mlx4_ib_create_cq, 2544 .create_qp = mlx4_ib_create_qp, 2545 .create_srq = mlx4_ib_create_srq, 2546 .dealloc_pd = mlx4_ib_dealloc_pd, 2547 .dealloc_ucontext = mlx4_ib_dealloc_ucontext, 2548 .del_gid = mlx4_ib_del_gid, 2549 .dereg_mr = mlx4_ib_dereg_mr, 2550 .destroy_ah = mlx4_ib_destroy_ah, 2551 .destroy_cq = mlx4_ib_destroy_cq, 2552 .destroy_qp = mlx4_ib_destroy_qp, 2553 .destroy_srq = mlx4_ib_destroy_srq, 2554 .detach_mcast = mlx4_ib_mcg_detach, 2555 .disassociate_ucontext = mlx4_ib_disassociate_ucontext, 2556 .drain_rq = mlx4_ib_drain_rq, 2557 .drain_sq = mlx4_ib_drain_sq, 2558 .get_dev_fw_str = get_fw_ver_str, 2559 .get_dma_mr = mlx4_ib_get_dma_mr, 2560 .get_link_layer = mlx4_ib_port_link_layer, 2561 .get_netdev = mlx4_ib_get_netdev, 2562 .get_port_immutable = mlx4_port_immutable, 2563 .map_mr_sg = mlx4_ib_map_mr_sg, 2564 .mmap = mlx4_ib_mmap, 2565 .modify_cq = mlx4_ib_modify_cq, 2566 .modify_device = mlx4_ib_modify_device, 2567 .modify_port = mlx4_ib_modify_port, 2568 .modify_qp = mlx4_ib_modify_qp, 2569 .modify_srq = mlx4_ib_modify_srq, 2570 .poll_cq = mlx4_ib_poll_cq, 2571 .post_recv = mlx4_ib_post_recv, 2572 .post_send = mlx4_ib_post_send, 2573 .post_srq_recv = mlx4_ib_post_srq_recv, 2574 .process_mad = mlx4_ib_process_mad, 2575 .query_ah = mlx4_ib_query_ah, 2576 .query_device = mlx4_ib_query_device, 2577 .query_gid = mlx4_ib_query_gid, 2578 .query_pkey = mlx4_ib_query_pkey, 2579 .query_port = mlx4_ib_query_port, 2580 .query_qp = mlx4_ib_query_qp, 2581 .query_srq = mlx4_ib_query_srq, 2582 .reg_user_mr = mlx4_ib_reg_user_mr, 2583 .req_notify_cq = mlx4_ib_arm_cq, 2584 .rereg_user_mr = mlx4_ib_rereg_user_mr, 2585 .resize_cq = mlx4_ib_resize_cq, 2586 2587 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah), 2588 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq), 2589 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd), 2590 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq), 2591 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext), 2592 }; 2593 2594 static const struct ib_device_ops mlx4_ib_dev_wq_ops = { 2595 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table, 2596 .create_wq = mlx4_ib_create_wq, 2597 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table, 2598 .destroy_wq = mlx4_ib_destroy_wq, 2599 .modify_wq = mlx4_ib_modify_wq, 2600 }; 2601 2602 static const struct ib_device_ops mlx4_ib_dev_mw_ops = { 2603 .alloc_mw = mlx4_ib_alloc_mw, 2604 .dealloc_mw = mlx4_ib_dealloc_mw, 2605 }; 2606 2607 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = { 2608 .alloc_xrcd = mlx4_ib_alloc_xrcd, 2609 .dealloc_xrcd = mlx4_ib_dealloc_xrcd, 2610 }; 2611 2612 static const struct ib_device_ops mlx4_ib_dev_fs_ops = { 2613 .create_flow = mlx4_ib_create_flow, 2614 .destroy_flow = mlx4_ib_destroy_flow, 2615 }; 2616 2617 static void *mlx4_ib_add(struct mlx4_dev *dev) 2618 { 2619 struct mlx4_ib_dev *ibdev; 2620 int num_ports = 0; 2621 int i, j; 2622 int err; 2623 struct mlx4_ib_iboe *iboe; 2624 int ib_num_ports = 0; 2625 int num_req_counters; 2626 int allocated; 2627 u32 counter_index; 2628 struct counter_index *new_counter_index = NULL; 2629 2630 pr_info_once("%s", mlx4_ib_version); 2631 2632 num_ports = 0; 2633 mlx4_foreach_ib_transport_port(i, dev) 2634 num_ports++; 2635 2636 /* No point in registering a device with no ports... */ 2637 if (num_ports == 0) 2638 return NULL; 2639 2640 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev); 2641 if (!ibdev) { 2642 dev_err(&dev->persist->pdev->dev, 2643 "Device struct alloc failed\n"); 2644 return NULL; 2645 } 2646 2647 iboe = &ibdev->iboe; 2648 2649 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2650 goto err_dealloc; 2651 2652 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2653 goto err_pd; 2654 2655 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2656 PAGE_SIZE); 2657 if (!ibdev->uar_map) 2658 goto err_uar; 2659 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2660 2661 ibdev->dev = dev; 2662 ibdev->bond_next_port = 0; 2663 2664 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2665 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2666 ibdev->num_ports = num_ports; 2667 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2668 1 : ibdev->num_ports; 2669 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2670 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev; 2671 2672 ibdev->ib_dev.uverbs_cmd_mask = 2673 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2674 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2675 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2676 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2677 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2678 (1ull << IB_USER_VERBS_CMD_REG_MR) | 2679 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2680 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2681 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2682 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2683 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2684 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2685 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2686 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 2687 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 2688 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 2689 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 2690 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 2691 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 2692 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 2693 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 2694 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 2695 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 2696 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 2697 2698 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops); 2699 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2700 (1ull << IB_USER_VERBS_EX_CMD_MODIFY_CQ) | 2701 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 2702 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 2703 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 2704 2705 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) && 2706 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) == 2707 IB_LINK_LAYER_ETHERNET) || 2708 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) == 2709 IB_LINK_LAYER_ETHERNET))) { 2710 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2711 (1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) | 2712 (1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) | 2713 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) | 2714 (1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) | 2715 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL); 2716 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops); 2717 } 2718 2719 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2720 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 2721 ibdev->ib_dev.uverbs_cmd_mask |= 2722 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 2723 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 2724 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops); 2725 } 2726 2727 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2728 ibdev->ib_dev.uverbs_cmd_mask |= 2729 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 2730 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 2731 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops); 2732 } 2733 2734 if (check_flow_steering_support(dev)) { 2735 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2736 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2737 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 2738 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW); 2739 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops); 2740 } 2741 2742 if (!dev->caps.userspace_caps) 2743 ibdev->ib_dev.ops.uverbs_abi_ver = 2744 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2745 2746 mlx4_ib_alloc_eqs(dev, ibdev); 2747 2748 spin_lock_init(&iboe->lock); 2749 2750 if (init_node_data(ibdev)) 2751 goto err_map; 2752 mlx4_init_sl2vl_tbl(ibdev); 2753 2754 for (i = 0; i < ibdev->num_ports; ++i) { 2755 mutex_init(&ibdev->counters_table[i].mutex); 2756 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2757 iboe->last_port_state[i] = IB_PORT_DOWN; 2758 } 2759 2760 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2761 for (i = 0; i < num_req_counters; ++i) { 2762 mutex_init(&ibdev->qp1_proxy_lock[i]); 2763 allocated = 0; 2764 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2765 IB_LINK_LAYER_ETHERNET) { 2766 err = mlx4_counter_alloc(ibdev->dev, &counter_index, 2767 MLX4_RES_USAGE_DRIVER); 2768 /* if failed to allocate a new counter, use default */ 2769 if (err) 2770 counter_index = 2771 mlx4_get_default_counter_index(dev, 2772 i + 1); 2773 else 2774 allocated = 1; 2775 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2776 counter_index = mlx4_get_default_counter_index(dev, 2777 i + 1); 2778 } 2779 new_counter_index = kmalloc(sizeof(*new_counter_index), 2780 GFP_KERNEL); 2781 if (!new_counter_index) { 2782 if (allocated) 2783 mlx4_counter_free(ibdev->dev, counter_index); 2784 goto err_counter; 2785 } 2786 new_counter_index->index = counter_index; 2787 new_counter_index->allocated = allocated; 2788 list_add_tail(&new_counter_index->list, 2789 &ibdev->counters_table[i].counters_list); 2790 ibdev->counters_table[i].default_counter = counter_index; 2791 pr_info("counter index %d for port %d allocated %d\n", 2792 counter_index, i + 1, allocated); 2793 } 2794 if (mlx4_is_bonded(dev)) 2795 for (i = 1; i < ibdev->num_ports ; ++i) { 2796 new_counter_index = 2797 kmalloc(sizeof(struct counter_index), 2798 GFP_KERNEL); 2799 if (!new_counter_index) 2800 goto err_counter; 2801 new_counter_index->index = counter_index; 2802 new_counter_index->allocated = 0; 2803 list_add_tail(&new_counter_index->list, 2804 &ibdev->counters_table[i].counters_list); 2805 ibdev->counters_table[i].default_counter = 2806 counter_index; 2807 } 2808 2809 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2810 ib_num_ports++; 2811 2812 spin_lock_init(&ibdev->sm_lock); 2813 mutex_init(&ibdev->cap_mask_mutex); 2814 INIT_LIST_HEAD(&ibdev->qp_list); 2815 spin_lock_init(&ibdev->reset_flow_resource_lock); 2816 2817 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2818 ib_num_ports) { 2819 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2820 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2821 MLX4_IB_UC_STEER_QPN_ALIGN, 2822 &ibdev->steer_qpn_base, 0, 2823 MLX4_RES_USAGE_DRIVER); 2824 if (err) 2825 goto err_counter; 2826 2827 ibdev->ib_uc_qpns_bitmap = 2828 kmalloc_array(BITS_TO_LONGS(ibdev->steer_qpn_count), 2829 sizeof(long), 2830 GFP_KERNEL); 2831 if (!ibdev->ib_uc_qpns_bitmap) 2832 goto err_steer_qp_release; 2833 2834 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) { 2835 bitmap_zero(ibdev->ib_uc_qpns_bitmap, 2836 ibdev->steer_qpn_count); 2837 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2838 dev, ibdev->steer_qpn_base, 2839 ibdev->steer_qpn_base + 2840 ibdev->steer_qpn_count - 1); 2841 if (err) 2842 goto err_steer_free_bitmap; 2843 } else { 2844 bitmap_fill(ibdev->ib_uc_qpns_bitmap, 2845 ibdev->steer_qpn_count); 2846 } 2847 } 2848 2849 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2850 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2851 2852 if (mlx4_ib_alloc_diag_counters(ibdev)) 2853 goto err_steer_free_bitmap; 2854 2855 rdma_set_device_sysfs_group(&ibdev->ib_dev, &mlx4_attr_group); 2856 if (ib_register_device(&ibdev->ib_dev, "mlx4_%d")) 2857 goto err_diag_counters; 2858 2859 if (mlx4_ib_mad_init(ibdev)) 2860 goto err_reg; 2861 2862 if (mlx4_ib_init_sriov(ibdev)) 2863 goto err_mad; 2864 2865 if (!iboe->nb.notifier_call) { 2866 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2867 err = register_netdevice_notifier(&iboe->nb); 2868 if (err) { 2869 iboe->nb.notifier_call = NULL; 2870 goto err_notif; 2871 } 2872 } 2873 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2874 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2875 if (err) 2876 goto err_notif; 2877 } 2878 2879 ibdev->ib_active = true; 2880 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2881 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2882 &ibdev->ib_dev); 2883 2884 if (mlx4_is_mfunc(ibdev->dev)) 2885 init_pkeys(ibdev); 2886 2887 /* create paravirt contexts for any VFs which are active */ 2888 if (mlx4_is_master(ibdev->dev)) { 2889 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2890 if (j == mlx4_master_func_num(ibdev->dev)) 2891 continue; 2892 if (mlx4_is_slave_active(ibdev->dev, j)) 2893 do_slave_init(ibdev, j, 1); 2894 } 2895 } 2896 return ibdev; 2897 2898 err_notif: 2899 if (ibdev->iboe.nb.notifier_call) { 2900 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2901 pr_warn("failure unregistering notifier\n"); 2902 ibdev->iboe.nb.notifier_call = NULL; 2903 } 2904 flush_workqueue(wq); 2905 2906 mlx4_ib_close_sriov(ibdev); 2907 2908 err_mad: 2909 mlx4_ib_mad_cleanup(ibdev); 2910 2911 err_reg: 2912 ib_unregister_device(&ibdev->ib_dev); 2913 2914 err_diag_counters: 2915 mlx4_ib_diag_cleanup(ibdev); 2916 2917 err_steer_free_bitmap: 2918 kfree(ibdev->ib_uc_qpns_bitmap); 2919 2920 err_steer_qp_release: 2921 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2922 ibdev->steer_qpn_count); 2923 err_counter: 2924 for (i = 0; i < ibdev->num_ports; ++i) 2925 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2926 2927 err_map: 2928 mlx4_ib_free_eqs(dev, ibdev); 2929 iounmap(ibdev->uar_map); 2930 2931 err_uar: 2932 mlx4_uar_free(dev, &ibdev->priv_uar); 2933 2934 err_pd: 2935 mlx4_pd_free(dev, ibdev->priv_pdn); 2936 2937 err_dealloc: 2938 ib_dealloc_device(&ibdev->ib_dev); 2939 2940 return NULL; 2941 } 2942 2943 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2944 { 2945 int offset; 2946 2947 WARN_ON(!dev->ib_uc_qpns_bitmap); 2948 2949 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2950 dev->steer_qpn_count, 2951 get_count_order(count)); 2952 if (offset < 0) 2953 return offset; 2954 2955 *qpn = dev->steer_qpn_base + offset; 2956 return 0; 2957 } 2958 2959 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2960 { 2961 if (!qpn || 2962 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2963 return; 2964 2965 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n", 2966 qpn, dev->steer_qpn_base)) 2967 /* not supposed to be here */ 2968 return; 2969 2970 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2971 qpn - dev->steer_qpn_base, 2972 get_count_order(count)); 2973 } 2974 2975 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2976 int is_attach) 2977 { 2978 int err; 2979 size_t flow_size; 2980 struct ib_flow_attr *flow = NULL; 2981 struct ib_flow_spec_ib *ib_spec; 2982 2983 if (is_attach) { 2984 flow_size = sizeof(struct ib_flow_attr) + 2985 sizeof(struct ib_flow_spec_ib); 2986 flow = kzalloc(flow_size, GFP_KERNEL); 2987 if (!flow) 2988 return -ENOMEM; 2989 flow->port = mqp->port; 2990 flow->num_of_specs = 1; 2991 flow->size = flow_size; 2992 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2993 ib_spec->type = IB_FLOW_SPEC_IB; 2994 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2995 /* Add an empty rule for IB L2 */ 2996 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2997 2998 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, 2999 IB_FLOW_DOMAIN_NIC, 3000 MLX4_FS_REGULAR, 3001 &mqp->reg_id); 3002 } else { 3003 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 3004 } 3005 kfree(flow); 3006 return err; 3007 } 3008 3009 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 3010 { 3011 struct mlx4_ib_dev *ibdev = ibdev_ptr; 3012 int p; 3013 int i; 3014 3015 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 3016 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 3017 ibdev->ib_active = false; 3018 flush_workqueue(wq); 3019 3020 if (ibdev->iboe.nb.notifier_call) { 3021 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 3022 pr_warn("failure unregistering notifier\n"); 3023 ibdev->iboe.nb.notifier_call = NULL; 3024 } 3025 3026 mlx4_ib_close_sriov(ibdev); 3027 mlx4_ib_mad_cleanup(ibdev); 3028 ib_unregister_device(&ibdev->ib_dev); 3029 mlx4_ib_diag_cleanup(ibdev); 3030 3031 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 3032 ibdev->steer_qpn_count); 3033 kfree(ibdev->ib_uc_qpns_bitmap); 3034 3035 iounmap(ibdev->uar_map); 3036 for (p = 0; p < ibdev->num_ports; ++p) 3037 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 3038 3039 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 3040 mlx4_CLOSE_PORT(dev, p); 3041 3042 mlx4_ib_free_eqs(dev, ibdev); 3043 3044 mlx4_uar_free(dev, &ibdev->priv_uar); 3045 mlx4_pd_free(dev, ibdev->priv_pdn); 3046 ib_dealloc_device(&ibdev->ib_dev); 3047 } 3048 3049 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 3050 { 3051 struct mlx4_ib_demux_work **dm = NULL; 3052 struct mlx4_dev *dev = ibdev->dev; 3053 int i; 3054 unsigned long flags; 3055 struct mlx4_active_ports actv_ports; 3056 unsigned int ports; 3057 unsigned int first_port; 3058 3059 if (!mlx4_is_master(dev)) 3060 return; 3061 3062 actv_ports = mlx4_get_active_ports(dev, slave); 3063 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3064 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3065 3066 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 3067 if (!dm) 3068 return; 3069 3070 for (i = 0; i < ports; i++) { 3071 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3072 if (!dm[i]) { 3073 while (--i >= 0) 3074 kfree(dm[i]); 3075 goto out; 3076 } 3077 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3078 dm[i]->port = first_port + i + 1; 3079 dm[i]->slave = slave; 3080 dm[i]->do_init = do_init; 3081 dm[i]->dev = ibdev; 3082 } 3083 /* initialize or tear down tunnel QPs for the slave */ 3084 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3085 if (!ibdev->sriov.is_going_down) { 3086 for (i = 0; i < ports; i++) 3087 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3088 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3089 } else { 3090 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3091 for (i = 0; i < ports; i++) 3092 kfree(dm[i]); 3093 } 3094 out: 3095 kfree(dm); 3096 return; 3097 } 3098 3099 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3100 { 3101 struct mlx4_ib_qp *mqp; 3102 unsigned long flags_qp; 3103 unsigned long flags_cq; 3104 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3105 struct list_head cq_notify_list; 3106 struct mlx4_cq *mcq; 3107 unsigned long flags; 3108 3109 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3110 INIT_LIST_HEAD(&cq_notify_list); 3111 3112 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3113 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3114 3115 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3116 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3117 if (mqp->sq.tail != mqp->sq.head) { 3118 send_mcq = to_mcq(mqp->ibqp.send_cq); 3119 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3120 if (send_mcq->mcq.comp && 3121 mqp->ibqp.send_cq->comp_handler) { 3122 if (!send_mcq->mcq.reset_notify_added) { 3123 send_mcq->mcq.reset_notify_added = 1; 3124 list_add_tail(&send_mcq->mcq.reset_notify, 3125 &cq_notify_list); 3126 } 3127 } 3128 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3129 } 3130 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3131 /* Now, handle the QP's receive queue */ 3132 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3133 /* no handling is needed for SRQ */ 3134 if (!mqp->ibqp.srq) { 3135 if (mqp->rq.tail != mqp->rq.head) { 3136 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3137 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3138 if (recv_mcq->mcq.comp && 3139 mqp->ibqp.recv_cq->comp_handler) { 3140 if (!recv_mcq->mcq.reset_notify_added) { 3141 recv_mcq->mcq.reset_notify_added = 1; 3142 list_add_tail(&recv_mcq->mcq.reset_notify, 3143 &cq_notify_list); 3144 } 3145 } 3146 spin_unlock_irqrestore(&recv_mcq->lock, 3147 flags_cq); 3148 } 3149 } 3150 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3151 } 3152 3153 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3154 mcq->comp(mcq); 3155 } 3156 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3157 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3158 } 3159 3160 static void handle_bonded_port_state_event(struct work_struct *work) 3161 { 3162 struct ib_event_work *ew = 3163 container_of(work, struct ib_event_work, work); 3164 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3165 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3166 int i; 3167 struct ib_event ibev; 3168 3169 kfree(ew); 3170 spin_lock_bh(&ibdev->iboe.lock); 3171 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3172 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3173 enum ib_port_state curr_port_state; 3174 3175 if (!curr_netdev) 3176 continue; 3177 3178 curr_port_state = 3179 (netif_running(curr_netdev) && 3180 netif_carrier_ok(curr_netdev)) ? 3181 IB_PORT_ACTIVE : IB_PORT_DOWN; 3182 3183 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3184 curr_port_state : IB_PORT_ACTIVE; 3185 } 3186 spin_unlock_bh(&ibdev->iboe.lock); 3187 3188 ibev.device = &ibdev->ib_dev; 3189 ibev.element.port_num = 1; 3190 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3191 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3192 3193 ib_dispatch_event(&ibev); 3194 } 3195 3196 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3197 { 3198 u64 sl2vl; 3199 int err; 3200 3201 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3202 if (err) { 3203 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3204 port, err); 3205 sl2vl = 0; 3206 } 3207 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3208 } 3209 3210 static void ib_sl2vl_update_work(struct work_struct *work) 3211 { 3212 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3213 struct mlx4_ib_dev *mdev = ew->ib_dev; 3214 int port = ew->port; 3215 3216 mlx4_ib_sl2vl_update(mdev, port); 3217 3218 kfree(ew); 3219 } 3220 3221 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3222 int port) 3223 { 3224 struct ib_event_work *ew; 3225 3226 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3227 if (ew) { 3228 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3229 ew->port = port; 3230 ew->ib_dev = ibdev; 3231 queue_work(wq, &ew->work); 3232 } 3233 } 3234 3235 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 3236 enum mlx4_dev_event event, unsigned long param) 3237 { 3238 struct ib_event ibev; 3239 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 3240 struct mlx4_eqe *eqe = NULL; 3241 struct ib_event_work *ew; 3242 int p = 0; 3243 3244 if (mlx4_is_bonded(dev) && 3245 ((event == MLX4_DEV_EVENT_PORT_UP) || 3246 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3247 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3248 if (!ew) 3249 return; 3250 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3251 ew->ib_dev = ibdev; 3252 queue_work(wq, &ew->work); 3253 return; 3254 } 3255 3256 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 3257 eqe = (struct mlx4_eqe *)param; 3258 else 3259 p = (int) param; 3260 3261 switch (event) { 3262 case MLX4_DEV_EVENT_PORT_UP: 3263 if (p > ibdev->num_ports) 3264 return; 3265 if (!mlx4_is_slave(dev) && 3266 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3267 IB_LINK_LAYER_INFINIBAND) { 3268 if (mlx4_is_master(dev)) 3269 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3270 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3271 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3272 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3273 } 3274 ibev.event = IB_EVENT_PORT_ACTIVE; 3275 break; 3276 3277 case MLX4_DEV_EVENT_PORT_DOWN: 3278 if (p > ibdev->num_ports) 3279 return; 3280 ibev.event = IB_EVENT_PORT_ERR; 3281 break; 3282 3283 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3284 ibdev->ib_active = false; 3285 ibev.event = IB_EVENT_DEVICE_FATAL; 3286 mlx4_ib_handle_catas_error(ibdev); 3287 break; 3288 3289 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3290 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3291 if (!ew) 3292 break; 3293 3294 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3295 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3296 ew->ib_dev = ibdev; 3297 /* need to queue only for port owner, which uses GEN_EQE */ 3298 if (mlx4_is_master(dev)) 3299 queue_work(wq, &ew->work); 3300 else 3301 handle_port_mgmt_change_event(&ew->work); 3302 return; 3303 3304 case MLX4_DEV_EVENT_SLAVE_INIT: 3305 /* here, p is the slave id */ 3306 do_slave_init(ibdev, p, 1); 3307 if (mlx4_is_master(dev)) { 3308 int i; 3309 3310 for (i = 1; i <= ibdev->num_ports; i++) { 3311 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3312 == IB_LINK_LAYER_INFINIBAND) 3313 mlx4_ib_slave_alias_guid_event(ibdev, 3314 p, i, 3315 1); 3316 } 3317 } 3318 return; 3319 3320 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3321 if (mlx4_is_master(dev)) { 3322 int i; 3323 3324 for (i = 1; i <= ibdev->num_ports; i++) { 3325 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3326 == IB_LINK_LAYER_INFINIBAND) 3327 mlx4_ib_slave_alias_guid_event(ibdev, 3328 p, i, 3329 0); 3330 } 3331 } 3332 /* here, p is the slave id */ 3333 do_slave_init(ibdev, p, 0); 3334 return; 3335 3336 default: 3337 return; 3338 } 3339 3340 ibev.device = ibdev_ptr; 3341 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3342 3343 ib_dispatch_event(&ibev); 3344 } 3345 3346 static struct mlx4_interface mlx4_ib_interface = { 3347 .add = mlx4_ib_add, 3348 .remove = mlx4_ib_remove, 3349 .event = mlx4_ib_event, 3350 .protocol = MLX4_PROT_IB_IPV6, 3351 .flags = MLX4_INTFF_BONDING 3352 }; 3353 3354 static int __init mlx4_ib_init(void) 3355 { 3356 int err; 3357 3358 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3359 if (!wq) 3360 return -ENOMEM; 3361 3362 err = mlx4_ib_mcg_init(); 3363 if (err) 3364 goto clean_wq; 3365 3366 err = mlx4_register_interface(&mlx4_ib_interface); 3367 if (err) 3368 goto clean_mcg; 3369 3370 return 0; 3371 3372 clean_mcg: 3373 mlx4_ib_mcg_destroy(); 3374 3375 clean_wq: 3376 destroy_workqueue(wq); 3377 return err; 3378 } 3379 3380 static void __exit mlx4_ib_cleanup(void) 3381 { 3382 mlx4_unregister_interface(&mlx4_ib_interface); 3383 mlx4_ib_mcg_destroy(); 3384 destroy_workqueue(wq); 3385 } 3386 3387 module_init(mlx4_ib_init); 3388 module_exit(mlx4_ib_cleanup); 3389