1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <net/ipv6.h> 43 #include <net/addrconf.h> 44 #include <net/devlink.h> 45 46 #include <rdma/ib_smi.h> 47 #include <rdma/ib_user_verbs.h> 48 #include <rdma/ib_addr.h> 49 #include <rdma/ib_cache.h> 50 51 #include <net/bonding.h> 52 53 #include <linux/mlx4/driver.h> 54 #include <linux/mlx4/cmd.h> 55 #include <linux/mlx4/qp.h> 56 57 #include "mlx4_ib.h" 58 #include <rdma/mlx4-abi.h> 59 60 #define DRV_NAME MLX4_IB_DRV_NAME 61 #define DRV_VERSION "2.2-1" 62 #define DRV_RELDATE "Feb 2014" 63 64 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 65 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 66 #define MLX4_IB_CARD_REV_A0 0xA0 67 68 MODULE_AUTHOR("Roland Dreier"); 69 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 70 MODULE_LICENSE("Dual BSD/GPL"); 71 MODULE_VERSION(DRV_VERSION); 72 73 int mlx4_ib_sm_guid_assign = 0; 74 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 75 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 76 77 static const char mlx4_ib_version[] = 78 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 79 DRV_VERSION " (" DRV_RELDATE ")\n"; 80 81 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 82 83 static struct workqueue_struct *wq; 84 85 static void init_query_mad(struct ib_smp *mad) 86 { 87 mad->base_version = 1; 88 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 89 mad->class_version = 1; 90 mad->method = IB_MGMT_METHOD_GET; 91 } 92 93 static int check_flow_steering_support(struct mlx4_dev *dev) 94 { 95 int eth_num_ports = 0; 96 int ib_num_ports = 0; 97 98 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 99 100 if (dmfs) { 101 int i; 102 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 103 eth_num_ports++; 104 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 105 ib_num_ports++; 106 dmfs &= (!ib_num_ports || 107 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 108 (!eth_num_ports || 109 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 110 if (ib_num_ports && mlx4_is_mfunc(dev)) { 111 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 112 dmfs = 0; 113 } 114 } 115 return dmfs; 116 } 117 118 static int num_ib_ports(struct mlx4_dev *dev) 119 { 120 int ib_ports = 0; 121 int i; 122 123 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 124 ib_ports++; 125 126 return ib_ports; 127 } 128 129 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num) 130 { 131 struct mlx4_ib_dev *ibdev = to_mdev(device); 132 struct net_device *dev; 133 134 rcu_read_lock(); 135 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num); 136 137 if (dev) { 138 if (mlx4_is_bonded(ibdev->dev)) { 139 struct net_device *upper = NULL; 140 141 upper = netdev_master_upper_dev_get_rcu(dev); 142 if (upper) { 143 struct net_device *active; 144 145 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 146 if (active) 147 dev = active; 148 } 149 } 150 } 151 if (dev) 152 dev_hold(dev); 153 154 rcu_read_unlock(); 155 return dev; 156 } 157 158 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 159 struct mlx4_ib_dev *ibdev, 160 u8 port_num) 161 { 162 struct mlx4_cmd_mailbox *mailbox; 163 int err; 164 struct mlx4_dev *dev = ibdev->dev; 165 int i; 166 union ib_gid *gid_tbl; 167 168 mailbox = mlx4_alloc_cmd_mailbox(dev); 169 if (IS_ERR(mailbox)) 170 return -ENOMEM; 171 172 gid_tbl = mailbox->buf; 173 174 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 175 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 176 177 err = mlx4_cmd(dev, mailbox->dma, 178 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 179 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 180 MLX4_CMD_WRAPPED); 181 if (mlx4_is_bonded(dev)) 182 err += mlx4_cmd(dev, mailbox->dma, 183 MLX4_SET_PORT_GID_TABLE << 8 | 2, 184 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 185 MLX4_CMD_WRAPPED); 186 187 mlx4_free_cmd_mailbox(dev, mailbox); 188 return err; 189 } 190 191 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 192 struct mlx4_ib_dev *ibdev, 193 u8 port_num) 194 { 195 struct mlx4_cmd_mailbox *mailbox; 196 int err; 197 struct mlx4_dev *dev = ibdev->dev; 198 int i; 199 struct { 200 union ib_gid gid; 201 __be32 rsrvd1[2]; 202 __be16 rsrvd2; 203 u8 type; 204 u8 version; 205 __be32 rsrvd3; 206 } *gid_tbl; 207 208 mailbox = mlx4_alloc_cmd_mailbox(dev); 209 if (IS_ERR(mailbox)) 210 return -ENOMEM; 211 212 gid_tbl = mailbox->buf; 213 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 214 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 215 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 216 gid_tbl[i].version = 2; 217 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 218 gid_tbl[i].type = 1; 219 else 220 memset(&gid_tbl[i].gid, 0, 12); 221 } 222 } 223 224 err = mlx4_cmd(dev, mailbox->dma, 225 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 226 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 227 MLX4_CMD_WRAPPED); 228 if (mlx4_is_bonded(dev)) 229 err += mlx4_cmd(dev, mailbox->dma, 230 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 231 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 232 MLX4_CMD_WRAPPED); 233 234 mlx4_free_cmd_mailbox(dev, mailbox); 235 return err; 236 } 237 238 static int mlx4_ib_update_gids(struct gid_entry *gids, 239 struct mlx4_ib_dev *ibdev, 240 u8 port_num) 241 { 242 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 243 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 244 245 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 246 } 247 248 static int mlx4_ib_add_gid(struct ib_device *device, 249 u8 port_num, 250 unsigned int index, 251 const union ib_gid *gid, 252 const struct ib_gid_attr *attr, 253 void **context) 254 { 255 struct mlx4_ib_dev *ibdev = to_mdev(device); 256 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 257 struct mlx4_port_gid_table *port_gid_table; 258 int free = -1, found = -1; 259 int ret = 0; 260 int hw_update = 0; 261 int i; 262 struct gid_entry *gids = NULL; 263 264 if (!rdma_cap_roce_gid_table(device, port_num)) 265 return -EINVAL; 266 267 if (port_num > MLX4_MAX_PORTS) 268 return -EINVAL; 269 270 if (!context) 271 return -EINVAL; 272 273 port_gid_table = &iboe->gids[port_num - 1]; 274 spin_lock_bh(&iboe->lock); 275 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 276 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) && 277 (port_gid_table->gids[i].gid_type == attr->gid_type)) { 278 found = i; 279 break; 280 } 281 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid))) 282 free = i; /* HW has space */ 283 } 284 285 if (found < 0) { 286 if (free < 0) { 287 ret = -ENOSPC; 288 } else { 289 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 290 if (!port_gid_table->gids[free].ctx) { 291 ret = -ENOMEM; 292 } else { 293 *context = port_gid_table->gids[free].ctx; 294 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid)); 295 port_gid_table->gids[free].gid_type = attr->gid_type; 296 port_gid_table->gids[free].ctx->real_index = free; 297 port_gid_table->gids[free].ctx->refcount = 1; 298 hw_update = 1; 299 } 300 } 301 } else { 302 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 303 *context = ctx; 304 ctx->refcount++; 305 } 306 if (!ret && hw_update) { 307 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 308 if (!gids) { 309 ret = -ENOMEM; 310 } else { 311 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 312 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 313 gids[i].gid_type = port_gid_table->gids[i].gid_type; 314 } 315 } 316 } 317 spin_unlock_bh(&iboe->lock); 318 319 if (!ret && hw_update) { 320 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 321 kfree(gids); 322 } 323 324 return ret; 325 } 326 327 static int mlx4_ib_del_gid(struct ib_device *device, 328 u8 port_num, 329 unsigned int index, 330 void **context) 331 { 332 struct gid_cache_context *ctx = *context; 333 struct mlx4_ib_dev *ibdev = to_mdev(device); 334 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 335 struct mlx4_port_gid_table *port_gid_table; 336 int ret = 0; 337 int hw_update = 0; 338 struct gid_entry *gids = NULL; 339 340 if (!rdma_cap_roce_gid_table(device, port_num)) 341 return -EINVAL; 342 343 if (port_num > MLX4_MAX_PORTS) 344 return -EINVAL; 345 346 port_gid_table = &iboe->gids[port_num - 1]; 347 spin_lock_bh(&iboe->lock); 348 if (ctx) { 349 ctx->refcount--; 350 if (!ctx->refcount) { 351 unsigned int real_index = ctx->real_index; 352 353 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid)); 354 kfree(port_gid_table->gids[real_index].ctx); 355 port_gid_table->gids[real_index].ctx = NULL; 356 hw_update = 1; 357 } 358 } 359 if (!ret && hw_update) { 360 int i; 361 362 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 363 if (!gids) { 364 ret = -ENOMEM; 365 } else { 366 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) 367 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 368 } 369 } 370 spin_unlock_bh(&iboe->lock); 371 372 if (!ret && hw_update) { 373 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 374 kfree(gids); 375 } 376 return ret; 377 } 378 379 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 380 u8 port_num, int index) 381 { 382 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 383 struct gid_cache_context *ctx = NULL; 384 union ib_gid gid; 385 struct mlx4_port_gid_table *port_gid_table; 386 int real_index = -EINVAL; 387 int i; 388 int ret; 389 unsigned long flags; 390 struct ib_gid_attr attr; 391 392 if (port_num > MLX4_MAX_PORTS) 393 return -EINVAL; 394 395 if (mlx4_is_bonded(ibdev->dev)) 396 port_num = 1; 397 398 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 399 return index; 400 401 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr); 402 if (ret) 403 return ret; 404 405 if (attr.ndev) 406 dev_put(attr.ndev); 407 408 if (!memcmp(&gid, &zgid, sizeof(gid))) 409 return -EINVAL; 410 411 spin_lock_irqsave(&iboe->lock, flags); 412 port_gid_table = &iboe->gids[port_num - 1]; 413 414 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 415 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) && 416 attr.gid_type == port_gid_table->gids[i].gid_type) { 417 ctx = port_gid_table->gids[i].ctx; 418 break; 419 } 420 if (ctx) 421 real_index = ctx->real_index; 422 spin_unlock_irqrestore(&iboe->lock, flags); 423 return real_index; 424 } 425 426 static int mlx4_ib_query_device(struct ib_device *ibdev, 427 struct ib_device_attr *props, 428 struct ib_udata *uhw) 429 { 430 struct mlx4_ib_dev *dev = to_mdev(ibdev); 431 struct ib_smp *in_mad = NULL; 432 struct ib_smp *out_mad = NULL; 433 int err; 434 int have_ib_ports; 435 struct mlx4_uverbs_ex_query_device cmd; 436 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0}; 437 struct mlx4_clock_params clock_params; 438 439 if (uhw->inlen) { 440 if (uhw->inlen < sizeof(cmd)) 441 return -EINVAL; 442 443 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 444 if (err) 445 return err; 446 447 if (cmd.comp_mask) 448 return -EINVAL; 449 450 if (cmd.reserved) 451 return -EINVAL; 452 } 453 454 resp.response_length = offsetof(typeof(resp), response_length) + 455 sizeof(resp.response_length); 456 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 457 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 458 err = -ENOMEM; 459 if (!in_mad || !out_mad) 460 goto out; 461 462 init_query_mad(in_mad); 463 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 464 465 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 466 1, NULL, NULL, in_mad, out_mad); 467 if (err) 468 goto out; 469 470 memset(props, 0, sizeof *props); 471 472 have_ib_ports = num_ib_ports(dev->dev); 473 474 props->fw_ver = dev->dev->caps.fw_ver; 475 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 476 IB_DEVICE_PORT_ACTIVE_EVENT | 477 IB_DEVICE_SYS_IMAGE_GUID | 478 IB_DEVICE_RC_RNR_NAK_GEN | 479 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 480 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 481 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 482 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 483 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 484 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 485 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 486 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 487 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 488 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 489 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 490 if (dev->dev->caps.max_gso_sz && 491 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 492 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 493 props->device_cap_flags |= IB_DEVICE_UD_TSO; 494 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 495 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 496 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 497 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 498 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 499 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 500 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 501 props->device_cap_flags |= IB_DEVICE_XRC; 502 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 503 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 504 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 505 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 506 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 507 else 508 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 509 } 510 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 511 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 512 513 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 514 515 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 516 0xffffff; 517 props->vendor_part_id = dev->dev->persist->pdev->device; 518 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 519 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 520 521 props->max_mr_size = ~0ull; 522 props->page_size_cap = dev->dev->caps.page_size_cap; 523 props->max_qp = dev->dev->quotas.qp; 524 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 525 props->max_sge = min(dev->dev->caps.max_sq_sg, 526 dev->dev->caps.max_rq_sg); 527 props->max_sge_rd = MLX4_MAX_SGE_RD; 528 props->max_cq = dev->dev->quotas.cq; 529 props->max_cqe = dev->dev->caps.max_cqes; 530 props->max_mr = dev->dev->quotas.mpt; 531 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 532 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 533 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 534 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 535 props->max_srq = dev->dev->quotas.srq; 536 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 537 props->max_srq_sge = dev->dev->caps.max_srq_sge; 538 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 539 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 540 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 541 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 542 props->masked_atomic_cap = props->atomic_cap; 543 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 544 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 545 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 546 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 547 props->max_mcast_grp; 548 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps; 549 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 550 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 551 props->max_ah = INT_MAX; 552 553 if (!mlx4_is_slave(dev->dev)) 554 err = mlx4_get_internal_clock_params(dev->dev, &clock_params); 555 556 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 557 resp.response_length += sizeof(resp.hca_core_clock_offset); 558 if (!err && !mlx4_is_slave(dev->dev)) { 559 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP; 560 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 561 } 562 } 563 564 if (uhw->outlen) { 565 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 566 if (err) 567 goto out; 568 } 569 out: 570 kfree(in_mad); 571 kfree(out_mad); 572 573 return err; 574 } 575 576 static enum rdma_link_layer 577 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 578 { 579 struct mlx4_dev *dev = to_mdev(device)->dev; 580 581 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 582 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 583 } 584 585 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 586 struct ib_port_attr *props, int netw_view) 587 { 588 struct ib_smp *in_mad = NULL; 589 struct ib_smp *out_mad = NULL; 590 int ext_active_speed; 591 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 592 int err = -ENOMEM; 593 594 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 595 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 596 if (!in_mad || !out_mad) 597 goto out; 598 599 init_query_mad(in_mad); 600 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 601 in_mad->attr_mod = cpu_to_be32(port); 602 603 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 604 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 605 606 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 607 in_mad, out_mad); 608 if (err) 609 goto out; 610 611 612 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 613 props->lmc = out_mad->data[34] & 0x7; 614 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 615 props->sm_sl = out_mad->data[36] & 0xf; 616 props->state = out_mad->data[32] & 0xf; 617 props->phys_state = out_mad->data[33] >> 4; 618 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 619 if (netw_view) 620 props->gid_tbl_len = out_mad->data[50]; 621 else 622 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 623 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 624 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 625 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 626 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 627 props->active_width = out_mad->data[31] & 0xf; 628 props->active_speed = out_mad->data[35] >> 4; 629 props->max_mtu = out_mad->data[41] & 0xf; 630 props->active_mtu = out_mad->data[36] >> 4; 631 props->subnet_timeout = out_mad->data[51] & 0x1f; 632 props->max_vl_num = out_mad->data[37] >> 4; 633 props->init_type_reply = out_mad->data[41] >> 4; 634 635 /* Check if extended speeds (EDR/FDR/...) are supported */ 636 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 637 ext_active_speed = out_mad->data[62] >> 4; 638 639 switch (ext_active_speed) { 640 case 1: 641 props->active_speed = IB_SPEED_FDR; 642 break; 643 case 2: 644 props->active_speed = IB_SPEED_EDR; 645 break; 646 } 647 } 648 649 /* If reported active speed is QDR, check if is FDR-10 */ 650 if (props->active_speed == IB_SPEED_QDR) { 651 init_query_mad(in_mad); 652 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 653 in_mad->attr_mod = cpu_to_be32(port); 654 655 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 656 NULL, NULL, in_mad, out_mad); 657 if (err) 658 goto out; 659 660 /* Checking LinkSpeedActive for FDR-10 */ 661 if (out_mad->data[15] & 0x1) 662 props->active_speed = IB_SPEED_FDR10; 663 } 664 665 /* Avoid wrong speed value returned by FW if the IB link is down. */ 666 if (props->state == IB_PORT_DOWN) 667 props->active_speed = IB_SPEED_SDR; 668 669 out: 670 kfree(in_mad); 671 kfree(out_mad); 672 return err; 673 } 674 675 static u8 state_to_phys_state(enum ib_port_state state) 676 { 677 return state == IB_PORT_ACTIVE ? 5 : 3; 678 } 679 680 static int eth_link_query_port(struct ib_device *ibdev, u8 port, 681 struct ib_port_attr *props) 682 { 683 684 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 685 struct mlx4_ib_iboe *iboe = &mdev->iboe; 686 struct net_device *ndev; 687 enum ib_mtu tmp; 688 struct mlx4_cmd_mailbox *mailbox; 689 int err = 0; 690 int is_bonded = mlx4_is_bonded(mdev->dev); 691 692 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 693 if (IS_ERR(mailbox)) 694 return PTR_ERR(mailbox); 695 696 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 697 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 698 MLX4_CMD_WRAPPED); 699 if (err) 700 goto out; 701 702 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) || 703 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 704 IB_WIDTH_4X : IB_WIDTH_1X; 705 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 706 IB_SPEED_FDR : IB_SPEED_QDR; 707 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS; 708 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 709 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 710 props->pkey_tbl_len = 1; 711 props->max_mtu = IB_MTU_4096; 712 props->max_vl_num = 2; 713 props->state = IB_PORT_DOWN; 714 props->phys_state = state_to_phys_state(props->state); 715 props->active_mtu = IB_MTU_256; 716 spin_lock_bh(&iboe->lock); 717 ndev = iboe->netdevs[port - 1]; 718 if (ndev && is_bonded) { 719 rcu_read_lock(); /* required to get upper dev */ 720 ndev = netdev_master_upper_dev_get_rcu(ndev); 721 rcu_read_unlock(); 722 } 723 if (!ndev) 724 goto out_unlock; 725 726 tmp = iboe_get_mtu(ndev->mtu); 727 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 728 729 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 730 IB_PORT_ACTIVE : IB_PORT_DOWN; 731 props->phys_state = state_to_phys_state(props->state); 732 out_unlock: 733 spin_unlock_bh(&iboe->lock); 734 out: 735 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 736 return err; 737 } 738 739 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 740 struct ib_port_attr *props, int netw_view) 741 { 742 int err; 743 744 /* props being zeroed by the caller, avoid zeroing it here */ 745 746 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 747 ib_link_query_port(ibdev, port, props, netw_view) : 748 eth_link_query_port(ibdev, port, props); 749 750 return err; 751 } 752 753 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 754 struct ib_port_attr *props) 755 { 756 /* returns host view */ 757 return __mlx4_ib_query_port(ibdev, port, props, 0); 758 } 759 760 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 761 union ib_gid *gid, int netw_view) 762 { 763 struct ib_smp *in_mad = NULL; 764 struct ib_smp *out_mad = NULL; 765 int err = -ENOMEM; 766 struct mlx4_ib_dev *dev = to_mdev(ibdev); 767 int clear = 0; 768 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 769 770 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 771 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 772 if (!in_mad || !out_mad) 773 goto out; 774 775 init_query_mad(in_mad); 776 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 777 in_mad->attr_mod = cpu_to_be32(port); 778 779 if (mlx4_is_mfunc(dev->dev) && netw_view) 780 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 781 782 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 783 if (err) 784 goto out; 785 786 memcpy(gid->raw, out_mad->data + 8, 8); 787 788 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 789 if (index) { 790 /* For any index > 0, return the null guid */ 791 err = 0; 792 clear = 1; 793 goto out; 794 } 795 } 796 797 init_query_mad(in_mad); 798 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 799 in_mad->attr_mod = cpu_to_be32(index / 8); 800 801 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 802 NULL, NULL, in_mad, out_mad); 803 if (err) 804 goto out; 805 806 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 807 808 out: 809 if (clear) 810 memset(gid->raw + 8, 0, 8); 811 kfree(in_mad); 812 kfree(out_mad); 813 return err; 814 } 815 816 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 817 union ib_gid *gid) 818 { 819 int ret; 820 821 if (rdma_protocol_ib(ibdev, port)) 822 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 823 824 if (!rdma_protocol_roce(ibdev, port)) 825 return -ENODEV; 826 827 if (!rdma_cap_roce_gid_table(ibdev, port)) 828 return -ENODEV; 829 830 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL); 831 if (ret == -EAGAIN) { 832 memcpy(gid, &zgid, sizeof(*gid)); 833 return 0; 834 } 835 836 return ret; 837 } 838 839 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl) 840 { 841 union sl2vl_tbl_to_u64 sl2vl64; 842 struct ib_smp *in_mad = NULL; 843 struct ib_smp *out_mad = NULL; 844 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 845 int err = -ENOMEM; 846 int jj; 847 848 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 849 *sl2vl_tbl = 0; 850 return 0; 851 } 852 853 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 854 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 855 if (!in_mad || !out_mad) 856 goto out; 857 858 init_query_mad(in_mad); 859 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 860 in_mad->attr_mod = 0; 861 862 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 863 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 864 865 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 866 in_mad, out_mad); 867 if (err) 868 goto out; 869 870 for (jj = 0; jj < 8; jj++) 871 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 872 *sl2vl_tbl = sl2vl64.sl64; 873 874 out: 875 kfree(in_mad); 876 kfree(out_mad); 877 return err; 878 } 879 880 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 881 { 882 u64 sl2vl; 883 int i; 884 int err; 885 886 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 887 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 888 continue; 889 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 890 if (err) { 891 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 892 i, err); 893 sl2vl = 0; 894 } 895 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 896 } 897 } 898 899 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 900 u16 *pkey, int netw_view) 901 { 902 struct ib_smp *in_mad = NULL; 903 struct ib_smp *out_mad = NULL; 904 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 905 int err = -ENOMEM; 906 907 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 908 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 909 if (!in_mad || !out_mad) 910 goto out; 911 912 init_query_mad(in_mad); 913 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 914 in_mad->attr_mod = cpu_to_be32(index / 32); 915 916 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 917 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 918 919 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 920 in_mad, out_mad); 921 if (err) 922 goto out; 923 924 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 925 926 out: 927 kfree(in_mad); 928 kfree(out_mad); 929 return err; 930 } 931 932 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 933 { 934 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 935 } 936 937 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 938 struct ib_device_modify *props) 939 { 940 struct mlx4_cmd_mailbox *mailbox; 941 unsigned long flags; 942 943 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 944 return -EOPNOTSUPP; 945 946 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 947 return 0; 948 949 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 950 return -EOPNOTSUPP; 951 952 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 953 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 954 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 955 956 /* 957 * If possible, pass node desc to FW, so it can generate 958 * a 144 trap. If cmd fails, just ignore. 959 */ 960 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 961 if (IS_ERR(mailbox)) 962 return 0; 963 964 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 965 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 966 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 967 968 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 969 970 return 0; 971 } 972 973 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, 974 u32 cap_mask) 975 { 976 struct mlx4_cmd_mailbox *mailbox; 977 int err; 978 979 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 980 if (IS_ERR(mailbox)) 981 return PTR_ERR(mailbox); 982 983 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 984 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 985 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 986 } else { 987 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 988 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 989 } 990 991 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 992 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 993 MLX4_CMD_WRAPPED); 994 995 mlx4_free_cmd_mailbox(dev->dev, mailbox); 996 return err; 997 } 998 999 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 1000 struct ib_port_modify *props) 1001 { 1002 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1003 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1004 struct ib_port_attr attr; 1005 u32 cap_mask; 1006 int err; 1007 1008 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1009 * of whether port link layer is ETH or IB. For ETH ports, qkey 1010 * violations and port capabilities are not meaningful. 1011 */ 1012 if (is_eth) 1013 return 0; 1014 1015 mutex_lock(&mdev->cap_mask_mutex); 1016 1017 err = ib_query_port(ibdev, port, &attr); 1018 if (err) 1019 goto out; 1020 1021 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1022 ~props->clr_port_cap_mask; 1023 1024 err = mlx4_ib_SET_PORT(mdev, port, 1025 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1026 cap_mask); 1027 1028 out: 1029 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1030 return err; 1031 } 1032 1033 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev, 1034 struct ib_udata *udata) 1035 { 1036 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1037 struct mlx4_ib_ucontext *context; 1038 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1039 struct mlx4_ib_alloc_ucontext_resp resp; 1040 int err; 1041 1042 if (!dev->ib_active) 1043 return ERR_PTR(-EAGAIN); 1044 1045 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1046 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1047 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1048 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1049 } else { 1050 resp.dev_caps = dev->dev->caps.userspace_caps; 1051 resp.qp_tab_size = dev->dev->caps.num_qps; 1052 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1053 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1054 resp.cqe_size = dev->dev->caps.cqe_size; 1055 } 1056 1057 context = kzalloc(sizeof(*context), GFP_KERNEL); 1058 if (!context) 1059 return ERR_PTR(-ENOMEM); 1060 1061 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1062 if (err) { 1063 kfree(context); 1064 return ERR_PTR(err); 1065 } 1066 1067 INIT_LIST_HEAD(&context->db_page_list); 1068 mutex_init(&context->db_page_mutex); 1069 1070 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1071 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1072 else 1073 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1074 1075 if (err) { 1076 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1077 kfree(context); 1078 return ERR_PTR(-EFAULT); 1079 } 1080 1081 return &context->ibucontext; 1082 } 1083 1084 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1085 { 1086 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1087 1088 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1089 kfree(context); 1090 1091 return 0; 1092 } 1093 1094 static void mlx4_ib_vma_open(struct vm_area_struct *area) 1095 { 1096 /* vma_open is called when a new VMA is created on top of our VMA. 1097 * This is done through either mremap flow or split_vma (usually due 1098 * to mlock, madvise, munmap, etc.). We do not support a clone of the 1099 * vma, as this VMA is strongly hardware related. Therefore we set the 1100 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from 1101 * calling us again and trying to do incorrect actions. We assume that 1102 * the original vma size is exactly a single page that there will be no 1103 * "splitting" operations on. 1104 */ 1105 area->vm_ops = NULL; 1106 } 1107 1108 static void mlx4_ib_vma_close(struct vm_area_struct *area) 1109 { 1110 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data; 1111 1112 /* It's guaranteed that all VMAs opened on a FD are closed before the 1113 * file itself is closed, therefore no sync is needed with the regular 1114 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync 1115 * with accessing the vma as part of mlx4_ib_disassociate_ucontext. 1116 * The close operation is usually called under mm->mmap_sem except when 1117 * process is exiting. The exiting case is handled explicitly as part 1118 * of mlx4_ib_disassociate_ucontext. 1119 */ 1120 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *) 1121 area->vm_private_data; 1122 1123 /* set the vma context pointer to null in the mlx4_ib driver's private 1124 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext(). 1125 */ 1126 mlx4_ib_vma_priv_data->vma = NULL; 1127 } 1128 1129 static const struct vm_operations_struct mlx4_ib_vm_ops = { 1130 .open = mlx4_ib_vma_open, 1131 .close = mlx4_ib_vma_close 1132 }; 1133 1134 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1135 { 1136 int i; 1137 int ret = 0; 1138 struct vm_area_struct *vma; 1139 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1140 struct task_struct *owning_process = NULL; 1141 struct mm_struct *owning_mm = NULL; 1142 1143 owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID); 1144 if (!owning_process) 1145 return; 1146 1147 owning_mm = get_task_mm(owning_process); 1148 if (!owning_mm) { 1149 pr_info("no mm, disassociate ucontext is pending task termination\n"); 1150 while (1) { 1151 /* make sure that task is dead before returning, it may 1152 * prevent a rare case of module down in parallel to a 1153 * call to mlx4_ib_vma_close. 1154 */ 1155 put_task_struct(owning_process); 1156 msleep(1); 1157 owning_process = get_pid_task(ibcontext->tgid, 1158 PIDTYPE_PID); 1159 if (!owning_process || 1160 owning_process->state == TASK_DEAD) { 1161 pr_info("disassociate ucontext done, task was terminated\n"); 1162 /* in case task was dead need to release the task struct */ 1163 if (owning_process) 1164 put_task_struct(owning_process); 1165 return; 1166 } 1167 } 1168 } 1169 1170 /* need to protect from a race on closing the vma as part of 1171 * mlx4_ib_vma_close(). 1172 */ 1173 down_read(&owning_mm->mmap_sem); 1174 for (i = 0; i < HW_BAR_COUNT; i++) { 1175 vma = context->hw_bar_info[i].vma; 1176 if (!vma) 1177 continue; 1178 1179 ret = zap_vma_ptes(context->hw_bar_info[i].vma, 1180 context->hw_bar_info[i].vma->vm_start, 1181 PAGE_SIZE); 1182 if (ret) { 1183 pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret); 1184 BUG_ON(1); 1185 } 1186 1187 /* context going to be destroyed, should not access ops any more */ 1188 context->hw_bar_info[i].vma->vm_ops = NULL; 1189 } 1190 1191 up_read(&owning_mm->mmap_sem); 1192 mmput(owning_mm); 1193 put_task_struct(owning_process); 1194 } 1195 1196 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma, 1197 struct mlx4_ib_vma_private_data *vma_private_data) 1198 { 1199 vma_private_data->vma = vma; 1200 vma->vm_private_data = vma_private_data; 1201 vma->vm_ops = &mlx4_ib_vm_ops; 1202 } 1203 1204 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1205 { 1206 struct mlx4_ib_dev *dev = to_mdev(context->device); 1207 struct mlx4_ib_ucontext *mucontext = to_mucontext(context); 1208 1209 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1210 return -EINVAL; 1211 1212 if (vma->vm_pgoff == 0) { 1213 /* We prevent double mmaping on same context */ 1214 if (mucontext->hw_bar_info[HW_BAR_DB].vma) 1215 return -EINVAL; 1216 1217 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1218 1219 if (io_remap_pfn_range(vma, vma->vm_start, 1220 to_mucontext(context)->uar.pfn, 1221 PAGE_SIZE, vma->vm_page_prot)) 1222 return -EAGAIN; 1223 1224 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]); 1225 1226 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) { 1227 /* We prevent double mmaping on same context */ 1228 if (mucontext->hw_bar_info[HW_BAR_BF].vma) 1229 return -EINVAL; 1230 1231 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 1232 1233 if (io_remap_pfn_range(vma, vma->vm_start, 1234 to_mucontext(context)->uar.pfn + 1235 dev->dev->caps.num_uars, 1236 PAGE_SIZE, vma->vm_page_prot)) 1237 return -EAGAIN; 1238 1239 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]); 1240 1241 } else if (vma->vm_pgoff == 3) { 1242 struct mlx4_clock_params params; 1243 int ret; 1244 1245 /* We prevent double mmaping on same context */ 1246 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma) 1247 return -EINVAL; 1248 1249 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1250 1251 if (ret) 1252 return ret; 1253 1254 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1255 if (io_remap_pfn_range(vma, vma->vm_start, 1256 (pci_resource_start(dev->dev->persist->pdev, 1257 params.bar) + 1258 params.offset) 1259 >> PAGE_SHIFT, 1260 PAGE_SIZE, vma->vm_page_prot)) 1261 return -EAGAIN; 1262 1263 mlx4_ib_set_vma_data(vma, 1264 &mucontext->hw_bar_info[HW_BAR_CLOCK]); 1265 } else { 1266 return -EINVAL; 1267 } 1268 1269 return 0; 1270 } 1271 1272 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev, 1273 struct ib_ucontext *context, 1274 struct ib_udata *udata) 1275 { 1276 struct mlx4_ib_pd *pd; 1277 int err; 1278 1279 pd = kmalloc(sizeof *pd, GFP_KERNEL); 1280 if (!pd) 1281 return ERR_PTR(-ENOMEM); 1282 1283 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1284 if (err) { 1285 kfree(pd); 1286 return ERR_PTR(err); 1287 } 1288 1289 if (context) 1290 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) { 1291 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1292 kfree(pd); 1293 return ERR_PTR(-EFAULT); 1294 } 1295 1296 return &pd->ibpd; 1297 } 1298 1299 static int mlx4_ib_dealloc_pd(struct ib_pd *pd) 1300 { 1301 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1302 kfree(pd); 1303 1304 return 0; 1305 } 1306 1307 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 1308 struct ib_ucontext *context, 1309 struct ib_udata *udata) 1310 { 1311 struct mlx4_ib_xrcd *xrcd; 1312 struct ib_cq_init_attr cq_attr = {}; 1313 int err; 1314 1315 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1316 return ERR_PTR(-ENOSYS); 1317 1318 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 1319 if (!xrcd) 1320 return ERR_PTR(-ENOMEM); 1321 1322 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 1323 if (err) 1324 goto err1; 1325 1326 xrcd->pd = ib_alloc_pd(ibdev, 0); 1327 if (IS_ERR(xrcd->pd)) { 1328 err = PTR_ERR(xrcd->pd); 1329 goto err2; 1330 } 1331 1332 cq_attr.cqe = 1; 1333 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr); 1334 if (IS_ERR(xrcd->cq)) { 1335 err = PTR_ERR(xrcd->cq); 1336 goto err3; 1337 } 1338 1339 return &xrcd->ibxrcd; 1340 1341 err3: 1342 ib_dealloc_pd(xrcd->pd); 1343 err2: 1344 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 1345 err1: 1346 kfree(xrcd); 1347 return ERR_PTR(err); 1348 } 1349 1350 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 1351 { 1352 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1353 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1354 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1355 kfree(xrcd); 1356 1357 return 0; 1358 } 1359 1360 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1361 { 1362 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1363 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1364 struct mlx4_ib_gid_entry *ge; 1365 1366 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1367 if (!ge) 1368 return -ENOMEM; 1369 1370 ge->gid = *gid; 1371 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1372 ge->port = mqp->port; 1373 ge->added = 1; 1374 } 1375 1376 mutex_lock(&mqp->mutex); 1377 list_add_tail(&ge->list, &mqp->gid_list); 1378 mutex_unlock(&mqp->mutex); 1379 1380 return 0; 1381 } 1382 1383 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1384 struct mlx4_ib_counters *ctr_table) 1385 { 1386 struct counter_index *counter, *tmp_count; 1387 1388 mutex_lock(&ctr_table->mutex); 1389 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1390 list) { 1391 if (counter->allocated) 1392 mlx4_counter_free(ibdev->dev, counter->index); 1393 list_del(&counter->list); 1394 kfree(counter); 1395 } 1396 mutex_unlock(&ctr_table->mutex); 1397 } 1398 1399 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1400 union ib_gid *gid) 1401 { 1402 struct net_device *ndev; 1403 int ret = 0; 1404 1405 if (!mqp->port) 1406 return 0; 1407 1408 spin_lock_bh(&mdev->iboe.lock); 1409 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1410 if (ndev) 1411 dev_hold(ndev); 1412 spin_unlock_bh(&mdev->iboe.lock); 1413 1414 if (ndev) { 1415 ret = 1; 1416 dev_put(ndev); 1417 } 1418 1419 return ret; 1420 } 1421 1422 struct mlx4_ib_steering { 1423 struct list_head list; 1424 struct mlx4_flow_reg_id reg_id; 1425 union ib_gid gid; 1426 }; 1427 1428 #define LAST_ETH_FIELD vlan_tag 1429 #define LAST_IB_FIELD sl 1430 #define LAST_IPV4_FIELD dst_ip 1431 #define LAST_TCP_UDP_FIELD src_port 1432 1433 /* Field is the last supported field */ 1434 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1435 memchr_inv((void *)&filter.field +\ 1436 sizeof(filter.field), 0,\ 1437 sizeof(filter) -\ 1438 offsetof(typeof(filter), field) -\ 1439 sizeof(filter.field)) 1440 1441 static int parse_flow_attr(struct mlx4_dev *dev, 1442 u32 qp_num, 1443 union ib_flow_spec *ib_spec, 1444 struct _rule_hw *mlx4_spec) 1445 { 1446 enum mlx4_net_trans_rule_id type; 1447 1448 switch (ib_spec->type) { 1449 case IB_FLOW_SPEC_ETH: 1450 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1451 return -ENOTSUPP; 1452 1453 type = MLX4_NET_TRANS_RULE_ID_ETH; 1454 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1455 ETH_ALEN); 1456 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1457 ETH_ALEN); 1458 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1459 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1460 break; 1461 case IB_FLOW_SPEC_IB: 1462 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1463 return -ENOTSUPP; 1464 1465 type = MLX4_NET_TRANS_RULE_ID_IB; 1466 mlx4_spec->ib.l3_qpn = 1467 cpu_to_be32(qp_num); 1468 mlx4_spec->ib.qpn_mask = 1469 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1470 break; 1471 1472 1473 case IB_FLOW_SPEC_IPV4: 1474 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1475 return -ENOTSUPP; 1476 1477 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1478 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1479 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1480 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1481 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1482 break; 1483 1484 case IB_FLOW_SPEC_TCP: 1485 case IB_FLOW_SPEC_UDP: 1486 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1487 return -ENOTSUPP; 1488 1489 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1490 MLX4_NET_TRANS_RULE_ID_TCP : 1491 MLX4_NET_TRANS_RULE_ID_UDP; 1492 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1493 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1494 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1495 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1496 break; 1497 1498 default: 1499 return -EINVAL; 1500 } 1501 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1502 mlx4_hw_rule_sz(dev, type) < 0) 1503 return -EINVAL; 1504 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1505 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1506 return mlx4_hw_rule_sz(dev, type); 1507 } 1508 1509 struct default_rules { 1510 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1511 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1512 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1513 __u8 link_layer; 1514 }; 1515 static const struct default_rules default_table[] = { 1516 { 1517 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1518 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1519 .rules_create_list = {IB_FLOW_SPEC_IB}, 1520 .link_layer = IB_LINK_LAYER_INFINIBAND 1521 } 1522 }; 1523 1524 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1525 struct ib_flow_attr *flow_attr) 1526 { 1527 int i, j, k; 1528 void *ib_flow; 1529 const struct default_rules *pdefault_rules = default_table; 1530 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1531 1532 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1533 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1534 memset(&field_types, 0, sizeof(field_types)); 1535 1536 if (link_layer != pdefault_rules->link_layer) 1537 continue; 1538 1539 ib_flow = flow_attr + 1; 1540 /* we assume the specs are sorted */ 1541 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1542 j < flow_attr->num_of_specs; k++) { 1543 union ib_flow_spec *current_flow = 1544 (union ib_flow_spec *)ib_flow; 1545 1546 /* same layer but different type */ 1547 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1548 (pdefault_rules->mandatory_fields[k] & 1549 IB_FLOW_SPEC_LAYER_MASK)) && 1550 (current_flow->type != 1551 pdefault_rules->mandatory_fields[k])) 1552 goto out; 1553 1554 /* same layer, try match next one */ 1555 if (current_flow->type == 1556 pdefault_rules->mandatory_fields[k]) { 1557 j++; 1558 ib_flow += 1559 ((union ib_flow_spec *)ib_flow)->size; 1560 } 1561 } 1562 1563 ib_flow = flow_attr + 1; 1564 for (j = 0; j < flow_attr->num_of_specs; 1565 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1566 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1567 /* same layer and same type */ 1568 if (((union ib_flow_spec *)ib_flow)->type == 1569 pdefault_rules->mandatory_not_fields[k]) 1570 goto out; 1571 1572 return i; 1573 } 1574 out: 1575 return -1; 1576 } 1577 1578 static int __mlx4_ib_create_default_rules( 1579 struct mlx4_ib_dev *mdev, 1580 struct ib_qp *qp, 1581 const struct default_rules *pdefault_rules, 1582 struct _rule_hw *mlx4_spec) { 1583 int size = 0; 1584 int i; 1585 1586 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1587 int ret; 1588 union ib_flow_spec ib_spec; 1589 switch (pdefault_rules->rules_create_list[i]) { 1590 case 0: 1591 /* no rule */ 1592 continue; 1593 case IB_FLOW_SPEC_IB: 1594 ib_spec.type = IB_FLOW_SPEC_IB; 1595 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1596 1597 break; 1598 default: 1599 /* invalid rule */ 1600 return -EINVAL; 1601 } 1602 /* We must put empty rule, qpn is being ignored */ 1603 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1604 mlx4_spec); 1605 if (ret < 0) { 1606 pr_info("invalid parsing\n"); 1607 return -EINVAL; 1608 } 1609 1610 mlx4_spec = (void *)mlx4_spec + ret; 1611 size += ret; 1612 } 1613 return size; 1614 } 1615 1616 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1617 int domain, 1618 enum mlx4_net_trans_promisc_mode flow_type, 1619 u64 *reg_id) 1620 { 1621 int ret, i; 1622 int size = 0; 1623 void *ib_flow; 1624 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1625 struct mlx4_cmd_mailbox *mailbox; 1626 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1627 int default_flow; 1628 1629 static const u16 __mlx4_domain[] = { 1630 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 1631 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL, 1632 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS, 1633 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC, 1634 }; 1635 1636 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1637 pr_err("Invalid priority value %d\n", flow_attr->priority); 1638 return -EINVAL; 1639 } 1640 1641 if (domain >= IB_FLOW_DOMAIN_NUM) { 1642 pr_err("Invalid domain value %d\n", domain); 1643 return -EINVAL; 1644 } 1645 1646 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1647 return -EINVAL; 1648 1649 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1650 if (IS_ERR(mailbox)) 1651 return PTR_ERR(mailbox); 1652 ctrl = mailbox->buf; 1653 1654 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 1655 flow_attr->priority); 1656 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1657 ctrl->port = flow_attr->port; 1658 ctrl->qpn = cpu_to_be32(qp->qp_num); 1659 1660 ib_flow = flow_attr + 1; 1661 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1662 /* Add default flows */ 1663 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1664 if (default_flow >= 0) { 1665 ret = __mlx4_ib_create_default_rules( 1666 mdev, qp, default_table + default_flow, 1667 mailbox->buf + size); 1668 if (ret < 0) { 1669 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1670 return -EINVAL; 1671 } 1672 size += ret; 1673 } 1674 for (i = 0; i < flow_attr->num_of_specs; i++) { 1675 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1676 mailbox->buf + size); 1677 if (ret < 0) { 1678 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1679 return -EINVAL; 1680 } 1681 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1682 size += ret; 1683 } 1684 1685 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR && 1686 flow_attr->num_of_specs == 1) { 1687 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1); 1688 enum ib_flow_spec_type header_spec = 1689 ((union ib_flow_spec *)(flow_attr + 1))->type; 1690 1691 if (header_spec == IB_FLOW_SPEC_ETH) 1692 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header); 1693 } 1694 1695 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1696 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1697 MLX4_CMD_NATIVE); 1698 if (ret == -ENOMEM) 1699 pr_err("mcg table is full. Fail to register network rule.\n"); 1700 else if (ret == -ENXIO) 1701 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1702 else if (ret) 1703 pr_err("Invalid argument. Fail to register network rule.\n"); 1704 1705 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1706 return ret; 1707 } 1708 1709 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1710 { 1711 int err; 1712 err = mlx4_cmd(dev, reg_id, 0, 0, 1713 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1714 MLX4_CMD_NATIVE); 1715 if (err) 1716 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1717 reg_id); 1718 return err; 1719 } 1720 1721 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1722 u64 *reg_id) 1723 { 1724 void *ib_flow; 1725 union ib_flow_spec *ib_spec; 1726 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1727 int err = 0; 1728 1729 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1730 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1731 return 0; /* do nothing */ 1732 1733 ib_flow = flow_attr + 1; 1734 ib_spec = (union ib_flow_spec *)ib_flow; 1735 1736 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1737 return 0; /* do nothing */ 1738 1739 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1740 flow_attr->port, qp->qp_num, 1741 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1742 reg_id); 1743 return err; 1744 } 1745 1746 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1747 struct ib_flow_attr *flow_attr, 1748 enum mlx4_net_trans_promisc_mode *type) 1749 { 1750 int err = 0; 1751 1752 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1753 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1754 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1755 return -EOPNOTSUPP; 1756 } 1757 1758 if (flow_attr->num_of_specs == 0) { 1759 type[0] = MLX4_FS_MC_SNIFFER; 1760 type[1] = MLX4_FS_UC_SNIFFER; 1761 } else { 1762 union ib_flow_spec *ib_spec; 1763 1764 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1765 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1766 return -EINVAL; 1767 1768 /* if all is zero than MC and UC */ 1769 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1770 type[0] = MLX4_FS_MC_SNIFFER; 1771 type[1] = MLX4_FS_UC_SNIFFER; 1772 } else { 1773 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1774 ib_spec->eth.mask.dst_mac[1], 1775 ib_spec->eth.mask.dst_mac[2], 1776 ib_spec->eth.mask.dst_mac[3], 1777 ib_spec->eth.mask.dst_mac[4], 1778 ib_spec->eth.mask.dst_mac[5]}; 1779 1780 /* Above xor was only on MC bit, non empty mask is valid 1781 * only if this bit is set and rest are zero. 1782 */ 1783 if (!is_zero_ether_addr(&mac[0])) 1784 return -EINVAL; 1785 1786 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1787 type[0] = MLX4_FS_MC_SNIFFER; 1788 else 1789 type[0] = MLX4_FS_UC_SNIFFER; 1790 } 1791 } 1792 1793 return err; 1794 } 1795 1796 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1797 struct ib_flow_attr *flow_attr, 1798 int domain) 1799 { 1800 int err = 0, i = 0, j = 0; 1801 struct mlx4_ib_flow *mflow; 1802 enum mlx4_net_trans_promisc_mode type[2]; 1803 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1804 int is_bonded = mlx4_is_bonded(dev); 1805 1806 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt) 1807 return ERR_PTR(-EINVAL); 1808 1809 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1810 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1811 return ERR_PTR(-EOPNOTSUPP); 1812 1813 memset(type, 0, sizeof(type)); 1814 1815 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1816 if (!mflow) { 1817 err = -ENOMEM; 1818 goto err_free; 1819 } 1820 1821 switch (flow_attr->type) { 1822 case IB_FLOW_ATTR_NORMAL: 1823 /* If dont trap flag (continue match) is set, under specific 1824 * condition traffic be replicated to given qp, 1825 * without stealing it 1826 */ 1827 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1828 err = mlx4_ib_add_dont_trap_rule(dev, 1829 flow_attr, 1830 type); 1831 if (err) 1832 goto err_free; 1833 } else { 1834 type[0] = MLX4_FS_REGULAR; 1835 } 1836 break; 1837 1838 case IB_FLOW_ATTR_ALL_DEFAULT: 1839 type[0] = MLX4_FS_ALL_DEFAULT; 1840 break; 1841 1842 case IB_FLOW_ATTR_MC_DEFAULT: 1843 type[0] = MLX4_FS_MC_DEFAULT; 1844 break; 1845 1846 case IB_FLOW_ATTR_SNIFFER: 1847 type[0] = MLX4_FS_MIRROR_RX_PORT; 1848 type[1] = MLX4_FS_MIRROR_SX_PORT; 1849 break; 1850 1851 default: 1852 err = -EINVAL; 1853 goto err_free; 1854 } 1855 1856 while (i < ARRAY_SIZE(type) && type[i]) { 1857 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i], 1858 &mflow->reg_id[i].id); 1859 if (err) 1860 goto err_create_flow; 1861 if (is_bonded) { 1862 /* Application always sees one port so the mirror rule 1863 * must be on port #2 1864 */ 1865 flow_attr->port = 2; 1866 err = __mlx4_ib_create_flow(qp, flow_attr, 1867 domain, type[j], 1868 &mflow->reg_id[j].mirror); 1869 flow_attr->port = 1; 1870 if (err) 1871 goto err_create_flow; 1872 j++; 1873 } 1874 1875 i++; 1876 } 1877 1878 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1879 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1880 &mflow->reg_id[i].id); 1881 if (err) 1882 goto err_create_flow; 1883 1884 if (is_bonded) { 1885 flow_attr->port = 2; 1886 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1887 &mflow->reg_id[j].mirror); 1888 flow_attr->port = 1; 1889 if (err) 1890 goto err_create_flow; 1891 j++; 1892 } 1893 /* function to create mirror rule */ 1894 i++; 1895 } 1896 1897 return &mflow->ibflow; 1898 1899 err_create_flow: 1900 while (i) { 1901 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1902 mflow->reg_id[i].id); 1903 i--; 1904 } 1905 1906 while (j) { 1907 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1908 mflow->reg_id[j].mirror); 1909 j--; 1910 } 1911 err_free: 1912 kfree(mflow); 1913 return ERR_PTR(err); 1914 } 1915 1916 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1917 { 1918 int err, ret = 0; 1919 int i = 0; 1920 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1921 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1922 1923 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1924 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1925 if (err) 1926 ret = err; 1927 if (mflow->reg_id[i].mirror) { 1928 err = __mlx4_ib_destroy_flow(mdev->dev, 1929 mflow->reg_id[i].mirror); 1930 if (err) 1931 ret = err; 1932 } 1933 i++; 1934 } 1935 1936 kfree(mflow); 1937 return ret; 1938 } 1939 1940 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1941 { 1942 int err; 1943 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1944 struct mlx4_dev *dev = mdev->dev; 1945 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1946 struct mlx4_ib_steering *ib_steering = NULL; 1947 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1948 struct mlx4_flow_reg_id reg_id; 1949 1950 if (mdev->dev->caps.steering_mode == 1951 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1952 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1953 if (!ib_steering) 1954 return -ENOMEM; 1955 } 1956 1957 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1958 !!(mqp->flags & 1959 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1960 prot, ®_id.id); 1961 if (err) { 1962 pr_err("multicast attach op failed, err %d\n", err); 1963 goto err_malloc; 1964 } 1965 1966 reg_id.mirror = 0; 1967 if (mlx4_is_bonded(dev)) { 1968 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1969 (mqp->port == 1) ? 2 : 1, 1970 !!(mqp->flags & 1971 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1972 prot, ®_id.mirror); 1973 if (err) 1974 goto err_add; 1975 } 1976 1977 err = add_gid_entry(ibqp, gid); 1978 if (err) 1979 goto err_add; 1980 1981 if (ib_steering) { 1982 memcpy(ib_steering->gid.raw, gid->raw, 16); 1983 ib_steering->reg_id = reg_id; 1984 mutex_lock(&mqp->mutex); 1985 list_add(&ib_steering->list, &mqp->steering_rules); 1986 mutex_unlock(&mqp->mutex); 1987 } 1988 return 0; 1989 1990 err_add: 1991 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1992 prot, reg_id.id); 1993 if (reg_id.mirror) 1994 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1995 prot, reg_id.mirror); 1996 err_malloc: 1997 kfree(ib_steering); 1998 1999 return err; 2000 } 2001 2002 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 2003 { 2004 struct mlx4_ib_gid_entry *ge; 2005 struct mlx4_ib_gid_entry *tmp; 2006 struct mlx4_ib_gid_entry *ret = NULL; 2007 2008 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 2009 if (!memcmp(raw, ge->gid.raw, 16)) { 2010 ret = ge; 2011 break; 2012 } 2013 } 2014 2015 return ret; 2016 } 2017 2018 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2019 { 2020 int err; 2021 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 2022 struct mlx4_dev *dev = mdev->dev; 2023 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 2024 struct net_device *ndev; 2025 struct mlx4_ib_gid_entry *ge; 2026 struct mlx4_flow_reg_id reg_id = {0, 0}; 2027 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 2028 2029 if (mdev->dev->caps.steering_mode == 2030 MLX4_STEERING_MODE_DEVICE_MANAGED) { 2031 struct mlx4_ib_steering *ib_steering; 2032 2033 mutex_lock(&mqp->mutex); 2034 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 2035 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 2036 list_del(&ib_steering->list); 2037 break; 2038 } 2039 } 2040 mutex_unlock(&mqp->mutex); 2041 if (&ib_steering->list == &mqp->steering_rules) { 2042 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 2043 return -EINVAL; 2044 } 2045 reg_id = ib_steering->reg_id; 2046 kfree(ib_steering); 2047 } 2048 2049 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 2050 prot, reg_id.id); 2051 if (err) 2052 return err; 2053 2054 if (mlx4_is_bonded(dev)) { 2055 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 2056 prot, reg_id.mirror); 2057 if (err) 2058 return err; 2059 } 2060 2061 mutex_lock(&mqp->mutex); 2062 ge = find_gid_entry(mqp, gid->raw); 2063 if (ge) { 2064 spin_lock_bh(&mdev->iboe.lock); 2065 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 2066 if (ndev) 2067 dev_hold(ndev); 2068 spin_unlock_bh(&mdev->iboe.lock); 2069 if (ndev) 2070 dev_put(ndev); 2071 list_del(&ge->list); 2072 kfree(ge); 2073 } else 2074 pr_warn("could not find mgid entry\n"); 2075 2076 mutex_unlock(&mqp->mutex); 2077 2078 return 0; 2079 } 2080 2081 static int init_node_data(struct mlx4_ib_dev *dev) 2082 { 2083 struct ib_smp *in_mad = NULL; 2084 struct ib_smp *out_mad = NULL; 2085 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 2086 int err = -ENOMEM; 2087 2088 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 2089 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 2090 if (!in_mad || !out_mad) 2091 goto out; 2092 2093 init_query_mad(in_mad); 2094 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 2095 if (mlx4_is_master(dev->dev)) 2096 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 2097 2098 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2099 if (err) 2100 goto out; 2101 2102 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 2103 2104 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 2105 2106 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2107 if (err) 2108 goto out; 2109 2110 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2111 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2112 2113 out: 2114 kfree(in_mad); 2115 kfree(out_mad); 2116 return err; 2117 } 2118 2119 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 2120 char *buf) 2121 { 2122 struct mlx4_ib_dev *dev = 2123 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2124 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device); 2125 } 2126 2127 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 2128 char *buf) 2129 { 2130 struct mlx4_ib_dev *dev = 2131 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2132 return sprintf(buf, "%x\n", dev->dev->rev_id); 2133 } 2134 2135 static ssize_t show_board(struct device *device, struct device_attribute *attr, 2136 char *buf) 2137 { 2138 struct mlx4_ib_dev *dev = 2139 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2140 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN, 2141 dev->dev->board_id); 2142 } 2143 2144 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 2145 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 2146 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 2147 2148 static struct device_attribute *mlx4_class_attributes[] = { 2149 &dev_attr_hw_rev, 2150 &dev_attr_hca_type, 2151 &dev_attr_board_id 2152 }; 2153 2154 struct diag_counter { 2155 const char *name; 2156 u32 offset; 2157 }; 2158 2159 #define DIAG_COUNTER(_name, _offset) \ 2160 { .name = #_name, .offset = _offset } 2161 2162 static const struct diag_counter diag_basic[] = { 2163 DIAG_COUNTER(rq_num_lle, 0x00), 2164 DIAG_COUNTER(sq_num_lle, 0x04), 2165 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2166 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2167 DIAG_COUNTER(rq_num_lpe, 0x18), 2168 DIAG_COUNTER(sq_num_lpe, 0x1C), 2169 DIAG_COUNTER(rq_num_wrfe, 0x20), 2170 DIAG_COUNTER(sq_num_wrfe, 0x24), 2171 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2172 DIAG_COUNTER(sq_num_bre, 0x34), 2173 DIAG_COUNTER(sq_num_rire, 0x44), 2174 DIAG_COUNTER(rq_num_rire, 0x48), 2175 DIAG_COUNTER(sq_num_rae, 0x4C), 2176 DIAG_COUNTER(rq_num_rae, 0x50), 2177 DIAG_COUNTER(sq_num_roe, 0x54), 2178 DIAG_COUNTER(sq_num_tree, 0x5C), 2179 DIAG_COUNTER(sq_num_rree, 0x64), 2180 DIAG_COUNTER(rq_num_rnr, 0x68), 2181 DIAG_COUNTER(sq_num_rnr, 0x6C), 2182 DIAG_COUNTER(rq_num_oos, 0x100), 2183 DIAG_COUNTER(sq_num_oos, 0x104), 2184 }; 2185 2186 static const struct diag_counter diag_ext[] = { 2187 DIAG_COUNTER(rq_num_dup, 0x130), 2188 DIAG_COUNTER(sq_num_to, 0x134), 2189 }; 2190 2191 static const struct diag_counter diag_device_only[] = { 2192 DIAG_COUNTER(num_cqovf, 0x1A0), 2193 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2194 }; 2195 2196 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev, 2197 u8 port_num) 2198 { 2199 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2200 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2201 2202 if (!diag[!!port_num].name) 2203 return NULL; 2204 2205 return rdma_alloc_hw_stats_struct(diag[!!port_num].name, 2206 diag[!!port_num].num_counters, 2207 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2208 } 2209 2210 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2211 struct rdma_hw_stats *stats, 2212 u8 port, int index) 2213 { 2214 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2215 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2216 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2217 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2218 int ret; 2219 int i; 2220 2221 ret = mlx4_query_diag_counters(dev->dev, 2222 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2223 diag[!!port].offset, hw_value, 2224 diag[!!port].num_counters, port); 2225 2226 if (ret) 2227 return ret; 2228 2229 for (i = 0; i < diag[!!port].num_counters; i++) 2230 stats->value[i] = hw_value[i]; 2231 2232 return diag[!!port].num_counters; 2233 } 2234 2235 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2236 const char ***name, 2237 u32 **offset, 2238 u32 *num, 2239 bool port) 2240 { 2241 u32 num_counters; 2242 2243 num_counters = ARRAY_SIZE(diag_basic); 2244 2245 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2246 num_counters += ARRAY_SIZE(diag_ext); 2247 2248 if (!port) 2249 num_counters += ARRAY_SIZE(diag_device_only); 2250 2251 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL); 2252 if (!*name) 2253 return -ENOMEM; 2254 2255 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2256 if (!*offset) 2257 goto err_name; 2258 2259 *num = num_counters; 2260 2261 return 0; 2262 2263 err_name: 2264 kfree(*name); 2265 return -ENOMEM; 2266 } 2267 2268 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2269 const char **name, 2270 u32 *offset, 2271 bool port) 2272 { 2273 int i; 2274 int j; 2275 2276 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2277 name[i] = diag_basic[i].name; 2278 offset[i] = diag_basic[i].offset; 2279 } 2280 2281 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2282 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2283 name[j] = diag_ext[i].name; 2284 offset[j] = diag_ext[i].offset; 2285 } 2286 } 2287 2288 if (!port) { 2289 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2290 name[j] = diag_device_only[i].name; 2291 offset[j] = diag_device_only[i].offset; 2292 } 2293 } 2294 } 2295 2296 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2297 { 2298 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2299 int i; 2300 int ret; 2301 bool per_port = !!(ibdev->dev->caps.flags2 & 2302 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2303 2304 if (mlx4_is_slave(ibdev->dev)) 2305 return 0; 2306 2307 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2308 /* i == 1 means we are building port counters */ 2309 if (i && !per_port) 2310 continue; 2311 2312 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name, 2313 &diag[i].offset, 2314 &diag[i].num_counters, i); 2315 if (ret) 2316 goto err_alloc; 2317 2318 mlx4_ib_fill_diag_counters(ibdev, diag[i].name, 2319 diag[i].offset, i); 2320 } 2321 2322 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats; 2323 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats; 2324 2325 return 0; 2326 2327 err_alloc: 2328 if (i) { 2329 kfree(diag[i - 1].name); 2330 kfree(diag[i - 1].offset); 2331 } 2332 2333 return ret; 2334 } 2335 2336 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2337 { 2338 int i; 2339 2340 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2341 kfree(ibdev->diag_counters[i].offset); 2342 kfree(ibdev->diag_counters[i].name); 2343 } 2344 } 2345 2346 #define MLX4_IB_INVALID_MAC ((u64)-1) 2347 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2348 struct net_device *dev, 2349 int port) 2350 { 2351 u64 new_smac = 0; 2352 u64 release_mac = MLX4_IB_INVALID_MAC; 2353 struct mlx4_ib_qp *qp; 2354 2355 read_lock(&dev_base_lock); 2356 new_smac = mlx4_mac_to_u64(dev->dev_addr); 2357 read_unlock(&dev_base_lock); 2358 2359 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2360 2361 /* no need for update QP1 and mac registration in non-SRIOV */ 2362 if (!mlx4_is_mfunc(ibdev->dev)) 2363 return; 2364 2365 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2366 qp = ibdev->qp1_proxy[port - 1]; 2367 if (qp) { 2368 int new_smac_index; 2369 u64 old_smac; 2370 struct mlx4_update_qp_params update_params; 2371 2372 mutex_lock(&qp->mutex); 2373 old_smac = qp->pri.smac; 2374 if (new_smac == old_smac) 2375 goto unlock; 2376 2377 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2378 2379 if (new_smac_index < 0) 2380 goto unlock; 2381 2382 update_params.smac_index = new_smac_index; 2383 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2384 &update_params)) { 2385 release_mac = new_smac; 2386 goto unlock; 2387 } 2388 /* if old port was zero, no mac was yet registered for this QP */ 2389 if (qp->pri.smac_port) 2390 release_mac = old_smac; 2391 qp->pri.smac = new_smac; 2392 qp->pri.smac_port = port; 2393 qp->pri.smac_index = new_smac_index; 2394 } 2395 2396 unlock: 2397 if (release_mac != MLX4_IB_INVALID_MAC) 2398 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2399 if (qp) 2400 mutex_unlock(&qp->mutex); 2401 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2402 } 2403 2404 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 2405 struct net_device *dev, 2406 unsigned long event) 2407 2408 { 2409 struct mlx4_ib_iboe *iboe; 2410 int update_qps_port = -1; 2411 int port; 2412 2413 ASSERT_RTNL(); 2414 2415 iboe = &ibdev->iboe; 2416 2417 spin_lock_bh(&iboe->lock); 2418 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 2419 2420 iboe->netdevs[port - 1] = 2421 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 2422 2423 if (dev == iboe->netdevs[port - 1] && 2424 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2425 event == NETDEV_UP || event == NETDEV_CHANGE)) 2426 update_qps_port = port; 2427 2428 } 2429 spin_unlock_bh(&iboe->lock); 2430 2431 if (update_qps_port > 0) 2432 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2433 } 2434 2435 static int mlx4_ib_netdev_event(struct notifier_block *this, 2436 unsigned long event, void *ptr) 2437 { 2438 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2439 struct mlx4_ib_dev *ibdev; 2440 2441 if (!net_eq(dev_net(dev), &init_net)) 2442 return NOTIFY_DONE; 2443 2444 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2445 mlx4_ib_scan_netdevs(ibdev, dev, event); 2446 2447 return NOTIFY_DONE; 2448 } 2449 2450 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2451 { 2452 int port; 2453 int slave; 2454 int i; 2455 2456 if (mlx4_is_master(ibdev->dev)) { 2457 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2458 ++slave) { 2459 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2460 for (i = 0; 2461 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2462 ++i) { 2463 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2464 /* master has the identity virt2phys pkey mapping */ 2465 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2466 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2467 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2468 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2469 } 2470 } 2471 } 2472 /* initialize pkey cache */ 2473 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2474 for (i = 0; 2475 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2476 ++i) 2477 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2478 (i) ? 0 : 0xFFFF; 2479 } 2480 } 2481 } 2482 2483 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2484 { 2485 int i, j, eq = 0, total_eqs = 0; 2486 2487 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2488 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2489 if (!ibdev->eq_table) 2490 return; 2491 2492 for (i = 1; i <= dev->caps.num_ports; i++) { 2493 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2494 j++, total_eqs++) { 2495 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2496 continue; 2497 ibdev->eq_table[eq] = total_eqs; 2498 if (!mlx4_assign_eq(dev, i, 2499 &ibdev->eq_table[eq])) 2500 eq++; 2501 else 2502 ibdev->eq_table[eq] = -1; 2503 } 2504 } 2505 2506 for (i = eq; i < dev->caps.num_comp_vectors; 2507 ibdev->eq_table[i++] = -1) 2508 ; 2509 2510 /* Advertise the new number of EQs to clients */ 2511 ibdev->ib_dev.num_comp_vectors = eq; 2512 } 2513 2514 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2515 { 2516 int i; 2517 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2518 2519 /* no eqs were allocated */ 2520 if (!ibdev->eq_table) 2521 return; 2522 2523 /* Reset the advertised EQ number */ 2524 ibdev->ib_dev.num_comp_vectors = 0; 2525 2526 for (i = 0; i < total_eqs; i++) 2527 mlx4_release_eq(dev, ibdev->eq_table[i]); 2528 2529 kfree(ibdev->eq_table); 2530 ibdev->eq_table = NULL; 2531 } 2532 2533 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, 2534 struct ib_port_immutable *immutable) 2535 { 2536 struct ib_port_attr attr; 2537 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2538 int err; 2539 2540 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2541 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2542 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2543 } else { 2544 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2545 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2546 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2547 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2548 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2549 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET; 2550 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE | 2551 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP)) 2552 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2553 } 2554 2555 err = ib_query_port(ibdev, port_num, &attr); 2556 if (err) 2557 return err; 2558 2559 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2560 immutable->gid_tbl_len = attr.gid_tbl_len; 2561 2562 return 0; 2563 } 2564 2565 static void get_fw_ver_str(struct ib_device *device, char *str, 2566 size_t str_len) 2567 { 2568 struct mlx4_ib_dev *dev = 2569 container_of(device, struct mlx4_ib_dev, ib_dev); 2570 snprintf(str, str_len, "%d.%d.%d", 2571 (int) (dev->dev->caps.fw_ver >> 32), 2572 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2573 (int) dev->dev->caps.fw_ver & 0xffff); 2574 } 2575 2576 static void *mlx4_ib_add(struct mlx4_dev *dev) 2577 { 2578 struct mlx4_ib_dev *ibdev; 2579 int num_ports = 0; 2580 int i, j; 2581 int err; 2582 struct mlx4_ib_iboe *iboe; 2583 int ib_num_ports = 0; 2584 int num_req_counters; 2585 int allocated; 2586 u32 counter_index; 2587 struct counter_index *new_counter_index = NULL; 2588 2589 pr_info_once("%s", mlx4_ib_version); 2590 2591 num_ports = 0; 2592 mlx4_foreach_ib_transport_port(i, dev) 2593 num_ports++; 2594 2595 /* No point in registering a device with no ports... */ 2596 if (num_ports == 0) 2597 return NULL; 2598 2599 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev); 2600 if (!ibdev) { 2601 dev_err(&dev->persist->pdev->dev, 2602 "Device struct alloc failed\n"); 2603 return NULL; 2604 } 2605 2606 iboe = &ibdev->iboe; 2607 2608 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2609 goto err_dealloc; 2610 2611 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2612 goto err_pd; 2613 2614 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2615 PAGE_SIZE); 2616 if (!ibdev->uar_map) 2617 goto err_uar; 2618 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2619 2620 ibdev->dev = dev; 2621 ibdev->bond_next_port = 0; 2622 2623 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX); 2624 ibdev->ib_dev.owner = THIS_MODULE; 2625 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2626 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2627 ibdev->num_ports = num_ports; 2628 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2629 1 : ibdev->num_ports; 2630 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2631 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev; 2632 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev; 2633 ibdev->ib_dev.add_gid = mlx4_ib_add_gid; 2634 ibdev->ib_dev.del_gid = mlx4_ib_del_gid; 2635 2636 if (dev->caps.userspace_caps) 2637 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION; 2638 else 2639 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2640 2641 ibdev->ib_dev.uverbs_cmd_mask = 2642 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2643 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2644 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2645 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2646 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2647 (1ull << IB_USER_VERBS_CMD_REG_MR) | 2648 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2649 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2650 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2651 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2652 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2653 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2654 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2655 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 2656 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 2657 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 2658 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 2659 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 2660 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 2661 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 2662 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 2663 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 2664 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 2665 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 2666 2667 ibdev->ib_dev.query_device = mlx4_ib_query_device; 2668 ibdev->ib_dev.query_port = mlx4_ib_query_port; 2669 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; 2670 ibdev->ib_dev.query_gid = mlx4_ib_query_gid; 2671 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; 2672 ibdev->ib_dev.modify_device = mlx4_ib_modify_device; 2673 ibdev->ib_dev.modify_port = mlx4_ib_modify_port; 2674 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext; 2675 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext; 2676 ibdev->ib_dev.mmap = mlx4_ib_mmap; 2677 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd; 2678 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd; 2679 ibdev->ib_dev.create_ah = mlx4_ib_create_ah; 2680 ibdev->ib_dev.query_ah = mlx4_ib_query_ah; 2681 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah; 2682 ibdev->ib_dev.create_srq = mlx4_ib_create_srq; 2683 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq; 2684 ibdev->ib_dev.query_srq = mlx4_ib_query_srq; 2685 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq; 2686 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv; 2687 ibdev->ib_dev.create_qp = mlx4_ib_create_qp; 2688 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp; 2689 ibdev->ib_dev.query_qp = mlx4_ib_query_qp; 2690 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp; 2691 ibdev->ib_dev.post_send = mlx4_ib_post_send; 2692 ibdev->ib_dev.post_recv = mlx4_ib_post_recv; 2693 ibdev->ib_dev.create_cq = mlx4_ib_create_cq; 2694 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq; 2695 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq; 2696 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq; 2697 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq; 2698 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq; 2699 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr; 2700 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr; 2701 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr; 2702 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr; 2703 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr; 2704 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg; 2705 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach; 2706 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach; 2707 ibdev->ib_dev.process_mad = mlx4_ib_process_mad; 2708 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable; 2709 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str; 2710 ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext; 2711 2712 if (!mlx4_is_slave(ibdev->dev)) { 2713 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc; 2714 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr; 2715 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 2716 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 2717 } 2718 2719 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2720 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 2721 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw; 2722 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw; 2723 2724 ibdev->ib_dev.uverbs_cmd_mask |= 2725 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 2726 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 2727 } 2728 2729 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2730 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd; 2731 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd; 2732 ibdev->ib_dev.uverbs_cmd_mask |= 2733 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 2734 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 2735 } 2736 2737 if (check_flow_steering_support(dev)) { 2738 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2739 ibdev->ib_dev.create_flow = mlx4_ib_create_flow; 2740 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow; 2741 2742 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2743 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 2744 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW); 2745 } 2746 2747 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2748 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 2749 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 2750 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 2751 2752 mlx4_ib_alloc_eqs(dev, ibdev); 2753 2754 spin_lock_init(&iboe->lock); 2755 2756 if (init_node_data(ibdev)) 2757 goto err_map; 2758 mlx4_init_sl2vl_tbl(ibdev); 2759 2760 for (i = 0; i < ibdev->num_ports; ++i) { 2761 mutex_init(&ibdev->counters_table[i].mutex); 2762 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2763 } 2764 2765 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2766 for (i = 0; i < num_req_counters; ++i) { 2767 mutex_init(&ibdev->qp1_proxy_lock[i]); 2768 allocated = 0; 2769 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2770 IB_LINK_LAYER_ETHERNET) { 2771 err = mlx4_counter_alloc(ibdev->dev, &counter_index); 2772 /* if failed to allocate a new counter, use default */ 2773 if (err) 2774 counter_index = 2775 mlx4_get_default_counter_index(dev, 2776 i + 1); 2777 else 2778 allocated = 1; 2779 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2780 counter_index = mlx4_get_default_counter_index(dev, 2781 i + 1); 2782 } 2783 new_counter_index = kmalloc(sizeof(*new_counter_index), 2784 GFP_KERNEL); 2785 if (!new_counter_index) { 2786 if (allocated) 2787 mlx4_counter_free(ibdev->dev, counter_index); 2788 goto err_counter; 2789 } 2790 new_counter_index->index = counter_index; 2791 new_counter_index->allocated = allocated; 2792 list_add_tail(&new_counter_index->list, 2793 &ibdev->counters_table[i].counters_list); 2794 ibdev->counters_table[i].default_counter = counter_index; 2795 pr_info("counter index %d for port %d allocated %d\n", 2796 counter_index, i + 1, allocated); 2797 } 2798 if (mlx4_is_bonded(dev)) 2799 for (i = 1; i < ibdev->num_ports ; ++i) { 2800 new_counter_index = 2801 kmalloc(sizeof(struct counter_index), 2802 GFP_KERNEL); 2803 if (!new_counter_index) 2804 goto err_counter; 2805 new_counter_index->index = counter_index; 2806 new_counter_index->allocated = 0; 2807 list_add_tail(&new_counter_index->list, 2808 &ibdev->counters_table[i].counters_list); 2809 ibdev->counters_table[i].default_counter = 2810 counter_index; 2811 } 2812 2813 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2814 ib_num_ports++; 2815 2816 spin_lock_init(&ibdev->sm_lock); 2817 mutex_init(&ibdev->cap_mask_mutex); 2818 INIT_LIST_HEAD(&ibdev->qp_list); 2819 spin_lock_init(&ibdev->reset_flow_resource_lock); 2820 2821 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2822 ib_num_ports) { 2823 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2824 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2825 MLX4_IB_UC_STEER_QPN_ALIGN, 2826 &ibdev->steer_qpn_base, 0); 2827 if (err) 2828 goto err_counter; 2829 2830 ibdev->ib_uc_qpns_bitmap = 2831 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) * 2832 sizeof(long), 2833 GFP_KERNEL); 2834 if (!ibdev->ib_uc_qpns_bitmap) 2835 goto err_steer_qp_release; 2836 2837 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) { 2838 bitmap_zero(ibdev->ib_uc_qpns_bitmap, 2839 ibdev->steer_qpn_count); 2840 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2841 dev, ibdev->steer_qpn_base, 2842 ibdev->steer_qpn_base + 2843 ibdev->steer_qpn_count - 1); 2844 if (err) 2845 goto err_steer_free_bitmap; 2846 } else { 2847 bitmap_fill(ibdev->ib_uc_qpns_bitmap, 2848 ibdev->steer_qpn_count); 2849 } 2850 } 2851 2852 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2853 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2854 2855 if (mlx4_ib_alloc_diag_counters(ibdev)) 2856 goto err_steer_free_bitmap; 2857 2858 if (ib_register_device(&ibdev->ib_dev, NULL)) 2859 goto err_diag_counters; 2860 2861 if (mlx4_ib_mad_init(ibdev)) 2862 goto err_reg; 2863 2864 if (mlx4_ib_init_sriov(ibdev)) 2865 goto err_mad; 2866 2867 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE || 2868 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2869 if (!iboe->nb.notifier_call) { 2870 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2871 err = register_netdevice_notifier(&iboe->nb); 2872 if (err) { 2873 iboe->nb.notifier_call = NULL; 2874 goto err_notif; 2875 } 2876 } 2877 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2878 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2879 if (err) { 2880 goto err_notif; 2881 } 2882 } 2883 } 2884 2885 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) { 2886 if (device_create_file(&ibdev->ib_dev.dev, 2887 mlx4_class_attributes[j])) 2888 goto err_notif; 2889 } 2890 2891 ibdev->ib_active = true; 2892 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2893 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2894 &ibdev->ib_dev); 2895 2896 if (mlx4_is_mfunc(ibdev->dev)) 2897 init_pkeys(ibdev); 2898 2899 /* create paravirt contexts for any VFs which are active */ 2900 if (mlx4_is_master(ibdev->dev)) { 2901 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2902 if (j == mlx4_master_func_num(ibdev->dev)) 2903 continue; 2904 if (mlx4_is_slave_active(ibdev->dev, j)) 2905 do_slave_init(ibdev, j, 1); 2906 } 2907 } 2908 return ibdev; 2909 2910 err_notif: 2911 if (ibdev->iboe.nb.notifier_call) { 2912 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2913 pr_warn("failure unregistering notifier\n"); 2914 ibdev->iboe.nb.notifier_call = NULL; 2915 } 2916 flush_workqueue(wq); 2917 2918 mlx4_ib_close_sriov(ibdev); 2919 2920 err_mad: 2921 mlx4_ib_mad_cleanup(ibdev); 2922 2923 err_reg: 2924 ib_unregister_device(&ibdev->ib_dev); 2925 2926 err_diag_counters: 2927 mlx4_ib_diag_cleanup(ibdev); 2928 2929 err_steer_free_bitmap: 2930 kfree(ibdev->ib_uc_qpns_bitmap); 2931 2932 err_steer_qp_release: 2933 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 2934 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2935 ibdev->steer_qpn_count); 2936 err_counter: 2937 for (i = 0; i < ibdev->num_ports; ++i) 2938 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2939 2940 err_map: 2941 iounmap(ibdev->uar_map); 2942 2943 err_uar: 2944 mlx4_uar_free(dev, &ibdev->priv_uar); 2945 2946 err_pd: 2947 mlx4_pd_free(dev, ibdev->priv_pdn); 2948 2949 err_dealloc: 2950 ib_dealloc_device(&ibdev->ib_dev); 2951 2952 return NULL; 2953 } 2954 2955 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2956 { 2957 int offset; 2958 2959 WARN_ON(!dev->ib_uc_qpns_bitmap); 2960 2961 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2962 dev->steer_qpn_count, 2963 get_count_order(count)); 2964 if (offset < 0) 2965 return offset; 2966 2967 *qpn = dev->steer_qpn_base + offset; 2968 return 0; 2969 } 2970 2971 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2972 { 2973 if (!qpn || 2974 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2975 return; 2976 2977 BUG_ON(qpn < dev->steer_qpn_base); 2978 2979 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2980 qpn - dev->steer_qpn_base, 2981 get_count_order(count)); 2982 } 2983 2984 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2985 int is_attach) 2986 { 2987 int err; 2988 size_t flow_size; 2989 struct ib_flow_attr *flow = NULL; 2990 struct ib_flow_spec_ib *ib_spec; 2991 2992 if (is_attach) { 2993 flow_size = sizeof(struct ib_flow_attr) + 2994 sizeof(struct ib_flow_spec_ib); 2995 flow = kzalloc(flow_size, GFP_KERNEL); 2996 if (!flow) 2997 return -ENOMEM; 2998 flow->port = mqp->port; 2999 flow->num_of_specs = 1; 3000 flow->size = flow_size; 3001 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 3002 ib_spec->type = IB_FLOW_SPEC_IB; 3003 ib_spec->size = sizeof(struct ib_flow_spec_ib); 3004 /* Add an empty rule for IB L2 */ 3005 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 3006 3007 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, 3008 IB_FLOW_DOMAIN_NIC, 3009 MLX4_FS_REGULAR, 3010 &mqp->reg_id); 3011 } else { 3012 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 3013 } 3014 kfree(flow); 3015 return err; 3016 } 3017 3018 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 3019 { 3020 struct mlx4_ib_dev *ibdev = ibdev_ptr; 3021 int p; 3022 int i; 3023 3024 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 3025 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 3026 ibdev->ib_active = false; 3027 flush_workqueue(wq); 3028 3029 mlx4_ib_close_sriov(ibdev); 3030 mlx4_ib_mad_cleanup(ibdev); 3031 ib_unregister_device(&ibdev->ib_dev); 3032 mlx4_ib_diag_cleanup(ibdev); 3033 if (ibdev->iboe.nb.notifier_call) { 3034 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 3035 pr_warn("failure unregistering notifier\n"); 3036 ibdev->iboe.nb.notifier_call = NULL; 3037 } 3038 3039 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) { 3040 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 3041 ibdev->steer_qpn_count); 3042 kfree(ibdev->ib_uc_qpns_bitmap); 3043 } 3044 3045 iounmap(ibdev->uar_map); 3046 for (p = 0; p < ibdev->num_ports; ++p) 3047 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 3048 3049 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 3050 mlx4_CLOSE_PORT(dev, p); 3051 3052 mlx4_ib_free_eqs(dev, ibdev); 3053 3054 mlx4_uar_free(dev, &ibdev->priv_uar); 3055 mlx4_pd_free(dev, ibdev->priv_pdn); 3056 ib_dealloc_device(&ibdev->ib_dev); 3057 } 3058 3059 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 3060 { 3061 struct mlx4_ib_demux_work **dm = NULL; 3062 struct mlx4_dev *dev = ibdev->dev; 3063 int i; 3064 unsigned long flags; 3065 struct mlx4_active_ports actv_ports; 3066 unsigned int ports; 3067 unsigned int first_port; 3068 3069 if (!mlx4_is_master(dev)) 3070 return; 3071 3072 actv_ports = mlx4_get_active_ports(dev, slave); 3073 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3074 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3075 3076 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 3077 if (!dm) 3078 return; 3079 3080 for (i = 0; i < ports; i++) { 3081 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3082 if (!dm[i]) { 3083 while (--i >= 0) 3084 kfree(dm[i]); 3085 goto out; 3086 } 3087 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3088 dm[i]->port = first_port + i + 1; 3089 dm[i]->slave = slave; 3090 dm[i]->do_init = do_init; 3091 dm[i]->dev = ibdev; 3092 } 3093 /* initialize or tear down tunnel QPs for the slave */ 3094 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3095 if (!ibdev->sriov.is_going_down) { 3096 for (i = 0; i < ports; i++) 3097 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3098 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3099 } else { 3100 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3101 for (i = 0; i < ports; i++) 3102 kfree(dm[i]); 3103 } 3104 out: 3105 kfree(dm); 3106 return; 3107 } 3108 3109 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3110 { 3111 struct mlx4_ib_qp *mqp; 3112 unsigned long flags_qp; 3113 unsigned long flags_cq; 3114 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3115 struct list_head cq_notify_list; 3116 struct mlx4_cq *mcq; 3117 unsigned long flags; 3118 3119 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3120 INIT_LIST_HEAD(&cq_notify_list); 3121 3122 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3123 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3124 3125 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3126 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3127 if (mqp->sq.tail != mqp->sq.head) { 3128 send_mcq = to_mcq(mqp->ibqp.send_cq); 3129 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3130 if (send_mcq->mcq.comp && 3131 mqp->ibqp.send_cq->comp_handler) { 3132 if (!send_mcq->mcq.reset_notify_added) { 3133 send_mcq->mcq.reset_notify_added = 1; 3134 list_add_tail(&send_mcq->mcq.reset_notify, 3135 &cq_notify_list); 3136 } 3137 } 3138 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3139 } 3140 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3141 /* Now, handle the QP's receive queue */ 3142 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3143 /* no handling is needed for SRQ */ 3144 if (!mqp->ibqp.srq) { 3145 if (mqp->rq.tail != mqp->rq.head) { 3146 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3147 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3148 if (recv_mcq->mcq.comp && 3149 mqp->ibqp.recv_cq->comp_handler) { 3150 if (!recv_mcq->mcq.reset_notify_added) { 3151 recv_mcq->mcq.reset_notify_added = 1; 3152 list_add_tail(&recv_mcq->mcq.reset_notify, 3153 &cq_notify_list); 3154 } 3155 } 3156 spin_unlock_irqrestore(&recv_mcq->lock, 3157 flags_cq); 3158 } 3159 } 3160 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3161 } 3162 3163 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3164 mcq->comp(mcq); 3165 } 3166 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3167 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3168 } 3169 3170 static void handle_bonded_port_state_event(struct work_struct *work) 3171 { 3172 struct ib_event_work *ew = 3173 container_of(work, struct ib_event_work, work); 3174 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3175 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3176 int i; 3177 struct ib_event ibev; 3178 3179 kfree(ew); 3180 spin_lock_bh(&ibdev->iboe.lock); 3181 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3182 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3183 enum ib_port_state curr_port_state; 3184 3185 if (!curr_netdev) 3186 continue; 3187 3188 curr_port_state = 3189 (netif_running(curr_netdev) && 3190 netif_carrier_ok(curr_netdev)) ? 3191 IB_PORT_ACTIVE : IB_PORT_DOWN; 3192 3193 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3194 curr_port_state : IB_PORT_ACTIVE; 3195 } 3196 spin_unlock_bh(&ibdev->iboe.lock); 3197 3198 ibev.device = &ibdev->ib_dev; 3199 ibev.element.port_num = 1; 3200 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3201 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3202 3203 ib_dispatch_event(&ibev); 3204 } 3205 3206 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3207 { 3208 u64 sl2vl; 3209 int err; 3210 3211 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3212 if (err) { 3213 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3214 port, err); 3215 sl2vl = 0; 3216 } 3217 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3218 } 3219 3220 static void ib_sl2vl_update_work(struct work_struct *work) 3221 { 3222 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3223 struct mlx4_ib_dev *mdev = ew->ib_dev; 3224 int port = ew->port; 3225 3226 mlx4_ib_sl2vl_update(mdev, port); 3227 3228 kfree(ew); 3229 } 3230 3231 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3232 int port) 3233 { 3234 struct ib_event_work *ew; 3235 3236 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3237 if (ew) { 3238 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3239 ew->port = port; 3240 ew->ib_dev = ibdev; 3241 queue_work(wq, &ew->work); 3242 } 3243 } 3244 3245 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 3246 enum mlx4_dev_event event, unsigned long param) 3247 { 3248 struct ib_event ibev; 3249 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 3250 struct mlx4_eqe *eqe = NULL; 3251 struct ib_event_work *ew; 3252 int p = 0; 3253 3254 if (mlx4_is_bonded(dev) && 3255 ((event == MLX4_DEV_EVENT_PORT_UP) || 3256 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3257 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3258 if (!ew) 3259 return; 3260 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3261 ew->ib_dev = ibdev; 3262 queue_work(wq, &ew->work); 3263 return; 3264 } 3265 3266 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 3267 eqe = (struct mlx4_eqe *)param; 3268 else 3269 p = (int) param; 3270 3271 switch (event) { 3272 case MLX4_DEV_EVENT_PORT_UP: 3273 if (p > ibdev->num_ports) 3274 return; 3275 if (!mlx4_is_slave(dev) && 3276 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3277 IB_LINK_LAYER_INFINIBAND) { 3278 if (mlx4_is_master(dev)) 3279 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3280 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3281 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3282 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3283 } 3284 ibev.event = IB_EVENT_PORT_ACTIVE; 3285 break; 3286 3287 case MLX4_DEV_EVENT_PORT_DOWN: 3288 if (p > ibdev->num_ports) 3289 return; 3290 ibev.event = IB_EVENT_PORT_ERR; 3291 break; 3292 3293 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3294 ibdev->ib_active = false; 3295 ibev.event = IB_EVENT_DEVICE_FATAL; 3296 mlx4_ib_handle_catas_error(ibdev); 3297 break; 3298 3299 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3300 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3301 if (!ew) 3302 break; 3303 3304 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3305 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3306 ew->ib_dev = ibdev; 3307 /* need to queue only for port owner, which uses GEN_EQE */ 3308 if (mlx4_is_master(dev)) 3309 queue_work(wq, &ew->work); 3310 else 3311 handle_port_mgmt_change_event(&ew->work); 3312 return; 3313 3314 case MLX4_DEV_EVENT_SLAVE_INIT: 3315 /* here, p is the slave id */ 3316 do_slave_init(ibdev, p, 1); 3317 if (mlx4_is_master(dev)) { 3318 int i; 3319 3320 for (i = 1; i <= ibdev->num_ports; i++) { 3321 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3322 == IB_LINK_LAYER_INFINIBAND) 3323 mlx4_ib_slave_alias_guid_event(ibdev, 3324 p, i, 3325 1); 3326 } 3327 } 3328 return; 3329 3330 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3331 if (mlx4_is_master(dev)) { 3332 int i; 3333 3334 for (i = 1; i <= ibdev->num_ports; i++) { 3335 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3336 == IB_LINK_LAYER_INFINIBAND) 3337 mlx4_ib_slave_alias_guid_event(ibdev, 3338 p, i, 3339 0); 3340 } 3341 } 3342 /* here, p is the slave id */ 3343 do_slave_init(ibdev, p, 0); 3344 return; 3345 3346 default: 3347 return; 3348 } 3349 3350 ibev.device = ibdev_ptr; 3351 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3352 3353 ib_dispatch_event(&ibev); 3354 } 3355 3356 static struct mlx4_interface mlx4_ib_interface = { 3357 .add = mlx4_ib_add, 3358 .remove = mlx4_ib_remove, 3359 .event = mlx4_ib_event, 3360 .protocol = MLX4_PROT_IB_IPV6, 3361 .flags = MLX4_INTFF_BONDING 3362 }; 3363 3364 static int __init mlx4_ib_init(void) 3365 { 3366 int err; 3367 3368 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3369 if (!wq) 3370 return -ENOMEM; 3371 3372 err = mlx4_ib_mcg_init(); 3373 if (err) 3374 goto clean_wq; 3375 3376 err = mlx4_register_interface(&mlx4_ib_interface); 3377 if (err) 3378 goto clean_mcg; 3379 3380 return 0; 3381 3382 clean_mcg: 3383 mlx4_ib_mcg_destroy(); 3384 3385 clean_wq: 3386 destroy_workqueue(wq); 3387 return err; 3388 } 3389 3390 static void __exit mlx4_ib_cleanup(void) 3391 { 3392 mlx4_unregister_interface(&mlx4_ib_interface); 3393 mlx4_ib_mcg_destroy(); 3394 destroy_workqueue(wq); 3395 } 3396 3397 module_init(mlx4_ib_init); 3398 module_exit(mlx4_ib_cleanup); 3399