1 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4 
5 /**
6  * irdma_query_device - get device attributes
7  * @ibdev: device pointer from stack
8  * @props: returning device attributes
9  * @udata: user data
10  */
11 static int irdma_query_device(struct ib_device *ibdev,
12 			      struct ib_device_attr *props,
13 			      struct ib_udata *udata)
14 {
15 	struct irdma_device *iwdev = to_iwdev(ibdev);
16 	struct irdma_pci_f *rf = iwdev->rf;
17 	struct pci_dev *pcidev = iwdev->rf->pcidev;
18 	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19 
20 	if (udata->inlen || udata->outlen)
21 		return -EINVAL;
22 
23 	memset(props, 0, sizeof(*props));
24 	addrconf_addr_eui48((u8 *)&props->sys_image_guid,
25 			    iwdev->netdev->dev_addr);
26 	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
27 			irdma_fw_minor_ver(&rf->sc_dev);
28 	props->device_cap_flags = iwdev->device_cap_flags;
29 	props->vendor_id = pcidev->vendor;
30 	props->vendor_part_id = pcidev->device;
31 
32 	props->hw_ver = rf->pcidev->revision;
33 	props->page_size_cap = SZ_4K | SZ_2M | SZ_1G;
34 	props->max_mr_size = hw_attrs->max_mr_size;
35 	props->max_qp = rf->max_qp - rf->used_qps;
36 	props->max_qp_wr = hw_attrs->max_qp_wr;
37 	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
38 	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
39 	props->max_cq = rf->max_cq - rf->used_cqs;
40 	props->max_cqe = rf->max_cqe;
41 	props->max_mr = rf->max_mr - rf->used_mrs;
42 	props->max_mw = props->max_mr;
43 	props->max_pd = rf->max_pd - rf->used_pds;
44 	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
45 	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
46 	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
47 	if (rdma_protocol_roce(ibdev, 1))
48 		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
49 	props->max_ah = rf->max_ah;
50 	props->max_mcast_grp = rf->max_mcg;
51 	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
52 	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
53 	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
54 #define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff
55 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2)
56 		props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK;
57 
58 	return 0;
59 }
60 
61 /**
62  * irdma_get_eth_speed_and_width - Get IB port speed and width from netdev speed
63  * @link_speed: netdev phy link speed
64  * @active_speed: IB port speed
65  * @active_width: IB port width
66  */
67 static void irdma_get_eth_speed_and_width(u32 link_speed, u16 *active_speed,
68 					  u8 *active_width)
69 {
70 	if (link_speed <= SPEED_1000) {
71 		*active_width = IB_WIDTH_1X;
72 		*active_speed = IB_SPEED_SDR;
73 	} else if (link_speed <= SPEED_10000) {
74 		*active_width = IB_WIDTH_1X;
75 		*active_speed = IB_SPEED_FDR10;
76 	} else if (link_speed <= SPEED_20000) {
77 		*active_width = IB_WIDTH_4X;
78 		*active_speed = IB_SPEED_DDR;
79 	} else if (link_speed <= SPEED_25000) {
80 		*active_width = IB_WIDTH_1X;
81 		*active_speed = IB_SPEED_EDR;
82 	} else if (link_speed <= SPEED_40000) {
83 		*active_width = IB_WIDTH_4X;
84 		*active_speed = IB_SPEED_FDR10;
85 	} else {
86 		*active_width = IB_WIDTH_4X;
87 		*active_speed = IB_SPEED_EDR;
88 	}
89 }
90 
91 /**
92  * irdma_query_port - get port attributes
93  * @ibdev: device pointer from stack
94  * @port: port number for query
95  * @props: returning device attributes
96  */
97 static int irdma_query_port(struct ib_device *ibdev, u32 port,
98 			    struct ib_port_attr *props)
99 {
100 	struct irdma_device *iwdev = to_iwdev(ibdev);
101 	struct net_device *netdev = iwdev->netdev;
102 
103 	/* no need to zero out pros here. done by caller */
104 
105 	props->max_mtu = IB_MTU_4096;
106 	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
107 	props->lid = 1;
108 	props->lmc = 0;
109 	props->sm_lid = 0;
110 	props->sm_sl = 0;
111 	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
112 		props->state = IB_PORT_ACTIVE;
113 		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
114 	} else {
115 		props->state = IB_PORT_DOWN;
116 		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
117 	}
118 	irdma_get_eth_speed_and_width(SPEED_100000, &props->active_speed,
119 				      &props->active_width);
120 
121 	if (rdma_protocol_roce(ibdev, 1)) {
122 		props->gid_tbl_len = 32;
123 		props->ip_gids = true;
124 		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
125 	} else {
126 		props->gid_tbl_len = 1;
127 	}
128 	props->qkey_viol_cntr = 0;
129 	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
130 	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
131 
132 	return 0;
133 }
134 
135 /**
136  * irdma_disassociate_ucontext - Disassociate user context
137  * @context: ib user context
138  */
139 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
140 {
141 }
142 
143 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
144 			     struct vm_area_struct *vma)
145 {
146 	u64 pfn;
147 
148 	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
149 		return -EINVAL;
150 
151 	vma->vm_private_data = ucontext;
152 	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
153 	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
154 
155 	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
156 				 pgprot_noncached(vma->vm_page_prot), NULL);
157 }
158 
159 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
160 {
161 	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
162 
163 	kfree(entry);
164 }
165 
166 static struct rdma_user_mmap_entry*
167 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
168 			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
169 {
170 	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
171 	int ret;
172 
173 	if (!entry)
174 		return NULL;
175 
176 	entry->bar_offset = bar_offset;
177 	entry->mmap_flag = mmap_flag;
178 
179 	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
180 					  &entry->rdma_entry, PAGE_SIZE);
181 	if (ret) {
182 		kfree(entry);
183 		return NULL;
184 	}
185 	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
186 
187 	return &entry->rdma_entry;
188 }
189 
190 /**
191  * irdma_mmap - user memory map
192  * @context: context created during alloc
193  * @vma: kernel info for user memory map
194  */
195 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
196 {
197 	struct rdma_user_mmap_entry *rdma_entry;
198 	struct irdma_user_mmap_entry *entry;
199 	struct irdma_ucontext *ucontext;
200 	u64 pfn;
201 	int ret;
202 
203 	ucontext = to_ucontext(context);
204 
205 	/* Legacy support for libi40iw with hard-coded mmap key */
206 	if (ucontext->legacy_mode)
207 		return irdma_mmap_legacy(ucontext, vma);
208 
209 	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
210 	if (!rdma_entry) {
211 		ibdev_dbg(&ucontext->iwdev->ibdev,
212 			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
213 			  vma->vm_pgoff);
214 		return -EINVAL;
215 	}
216 
217 	entry = to_irdma_mmap_entry(rdma_entry);
218 	ibdev_dbg(&ucontext->iwdev->ibdev,
219 		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
220 		  entry->bar_offset, entry->mmap_flag);
221 
222 	pfn = (entry->bar_offset +
223 	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
224 
225 	switch (entry->mmap_flag) {
226 	case IRDMA_MMAP_IO_NC:
227 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
228 					pgprot_noncached(vma->vm_page_prot),
229 					rdma_entry);
230 		break;
231 	case IRDMA_MMAP_IO_WC:
232 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
233 					pgprot_writecombine(vma->vm_page_prot),
234 					rdma_entry);
235 		break;
236 	default:
237 		ret = -EINVAL;
238 	}
239 
240 	if (ret)
241 		ibdev_dbg(&ucontext->iwdev->ibdev,
242 			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
243 			  entry->bar_offset, entry->mmap_flag, ret);
244 	rdma_user_mmap_entry_put(rdma_entry);
245 
246 	return ret;
247 }
248 
249 /**
250  * irdma_alloc_push_page - allocate a push page for qp
251  * @iwqp: qp pointer
252  */
253 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
254 {
255 	struct irdma_cqp_request *cqp_request;
256 	struct cqp_cmds_info *cqp_info;
257 	struct irdma_device *iwdev = iwqp->iwdev;
258 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
259 	enum irdma_status_code status;
260 
261 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
262 	if (!cqp_request)
263 		return;
264 
265 	cqp_info = &cqp_request->info;
266 	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
267 	cqp_info->post_sq = 1;
268 	cqp_info->in.u.manage_push_page.info.push_idx = 0;
269 	cqp_info->in.u.manage_push_page.info.qs_handle =
270 		qp->vsi->qos[qp->user_pri].qs_handle;
271 	cqp_info->in.u.manage_push_page.info.free_page = 0;
272 	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
273 	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
274 	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
275 
276 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
277 	if (!status && cqp_request->compl_info.op_ret_val <
278 	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
279 		qp->push_idx = cqp_request->compl_info.op_ret_val;
280 		qp->push_offset = 0;
281 	}
282 
283 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
284 }
285 
286 /**
287  * irdma_alloc_ucontext - Allocate the user context data structure
288  * @uctx: uverbs context pointer
289  * @udata: user data
290  *
291  * This keeps track of all objects associated with a particular
292  * user-mode client.
293  */
294 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
295 				struct ib_udata *udata)
296 {
297 	struct ib_device *ibdev = uctx->device;
298 	struct irdma_device *iwdev = to_iwdev(ibdev);
299 	struct irdma_alloc_ucontext_req req;
300 	struct irdma_alloc_ucontext_resp uresp = {};
301 	struct irdma_ucontext *ucontext = to_ucontext(uctx);
302 	struct irdma_uk_attrs *uk_attrs;
303 
304 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
305 		return -EINVAL;
306 
307 	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
308 		goto ver_error;
309 
310 	ucontext->iwdev = iwdev;
311 	ucontext->abi_ver = req.userspace_ver;
312 
313 	uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
314 	/* GEN_1 legacy support with libi40iw */
315 	if (udata->outlen < sizeof(uresp)) {
316 		if (uk_attrs->hw_rev != IRDMA_GEN_1)
317 			return -EOPNOTSUPP;
318 
319 		ucontext->legacy_mode = true;
320 		uresp.max_qps = iwdev->rf->max_qp;
321 		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
322 		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
323 		uresp.kernel_ver = req.userspace_ver;
324 		if (ib_copy_to_udata(udata, &uresp,
325 				     min(sizeof(uresp), udata->outlen)))
326 			return -EFAULT;
327 	} else {
328 		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
329 
330 		ucontext->db_mmap_entry =
331 			irdma_user_mmap_entry_insert(ucontext, bar_off,
332 						     IRDMA_MMAP_IO_NC,
333 						     &uresp.db_mmap_key);
334 		if (!ucontext->db_mmap_entry)
335 			return -ENOMEM;
336 
337 		uresp.kernel_ver = IRDMA_ABI_VER;
338 		uresp.feature_flags = uk_attrs->feature_flags;
339 		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
340 		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
341 		uresp.max_hw_inline = uk_attrs->max_hw_inline;
342 		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
343 		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
344 		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
345 		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
346 		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
347 		uresp.hw_rev = uk_attrs->hw_rev;
348 		if (ib_copy_to_udata(udata, &uresp,
349 				     min(sizeof(uresp), udata->outlen))) {
350 			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
351 			return -EFAULT;
352 		}
353 	}
354 
355 	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
356 	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
357 	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
358 	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
359 
360 	return 0;
361 
362 ver_error:
363 	ibdev_err(&iwdev->ibdev,
364 		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
365 		  req.userspace_ver, IRDMA_ABI_VER);
366 	return -EINVAL;
367 }
368 
369 /**
370  * irdma_dealloc_ucontext - deallocate the user context data structure
371  * @context: user context created during alloc
372  */
373 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
374 {
375 	struct irdma_ucontext *ucontext = to_ucontext(context);
376 
377 	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
378 }
379 
380 /**
381  * irdma_alloc_pd - allocate protection domain
382  * @pd: PD pointer
383  * @udata: user data
384  */
385 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
386 {
387 	struct irdma_pd *iwpd = to_iwpd(pd);
388 	struct irdma_device *iwdev = to_iwdev(pd->device);
389 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
390 	struct irdma_pci_f *rf = iwdev->rf;
391 	struct irdma_alloc_pd_resp uresp = {};
392 	struct irdma_sc_pd *sc_pd;
393 	u32 pd_id = 0;
394 	int err;
395 
396 	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
397 			       &rf->next_pd);
398 	if (err)
399 		return err;
400 
401 	sc_pd = &iwpd->sc_pd;
402 	if (udata) {
403 		struct irdma_ucontext *ucontext =
404 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
405 						  ibucontext);
406 		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
407 		uresp.pd_id = pd_id;
408 		if (ib_copy_to_udata(udata, &uresp,
409 				     min(sizeof(uresp), udata->outlen))) {
410 			err = -EFAULT;
411 			goto error;
412 		}
413 	} else {
414 		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
415 	}
416 
417 	return 0;
418 error:
419 	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
420 
421 	return err;
422 }
423 
424 /**
425  * irdma_dealloc_pd - deallocate pd
426  * @ibpd: ptr of pd to be deallocated
427  * @udata: user data
428  */
429 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
430 {
431 	struct irdma_pd *iwpd = to_iwpd(ibpd);
432 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
433 
434 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
435 
436 	return 0;
437 }
438 
439 /**
440  * irdma_get_pbl - Retrieve pbl from a list given a virtual
441  * address
442  * @va: user virtual address
443  * @pbl_list: pbl list to search in (QP's or CQ's)
444  */
445 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
446 				       struct list_head *pbl_list)
447 {
448 	struct irdma_pbl *iwpbl;
449 
450 	list_for_each_entry (iwpbl, pbl_list, list) {
451 		if (iwpbl->user_base == va) {
452 			list_del(&iwpbl->list);
453 			iwpbl->on_list = false;
454 			return iwpbl;
455 		}
456 	}
457 
458 	return NULL;
459 }
460 
461 /**
462  * irdma_clean_cqes - clean cq entries for qp
463  * @iwqp: qp ptr (user or kernel)
464  * @iwcq: cq ptr
465  */
466 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
467 {
468 	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
469 	unsigned long flags;
470 
471 	spin_lock_irqsave(&iwcq->lock, flags);
472 	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
473 	spin_unlock_irqrestore(&iwcq->lock, flags);
474 }
475 
476 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
477 {
478 	if (iwqp->push_db_mmap_entry) {
479 		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
480 		iwqp->push_db_mmap_entry = NULL;
481 	}
482 	if (iwqp->push_wqe_mmap_entry) {
483 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
484 		iwqp->push_wqe_mmap_entry = NULL;
485 	}
486 }
487 
488 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
489 					 struct irdma_qp *iwqp,
490 					 u64 *push_wqe_mmap_key,
491 					 u64 *push_db_mmap_key)
492 {
493 	struct irdma_device *iwdev = ucontext->iwdev;
494 	u64 rsvd, bar_off;
495 
496 	rsvd = IRDMA_PF_BAR_RSVD;
497 	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
498 	/* skip over db page */
499 	bar_off += IRDMA_HW_PAGE_SIZE;
500 	/* push wqe page */
501 	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
502 	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
503 					bar_off, IRDMA_MMAP_IO_WC,
504 					push_wqe_mmap_key);
505 	if (!iwqp->push_wqe_mmap_entry)
506 		return -ENOMEM;
507 
508 	/* push doorbell page */
509 	bar_off += IRDMA_HW_PAGE_SIZE;
510 	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
511 					bar_off, IRDMA_MMAP_IO_NC,
512 					push_db_mmap_key);
513 	if (!iwqp->push_db_mmap_entry) {
514 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
515 		return -ENOMEM;
516 	}
517 
518 	return 0;
519 }
520 
521 /**
522  * irdma_destroy_qp - destroy qp
523  * @ibqp: qp's ib pointer also to get to device's qp address
524  * @udata: user data
525  */
526 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
527 {
528 	struct irdma_qp *iwqp = to_iwqp(ibqp);
529 	struct irdma_device *iwdev = iwqp->iwdev;
530 
531 	iwqp->sc_qp.qp_uk.destroy_pending = true;
532 
533 	if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS)
534 		irdma_modify_qp_to_err(&iwqp->sc_qp);
535 
536 	irdma_qp_rem_ref(&iwqp->ibqp);
537 	wait_for_completion(&iwqp->free_qp);
538 	irdma_free_lsmm_rsrc(iwqp);
539 	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
540 
541 	if (!iwqp->user_mode) {
542 		if (iwqp->iwscq) {
543 			irdma_clean_cqes(iwqp, iwqp->iwscq);
544 			if (iwqp->iwrcq != iwqp->iwscq)
545 				irdma_clean_cqes(iwqp, iwqp->iwrcq);
546 		}
547 	}
548 	irdma_remove_push_mmap_entries(iwqp);
549 	irdma_free_qp_rsrc(iwqp);
550 
551 	return 0;
552 }
553 
554 /**
555  * irdma_setup_virt_qp - setup for allocation of virtual qp
556  * @iwdev: irdma device
557  * @iwqp: qp ptr
558  * @init_info: initialize info to return
559  */
560 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
561 			       struct irdma_qp *iwqp,
562 			       struct irdma_qp_init_info *init_info)
563 {
564 	struct irdma_pbl *iwpbl = iwqp->iwpbl;
565 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
566 
567 	iwqp->page = qpmr->sq_page;
568 	init_info->shadow_area_pa = qpmr->shadow;
569 	if (iwpbl->pbl_allocated) {
570 		init_info->virtual_map = true;
571 		init_info->sq_pa = qpmr->sq_pbl.idx;
572 		init_info->rq_pa = qpmr->rq_pbl.idx;
573 	} else {
574 		init_info->sq_pa = qpmr->sq_pbl.addr;
575 		init_info->rq_pa = qpmr->rq_pbl.addr;
576 	}
577 }
578 
579 /**
580  * irdma_setup_kmode_qp - setup initialization for kernel mode qp
581  * @iwdev: iwarp device
582  * @iwqp: qp ptr (user or kernel)
583  * @info: initialize info to return
584  * @init_attr: Initial QP create attributes
585  */
586 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
587 				struct irdma_qp *iwqp,
588 				struct irdma_qp_init_info *info,
589 				struct ib_qp_init_attr *init_attr)
590 {
591 	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
592 	u32 sqdepth, rqdepth;
593 	u8 sqshift, rqshift;
594 	u32 size;
595 	enum irdma_status_code status;
596 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
597 	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
598 
599 	irdma_get_wqe_shift(uk_attrs,
600 		uk_attrs->hw_rev >= IRDMA_GEN_2 ? ukinfo->max_sq_frag_cnt + 1 :
601 						  ukinfo->max_sq_frag_cnt,
602 		ukinfo->max_inline_data, &sqshift);
603 	status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
604 				   &sqdepth);
605 	if (status)
606 		return -ENOMEM;
607 
608 	if (uk_attrs->hw_rev == IRDMA_GEN_1)
609 		rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
610 	else
611 		irdma_get_wqe_shift(uk_attrs, ukinfo->max_rq_frag_cnt, 0,
612 				    &rqshift);
613 
614 	status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
615 				   &rqdepth);
616 	if (status)
617 		return -ENOMEM;
618 
619 	iwqp->kqp.sq_wrid_mem =
620 		kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
621 	if (!iwqp->kqp.sq_wrid_mem)
622 		return -ENOMEM;
623 
624 	iwqp->kqp.rq_wrid_mem =
625 		kcalloc(rqdepth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
626 	if (!iwqp->kqp.rq_wrid_mem) {
627 		kfree(iwqp->kqp.sq_wrid_mem);
628 		iwqp->kqp.sq_wrid_mem = NULL;
629 		return -ENOMEM;
630 	}
631 
632 	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
633 	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
634 
635 	size = (sqdepth + rqdepth) * IRDMA_QP_WQE_MIN_SIZE;
636 	size += (IRDMA_SHADOW_AREA_SIZE << 3);
637 
638 	mem->size = ALIGN(size, 256);
639 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
640 				     &mem->pa, GFP_KERNEL);
641 	if (!mem->va) {
642 		kfree(iwqp->kqp.sq_wrid_mem);
643 		iwqp->kqp.sq_wrid_mem = NULL;
644 		kfree(iwqp->kqp.rq_wrid_mem);
645 		iwqp->kqp.rq_wrid_mem = NULL;
646 		return -ENOMEM;
647 	}
648 
649 	ukinfo->sq = mem->va;
650 	info->sq_pa = mem->pa;
651 	ukinfo->rq = &ukinfo->sq[sqdepth];
652 	info->rq_pa = info->sq_pa + (sqdepth * IRDMA_QP_WQE_MIN_SIZE);
653 	ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
654 	info->shadow_area_pa = info->rq_pa + (rqdepth * IRDMA_QP_WQE_MIN_SIZE);
655 	ukinfo->sq_size = sqdepth >> sqshift;
656 	ukinfo->rq_size = rqdepth >> rqshift;
657 	ukinfo->qp_id = iwqp->ibqp.qp_num;
658 
659 	init_attr->cap.max_send_wr = (sqdepth - IRDMA_SQ_RSVD) >> sqshift;
660 	init_attr->cap.max_recv_wr = (rqdepth - IRDMA_RQ_RSVD) >> rqshift;
661 
662 	return 0;
663 }
664 
665 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
666 {
667 	struct irdma_pci_f *rf = iwqp->iwdev->rf;
668 	struct irdma_cqp_request *cqp_request;
669 	struct cqp_cmds_info *cqp_info;
670 	struct irdma_create_qp_info *qp_info;
671 	enum irdma_status_code status;
672 
673 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
674 	if (!cqp_request)
675 		return -ENOMEM;
676 
677 	cqp_info = &cqp_request->info;
678 	qp_info = &cqp_request->info.in.u.qp_create.info;
679 	memset(qp_info, 0, sizeof(*qp_info));
680 	qp_info->mac_valid = true;
681 	qp_info->cq_num_valid = true;
682 	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
683 
684 	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
685 	cqp_info->post_sq = 1;
686 	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
687 	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
688 	status = irdma_handle_cqp_op(rf, cqp_request);
689 	irdma_put_cqp_request(&rf->cqp, cqp_request);
690 
691 	return status ? -ENOMEM : 0;
692 }
693 
694 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
695 					       struct irdma_qp_host_ctx_info *ctx_info)
696 {
697 	struct irdma_device *iwdev = iwqp->iwdev;
698 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
699 	struct irdma_roce_offload_info *roce_info;
700 	struct irdma_udp_offload_info *udp_info;
701 
702 	udp_info = &iwqp->udp_info;
703 	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
704 	udp_info->cwnd = iwdev->roce_cwnd;
705 	udp_info->rexmit_thresh = 2;
706 	udp_info->rnr_nak_thresh = 2;
707 	udp_info->src_port = 0xc000;
708 	udp_info->dst_port = ROCE_V2_UDP_DPORT;
709 	roce_info = &iwqp->roce_info;
710 	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
711 
712 	roce_info->rd_en = true;
713 	roce_info->wr_rdresp_en = true;
714 	roce_info->bind_en = true;
715 	roce_info->dcqcn_en = false;
716 	roce_info->rtomin = 5;
717 
718 	roce_info->ack_credits = iwdev->roce_ackcreds;
719 	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
720 	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
721 
722 	if (!iwqp->user_mode) {
723 		roce_info->priv_mode_en = true;
724 		roce_info->fast_reg_en = true;
725 		roce_info->udprivcq_en = true;
726 	}
727 	roce_info->roce_tver = 0;
728 
729 	ctx_info->roce_info = &iwqp->roce_info;
730 	ctx_info->udp_info = &iwqp->udp_info;
731 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
732 }
733 
734 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
735 					     struct irdma_qp_host_ctx_info *ctx_info)
736 {
737 	struct irdma_device *iwdev = iwqp->iwdev;
738 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
739 	struct irdma_iwarp_offload_info *iwarp_info;
740 
741 	iwarp_info = &iwqp->iwarp_info;
742 	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
743 	iwarp_info->rd_en = true;
744 	iwarp_info->wr_rdresp_en = true;
745 	iwarp_info->bind_en = true;
746 	iwarp_info->ecn_en = true;
747 	iwarp_info->rtomin = 5;
748 
749 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
750 		iwarp_info->ib_rd_en = true;
751 	if (!iwqp->user_mode) {
752 		iwarp_info->priv_mode_en = true;
753 		iwarp_info->fast_reg_en = true;
754 	}
755 	iwarp_info->ddp_ver = 1;
756 	iwarp_info->rdmap_ver = 1;
757 
758 	ctx_info->iwarp_info = &iwqp->iwarp_info;
759 	ctx_info->iwarp_info_valid = true;
760 	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
761 	ctx_info->iwarp_info_valid = false;
762 }
763 
764 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
765 				   struct irdma_device *iwdev)
766 {
767 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
768 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
769 
770 	if (init_attr->create_flags)
771 		return -EOPNOTSUPP;
772 
773 	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
774 	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
775 	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags)
776 		return -EINVAL;
777 
778 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
779 		if (init_attr->qp_type != IB_QPT_RC &&
780 		    init_attr->qp_type != IB_QPT_UD &&
781 		    init_attr->qp_type != IB_QPT_GSI)
782 			return -EOPNOTSUPP;
783 	} else {
784 		if (init_attr->qp_type != IB_QPT_RC)
785 			return -EOPNOTSUPP;
786 	}
787 
788 	return 0;
789 }
790 
791 /**
792  * irdma_create_qp - create qp
793  * @ibqp: ptr of qp
794  * @init_attr: attributes for qp
795  * @udata: user data for create qp
796  */
797 static int irdma_create_qp(struct ib_qp *ibqp,
798 			   struct ib_qp_init_attr *init_attr,
799 			   struct ib_udata *udata)
800 {
801 	struct ib_pd *ibpd = ibqp->pd;
802 	struct irdma_pd *iwpd = to_iwpd(ibpd);
803 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
804 	struct irdma_pci_f *rf = iwdev->rf;
805 	struct irdma_qp *iwqp = to_iwqp(ibqp);
806 	struct irdma_create_qp_req req;
807 	struct irdma_create_qp_resp uresp = {};
808 	u32 qp_num = 0;
809 	enum irdma_status_code ret;
810 	int err_code;
811 	int sq_size;
812 	int rq_size;
813 	struct irdma_sc_qp *qp;
814 	struct irdma_sc_dev *dev = &rf->sc_dev;
815 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
816 	struct irdma_qp_init_info init_info = {};
817 	struct irdma_qp_host_ctx_info *ctx_info;
818 	unsigned long flags;
819 
820 	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
821 	if (err_code)
822 		return err_code;
823 
824 	sq_size = init_attr->cap.max_send_wr;
825 	rq_size = init_attr->cap.max_recv_wr;
826 
827 	init_info.vsi = &iwdev->vsi;
828 	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
829 	init_info.qp_uk_init_info.sq_size = sq_size;
830 	init_info.qp_uk_init_info.rq_size = rq_size;
831 	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
832 	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
833 	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
834 
835 	qp = &iwqp->sc_qp;
836 	qp->qp_uk.back_qp = iwqp;
837 	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
838 
839 	iwqp->iwdev = iwdev;
840 	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
841 				      256);
842 	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
843 						 iwqp->q2_ctx_mem.size,
844 						 &iwqp->q2_ctx_mem.pa,
845 						 GFP_KERNEL);
846 	if (!iwqp->q2_ctx_mem.va)
847 		return -ENOMEM;
848 
849 	init_info.q2 = iwqp->q2_ctx_mem.va;
850 	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
851 	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
852 	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
853 
854 	if (init_attr->qp_type == IB_QPT_GSI)
855 		qp_num = 1;
856 	else
857 		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
858 					    &qp_num, &rf->next_qp);
859 	if (err_code)
860 		goto error;
861 
862 	iwqp->iwpd = iwpd;
863 	iwqp->ibqp.qp_num = qp_num;
864 	qp = &iwqp->sc_qp;
865 	iwqp->iwscq = to_iwcq(init_attr->send_cq);
866 	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
867 	iwqp->host_ctx.va = init_info.host_ctx;
868 	iwqp->host_ctx.pa = init_info.host_ctx_pa;
869 	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
870 
871 	init_info.pd = &iwpd->sc_pd;
872 	init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
873 	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
874 		init_info.qp_uk_init_info.first_sq_wq = 1;
875 	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
876 	init_waitqueue_head(&iwqp->waitq);
877 	init_waitqueue_head(&iwqp->mod_qp_waitq);
878 
879 	if (udata) {
880 		err_code = ib_copy_from_udata(&req, udata,
881 					      min(sizeof(req), udata->inlen));
882 		if (err_code) {
883 			ibdev_dbg(&iwdev->ibdev,
884 				  "VERBS: ib_copy_from_data fail\n");
885 			goto error;
886 		}
887 
888 		iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
889 		iwqp->user_mode = 1;
890 		if (req.user_wqe_bufs) {
891 			struct irdma_ucontext *ucontext =
892 				rdma_udata_to_drv_context(udata,
893 							  struct irdma_ucontext,
894 							  ibucontext);
895 
896 			init_info.qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
897 			spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
898 			iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
899 						    &ucontext->qp_reg_mem_list);
900 			spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
901 
902 			if (!iwqp->iwpbl) {
903 				err_code = -ENODATA;
904 				ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
905 				goto error;
906 			}
907 		}
908 		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
909 		irdma_setup_virt_qp(iwdev, iwqp, &init_info);
910 	} else {
911 		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
912 		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
913 	}
914 
915 	if (err_code) {
916 		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
917 		goto error;
918 	}
919 
920 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
921 		if (init_attr->qp_type == IB_QPT_RC) {
922 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
923 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
924 							    IRDMA_WRITE_WITH_IMM |
925 							    IRDMA_ROCE;
926 		} else {
927 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
928 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
929 							    IRDMA_ROCE;
930 		}
931 	} else {
932 		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
933 		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
934 	}
935 
936 	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
937 		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
938 
939 	ret = irdma_sc_qp_init(qp, &init_info);
940 	if (ret) {
941 		err_code = -EPROTO;
942 		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
943 		goto error;
944 	}
945 
946 	ctx_info = &iwqp->ctx_info;
947 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
948 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
949 
950 	if (rdma_protocol_roce(&iwdev->ibdev, 1))
951 		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
952 	else
953 		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
954 
955 	err_code = irdma_cqp_create_qp_cmd(iwqp);
956 	if (err_code)
957 		goto error;
958 
959 	refcount_set(&iwqp->refcnt, 1);
960 	spin_lock_init(&iwqp->lock);
961 	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
962 	iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
963 	rf->qp_table[qp_num] = iwqp;
964 	iwqp->max_send_wr = sq_size;
965 	iwqp->max_recv_wr = rq_size;
966 
967 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
968 		if (dev->ws_add(&iwdev->vsi, 0)) {
969 			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
970 			err_code = -EINVAL;
971 			goto error;
972 		}
973 
974 		irdma_qp_add_qos(&iwqp->sc_qp);
975 	}
976 
977 	if (udata) {
978 		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
979 		if (udata->outlen < sizeof(uresp)) {
980 			uresp.lsmm = 1;
981 			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
982 		} else {
983 			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
984 				uresp.lsmm = 1;
985 		}
986 		uresp.actual_sq_size = sq_size;
987 		uresp.actual_rq_size = rq_size;
988 		uresp.qp_id = qp_num;
989 		uresp.qp_caps = qp->qp_uk.qp_caps;
990 
991 		err_code = ib_copy_to_udata(udata, &uresp,
992 					    min(sizeof(uresp), udata->outlen));
993 		if (err_code) {
994 			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
995 			irdma_destroy_qp(&iwqp->ibqp, udata);
996 			return err_code;
997 		}
998 	}
999 
1000 	init_completion(&iwqp->free_qp);
1001 	return 0;
1002 
1003 error:
1004 	irdma_free_qp_rsrc(iwqp);
1005 	return err_code;
1006 }
1007 
1008 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1009 {
1010 	int acc_flags = 0;
1011 
1012 	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1013 		if (iwqp->roce_info.wr_rdresp_en) {
1014 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1015 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1016 		}
1017 		if (iwqp->roce_info.rd_en)
1018 			acc_flags |= IB_ACCESS_REMOTE_READ;
1019 		if (iwqp->roce_info.bind_en)
1020 			acc_flags |= IB_ACCESS_MW_BIND;
1021 	} else {
1022 		if (iwqp->iwarp_info.wr_rdresp_en) {
1023 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1024 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1025 		}
1026 		if (iwqp->iwarp_info.rd_en)
1027 			acc_flags |= IB_ACCESS_REMOTE_READ;
1028 		if (iwqp->iwarp_info.bind_en)
1029 			acc_flags |= IB_ACCESS_MW_BIND;
1030 	}
1031 	return acc_flags;
1032 }
1033 
1034 /**
1035  * irdma_query_qp - query qp attributes
1036  * @ibqp: qp pointer
1037  * @attr: attributes pointer
1038  * @attr_mask: Not used
1039  * @init_attr: qp attributes to return
1040  */
1041 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1042 			  int attr_mask, struct ib_qp_init_attr *init_attr)
1043 {
1044 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1045 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1046 
1047 	memset(attr, 0, sizeof(*attr));
1048 	memset(init_attr, 0, sizeof(*init_attr));
1049 
1050 	attr->qp_state = iwqp->ibqp_state;
1051 	attr->cur_qp_state = iwqp->ibqp_state;
1052 	attr->cap.max_send_wr = iwqp->max_send_wr;
1053 	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1054 	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1055 	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1056 	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1057 	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1058 	attr->port_num = 1;
1059 	if (rdma_protocol_roce(ibqp->device, 1)) {
1060 		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1061 		attr->qkey = iwqp->roce_info.qkey;
1062 		attr->rq_psn = iwqp->udp_info.epsn;
1063 		attr->sq_psn = iwqp->udp_info.psn_nxt;
1064 		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1065 		attr->pkey_index = iwqp->roce_info.p_key;
1066 		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1067 		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1068 		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1069 		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1070 	}
1071 
1072 	init_attr->event_handler = iwqp->ibqp.event_handler;
1073 	init_attr->qp_context = iwqp->ibqp.qp_context;
1074 	init_attr->send_cq = iwqp->ibqp.send_cq;
1075 	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1076 	init_attr->cap = attr->cap;
1077 
1078 	return 0;
1079 }
1080 
1081 /**
1082  * irdma_query_pkey - Query partition key
1083  * @ibdev: device pointer from stack
1084  * @port: port number
1085  * @index: index of pkey
1086  * @pkey: pointer to store the pkey
1087  */
1088 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1089 			    u16 *pkey)
1090 {
1091 	if (index >= IRDMA_PKEY_TBL_SZ)
1092 		return -EINVAL;
1093 
1094 	*pkey = IRDMA_DEFAULT_PKEY;
1095 	return 0;
1096 }
1097 
1098 /**
1099  * irdma_modify_qp_roce - modify qp request
1100  * @ibqp: qp's pointer for modify
1101  * @attr: access attributes
1102  * @attr_mask: state mask
1103  * @udata: user data
1104  */
1105 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1106 			 int attr_mask, struct ib_udata *udata)
1107 {
1108 	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1109 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1110 	struct irdma_device *iwdev = iwqp->iwdev;
1111 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1112 	struct irdma_qp_host_ctx_info *ctx_info;
1113 	struct irdma_roce_offload_info *roce_info;
1114 	struct irdma_udp_offload_info *udp_info;
1115 	struct irdma_modify_qp_info info = {};
1116 	struct irdma_modify_qp_resp uresp = {};
1117 	struct irdma_modify_qp_req ureq = {};
1118 	unsigned long flags;
1119 	u8 issue_modify_qp = 0;
1120 	int ret = 0;
1121 
1122 	ctx_info = &iwqp->ctx_info;
1123 	roce_info = &iwqp->roce_info;
1124 	udp_info = &iwqp->udp_info;
1125 
1126 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1127 		return -EOPNOTSUPP;
1128 
1129 	if (attr_mask & IB_QP_DEST_QPN)
1130 		roce_info->dest_qp = attr->dest_qp_num;
1131 
1132 	if (attr_mask & IB_QP_PKEY_INDEX) {
1133 		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1134 				       &roce_info->p_key);
1135 		if (ret)
1136 			return ret;
1137 	}
1138 
1139 	if (attr_mask & IB_QP_QKEY)
1140 		roce_info->qkey = attr->qkey;
1141 
1142 	if (attr_mask & IB_QP_PATH_MTU)
1143 		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1144 
1145 	if (attr_mask & IB_QP_SQ_PSN) {
1146 		udp_info->psn_nxt = attr->sq_psn;
1147 		udp_info->lsn =  0xffff;
1148 		udp_info->psn_una = attr->sq_psn;
1149 		udp_info->psn_max = attr->sq_psn;
1150 	}
1151 
1152 	if (attr_mask & IB_QP_RQ_PSN)
1153 		udp_info->epsn = attr->rq_psn;
1154 
1155 	if (attr_mask & IB_QP_RNR_RETRY)
1156 		udp_info->rnr_nak_thresh = attr->rnr_retry;
1157 
1158 	if (attr_mask & IB_QP_RETRY_CNT)
1159 		udp_info->rexmit_thresh = attr->retry_cnt;
1160 
1161 	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1162 
1163 	if (attr_mask & IB_QP_AV) {
1164 		struct irdma_av *av = &iwqp->roce_ah.av;
1165 		const struct ib_gid_attr *sgid_attr;
1166 		u16 vlan_id = VLAN_N_VID;
1167 		u32 local_ip[4];
1168 
1169 		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1170 		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1171 			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1172 			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1173 			udp_info->tos = attr->ah_attr.grh.traffic_class;
1174 			udp_info->src_port =
1175 				rdma_get_udp_sport(udp_info->flow_label,
1176 						   ibqp->qp_num,
1177 						   roce_info->dest_qp);
1178 			irdma_qp_rem_qos(&iwqp->sc_qp);
1179 			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1180 			ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1181 			iwqp->sc_qp.user_pri = ctx_info->user_pri;
1182 			if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1183 				return -ENOMEM;
1184 			irdma_qp_add_qos(&iwqp->sc_qp);
1185 		}
1186 		sgid_attr = attr->ah_attr.grh.sgid_attr;
1187 		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1188 					      ctx_info->roce_info->mac_addr);
1189 		if (ret)
1190 			return ret;
1191 
1192 		if (vlan_id >= VLAN_N_VID && iwdev->dcb)
1193 			vlan_id = 0;
1194 		if (vlan_id < VLAN_N_VID) {
1195 			udp_info->insert_vlan_tag = true;
1196 			udp_info->vlan_tag = vlan_id |
1197 				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1198 		} else {
1199 			udp_info->insert_vlan_tag = false;
1200 		}
1201 
1202 		av->attrs = attr->ah_attr;
1203 		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1204 		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1205 		if (av->sgid_addr.saddr.sa_family == AF_INET6) {
1206 			__be32 *daddr =
1207 				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1208 			__be32 *saddr =
1209 				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1210 
1211 			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1212 			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1213 
1214 			udp_info->ipv4 = false;
1215 			irdma_copy_ip_ntohl(local_ip, daddr);
1216 
1217 			udp_info->arp_idx = irdma_arp_table(iwdev->rf,
1218 							    &local_ip[0],
1219 							    false, NULL,
1220 							    IRDMA_ARP_RESOLVE);
1221 		} else {
1222 			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1223 			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1224 
1225 			local_ip[0] = ntohl(daddr);
1226 
1227 			udp_info->ipv4 = true;
1228 			udp_info->dest_ip_addr[0] = 0;
1229 			udp_info->dest_ip_addr[1] = 0;
1230 			udp_info->dest_ip_addr[2] = 0;
1231 			udp_info->dest_ip_addr[3] = local_ip[0];
1232 
1233 			udp_info->local_ipaddr[0] = 0;
1234 			udp_info->local_ipaddr[1] = 0;
1235 			udp_info->local_ipaddr[2] = 0;
1236 			udp_info->local_ipaddr[3] = ntohl(saddr);
1237 		}
1238 		udp_info->arp_idx =
1239 			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1240 				      attr->ah_attr.roce.dmac);
1241 	}
1242 
1243 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1244 		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1245 			ibdev_err(&iwdev->ibdev,
1246 				  "rd_atomic = %d, above max_hw_ord=%d\n",
1247 				  attr->max_rd_atomic,
1248 				  dev->hw_attrs.max_hw_ord);
1249 			return -EINVAL;
1250 		}
1251 		if (attr->max_rd_atomic)
1252 			roce_info->ord_size = attr->max_rd_atomic;
1253 		info.ord_valid = true;
1254 	}
1255 
1256 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1257 		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1258 			ibdev_err(&iwdev->ibdev,
1259 				  "rd_atomic = %d, above max_hw_ird=%d\n",
1260 				   attr->max_rd_atomic,
1261 				   dev->hw_attrs.max_hw_ird);
1262 			return -EINVAL;
1263 		}
1264 		if (attr->max_dest_rd_atomic)
1265 			roce_info->ird_size = attr->max_dest_rd_atomic;
1266 	}
1267 
1268 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1269 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1270 			roce_info->wr_rdresp_en = true;
1271 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1272 			roce_info->wr_rdresp_en = true;
1273 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1274 			roce_info->rd_en = true;
1275 	}
1276 
1277 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1278 
1279 	ibdev_dbg(&iwdev->ibdev,
1280 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1281 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1282 		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1283 
1284 	spin_lock_irqsave(&iwqp->lock, flags);
1285 	if (attr_mask & IB_QP_STATE) {
1286 		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1287 					iwqp->ibqp.qp_type, attr_mask)) {
1288 			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1289 				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1290 				   attr->qp_state);
1291 			ret = -EINVAL;
1292 			goto exit;
1293 		}
1294 		info.curr_iwarp_state = iwqp->iwarp_state;
1295 
1296 		switch (attr->qp_state) {
1297 		case IB_QPS_INIT:
1298 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1299 				ret = -EINVAL;
1300 				goto exit;
1301 			}
1302 
1303 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1304 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1305 				issue_modify_qp = 1;
1306 			}
1307 			break;
1308 		case IB_QPS_RTR:
1309 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1310 				ret = -EINVAL;
1311 				goto exit;
1312 			}
1313 			info.arp_cache_idx_valid = true;
1314 			info.cq_num_valid = true;
1315 			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1316 			issue_modify_qp = 1;
1317 			break;
1318 		case IB_QPS_RTS:
1319 			if (iwqp->ibqp_state < IB_QPS_RTR ||
1320 			    iwqp->ibqp_state == IB_QPS_ERR) {
1321 				ret = -EINVAL;
1322 				goto exit;
1323 			}
1324 
1325 			info.arp_cache_idx_valid = true;
1326 			info.cq_num_valid = true;
1327 			info.ord_valid = true;
1328 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1329 			issue_modify_qp = 1;
1330 			if (iwdev->push_mode && udata &&
1331 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1332 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1333 				spin_unlock_irqrestore(&iwqp->lock, flags);
1334 				irdma_alloc_push_page(iwqp);
1335 				spin_lock_irqsave(&iwqp->lock, flags);
1336 			}
1337 			break;
1338 		case IB_QPS_SQD:
1339 			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1340 				goto exit;
1341 
1342 			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1343 				ret = -EINVAL;
1344 				goto exit;
1345 			}
1346 
1347 			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1348 			issue_modify_qp = 1;
1349 			break;
1350 		case IB_QPS_SQE:
1351 		case IB_QPS_ERR:
1352 		case IB_QPS_RESET:
1353 			if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) {
1354 				spin_unlock_irqrestore(&iwqp->lock, flags);
1355 				info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1356 				irdma_hw_modify_qp(iwdev, iwqp, &info, true);
1357 				spin_lock_irqsave(&iwqp->lock, flags);
1358 			}
1359 
1360 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1361 				spin_unlock_irqrestore(&iwqp->lock, flags);
1362 				if (udata) {
1363 					if (ib_copy_from_udata(&ureq, udata,
1364 					    min(sizeof(ureq), udata->inlen)))
1365 						return -EINVAL;
1366 
1367 					irdma_flush_wqes(iwqp,
1368 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1369 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1370 					    IRDMA_REFLUSH);
1371 				}
1372 				return 0;
1373 			}
1374 
1375 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1376 			issue_modify_qp = 1;
1377 			break;
1378 		default:
1379 			ret = -EINVAL;
1380 			goto exit;
1381 		}
1382 
1383 		iwqp->ibqp_state = attr->qp_state;
1384 	}
1385 
1386 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1387 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1388 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1389 	spin_unlock_irqrestore(&iwqp->lock, flags);
1390 
1391 	if (attr_mask & IB_QP_STATE) {
1392 		if (issue_modify_qp) {
1393 			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1394 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1395 				return -EINVAL;
1396 			spin_lock_irqsave(&iwqp->lock, flags);
1397 			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1398 				iwqp->iwarp_state = info.next_iwarp_state;
1399 				iwqp->ibqp_state = attr->qp_state;
1400 			}
1401 			if (iwqp->ibqp_state > IB_QPS_RTS &&
1402 			    !iwqp->flush_issued) {
1403 				iwqp->flush_issued = 1;
1404 				spin_unlock_irqrestore(&iwqp->lock, flags);
1405 				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1406 						       IRDMA_FLUSH_RQ |
1407 						       IRDMA_FLUSH_WAIT);
1408 			} else {
1409 				spin_unlock_irqrestore(&iwqp->lock, flags);
1410 			}
1411 		} else {
1412 			iwqp->ibqp_state = attr->qp_state;
1413 		}
1414 		if (udata && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1415 			struct irdma_ucontext *ucontext;
1416 
1417 			ucontext = rdma_udata_to_drv_context(udata,
1418 					struct irdma_ucontext, ibucontext);
1419 			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1420 			    !iwqp->push_wqe_mmap_entry &&
1421 			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1422 				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1423 				uresp.push_valid = 1;
1424 				uresp.push_offset = iwqp->sc_qp.push_offset;
1425 			}
1426 			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1427 					       udata->outlen));
1428 			if (ret) {
1429 				irdma_remove_push_mmap_entries(iwqp);
1430 				ibdev_dbg(&iwdev->ibdev,
1431 					  "VERBS: copy_to_udata failed\n");
1432 				return ret;
1433 			}
1434 		}
1435 	}
1436 
1437 	return 0;
1438 exit:
1439 	spin_unlock_irqrestore(&iwqp->lock, flags);
1440 
1441 	return ret;
1442 }
1443 
1444 /**
1445  * irdma_modify_qp - modify qp request
1446  * @ibqp: qp's pointer for modify
1447  * @attr: access attributes
1448  * @attr_mask: state mask
1449  * @udata: user data
1450  */
1451 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1452 		    struct ib_udata *udata)
1453 {
1454 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1455 	struct irdma_device *iwdev = iwqp->iwdev;
1456 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1457 	struct irdma_qp_host_ctx_info *ctx_info;
1458 	struct irdma_tcp_offload_info *tcp_info;
1459 	struct irdma_iwarp_offload_info *offload_info;
1460 	struct irdma_modify_qp_info info = {};
1461 	struct irdma_modify_qp_resp uresp = {};
1462 	struct irdma_modify_qp_req ureq = {};
1463 	u8 issue_modify_qp = 0;
1464 	u8 dont_wait = 0;
1465 	int err;
1466 	unsigned long flags;
1467 
1468 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1469 		return -EOPNOTSUPP;
1470 
1471 	ctx_info = &iwqp->ctx_info;
1472 	offload_info = &iwqp->iwarp_info;
1473 	tcp_info = &iwqp->tcp_info;
1474 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1475 	ibdev_dbg(&iwdev->ibdev,
1476 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1477 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1478 		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1479 		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1480 
1481 	spin_lock_irqsave(&iwqp->lock, flags);
1482 	if (attr_mask & IB_QP_STATE) {
1483 		info.curr_iwarp_state = iwqp->iwarp_state;
1484 		switch (attr->qp_state) {
1485 		case IB_QPS_INIT:
1486 		case IB_QPS_RTR:
1487 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1488 				err = -EINVAL;
1489 				goto exit;
1490 			}
1491 
1492 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1493 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1494 				issue_modify_qp = 1;
1495 			}
1496 			if (iwdev->push_mode && udata &&
1497 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1498 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1499 				spin_unlock_irqrestore(&iwqp->lock, flags);
1500 				irdma_alloc_push_page(iwqp);
1501 				spin_lock_irqsave(&iwqp->lock, flags);
1502 			}
1503 			break;
1504 		case IB_QPS_RTS:
1505 			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1506 			    !iwqp->cm_id) {
1507 				err = -EINVAL;
1508 				goto exit;
1509 			}
1510 
1511 			issue_modify_qp = 1;
1512 			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1513 			iwqp->hte_added = 1;
1514 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1515 			info.tcp_ctx_valid = true;
1516 			info.ord_valid = true;
1517 			info.arp_cache_idx_valid = true;
1518 			info.cq_num_valid = true;
1519 			break;
1520 		case IB_QPS_SQD:
1521 			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1522 				err = 0;
1523 				goto exit;
1524 			}
1525 
1526 			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1527 			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1528 				err = 0;
1529 				goto exit;
1530 			}
1531 
1532 			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1533 				err = -EINVAL;
1534 				goto exit;
1535 			}
1536 
1537 			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1538 			issue_modify_qp = 1;
1539 			break;
1540 		case IB_QPS_SQE:
1541 			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1542 				err = -EINVAL;
1543 				goto exit;
1544 			}
1545 
1546 			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1547 			issue_modify_qp = 1;
1548 			break;
1549 		case IB_QPS_ERR:
1550 		case IB_QPS_RESET:
1551 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1552 				spin_unlock_irqrestore(&iwqp->lock, flags);
1553 				if (udata) {
1554 					if (ib_copy_from_udata(&ureq, udata,
1555 					    min(sizeof(ureq), udata->inlen)))
1556 						return -EINVAL;
1557 
1558 					irdma_flush_wqes(iwqp,
1559 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1560 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1561 					    IRDMA_REFLUSH);
1562 				}
1563 				return 0;
1564 			}
1565 
1566 			if (iwqp->sc_qp.term_flags) {
1567 				spin_unlock_irqrestore(&iwqp->lock, flags);
1568 				irdma_terminate_del_timer(&iwqp->sc_qp);
1569 				spin_lock_irqsave(&iwqp->lock, flags);
1570 			}
1571 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1572 			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1573 			    iwdev->iw_status &&
1574 			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1575 				info.reset_tcp_conn = true;
1576 			else
1577 				dont_wait = 1;
1578 
1579 			issue_modify_qp = 1;
1580 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1581 			break;
1582 		default:
1583 			err = -EINVAL;
1584 			goto exit;
1585 		}
1586 
1587 		iwqp->ibqp_state = attr->qp_state;
1588 	}
1589 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1590 		ctx_info->iwarp_info_valid = true;
1591 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1592 			offload_info->wr_rdresp_en = true;
1593 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1594 			offload_info->wr_rdresp_en = true;
1595 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1596 			offload_info->rd_en = true;
1597 	}
1598 
1599 	if (ctx_info->iwarp_info_valid) {
1600 		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1601 		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1602 		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1603 	}
1604 	spin_unlock_irqrestore(&iwqp->lock, flags);
1605 
1606 	if (attr_mask & IB_QP_STATE) {
1607 		if (issue_modify_qp) {
1608 			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1609 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1610 				return -EINVAL;
1611 		}
1612 
1613 		spin_lock_irqsave(&iwqp->lock, flags);
1614 		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1615 			iwqp->iwarp_state = info.next_iwarp_state;
1616 			iwqp->ibqp_state = attr->qp_state;
1617 		}
1618 		spin_unlock_irqrestore(&iwqp->lock, flags);
1619 	}
1620 
1621 	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1622 		if (dont_wait) {
1623 			if (iwqp->cm_id && iwqp->hw_tcp_state) {
1624 				spin_lock_irqsave(&iwqp->lock, flags);
1625 				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1626 				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1627 				spin_unlock_irqrestore(&iwqp->lock, flags);
1628 				irdma_cm_disconn(iwqp);
1629 			}
1630 		} else {
1631 			int close_timer_started;
1632 
1633 			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1634 
1635 			if (iwqp->cm_node) {
1636 				refcount_inc(&iwqp->cm_node->refcnt);
1637 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1638 				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1639 				if (iwqp->cm_id && close_timer_started == 1)
1640 					irdma_schedule_cm_timer(iwqp->cm_node,
1641 						(struct irdma_puda_buf *)iwqp,
1642 						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1643 
1644 				irdma_rem_ref_cm_node(iwqp->cm_node);
1645 			} else {
1646 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1647 			}
1648 		}
1649 	}
1650 	if (attr_mask & IB_QP_STATE && udata &&
1651 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1652 		struct irdma_ucontext *ucontext;
1653 
1654 		ucontext = rdma_udata_to_drv_context(udata,
1655 					struct irdma_ucontext, ibucontext);
1656 		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1657 		    !iwqp->push_wqe_mmap_entry &&
1658 		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1659 			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1660 			uresp.push_valid = 1;
1661 			uresp.push_offset = iwqp->sc_qp.push_offset;
1662 		}
1663 
1664 		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1665 				       udata->outlen));
1666 		if (err) {
1667 			irdma_remove_push_mmap_entries(iwqp);
1668 			ibdev_dbg(&iwdev->ibdev,
1669 				  "VERBS: copy_to_udata failed\n");
1670 			return err;
1671 		}
1672 	}
1673 
1674 	return 0;
1675 exit:
1676 	spin_unlock_irqrestore(&iwqp->lock, flags);
1677 
1678 	return err;
1679 }
1680 
1681 /**
1682  * irdma_cq_free_rsrc - free up resources for cq
1683  * @rf: RDMA PCI function
1684  * @iwcq: cq ptr
1685  */
1686 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1687 {
1688 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1689 
1690 	if (!iwcq->user_mode) {
1691 		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1692 				  iwcq->kmem.va, iwcq->kmem.pa);
1693 		iwcq->kmem.va = NULL;
1694 		dma_free_coherent(rf->sc_dev.hw->device,
1695 				  iwcq->kmem_shadow.size,
1696 				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1697 		iwcq->kmem_shadow.va = NULL;
1698 	}
1699 
1700 	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1701 }
1702 
1703 /**
1704  * irdma_free_cqbuf - worker to free a cq buffer
1705  * @work: provides access to the cq buffer to free
1706  */
1707 static void irdma_free_cqbuf(struct work_struct *work)
1708 {
1709 	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1710 
1711 	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1712 			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1713 	cq_buf->kmem_buf.va = NULL;
1714 	kfree(cq_buf);
1715 }
1716 
1717 /**
1718  * irdma_process_resize_list - remove resized cq buffers from the resize_list
1719  * @iwcq: cq which owns the resize_list
1720  * @iwdev: irdma device
1721  * @lcqe_buf: the buffer where the last cqe is received
1722  */
1723 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1724 				     struct irdma_device *iwdev,
1725 				     struct irdma_cq_buf *lcqe_buf)
1726 {
1727 	struct list_head *tmp_node, *list_node;
1728 	struct irdma_cq_buf *cq_buf;
1729 	int cnt = 0;
1730 
1731 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1732 		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1733 		if (cq_buf == lcqe_buf)
1734 			return cnt;
1735 
1736 		list_del(&cq_buf->list);
1737 		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1738 		cnt++;
1739 	}
1740 
1741 	return cnt;
1742 }
1743 
1744 /**
1745  * irdma_destroy_cq - destroy cq
1746  * @ib_cq: cq pointer
1747  * @udata: user data
1748  */
1749 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1750 {
1751 	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1752 	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1753 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1754 	struct irdma_sc_dev *dev = cq->dev;
1755 	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1756 	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1757 	unsigned long flags;
1758 
1759 	spin_lock_irqsave(&iwcq->lock, flags);
1760 	if (!list_empty(&iwcq->resize_list))
1761 		irdma_process_resize_list(iwcq, iwdev, NULL);
1762 	spin_unlock_irqrestore(&iwcq->lock, flags);
1763 
1764 	irdma_cq_wq_destroy(iwdev->rf, cq);
1765 	irdma_cq_free_rsrc(iwdev->rf, iwcq);
1766 
1767 	spin_lock_irqsave(&iwceq->ce_lock, flags);
1768 	irdma_sc_cleanup_ceqes(cq, ceq);
1769 	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
1770 
1771 	return 0;
1772 }
1773 
1774 /**
1775  * irdma_resize_cq - resize cq
1776  * @ibcq: cq to be resized
1777  * @entries: desired cq size
1778  * @udata: user data
1779  */
1780 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
1781 			   struct ib_udata *udata)
1782 {
1783 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1784 	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
1785 	struct irdma_cqp_request *cqp_request;
1786 	struct cqp_cmds_info *cqp_info;
1787 	struct irdma_modify_cq_info *m_info;
1788 	struct irdma_modify_cq_info info = {};
1789 	struct irdma_dma_mem kmem_buf;
1790 	struct irdma_cq_mr *cqmr_buf;
1791 	struct irdma_pbl *iwpbl_buf;
1792 	struct irdma_device *iwdev;
1793 	struct irdma_pci_f *rf;
1794 	struct irdma_cq_buf *cq_buf = NULL;
1795 	enum irdma_status_code status = 0;
1796 	unsigned long flags;
1797 	int ret;
1798 
1799 	iwdev = to_iwdev(ibcq->device);
1800 	rf = iwdev->rf;
1801 
1802 	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
1803 	    IRDMA_FEATURE_CQ_RESIZE))
1804 		return -EOPNOTSUPP;
1805 
1806 	if (entries > rf->max_cqe)
1807 		return -EINVAL;
1808 
1809 	if (!iwcq->user_mode) {
1810 		entries++;
1811 		if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1812 			entries *= 2;
1813 	}
1814 
1815 	info.cq_size = max(entries, 4);
1816 
1817 	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
1818 		return 0;
1819 
1820 	if (udata) {
1821 		struct irdma_resize_cq_req req = {};
1822 		struct irdma_ucontext *ucontext =
1823 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1824 						  ibucontext);
1825 
1826 		/* CQ resize not supported with legacy GEN_1 libi40iw */
1827 		if (ucontext->legacy_mode)
1828 			return -EOPNOTSUPP;
1829 
1830 		if (ib_copy_from_udata(&req, udata,
1831 				       min(sizeof(req), udata->inlen)))
1832 			return -EINVAL;
1833 
1834 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1835 		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
1836 					  &ucontext->cq_reg_mem_list);
1837 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1838 
1839 		if (!iwpbl_buf)
1840 			return -ENOMEM;
1841 
1842 		cqmr_buf = &iwpbl_buf->cq_mr;
1843 		if (iwpbl_buf->pbl_allocated) {
1844 			info.virtual_map = true;
1845 			info.pbl_chunk_size = 1;
1846 			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
1847 		} else {
1848 			info.cq_pa = cqmr_buf->cq_pbl.addr;
1849 		}
1850 	} else {
1851 		/* Kmode CQ resize */
1852 		int rsize;
1853 
1854 		rsize = info.cq_size * sizeof(struct irdma_cqe);
1855 		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
1856 		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
1857 						 kmem_buf.size, &kmem_buf.pa,
1858 						 GFP_KERNEL);
1859 		if (!kmem_buf.va)
1860 			return -ENOMEM;
1861 
1862 		info.cq_base = kmem_buf.va;
1863 		info.cq_pa = kmem_buf.pa;
1864 		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
1865 		if (!cq_buf) {
1866 			ret = -ENOMEM;
1867 			goto error;
1868 		}
1869 	}
1870 
1871 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1872 	if (!cqp_request) {
1873 		ret = -ENOMEM;
1874 		goto error;
1875 	}
1876 
1877 	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
1878 	info.cq_resize = true;
1879 
1880 	cqp_info = &cqp_request->info;
1881 	m_info = &cqp_info->in.u.cq_modify.info;
1882 	memcpy(m_info, &info, sizeof(*m_info));
1883 
1884 	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
1885 	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
1886 	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
1887 	cqp_info->post_sq = 1;
1888 	status = irdma_handle_cqp_op(rf, cqp_request);
1889 	irdma_put_cqp_request(&rf->cqp, cqp_request);
1890 	if (status) {
1891 		ret = -EPROTO;
1892 		goto error;
1893 	}
1894 
1895 	spin_lock_irqsave(&iwcq->lock, flags);
1896 	if (cq_buf) {
1897 		cq_buf->kmem_buf = iwcq->kmem;
1898 		cq_buf->hw = dev->hw;
1899 		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
1900 		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
1901 		list_add_tail(&cq_buf->list, &iwcq->resize_list);
1902 		iwcq->kmem = kmem_buf;
1903 	}
1904 
1905 	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
1906 	ibcq->cqe = info.cq_size - 1;
1907 	spin_unlock_irqrestore(&iwcq->lock, flags);
1908 
1909 	return 0;
1910 error:
1911 	if (!udata) {
1912 		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
1913 				  kmem_buf.pa);
1914 		kmem_buf.va = NULL;
1915 	}
1916 	kfree(cq_buf);
1917 
1918 	return ret;
1919 }
1920 
1921 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
1922 {
1923 	/* GEN1 does not support CQ create flags */
1924 	if (hw_rev == IRDMA_GEN_1)
1925 		return flags ? -EOPNOTSUPP : 0;
1926 
1927 	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
1928 }
1929 
1930 /**
1931  * irdma_create_cq - create cq
1932  * @ibcq: CQ allocated
1933  * @attr: attributes for cq
1934  * @udata: user data
1935  */
1936 static int irdma_create_cq(struct ib_cq *ibcq,
1937 			   const struct ib_cq_init_attr *attr,
1938 			   struct ib_udata *udata)
1939 {
1940 	struct ib_device *ibdev = ibcq->device;
1941 	struct irdma_device *iwdev = to_iwdev(ibdev);
1942 	struct irdma_pci_f *rf = iwdev->rf;
1943 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1944 	u32 cq_num = 0;
1945 	struct irdma_sc_cq *cq;
1946 	struct irdma_sc_dev *dev = &rf->sc_dev;
1947 	struct irdma_cq_init_info info = {};
1948 	enum irdma_status_code status;
1949 	struct irdma_cqp_request *cqp_request;
1950 	struct cqp_cmds_info *cqp_info;
1951 	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1952 	unsigned long flags;
1953 	int err_code;
1954 	int entries = attr->cqe;
1955 
1956 	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
1957 	if (err_code)
1958 		return err_code;
1959 	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
1960 				    &rf->next_cq);
1961 	if (err_code)
1962 		return err_code;
1963 
1964 	cq = &iwcq->sc_cq;
1965 	cq->back_cq = iwcq;
1966 	spin_lock_init(&iwcq->lock);
1967 	INIT_LIST_HEAD(&iwcq->resize_list);
1968 	info.dev = dev;
1969 	ukinfo->cq_size = max(entries, 4);
1970 	ukinfo->cq_id = cq_num;
1971 	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1972 	if (attr->comp_vector < rf->ceqs_count)
1973 		info.ceq_id = attr->comp_vector;
1974 	info.ceq_id_valid = true;
1975 	info.ceqe_mask = 1;
1976 	info.type = IRDMA_CQ_TYPE_IWARP;
1977 	info.vsi = &iwdev->vsi;
1978 
1979 	if (udata) {
1980 		struct irdma_ucontext *ucontext;
1981 		struct irdma_create_cq_req req = {};
1982 		struct irdma_cq_mr *cqmr;
1983 		struct irdma_pbl *iwpbl;
1984 		struct irdma_pbl *iwpbl_shadow;
1985 		struct irdma_cq_mr *cqmr_shadow;
1986 
1987 		iwcq->user_mode = true;
1988 		ucontext =
1989 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1990 						  ibucontext);
1991 		if (ib_copy_from_udata(&req, udata,
1992 				       min(sizeof(req), udata->inlen))) {
1993 			err_code = -EFAULT;
1994 			goto cq_free_rsrc;
1995 		}
1996 
1997 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1998 		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
1999 				      &ucontext->cq_reg_mem_list);
2000 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2001 		if (!iwpbl) {
2002 			err_code = -EPROTO;
2003 			goto cq_free_rsrc;
2004 		}
2005 
2006 		iwcq->iwpbl = iwpbl;
2007 		iwcq->cq_mem_size = 0;
2008 		cqmr = &iwpbl->cq_mr;
2009 
2010 		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2011 		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2012 			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2013 			iwpbl_shadow = irdma_get_pbl(
2014 					(unsigned long)req.user_shadow_area,
2015 					&ucontext->cq_reg_mem_list);
2016 			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2017 
2018 			if (!iwpbl_shadow) {
2019 				err_code = -EPROTO;
2020 				goto cq_free_rsrc;
2021 			}
2022 			iwcq->iwpbl_shadow = iwpbl_shadow;
2023 			cqmr_shadow = &iwpbl_shadow->cq_mr;
2024 			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2025 			cqmr->split = true;
2026 		} else {
2027 			info.shadow_area_pa = cqmr->shadow;
2028 		}
2029 		if (iwpbl->pbl_allocated) {
2030 			info.virtual_map = true;
2031 			info.pbl_chunk_size = 1;
2032 			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2033 		} else {
2034 			info.cq_base_pa = cqmr->cq_pbl.addr;
2035 		}
2036 	} else {
2037 		/* Kmode allocations */
2038 		int rsize;
2039 
2040 		if (entries < 1 || entries > rf->max_cqe) {
2041 			err_code = -EINVAL;
2042 			goto cq_free_rsrc;
2043 		}
2044 
2045 		entries++;
2046 		if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2047 			entries *= 2;
2048 		ukinfo->cq_size = entries;
2049 
2050 		rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2051 		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2052 		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2053 						   iwcq->kmem.size,
2054 						   &iwcq->kmem.pa, GFP_KERNEL);
2055 		if (!iwcq->kmem.va) {
2056 			err_code = -ENOMEM;
2057 			goto cq_free_rsrc;
2058 		}
2059 
2060 		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2061 					       64);
2062 		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2063 							  iwcq->kmem_shadow.size,
2064 							  &iwcq->kmem_shadow.pa,
2065 							  GFP_KERNEL);
2066 		if (!iwcq->kmem_shadow.va) {
2067 			err_code = -ENOMEM;
2068 			goto cq_free_rsrc;
2069 		}
2070 		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2071 		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2072 		ukinfo->cq_base = iwcq->kmem.va;
2073 		info.cq_base_pa = iwcq->kmem.pa;
2074 	}
2075 
2076 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2077 		info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2078 						 (u32)IRDMA_MAX_CQ_READ_THRESH);
2079 
2080 	if (irdma_sc_cq_init(cq, &info)) {
2081 		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2082 		err_code = -EPROTO;
2083 		goto cq_free_rsrc;
2084 	}
2085 
2086 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2087 	if (!cqp_request) {
2088 		err_code = -ENOMEM;
2089 		goto cq_free_rsrc;
2090 	}
2091 
2092 	cqp_info = &cqp_request->info;
2093 	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2094 	cqp_info->post_sq = 1;
2095 	cqp_info->in.u.cq_create.cq = cq;
2096 	cqp_info->in.u.cq_create.check_overflow = true;
2097 	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2098 	status = irdma_handle_cqp_op(rf, cqp_request);
2099 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2100 	if (status) {
2101 		err_code = -ENOMEM;
2102 		goto cq_free_rsrc;
2103 	}
2104 
2105 	if (udata) {
2106 		struct irdma_create_cq_resp resp = {};
2107 
2108 		resp.cq_id = info.cq_uk_init_info.cq_id;
2109 		resp.cq_size = info.cq_uk_init_info.cq_size;
2110 		if (ib_copy_to_udata(udata, &resp,
2111 				     min(sizeof(resp), udata->outlen))) {
2112 			ibdev_dbg(&iwdev->ibdev,
2113 				  "VERBS: copy to user data\n");
2114 			err_code = -EPROTO;
2115 			goto cq_destroy;
2116 		}
2117 	}
2118 	return 0;
2119 cq_destroy:
2120 	irdma_cq_wq_destroy(rf, cq);
2121 cq_free_rsrc:
2122 	irdma_cq_free_rsrc(rf, iwcq);
2123 
2124 	return err_code;
2125 }
2126 
2127 /**
2128  * irdma_get_mr_access - get hw MR access permissions from IB access flags
2129  * @access: IB access flags
2130  */
2131 static inline u16 irdma_get_mr_access(int access)
2132 {
2133 	u16 hw_access = 0;
2134 
2135 	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2136 		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2137 	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2138 		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2139 	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2140 		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2141 	hw_access |= (access & IB_ACCESS_MW_BIND) ?
2142 		     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2143 	hw_access |= (access & IB_ZERO_BASED) ?
2144 		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2145 	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2146 
2147 	return hw_access;
2148 }
2149 
2150 /**
2151  * irdma_free_stag - free stag resource
2152  * @iwdev: irdma device
2153  * @stag: stag to free
2154  */
2155 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2156 {
2157 	u32 stag_idx;
2158 
2159 	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2160 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2161 }
2162 
2163 /**
2164  * irdma_create_stag - create random stag
2165  * @iwdev: irdma device
2166  */
2167 static u32 irdma_create_stag(struct irdma_device *iwdev)
2168 {
2169 	u32 stag = 0;
2170 	u32 stag_index = 0;
2171 	u32 next_stag_index;
2172 	u32 driver_key;
2173 	u32 random;
2174 	u8 consumer_key;
2175 	int ret;
2176 
2177 	get_random_bytes(&random, sizeof(random));
2178 	consumer_key = (u8)random;
2179 
2180 	driver_key = random & ~iwdev->rf->mr_stagmask;
2181 	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2182 	next_stag_index %= iwdev->rf->max_mr;
2183 
2184 	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2185 			       iwdev->rf->max_mr, &stag_index,
2186 			       &next_stag_index);
2187 	if (ret)
2188 		return stag;
2189 	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2190 	stag |= driver_key;
2191 	stag += (u32)consumer_key;
2192 
2193 	return stag;
2194 }
2195 
2196 /**
2197  * irdma_next_pbl_addr - Get next pbl address
2198  * @pbl: pointer to a pble
2199  * @pinfo: info pointer
2200  * @idx: index
2201  */
2202 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2203 				       u32 *idx)
2204 {
2205 	*idx += 1;
2206 	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2207 		return ++pbl;
2208 	*idx = 0;
2209 	(*pinfo)++;
2210 
2211 	return (*pinfo)->addr;
2212 }
2213 
2214 /**
2215  * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2216  * @iwmr: iwmr for IB's user page addresses
2217  * @pbl: ple pointer to save 1 level or 0 level pble
2218  * @level: indicated level 0, 1 or 2
2219  */
2220 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2221 				    enum irdma_pble_level level)
2222 {
2223 	struct ib_umem *region = iwmr->region;
2224 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2225 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2226 	struct irdma_pble_info *pinfo;
2227 	struct ib_block_iter biter;
2228 	u32 idx = 0;
2229 	u32 pbl_cnt = 0;
2230 
2231 	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2232 
2233 	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2234 		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2235 
2236 	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2237 		*pbl = rdma_block_iter_dma_address(&biter);
2238 		if (++pbl_cnt == palloc->total_cnt)
2239 			break;
2240 		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2241 	}
2242 }
2243 
2244 /**
2245  * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2246  * @arr: lvl1 pbl array
2247  * @npages: page count
2248  * @pg_size: page size
2249  *
2250  */
2251 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2252 {
2253 	u32 pg_idx;
2254 
2255 	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2256 		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2257 			return false;
2258 	}
2259 
2260 	return true;
2261 }
2262 
2263 /**
2264  * irdma_check_mr_contiguous - check if MR is physically contiguous
2265  * @palloc: pbl allocation struct
2266  * @pg_size: page size
2267  */
2268 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2269 				      u32 pg_size)
2270 {
2271 	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2272 	struct irdma_pble_info *leaf = lvl2->leaf;
2273 	u64 *arr = NULL;
2274 	u64 *start_addr = NULL;
2275 	int i;
2276 	bool ret;
2277 
2278 	if (palloc->level == PBLE_LEVEL_1) {
2279 		arr = palloc->level1.addr;
2280 		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2281 						 pg_size);
2282 		return ret;
2283 	}
2284 
2285 	start_addr = leaf->addr;
2286 
2287 	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2288 		arr = leaf->addr;
2289 		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2290 			return false;
2291 		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2292 		if (!ret)
2293 			return false;
2294 	}
2295 
2296 	return true;
2297 }
2298 
2299 /**
2300  * irdma_setup_pbles - copy user pg address to pble's
2301  * @rf: RDMA PCI function
2302  * @iwmr: mr pointer for this memory registration
2303  * @use_pbles: flag if to use pble's
2304  */
2305 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2306 			     bool use_pbles)
2307 {
2308 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2309 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2310 	struct irdma_pble_info *pinfo;
2311 	u64 *pbl;
2312 	enum irdma_status_code status;
2313 	enum irdma_pble_level level = PBLE_LEVEL_1;
2314 
2315 	if (use_pbles) {
2316 		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2317 					false);
2318 		if (status)
2319 			return -ENOMEM;
2320 
2321 		iwpbl->pbl_allocated = true;
2322 		level = palloc->level;
2323 		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2324 						  palloc->level2.leaf;
2325 		pbl = pinfo->addr;
2326 	} else {
2327 		pbl = iwmr->pgaddrmem;
2328 	}
2329 
2330 	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2331 
2332 	if (use_pbles)
2333 		iwmr->pgaddrmem[0] = *pbl;
2334 
2335 	return 0;
2336 }
2337 
2338 /**
2339  * irdma_handle_q_mem - handle memory for qp and cq
2340  * @iwdev: irdma device
2341  * @req: information for q memory management
2342  * @iwpbl: pble struct
2343  * @use_pbles: flag to use pble
2344  */
2345 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2346 			      struct irdma_mem_reg_req *req,
2347 			      struct irdma_pbl *iwpbl, bool use_pbles)
2348 {
2349 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2350 	struct irdma_mr *iwmr = iwpbl->iwmr;
2351 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2352 	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2353 	struct irdma_hmc_pble *hmc_p;
2354 	u64 *arr = iwmr->pgaddrmem;
2355 	u32 pg_size, total;
2356 	int err = 0;
2357 	bool ret = true;
2358 
2359 	pg_size = iwmr->page_size;
2360 	err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles);
2361 	if (err)
2362 		return err;
2363 
2364 	if (use_pbles && palloc->level != PBLE_LEVEL_1) {
2365 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2366 		iwpbl->pbl_allocated = false;
2367 		return -ENOMEM;
2368 	}
2369 
2370 	if (use_pbles)
2371 		arr = palloc->level1.addr;
2372 
2373 	switch (iwmr->type) {
2374 	case IRDMA_MEMREG_TYPE_QP:
2375 		total = req->sq_pages + req->rq_pages;
2376 		hmc_p = &qpmr->sq_pbl;
2377 		qpmr->shadow = (dma_addr_t)arr[total];
2378 
2379 		if (use_pbles) {
2380 			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2381 							 pg_size);
2382 			if (ret)
2383 				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2384 								 req->rq_pages,
2385 								 pg_size);
2386 		}
2387 
2388 		if (!ret) {
2389 			hmc_p->idx = palloc->level1.idx;
2390 			hmc_p = &qpmr->rq_pbl;
2391 			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2392 		} else {
2393 			hmc_p->addr = arr[0];
2394 			hmc_p = &qpmr->rq_pbl;
2395 			hmc_p->addr = arr[req->sq_pages];
2396 		}
2397 		break;
2398 	case IRDMA_MEMREG_TYPE_CQ:
2399 		hmc_p = &cqmr->cq_pbl;
2400 
2401 		if (!cqmr->split)
2402 			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2403 
2404 		if (use_pbles)
2405 			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2406 							 pg_size);
2407 
2408 		if (!ret)
2409 			hmc_p->idx = palloc->level1.idx;
2410 		else
2411 			hmc_p->addr = arr[0];
2412 	break;
2413 	default:
2414 		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2415 		err = -EINVAL;
2416 	}
2417 
2418 	if (use_pbles && ret) {
2419 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2420 		iwpbl->pbl_allocated = false;
2421 	}
2422 
2423 	return err;
2424 }
2425 
2426 /**
2427  * irdma_hw_alloc_mw - create the hw memory window
2428  * @iwdev: irdma device
2429  * @iwmr: pointer to memory window info
2430  */
2431 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2432 {
2433 	struct irdma_mw_alloc_info *info;
2434 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2435 	struct irdma_cqp_request *cqp_request;
2436 	struct cqp_cmds_info *cqp_info;
2437 	enum irdma_status_code status;
2438 
2439 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2440 	if (!cqp_request)
2441 		return -ENOMEM;
2442 
2443 	cqp_info = &cqp_request->info;
2444 	info = &cqp_info->in.u.mw_alloc.info;
2445 	memset(info, 0, sizeof(*info));
2446 	if (iwmr->ibmw.type == IB_MW_TYPE_1)
2447 		info->mw_wide = true;
2448 
2449 	info->page_size = PAGE_SIZE;
2450 	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2451 	info->pd_id = iwpd->sc_pd.pd_id;
2452 	info->remote_access = true;
2453 	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
2454 	cqp_info->post_sq = 1;
2455 	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
2456 	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
2457 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2458 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2459 
2460 	return status ? -ENOMEM : 0;
2461 }
2462 
2463 /**
2464  * irdma_alloc_mw - Allocate memory window
2465  * @ibmw: Memory Window
2466  * @udata: user data pointer
2467  */
2468 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
2469 {
2470 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2471 	struct irdma_mr *iwmr = to_iwmw(ibmw);
2472 	int err_code;
2473 	u32 stag;
2474 
2475 	stag = irdma_create_stag(iwdev);
2476 	if (!stag)
2477 		return -ENOMEM;
2478 
2479 	iwmr->stag = stag;
2480 	ibmw->rkey = stag;
2481 
2482 	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
2483 	if (err_code) {
2484 		irdma_free_stag(iwdev, stag);
2485 		return err_code;
2486 	}
2487 
2488 	return 0;
2489 }
2490 
2491 /**
2492  * irdma_dealloc_mw - Dealloc memory window
2493  * @ibmw: memory window structure.
2494  */
2495 static int irdma_dealloc_mw(struct ib_mw *ibmw)
2496 {
2497 	struct ib_pd *ibpd = ibmw->pd;
2498 	struct irdma_pd *iwpd = to_iwpd(ibpd);
2499 	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
2500 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2501 	struct irdma_cqp_request *cqp_request;
2502 	struct cqp_cmds_info *cqp_info;
2503 	struct irdma_dealloc_stag_info *info;
2504 
2505 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2506 	if (!cqp_request)
2507 		return -ENOMEM;
2508 
2509 	cqp_info = &cqp_request->info;
2510 	info = &cqp_info->in.u.dealloc_stag.info;
2511 	memset(info, 0, sizeof(*info));
2512 	info->pd_id = iwpd->sc_pd.pd_id & 0x00007fff;
2513 	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
2514 	info->mr = false;
2515 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
2516 	cqp_info->post_sq = 1;
2517 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
2518 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2519 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
2520 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2521 	irdma_free_stag(iwdev, iwmr->stag);
2522 
2523 	return 0;
2524 }
2525 
2526 /**
2527  * irdma_hw_alloc_stag - cqp command to allocate stag
2528  * @iwdev: irdma device
2529  * @iwmr: irdma mr pointer
2530  */
2531 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
2532 			       struct irdma_mr *iwmr)
2533 {
2534 	struct irdma_allocate_stag_info *info;
2535 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2536 	enum irdma_status_code status;
2537 	int err = 0;
2538 	struct irdma_cqp_request *cqp_request;
2539 	struct cqp_cmds_info *cqp_info;
2540 
2541 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2542 	if (!cqp_request)
2543 		return -ENOMEM;
2544 
2545 	cqp_info = &cqp_request->info;
2546 	info = &cqp_info->in.u.alloc_stag.info;
2547 	memset(info, 0, sizeof(*info));
2548 	info->page_size = PAGE_SIZE;
2549 	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2550 	info->pd_id = iwpd->sc_pd.pd_id;
2551 	info->total_len = iwmr->len;
2552 	info->remote_access = true;
2553 	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
2554 	cqp_info->post_sq = 1;
2555 	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
2556 	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
2557 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2558 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2559 	if (status)
2560 		err = -ENOMEM;
2561 
2562 	return err;
2563 }
2564 
2565 /**
2566  * irdma_alloc_mr - register stag for fast memory registration
2567  * @pd: ibpd pointer
2568  * @mr_type: memory for stag registrion
2569  * @max_num_sg: man number of pages
2570  */
2571 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
2572 				    u32 max_num_sg)
2573 {
2574 	struct irdma_device *iwdev = to_iwdev(pd->device);
2575 	struct irdma_pble_alloc *palloc;
2576 	struct irdma_pbl *iwpbl;
2577 	struct irdma_mr *iwmr;
2578 	enum irdma_status_code status;
2579 	u32 stag;
2580 	int err_code = -ENOMEM;
2581 
2582 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2583 	if (!iwmr)
2584 		return ERR_PTR(-ENOMEM);
2585 
2586 	stag = irdma_create_stag(iwdev);
2587 	if (!stag) {
2588 		err_code = -ENOMEM;
2589 		goto err;
2590 	}
2591 
2592 	iwmr->stag = stag;
2593 	iwmr->ibmr.rkey = stag;
2594 	iwmr->ibmr.lkey = stag;
2595 	iwmr->ibmr.pd = pd;
2596 	iwmr->ibmr.device = pd->device;
2597 	iwpbl = &iwmr->iwpbl;
2598 	iwpbl->iwmr = iwmr;
2599 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2600 	palloc = &iwpbl->pble_alloc;
2601 	iwmr->page_cnt = max_num_sg;
2602 	status = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2603 				true);
2604 	if (status)
2605 		goto err_get_pble;
2606 
2607 	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
2608 	if (err_code)
2609 		goto err_alloc_stag;
2610 
2611 	iwpbl->pbl_allocated = true;
2612 
2613 	return &iwmr->ibmr;
2614 err_alloc_stag:
2615 	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2616 err_get_pble:
2617 	irdma_free_stag(iwdev, stag);
2618 err:
2619 	kfree(iwmr);
2620 
2621 	return ERR_PTR(err_code);
2622 }
2623 
2624 /**
2625  * irdma_set_page - populate pbl list for fmr
2626  * @ibmr: ib mem to access iwarp mr pointer
2627  * @addr: page dma address fro pbl list
2628  */
2629 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
2630 {
2631 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2632 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2633 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2634 	u64 *pbl;
2635 
2636 	if (unlikely(iwmr->npages == iwmr->page_cnt))
2637 		return -ENOMEM;
2638 
2639 	pbl = palloc->level1.addr;
2640 	pbl[iwmr->npages++] = addr;
2641 
2642 	return 0;
2643 }
2644 
2645 /**
2646  * irdma_map_mr_sg - map of sg list for fmr
2647  * @ibmr: ib mem to access iwarp mr pointer
2648  * @sg: scatter gather list
2649  * @sg_nents: number of sg pages
2650  * @sg_offset: scatter gather list for fmr
2651  */
2652 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
2653 			   int sg_nents, unsigned int *sg_offset)
2654 {
2655 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2656 
2657 	iwmr->npages = 0;
2658 
2659 	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
2660 }
2661 
2662 /**
2663  * irdma_hwreg_mr - send cqp command for memory registration
2664  * @iwdev: irdma device
2665  * @iwmr: irdma mr pointer
2666  * @access: access for MR
2667  */
2668 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
2669 			  u16 access)
2670 {
2671 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2672 	struct irdma_reg_ns_stag_info *stag_info;
2673 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2674 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2675 	enum irdma_status_code status;
2676 	int err = 0;
2677 	struct irdma_cqp_request *cqp_request;
2678 	struct cqp_cmds_info *cqp_info;
2679 
2680 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2681 	if (!cqp_request)
2682 		return -ENOMEM;
2683 
2684 	cqp_info = &cqp_request->info;
2685 	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
2686 	memset(stag_info, 0, sizeof(*stag_info));
2687 	stag_info->va = iwpbl->user_base;
2688 	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2689 	stag_info->stag_key = (u8)iwmr->stag;
2690 	stag_info->total_len = iwmr->len;
2691 	stag_info->access_rights = irdma_get_mr_access(access);
2692 	stag_info->pd_id = iwpd->sc_pd.pd_id;
2693 	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
2694 		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
2695 	else
2696 		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
2697 	stag_info->page_size = iwmr->page_size;
2698 
2699 	if (iwpbl->pbl_allocated) {
2700 		if (palloc->level == PBLE_LEVEL_1) {
2701 			stag_info->first_pm_pbl_index = palloc->level1.idx;
2702 			stag_info->chunk_size = 1;
2703 		} else {
2704 			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
2705 			stag_info->chunk_size = 3;
2706 		}
2707 	} else {
2708 		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
2709 	}
2710 
2711 	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
2712 	cqp_info->post_sq = 1;
2713 	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
2714 	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2715 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2716 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2717 	if (status)
2718 		err = -ENOMEM;
2719 
2720 	return err;
2721 }
2722 
2723 /**
2724  * irdma_reg_user_mr - Register a user memory region
2725  * @pd: ptr of pd
2726  * @start: virtual start address
2727  * @len: length of mr
2728  * @virt: virtual address
2729  * @access: access of mr
2730  * @udata: user data
2731  */
2732 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
2733 				       u64 virt, int access,
2734 				       struct ib_udata *udata)
2735 {
2736 	struct irdma_device *iwdev = to_iwdev(pd->device);
2737 	struct irdma_ucontext *ucontext;
2738 	struct irdma_pble_alloc *palloc;
2739 	struct irdma_pbl *iwpbl;
2740 	struct irdma_mr *iwmr;
2741 	struct ib_umem *region;
2742 	struct irdma_mem_reg_req req;
2743 	u32 total, stag = 0;
2744 	u8 shadow_pgcnt = 1;
2745 	bool use_pbles = false;
2746 	unsigned long flags;
2747 	int err = -EINVAL;
2748 	int ret;
2749 
2750 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2751 		return ERR_PTR(-EINVAL);
2752 
2753 	region = ib_umem_get(pd->device, start, len, access);
2754 
2755 	if (IS_ERR(region)) {
2756 		ibdev_dbg(&iwdev->ibdev,
2757 			  "VERBS: Failed to create ib_umem region\n");
2758 		return (struct ib_mr *)region;
2759 	}
2760 
2761 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
2762 		ib_umem_release(region);
2763 		return ERR_PTR(-EFAULT);
2764 	}
2765 
2766 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2767 	if (!iwmr) {
2768 		ib_umem_release(region);
2769 		return ERR_PTR(-ENOMEM);
2770 	}
2771 
2772 	iwpbl = &iwmr->iwpbl;
2773 	iwpbl->iwmr = iwmr;
2774 	iwmr->region = region;
2775 	iwmr->ibmr.pd = pd;
2776 	iwmr->ibmr.device = pd->device;
2777 	iwmr->ibmr.iova = virt;
2778 	iwmr->page_size = PAGE_SIZE;
2779 
2780 	if (req.reg_type == IRDMA_MEMREG_TYPE_MEM) {
2781 		iwmr->page_size = ib_umem_find_best_pgsz(region,
2782 							 SZ_4K | SZ_2M | SZ_1G,
2783 							 virt);
2784 		if (unlikely(!iwmr->page_size)) {
2785 			kfree(iwmr);
2786 			ib_umem_release(region);
2787 			return ERR_PTR(-EOPNOTSUPP);
2788 		}
2789 	}
2790 	iwmr->len = region->length;
2791 	iwpbl->user_base = virt;
2792 	palloc = &iwpbl->pble_alloc;
2793 	iwmr->type = req.reg_type;
2794 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
2795 
2796 	switch (req.reg_type) {
2797 	case IRDMA_MEMREG_TYPE_QP:
2798 		total = req.sq_pages + req.rq_pages + shadow_pgcnt;
2799 		if (total > iwmr->page_cnt) {
2800 			err = -EINVAL;
2801 			goto error;
2802 		}
2803 		total = req.sq_pages + req.rq_pages;
2804 		use_pbles = (total > 2);
2805 		err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2806 		if (err)
2807 			goto error;
2808 
2809 		ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2810 						     ibucontext);
2811 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2812 		list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
2813 		iwpbl->on_list = true;
2814 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2815 		break;
2816 	case IRDMA_MEMREG_TYPE_CQ:
2817 		if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
2818 			shadow_pgcnt = 0;
2819 		total = req.cq_pages + shadow_pgcnt;
2820 		if (total > iwmr->page_cnt) {
2821 			err = -EINVAL;
2822 			goto error;
2823 		}
2824 
2825 		use_pbles = (req.cq_pages > 1);
2826 		err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2827 		if (err)
2828 			goto error;
2829 
2830 		ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2831 						     ibucontext);
2832 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2833 		list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
2834 		iwpbl->on_list = true;
2835 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2836 		break;
2837 	case IRDMA_MEMREG_TYPE_MEM:
2838 		use_pbles = (iwmr->page_cnt != 1);
2839 
2840 		err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles);
2841 		if (err)
2842 			goto error;
2843 
2844 		if (use_pbles) {
2845 			ret = irdma_check_mr_contiguous(palloc,
2846 							iwmr->page_size);
2847 			if (ret) {
2848 				irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2849 				iwpbl->pbl_allocated = false;
2850 			}
2851 		}
2852 
2853 		stag = irdma_create_stag(iwdev);
2854 		if (!stag) {
2855 			err = -ENOMEM;
2856 			goto error;
2857 		}
2858 
2859 		iwmr->stag = stag;
2860 		iwmr->ibmr.rkey = stag;
2861 		iwmr->ibmr.lkey = stag;
2862 		err = irdma_hwreg_mr(iwdev, iwmr, access);
2863 		if (err) {
2864 			irdma_free_stag(iwdev, stag);
2865 			goto error;
2866 		}
2867 
2868 		break;
2869 	default:
2870 		goto error;
2871 	}
2872 
2873 	iwmr->type = req.reg_type;
2874 
2875 	return &iwmr->ibmr;
2876 
2877 error:
2878 	if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
2879 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2880 	ib_umem_release(region);
2881 	kfree(iwmr);
2882 
2883 	return ERR_PTR(err);
2884 }
2885 
2886 /**
2887  * irdma_reg_phys_mr - register kernel physical memory
2888  * @pd: ibpd pointer
2889  * @addr: physical address of memory to register
2890  * @size: size of memory to register
2891  * @access: Access rights
2892  * @iova_start: start of virtual address for physical buffers
2893  */
2894 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
2895 				u64 *iova_start)
2896 {
2897 	struct irdma_device *iwdev = to_iwdev(pd->device);
2898 	struct irdma_pbl *iwpbl;
2899 	struct irdma_mr *iwmr;
2900 	enum irdma_status_code status;
2901 	u32 stag;
2902 	int ret;
2903 
2904 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2905 	if (!iwmr)
2906 		return ERR_PTR(-ENOMEM);
2907 
2908 	iwmr->ibmr.pd = pd;
2909 	iwmr->ibmr.device = pd->device;
2910 	iwpbl = &iwmr->iwpbl;
2911 	iwpbl->iwmr = iwmr;
2912 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2913 	iwpbl->user_base = *iova_start;
2914 	stag = irdma_create_stag(iwdev);
2915 	if (!stag) {
2916 		ret = -ENOMEM;
2917 		goto err;
2918 	}
2919 
2920 	iwmr->stag = stag;
2921 	iwmr->ibmr.iova = *iova_start;
2922 	iwmr->ibmr.rkey = stag;
2923 	iwmr->ibmr.lkey = stag;
2924 	iwmr->page_cnt = 1;
2925 	iwmr->pgaddrmem[0] = addr;
2926 	iwmr->len = size;
2927 	iwmr->page_size = SZ_4K;
2928 	status = irdma_hwreg_mr(iwdev, iwmr, access);
2929 	if (status) {
2930 		irdma_free_stag(iwdev, stag);
2931 		ret = -ENOMEM;
2932 		goto err;
2933 	}
2934 
2935 	return &iwmr->ibmr;
2936 
2937 err:
2938 	kfree(iwmr);
2939 
2940 	return ERR_PTR(ret);
2941 }
2942 
2943 /**
2944  * irdma_get_dma_mr - register physical mem
2945  * @pd: ptr of pd
2946  * @acc: access for memory
2947  */
2948 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
2949 {
2950 	u64 kva = 0;
2951 
2952 	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
2953 }
2954 
2955 /**
2956  * irdma_del_memlist - Deleting pbl list entries for CQ/QP
2957  * @iwmr: iwmr for IB's user page addresses
2958  * @ucontext: ptr to user context
2959  */
2960 static void irdma_del_memlist(struct irdma_mr *iwmr,
2961 			      struct irdma_ucontext *ucontext)
2962 {
2963 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2964 	unsigned long flags;
2965 
2966 	switch (iwmr->type) {
2967 	case IRDMA_MEMREG_TYPE_CQ:
2968 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2969 		if (iwpbl->on_list) {
2970 			iwpbl->on_list = false;
2971 			list_del(&iwpbl->list);
2972 		}
2973 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2974 		break;
2975 	case IRDMA_MEMREG_TYPE_QP:
2976 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2977 		if (iwpbl->on_list) {
2978 			iwpbl->on_list = false;
2979 			list_del(&iwpbl->list);
2980 		}
2981 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2982 		break;
2983 	default:
2984 		break;
2985 	}
2986 }
2987 
2988 /**
2989  * irdma_dereg_mr - deregister mr
2990  * @ib_mr: mr ptr for dereg
2991  * @udata: user data
2992  */
2993 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
2994 {
2995 	struct ib_pd *ibpd = ib_mr->pd;
2996 	struct irdma_pd *iwpd = to_iwpd(ibpd);
2997 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
2998 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
2999 	struct irdma_dealloc_stag_info *info;
3000 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3001 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3002 	struct irdma_cqp_request *cqp_request;
3003 	struct cqp_cmds_info *cqp_info;
3004 
3005 	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3006 		if (iwmr->region) {
3007 			struct irdma_ucontext *ucontext;
3008 
3009 			ucontext = rdma_udata_to_drv_context(udata,
3010 						struct irdma_ucontext,
3011 						ibucontext);
3012 			irdma_del_memlist(iwmr, ucontext);
3013 		}
3014 		goto done;
3015 	}
3016 
3017 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3018 	if (!cqp_request)
3019 		return -ENOMEM;
3020 
3021 	cqp_info = &cqp_request->info;
3022 	info = &cqp_info->in.u.dealloc_stag.info;
3023 	memset(info, 0, sizeof(*info));
3024 	info->pd_id = iwpd->sc_pd.pd_id & 0x00007fff;
3025 	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3026 	info->mr = true;
3027 	if (iwpbl->pbl_allocated)
3028 		info->dealloc_pbl = true;
3029 
3030 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3031 	cqp_info->post_sq = 1;
3032 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3033 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3034 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
3035 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3036 	irdma_free_stag(iwdev, iwmr->stag);
3037 done:
3038 	if (iwpbl->pbl_allocated)
3039 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3040 	ib_umem_release(iwmr->region);
3041 	kfree(iwmr);
3042 
3043 	return 0;
3044 }
3045 
3046 /**
3047  * irdma_post_send -  kernel application wr
3048  * @ibqp: qp ptr for wr
3049  * @ib_wr: work request ptr
3050  * @bad_wr: return of bad wr if err
3051  */
3052 static int irdma_post_send(struct ib_qp *ibqp,
3053 			   const struct ib_send_wr *ib_wr,
3054 			   const struct ib_send_wr **bad_wr)
3055 {
3056 	struct irdma_qp *iwqp;
3057 	struct irdma_qp_uk *ukqp;
3058 	struct irdma_sc_dev *dev;
3059 	struct irdma_post_sq_info info;
3060 	enum irdma_status_code ret;
3061 	int err = 0;
3062 	unsigned long flags;
3063 	bool inv_stag;
3064 	struct irdma_ah *ah;
3065 	bool reflush = false;
3066 
3067 	iwqp = to_iwqp(ibqp);
3068 	ukqp = &iwqp->sc_qp.qp_uk;
3069 	dev = &iwqp->iwdev->rf->sc_dev;
3070 
3071 	spin_lock_irqsave(&iwqp->lock, flags);
3072 	if (iwqp->flush_issued && ukqp->sq_flush_complete)
3073 		reflush = true;
3074 	while (ib_wr) {
3075 		memset(&info, 0, sizeof(info));
3076 		inv_stag = false;
3077 		info.wr_id = (ib_wr->wr_id);
3078 		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3079 			info.signaled = true;
3080 		if (ib_wr->send_flags & IB_SEND_FENCE)
3081 			info.read_fence = true;
3082 		switch (ib_wr->opcode) {
3083 		case IB_WR_SEND_WITH_IMM:
3084 			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
3085 				info.imm_data_valid = true;
3086 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3087 			} else {
3088 				err = -EINVAL;
3089 				break;
3090 			}
3091 			fallthrough;
3092 		case IB_WR_SEND:
3093 		case IB_WR_SEND_WITH_INV:
3094 			if (ib_wr->opcode == IB_WR_SEND ||
3095 			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
3096 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3097 					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
3098 				else
3099 					info.op_type = IRDMA_OP_TYPE_SEND;
3100 			} else {
3101 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3102 					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
3103 				else
3104 					info.op_type = IRDMA_OP_TYPE_SEND_INV;
3105 				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
3106 			}
3107 
3108 			if (ib_wr->send_flags & IB_SEND_INLINE) {
3109 				info.op.inline_send.data = (void *)(unsigned long)
3110 							   ib_wr->sg_list[0].addr;
3111 				info.op.inline_send.len = ib_wr->sg_list[0].length;
3112 				if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3113 				    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3114 					ah = to_iwah(ud_wr(ib_wr)->ah);
3115 					info.op.inline_send.ah_id = ah->sc_ah.ah_info.ah_idx;
3116 					info.op.inline_send.qkey = ud_wr(ib_wr)->remote_qkey;
3117 					info.op.inline_send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3118 				}
3119 				ret = irdma_uk_inline_send(ukqp, &info, false);
3120 			} else {
3121 				info.op.send.num_sges = ib_wr->num_sge;
3122 				info.op.send.sg_list = ib_wr->sg_list;
3123 				if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3124 				    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3125 					ah = to_iwah(ud_wr(ib_wr)->ah);
3126 					info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
3127 					info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
3128 					info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3129 				}
3130 				ret = irdma_uk_send(ukqp, &info, false);
3131 			}
3132 
3133 			if (ret) {
3134 				if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3135 					err = -ENOMEM;
3136 				else
3137 					err = -EINVAL;
3138 			}
3139 			break;
3140 		case IB_WR_RDMA_WRITE_WITH_IMM:
3141 			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
3142 				info.imm_data_valid = true;
3143 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3144 			} else {
3145 				err = -EINVAL;
3146 				break;
3147 			}
3148 			fallthrough;
3149 		case IB_WR_RDMA_WRITE:
3150 			if (ib_wr->send_flags & IB_SEND_SOLICITED)
3151 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
3152 			else
3153 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
3154 
3155 			if (ib_wr->send_flags & IB_SEND_INLINE) {
3156 				info.op.inline_rdma_write.data = (void *)(uintptr_t)ib_wr->sg_list[0].addr;
3157 				info.op.inline_rdma_write.len =
3158 						ib_wr->sg_list[0].length;
3159 				info.op.inline_rdma_write.rem_addr.addr =
3160 						rdma_wr(ib_wr)->remote_addr;
3161 				info.op.inline_rdma_write.rem_addr.lkey =
3162 						rdma_wr(ib_wr)->rkey;
3163 				ret = irdma_uk_inline_rdma_write(ukqp, &info, false);
3164 			} else {
3165 				info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
3166 				info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
3167 				info.op.rdma_write.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
3168 				info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3169 				ret = irdma_uk_rdma_write(ukqp, &info, false);
3170 			}
3171 
3172 			if (ret) {
3173 				if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3174 					err = -ENOMEM;
3175 				else
3176 					err = -EINVAL;
3177 			}
3178 			break;
3179 		case IB_WR_RDMA_READ_WITH_INV:
3180 			inv_stag = true;
3181 			fallthrough;
3182 		case IB_WR_RDMA_READ:
3183 			if (ib_wr->num_sge >
3184 			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
3185 				err = -EINVAL;
3186 				break;
3187 			}
3188 			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
3189 			info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
3190 			info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3191 			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
3192 			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3193 
3194 			ret = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3195 			if (ret) {
3196 				if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3197 					err = -ENOMEM;
3198 				else
3199 					err = -EINVAL;
3200 			}
3201 			break;
3202 		case IB_WR_LOCAL_INV:
3203 			info.op_type = IRDMA_OP_TYPE_INV_STAG;
3204 			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3205 			ret = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3206 			if (ret)
3207 				err = -ENOMEM;
3208 			break;
3209 		case IB_WR_REG_MR: {
3210 			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
3211 			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
3212 			struct irdma_fast_reg_stag_info stag_info = {};
3213 
3214 			stag_info.signaled = info.signaled;
3215 			stag_info.read_fence = info.read_fence;
3216 			stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access);
3217 			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
3218 			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
3219 			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
3220 			stag_info.wr_id = ib_wr->wr_id;
3221 			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3222 			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
3223 			stag_info.total_len = iwmr->ibmr.length;
3224 			stag_info.reg_addr_pa = *palloc->level1.addr;
3225 			stag_info.first_pm_pbl_index = palloc->level1.idx;
3226 			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
3227 			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
3228 				stag_info.chunk_size = 1;
3229 			ret = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3230 							true);
3231 			if (ret)
3232 				err = -ENOMEM;
3233 			break;
3234 		}
3235 		default:
3236 			err = -EINVAL;
3237 			ibdev_dbg(&iwqp->iwdev->ibdev,
3238 				  "VERBS: upost_send bad opcode = 0x%x\n",
3239 				  ib_wr->opcode);
3240 			break;
3241 		}
3242 
3243 		if (err)
3244 			break;
3245 		ib_wr = ib_wr->next;
3246 	}
3247 
3248 	if (!iwqp->flush_issued && iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS) {
3249 		irdma_uk_qp_post_wr(ukqp);
3250 		spin_unlock_irqrestore(&iwqp->lock, flags);
3251 	} else if (reflush) {
3252 		ukqp->sq_flush_complete = false;
3253 		spin_unlock_irqrestore(&iwqp->lock, flags);
3254 		irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ | IRDMA_REFLUSH);
3255 	} else {
3256 		spin_unlock_irqrestore(&iwqp->lock, flags);
3257 	}
3258 	if (err)
3259 		*bad_wr = ib_wr;
3260 
3261 	return err;
3262 }
3263 
3264 /**
3265  * irdma_post_recv - post receive wr for kernel application
3266  * @ibqp: ib qp pointer
3267  * @ib_wr: work request for receive
3268  * @bad_wr: bad wr caused an error
3269  */
3270 static int irdma_post_recv(struct ib_qp *ibqp,
3271 			   const struct ib_recv_wr *ib_wr,
3272 			   const struct ib_recv_wr **bad_wr)
3273 {
3274 	struct irdma_qp *iwqp;
3275 	struct irdma_qp_uk *ukqp;
3276 	struct irdma_post_rq_info post_recv = {};
3277 	enum irdma_status_code ret = 0;
3278 	unsigned long flags;
3279 	int err = 0;
3280 	bool reflush = false;
3281 
3282 	iwqp = to_iwqp(ibqp);
3283 	ukqp = &iwqp->sc_qp.qp_uk;
3284 
3285 	spin_lock_irqsave(&iwqp->lock, flags);
3286 	if (iwqp->flush_issued && ukqp->rq_flush_complete)
3287 		reflush = true;
3288 	while (ib_wr) {
3289 		post_recv.num_sges = ib_wr->num_sge;
3290 		post_recv.wr_id = ib_wr->wr_id;
3291 		post_recv.sg_list = ib_wr->sg_list;
3292 		ret = irdma_uk_post_receive(ukqp, &post_recv);
3293 		if (ret) {
3294 			ibdev_dbg(&iwqp->iwdev->ibdev,
3295 				  "VERBS: post_recv err %d\n", ret);
3296 			if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3297 				err = -ENOMEM;
3298 			else
3299 				err = -EINVAL;
3300 			goto out;
3301 		}
3302 
3303 		ib_wr = ib_wr->next;
3304 	}
3305 
3306 out:
3307 	if (reflush) {
3308 		ukqp->rq_flush_complete = false;
3309 		spin_unlock_irqrestore(&iwqp->lock, flags);
3310 		irdma_flush_wqes(iwqp, IRDMA_FLUSH_RQ | IRDMA_REFLUSH);
3311 	} else {
3312 		spin_unlock_irqrestore(&iwqp->lock, flags);
3313 	}
3314 
3315 	if (err)
3316 		*bad_wr = ib_wr;
3317 
3318 	return err;
3319 }
3320 
3321 /**
3322  * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
3323  * @opcode: iwarp flush code
3324  */
3325 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
3326 {
3327 	switch (opcode) {
3328 	case FLUSH_PROT_ERR:
3329 		return IB_WC_LOC_PROT_ERR;
3330 	case FLUSH_REM_ACCESS_ERR:
3331 		return IB_WC_REM_ACCESS_ERR;
3332 	case FLUSH_LOC_QP_OP_ERR:
3333 		return IB_WC_LOC_QP_OP_ERR;
3334 	case FLUSH_REM_OP_ERR:
3335 		return IB_WC_REM_OP_ERR;
3336 	case FLUSH_LOC_LEN_ERR:
3337 		return IB_WC_LOC_LEN_ERR;
3338 	case FLUSH_GENERAL_ERR:
3339 		return IB_WC_WR_FLUSH_ERR;
3340 	case FLUSH_RETRY_EXC_ERR:
3341 		return IB_WC_RETRY_EXC_ERR;
3342 	case FLUSH_MW_BIND_ERR:
3343 		return IB_WC_MW_BIND_ERR;
3344 	case FLUSH_FATAL_ERR:
3345 	default:
3346 		return IB_WC_FATAL_ERR;
3347 	}
3348 }
3349 
3350 /**
3351  * irdma_process_cqe - process cqe info
3352  * @entry: processed cqe
3353  * @cq_poll_info: cqe info
3354  */
3355 static void irdma_process_cqe(struct ib_wc *entry,
3356 			      struct irdma_cq_poll_info *cq_poll_info)
3357 {
3358 	struct irdma_qp *iwqp;
3359 	struct irdma_sc_qp *qp;
3360 
3361 	entry->wc_flags = 0;
3362 	entry->pkey_index = 0;
3363 	entry->wr_id = cq_poll_info->wr_id;
3364 
3365 	qp = cq_poll_info->qp_handle;
3366 	iwqp = qp->qp_uk.back_qp;
3367 	entry->qp = qp->qp_uk.back_qp;
3368 
3369 	if (cq_poll_info->error) {
3370 		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
3371 				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
3372 
3373 		entry->vendor_err = cq_poll_info->major_err << 16 |
3374 				    cq_poll_info->minor_err;
3375 	} else {
3376 		entry->status = IB_WC_SUCCESS;
3377 		if (cq_poll_info->imm_valid) {
3378 			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
3379 			entry->wc_flags |= IB_WC_WITH_IMM;
3380 		}
3381 		if (cq_poll_info->ud_smac_valid) {
3382 			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
3383 			entry->wc_flags |= IB_WC_WITH_SMAC;
3384 		}
3385 
3386 		if (cq_poll_info->ud_vlan_valid) {
3387 			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
3388 
3389 			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
3390 			if (vlan) {
3391 				entry->vlan_id = vlan;
3392 				entry->wc_flags |= IB_WC_WITH_VLAN;
3393 			}
3394 		} else {
3395 			entry->sl = 0;
3396 		}
3397 	}
3398 
3399 	switch (cq_poll_info->op_type) {
3400 	case IRDMA_OP_TYPE_RDMA_WRITE:
3401 	case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
3402 		entry->opcode = IB_WC_RDMA_WRITE;
3403 		break;
3404 	case IRDMA_OP_TYPE_RDMA_READ_INV_STAG:
3405 	case IRDMA_OP_TYPE_RDMA_READ:
3406 		entry->opcode = IB_WC_RDMA_READ;
3407 		break;
3408 	case IRDMA_OP_TYPE_SEND_INV:
3409 	case IRDMA_OP_TYPE_SEND_SOL:
3410 	case IRDMA_OP_TYPE_SEND_SOL_INV:
3411 	case IRDMA_OP_TYPE_SEND:
3412 		entry->opcode = IB_WC_SEND;
3413 		break;
3414 	case IRDMA_OP_TYPE_FAST_REG_NSMR:
3415 		entry->opcode = IB_WC_REG_MR;
3416 		break;
3417 	case IRDMA_OP_TYPE_INV_STAG:
3418 		entry->opcode = IB_WC_LOCAL_INV;
3419 		break;
3420 	case IRDMA_OP_TYPE_REC_IMM:
3421 	case IRDMA_OP_TYPE_REC:
3422 		entry->opcode = cq_poll_info->op_type == IRDMA_OP_TYPE_REC_IMM ?
3423 			IB_WC_RECV_RDMA_WITH_IMM : IB_WC_RECV;
3424 		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3425 		    cq_poll_info->stag_invalid_set) {
3426 			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
3427 			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
3428 		}
3429 		break;
3430 	default:
3431 		ibdev_err(&iwqp->iwdev->ibdev,
3432 			  "Invalid opcode = %d in CQE\n", cq_poll_info->op_type);
3433 		entry->status = IB_WC_GENERAL_ERR;
3434 		return;
3435 	}
3436 
3437 	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
3438 		entry->src_qp = cq_poll_info->ud_src_qpn;
3439 		entry->slid = 0;
3440 		entry->wc_flags |=
3441 			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
3442 		entry->network_hdr_type = cq_poll_info->ipv4 ?
3443 						  RDMA_NETWORK_IPV4 :
3444 						  RDMA_NETWORK_IPV6;
3445 	} else {
3446 		entry->src_qp = cq_poll_info->qp_id;
3447 	}
3448 
3449 	entry->byte_len = cq_poll_info->bytes_xfered;
3450 }
3451 
3452 /**
3453  * irdma_poll_one - poll one entry of the CQ
3454  * @ukcq: ukcq to poll
3455  * @cur_cqe: current CQE info to be filled in
3456  * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
3457  *
3458  * Returns the internal irdma device error code or 0 on success
3459  */
3460 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
3461 				 struct irdma_cq_poll_info *cur_cqe,
3462 				 struct ib_wc *entry)
3463 {
3464 	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
3465 
3466 	if (ret)
3467 		return ret;
3468 
3469 	irdma_process_cqe(entry, cur_cqe);
3470 
3471 	return 0;
3472 }
3473 
3474 /**
3475  * __irdma_poll_cq - poll cq for completion (kernel apps)
3476  * @iwcq: cq to poll
3477  * @num_entries: number of entries to poll
3478  * @entry: wr of a completed entry
3479  */
3480 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
3481 {
3482 	struct list_head *tmp_node, *list_node;
3483 	struct irdma_cq_buf *last_buf = NULL;
3484 	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
3485 	struct irdma_cq_buf *cq_buf;
3486 	enum irdma_status_code ret;
3487 	struct irdma_device *iwdev;
3488 	struct irdma_cq_uk *ukcq;
3489 	bool cq_new_cqe = false;
3490 	int resized_bufs = 0;
3491 	int npolled = 0;
3492 
3493 	iwdev = to_iwdev(iwcq->ibcq.device);
3494 	ukcq = &iwcq->sc_cq.cq_uk;
3495 
3496 	/* go through the list of previously resized CQ buffers */
3497 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
3498 		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
3499 		while (npolled < num_entries) {
3500 			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
3501 			if (!ret) {
3502 				++npolled;
3503 				cq_new_cqe = true;
3504 				continue;
3505 			}
3506 			if (ret == IRDMA_ERR_Q_EMPTY)
3507 				break;
3508 			 /* QP using the CQ is destroyed. Skip reporting this CQE */
3509 			if (ret == IRDMA_ERR_Q_DESTROYED) {
3510 				cq_new_cqe = true;
3511 				continue;
3512 			}
3513 			goto error;
3514 		}
3515 
3516 		/* save the resized CQ buffer which received the last cqe */
3517 		if (cq_new_cqe)
3518 			last_buf = cq_buf;
3519 		cq_new_cqe = false;
3520 	}
3521 
3522 	/* check the current CQ for new cqes */
3523 	while (npolled < num_entries) {
3524 		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
3525 		if (!ret) {
3526 			++npolled;
3527 			cq_new_cqe = true;
3528 			continue;
3529 		}
3530 
3531 		if (ret == IRDMA_ERR_Q_EMPTY)
3532 			break;
3533 		/* QP using the CQ is destroyed. Skip reporting this CQE */
3534 		if (ret == IRDMA_ERR_Q_DESTROYED) {
3535 			cq_new_cqe = true;
3536 			continue;
3537 		}
3538 		goto error;
3539 	}
3540 
3541 	if (cq_new_cqe)
3542 		/* all previous CQ resizes are complete */
3543 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
3544 	else if (last_buf)
3545 		/* only CQ resizes up to the last_buf are complete */
3546 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
3547 	if (resized_bufs)
3548 		/* report to the HW the number of complete CQ resizes */
3549 		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
3550 
3551 	return npolled;
3552 error:
3553 	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
3554 		  __func__, ret);
3555 
3556 	return -EINVAL;
3557 }
3558 
3559 /**
3560  * irdma_poll_cq - poll cq for completion (kernel apps)
3561  * @ibcq: cq to poll
3562  * @num_entries: number of entries to poll
3563  * @entry: wr of a completed entry
3564  */
3565 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
3566 			 struct ib_wc *entry)
3567 {
3568 	struct irdma_cq *iwcq;
3569 	unsigned long flags;
3570 	int ret;
3571 
3572 	iwcq = to_iwcq(ibcq);
3573 
3574 	spin_lock_irqsave(&iwcq->lock, flags);
3575 	ret = __irdma_poll_cq(iwcq, num_entries, entry);
3576 	spin_unlock_irqrestore(&iwcq->lock, flags);
3577 
3578 	return ret;
3579 }
3580 
3581 /**
3582  * irdma_req_notify_cq - arm cq kernel application
3583  * @ibcq: cq to arm
3584  * @notify_flags: notofication flags
3585  */
3586 static int irdma_req_notify_cq(struct ib_cq *ibcq,
3587 			       enum ib_cq_notify_flags notify_flags)
3588 {
3589 	struct irdma_cq *iwcq;
3590 	struct irdma_cq_uk *ukcq;
3591 	unsigned long flags;
3592 	enum irdma_cmpl_notify cq_notify;
3593 	bool promo_event = false;
3594 	int ret = 0;
3595 
3596 	cq_notify = notify_flags == IB_CQ_SOLICITED ?
3597 		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
3598 	iwcq = to_iwcq(ibcq);
3599 	ukcq = &iwcq->sc_cq.cq_uk;
3600 
3601 	spin_lock_irqsave(&iwcq->lock, flags);
3602 	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
3603 	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
3604 		promo_event = true;
3605 
3606 	if (!iwcq->armed || promo_event) {
3607 		iwcq->armed = true;
3608 		iwcq->last_notify = cq_notify;
3609 		irdma_uk_cq_request_notification(ukcq, cq_notify);
3610 	}
3611 
3612 	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) && !irdma_cq_empty(iwcq))
3613 		ret = 1;
3614 	spin_unlock_irqrestore(&iwcq->lock, flags);
3615 
3616 	return ret;
3617 }
3618 
3619 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
3620 				     struct ib_port_immutable *immutable)
3621 {
3622 	struct ib_port_attr attr;
3623 	int err;
3624 
3625 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
3626 	err = ib_query_port(ibdev, port_num, &attr);
3627 	if (err)
3628 		return err;
3629 
3630 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
3631 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
3632 	immutable->gid_tbl_len = attr.gid_tbl_len;
3633 
3634 	return 0;
3635 }
3636 
3637 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
3638 				   struct ib_port_immutable *immutable)
3639 {
3640 	struct ib_port_attr attr;
3641 	int err;
3642 
3643 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
3644 	err = ib_query_port(ibdev, port_num, &attr);
3645 	if (err)
3646 		return err;
3647 	immutable->gid_tbl_len = attr.gid_tbl_len;
3648 
3649 	return 0;
3650 }
3651 
3652 static const struct rdma_stat_desc irdma_hw_stat_descs[] = {
3653 	/* 32bit names */
3654 	[IRDMA_HW_STAT_INDEX_RXVLANERR].name = "rxVlanErrors",
3655 	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name = "ip4InDiscards",
3656 	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name = "ip4InTruncatedPkts",
3657 	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name = "ip4OutNoRoutes",
3658 	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name = "ip6InDiscards",
3659 	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name = "ip6InTruncatedPkts",
3660 	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name = "ip6OutNoRoutes",
3661 	[IRDMA_HW_STAT_INDEX_TCPRTXSEG].name = "tcpRetransSegs",
3662 	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name = "tcpInOptErrors",
3663 	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name = "tcpInProtoErrors",
3664 	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name = "cnpHandled",
3665 	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name = "cnpIgnored",
3666 	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name = "cnpSent",
3667 
3668 	/* 64bit names */
3669 	[IRDMA_HW_STAT_INDEX_IP4RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3670 		"ip4InOctets",
3671 	[IRDMA_HW_STAT_INDEX_IP4RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3672 		"ip4InPkts",
3673 	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3674 		"ip4InReasmRqd",
3675 	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3676 		"ip4InMcastOctets",
3677 	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3678 		"ip4InMcastPkts",
3679 	[IRDMA_HW_STAT_INDEX_IP4TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3680 		"ip4OutOctets",
3681 	[IRDMA_HW_STAT_INDEX_IP4TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3682 		"ip4OutPkts",
3683 	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3684 		"ip4OutSegRqd",
3685 	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3686 		"ip4OutMcastOctets",
3687 	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3688 		"ip4OutMcastPkts",
3689 	[IRDMA_HW_STAT_INDEX_IP6RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3690 		"ip6InOctets",
3691 	[IRDMA_HW_STAT_INDEX_IP6RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3692 		"ip6InPkts",
3693 	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3694 		"ip6InReasmRqd",
3695 	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3696 		"ip6InMcastOctets",
3697 	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3698 		"ip6InMcastPkts",
3699 	[IRDMA_HW_STAT_INDEX_IP6TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3700 		"ip6OutOctets",
3701 	[IRDMA_HW_STAT_INDEX_IP6TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3702 		"ip6OutPkts",
3703 	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3704 		"ip6OutSegRqd",
3705 	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3706 		"ip6OutMcastOctets",
3707 	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3708 		"ip6OutMcastPkts",
3709 	[IRDMA_HW_STAT_INDEX_TCPRXSEGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3710 		"tcpInSegs",
3711 	[IRDMA_HW_STAT_INDEX_TCPTXSEG + IRDMA_HW_STAT_INDEX_MAX_32].name =
3712 		"tcpOutSegs",
3713 	[IRDMA_HW_STAT_INDEX_RDMARXRDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3714 		"iwInRdmaReads",
3715 	[IRDMA_HW_STAT_INDEX_RDMARXSNDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3716 		"iwInRdmaSends",
3717 	[IRDMA_HW_STAT_INDEX_RDMARXWRS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3718 		"iwInRdmaWrites",
3719 	[IRDMA_HW_STAT_INDEX_RDMATXRDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3720 		"iwOutRdmaReads",
3721 	[IRDMA_HW_STAT_INDEX_RDMATXSNDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3722 		"iwOutRdmaSends",
3723 	[IRDMA_HW_STAT_INDEX_RDMATXWRS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3724 		"iwOutRdmaWrites",
3725 	[IRDMA_HW_STAT_INDEX_RDMAVBND + IRDMA_HW_STAT_INDEX_MAX_32].name =
3726 		"iwRdmaBnd",
3727 	[IRDMA_HW_STAT_INDEX_RDMAVINV + IRDMA_HW_STAT_INDEX_MAX_32].name =
3728 		"iwRdmaInv",
3729 	[IRDMA_HW_STAT_INDEX_UDPRXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3730 		"RxUDP",
3731 	[IRDMA_HW_STAT_INDEX_UDPTXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3732 		"TxUDP",
3733 	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS + IRDMA_HW_STAT_INDEX_MAX_32]
3734 		.name = "RxECNMrkd",
3735 };
3736 
3737 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
3738 {
3739 	struct irdma_device *iwdev = to_iwdev(dev);
3740 
3741 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
3742 		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
3743 		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
3744 }
3745 
3746 /**
3747  * irdma_alloc_hw_port_stats - Allocate a hw stats structure
3748  * @ibdev: device pointer from stack
3749  * @port_num: port number
3750  */
3751 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
3752 						       u32 port_num)
3753 {
3754 	int num_counters = IRDMA_HW_STAT_INDEX_MAX_32 +
3755 			   IRDMA_HW_STAT_INDEX_MAX_64;
3756 	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
3757 
3758 	BUILD_BUG_ON(ARRAY_SIZE(irdma_hw_stat_descs) !=
3759 		     (IRDMA_HW_STAT_INDEX_MAX_32 + IRDMA_HW_STAT_INDEX_MAX_64));
3760 
3761 	return rdma_alloc_hw_stats_struct(irdma_hw_stat_descs, num_counters,
3762 					  lifespan);
3763 }
3764 
3765 /**
3766  * irdma_get_hw_stats - Populates the rdma_hw_stats structure
3767  * @ibdev: device pointer from stack
3768  * @stats: stats pointer from stack
3769  * @port_num: port number
3770  * @index: which hw counter the stack is requesting we update
3771  */
3772 static int irdma_get_hw_stats(struct ib_device *ibdev,
3773 			      struct rdma_hw_stats *stats, u32 port_num,
3774 			      int index)
3775 {
3776 	struct irdma_device *iwdev = to_iwdev(ibdev);
3777 	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
3778 
3779 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
3780 		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
3781 	else
3782 		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
3783 
3784 	memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
3785 
3786 	return stats->num_counters;
3787 }
3788 
3789 /**
3790  * irdma_query_gid - Query port GID
3791  * @ibdev: device pointer from stack
3792  * @port: port number
3793  * @index: Entry index
3794  * @gid: Global ID
3795  */
3796 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
3797 			   union ib_gid *gid)
3798 {
3799 	struct irdma_device *iwdev = to_iwdev(ibdev);
3800 
3801 	memset(gid->raw, 0, sizeof(gid->raw));
3802 	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
3803 
3804 	return 0;
3805 }
3806 
3807 /**
3808  * mcast_list_add -  Add a new mcast item to list
3809  * @rf: RDMA PCI function
3810  * @new_elem: pointer to element to add
3811  */
3812 static void mcast_list_add(struct irdma_pci_f *rf,
3813 			   struct mc_table_list *new_elem)
3814 {
3815 	list_add(&new_elem->list, &rf->mc_qht_list.list);
3816 }
3817 
3818 /**
3819  * mcast_list_del - Remove an mcast item from list
3820  * @mc_qht_elem: pointer to mcast table list element
3821  */
3822 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
3823 {
3824 	if (mc_qht_elem)
3825 		list_del(&mc_qht_elem->list);
3826 }
3827 
3828 /**
3829  * mcast_list_lookup_ip - Search mcast list for address
3830  * @rf: RDMA PCI function
3831  * @ip_mcast: pointer to mcast IP address
3832  */
3833 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
3834 						  u32 *ip_mcast)
3835 {
3836 	struct mc_table_list *mc_qht_el;
3837 	struct list_head *pos, *q;
3838 
3839 	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
3840 		mc_qht_el = list_entry(pos, struct mc_table_list, list);
3841 		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
3842 			    sizeof(mc_qht_el->mc_info.dest_ip)))
3843 			return mc_qht_el;
3844 	}
3845 
3846 	return NULL;
3847 }
3848 
3849 /**
3850  * irdma_mcast_cqp_op - perform a mcast cqp operation
3851  * @iwdev: irdma device
3852  * @mc_grp_ctx: mcast group info
3853  * @op: operation
3854  *
3855  * returns error status
3856  */
3857 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
3858 			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
3859 {
3860 	struct cqp_cmds_info *cqp_info;
3861 	struct irdma_cqp_request *cqp_request;
3862 	enum irdma_status_code status;
3863 
3864 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3865 	if (!cqp_request)
3866 		return -ENOMEM;
3867 
3868 	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
3869 	cqp_info = &cqp_request->info;
3870 	cqp_info->cqp_cmd = op;
3871 	cqp_info->post_sq = 1;
3872 	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
3873 	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
3874 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3875 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3876 	if (status)
3877 		return -ENOMEM;
3878 
3879 	return 0;
3880 }
3881 
3882 /**
3883  * irdma_mcast_mac - Get the multicast MAC for an IP address
3884  * @ip_addr: IPv4 or IPv6 address
3885  * @mac: pointer to result MAC address
3886  * @ipv4: flag indicating IPv4 or IPv6
3887  *
3888  */
3889 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
3890 {
3891 	u8 *ip = (u8 *)ip_addr;
3892 
3893 	if (ipv4) {
3894 		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
3895 						0x00, 0x00};
3896 
3897 		mac4[3] = ip[2] & 0x7F;
3898 		mac4[4] = ip[1];
3899 		mac4[5] = ip[0];
3900 		ether_addr_copy(mac, mac4);
3901 	} else {
3902 		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
3903 						0x00, 0x00};
3904 
3905 		mac6[2] = ip[3];
3906 		mac6[3] = ip[2];
3907 		mac6[4] = ip[1];
3908 		mac6[5] = ip[0];
3909 		ether_addr_copy(mac, mac6);
3910 	}
3911 }
3912 
3913 /**
3914  * irdma_attach_mcast - attach a qp to a multicast group
3915  * @ibqp: ptr to qp
3916  * @ibgid: pointer to global ID
3917  * @lid: local ID
3918  *
3919  * returns error status
3920  */
3921 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
3922 {
3923 	struct irdma_qp *iwqp = to_iwqp(ibqp);
3924 	struct irdma_device *iwdev = iwqp->iwdev;
3925 	struct irdma_pci_f *rf = iwdev->rf;
3926 	struct mc_table_list *mc_qht_elem;
3927 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
3928 	unsigned long flags;
3929 	u32 ip_addr[4] = {};
3930 	u32 mgn;
3931 	u32 no_mgs;
3932 	int ret = 0;
3933 	bool ipv4;
3934 	u16 vlan_id;
3935 	union {
3936 		struct sockaddr saddr;
3937 		struct sockaddr_in saddr_in;
3938 		struct sockaddr_in6 saddr_in6;
3939 	} sgid_addr;
3940 	unsigned char dmac[ETH_ALEN];
3941 
3942 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
3943 
3944 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
3945 		irdma_copy_ip_ntohl(ip_addr,
3946 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
3947 		irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL);
3948 		ipv4 = false;
3949 		ibdev_dbg(&iwdev->ibdev,
3950 			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
3951 			  ip_addr);
3952 		irdma_mcast_mac(ip_addr, dmac, false);
3953 	} else {
3954 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
3955 		ipv4 = true;
3956 		vlan_id = irdma_get_vlan_ipv4(ip_addr);
3957 		irdma_mcast_mac(ip_addr, dmac, true);
3958 		ibdev_dbg(&iwdev->ibdev,
3959 			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
3960 			  ibqp->qp_num, ip_addr, dmac);
3961 	}
3962 
3963 	spin_lock_irqsave(&rf->qh_list_lock, flags);
3964 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
3965 	if (!mc_qht_elem) {
3966 		struct irdma_dma_mem *dma_mem_mc;
3967 
3968 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3969 		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
3970 		if (!mc_qht_elem)
3971 			return -ENOMEM;
3972 
3973 		mc_qht_elem->mc_info.ipv4_valid = ipv4;
3974 		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
3975 		       sizeof(mc_qht_elem->mc_info.dest_ip));
3976 		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
3977 				       &mgn, &rf->next_mcg);
3978 		if (ret) {
3979 			kfree(mc_qht_elem);
3980 			return -ENOMEM;
3981 		}
3982 
3983 		mc_qht_elem->mc_info.mgn = mgn;
3984 		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
3985 		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
3986 					 IRDMA_HW_PAGE_SIZE);
3987 		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
3988 						    dma_mem_mc->size,
3989 						    &dma_mem_mc->pa,
3990 						    GFP_KERNEL);
3991 		if (!dma_mem_mc->va) {
3992 			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
3993 			kfree(mc_qht_elem);
3994 			return -ENOMEM;
3995 		}
3996 
3997 		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
3998 		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
3999 		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4000 		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4001 		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4002 		if (vlan_id < VLAN_N_VID)
4003 			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4004 		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->vsi.fcn_id;
4005 		mc_qht_elem->mc_grp_ctx.qs_handle =
4006 			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4007 		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4008 
4009 		spin_lock_irqsave(&rf->qh_list_lock, flags);
4010 		mcast_list_add(rf, mc_qht_elem);
4011 	} else {
4012 		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4013 		    IRDMA_MAX_MGS_PER_CTX) {
4014 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4015 			return -ENOMEM;
4016 		}
4017 	}
4018 
4019 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4020 	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4021 	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4022 	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4023 
4024 	/* Only if there is a change do we need to modify or create */
4025 	if (!no_mgs) {
4026 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4027 					 IRDMA_OP_MC_CREATE);
4028 	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4029 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4030 					 IRDMA_OP_MC_MODIFY);
4031 	} else {
4032 		return 0;
4033 	}
4034 
4035 	if (ret)
4036 		goto error;
4037 
4038 	return 0;
4039 
4040 error:
4041 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4042 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4043 		mcast_list_del(mc_qht_elem);
4044 		dma_free_coherent(rf->hw.device,
4045 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4046 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4047 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4048 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4049 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4050 				mc_qht_elem->mc_grp_ctx.mg_id);
4051 		kfree(mc_qht_elem);
4052 	}
4053 
4054 	return ret;
4055 }
4056 
4057 /**
4058  * irdma_detach_mcast - detach a qp from a multicast group
4059  * @ibqp: ptr to qp
4060  * @ibgid: pointer to global ID
4061  * @lid: local ID
4062  *
4063  * returns error status
4064  */
4065 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4066 {
4067 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4068 	struct irdma_device *iwdev = iwqp->iwdev;
4069 	struct irdma_pci_f *rf = iwdev->rf;
4070 	u32 ip_addr[4] = {};
4071 	struct mc_table_list *mc_qht_elem;
4072 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4073 	int ret;
4074 	unsigned long flags;
4075 	union {
4076 		struct sockaddr saddr;
4077 		struct sockaddr_in saddr_in;
4078 		struct sockaddr_in6 saddr_in6;
4079 	} sgid_addr;
4080 
4081 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4082 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4083 		irdma_copy_ip_ntohl(ip_addr,
4084 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4085 	else
4086 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4087 
4088 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4089 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4090 	if (!mc_qht_elem) {
4091 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4092 		ibdev_dbg(&iwdev->ibdev,
4093 			  "VERBS: address not found MCG\n");
4094 		return 0;
4095 	}
4096 
4097 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4098 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4099 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4100 		mcast_list_del(mc_qht_elem);
4101 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4102 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4103 					 IRDMA_OP_MC_DESTROY);
4104 		if (ret) {
4105 			ibdev_dbg(&iwdev->ibdev,
4106 				  "VERBS: failed MC_DESTROY MCG\n");
4107 			spin_lock_irqsave(&rf->qh_list_lock, flags);
4108 			mcast_list_add(rf, mc_qht_elem);
4109 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4110 			return -EAGAIN;
4111 		}
4112 
4113 		dma_free_coherent(rf->hw.device,
4114 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4115 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4116 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4117 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4118 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4119 				mc_qht_elem->mc_grp_ctx.mg_id);
4120 		kfree(mc_qht_elem);
4121 	} else {
4122 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4123 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4124 					 IRDMA_OP_MC_MODIFY);
4125 		if (ret) {
4126 			ibdev_dbg(&iwdev->ibdev,
4127 				  "VERBS: failed Modify MCG\n");
4128 			return ret;
4129 		}
4130 	}
4131 
4132 	return 0;
4133 }
4134 
4135 /**
4136  * irdma_create_ah - create address handle
4137  * @ibah: address handle
4138  * @attr: address handle attributes
4139  * @udata: User data
4140  *
4141  * returns 0 on success, error otherwise
4142  */
4143 static int irdma_create_ah(struct ib_ah *ibah,
4144 			   struct rdma_ah_init_attr *attr,
4145 			   struct ib_udata *udata)
4146 {
4147 	struct irdma_pd *pd = to_iwpd(ibah->pd);
4148 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4149 	struct rdma_ah_attr *ah_attr = attr->ah_attr;
4150 	const struct ib_gid_attr *sgid_attr;
4151 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4152 	struct irdma_pci_f *rf = iwdev->rf;
4153 	struct irdma_sc_ah *sc_ah;
4154 	u32 ah_id = 0;
4155 	struct irdma_ah_info *ah_info;
4156 	struct irdma_create_ah_resp uresp;
4157 	union {
4158 		struct sockaddr saddr;
4159 		struct sockaddr_in saddr_in;
4160 		struct sockaddr_in6 saddr_in6;
4161 	} sgid_addr, dgid_addr;
4162 	int err;
4163 	u8 dmac[ETH_ALEN];
4164 
4165 	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah_id,
4166 			       &rf->next_ah);
4167 	if (err)
4168 		return err;
4169 
4170 	ah->pd = pd;
4171 	sc_ah = &ah->sc_ah;
4172 	sc_ah->ah_info.ah_idx = ah_id;
4173 	sc_ah->ah_info.vsi = &iwdev->vsi;
4174 	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
4175 	ah->sgid_index = ah_attr->grh.sgid_index;
4176 	sgid_attr = ah_attr->grh.sgid_attr;
4177 	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
4178 	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
4179 	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
4180 	ah->av.attrs = *ah_attr;
4181 	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4182 	ah->av.sgid_addr.saddr = sgid_addr.saddr;
4183 	ah->av.dgid_addr.saddr = dgid_addr.saddr;
4184 	ah_info = &sc_ah->ah_info;
4185 	ah_info->ah_idx = ah_id;
4186 	ah_info->pd_idx = pd->sc_pd.pd_id;
4187 	if (ah_attr->ah_flags & IB_AH_GRH) {
4188 		ah_info->flow_label = ah_attr->grh.flow_label;
4189 		ah_info->hop_ttl = ah_attr->grh.hop_limit;
4190 		ah_info->tc_tos = ah_attr->grh.traffic_class;
4191 	}
4192 
4193 	ether_addr_copy(dmac, ah_attr->roce.dmac);
4194 	if (rdma_gid_attr_network_type(sgid_attr) == RDMA_NETWORK_IPV4) {
4195 		ah_info->ipv4_valid = true;
4196 		ah_info->dest_ip_addr[0] =
4197 			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
4198 		ah_info->src_ip_addr[0] =
4199 			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4200 		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
4201 						     ah_info->dest_ip_addr[0]);
4202 		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
4203 			ah_info->do_lpbk = true;
4204 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
4205 		}
4206 	} else {
4207 		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
4208 				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4209 		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
4210 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4211 		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
4212 						     ah_info->dest_ip_addr);
4213 		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
4214 			ah_info->do_lpbk = true;
4215 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
4216 		}
4217 	}
4218 
4219 	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
4220 				      ah_info->mac_addr);
4221 	if (err)
4222 		goto error;
4223 
4224 	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
4225 					      ah_info->ipv4_valid, dmac);
4226 
4227 	if (ah_info->dst_arpindex == -1) {
4228 		err = -EINVAL;
4229 		goto error;
4230 	}
4231 
4232 	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb)
4233 		ah_info->vlan_tag = 0;
4234 
4235 	if (ah_info->vlan_tag < VLAN_N_VID) {
4236 		ah_info->insert_vlan_tag = true;
4237 		ah_info->vlan_tag |=
4238 			rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
4239 	}
4240 
4241 	err = irdma_ah_cqp_op(iwdev->rf, sc_ah, IRDMA_OP_AH_CREATE,
4242 			      attr->flags & RDMA_CREATE_AH_SLEEPABLE,
4243 			      irdma_gsi_ud_qp_ah_cb, sc_ah);
4244 
4245 	if (err) {
4246 		ibdev_dbg(&iwdev->ibdev,
4247 			  "VERBS: CQP-OP Create AH fail");
4248 		goto error;
4249 	}
4250 
4251 	if (!(attr->flags & RDMA_CREATE_AH_SLEEPABLE)) {
4252 		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4253 
4254 		do {
4255 			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4256 			mdelay(1);
4257 		} while (!sc_ah->ah_info.ah_valid && --cnt);
4258 
4259 		if (!cnt) {
4260 			ibdev_dbg(&iwdev->ibdev,
4261 				  "VERBS: CQP create AH timed out");
4262 			err = -ETIMEDOUT;
4263 			goto error;
4264 		}
4265 	}
4266 
4267 	if (udata) {
4268 		uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4269 		err = ib_copy_to_udata(udata, &uresp,
4270 				       min(sizeof(uresp), udata->outlen));
4271 	}
4272 	return 0;
4273 
4274 error:
4275 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah_id);
4276 
4277 	return err;
4278 }
4279 
4280 /**
4281  * irdma_destroy_ah - Destroy address handle
4282  * @ibah: pointer to address handle
4283  * @ah_flags: flags for sleepable
4284  */
4285 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
4286 {
4287 	struct irdma_device *iwdev = to_iwdev(ibah->device);
4288 	struct irdma_ah *ah = to_iwah(ibah);
4289 
4290 	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
4291 			false, NULL, ah);
4292 
4293 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
4294 			ah->sc_ah.ah_info.ah_idx);
4295 
4296 	return 0;
4297 }
4298 
4299 /**
4300  * irdma_query_ah - Query address handle
4301  * @ibah: pointer to address handle
4302  * @ah_attr: address handle attributes
4303  */
4304 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
4305 {
4306 	struct irdma_ah *ah = to_iwah(ibah);
4307 
4308 	memset(ah_attr, 0, sizeof(*ah_attr));
4309 	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
4310 		ah_attr->ah_flags = IB_AH_GRH;
4311 		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
4312 		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
4313 		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
4314 		ah_attr->grh.sgid_index = ah->sgid_index;
4315 		ah_attr->grh.sgid_index = ah->sgid_index;
4316 		memcpy(&ah_attr->grh.dgid, &ah->dgid,
4317 		       sizeof(ah_attr->grh.dgid));
4318 	}
4319 
4320 	return 0;
4321 }
4322 
4323 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
4324 						 u32 port_num)
4325 {
4326 	return IB_LINK_LAYER_ETHERNET;
4327 }
4328 
4329 static const struct ib_device_ops irdma_roce_dev_ops = {
4330 	.attach_mcast = irdma_attach_mcast,
4331 	.create_ah = irdma_create_ah,
4332 	.create_user_ah = irdma_create_ah,
4333 	.destroy_ah = irdma_destroy_ah,
4334 	.detach_mcast = irdma_detach_mcast,
4335 	.get_link_layer = irdma_get_link_layer,
4336 	.get_port_immutable = irdma_roce_port_immutable,
4337 	.modify_qp = irdma_modify_qp_roce,
4338 	.query_ah = irdma_query_ah,
4339 	.query_pkey = irdma_query_pkey,
4340 };
4341 
4342 static const struct ib_device_ops irdma_iw_dev_ops = {
4343 	.modify_qp = irdma_modify_qp,
4344 	.get_port_immutable = irdma_iw_port_immutable,
4345 	.query_gid = irdma_query_gid,
4346 };
4347 
4348 static const struct ib_device_ops irdma_dev_ops = {
4349 	.owner = THIS_MODULE,
4350 	.driver_id = RDMA_DRIVER_IRDMA,
4351 	.uverbs_abi_ver = IRDMA_ABI_VER,
4352 
4353 	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
4354 	.alloc_mr = irdma_alloc_mr,
4355 	.alloc_mw = irdma_alloc_mw,
4356 	.alloc_pd = irdma_alloc_pd,
4357 	.alloc_ucontext = irdma_alloc_ucontext,
4358 	.create_cq = irdma_create_cq,
4359 	.create_qp = irdma_create_qp,
4360 	.dealloc_driver = irdma_ib_dealloc_device,
4361 	.dealloc_mw = irdma_dealloc_mw,
4362 	.dealloc_pd = irdma_dealloc_pd,
4363 	.dealloc_ucontext = irdma_dealloc_ucontext,
4364 	.dereg_mr = irdma_dereg_mr,
4365 	.destroy_cq = irdma_destroy_cq,
4366 	.destroy_qp = irdma_destroy_qp,
4367 	.disassociate_ucontext = irdma_disassociate_ucontext,
4368 	.get_dev_fw_str = irdma_get_dev_fw_str,
4369 	.get_dma_mr = irdma_get_dma_mr,
4370 	.get_hw_stats = irdma_get_hw_stats,
4371 	.map_mr_sg = irdma_map_mr_sg,
4372 	.mmap = irdma_mmap,
4373 	.mmap_free = irdma_mmap_free,
4374 	.poll_cq = irdma_poll_cq,
4375 	.post_recv = irdma_post_recv,
4376 	.post_send = irdma_post_send,
4377 	.query_device = irdma_query_device,
4378 	.query_port = irdma_query_port,
4379 	.query_qp = irdma_query_qp,
4380 	.reg_user_mr = irdma_reg_user_mr,
4381 	.req_notify_cq = irdma_req_notify_cq,
4382 	.resize_cq = irdma_resize_cq,
4383 	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
4384 	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
4385 	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
4386 	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
4387 	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
4388 	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
4389 };
4390 
4391 /**
4392  * irdma_init_roce_device - initialization of roce rdma device
4393  * @iwdev: irdma device
4394  */
4395 static void irdma_init_roce_device(struct irdma_device *iwdev)
4396 {
4397 	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
4398 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
4399 			    iwdev->netdev->dev_addr);
4400 	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
4401 }
4402 
4403 /**
4404  * irdma_init_iw_device - initialization of iwarp rdma device
4405  * @iwdev: irdma device
4406  */
4407 static int irdma_init_iw_device(struct irdma_device *iwdev)
4408 {
4409 	struct net_device *netdev = iwdev->netdev;
4410 
4411 	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
4412 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
4413 			    netdev->dev_addr);
4414 	iwdev->ibdev.ops.iw_add_ref = irdma_qp_add_ref;
4415 	iwdev->ibdev.ops.iw_rem_ref = irdma_qp_rem_ref;
4416 	iwdev->ibdev.ops.iw_get_qp = irdma_get_qp;
4417 	iwdev->ibdev.ops.iw_connect = irdma_connect;
4418 	iwdev->ibdev.ops.iw_accept = irdma_accept;
4419 	iwdev->ibdev.ops.iw_reject = irdma_reject;
4420 	iwdev->ibdev.ops.iw_create_listen = irdma_create_listen;
4421 	iwdev->ibdev.ops.iw_destroy_listen = irdma_destroy_listen;
4422 	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
4423 	       sizeof(iwdev->ibdev.iw_ifname));
4424 	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
4425 
4426 	return 0;
4427 }
4428 
4429 /**
4430  * irdma_init_rdma_device - initialization of rdma device
4431  * @iwdev: irdma device
4432  */
4433 static int irdma_init_rdma_device(struct irdma_device *iwdev)
4434 {
4435 	struct pci_dev *pcidev = iwdev->rf->pcidev;
4436 	int ret;
4437 
4438 	if (iwdev->roce_mode) {
4439 		irdma_init_roce_device(iwdev);
4440 	} else {
4441 		ret = irdma_init_iw_device(iwdev);
4442 		if (ret)
4443 			return ret;
4444 	}
4445 	iwdev->ibdev.phys_port_cnt = 1;
4446 	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
4447 	iwdev->ibdev.dev.parent = &pcidev->dev;
4448 	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
4449 
4450 	return 0;
4451 }
4452 
4453 /**
4454  * irdma_port_ibevent - indicate port event
4455  * @iwdev: irdma device
4456  */
4457 void irdma_port_ibevent(struct irdma_device *iwdev)
4458 {
4459 	struct ib_event event;
4460 
4461 	event.device = &iwdev->ibdev;
4462 	event.element.port_num = 1;
4463 	event.event =
4464 		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
4465 	ib_dispatch_event(&event);
4466 }
4467 
4468 /**
4469  * irdma_ib_unregister_device - unregister rdma device from IB
4470  * core
4471  * @iwdev: irdma device
4472  */
4473 void irdma_ib_unregister_device(struct irdma_device *iwdev)
4474 {
4475 	iwdev->iw_status = 0;
4476 	irdma_port_ibevent(iwdev);
4477 	ib_unregister_device(&iwdev->ibdev);
4478 }
4479 
4480 /**
4481  * irdma_ib_register_device - register irdma device to IB core
4482  * @iwdev: irdma device
4483  */
4484 int irdma_ib_register_device(struct irdma_device *iwdev)
4485 {
4486 	int ret;
4487 
4488 	ret = irdma_init_rdma_device(iwdev);
4489 	if (ret)
4490 		return ret;
4491 
4492 	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
4493 	if (ret)
4494 		goto error;
4495 	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
4496 	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
4497 	if (ret)
4498 		goto error;
4499 
4500 	iwdev->iw_status = 1;
4501 	irdma_port_ibevent(iwdev);
4502 
4503 	return 0;
4504 
4505 error:
4506 	if (ret)
4507 		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
4508 
4509 	return ret;
4510 }
4511 
4512 /**
4513  * irdma_ib_dealloc_device
4514  * @ibdev: ib device
4515  *
4516  * callback from ibdev dealloc_driver to deallocate resources
4517  * unber irdma device
4518  */
4519 void irdma_ib_dealloc_device(struct ib_device *ibdev)
4520 {
4521 	struct irdma_device *iwdev = to_iwdev(ibdev);
4522 
4523 	irdma_rt_deinit_hw(iwdev);
4524 	irdma_ctrl_deinit_hw(iwdev->rf);
4525 	kfree(iwdev->rf);
4526 }
4527