1 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 2 /* Copyright (c) 2015 - 2021 Intel Corporation */ 3 #include "main.h" 4 5 /** 6 * irdma_query_device - get device attributes 7 * @ibdev: device pointer from stack 8 * @props: returning device attributes 9 * @udata: user data 10 */ 11 static int irdma_query_device(struct ib_device *ibdev, 12 struct ib_device_attr *props, 13 struct ib_udata *udata) 14 { 15 struct irdma_device *iwdev = to_iwdev(ibdev); 16 struct irdma_pci_f *rf = iwdev->rf; 17 struct pci_dev *pcidev = iwdev->rf->pcidev; 18 struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs; 19 20 if (udata->inlen || udata->outlen) 21 return -EINVAL; 22 23 memset(props, 0, sizeof(*props)); 24 addrconf_addr_eui48((u8 *)&props->sys_image_guid, 25 iwdev->netdev->dev_addr); 26 props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 | 27 irdma_fw_minor_ver(&rf->sc_dev); 28 props->device_cap_flags = IB_DEVICE_MEM_WINDOW | 29 IB_DEVICE_MEM_MGT_EXTENSIONS; 30 props->kernel_cap_flags = IBK_LOCAL_DMA_LKEY; 31 props->vendor_id = pcidev->vendor; 32 props->vendor_part_id = pcidev->device; 33 34 props->hw_ver = rf->pcidev->revision; 35 props->page_size_cap = hw_attrs->page_size_cap; 36 props->max_mr_size = hw_attrs->max_mr_size; 37 props->max_qp = rf->max_qp - rf->used_qps; 38 props->max_qp_wr = hw_attrs->max_qp_wr; 39 props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags; 40 props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags; 41 props->max_cq = rf->max_cq - rf->used_cqs; 42 props->max_cqe = rf->max_cqe - 1; 43 props->max_mr = rf->max_mr - rf->used_mrs; 44 props->max_mw = props->max_mr; 45 props->max_pd = rf->max_pd - rf->used_pds; 46 props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges; 47 props->max_qp_rd_atom = hw_attrs->max_hw_ird; 48 props->max_qp_init_rd_atom = hw_attrs->max_hw_ord; 49 if (rdma_protocol_roce(ibdev, 1)) { 50 props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN; 51 props->max_pkeys = IRDMA_PKEY_TBL_SZ; 52 } 53 54 props->max_ah = rf->max_ah; 55 props->max_mcast_grp = rf->max_mcg; 56 props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX; 57 props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX; 58 props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR; 59 #define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff 60 if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2) 61 props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK; 62 63 return 0; 64 } 65 66 /** 67 * irdma_query_port - get port attributes 68 * @ibdev: device pointer from stack 69 * @port: port number for query 70 * @props: returning device attributes 71 */ 72 static int irdma_query_port(struct ib_device *ibdev, u32 port, 73 struct ib_port_attr *props) 74 { 75 struct irdma_device *iwdev = to_iwdev(ibdev); 76 struct net_device *netdev = iwdev->netdev; 77 78 /* no need to zero out pros here. done by caller */ 79 80 props->max_mtu = IB_MTU_4096; 81 props->active_mtu = ib_mtu_int_to_enum(netdev->mtu); 82 props->lid = 1; 83 props->lmc = 0; 84 props->sm_lid = 0; 85 props->sm_sl = 0; 86 if (netif_carrier_ok(netdev) && netif_running(netdev)) { 87 props->state = IB_PORT_ACTIVE; 88 props->phys_state = IB_PORT_PHYS_STATE_LINK_UP; 89 } else { 90 props->state = IB_PORT_DOWN; 91 props->phys_state = IB_PORT_PHYS_STATE_DISABLED; 92 } 93 94 ib_get_eth_speed(ibdev, port, &props->active_speed, 95 &props->active_width); 96 97 if (rdma_protocol_roce(ibdev, 1)) { 98 props->gid_tbl_len = 32; 99 props->ip_gids = true; 100 props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ; 101 } else { 102 props->gid_tbl_len = 1; 103 } 104 props->qkey_viol_cntr = 0; 105 props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP; 106 props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size; 107 108 return 0; 109 } 110 111 /** 112 * irdma_disassociate_ucontext - Disassociate user context 113 * @context: ib user context 114 */ 115 static void irdma_disassociate_ucontext(struct ib_ucontext *context) 116 { 117 } 118 119 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext, 120 struct vm_area_struct *vma) 121 { 122 u64 pfn; 123 124 if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE) 125 return -EINVAL; 126 127 vma->vm_private_data = ucontext; 128 pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] + 129 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT; 130 131 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE, 132 pgprot_noncached(vma->vm_page_prot), NULL); 133 } 134 135 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry) 136 { 137 struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry); 138 139 kfree(entry); 140 } 141 142 static struct rdma_user_mmap_entry* 143 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset, 144 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset) 145 { 146 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL); 147 int ret; 148 149 if (!entry) 150 return NULL; 151 152 entry->bar_offset = bar_offset; 153 entry->mmap_flag = mmap_flag; 154 155 ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext, 156 &entry->rdma_entry, PAGE_SIZE); 157 if (ret) { 158 kfree(entry); 159 return NULL; 160 } 161 *mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry); 162 163 return &entry->rdma_entry; 164 } 165 166 /** 167 * irdma_mmap - user memory map 168 * @context: context created during alloc 169 * @vma: kernel info for user memory map 170 */ 171 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 172 { 173 struct rdma_user_mmap_entry *rdma_entry; 174 struct irdma_user_mmap_entry *entry; 175 struct irdma_ucontext *ucontext; 176 u64 pfn; 177 int ret; 178 179 ucontext = to_ucontext(context); 180 181 /* Legacy support for libi40iw with hard-coded mmap key */ 182 if (ucontext->legacy_mode) 183 return irdma_mmap_legacy(ucontext, vma); 184 185 rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma); 186 if (!rdma_entry) { 187 ibdev_dbg(&ucontext->iwdev->ibdev, 188 "VERBS: pgoff[0x%lx] does not have valid entry\n", 189 vma->vm_pgoff); 190 return -EINVAL; 191 } 192 193 entry = to_irdma_mmap_entry(rdma_entry); 194 ibdev_dbg(&ucontext->iwdev->ibdev, 195 "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n", 196 entry->bar_offset, entry->mmap_flag); 197 198 pfn = (entry->bar_offset + 199 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT; 200 201 switch (entry->mmap_flag) { 202 case IRDMA_MMAP_IO_NC: 203 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 204 pgprot_noncached(vma->vm_page_prot), 205 rdma_entry); 206 break; 207 case IRDMA_MMAP_IO_WC: 208 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 209 pgprot_writecombine(vma->vm_page_prot), 210 rdma_entry); 211 break; 212 default: 213 ret = -EINVAL; 214 } 215 216 if (ret) 217 ibdev_dbg(&ucontext->iwdev->ibdev, 218 "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n", 219 entry->bar_offset, entry->mmap_flag, ret); 220 rdma_user_mmap_entry_put(rdma_entry); 221 222 return ret; 223 } 224 225 /** 226 * irdma_alloc_push_page - allocate a push page for qp 227 * @iwqp: qp pointer 228 */ 229 static void irdma_alloc_push_page(struct irdma_qp *iwqp) 230 { 231 struct irdma_cqp_request *cqp_request; 232 struct cqp_cmds_info *cqp_info; 233 struct irdma_device *iwdev = iwqp->iwdev; 234 struct irdma_sc_qp *qp = &iwqp->sc_qp; 235 int status; 236 237 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 238 if (!cqp_request) 239 return; 240 241 cqp_info = &cqp_request->info; 242 cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE; 243 cqp_info->post_sq = 1; 244 cqp_info->in.u.manage_push_page.info.push_idx = 0; 245 cqp_info->in.u.manage_push_page.info.qs_handle = 246 qp->vsi->qos[qp->user_pri].qs_handle; 247 cqp_info->in.u.manage_push_page.info.free_page = 0; 248 cqp_info->in.u.manage_push_page.info.push_page_type = 0; 249 cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp; 250 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request; 251 252 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 253 if (!status && cqp_request->compl_info.op_ret_val < 254 iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) { 255 qp->push_idx = cqp_request->compl_info.op_ret_val; 256 qp->push_offset = 0; 257 } 258 259 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 260 } 261 262 /** 263 * irdma_alloc_ucontext - Allocate the user context data structure 264 * @uctx: uverbs context pointer 265 * @udata: user data 266 * 267 * This keeps track of all objects associated with a particular 268 * user-mode client. 269 */ 270 static int irdma_alloc_ucontext(struct ib_ucontext *uctx, 271 struct ib_udata *udata) 272 { 273 #define IRDMA_ALLOC_UCTX_MIN_REQ_LEN offsetofend(struct irdma_alloc_ucontext_req, rsvd8) 274 #define IRDMA_ALLOC_UCTX_MIN_RESP_LEN offsetofend(struct irdma_alloc_ucontext_resp, rsvd) 275 struct ib_device *ibdev = uctx->device; 276 struct irdma_device *iwdev = to_iwdev(ibdev); 277 struct irdma_alloc_ucontext_req req = {}; 278 struct irdma_alloc_ucontext_resp uresp = {}; 279 struct irdma_ucontext *ucontext = to_ucontext(uctx); 280 struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs; 281 282 if (udata->inlen < IRDMA_ALLOC_UCTX_MIN_REQ_LEN || 283 udata->outlen < IRDMA_ALLOC_UCTX_MIN_RESP_LEN) 284 return -EINVAL; 285 286 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) 287 return -EINVAL; 288 289 if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER) 290 goto ver_error; 291 292 ucontext->iwdev = iwdev; 293 ucontext->abi_ver = req.userspace_ver; 294 295 if (req.comp_mask & IRDMA_ALLOC_UCTX_USE_RAW_ATTR) 296 ucontext->use_raw_attrs = true; 297 298 /* GEN_1 legacy support with libi40iw */ 299 if (udata->outlen == IRDMA_ALLOC_UCTX_MIN_RESP_LEN) { 300 if (uk_attrs->hw_rev != IRDMA_GEN_1) 301 return -EOPNOTSUPP; 302 303 ucontext->legacy_mode = true; 304 uresp.max_qps = iwdev->rf->max_qp; 305 uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds; 306 uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2; 307 uresp.kernel_ver = req.userspace_ver; 308 if (ib_copy_to_udata(udata, &uresp, 309 min(sizeof(uresp), udata->outlen))) 310 return -EFAULT; 311 } else { 312 u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET]; 313 314 ucontext->db_mmap_entry = 315 irdma_user_mmap_entry_insert(ucontext, bar_off, 316 IRDMA_MMAP_IO_NC, 317 &uresp.db_mmap_key); 318 if (!ucontext->db_mmap_entry) 319 return -ENOMEM; 320 321 uresp.kernel_ver = IRDMA_ABI_VER; 322 uresp.feature_flags = uk_attrs->feature_flags; 323 uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags; 324 uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges; 325 uresp.max_hw_inline = uk_attrs->max_hw_inline; 326 uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta; 327 uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta; 328 uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk; 329 uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size; 330 uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size; 331 uresp.hw_rev = uk_attrs->hw_rev; 332 uresp.comp_mask |= IRDMA_ALLOC_UCTX_USE_RAW_ATTR; 333 uresp.min_hw_wq_size = uk_attrs->min_hw_wq_size; 334 uresp.comp_mask |= IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE; 335 if (ib_copy_to_udata(udata, &uresp, 336 min(sizeof(uresp), udata->outlen))) { 337 rdma_user_mmap_entry_remove(ucontext->db_mmap_entry); 338 return -EFAULT; 339 } 340 } 341 342 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list); 343 spin_lock_init(&ucontext->cq_reg_mem_list_lock); 344 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list); 345 spin_lock_init(&ucontext->qp_reg_mem_list_lock); 346 347 return 0; 348 349 ver_error: 350 ibdev_err(&iwdev->ibdev, 351 "Invalid userspace driver version detected. Detected version %d, should be %d\n", 352 req.userspace_ver, IRDMA_ABI_VER); 353 return -EINVAL; 354 } 355 356 /** 357 * irdma_dealloc_ucontext - deallocate the user context data structure 358 * @context: user context created during alloc 359 */ 360 static void irdma_dealloc_ucontext(struct ib_ucontext *context) 361 { 362 struct irdma_ucontext *ucontext = to_ucontext(context); 363 364 rdma_user_mmap_entry_remove(ucontext->db_mmap_entry); 365 } 366 367 /** 368 * irdma_alloc_pd - allocate protection domain 369 * @pd: PD pointer 370 * @udata: user data 371 */ 372 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata) 373 { 374 #define IRDMA_ALLOC_PD_MIN_RESP_LEN offsetofend(struct irdma_alloc_pd_resp, rsvd) 375 struct irdma_pd *iwpd = to_iwpd(pd); 376 struct irdma_device *iwdev = to_iwdev(pd->device); 377 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 378 struct irdma_pci_f *rf = iwdev->rf; 379 struct irdma_alloc_pd_resp uresp = {}; 380 struct irdma_sc_pd *sc_pd; 381 u32 pd_id = 0; 382 int err; 383 384 if (udata && udata->outlen < IRDMA_ALLOC_PD_MIN_RESP_LEN) 385 return -EINVAL; 386 387 err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id, 388 &rf->next_pd); 389 if (err) 390 return err; 391 392 sc_pd = &iwpd->sc_pd; 393 if (udata) { 394 struct irdma_ucontext *ucontext = 395 rdma_udata_to_drv_context(udata, struct irdma_ucontext, 396 ibucontext); 397 irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver); 398 uresp.pd_id = pd_id; 399 if (ib_copy_to_udata(udata, &uresp, 400 min(sizeof(uresp), udata->outlen))) { 401 err = -EFAULT; 402 goto error; 403 } 404 } else { 405 irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER); 406 } 407 408 return 0; 409 error: 410 irdma_free_rsrc(rf, rf->allocated_pds, pd_id); 411 412 return err; 413 } 414 415 /** 416 * irdma_dealloc_pd - deallocate pd 417 * @ibpd: ptr of pd to be deallocated 418 * @udata: user data 419 */ 420 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata) 421 { 422 struct irdma_pd *iwpd = to_iwpd(ibpd); 423 struct irdma_device *iwdev = to_iwdev(ibpd->device); 424 425 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id); 426 427 return 0; 428 } 429 430 /** 431 * irdma_get_pbl - Retrieve pbl from a list given a virtual 432 * address 433 * @va: user virtual address 434 * @pbl_list: pbl list to search in (QP's or CQ's) 435 */ 436 static struct irdma_pbl *irdma_get_pbl(unsigned long va, 437 struct list_head *pbl_list) 438 { 439 struct irdma_pbl *iwpbl; 440 441 list_for_each_entry (iwpbl, pbl_list, list) { 442 if (iwpbl->user_base == va) { 443 list_del(&iwpbl->list); 444 iwpbl->on_list = false; 445 return iwpbl; 446 } 447 } 448 449 return NULL; 450 } 451 452 /** 453 * irdma_clean_cqes - clean cq entries for qp 454 * @iwqp: qp ptr (user or kernel) 455 * @iwcq: cq ptr 456 */ 457 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq) 458 { 459 struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk; 460 unsigned long flags; 461 462 spin_lock_irqsave(&iwcq->lock, flags); 463 irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq); 464 spin_unlock_irqrestore(&iwcq->lock, flags); 465 } 466 467 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp) 468 { 469 if (iwqp->push_db_mmap_entry) { 470 rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry); 471 iwqp->push_db_mmap_entry = NULL; 472 } 473 if (iwqp->push_wqe_mmap_entry) { 474 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry); 475 iwqp->push_wqe_mmap_entry = NULL; 476 } 477 } 478 479 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext, 480 struct irdma_qp *iwqp, 481 u64 *push_wqe_mmap_key, 482 u64 *push_db_mmap_key) 483 { 484 struct irdma_device *iwdev = ucontext->iwdev; 485 u64 rsvd, bar_off; 486 487 rsvd = IRDMA_PF_BAR_RSVD; 488 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET]; 489 /* skip over db page */ 490 bar_off += IRDMA_HW_PAGE_SIZE; 491 /* push wqe page */ 492 bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE; 493 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext, 494 bar_off, IRDMA_MMAP_IO_WC, 495 push_wqe_mmap_key); 496 if (!iwqp->push_wqe_mmap_entry) 497 return -ENOMEM; 498 499 /* push doorbell page */ 500 bar_off += IRDMA_HW_PAGE_SIZE; 501 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext, 502 bar_off, IRDMA_MMAP_IO_NC, 503 push_db_mmap_key); 504 if (!iwqp->push_db_mmap_entry) { 505 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry); 506 return -ENOMEM; 507 } 508 509 return 0; 510 } 511 512 /** 513 * irdma_destroy_qp - destroy qp 514 * @ibqp: qp's ib pointer also to get to device's qp address 515 * @udata: user data 516 */ 517 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata) 518 { 519 struct irdma_qp *iwqp = to_iwqp(ibqp); 520 struct irdma_device *iwdev = iwqp->iwdev; 521 522 iwqp->sc_qp.qp_uk.destroy_pending = true; 523 524 if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) 525 irdma_modify_qp_to_err(&iwqp->sc_qp); 526 527 if (!iwqp->user_mode) 528 cancel_delayed_work_sync(&iwqp->dwork_flush); 529 530 if (!iwqp->user_mode) { 531 if (iwqp->iwscq) { 532 irdma_clean_cqes(iwqp, iwqp->iwscq); 533 if (iwqp->iwrcq != iwqp->iwscq) 534 irdma_clean_cqes(iwqp, iwqp->iwrcq); 535 } 536 } 537 538 irdma_qp_rem_ref(&iwqp->ibqp); 539 wait_for_completion(&iwqp->free_qp); 540 irdma_free_lsmm_rsrc(iwqp); 541 irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp); 542 543 irdma_remove_push_mmap_entries(iwqp); 544 irdma_free_qp_rsrc(iwqp); 545 546 return 0; 547 } 548 549 /** 550 * irdma_setup_virt_qp - setup for allocation of virtual qp 551 * @iwdev: irdma device 552 * @iwqp: qp ptr 553 * @init_info: initialize info to return 554 */ 555 static void irdma_setup_virt_qp(struct irdma_device *iwdev, 556 struct irdma_qp *iwqp, 557 struct irdma_qp_init_info *init_info) 558 { 559 struct irdma_pbl *iwpbl = iwqp->iwpbl; 560 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr; 561 562 iwqp->page = qpmr->sq_page; 563 init_info->shadow_area_pa = qpmr->shadow; 564 if (iwpbl->pbl_allocated) { 565 init_info->virtual_map = true; 566 init_info->sq_pa = qpmr->sq_pbl.idx; 567 init_info->rq_pa = qpmr->rq_pbl.idx; 568 } else { 569 init_info->sq_pa = qpmr->sq_pbl.addr; 570 init_info->rq_pa = qpmr->rq_pbl.addr; 571 } 572 } 573 574 /** 575 * irdma_setup_umode_qp - setup sq and rq size in user mode qp 576 * @udata: udata 577 * @iwdev: iwarp device 578 * @iwqp: qp ptr (user or kernel) 579 * @info: initialize info to return 580 * @init_attr: Initial QP create attributes 581 */ 582 static int irdma_setup_umode_qp(struct ib_udata *udata, 583 struct irdma_device *iwdev, 584 struct irdma_qp *iwqp, 585 struct irdma_qp_init_info *info, 586 struct ib_qp_init_attr *init_attr) 587 { 588 struct irdma_ucontext *ucontext = rdma_udata_to_drv_context(udata, 589 struct irdma_ucontext, ibucontext); 590 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; 591 struct irdma_create_qp_req req; 592 unsigned long flags; 593 int ret; 594 595 ret = ib_copy_from_udata(&req, udata, 596 min(sizeof(req), udata->inlen)); 597 if (ret) { 598 ibdev_dbg(&iwdev->ibdev, "VERBS: ib_copy_from_data fail\n"); 599 return ret; 600 } 601 602 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx; 603 iwqp->user_mode = 1; 604 if (req.user_wqe_bufs) { 605 info->qp_uk_init_info.legacy_mode = ucontext->legacy_mode; 606 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 607 iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs, 608 &ucontext->qp_reg_mem_list); 609 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 610 611 if (!iwqp->iwpbl) { 612 ret = -ENODATA; 613 ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n"); 614 return ret; 615 } 616 } 617 618 if (!ucontext->use_raw_attrs) { 619 /** 620 * Maintain backward compat with older ABI which passes sq and 621 * rq depth in quanta in cap.max_send_wr and cap.max_recv_wr. 622 * There is no way to compute the correct value of 623 * iwqp->max_send_wr/max_recv_wr in the kernel. 624 */ 625 iwqp->max_send_wr = init_attr->cap.max_send_wr; 626 iwqp->max_recv_wr = init_attr->cap.max_recv_wr; 627 ukinfo->sq_size = init_attr->cap.max_send_wr; 628 ukinfo->rq_size = init_attr->cap.max_recv_wr; 629 irdma_uk_calc_shift_wq(ukinfo, &ukinfo->sq_shift, 630 &ukinfo->rq_shift); 631 } else { 632 ret = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth, 633 &ukinfo->sq_shift); 634 if (ret) 635 return ret; 636 637 ret = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth, 638 &ukinfo->rq_shift); 639 if (ret) 640 return ret; 641 642 iwqp->max_send_wr = 643 (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift; 644 iwqp->max_recv_wr = 645 (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift; 646 ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift; 647 ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift; 648 } 649 650 irdma_setup_virt_qp(iwdev, iwqp, info); 651 652 return 0; 653 } 654 655 /** 656 * irdma_setup_kmode_qp - setup initialization for kernel mode qp 657 * @iwdev: iwarp device 658 * @iwqp: qp ptr (user or kernel) 659 * @info: initialize info to return 660 * @init_attr: Initial QP create attributes 661 */ 662 static int irdma_setup_kmode_qp(struct irdma_device *iwdev, 663 struct irdma_qp *iwqp, 664 struct irdma_qp_init_info *info, 665 struct ib_qp_init_attr *init_attr) 666 { 667 struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem; 668 u32 size; 669 int status; 670 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; 671 672 status = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth, 673 &ukinfo->sq_shift); 674 if (status) 675 return status; 676 677 status = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth, 678 &ukinfo->rq_shift); 679 if (status) 680 return status; 681 682 iwqp->kqp.sq_wrid_mem = 683 kcalloc(ukinfo->sq_depth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL); 684 if (!iwqp->kqp.sq_wrid_mem) 685 return -ENOMEM; 686 687 iwqp->kqp.rq_wrid_mem = 688 kcalloc(ukinfo->rq_depth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL); 689 690 if (!iwqp->kqp.rq_wrid_mem) { 691 kfree(iwqp->kqp.sq_wrid_mem); 692 iwqp->kqp.sq_wrid_mem = NULL; 693 return -ENOMEM; 694 } 695 696 ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem; 697 ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem; 698 699 size = (ukinfo->sq_depth + ukinfo->rq_depth) * IRDMA_QP_WQE_MIN_SIZE; 700 size += (IRDMA_SHADOW_AREA_SIZE << 3); 701 702 mem->size = ALIGN(size, 256); 703 mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size, 704 &mem->pa, GFP_KERNEL); 705 if (!mem->va) { 706 kfree(iwqp->kqp.sq_wrid_mem); 707 iwqp->kqp.sq_wrid_mem = NULL; 708 kfree(iwqp->kqp.rq_wrid_mem); 709 iwqp->kqp.rq_wrid_mem = NULL; 710 return -ENOMEM; 711 } 712 713 ukinfo->sq = mem->va; 714 info->sq_pa = mem->pa; 715 ukinfo->rq = &ukinfo->sq[ukinfo->sq_depth]; 716 info->rq_pa = info->sq_pa + (ukinfo->sq_depth * IRDMA_QP_WQE_MIN_SIZE); 717 ukinfo->shadow_area = ukinfo->rq[ukinfo->rq_depth].elem; 718 info->shadow_area_pa = 719 info->rq_pa + (ukinfo->rq_depth * IRDMA_QP_WQE_MIN_SIZE); 720 ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift; 721 ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift; 722 ukinfo->qp_id = iwqp->ibqp.qp_num; 723 724 iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift; 725 iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift; 726 init_attr->cap.max_send_wr = iwqp->max_send_wr; 727 init_attr->cap.max_recv_wr = iwqp->max_recv_wr; 728 729 return 0; 730 } 731 732 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp) 733 { 734 struct irdma_pci_f *rf = iwqp->iwdev->rf; 735 struct irdma_cqp_request *cqp_request; 736 struct cqp_cmds_info *cqp_info; 737 struct irdma_create_qp_info *qp_info; 738 int status; 739 740 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 741 if (!cqp_request) 742 return -ENOMEM; 743 744 cqp_info = &cqp_request->info; 745 qp_info = &cqp_request->info.in.u.qp_create.info; 746 memset(qp_info, 0, sizeof(*qp_info)); 747 qp_info->mac_valid = true; 748 qp_info->cq_num_valid = true; 749 qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE; 750 751 cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE; 752 cqp_info->post_sq = 1; 753 cqp_info->in.u.qp_create.qp = &iwqp->sc_qp; 754 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request; 755 status = irdma_handle_cqp_op(rf, cqp_request); 756 irdma_put_cqp_request(&rf->cqp, cqp_request); 757 758 return status; 759 } 760 761 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp, 762 struct irdma_qp_host_ctx_info *ctx_info) 763 { 764 struct irdma_device *iwdev = iwqp->iwdev; 765 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 766 struct irdma_roce_offload_info *roce_info; 767 struct irdma_udp_offload_info *udp_info; 768 769 udp_info = &iwqp->udp_info; 770 udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu)); 771 udp_info->cwnd = iwdev->roce_cwnd; 772 udp_info->rexmit_thresh = 2; 773 udp_info->rnr_nak_thresh = 2; 774 udp_info->src_port = 0xc000; 775 udp_info->dst_port = ROCE_V2_UDP_DPORT; 776 roce_info = &iwqp->roce_info; 777 ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr); 778 779 roce_info->rd_en = true; 780 roce_info->wr_rdresp_en = true; 781 roce_info->bind_en = true; 782 roce_info->dcqcn_en = false; 783 roce_info->rtomin = 5; 784 785 roce_info->ack_credits = iwdev->roce_ackcreds; 786 roce_info->ird_size = dev->hw_attrs.max_hw_ird; 787 roce_info->ord_size = dev->hw_attrs.max_hw_ord; 788 789 if (!iwqp->user_mode) { 790 roce_info->priv_mode_en = true; 791 roce_info->fast_reg_en = true; 792 roce_info->udprivcq_en = true; 793 } 794 roce_info->roce_tver = 0; 795 796 ctx_info->roce_info = &iwqp->roce_info; 797 ctx_info->udp_info = &iwqp->udp_info; 798 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 799 } 800 801 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp, 802 struct irdma_qp_host_ctx_info *ctx_info) 803 { 804 struct irdma_device *iwdev = iwqp->iwdev; 805 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 806 struct irdma_iwarp_offload_info *iwarp_info; 807 808 iwarp_info = &iwqp->iwarp_info; 809 ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr); 810 iwarp_info->rd_en = true; 811 iwarp_info->wr_rdresp_en = true; 812 iwarp_info->bind_en = true; 813 iwarp_info->ecn_en = true; 814 iwarp_info->rtomin = 5; 815 816 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 817 iwarp_info->ib_rd_en = true; 818 if (!iwqp->user_mode) { 819 iwarp_info->priv_mode_en = true; 820 iwarp_info->fast_reg_en = true; 821 } 822 iwarp_info->ddp_ver = 1; 823 iwarp_info->rdmap_ver = 1; 824 825 ctx_info->iwarp_info = &iwqp->iwarp_info; 826 ctx_info->iwarp_info_valid = true; 827 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 828 ctx_info->iwarp_info_valid = false; 829 } 830 831 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr, 832 struct irdma_device *iwdev) 833 { 834 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 835 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs; 836 837 if (init_attr->create_flags) 838 return -EOPNOTSUPP; 839 840 if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline || 841 init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags || 842 init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags || 843 init_attr->cap.max_send_wr > uk_attrs->max_hw_wq_quanta || 844 init_attr->cap.max_recv_wr > uk_attrs->max_hw_rq_quanta) 845 return -EINVAL; 846 847 if (rdma_protocol_roce(&iwdev->ibdev, 1)) { 848 if (init_attr->qp_type != IB_QPT_RC && 849 init_attr->qp_type != IB_QPT_UD && 850 init_attr->qp_type != IB_QPT_GSI) 851 return -EOPNOTSUPP; 852 } else { 853 if (init_attr->qp_type != IB_QPT_RC) 854 return -EOPNOTSUPP; 855 } 856 857 return 0; 858 } 859 860 static void irdma_flush_worker(struct work_struct *work) 861 { 862 struct delayed_work *dwork = to_delayed_work(work); 863 struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush); 864 865 irdma_generate_flush_completions(iwqp); 866 } 867 868 /** 869 * irdma_create_qp - create qp 870 * @ibqp: ptr of qp 871 * @init_attr: attributes for qp 872 * @udata: user data for create qp 873 */ 874 static int irdma_create_qp(struct ib_qp *ibqp, 875 struct ib_qp_init_attr *init_attr, 876 struct ib_udata *udata) 877 { 878 #define IRDMA_CREATE_QP_MIN_REQ_LEN offsetofend(struct irdma_create_qp_req, user_compl_ctx) 879 #define IRDMA_CREATE_QP_MIN_RESP_LEN offsetofend(struct irdma_create_qp_resp, rsvd) 880 struct ib_pd *ibpd = ibqp->pd; 881 struct irdma_pd *iwpd = to_iwpd(ibpd); 882 struct irdma_device *iwdev = to_iwdev(ibpd->device); 883 struct irdma_pci_f *rf = iwdev->rf; 884 struct irdma_qp *iwqp = to_iwqp(ibqp); 885 struct irdma_create_qp_resp uresp = {}; 886 u32 qp_num = 0; 887 int err_code; 888 struct irdma_sc_qp *qp; 889 struct irdma_sc_dev *dev = &rf->sc_dev; 890 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs; 891 struct irdma_qp_init_info init_info = {}; 892 struct irdma_qp_host_ctx_info *ctx_info; 893 894 err_code = irdma_validate_qp_attrs(init_attr, iwdev); 895 if (err_code) 896 return err_code; 897 898 if (udata && (udata->inlen < IRDMA_CREATE_QP_MIN_REQ_LEN || 899 udata->outlen < IRDMA_CREATE_QP_MIN_RESP_LEN)) 900 return -EINVAL; 901 902 init_info.vsi = &iwdev->vsi; 903 init_info.qp_uk_init_info.uk_attrs = uk_attrs; 904 init_info.qp_uk_init_info.sq_size = init_attr->cap.max_send_wr; 905 init_info.qp_uk_init_info.rq_size = init_attr->cap.max_recv_wr; 906 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge; 907 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge; 908 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data; 909 910 qp = &iwqp->sc_qp; 911 qp->qp_uk.back_qp = iwqp; 912 qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX; 913 914 iwqp->iwdev = iwdev; 915 iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE, 916 256); 917 iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device, 918 iwqp->q2_ctx_mem.size, 919 &iwqp->q2_ctx_mem.pa, 920 GFP_KERNEL); 921 if (!iwqp->q2_ctx_mem.va) 922 return -ENOMEM; 923 924 init_info.q2 = iwqp->q2_ctx_mem.va; 925 init_info.q2_pa = iwqp->q2_ctx_mem.pa; 926 init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE); 927 init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE; 928 929 if (init_attr->qp_type == IB_QPT_GSI) 930 qp_num = 1; 931 else 932 err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp, 933 &qp_num, &rf->next_qp); 934 if (err_code) 935 goto error; 936 937 iwqp->iwpd = iwpd; 938 iwqp->ibqp.qp_num = qp_num; 939 qp = &iwqp->sc_qp; 940 iwqp->iwscq = to_iwcq(init_attr->send_cq); 941 iwqp->iwrcq = to_iwcq(init_attr->recv_cq); 942 iwqp->host_ctx.va = init_info.host_ctx; 943 iwqp->host_ctx.pa = init_info.host_ctx_pa; 944 iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE; 945 946 init_info.pd = &iwpd->sc_pd; 947 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num; 948 if (!rdma_protocol_roce(&iwdev->ibdev, 1)) 949 init_info.qp_uk_init_info.first_sq_wq = 1; 950 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp; 951 init_waitqueue_head(&iwqp->waitq); 952 init_waitqueue_head(&iwqp->mod_qp_waitq); 953 954 if (udata) { 955 init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver; 956 err_code = irdma_setup_umode_qp(udata, iwdev, iwqp, &init_info, 957 init_attr); 958 } else { 959 INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker); 960 init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER; 961 err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr); 962 } 963 964 if (err_code) { 965 ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n"); 966 goto error; 967 } 968 969 if (rdma_protocol_roce(&iwdev->ibdev, 1)) { 970 if (init_attr->qp_type == IB_QPT_RC) { 971 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC; 972 init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM | 973 IRDMA_WRITE_WITH_IMM | 974 IRDMA_ROCE; 975 } else { 976 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD; 977 init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM | 978 IRDMA_ROCE; 979 } 980 } else { 981 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP; 982 init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM; 983 } 984 985 if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1) 986 init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE; 987 988 err_code = irdma_sc_qp_init(qp, &init_info); 989 if (err_code) { 990 ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n"); 991 goto error; 992 } 993 994 ctx_info = &iwqp->ctx_info; 995 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 996 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 997 998 if (rdma_protocol_roce(&iwdev->ibdev, 1)) 999 irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info); 1000 else 1001 irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info); 1002 1003 err_code = irdma_cqp_create_qp_cmd(iwqp); 1004 if (err_code) 1005 goto error; 1006 1007 refcount_set(&iwqp->refcnt, 1); 1008 spin_lock_init(&iwqp->lock); 1009 spin_lock_init(&iwqp->sc_qp.pfpdu.lock); 1010 iwqp->sig_all = init_attr->sq_sig_type == IB_SIGNAL_ALL_WR; 1011 rf->qp_table[qp_num] = iwqp; 1012 1013 if (rdma_protocol_roce(&iwdev->ibdev, 1)) { 1014 if (dev->ws_add(&iwdev->vsi, 0)) { 1015 irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp); 1016 err_code = -EINVAL; 1017 goto error; 1018 } 1019 1020 irdma_qp_add_qos(&iwqp->sc_qp); 1021 } 1022 1023 if (udata) { 1024 /* GEN_1 legacy support with libi40iw does not have expanded uresp struct */ 1025 if (udata->outlen < sizeof(uresp)) { 1026 uresp.lsmm = 1; 1027 uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1; 1028 } else { 1029 if (rdma_protocol_iwarp(&iwdev->ibdev, 1)) 1030 uresp.lsmm = 1; 1031 } 1032 uresp.actual_sq_size = init_info.qp_uk_init_info.sq_size; 1033 uresp.actual_rq_size = init_info.qp_uk_init_info.rq_size; 1034 uresp.qp_id = qp_num; 1035 uresp.qp_caps = qp->qp_uk.qp_caps; 1036 1037 err_code = ib_copy_to_udata(udata, &uresp, 1038 min(sizeof(uresp), udata->outlen)); 1039 if (err_code) { 1040 ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n"); 1041 irdma_destroy_qp(&iwqp->ibqp, udata); 1042 return err_code; 1043 } 1044 } 1045 1046 init_completion(&iwqp->free_qp); 1047 return 0; 1048 1049 error: 1050 irdma_free_qp_rsrc(iwqp); 1051 return err_code; 1052 } 1053 1054 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp) 1055 { 1056 int acc_flags = 0; 1057 1058 if (rdma_protocol_roce(iwqp->ibqp.device, 1)) { 1059 if (iwqp->roce_info.wr_rdresp_en) { 1060 acc_flags |= IB_ACCESS_LOCAL_WRITE; 1061 acc_flags |= IB_ACCESS_REMOTE_WRITE; 1062 } 1063 if (iwqp->roce_info.rd_en) 1064 acc_flags |= IB_ACCESS_REMOTE_READ; 1065 if (iwqp->roce_info.bind_en) 1066 acc_flags |= IB_ACCESS_MW_BIND; 1067 } else { 1068 if (iwqp->iwarp_info.wr_rdresp_en) { 1069 acc_flags |= IB_ACCESS_LOCAL_WRITE; 1070 acc_flags |= IB_ACCESS_REMOTE_WRITE; 1071 } 1072 if (iwqp->iwarp_info.rd_en) 1073 acc_flags |= IB_ACCESS_REMOTE_READ; 1074 if (iwqp->iwarp_info.bind_en) 1075 acc_flags |= IB_ACCESS_MW_BIND; 1076 } 1077 return acc_flags; 1078 } 1079 1080 /** 1081 * irdma_query_qp - query qp attributes 1082 * @ibqp: qp pointer 1083 * @attr: attributes pointer 1084 * @attr_mask: Not used 1085 * @init_attr: qp attributes to return 1086 */ 1087 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 1088 int attr_mask, struct ib_qp_init_attr *init_attr) 1089 { 1090 struct irdma_qp *iwqp = to_iwqp(ibqp); 1091 struct irdma_sc_qp *qp = &iwqp->sc_qp; 1092 1093 memset(attr, 0, sizeof(*attr)); 1094 memset(init_attr, 0, sizeof(*init_attr)); 1095 1096 attr->qp_state = iwqp->ibqp_state; 1097 attr->cur_qp_state = iwqp->ibqp_state; 1098 attr->cap.max_send_wr = iwqp->max_send_wr; 1099 attr->cap.max_recv_wr = iwqp->max_recv_wr; 1100 attr->cap.max_inline_data = qp->qp_uk.max_inline_data; 1101 attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt; 1102 attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt; 1103 attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp); 1104 attr->port_num = 1; 1105 if (rdma_protocol_roce(ibqp->device, 1)) { 1106 attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss); 1107 attr->qkey = iwqp->roce_info.qkey; 1108 attr->rq_psn = iwqp->udp_info.epsn; 1109 attr->sq_psn = iwqp->udp_info.psn_nxt; 1110 attr->dest_qp_num = iwqp->roce_info.dest_qp; 1111 attr->pkey_index = iwqp->roce_info.p_key; 1112 attr->retry_cnt = iwqp->udp_info.rexmit_thresh; 1113 attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh; 1114 attr->max_rd_atomic = iwqp->roce_info.ord_size; 1115 attr->max_dest_rd_atomic = iwqp->roce_info.ird_size; 1116 } 1117 1118 init_attr->event_handler = iwqp->ibqp.event_handler; 1119 init_attr->qp_context = iwqp->ibqp.qp_context; 1120 init_attr->send_cq = iwqp->ibqp.send_cq; 1121 init_attr->recv_cq = iwqp->ibqp.recv_cq; 1122 init_attr->cap = attr->cap; 1123 1124 return 0; 1125 } 1126 1127 /** 1128 * irdma_query_pkey - Query partition key 1129 * @ibdev: device pointer from stack 1130 * @port: port number 1131 * @index: index of pkey 1132 * @pkey: pointer to store the pkey 1133 */ 1134 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 1135 u16 *pkey) 1136 { 1137 if (index >= IRDMA_PKEY_TBL_SZ) 1138 return -EINVAL; 1139 1140 *pkey = IRDMA_DEFAULT_PKEY; 1141 return 0; 1142 } 1143 1144 static u8 irdma_roce_get_vlan_prio(const struct ib_gid_attr *attr, u8 prio) 1145 { 1146 struct net_device *ndev; 1147 1148 rcu_read_lock(); 1149 ndev = rcu_dereference(attr->ndev); 1150 if (!ndev) 1151 goto exit; 1152 if (is_vlan_dev(ndev)) { 1153 u16 vlan_qos = vlan_dev_get_egress_qos_mask(ndev, prio); 1154 1155 prio = (vlan_qos & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT; 1156 } 1157 exit: 1158 rcu_read_unlock(); 1159 return prio; 1160 } 1161 1162 static int irdma_wait_for_suspend(struct irdma_qp *iwqp) 1163 { 1164 if (!wait_event_timeout(iwqp->iwdev->suspend_wq, 1165 !iwqp->suspend_pending, 1166 msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) { 1167 iwqp->suspend_pending = false; 1168 ibdev_warn(&iwqp->iwdev->ibdev, 1169 "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n", 1170 iwqp->ibqp.qp_num, iwqp->last_aeq); 1171 return -EBUSY; 1172 } 1173 1174 return 0; 1175 } 1176 1177 /** 1178 * irdma_modify_qp_roce - modify qp request 1179 * @ibqp: qp's pointer for modify 1180 * @attr: access attributes 1181 * @attr_mask: state mask 1182 * @udata: user data 1183 */ 1184 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, 1185 int attr_mask, struct ib_udata *udata) 1186 { 1187 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush) 1188 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid) 1189 struct irdma_pd *iwpd = to_iwpd(ibqp->pd); 1190 struct irdma_qp *iwqp = to_iwqp(ibqp); 1191 struct irdma_device *iwdev = iwqp->iwdev; 1192 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 1193 struct irdma_qp_host_ctx_info *ctx_info; 1194 struct irdma_roce_offload_info *roce_info; 1195 struct irdma_udp_offload_info *udp_info; 1196 struct irdma_modify_qp_info info = {}; 1197 struct irdma_modify_qp_resp uresp = {}; 1198 struct irdma_modify_qp_req ureq = {}; 1199 unsigned long flags; 1200 u8 issue_modify_qp = 0; 1201 int ret = 0; 1202 1203 ctx_info = &iwqp->ctx_info; 1204 roce_info = &iwqp->roce_info; 1205 udp_info = &iwqp->udp_info; 1206 1207 if (udata) { 1208 /* udata inlen/outlen can be 0 when supporting legacy libi40iw */ 1209 if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) || 1210 (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN)) 1211 return -EINVAL; 1212 } 1213 1214 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) 1215 return -EOPNOTSUPP; 1216 1217 if (attr_mask & IB_QP_DEST_QPN) 1218 roce_info->dest_qp = attr->dest_qp_num; 1219 1220 if (attr_mask & IB_QP_PKEY_INDEX) { 1221 ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index, 1222 &roce_info->p_key); 1223 if (ret) 1224 return ret; 1225 } 1226 1227 if (attr_mask & IB_QP_QKEY) 1228 roce_info->qkey = attr->qkey; 1229 1230 if (attr_mask & IB_QP_PATH_MTU) 1231 udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu); 1232 1233 if (attr_mask & IB_QP_SQ_PSN) { 1234 udp_info->psn_nxt = attr->sq_psn; 1235 udp_info->lsn = 0xffff; 1236 udp_info->psn_una = attr->sq_psn; 1237 udp_info->psn_max = attr->sq_psn; 1238 } 1239 1240 if (attr_mask & IB_QP_RQ_PSN) 1241 udp_info->epsn = attr->rq_psn; 1242 1243 if (attr_mask & IB_QP_RNR_RETRY) 1244 udp_info->rnr_nak_thresh = attr->rnr_retry; 1245 1246 if (attr_mask & IB_QP_RETRY_CNT) 1247 udp_info->rexmit_thresh = attr->retry_cnt; 1248 1249 ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id; 1250 1251 if (attr_mask & IB_QP_AV) { 1252 struct irdma_av *av = &iwqp->roce_ah.av; 1253 const struct ib_gid_attr *sgid_attr = 1254 attr->ah_attr.grh.sgid_attr; 1255 u16 vlan_id = VLAN_N_VID; 1256 u32 local_ip[4]; 1257 1258 memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah)); 1259 if (attr->ah_attr.ah_flags & IB_AH_GRH) { 1260 udp_info->ttl = attr->ah_attr.grh.hop_limit; 1261 udp_info->flow_label = attr->ah_attr.grh.flow_label; 1262 udp_info->tos = attr->ah_attr.grh.traffic_class; 1263 udp_info->src_port = 1264 rdma_get_udp_sport(udp_info->flow_label, 1265 ibqp->qp_num, 1266 roce_info->dest_qp); 1267 irdma_qp_rem_qos(&iwqp->sc_qp); 1268 dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri); 1269 if (iwqp->sc_qp.vsi->dscp_mode) 1270 ctx_info->user_pri = 1271 iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(udp_info->tos)]; 1272 else 1273 ctx_info->user_pri = rt_tos2priority(udp_info->tos); 1274 } 1275 ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id, 1276 ctx_info->roce_info->mac_addr); 1277 if (ret) 1278 return ret; 1279 ctx_info->user_pri = irdma_roce_get_vlan_prio(sgid_attr, 1280 ctx_info->user_pri); 1281 if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri)) 1282 return -ENOMEM; 1283 iwqp->sc_qp.user_pri = ctx_info->user_pri; 1284 irdma_qp_add_qos(&iwqp->sc_qp); 1285 1286 if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode) 1287 vlan_id = 0; 1288 if (vlan_id < VLAN_N_VID) { 1289 udp_info->insert_vlan_tag = true; 1290 udp_info->vlan_tag = vlan_id | 1291 ctx_info->user_pri << VLAN_PRIO_SHIFT; 1292 } else { 1293 udp_info->insert_vlan_tag = false; 1294 } 1295 1296 av->attrs = attr->ah_attr; 1297 rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid); 1298 rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid); 1299 av->net_type = rdma_gid_attr_network_type(sgid_attr); 1300 if (av->net_type == RDMA_NETWORK_IPV6) { 1301 __be32 *daddr = 1302 av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32; 1303 __be32 *saddr = 1304 av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32; 1305 1306 irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr); 1307 irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr); 1308 1309 udp_info->ipv4 = false; 1310 irdma_copy_ip_ntohl(local_ip, daddr); 1311 1312 } else if (av->net_type == RDMA_NETWORK_IPV4) { 1313 __be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr; 1314 __be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr; 1315 1316 local_ip[0] = ntohl(daddr); 1317 1318 udp_info->ipv4 = true; 1319 udp_info->dest_ip_addr[0] = 0; 1320 udp_info->dest_ip_addr[1] = 0; 1321 udp_info->dest_ip_addr[2] = 0; 1322 udp_info->dest_ip_addr[3] = local_ip[0]; 1323 1324 udp_info->local_ipaddr[0] = 0; 1325 udp_info->local_ipaddr[1] = 0; 1326 udp_info->local_ipaddr[2] = 0; 1327 udp_info->local_ipaddr[3] = ntohl(saddr); 1328 } 1329 udp_info->arp_idx = 1330 irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4, 1331 attr->ah_attr.roce.dmac); 1332 } 1333 1334 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 1335 if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) { 1336 ibdev_err(&iwdev->ibdev, 1337 "rd_atomic = %d, above max_hw_ord=%d\n", 1338 attr->max_rd_atomic, 1339 dev->hw_attrs.max_hw_ord); 1340 return -EINVAL; 1341 } 1342 if (attr->max_rd_atomic) 1343 roce_info->ord_size = attr->max_rd_atomic; 1344 info.ord_valid = true; 1345 } 1346 1347 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 1348 if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) { 1349 ibdev_err(&iwdev->ibdev, 1350 "rd_atomic = %d, above max_hw_ird=%d\n", 1351 attr->max_rd_atomic, 1352 dev->hw_attrs.max_hw_ird); 1353 return -EINVAL; 1354 } 1355 if (attr->max_dest_rd_atomic) 1356 roce_info->ird_size = attr->max_dest_rd_atomic; 1357 } 1358 1359 if (attr_mask & IB_QP_ACCESS_FLAGS) { 1360 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) 1361 roce_info->wr_rdresp_en = true; 1362 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 1363 roce_info->wr_rdresp_en = true; 1364 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 1365 roce_info->rd_en = true; 1366 } 1367 1368 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend)); 1369 1370 ibdev_dbg(&iwdev->ibdev, 1371 "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n", 1372 __builtin_return_address(0), ibqp->qp_num, attr->qp_state, 1373 iwqp->ibqp_state, iwqp->iwarp_state, attr_mask); 1374 1375 spin_lock_irqsave(&iwqp->lock, flags); 1376 if (attr_mask & IB_QP_STATE) { 1377 if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state, 1378 iwqp->ibqp.qp_type, attr_mask)) { 1379 ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n", 1380 iwqp->ibqp.qp_num, iwqp->ibqp_state, 1381 attr->qp_state); 1382 ret = -EINVAL; 1383 goto exit; 1384 } 1385 info.curr_iwarp_state = iwqp->iwarp_state; 1386 1387 switch (attr->qp_state) { 1388 case IB_QPS_INIT: 1389 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1390 ret = -EINVAL; 1391 goto exit; 1392 } 1393 1394 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) { 1395 info.next_iwarp_state = IRDMA_QP_STATE_IDLE; 1396 issue_modify_qp = 1; 1397 } 1398 break; 1399 case IB_QPS_RTR: 1400 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1401 ret = -EINVAL; 1402 goto exit; 1403 } 1404 info.arp_cache_idx_valid = true; 1405 info.cq_num_valid = true; 1406 info.next_iwarp_state = IRDMA_QP_STATE_RTR; 1407 issue_modify_qp = 1; 1408 break; 1409 case IB_QPS_RTS: 1410 if (iwqp->ibqp_state < IB_QPS_RTR || 1411 iwqp->ibqp_state == IB_QPS_ERR) { 1412 ret = -EINVAL; 1413 goto exit; 1414 } 1415 1416 info.arp_cache_idx_valid = true; 1417 info.cq_num_valid = true; 1418 info.ord_valid = true; 1419 info.next_iwarp_state = IRDMA_QP_STATE_RTS; 1420 issue_modify_qp = 1; 1421 if (iwdev->push_mode && udata && 1422 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX && 1423 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1424 spin_unlock_irqrestore(&iwqp->lock, flags); 1425 irdma_alloc_push_page(iwqp); 1426 spin_lock_irqsave(&iwqp->lock, flags); 1427 } 1428 break; 1429 case IB_QPS_SQD: 1430 if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD) 1431 goto exit; 1432 1433 if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) { 1434 ret = -EINVAL; 1435 goto exit; 1436 } 1437 1438 info.next_iwarp_state = IRDMA_QP_STATE_SQD; 1439 issue_modify_qp = 1; 1440 iwqp->suspend_pending = true; 1441 break; 1442 case IB_QPS_SQE: 1443 case IB_QPS_ERR: 1444 case IB_QPS_RESET: 1445 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) { 1446 spin_unlock_irqrestore(&iwqp->lock, flags); 1447 if (udata && udata->inlen) { 1448 if (ib_copy_from_udata(&ureq, udata, 1449 min(sizeof(ureq), udata->inlen))) 1450 return -EINVAL; 1451 1452 irdma_flush_wqes(iwqp, 1453 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) | 1454 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) | 1455 IRDMA_REFLUSH); 1456 } 1457 return 0; 1458 } 1459 1460 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1461 issue_modify_qp = 1; 1462 break; 1463 default: 1464 ret = -EINVAL; 1465 goto exit; 1466 } 1467 1468 iwqp->ibqp_state = attr->qp_state; 1469 } 1470 1471 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 1472 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 1473 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 1474 spin_unlock_irqrestore(&iwqp->lock, flags); 1475 1476 if (attr_mask & IB_QP_STATE) { 1477 if (issue_modify_qp) { 1478 ctx_info->rem_endpoint_idx = udp_info->arp_idx; 1479 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true)) 1480 return -EINVAL; 1481 if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) { 1482 ret = irdma_wait_for_suspend(iwqp); 1483 if (ret) 1484 return ret; 1485 } 1486 spin_lock_irqsave(&iwqp->lock, flags); 1487 if (iwqp->iwarp_state == info.curr_iwarp_state) { 1488 iwqp->iwarp_state = info.next_iwarp_state; 1489 iwqp->ibqp_state = attr->qp_state; 1490 } 1491 if (iwqp->ibqp_state > IB_QPS_RTS && 1492 !iwqp->flush_issued) { 1493 spin_unlock_irqrestore(&iwqp->lock, flags); 1494 irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ | 1495 IRDMA_FLUSH_RQ | 1496 IRDMA_FLUSH_WAIT); 1497 iwqp->flush_issued = 1; 1498 } else { 1499 spin_unlock_irqrestore(&iwqp->lock, flags); 1500 } 1501 } else { 1502 iwqp->ibqp_state = attr->qp_state; 1503 } 1504 if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1505 struct irdma_ucontext *ucontext; 1506 1507 ucontext = rdma_udata_to_drv_context(udata, 1508 struct irdma_ucontext, ibucontext); 1509 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX && 1510 !iwqp->push_wqe_mmap_entry && 1511 !irdma_setup_push_mmap_entries(ucontext, iwqp, 1512 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) { 1513 uresp.push_valid = 1; 1514 uresp.push_offset = iwqp->sc_qp.push_offset; 1515 } 1516 ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), 1517 udata->outlen)); 1518 if (ret) { 1519 irdma_remove_push_mmap_entries(iwqp); 1520 ibdev_dbg(&iwdev->ibdev, 1521 "VERBS: copy_to_udata failed\n"); 1522 return ret; 1523 } 1524 } 1525 } 1526 1527 return 0; 1528 exit: 1529 spin_unlock_irqrestore(&iwqp->lock, flags); 1530 1531 return ret; 1532 } 1533 1534 /** 1535 * irdma_modify_qp - modify qp request 1536 * @ibqp: qp's pointer for modify 1537 * @attr: access attributes 1538 * @attr_mask: state mask 1539 * @udata: user data 1540 */ 1541 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, 1542 struct ib_udata *udata) 1543 { 1544 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush) 1545 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid) 1546 struct irdma_qp *iwqp = to_iwqp(ibqp); 1547 struct irdma_device *iwdev = iwqp->iwdev; 1548 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 1549 struct irdma_qp_host_ctx_info *ctx_info; 1550 struct irdma_tcp_offload_info *tcp_info; 1551 struct irdma_iwarp_offload_info *offload_info; 1552 struct irdma_modify_qp_info info = {}; 1553 struct irdma_modify_qp_resp uresp = {}; 1554 struct irdma_modify_qp_req ureq = {}; 1555 u8 issue_modify_qp = 0; 1556 u8 dont_wait = 0; 1557 int err; 1558 unsigned long flags; 1559 1560 if (udata) { 1561 /* udata inlen/outlen can be 0 when supporting legacy libi40iw */ 1562 if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) || 1563 (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN)) 1564 return -EINVAL; 1565 } 1566 1567 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) 1568 return -EOPNOTSUPP; 1569 1570 ctx_info = &iwqp->ctx_info; 1571 offload_info = &iwqp->iwarp_info; 1572 tcp_info = &iwqp->tcp_info; 1573 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend)); 1574 ibdev_dbg(&iwdev->ibdev, 1575 "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n", 1576 __builtin_return_address(0), ibqp->qp_num, attr->qp_state, 1577 iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq, 1578 iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask); 1579 1580 spin_lock_irqsave(&iwqp->lock, flags); 1581 if (attr_mask & IB_QP_STATE) { 1582 info.curr_iwarp_state = iwqp->iwarp_state; 1583 switch (attr->qp_state) { 1584 case IB_QPS_INIT: 1585 case IB_QPS_RTR: 1586 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1587 err = -EINVAL; 1588 goto exit; 1589 } 1590 1591 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) { 1592 info.next_iwarp_state = IRDMA_QP_STATE_IDLE; 1593 issue_modify_qp = 1; 1594 } 1595 if (iwdev->push_mode && udata && 1596 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX && 1597 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1598 spin_unlock_irqrestore(&iwqp->lock, flags); 1599 irdma_alloc_push_page(iwqp); 1600 spin_lock_irqsave(&iwqp->lock, flags); 1601 } 1602 break; 1603 case IB_QPS_RTS: 1604 if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS || 1605 !iwqp->cm_id) { 1606 err = -EINVAL; 1607 goto exit; 1608 } 1609 1610 issue_modify_qp = 1; 1611 iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED; 1612 iwqp->hte_added = 1; 1613 info.next_iwarp_state = IRDMA_QP_STATE_RTS; 1614 info.tcp_ctx_valid = true; 1615 info.ord_valid = true; 1616 info.arp_cache_idx_valid = true; 1617 info.cq_num_valid = true; 1618 break; 1619 case IB_QPS_SQD: 1620 if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) { 1621 err = 0; 1622 goto exit; 1623 } 1624 1625 if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING || 1626 iwqp->iwarp_state < IRDMA_QP_STATE_RTS) { 1627 err = 0; 1628 goto exit; 1629 } 1630 1631 if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) { 1632 err = -EINVAL; 1633 goto exit; 1634 } 1635 1636 info.next_iwarp_state = IRDMA_QP_STATE_CLOSING; 1637 issue_modify_qp = 1; 1638 break; 1639 case IB_QPS_SQE: 1640 if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) { 1641 err = -EINVAL; 1642 goto exit; 1643 } 1644 1645 info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE; 1646 issue_modify_qp = 1; 1647 break; 1648 case IB_QPS_ERR: 1649 case IB_QPS_RESET: 1650 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) { 1651 spin_unlock_irqrestore(&iwqp->lock, flags); 1652 if (udata && udata->inlen) { 1653 if (ib_copy_from_udata(&ureq, udata, 1654 min(sizeof(ureq), udata->inlen))) 1655 return -EINVAL; 1656 1657 irdma_flush_wqes(iwqp, 1658 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) | 1659 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) | 1660 IRDMA_REFLUSH); 1661 } 1662 return 0; 1663 } 1664 1665 if (iwqp->sc_qp.term_flags) { 1666 spin_unlock_irqrestore(&iwqp->lock, flags); 1667 irdma_terminate_del_timer(&iwqp->sc_qp); 1668 spin_lock_irqsave(&iwqp->lock, flags); 1669 } 1670 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1671 if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED && 1672 iwdev->iw_status && 1673 iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT) 1674 info.reset_tcp_conn = true; 1675 else 1676 dont_wait = 1; 1677 1678 issue_modify_qp = 1; 1679 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1680 break; 1681 default: 1682 err = -EINVAL; 1683 goto exit; 1684 } 1685 1686 iwqp->ibqp_state = attr->qp_state; 1687 } 1688 if (attr_mask & IB_QP_ACCESS_FLAGS) { 1689 ctx_info->iwarp_info_valid = true; 1690 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) 1691 offload_info->wr_rdresp_en = true; 1692 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 1693 offload_info->wr_rdresp_en = true; 1694 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 1695 offload_info->rd_en = true; 1696 } 1697 1698 if (ctx_info->iwarp_info_valid) { 1699 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 1700 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 1701 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 1702 } 1703 spin_unlock_irqrestore(&iwqp->lock, flags); 1704 1705 if (attr_mask & IB_QP_STATE) { 1706 if (issue_modify_qp) { 1707 ctx_info->rem_endpoint_idx = tcp_info->arp_idx; 1708 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true)) 1709 return -EINVAL; 1710 } 1711 1712 spin_lock_irqsave(&iwqp->lock, flags); 1713 if (iwqp->iwarp_state == info.curr_iwarp_state) { 1714 iwqp->iwarp_state = info.next_iwarp_state; 1715 iwqp->ibqp_state = attr->qp_state; 1716 } 1717 spin_unlock_irqrestore(&iwqp->lock, flags); 1718 } 1719 1720 if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) { 1721 if (dont_wait) { 1722 if (iwqp->hw_tcp_state) { 1723 spin_lock_irqsave(&iwqp->lock, flags); 1724 iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED; 1725 iwqp->last_aeq = IRDMA_AE_RESET_SENT; 1726 spin_unlock_irqrestore(&iwqp->lock, flags); 1727 } 1728 irdma_cm_disconn(iwqp); 1729 } else { 1730 int close_timer_started; 1731 1732 spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags); 1733 1734 if (iwqp->cm_node) { 1735 refcount_inc(&iwqp->cm_node->refcnt); 1736 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags); 1737 close_timer_started = atomic_inc_return(&iwqp->close_timer_started); 1738 if (iwqp->cm_id && close_timer_started == 1) 1739 irdma_schedule_cm_timer(iwqp->cm_node, 1740 (struct irdma_puda_buf *)iwqp, 1741 IRDMA_TIMER_TYPE_CLOSE, 1, 0); 1742 1743 irdma_rem_ref_cm_node(iwqp->cm_node); 1744 } else { 1745 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags); 1746 } 1747 } 1748 } 1749 if (attr_mask & IB_QP_STATE && udata && udata->outlen && 1750 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1751 struct irdma_ucontext *ucontext; 1752 1753 ucontext = rdma_udata_to_drv_context(udata, 1754 struct irdma_ucontext, ibucontext); 1755 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX && 1756 !iwqp->push_wqe_mmap_entry && 1757 !irdma_setup_push_mmap_entries(ucontext, iwqp, 1758 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) { 1759 uresp.push_valid = 1; 1760 uresp.push_offset = iwqp->sc_qp.push_offset; 1761 } 1762 1763 err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), 1764 udata->outlen)); 1765 if (err) { 1766 irdma_remove_push_mmap_entries(iwqp); 1767 ibdev_dbg(&iwdev->ibdev, 1768 "VERBS: copy_to_udata failed\n"); 1769 return err; 1770 } 1771 } 1772 1773 return 0; 1774 exit: 1775 spin_unlock_irqrestore(&iwqp->lock, flags); 1776 1777 return err; 1778 } 1779 1780 /** 1781 * irdma_cq_free_rsrc - free up resources for cq 1782 * @rf: RDMA PCI function 1783 * @iwcq: cq ptr 1784 */ 1785 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq) 1786 { 1787 struct irdma_sc_cq *cq = &iwcq->sc_cq; 1788 1789 if (!iwcq->user_mode) { 1790 dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size, 1791 iwcq->kmem.va, iwcq->kmem.pa); 1792 iwcq->kmem.va = NULL; 1793 dma_free_coherent(rf->sc_dev.hw->device, 1794 iwcq->kmem_shadow.size, 1795 iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa); 1796 iwcq->kmem_shadow.va = NULL; 1797 } 1798 1799 irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id); 1800 } 1801 1802 /** 1803 * irdma_free_cqbuf - worker to free a cq buffer 1804 * @work: provides access to the cq buffer to free 1805 */ 1806 static void irdma_free_cqbuf(struct work_struct *work) 1807 { 1808 struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work); 1809 1810 dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size, 1811 cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa); 1812 cq_buf->kmem_buf.va = NULL; 1813 kfree(cq_buf); 1814 } 1815 1816 /** 1817 * irdma_process_resize_list - remove resized cq buffers from the resize_list 1818 * @iwcq: cq which owns the resize_list 1819 * @iwdev: irdma device 1820 * @lcqe_buf: the buffer where the last cqe is received 1821 */ 1822 static int irdma_process_resize_list(struct irdma_cq *iwcq, 1823 struct irdma_device *iwdev, 1824 struct irdma_cq_buf *lcqe_buf) 1825 { 1826 struct list_head *tmp_node, *list_node; 1827 struct irdma_cq_buf *cq_buf; 1828 int cnt = 0; 1829 1830 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) { 1831 cq_buf = list_entry(list_node, struct irdma_cq_buf, list); 1832 if (cq_buf == lcqe_buf) 1833 return cnt; 1834 1835 list_del(&cq_buf->list); 1836 queue_work(iwdev->cleanup_wq, &cq_buf->work); 1837 cnt++; 1838 } 1839 1840 return cnt; 1841 } 1842 1843 /** 1844 * irdma_destroy_cq - destroy cq 1845 * @ib_cq: cq pointer 1846 * @udata: user data 1847 */ 1848 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata) 1849 { 1850 struct irdma_device *iwdev = to_iwdev(ib_cq->device); 1851 struct irdma_cq *iwcq = to_iwcq(ib_cq); 1852 struct irdma_sc_cq *cq = &iwcq->sc_cq; 1853 struct irdma_sc_dev *dev = cq->dev; 1854 struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id]; 1855 struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq); 1856 unsigned long flags; 1857 1858 spin_lock_irqsave(&iwcq->lock, flags); 1859 if (!list_empty(&iwcq->cmpl_generated)) 1860 irdma_remove_cmpls_list(iwcq); 1861 if (!list_empty(&iwcq->resize_list)) 1862 irdma_process_resize_list(iwcq, iwdev, NULL); 1863 spin_unlock_irqrestore(&iwcq->lock, flags); 1864 1865 irdma_cq_rem_ref(ib_cq); 1866 wait_for_completion(&iwcq->free_cq); 1867 1868 irdma_cq_wq_destroy(iwdev->rf, cq); 1869 1870 spin_lock_irqsave(&iwceq->ce_lock, flags); 1871 irdma_sc_cleanup_ceqes(cq, ceq); 1872 spin_unlock_irqrestore(&iwceq->ce_lock, flags); 1873 irdma_cq_free_rsrc(iwdev->rf, iwcq); 1874 1875 return 0; 1876 } 1877 1878 /** 1879 * irdma_resize_cq - resize cq 1880 * @ibcq: cq to be resized 1881 * @entries: desired cq size 1882 * @udata: user data 1883 */ 1884 static int irdma_resize_cq(struct ib_cq *ibcq, int entries, 1885 struct ib_udata *udata) 1886 { 1887 #define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer) 1888 struct irdma_cq *iwcq = to_iwcq(ibcq); 1889 struct irdma_sc_dev *dev = iwcq->sc_cq.dev; 1890 struct irdma_cqp_request *cqp_request; 1891 struct cqp_cmds_info *cqp_info; 1892 struct irdma_modify_cq_info *m_info; 1893 struct irdma_modify_cq_info info = {}; 1894 struct irdma_dma_mem kmem_buf; 1895 struct irdma_cq_mr *cqmr_buf; 1896 struct irdma_pbl *iwpbl_buf; 1897 struct irdma_device *iwdev; 1898 struct irdma_pci_f *rf; 1899 struct irdma_cq_buf *cq_buf = NULL; 1900 unsigned long flags; 1901 int ret; 1902 1903 iwdev = to_iwdev(ibcq->device); 1904 rf = iwdev->rf; 1905 1906 if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags & 1907 IRDMA_FEATURE_CQ_RESIZE)) 1908 return -EOPNOTSUPP; 1909 1910 if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN) 1911 return -EINVAL; 1912 1913 if (entries > rf->max_cqe) 1914 return -EINVAL; 1915 1916 if (!iwcq->user_mode) { 1917 entries++; 1918 if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 1919 entries *= 2; 1920 } 1921 1922 info.cq_size = max(entries, 4); 1923 1924 if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1) 1925 return 0; 1926 1927 if (udata) { 1928 struct irdma_resize_cq_req req = {}; 1929 struct irdma_ucontext *ucontext = 1930 rdma_udata_to_drv_context(udata, struct irdma_ucontext, 1931 ibucontext); 1932 1933 /* CQ resize not supported with legacy GEN_1 libi40iw */ 1934 if (ucontext->legacy_mode) 1935 return -EOPNOTSUPP; 1936 1937 if (ib_copy_from_udata(&req, udata, 1938 min(sizeof(req), udata->inlen))) 1939 return -EINVAL; 1940 1941 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 1942 iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer, 1943 &ucontext->cq_reg_mem_list); 1944 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 1945 1946 if (!iwpbl_buf) 1947 return -ENOMEM; 1948 1949 cqmr_buf = &iwpbl_buf->cq_mr; 1950 if (iwpbl_buf->pbl_allocated) { 1951 info.virtual_map = true; 1952 info.pbl_chunk_size = 1; 1953 info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx; 1954 } else { 1955 info.cq_pa = cqmr_buf->cq_pbl.addr; 1956 } 1957 } else { 1958 /* Kmode CQ resize */ 1959 int rsize; 1960 1961 rsize = info.cq_size * sizeof(struct irdma_cqe); 1962 kmem_buf.size = ALIGN(round_up(rsize, 256), 256); 1963 kmem_buf.va = dma_alloc_coherent(dev->hw->device, 1964 kmem_buf.size, &kmem_buf.pa, 1965 GFP_KERNEL); 1966 if (!kmem_buf.va) 1967 return -ENOMEM; 1968 1969 info.cq_base = kmem_buf.va; 1970 info.cq_pa = kmem_buf.pa; 1971 cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL); 1972 if (!cq_buf) { 1973 ret = -ENOMEM; 1974 goto error; 1975 } 1976 } 1977 1978 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 1979 if (!cqp_request) { 1980 ret = -ENOMEM; 1981 goto error; 1982 } 1983 1984 info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold; 1985 info.cq_resize = true; 1986 1987 cqp_info = &cqp_request->info; 1988 m_info = &cqp_info->in.u.cq_modify.info; 1989 memcpy(m_info, &info, sizeof(*m_info)); 1990 1991 cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY; 1992 cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq; 1993 cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request; 1994 cqp_info->post_sq = 1; 1995 ret = irdma_handle_cqp_op(rf, cqp_request); 1996 irdma_put_cqp_request(&rf->cqp, cqp_request); 1997 if (ret) 1998 goto error; 1999 2000 spin_lock_irqsave(&iwcq->lock, flags); 2001 if (cq_buf) { 2002 cq_buf->kmem_buf = iwcq->kmem; 2003 cq_buf->hw = dev->hw; 2004 memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk)); 2005 INIT_WORK(&cq_buf->work, irdma_free_cqbuf); 2006 list_add_tail(&cq_buf->list, &iwcq->resize_list); 2007 iwcq->kmem = kmem_buf; 2008 } 2009 2010 irdma_sc_cq_resize(&iwcq->sc_cq, &info); 2011 ibcq->cqe = info.cq_size - 1; 2012 spin_unlock_irqrestore(&iwcq->lock, flags); 2013 2014 return 0; 2015 error: 2016 if (!udata) { 2017 dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va, 2018 kmem_buf.pa); 2019 kmem_buf.va = NULL; 2020 } 2021 kfree(cq_buf); 2022 2023 return ret; 2024 } 2025 2026 static inline int cq_validate_flags(u32 flags, u8 hw_rev) 2027 { 2028 /* GEN1 does not support CQ create flags */ 2029 if (hw_rev == IRDMA_GEN_1) 2030 return flags ? -EOPNOTSUPP : 0; 2031 2032 return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0; 2033 } 2034 2035 /** 2036 * irdma_create_cq - create cq 2037 * @ibcq: CQ allocated 2038 * @attr: attributes for cq 2039 * @udata: user data 2040 */ 2041 static int irdma_create_cq(struct ib_cq *ibcq, 2042 const struct ib_cq_init_attr *attr, 2043 struct ib_udata *udata) 2044 { 2045 #define IRDMA_CREATE_CQ_MIN_REQ_LEN offsetofend(struct irdma_create_cq_req, user_cq_buf) 2046 #define IRDMA_CREATE_CQ_MIN_RESP_LEN offsetofend(struct irdma_create_cq_resp, cq_size) 2047 struct ib_device *ibdev = ibcq->device; 2048 struct irdma_device *iwdev = to_iwdev(ibdev); 2049 struct irdma_pci_f *rf = iwdev->rf; 2050 struct irdma_cq *iwcq = to_iwcq(ibcq); 2051 u32 cq_num = 0; 2052 struct irdma_sc_cq *cq; 2053 struct irdma_sc_dev *dev = &rf->sc_dev; 2054 struct irdma_cq_init_info info = {}; 2055 struct irdma_cqp_request *cqp_request; 2056 struct cqp_cmds_info *cqp_info; 2057 struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info; 2058 unsigned long flags; 2059 int err_code; 2060 int entries = attr->cqe; 2061 2062 err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev); 2063 if (err_code) 2064 return err_code; 2065 2066 if (udata && (udata->inlen < IRDMA_CREATE_CQ_MIN_REQ_LEN || 2067 udata->outlen < IRDMA_CREATE_CQ_MIN_RESP_LEN)) 2068 return -EINVAL; 2069 2070 err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num, 2071 &rf->next_cq); 2072 if (err_code) 2073 return err_code; 2074 2075 cq = &iwcq->sc_cq; 2076 cq->back_cq = iwcq; 2077 refcount_set(&iwcq->refcnt, 1); 2078 spin_lock_init(&iwcq->lock); 2079 INIT_LIST_HEAD(&iwcq->resize_list); 2080 INIT_LIST_HEAD(&iwcq->cmpl_generated); 2081 info.dev = dev; 2082 ukinfo->cq_size = max(entries, 4); 2083 ukinfo->cq_id = cq_num; 2084 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size; 2085 if (attr->comp_vector < rf->ceqs_count) 2086 info.ceq_id = attr->comp_vector; 2087 info.ceq_id_valid = true; 2088 info.ceqe_mask = 1; 2089 info.type = IRDMA_CQ_TYPE_IWARP; 2090 info.vsi = &iwdev->vsi; 2091 2092 if (udata) { 2093 struct irdma_ucontext *ucontext; 2094 struct irdma_create_cq_req req = {}; 2095 struct irdma_cq_mr *cqmr; 2096 struct irdma_pbl *iwpbl; 2097 struct irdma_pbl *iwpbl_shadow; 2098 struct irdma_cq_mr *cqmr_shadow; 2099 2100 iwcq->user_mode = true; 2101 ucontext = 2102 rdma_udata_to_drv_context(udata, struct irdma_ucontext, 2103 ibucontext); 2104 if (ib_copy_from_udata(&req, udata, 2105 min(sizeof(req), udata->inlen))) { 2106 err_code = -EFAULT; 2107 goto cq_free_rsrc; 2108 } 2109 2110 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2111 iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf, 2112 &ucontext->cq_reg_mem_list); 2113 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2114 if (!iwpbl) { 2115 err_code = -EPROTO; 2116 goto cq_free_rsrc; 2117 } 2118 2119 iwcq->iwpbl = iwpbl; 2120 iwcq->cq_mem_size = 0; 2121 cqmr = &iwpbl->cq_mr; 2122 2123 if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags & 2124 IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) { 2125 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2126 iwpbl_shadow = irdma_get_pbl( 2127 (unsigned long)req.user_shadow_area, 2128 &ucontext->cq_reg_mem_list); 2129 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2130 2131 if (!iwpbl_shadow) { 2132 err_code = -EPROTO; 2133 goto cq_free_rsrc; 2134 } 2135 iwcq->iwpbl_shadow = iwpbl_shadow; 2136 cqmr_shadow = &iwpbl_shadow->cq_mr; 2137 info.shadow_area_pa = cqmr_shadow->cq_pbl.addr; 2138 cqmr->split = true; 2139 } else { 2140 info.shadow_area_pa = cqmr->shadow; 2141 } 2142 if (iwpbl->pbl_allocated) { 2143 info.virtual_map = true; 2144 info.pbl_chunk_size = 1; 2145 info.first_pm_pbl_idx = cqmr->cq_pbl.idx; 2146 } else { 2147 info.cq_base_pa = cqmr->cq_pbl.addr; 2148 } 2149 } else { 2150 /* Kmode allocations */ 2151 int rsize; 2152 2153 if (entries < 1 || entries > rf->max_cqe) { 2154 err_code = -EINVAL; 2155 goto cq_free_rsrc; 2156 } 2157 2158 entries++; 2159 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 2160 entries *= 2; 2161 ukinfo->cq_size = entries; 2162 2163 rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe); 2164 iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256); 2165 iwcq->kmem.va = dma_alloc_coherent(dev->hw->device, 2166 iwcq->kmem.size, 2167 &iwcq->kmem.pa, GFP_KERNEL); 2168 if (!iwcq->kmem.va) { 2169 err_code = -ENOMEM; 2170 goto cq_free_rsrc; 2171 } 2172 2173 iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3, 2174 64); 2175 iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device, 2176 iwcq->kmem_shadow.size, 2177 &iwcq->kmem_shadow.pa, 2178 GFP_KERNEL); 2179 if (!iwcq->kmem_shadow.va) { 2180 err_code = -ENOMEM; 2181 goto cq_free_rsrc; 2182 } 2183 info.shadow_area_pa = iwcq->kmem_shadow.pa; 2184 ukinfo->shadow_area = iwcq->kmem_shadow.va; 2185 ukinfo->cq_base = iwcq->kmem.va; 2186 info.cq_base_pa = iwcq->kmem.pa; 2187 } 2188 2189 info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2, 2190 (u32)IRDMA_MAX_CQ_READ_THRESH); 2191 2192 if (irdma_sc_cq_init(cq, &info)) { 2193 ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n"); 2194 err_code = -EPROTO; 2195 goto cq_free_rsrc; 2196 } 2197 2198 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 2199 if (!cqp_request) { 2200 err_code = -ENOMEM; 2201 goto cq_free_rsrc; 2202 } 2203 2204 cqp_info = &cqp_request->info; 2205 cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE; 2206 cqp_info->post_sq = 1; 2207 cqp_info->in.u.cq_create.cq = cq; 2208 cqp_info->in.u.cq_create.check_overflow = true; 2209 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request; 2210 err_code = irdma_handle_cqp_op(rf, cqp_request); 2211 irdma_put_cqp_request(&rf->cqp, cqp_request); 2212 if (err_code) 2213 goto cq_free_rsrc; 2214 2215 if (udata) { 2216 struct irdma_create_cq_resp resp = {}; 2217 2218 resp.cq_id = info.cq_uk_init_info.cq_id; 2219 resp.cq_size = info.cq_uk_init_info.cq_size; 2220 if (ib_copy_to_udata(udata, &resp, 2221 min(sizeof(resp), udata->outlen))) { 2222 ibdev_dbg(&iwdev->ibdev, 2223 "VERBS: copy to user data\n"); 2224 err_code = -EPROTO; 2225 goto cq_destroy; 2226 } 2227 } 2228 rf->cq_table[cq_num] = iwcq; 2229 init_completion(&iwcq->free_cq); 2230 2231 return 0; 2232 cq_destroy: 2233 irdma_cq_wq_destroy(rf, cq); 2234 cq_free_rsrc: 2235 irdma_cq_free_rsrc(rf, iwcq); 2236 2237 return err_code; 2238 } 2239 2240 /** 2241 * irdma_get_mr_access - get hw MR access permissions from IB access flags 2242 * @access: IB access flags 2243 */ 2244 static inline u16 irdma_get_mr_access(int access) 2245 { 2246 u16 hw_access = 0; 2247 2248 hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ? 2249 IRDMA_ACCESS_FLAGS_LOCALWRITE : 0; 2250 hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ? 2251 IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0; 2252 hw_access |= (access & IB_ACCESS_REMOTE_READ) ? 2253 IRDMA_ACCESS_FLAGS_REMOTEREAD : 0; 2254 hw_access |= (access & IB_ACCESS_MW_BIND) ? 2255 IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0; 2256 hw_access |= (access & IB_ZERO_BASED) ? 2257 IRDMA_ACCESS_FLAGS_ZERO_BASED : 0; 2258 hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD; 2259 2260 return hw_access; 2261 } 2262 2263 /** 2264 * irdma_free_stag - free stag resource 2265 * @iwdev: irdma device 2266 * @stag: stag to free 2267 */ 2268 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag) 2269 { 2270 u32 stag_idx; 2271 2272 stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S; 2273 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx); 2274 } 2275 2276 /** 2277 * irdma_create_stag - create random stag 2278 * @iwdev: irdma device 2279 */ 2280 static u32 irdma_create_stag(struct irdma_device *iwdev) 2281 { 2282 u32 stag = 0; 2283 u32 stag_index = 0; 2284 u32 next_stag_index; 2285 u32 driver_key; 2286 u32 random; 2287 u8 consumer_key; 2288 int ret; 2289 2290 get_random_bytes(&random, sizeof(random)); 2291 consumer_key = (u8)random; 2292 2293 driver_key = random & ~iwdev->rf->mr_stagmask; 2294 next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8; 2295 next_stag_index %= iwdev->rf->max_mr; 2296 2297 ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, 2298 iwdev->rf->max_mr, &stag_index, 2299 &next_stag_index); 2300 if (ret) 2301 return stag; 2302 stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S; 2303 stag |= driver_key; 2304 stag += (u32)consumer_key; 2305 2306 return stag; 2307 } 2308 2309 /** 2310 * irdma_next_pbl_addr - Get next pbl address 2311 * @pbl: pointer to a pble 2312 * @pinfo: info pointer 2313 * @idx: index 2314 */ 2315 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo, 2316 u32 *idx) 2317 { 2318 *idx += 1; 2319 if (!(*pinfo) || *idx != (*pinfo)->cnt) 2320 return ++pbl; 2321 *idx = 0; 2322 (*pinfo)++; 2323 2324 return (*pinfo)->addr; 2325 } 2326 2327 /** 2328 * irdma_copy_user_pgaddrs - copy user page address to pble's os locally 2329 * @iwmr: iwmr for IB's user page addresses 2330 * @pbl: ple pointer to save 1 level or 0 level pble 2331 * @level: indicated level 0, 1 or 2 2332 */ 2333 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl, 2334 enum irdma_pble_level level) 2335 { 2336 struct ib_umem *region = iwmr->region; 2337 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2338 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2339 struct irdma_pble_info *pinfo; 2340 struct ib_block_iter biter; 2341 u32 idx = 0; 2342 u32 pbl_cnt = 0; 2343 2344 pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf; 2345 2346 if (iwmr->type == IRDMA_MEMREG_TYPE_QP) 2347 iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl); 2348 2349 rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) { 2350 *pbl = rdma_block_iter_dma_address(&biter); 2351 if (++pbl_cnt == palloc->total_cnt) 2352 break; 2353 pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx); 2354 } 2355 } 2356 2357 /** 2358 * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous 2359 * @arr: lvl1 pbl array 2360 * @npages: page count 2361 * @pg_size: page size 2362 * 2363 */ 2364 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size) 2365 { 2366 u32 pg_idx; 2367 2368 for (pg_idx = 0; pg_idx < npages; pg_idx++) { 2369 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx]) 2370 return false; 2371 } 2372 2373 return true; 2374 } 2375 2376 /** 2377 * irdma_check_mr_contiguous - check if MR is physically contiguous 2378 * @palloc: pbl allocation struct 2379 * @pg_size: page size 2380 */ 2381 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc, 2382 u32 pg_size) 2383 { 2384 struct irdma_pble_level2 *lvl2 = &palloc->level2; 2385 struct irdma_pble_info *leaf = lvl2->leaf; 2386 u64 *arr = NULL; 2387 u64 *start_addr = NULL; 2388 int i; 2389 bool ret; 2390 2391 if (palloc->level == PBLE_LEVEL_1) { 2392 arr = palloc->level1.addr; 2393 ret = irdma_check_mem_contiguous(arr, palloc->total_cnt, 2394 pg_size); 2395 return ret; 2396 } 2397 2398 start_addr = leaf->addr; 2399 2400 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) { 2401 arr = leaf->addr; 2402 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr) 2403 return false; 2404 ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size); 2405 if (!ret) 2406 return false; 2407 } 2408 2409 return true; 2410 } 2411 2412 /** 2413 * irdma_setup_pbles - copy user pg address to pble's 2414 * @rf: RDMA PCI function 2415 * @iwmr: mr pointer for this memory registration 2416 * @lvl: requested pble levels 2417 */ 2418 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr, 2419 u8 lvl) 2420 { 2421 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2422 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2423 struct irdma_pble_info *pinfo; 2424 u64 *pbl; 2425 int status; 2426 enum irdma_pble_level level = PBLE_LEVEL_1; 2427 2428 if (lvl) { 2429 status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt, 2430 lvl); 2431 if (status) 2432 return status; 2433 2434 iwpbl->pbl_allocated = true; 2435 level = palloc->level; 2436 pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 : 2437 palloc->level2.leaf; 2438 pbl = pinfo->addr; 2439 } else { 2440 pbl = iwmr->pgaddrmem; 2441 } 2442 2443 irdma_copy_user_pgaddrs(iwmr, pbl, level); 2444 2445 if (lvl) 2446 iwmr->pgaddrmem[0] = *pbl; 2447 2448 return 0; 2449 } 2450 2451 /** 2452 * irdma_handle_q_mem - handle memory for qp and cq 2453 * @iwdev: irdma device 2454 * @req: information for q memory management 2455 * @iwpbl: pble struct 2456 * @lvl: pble level mask 2457 */ 2458 static int irdma_handle_q_mem(struct irdma_device *iwdev, 2459 struct irdma_mem_reg_req *req, 2460 struct irdma_pbl *iwpbl, u8 lvl) 2461 { 2462 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2463 struct irdma_mr *iwmr = iwpbl->iwmr; 2464 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr; 2465 struct irdma_cq_mr *cqmr = &iwpbl->cq_mr; 2466 struct irdma_hmc_pble *hmc_p; 2467 u64 *arr = iwmr->pgaddrmem; 2468 u32 pg_size, total; 2469 int err = 0; 2470 bool ret = true; 2471 2472 pg_size = iwmr->page_size; 2473 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 2474 if (err) 2475 return err; 2476 2477 if (lvl) 2478 arr = palloc->level1.addr; 2479 2480 switch (iwmr->type) { 2481 case IRDMA_MEMREG_TYPE_QP: 2482 total = req->sq_pages + req->rq_pages; 2483 hmc_p = &qpmr->sq_pbl; 2484 qpmr->shadow = (dma_addr_t)arr[total]; 2485 2486 if (lvl) { 2487 ret = irdma_check_mem_contiguous(arr, req->sq_pages, 2488 pg_size); 2489 if (ret) 2490 ret = irdma_check_mem_contiguous(&arr[req->sq_pages], 2491 req->rq_pages, 2492 pg_size); 2493 } 2494 2495 if (!ret) { 2496 hmc_p->idx = palloc->level1.idx; 2497 hmc_p = &qpmr->rq_pbl; 2498 hmc_p->idx = palloc->level1.idx + req->sq_pages; 2499 } else { 2500 hmc_p->addr = arr[0]; 2501 hmc_p = &qpmr->rq_pbl; 2502 hmc_p->addr = arr[req->sq_pages]; 2503 } 2504 break; 2505 case IRDMA_MEMREG_TYPE_CQ: 2506 hmc_p = &cqmr->cq_pbl; 2507 2508 if (!cqmr->split) 2509 cqmr->shadow = (dma_addr_t)arr[req->cq_pages]; 2510 2511 if (lvl) 2512 ret = irdma_check_mem_contiguous(arr, req->cq_pages, 2513 pg_size); 2514 2515 if (!ret) 2516 hmc_p->idx = palloc->level1.idx; 2517 else 2518 hmc_p->addr = arr[0]; 2519 break; 2520 default: 2521 ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n"); 2522 err = -EINVAL; 2523 } 2524 2525 if (lvl && ret) { 2526 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2527 iwpbl->pbl_allocated = false; 2528 } 2529 2530 return err; 2531 } 2532 2533 /** 2534 * irdma_hw_alloc_mw - create the hw memory window 2535 * @iwdev: irdma device 2536 * @iwmr: pointer to memory window info 2537 */ 2538 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr) 2539 { 2540 struct irdma_mw_alloc_info *info; 2541 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd); 2542 struct irdma_cqp_request *cqp_request; 2543 struct cqp_cmds_info *cqp_info; 2544 int status; 2545 2546 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2547 if (!cqp_request) 2548 return -ENOMEM; 2549 2550 cqp_info = &cqp_request->info; 2551 info = &cqp_info->in.u.mw_alloc.info; 2552 memset(info, 0, sizeof(*info)); 2553 if (iwmr->ibmw.type == IB_MW_TYPE_1) 2554 info->mw_wide = true; 2555 2556 info->page_size = PAGE_SIZE; 2557 info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2558 info->pd_id = iwpd->sc_pd.pd_id; 2559 info->remote_access = true; 2560 cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC; 2561 cqp_info->post_sq = 1; 2562 cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev; 2563 cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request; 2564 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2565 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2566 2567 return status; 2568 } 2569 2570 /** 2571 * irdma_alloc_mw - Allocate memory window 2572 * @ibmw: Memory Window 2573 * @udata: user data pointer 2574 */ 2575 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata) 2576 { 2577 struct irdma_device *iwdev = to_iwdev(ibmw->device); 2578 struct irdma_mr *iwmr = to_iwmw(ibmw); 2579 int err_code; 2580 u32 stag; 2581 2582 stag = irdma_create_stag(iwdev); 2583 if (!stag) 2584 return -ENOMEM; 2585 2586 iwmr->stag = stag; 2587 ibmw->rkey = stag; 2588 2589 err_code = irdma_hw_alloc_mw(iwdev, iwmr); 2590 if (err_code) { 2591 irdma_free_stag(iwdev, stag); 2592 return err_code; 2593 } 2594 2595 return 0; 2596 } 2597 2598 /** 2599 * irdma_dealloc_mw - Dealloc memory window 2600 * @ibmw: memory window structure. 2601 */ 2602 static int irdma_dealloc_mw(struct ib_mw *ibmw) 2603 { 2604 struct ib_pd *ibpd = ibmw->pd; 2605 struct irdma_pd *iwpd = to_iwpd(ibpd); 2606 struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw); 2607 struct irdma_device *iwdev = to_iwdev(ibmw->device); 2608 struct irdma_cqp_request *cqp_request; 2609 struct cqp_cmds_info *cqp_info; 2610 struct irdma_dealloc_stag_info *info; 2611 2612 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2613 if (!cqp_request) 2614 return -ENOMEM; 2615 2616 cqp_info = &cqp_request->info; 2617 info = &cqp_info->in.u.dealloc_stag.info; 2618 memset(info, 0, sizeof(*info)); 2619 info->pd_id = iwpd->sc_pd.pd_id; 2620 info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S; 2621 info->mr = false; 2622 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG; 2623 cqp_info->post_sq = 1; 2624 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev; 2625 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; 2626 irdma_handle_cqp_op(iwdev->rf, cqp_request); 2627 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2628 irdma_free_stag(iwdev, iwmr->stag); 2629 2630 return 0; 2631 } 2632 2633 /** 2634 * irdma_hw_alloc_stag - cqp command to allocate stag 2635 * @iwdev: irdma device 2636 * @iwmr: irdma mr pointer 2637 */ 2638 static int irdma_hw_alloc_stag(struct irdma_device *iwdev, 2639 struct irdma_mr *iwmr) 2640 { 2641 struct irdma_allocate_stag_info *info; 2642 struct ib_pd *pd = iwmr->ibmr.pd; 2643 struct irdma_pd *iwpd = to_iwpd(pd); 2644 int status; 2645 struct irdma_cqp_request *cqp_request; 2646 struct cqp_cmds_info *cqp_info; 2647 2648 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2649 if (!cqp_request) 2650 return -ENOMEM; 2651 2652 cqp_info = &cqp_request->info; 2653 info = &cqp_info->in.u.alloc_stag.info; 2654 memset(info, 0, sizeof(*info)); 2655 info->page_size = PAGE_SIZE; 2656 info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2657 info->pd_id = iwpd->sc_pd.pd_id; 2658 info->total_len = iwmr->len; 2659 info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY; 2660 info->remote_access = true; 2661 cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG; 2662 cqp_info->post_sq = 1; 2663 cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev; 2664 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request; 2665 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2666 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2667 2668 return status; 2669 } 2670 2671 /** 2672 * irdma_alloc_mr - register stag for fast memory registration 2673 * @pd: ibpd pointer 2674 * @mr_type: memory for stag registrion 2675 * @max_num_sg: man number of pages 2676 */ 2677 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, 2678 u32 max_num_sg) 2679 { 2680 struct irdma_device *iwdev = to_iwdev(pd->device); 2681 struct irdma_pble_alloc *palloc; 2682 struct irdma_pbl *iwpbl; 2683 struct irdma_mr *iwmr; 2684 u32 stag; 2685 int err_code; 2686 2687 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 2688 if (!iwmr) 2689 return ERR_PTR(-ENOMEM); 2690 2691 stag = irdma_create_stag(iwdev); 2692 if (!stag) { 2693 err_code = -ENOMEM; 2694 goto err; 2695 } 2696 2697 iwmr->stag = stag; 2698 iwmr->ibmr.rkey = stag; 2699 iwmr->ibmr.lkey = stag; 2700 iwmr->ibmr.pd = pd; 2701 iwmr->ibmr.device = pd->device; 2702 iwpbl = &iwmr->iwpbl; 2703 iwpbl->iwmr = iwmr; 2704 iwmr->type = IRDMA_MEMREG_TYPE_MEM; 2705 palloc = &iwpbl->pble_alloc; 2706 iwmr->page_cnt = max_num_sg; 2707 /* Use system PAGE_SIZE as the sg page sizes are unknown at this point */ 2708 iwmr->len = max_num_sg * PAGE_SIZE; 2709 err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt, 2710 false); 2711 if (err_code) 2712 goto err_get_pble; 2713 2714 err_code = irdma_hw_alloc_stag(iwdev, iwmr); 2715 if (err_code) 2716 goto err_alloc_stag; 2717 2718 iwpbl->pbl_allocated = true; 2719 2720 return &iwmr->ibmr; 2721 err_alloc_stag: 2722 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2723 err_get_pble: 2724 irdma_free_stag(iwdev, stag); 2725 err: 2726 kfree(iwmr); 2727 2728 return ERR_PTR(err_code); 2729 } 2730 2731 /** 2732 * irdma_set_page - populate pbl list for fmr 2733 * @ibmr: ib mem to access iwarp mr pointer 2734 * @addr: page dma address fro pbl list 2735 */ 2736 static int irdma_set_page(struct ib_mr *ibmr, u64 addr) 2737 { 2738 struct irdma_mr *iwmr = to_iwmr(ibmr); 2739 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2740 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2741 u64 *pbl; 2742 2743 if (unlikely(iwmr->npages == iwmr->page_cnt)) 2744 return -ENOMEM; 2745 2746 if (palloc->level == PBLE_LEVEL_2) { 2747 struct irdma_pble_info *palloc_info = 2748 palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT); 2749 2750 palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr; 2751 } else { 2752 pbl = palloc->level1.addr; 2753 pbl[iwmr->npages] = addr; 2754 } 2755 iwmr->npages++; 2756 2757 return 0; 2758 } 2759 2760 /** 2761 * irdma_map_mr_sg - map of sg list for fmr 2762 * @ibmr: ib mem to access iwarp mr pointer 2763 * @sg: scatter gather list 2764 * @sg_nents: number of sg pages 2765 * @sg_offset: scatter gather list for fmr 2766 */ 2767 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, 2768 int sg_nents, unsigned int *sg_offset) 2769 { 2770 struct irdma_mr *iwmr = to_iwmr(ibmr); 2771 2772 iwmr->npages = 0; 2773 2774 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page); 2775 } 2776 2777 /** 2778 * irdma_hwreg_mr - send cqp command for memory registration 2779 * @iwdev: irdma device 2780 * @iwmr: irdma mr pointer 2781 * @access: access for MR 2782 */ 2783 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr, 2784 u16 access) 2785 { 2786 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2787 struct irdma_reg_ns_stag_info *stag_info; 2788 struct ib_pd *pd = iwmr->ibmr.pd; 2789 struct irdma_pd *iwpd = to_iwpd(pd); 2790 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2791 struct irdma_cqp_request *cqp_request; 2792 struct cqp_cmds_info *cqp_info; 2793 int ret; 2794 2795 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2796 if (!cqp_request) 2797 return -ENOMEM; 2798 2799 cqp_info = &cqp_request->info; 2800 stag_info = &cqp_info->in.u.mr_reg_non_shared.info; 2801 memset(stag_info, 0, sizeof(*stag_info)); 2802 stag_info->va = iwpbl->user_base; 2803 stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2804 stag_info->stag_key = (u8)iwmr->stag; 2805 stag_info->total_len = iwmr->len; 2806 stag_info->access_rights = irdma_get_mr_access(access); 2807 stag_info->pd_id = iwpd->sc_pd.pd_id; 2808 stag_info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY; 2809 if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED) 2810 stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED; 2811 else 2812 stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED; 2813 stag_info->page_size = iwmr->page_size; 2814 2815 if (iwpbl->pbl_allocated) { 2816 if (palloc->level == PBLE_LEVEL_1) { 2817 stag_info->first_pm_pbl_index = palloc->level1.idx; 2818 stag_info->chunk_size = 1; 2819 } else { 2820 stag_info->first_pm_pbl_index = palloc->level2.root.idx; 2821 stag_info->chunk_size = 3; 2822 } 2823 } else { 2824 stag_info->reg_addr_pa = iwmr->pgaddrmem[0]; 2825 } 2826 2827 cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED; 2828 cqp_info->post_sq = 1; 2829 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev; 2830 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request; 2831 ret = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2832 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2833 2834 return ret; 2835 } 2836 2837 static int irdma_reg_user_mr_type_mem(struct irdma_mr *iwmr, int access) 2838 { 2839 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2840 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2841 u32 stag; 2842 u8 lvl; 2843 int err; 2844 2845 lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0; 2846 2847 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 2848 if (err) 2849 return err; 2850 2851 if (lvl) { 2852 err = irdma_check_mr_contiguous(&iwpbl->pble_alloc, 2853 iwmr->page_size); 2854 if (err) { 2855 irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc); 2856 iwpbl->pbl_allocated = false; 2857 } 2858 } 2859 2860 stag = irdma_create_stag(iwdev); 2861 if (!stag) { 2862 err = -ENOMEM; 2863 goto free_pble; 2864 } 2865 2866 iwmr->stag = stag; 2867 iwmr->ibmr.rkey = stag; 2868 iwmr->ibmr.lkey = stag; 2869 err = irdma_hwreg_mr(iwdev, iwmr, access); 2870 if (err) 2871 goto err_hwreg; 2872 2873 return 0; 2874 2875 err_hwreg: 2876 irdma_free_stag(iwdev, stag); 2877 2878 free_pble: 2879 if (iwpbl->pble_alloc.level != PBLE_LEVEL_0 && iwpbl->pbl_allocated) 2880 irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc); 2881 2882 return err; 2883 } 2884 2885 static struct irdma_mr *irdma_alloc_iwmr(struct ib_umem *region, 2886 struct ib_pd *pd, u64 virt, 2887 enum irdma_memreg_type reg_type) 2888 { 2889 struct irdma_device *iwdev = to_iwdev(pd->device); 2890 struct irdma_pbl *iwpbl; 2891 struct irdma_mr *iwmr; 2892 unsigned long pgsz_bitmap; 2893 2894 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 2895 if (!iwmr) 2896 return ERR_PTR(-ENOMEM); 2897 2898 iwpbl = &iwmr->iwpbl; 2899 iwpbl->iwmr = iwmr; 2900 iwmr->region = region; 2901 iwmr->ibmr.pd = pd; 2902 iwmr->ibmr.device = pd->device; 2903 iwmr->ibmr.iova = virt; 2904 iwmr->type = reg_type; 2905 2906 pgsz_bitmap = (reg_type == IRDMA_MEMREG_TYPE_MEM) ? 2907 iwdev->rf->sc_dev.hw_attrs.page_size_cap : SZ_4K; 2908 2909 iwmr->page_size = ib_umem_find_best_pgsz(region, pgsz_bitmap, virt); 2910 if (unlikely(!iwmr->page_size)) { 2911 kfree(iwmr); 2912 return ERR_PTR(-EOPNOTSUPP); 2913 } 2914 2915 iwmr->len = region->length; 2916 iwpbl->user_base = virt; 2917 iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size); 2918 2919 return iwmr; 2920 } 2921 2922 static void irdma_free_iwmr(struct irdma_mr *iwmr) 2923 { 2924 kfree(iwmr); 2925 } 2926 2927 static int irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req, 2928 struct ib_udata *udata, 2929 struct irdma_mr *iwmr) 2930 { 2931 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2932 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2933 struct irdma_ucontext *ucontext = NULL; 2934 unsigned long flags; 2935 u32 total; 2936 int err; 2937 u8 lvl; 2938 2939 /* iWarp: Catch page not starting on OS page boundary */ 2940 if (!rdma_protocol_roce(&iwdev->ibdev, 1) && 2941 ib_umem_offset(iwmr->region)) 2942 return -EINVAL; 2943 2944 total = req.sq_pages + req.rq_pages + 1; 2945 if (total > iwmr->page_cnt) 2946 return -EINVAL; 2947 2948 total = req.sq_pages + req.rq_pages; 2949 lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0; 2950 err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl); 2951 if (err) 2952 return err; 2953 2954 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, 2955 ibucontext); 2956 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 2957 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list); 2958 iwpbl->on_list = true; 2959 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 2960 2961 return 0; 2962 } 2963 2964 static int irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req, 2965 struct ib_udata *udata, 2966 struct irdma_mr *iwmr) 2967 { 2968 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2969 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2970 struct irdma_ucontext *ucontext = NULL; 2971 u8 shadow_pgcnt = 1; 2972 unsigned long flags; 2973 u32 total; 2974 int err; 2975 u8 lvl; 2976 2977 if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE) 2978 shadow_pgcnt = 0; 2979 total = req.cq_pages + shadow_pgcnt; 2980 if (total > iwmr->page_cnt) 2981 return -EINVAL; 2982 2983 lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0; 2984 err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl); 2985 if (err) 2986 return err; 2987 2988 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, 2989 ibucontext); 2990 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2991 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list); 2992 iwpbl->on_list = true; 2993 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2994 2995 return 0; 2996 } 2997 2998 /** 2999 * irdma_reg_user_mr - Register a user memory region 3000 * @pd: ptr of pd 3001 * @start: virtual start address 3002 * @len: length of mr 3003 * @virt: virtual address 3004 * @access: access of mr 3005 * @udata: user data 3006 */ 3007 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len, 3008 u64 virt, int access, 3009 struct ib_udata *udata) 3010 { 3011 #define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages) 3012 struct irdma_device *iwdev = to_iwdev(pd->device); 3013 struct irdma_mem_reg_req req = {}; 3014 struct ib_umem *region = NULL; 3015 struct irdma_mr *iwmr = NULL; 3016 int err; 3017 3018 if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size) 3019 return ERR_PTR(-EINVAL); 3020 3021 if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN) 3022 return ERR_PTR(-EINVAL); 3023 3024 region = ib_umem_get(pd->device, start, len, access); 3025 3026 if (IS_ERR(region)) { 3027 ibdev_dbg(&iwdev->ibdev, 3028 "VERBS: Failed to create ib_umem region\n"); 3029 return (struct ib_mr *)region; 3030 } 3031 3032 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) { 3033 ib_umem_release(region); 3034 return ERR_PTR(-EFAULT); 3035 } 3036 3037 iwmr = irdma_alloc_iwmr(region, pd, virt, req.reg_type); 3038 if (IS_ERR(iwmr)) { 3039 ib_umem_release(region); 3040 return (struct ib_mr *)iwmr; 3041 } 3042 3043 switch (req.reg_type) { 3044 case IRDMA_MEMREG_TYPE_QP: 3045 err = irdma_reg_user_mr_type_qp(req, udata, iwmr); 3046 if (err) 3047 goto error; 3048 3049 break; 3050 case IRDMA_MEMREG_TYPE_CQ: 3051 err = irdma_reg_user_mr_type_cq(req, udata, iwmr); 3052 if (err) 3053 goto error; 3054 break; 3055 case IRDMA_MEMREG_TYPE_MEM: 3056 err = irdma_reg_user_mr_type_mem(iwmr, access); 3057 if (err) 3058 goto error; 3059 3060 break; 3061 default: 3062 err = -EINVAL; 3063 goto error; 3064 } 3065 3066 return &iwmr->ibmr; 3067 error: 3068 ib_umem_release(region); 3069 irdma_free_iwmr(iwmr); 3070 3071 return ERR_PTR(err); 3072 } 3073 3074 static struct ib_mr *irdma_reg_user_mr_dmabuf(struct ib_pd *pd, u64 start, 3075 u64 len, u64 virt, 3076 int fd, int access, 3077 struct ib_udata *udata) 3078 { 3079 struct irdma_device *iwdev = to_iwdev(pd->device); 3080 struct ib_umem_dmabuf *umem_dmabuf; 3081 struct irdma_mr *iwmr; 3082 int err; 3083 3084 if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size) 3085 return ERR_PTR(-EINVAL); 3086 3087 umem_dmabuf = ib_umem_dmabuf_get_pinned(pd->device, start, len, fd, access); 3088 if (IS_ERR(umem_dmabuf)) { 3089 err = PTR_ERR(umem_dmabuf); 3090 ibdev_dbg(&iwdev->ibdev, "Failed to get dmabuf umem[%d]\n", err); 3091 return ERR_PTR(err); 3092 } 3093 3094 iwmr = irdma_alloc_iwmr(&umem_dmabuf->umem, pd, virt, IRDMA_MEMREG_TYPE_MEM); 3095 if (IS_ERR(iwmr)) { 3096 err = PTR_ERR(iwmr); 3097 goto err_release; 3098 } 3099 3100 err = irdma_reg_user_mr_type_mem(iwmr, access); 3101 if (err) 3102 goto err_iwmr; 3103 3104 return &iwmr->ibmr; 3105 3106 err_iwmr: 3107 irdma_free_iwmr(iwmr); 3108 3109 err_release: 3110 ib_umem_release(&umem_dmabuf->umem); 3111 3112 return ERR_PTR(err); 3113 } 3114 3115 /** 3116 * irdma_reg_phys_mr - register kernel physical memory 3117 * @pd: ibpd pointer 3118 * @addr: physical address of memory to register 3119 * @size: size of memory to register 3120 * @access: Access rights 3121 * @iova_start: start of virtual address for physical buffers 3122 */ 3123 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access, 3124 u64 *iova_start) 3125 { 3126 struct irdma_device *iwdev = to_iwdev(pd->device); 3127 struct irdma_pbl *iwpbl; 3128 struct irdma_mr *iwmr; 3129 u32 stag; 3130 int ret; 3131 3132 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 3133 if (!iwmr) 3134 return ERR_PTR(-ENOMEM); 3135 3136 iwmr->ibmr.pd = pd; 3137 iwmr->ibmr.device = pd->device; 3138 iwpbl = &iwmr->iwpbl; 3139 iwpbl->iwmr = iwmr; 3140 iwmr->type = IRDMA_MEMREG_TYPE_MEM; 3141 iwpbl->user_base = *iova_start; 3142 stag = irdma_create_stag(iwdev); 3143 if (!stag) { 3144 ret = -ENOMEM; 3145 goto err; 3146 } 3147 3148 iwmr->stag = stag; 3149 iwmr->ibmr.iova = *iova_start; 3150 iwmr->ibmr.rkey = stag; 3151 iwmr->ibmr.lkey = stag; 3152 iwmr->page_cnt = 1; 3153 iwmr->pgaddrmem[0] = addr; 3154 iwmr->len = size; 3155 iwmr->page_size = SZ_4K; 3156 ret = irdma_hwreg_mr(iwdev, iwmr, access); 3157 if (ret) { 3158 irdma_free_stag(iwdev, stag); 3159 goto err; 3160 } 3161 3162 return &iwmr->ibmr; 3163 3164 err: 3165 kfree(iwmr); 3166 3167 return ERR_PTR(ret); 3168 } 3169 3170 /** 3171 * irdma_get_dma_mr - register physical mem 3172 * @pd: ptr of pd 3173 * @acc: access for memory 3174 */ 3175 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc) 3176 { 3177 u64 kva = 0; 3178 3179 return irdma_reg_phys_mr(pd, 0, 0, acc, &kva); 3180 } 3181 3182 /** 3183 * irdma_del_memlist - Deleting pbl list entries for CQ/QP 3184 * @iwmr: iwmr for IB's user page addresses 3185 * @ucontext: ptr to user context 3186 */ 3187 static void irdma_del_memlist(struct irdma_mr *iwmr, 3188 struct irdma_ucontext *ucontext) 3189 { 3190 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 3191 unsigned long flags; 3192 3193 switch (iwmr->type) { 3194 case IRDMA_MEMREG_TYPE_CQ: 3195 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 3196 if (iwpbl->on_list) { 3197 iwpbl->on_list = false; 3198 list_del(&iwpbl->list); 3199 } 3200 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 3201 break; 3202 case IRDMA_MEMREG_TYPE_QP: 3203 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 3204 if (iwpbl->on_list) { 3205 iwpbl->on_list = false; 3206 list_del(&iwpbl->list); 3207 } 3208 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 3209 break; 3210 default: 3211 break; 3212 } 3213 } 3214 3215 /** 3216 * irdma_dereg_mr - deregister mr 3217 * @ib_mr: mr ptr for dereg 3218 * @udata: user data 3219 */ 3220 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata) 3221 { 3222 struct ib_pd *ibpd = ib_mr->pd; 3223 struct irdma_pd *iwpd = to_iwpd(ibpd); 3224 struct irdma_mr *iwmr = to_iwmr(ib_mr); 3225 struct irdma_device *iwdev = to_iwdev(ib_mr->device); 3226 struct irdma_dealloc_stag_info *info; 3227 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 3228 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 3229 struct irdma_cqp_request *cqp_request; 3230 struct cqp_cmds_info *cqp_info; 3231 int status; 3232 3233 if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) { 3234 if (iwmr->region) { 3235 struct irdma_ucontext *ucontext; 3236 3237 ucontext = rdma_udata_to_drv_context(udata, 3238 struct irdma_ucontext, 3239 ibucontext); 3240 irdma_del_memlist(iwmr, ucontext); 3241 } 3242 goto done; 3243 } 3244 3245 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 3246 if (!cqp_request) 3247 return -ENOMEM; 3248 3249 cqp_info = &cqp_request->info; 3250 info = &cqp_info->in.u.dealloc_stag.info; 3251 memset(info, 0, sizeof(*info)); 3252 info->pd_id = iwpd->sc_pd.pd_id; 3253 info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S; 3254 info->mr = true; 3255 if (iwpbl->pbl_allocated) 3256 info->dealloc_pbl = true; 3257 3258 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG; 3259 cqp_info->post_sq = 1; 3260 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev; 3261 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; 3262 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 3263 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 3264 if (status) 3265 return status; 3266 3267 irdma_free_stag(iwdev, iwmr->stag); 3268 done: 3269 if (iwpbl->pbl_allocated) 3270 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 3271 ib_umem_release(iwmr->region); 3272 kfree(iwmr); 3273 3274 return 0; 3275 } 3276 3277 /** 3278 * irdma_post_send - kernel application wr 3279 * @ibqp: qp ptr for wr 3280 * @ib_wr: work request ptr 3281 * @bad_wr: return of bad wr if err 3282 */ 3283 static int irdma_post_send(struct ib_qp *ibqp, 3284 const struct ib_send_wr *ib_wr, 3285 const struct ib_send_wr **bad_wr) 3286 { 3287 struct irdma_qp *iwqp; 3288 struct irdma_qp_uk *ukqp; 3289 struct irdma_sc_dev *dev; 3290 struct irdma_post_sq_info info; 3291 int err = 0; 3292 unsigned long flags; 3293 bool inv_stag; 3294 struct irdma_ah *ah; 3295 3296 iwqp = to_iwqp(ibqp); 3297 ukqp = &iwqp->sc_qp.qp_uk; 3298 dev = &iwqp->iwdev->rf->sc_dev; 3299 3300 spin_lock_irqsave(&iwqp->lock, flags); 3301 while (ib_wr) { 3302 memset(&info, 0, sizeof(info)); 3303 inv_stag = false; 3304 info.wr_id = (ib_wr->wr_id); 3305 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all) 3306 info.signaled = true; 3307 if (ib_wr->send_flags & IB_SEND_FENCE) 3308 info.read_fence = true; 3309 switch (ib_wr->opcode) { 3310 case IB_WR_SEND_WITH_IMM: 3311 if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) { 3312 info.imm_data_valid = true; 3313 info.imm_data = ntohl(ib_wr->ex.imm_data); 3314 } else { 3315 err = -EINVAL; 3316 break; 3317 } 3318 fallthrough; 3319 case IB_WR_SEND: 3320 case IB_WR_SEND_WITH_INV: 3321 if (ib_wr->opcode == IB_WR_SEND || 3322 ib_wr->opcode == IB_WR_SEND_WITH_IMM) { 3323 if (ib_wr->send_flags & IB_SEND_SOLICITED) 3324 info.op_type = IRDMA_OP_TYPE_SEND_SOL; 3325 else 3326 info.op_type = IRDMA_OP_TYPE_SEND; 3327 } else { 3328 if (ib_wr->send_flags & IB_SEND_SOLICITED) 3329 info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV; 3330 else 3331 info.op_type = IRDMA_OP_TYPE_SEND_INV; 3332 info.stag_to_inv = ib_wr->ex.invalidate_rkey; 3333 } 3334 3335 info.op.send.num_sges = ib_wr->num_sge; 3336 info.op.send.sg_list = ib_wr->sg_list; 3337 if (iwqp->ibqp.qp_type == IB_QPT_UD || 3338 iwqp->ibqp.qp_type == IB_QPT_GSI) { 3339 ah = to_iwah(ud_wr(ib_wr)->ah); 3340 info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx; 3341 info.op.send.qkey = ud_wr(ib_wr)->remote_qkey; 3342 info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn; 3343 } 3344 3345 if (ib_wr->send_flags & IB_SEND_INLINE) 3346 err = irdma_uk_inline_send(ukqp, &info, false); 3347 else 3348 err = irdma_uk_send(ukqp, &info, false); 3349 break; 3350 case IB_WR_RDMA_WRITE_WITH_IMM: 3351 if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) { 3352 info.imm_data_valid = true; 3353 info.imm_data = ntohl(ib_wr->ex.imm_data); 3354 } else { 3355 err = -EINVAL; 3356 break; 3357 } 3358 fallthrough; 3359 case IB_WR_RDMA_WRITE: 3360 if (ib_wr->send_flags & IB_SEND_SOLICITED) 3361 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL; 3362 else 3363 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE; 3364 3365 info.op.rdma_write.num_lo_sges = ib_wr->num_sge; 3366 info.op.rdma_write.lo_sg_list = ib_wr->sg_list; 3367 info.op.rdma_write.rem_addr.addr = 3368 rdma_wr(ib_wr)->remote_addr; 3369 info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey; 3370 if (ib_wr->send_flags & IB_SEND_INLINE) 3371 err = irdma_uk_inline_rdma_write(ukqp, &info, false); 3372 else 3373 err = irdma_uk_rdma_write(ukqp, &info, false); 3374 break; 3375 case IB_WR_RDMA_READ_WITH_INV: 3376 inv_stag = true; 3377 fallthrough; 3378 case IB_WR_RDMA_READ: 3379 if (ib_wr->num_sge > 3380 dev->hw_attrs.uk_attrs.max_hw_read_sges) { 3381 err = -EINVAL; 3382 break; 3383 } 3384 info.op_type = IRDMA_OP_TYPE_RDMA_READ; 3385 info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr; 3386 info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey; 3387 info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list; 3388 info.op.rdma_read.num_lo_sges = ib_wr->num_sge; 3389 err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false); 3390 break; 3391 case IB_WR_LOCAL_INV: 3392 info.op_type = IRDMA_OP_TYPE_INV_STAG; 3393 info.local_fence = info.read_fence; 3394 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey; 3395 err = irdma_uk_stag_local_invalidate(ukqp, &info, true); 3396 break; 3397 case IB_WR_REG_MR: { 3398 struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr); 3399 struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc; 3400 struct irdma_fast_reg_stag_info stag_info = {}; 3401 3402 stag_info.signaled = info.signaled; 3403 stag_info.read_fence = info.read_fence; 3404 stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access); 3405 stag_info.stag_key = reg_wr(ib_wr)->key & 0xff; 3406 stag_info.stag_idx = reg_wr(ib_wr)->key >> 8; 3407 stag_info.page_size = reg_wr(ib_wr)->mr->page_size; 3408 stag_info.wr_id = ib_wr->wr_id; 3409 stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED; 3410 stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova; 3411 stag_info.total_len = iwmr->ibmr.length; 3412 stag_info.reg_addr_pa = *palloc->level1.addr; 3413 stag_info.first_pm_pbl_index = palloc->level1.idx; 3414 stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE; 3415 if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR) 3416 stag_info.chunk_size = 1; 3417 err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info, 3418 true); 3419 break; 3420 } 3421 default: 3422 err = -EINVAL; 3423 ibdev_dbg(&iwqp->iwdev->ibdev, 3424 "VERBS: upost_send bad opcode = 0x%x\n", 3425 ib_wr->opcode); 3426 break; 3427 } 3428 3429 if (err) 3430 break; 3431 ib_wr = ib_wr->next; 3432 } 3433 3434 if (!iwqp->flush_issued) { 3435 if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS) 3436 irdma_uk_qp_post_wr(ukqp); 3437 spin_unlock_irqrestore(&iwqp->lock, flags); 3438 } else { 3439 spin_unlock_irqrestore(&iwqp->lock, flags); 3440 mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush, 3441 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS)); 3442 } 3443 if (err) 3444 *bad_wr = ib_wr; 3445 3446 return err; 3447 } 3448 3449 /** 3450 * irdma_post_recv - post receive wr for kernel application 3451 * @ibqp: ib qp pointer 3452 * @ib_wr: work request for receive 3453 * @bad_wr: bad wr caused an error 3454 */ 3455 static int irdma_post_recv(struct ib_qp *ibqp, 3456 const struct ib_recv_wr *ib_wr, 3457 const struct ib_recv_wr **bad_wr) 3458 { 3459 struct irdma_qp *iwqp; 3460 struct irdma_qp_uk *ukqp; 3461 struct irdma_post_rq_info post_recv = {}; 3462 unsigned long flags; 3463 int err = 0; 3464 3465 iwqp = to_iwqp(ibqp); 3466 ukqp = &iwqp->sc_qp.qp_uk; 3467 3468 spin_lock_irqsave(&iwqp->lock, flags); 3469 while (ib_wr) { 3470 post_recv.num_sges = ib_wr->num_sge; 3471 post_recv.wr_id = ib_wr->wr_id; 3472 post_recv.sg_list = ib_wr->sg_list; 3473 err = irdma_uk_post_receive(ukqp, &post_recv); 3474 if (err) { 3475 ibdev_dbg(&iwqp->iwdev->ibdev, 3476 "VERBS: post_recv err %d\n", err); 3477 goto out; 3478 } 3479 3480 ib_wr = ib_wr->next; 3481 } 3482 3483 out: 3484 spin_unlock_irqrestore(&iwqp->lock, flags); 3485 if (iwqp->flush_issued) 3486 mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush, 3487 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS)); 3488 3489 if (err) 3490 *bad_wr = ib_wr; 3491 3492 return err; 3493 } 3494 3495 /** 3496 * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status 3497 * @opcode: iwarp flush code 3498 */ 3499 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode) 3500 { 3501 switch (opcode) { 3502 case FLUSH_PROT_ERR: 3503 return IB_WC_LOC_PROT_ERR; 3504 case FLUSH_REM_ACCESS_ERR: 3505 return IB_WC_REM_ACCESS_ERR; 3506 case FLUSH_LOC_QP_OP_ERR: 3507 return IB_WC_LOC_QP_OP_ERR; 3508 case FLUSH_REM_OP_ERR: 3509 return IB_WC_REM_OP_ERR; 3510 case FLUSH_LOC_LEN_ERR: 3511 return IB_WC_LOC_LEN_ERR; 3512 case FLUSH_GENERAL_ERR: 3513 return IB_WC_WR_FLUSH_ERR; 3514 case FLUSH_RETRY_EXC_ERR: 3515 return IB_WC_RETRY_EXC_ERR; 3516 case FLUSH_MW_BIND_ERR: 3517 return IB_WC_MW_BIND_ERR; 3518 case FLUSH_REM_INV_REQ_ERR: 3519 return IB_WC_REM_INV_REQ_ERR; 3520 case FLUSH_FATAL_ERR: 3521 default: 3522 return IB_WC_FATAL_ERR; 3523 } 3524 } 3525 3526 /** 3527 * irdma_process_cqe - process cqe info 3528 * @entry: processed cqe 3529 * @cq_poll_info: cqe info 3530 */ 3531 static void irdma_process_cqe(struct ib_wc *entry, 3532 struct irdma_cq_poll_info *cq_poll_info) 3533 { 3534 struct irdma_sc_qp *qp; 3535 3536 entry->wc_flags = 0; 3537 entry->pkey_index = 0; 3538 entry->wr_id = cq_poll_info->wr_id; 3539 3540 qp = cq_poll_info->qp_handle; 3541 entry->qp = qp->qp_uk.back_qp; 3542 3543 if (cq_poll_info->error) { 3544 entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ? 3545 irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR; 3546 3547 entry->vendor_err = cq_poll_info->major_err << 16 | 3548 cq_poll_info->minor_err; 3549 } else { 3550 entry->status = IB_WC_SUCCESS; 3551 if (cq_poll_info->imm_valid) { 3552 entry->ex.imm_data = htonl(cq_poll_info->imm_data); 3553 entry->wc_flags |= IB_WC_WITH_IMM; 3554 } 3555 if (cq_poll_info->ud_smac_valid) { 3556 ether_addr_copy(entry->smac, cq_poll_info->ud_smac); 3557 entry->wc_flags |= IB_WC_WITH_SMAC; 3558 } 3559 3560 if (cq_poll_info->ud_vlan_valid) { 3561 u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK; 3562 3563 entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT; 3564 if (vlan) { 3565 entry->vlan_id = vlan; 3566 entry->wc_flags |= IB_WC_WITH_VLAN; 3567 } 3568 } else { 3569 entry->sl = 0; 3570 } 3571 } 3572 3573 if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) { 3574 set_ib_wc_op_sq(cq_poll_info, entry); 3575 } else { 3576 set_ib_wc_op_rq(cq_poll_info, entry, 3577 qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM); 3578 if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD && 3579 cq_poll_info->stag_invalid_set) { 3580 entry->ex.invalidate_rkey = cq_poll_info->inv_stag; 3581 entry->wc_flags |= IB_WC_WITH_INVALIDATE; 3582 } 3583 } 3584 3585 if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) { 3586 entry->src_qp = cq_poll_info->ud_src_qpn; 3587 entry->slid = 0; 3588 entry->wc_flags |= 3589 (IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE); 3590 entry->network_hdr_type = cq_poll_info->ipv4 ? 3591 RDMA_NETWORK_IPV4 : 3592 RDMA_NETWORK_IPV6; 3593 } else { 3594 entry->src_qp = cq_poll_info->qp_id; 3595 } 3596 3597 entry->byte_len = cq_poll_info->bytes_xfered; 3598 } 3599 3600 /** 3601 * irdma_poll_one - poll one entry of the CQ 3602 * @ukcq: ukcq to poll 3603 * @cur_cqe: current CQE info to be filled in 3604 * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ 3605 * 3606 * Returns the internal irdma device error code or 0 on success 3607 */ 3608 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq, 3609 struct irdma_cq_poll_info *cur_cqe, 3610 struct ib_wc *entry) 3611 { 3612 int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe); 3613 3614 if (ret) 3615 return ret; 3616 3617 irdma_process_cqe(entry, cur_cqe); 3618 3619 return 0; 3620 } 3621 3622 /** 3623 * __irdma_poll_cq - poll cq for completion (kernel apps) 3624 * @iwcq: cq to poll 3625 * @num_entries: number of entries to poll 3626 * @entry: wr of a completed entry 3627 */ 3628 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry) 3629 { 3630 struct list_head *tmp_node, *list_node; 3631 struct irdma_cq_buf *last_buf = NULL; 3632 struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe; 3633 struct irdma_cq_buf *cq_buf; 3634 int ret; 3635 struct irdma_device *iwdev; 3636 struct irdma_cq_uk *ukcq; 3637 bool cq_new_cqe = false; 3638 int resized_bufs = 0; 3639 int npolled = 0; 3640 3641 iwdev = to_iwdev(iwcq->ibcq.device); 3642 ukcq = &iwcq->sc_cq.cq_uk; 3643 3644 /* go through the list of previously resized CQ buffers */ 3645 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) { 3646 cq_buf = container_of(list_node, struct irdma_cq_buf, list); 3647 while (npolled < num_entries) { 3648 ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled); 3649 if (!ret) { 3650 ++npolled; 3651 cq_new_cqe = true; 3652 continue; 3653 } 3654 if (ret == -ENOENT) 3655 break; 3656 /* QP using the CQ is destroyed. Skip reporting this CQE */ 3657 if (ret == -EFAULT) { 3658 cq_new_cqe = true; 3659 continue; 3660 } 3661 goto error; 3662 } 3663 3664 /* save the resized CQ buffer which received the last cqe */ 3665 if (cq_new_cqe) 3666 last_buf = cq_buf; 3667 cq_new_cqe = false; 3668 } 3669 3670 /* check the current CQ for new cqes */ 3671 while (npolled < num_entries) { 3672 ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled); 3673 if (ret == -ENOENT) { 3674 ret = irdma_generated_cmpls(iwcq, cur_cqe); 3675 if (!ret) 3676 irdma_process_cqe(entry + npolled, cur_cqe); 3677 } 3678 if (!ret) { 3679 ++npolled; 3680 cq_new_cqe = true; 3681 continue; 3682 } 3683 3684 if (ret == -ENOENT) 3685 break; 3686 /* QP using the CQ is destroyed. Skip reporting this CQE */ 3687 if (ret == -EFAULT) { 3688 cq_new_cqe = true; 3689 continue; 3690 } 3691 goto error; 3692 } 3693 3694 if (cq_new_cqe) 3695 /* all previous CQ resizes are complete */ 3696 resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL); 3697 else if (last_buf) 3698 /* only CQ resizes up to the last_buf are complete */ 3699 resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf); 3700 if (resized_bufs) 3701 /* report to the HW the number of complete CQ resizes */ 3702 irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs); 3703 3704 return npolled; 3705 error: 3706 ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n", 3707 __func__, ret); 3708 3709 return ret; 3710 } 3711 3712 /** 3713 * irdma_poll_cq - poll cq for completion (kernel apps) 3714 * @ibcq: cq to poll 3715 * @num_entries: number of entries to poll 3716 * @entry: wr of a completed entry 3717 */ 3718 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries, 3719 struct ib_wc *entry) 3720 { 3721 struct irdma_cq *iwcq; 3722 unsigned long flags; 3723 int ret; 3724 3725 iwcq = to_iwcq(ibcq); 3726 3727 spin_lock_irqsave(&iwcq->lock, flags); 3728 ret = __irdma_poll_cq(iwcq, num_entries, entry); 3729 spin_unlock_irqrestore(&iwcq->lock, flags); 3730 3731 return ret; 3732 } 3733 3734 /** 3735 * irdma_req_notify_cq - arm cq kernel application 3736 * @ibcq: cq to arm 3737 * @notify_flags: notofication flags 3738 */ 3739 static int irdma_req_notify_cq(struct ib_cq *ibcq, 3740 enum ib_cq_notify_flags notify_flags) 3741 { 3742 struct irdma_cq *iwcq; 3743 struct irdma_cq_uk *ukcq; 3744 unsigned long flags; 3745 enum irdma_cmpl_notify cq_notify; 3746 bool promo_event = false; 3747 int ret = 0; 3748 3749 cq_notify = notify_flags == IB_CQ_SOLICITED ? 3750 IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT; 3751 iwcq = to_iwcq(ibcq); 3752 ukcq = &iwcq->sc_cq.cq_uk; 3753 3754 spin_lock_irqsave(&iwcq->lock, flags); 3755 /* Only promote to arm the CQ for any event if the last arm event was solicited. */ 3756 if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED) 3757 promo_event = true; 3758 3759 if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) { 3760 iwcq->last_notify = cq_notify; 3761 irdma_uk_cq_request_notification(ukcq, cq_notify); 3762 } 3763 3764 if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) && 3765 (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated))) 3766 ret = 1; 3767 spin_unlock_irqrestore(&iwcq->lock, flags); 3768 3769 return ret; 3770 } 3771 3772 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num, 3773 struct ib_port_immutable *immutable) 3774 { 3775 struct ib_port_attr attr; 3776 int err; 3777 3778 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 3779 err = ib_query_port(ibdev, port_num, &attr); 3780 if (err) 3781 return err; 3782 3783 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 3784 immutable->pkey_tbl_len = attr.pkey_tbl_len; 3785 immutable->gid_tbl_len = attr.gid_tbl_len; 3786 3787 return 0; 3788 } 3789 3790 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num, 3791 struct ib_port_immutable *immutable) 3792 { 3793 struct ib_port_attr attr; 3794 int err; 3795 3796 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP; 3797 err = ib_query_port(ibdev, port_num, &attr); 3798 if (err) 3799 return err; 3800 immutable->gid_tbl_len = attr.gid_tbl_len; 3801 3802 return 0; 3803 } 3804 3805 static const struct rdma_stat_desc irdma_hw_stat_names[] = { 3806 /* gen1 - 32-bit */ 3807 [IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name = "ip4InDiscards", 3808 [IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name = "ip4InTruncatedPkts", 3809 [IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name = "ip4OutNoRoutes", 3810 [IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name = "ip6InDiscards", 3811 [IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name = "ip6InTruncatedPkts", 3812 [IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name = "ip6OutNoRoutes", 3813 [IRDMA_HW_STAT_INDEX_TCPRTXSEG].name = "tcpRetransSegs", 3814 [IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name = "tcpInOptErrors", 3815 [IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name = "tcpInProtoErrors", 3816 [IRDMA_HW_STAT_INDEX_RXVLANERR].name = "rxVlanErrors", 3817 /* gen1 - 64-bit */ 3818 [IRDMA_HW_STAT_INDEX_IP4RXOCTS].name = "ip4InOctets", 3819 [IRDMA_HW_STAT_INDEX_IP4RXPKTS].name = "ip4InPkts", 3820 [IRDMA_HW_STAT_INDEX_IP4RXFRAGS].name = "ip4InReasmRqd", 3821 [IRDMA_HW_STAT_INDEX_IP4RXMCPKTS].name = "ip4InMcastPkts", 3822 [IRDMA_HW_STAT_INDEX_IP4TXOCTS].name = "ip4OutOctets", 3823 [IRDMA_HW_STAT_INDEX_IP4TXPKTS].name = "ip4OutPkts", 3824 [IRDMA_HW_STAT_INDEX_IP4TXFRAGS].name = "ip4OutSegRqd", 3825 [IRDMA_HW_STAT_INDEX_IP4TXMCPKTS].name = "ip4OutMcastPkts", 3826 [IRDMA_HW_STAT_INDEX_IP6RXOCTS].name = "ip6InOctets", 3827 [IRDMA_HW_STAT_INDEX_IP6RXPKTS].name = "ip6InPkts", 3828 [IRDMA_HW_STAT_INDEX_IP6RXFRAGS].name = "ip6InReasmRqd", 3829 [IRDMA_HW_STAT_INDEX_IP6RXMCPKTS].name = "ip6InMcastPkts", 3830 [IRDMA_HW_STAT_INDEX_IP6TXOCTS].name = "ip6OutOctets", 3831 [IRDMA_HW_STAT_INDEX_IP6TXPKTS].name = "ip6OutPkts", 3832 [IRDMA_HW_STAT_INDEX_IP6TXFRAGS].name = "ip6OutSegRqd", 3833 [IRDMA_HW_STAT_INDEX_IP6TXMCPKTS].name = "ip6OutMcastPkts", 3834 [IRDMA_HW_STAT_INDEX_TCPRXSEGS].name = "tcpInSegs", 3835 [IRDMA_HW_STAT_INDEX_TCPTXSEG].name = "tcpOutSegs", 3836 [IRDMA_HW_STAT_INDEX_RDMARXRDS].name = "iwInRdmaReads", 3837 [IRDMA_HW_STAT_INDEX_RDMARXSNDS].name = "iwInRdmaSends", 3838 [IRDMA_HW_STAT_INDEX_RDMARXWRS].name = "iwInRdmaWrites", 3839 [IRDMA_HW_STAT_INDEX_RDMATXRDS].name = "iwOutRdmaReads", 3840 [IRDMA_HW_STAT_INDEX_RDMATXSNDS].name = "iwOutRdmaSends", 3841 [IRDMA_HW_STAT_INDEX_RDMATXWRS].name = "iwOutRdmaWrites", 3842 [IRDMA_HW_STAT_INDEX_RDMAVBND].name = "iwRdmaBnd", 3843 [IRDMA_HW_STAT_INDEX_RDMAVINV].name = "iwRdmaInv", 3844 3845 /* gen2 - 32-bit */ 3846 [IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name = "cnpHandled", 3847 [IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name = "cnpIgnored", 3848 [IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name = "cnpSent", 3849 /* gen2 - 64-bit */ 3850 [IRDMA_HW_STAT_INDEX_IP4RXMCOCTS].name = "ip4InMcastOctets", 3851 [IRDMA_HW_STAT_INDEX_IP4TXMCOCTS].name = "ip4OutMcastOctets", 3852 [IRDMA_HW_STAT_INDEX_IP6RXMCOCTS].name = "ip6InMcastOctets", 3853 [IRDMA_HW_STAT_INDEX_IP6TXMCOCTS].name = "ip6OutMcastOctets", 3854 [IRDMA_HW_STAT_INDEX_UDPRXPKTS].name = "RxUDP", 3855 [IRDMA_HW_STAT_INDEX_UDPTXPKTS].name = "TxUDP", 3856 [IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS].name = "RxECNMrkd", 3857 3858 }; 3859 3860 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str) 3861 { 3862 struct irdma_device *iwdev = to_iwdev(dev); 3863 3864 snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u", 3865 irdma_fw_major_ver(&iwdev->rf->sc_dev), 3866 irdma_fw_minor_ver(&iwdev->rf->sc_dev)); 3867 } 3868 3869 /** 3870 * irdma_alloc_hw_port_stats - Allocate a hw stats structure 3871 * @ibdev: device pointer from stack 3872 * @port_num: port number 3873 */ 3874 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev, 3875 u32 port_num) 3876 { 3877 struct irdma_device *iwdev = to_iwdev(ibdev); 3878 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 3879 3880 int num_counters = dev->hw_attrs.max_stat_idx; 3881 unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN; 3882 3883 return rdma_alloc_hw_stats_struct(irdma_hw_stat_names, num_counters, 3884 lifespan); 3885 } 3886 3887 /** 3888 * irdma_get_hw_stats - Populates the rdma_hw_stats structure 3889 * @ibdev: device pointer from stack 3890 * @stats: stats pointer from stack 3891 * @port_num: port number 3892 * @index: which hw counter the stack is requesting we update 3893 */ 3894 static int irdma_get_hw_stats(struct ib_device *ibdev, 3895 struct rdma_hw_stats *stats, u32 port_num, 3896 int index) 3897 { 3898 struct irdma_device *iwdev = to_iwdev(ibdev); 3899 struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats; 3900 3901 if (iwdev->rf->rdma_ver >= IRDMA_GEN_2) 3902 irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true); 3903 else 3904 irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat); 3905 3906 memcpy(&stats->value[0], hw_stats, sizeof(u64) * stats->num_counters); 3907 3908 return stats->num_counters; 3909 } 3910 3911 /** 3912 * irdma_query_gid - Query port GID 3913 * @ibdev: device pointer from stack 3914 * @port: port number 3915 * @index: Entry index 3916 * @gid: Global ID 3917 */ 3918 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index, 3919 union ib_gid *gid) 3920 { 3921 struct irdma_device *iwdev = to_iwdev(ibdev); 3922 3923 memset(gid->raw, 0, sizeof(gid->raw)); 3924 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr); 3925 3926 return 0; 3927 } 3928 3929 /** 3930 * mcast_list_add - Add a new mcast item to list 3931 * @rf: RDMA PCI function 3932 * @new_elem: pointer to element to add 3933 */ 3934 static void mcast_list_add(struct irdma_pci_f *rf, 3935 struct mc_table_list *new_elem) 3936 { 3937 list_add(&new_elem->list, &rf->mc_qht_list.list); 3938 } 3939 3940 /** 3941 * mcast_list_del - Remove an mcast item from list 3942 * @mc_qht_elem: pointer to mcast table list element 3943 */ 3944 static void mcast_list_del(struct mc_table_list *mc_qht_elem) 3945 { 3946 if (mc_qht_elem) 3947 list_del(&mc_qht_elem->list); 3948 } 3949 3950 /** 3951 * mcast_list_lookup_ip - Search mcast list for address 3952 * @rf: RDMA PCI function 3953 * @ip_mcast: pointer to mcast IP address 3954 */ 3955 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf, 3956 u32 *ip_mcast) 3957 { 3958 struct mc_table_list *mc_qht_el; 3959 struct list_head *pos, *q; 3960 3961 list_for_each_safe (pos, q, &rf->mc_qht_list.list) { 3962 mc_qht_el = list_entry(pos, struct mc_table_list, list); 3963 if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast, 3964 sizeof(mc_qht_el->mc_info.dest_ip))) 3965 return mc_qht_el; 3966 } 3967 3968 return NULL; 3969 } 3970 3971 /** 3972 * irdma_mcast_cqp_op - perform a mcast cqp operation 3973 * @iwdev: irdma device 3974 * @mc_grp_ctx: mcast group info 3975 * @op: operation 3976 * 3977 * returns error status 3978 */ 3979 static int irdma_mcast_cqp_op(struct irdma_device *iwdev, 3980 struct irdma_mcast_grp_info *mc_grp_ctx, u8 op) 3981 { 3982 struct cqp_cmds_info *cqp_info; 3983 struct irdma_cqp_request *cqp_request; 3984 int status; 3985 3986 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 3987 if (!cqp_request) 3988 return -ENOMEM; 3989 3990 cqp_request->info.in.u.mc_create.info = *mc_grp_ctx; 3991 cqp_info = &cqp_request->info; 3992 cqp_info->cqp_cmd = op; 3993 cqp_info->post_sq = 1; 3994 cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request; 3995 cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp; 3996 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 3997 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 3998 3999 return status; 4000 } 4001 4002 /** 4003 * irdma_mcast_mac - Get the multicast MAC for an IP address 4004 * @ip_addr: IPv4 or IPv6 address 4005 * @mac: pointer to result MAC address 4006 * @ipv4: flag indicating IPv4 or IPv6 4007 * 4008 */ 4009 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4) 4010 { 4011 u8 *ip = (u8 *)ip_addr; 4012 4013 if (ipv4) { 4014 unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00, 4015 0x00, 0x00}; 4016 4017 mac4[3] = ip[2] & 0x7F; 4018 mac4[4] = ip[1]; 4019 mac4[5] = ip[0]; 4020 ether_addr_copy(mac, mac4); 4021 } else { 4022 unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00, 4023 0x00, 0x00}; 4024 4025 mac6[2] = ip[3]; 4026 mac6[3] = ip[2]; 4027 mac6[4] = ip[1]; 4028 mac6[5] = ip[0]; 4029 ether_addr_copy(mac, mac6); 4030 } 4031 } 4032 4033 /** 4034 * irdma_attach_mcast - attach a qp to a multicast group 4035 * @ibqp: ptr to qp 4036 * @ibgid: pointer to global ID 4037 * @lid: local ID 4038 * 4039 * returns error status 4040 */ 4041 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) 4042 { 4043 struct irdma_qp *iwqp = to_iwqp(ibqp); 4044 struct irdma_device *iwdev = iwqp->iwdev; 4045 struct irdma_pci_f *rf = iwdev->rf; 4046 struct mc_table_list *mc_qht_elem; 4047 struct irdma_mcast_grp_ctx_entry_info mcg_info = {}; 4048 unsigned long flags; 4049 u32 ip_addr[4] = {}; 4050 u32 mgn; 4051 u32 no_mgs; 4052 int ret = 0; 4053 bool ipv4; 4054 u16 vlan_id; 4055 union irdma_sockaddr sgid_addr; 4056 unsigned char dmac[ETH_ALEN]; 4057 4058 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid); 4059 4060 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) { 4061 irdma_copy_ip_ntohl(ip_addr, 4062 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32); 4063 irdma_get_vlan_mac_ipv6(ip_addr, &vlan_id, NULL); 4064 ipv4 = false; 4065 ibdev_dbg(&iwdev->ibdev, 4066 "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num, 4067 ip_addr); 4068 irdma_mcast_mac(ip_addr, dmac, false); 4069 } else { 4070 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 4071 ipv4 = true; 4072 vlan_id = irdma_get_vlan_ipv4(ip_addr); 4073 irdma_mcast_mac(ip_addr, dmac, true); 4074 ibdev_dbg(&iwdev->ibdev, 4075 "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n", 4076 ibqp->qp_num, ip_addr, dmac); 4077 } 4078 4079 spin_lock_irqsave(&rf->qh_list_lock, flags); 4080 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr); 4081 if (!mc_qht_elem) { 4082 struct irdma_dma_mem *dma_mem_mc; 4083 4084 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4085 mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL); 4086 if (!mc_qht_elem) 4087 return -ENOMEM; 4088 4089 mc_qht_elem->mc_info.ipv4_valid = ipv4; 4090 memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr, 4091 sizeof(mc_qht_elem->mc_info.dest_ip)); 4092 ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg, 4093 &mgn, &rf->next_mcg); 4094 if (ret) { 4095 kfree(mc_qht_elem); 4096 return -ENOMEM; 4097 } 4098 4099 mc_qht_elem->mc_info.mgn = mgn; 4100 dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc; 4101 dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX, 4102 IRDMA_HW_PAGE_SIZE); 4103 dma_mem_mc->va = dma_alloc_coherent(rf->hw.device, 4104 dma_mem_mc->size, 4105 &dma_mem_mc->pa, 4106 GFP_KERNEL); 4107 if (!dma_mem_mc->va) { 4108 irdma_free_rsrc(rf, rf->allocated_mcgs, mgn); 4109 kfree(mc_qht_elem); 4110 return -ENOMEM; 4111 } 4112 4113 mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn; 4114 memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr, 4115 sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr)); 4116 mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4; 4117 mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id; 4118 if (vlan_id < VLAN_N_VID) 4119 mc_qht_elem->mc_grp_ctx.vlan_valid = true; 4120 mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id; 4121 mc_qht_elem->mc_grp_ctx.qs_handle = 4122 iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle; 4123 ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac); 4124 4125 spin_lock_irqsave(&rf->qh_list_lock, flags); 4126 mcast_list_add(rf, mc_qht_elem); 4127 } else { 4128 if (mc_qht_elem->mc_grp_ctx.no_of_mgs == 4129 IRDMA_MAX_MGS_PER_CTX) { 4130 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4131 return -ENOMEM; 4132 } 4133 } 4134 4135 mcg_info.qp_id = iwqp->ibqp.qp_num; 4136 no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs; 4137 irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 4138 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4139 4140 /* Only if there is a change do we need to modify or create */ 4141 if (!no_mgs) { 4142 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 4143 IRDMA_OP_MC_CREATE); 4144 } else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) { 4145 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 4146 IRDMA_OP_MC_MODIFY); 4147 } else { 4148 return 0; 4149 } 4150 4151 if (ret) 4152 goto error; 4153 4154 return 0; 4155 4156 error: 4157 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 4158 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) { 4159 mcast_list_del(mc_qht_elem); 4160 dma_free_coherent(rf->hw.device, 4161 mc_qht_elem->mc_grp_ctx.dma_mem_mc.size, 4162 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va, 4163 mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa); 4164 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL; 4165 irdma_free_rsrc(rf, rf->allocated_mcgs, 4166 mc_qht_elem->mc_grp_ctx.mg_id); 4167 kfree(mc_qht_elem); 4168 } 4169 4170 return ret; 4171 } 4172 4173 /** 4174 * irdma_detach_mcast - detach a qp from a multicast group 4175 * @ibqp: ptr to qp 4176 * @ibgid: pointer to global ID 4177 * @lid: local ID 4178 * 4179 * returns error status 4180 */ 4181 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) 4182 { 4183 struct irdma_qp *iwqp = to_iwqp(ibqp); 4184 struct irdma_device *iwdev = iwqp->iwdev; 4185 struct irdma_pci_f *rf = iwdev->rf; 4186 u32 ip_addr[4] = {}; 4187 struct mc_table_list *mc_qht_elem; 4188 struct irdma_mcast_grp_ctx_entry_info mcg_info = {}; 4189 int ret; 4190 unsigned long flags; 4191 union irdma_sockaddr sgid_addr; 4192 4193 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid); 4194 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) 4195 irdma_copy_ip_ntohl(ip_addr, 4196 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32); 4197 else 4198 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 4199 4200 spin_lock_irqsave(&rf->qh_list_lock, flags); 4201 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr); 4202 if (!mc_qht_elem) { 4203 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4204 ibdev_dbg(&iwdev->ibdev, 4205 "VERBS: address not found MCG\n"); 4206 return 0; 4207 } 4208 4209 mcg_info.qp_id = iwqp->ibqp.qp_num; 4210 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 4211 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) { 4212 mcast_list_del(mc_qht_elem); 4213 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4214 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 4215 IRDMA_OP_MC_DESTROY); 4216 if (ret) { 4217 ibdev_dbg(&iwdev->ibdev, 4218 "VERBS: failed MC_DESTROY MCG\n"); 4219 spin_lock_irqsave(&rf->qh_list_lock, flags); 4220 mcast_list_add(rf, mc_qht_elem); 4221 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4222 return -EAGAIN; 4223 } 4224 4225 dma_free_coherent(rf->hw.device, 4226 mc_qht_elem->mc_grp_ctx.dma_mem_mc.size, 4227 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va, 4228 mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa); 4229 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL; 4230 irdma_free_rsrc(rf, rf->allocated_mcgs, 4231 mc_qht_elem->mc_grp_ctx.mg_id); 4232 kfree(mc_qht_elem); 4233 } else { 4234 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 4235 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 4236 IRDMA_OP_MC_MODIFY); 4237 if (ret) { 4238 ibdev_dbg(&iwdev->ibdev, 4239 "VERBS: failed Modify MCG\n"); 4240 return ret; 4241 } 4242 } 4243 4244 return 0; 4245 } 4246 4247 static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep) 4248 { 4249 struct irdma_pci_f *rf = iwdev->rf; 4250 int err; 4251 4252 err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx, 4253 &rf->next_ah); 4254 if (err) 4255 return err; 4256 4257 err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep, 4258 irdma_gsi_ud_qp_ah_cb, &ah->sc_ah); 4259 4260 if (err) { 4261 ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail"); 4262 goto err_ah_create; 4263 } 4264 4265 if (!sleep) { 4266 int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD; 4267 4268 do { 4269 irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq); 4270 mdelay(1); 4271 } while (!ah->sc_ah.ah_info.ah_valid && --cnt); 4272 4273 if (!cnt) { 4274 ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out"); 4275 err = -ETIMEDOUT; 4276 goto err_ah_create; 4277 } 4278 } 4279 return 0; 4280 4281 err_ah_create: 4282 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx); 4283 4284 return err; 4285 } 4286 4287 static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr) 4288 { 4289 struct irdma_pd *pd = to_iwpd(ibah->pd); 4290 struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah); 4291 struct rdma_ah_attr *ah_attr = attr->ah_attr; 4292 const struct ib_gid_attr *sgid_attr; 4293 struct irdma_device *iwdev = to_iwdev(ibah->pd->device); 4294 struct irdma_pci_f *rf = iwdev->rf; 4295 struct irdma_sc_ah *sc_ah; 4296 struct irdma_ah_info *ah_info; 4297 union irdma_sockaddr sgid_addr, dgid_addr; 4298 int err; 4299 u8 dmac[ETH_ALEN]; 4300 4301 ah->pd = pd; 4302 sc_ah = &ah->sc_ah; 4303 sc_ah->ah_info.vsi = &iwdev->vsi; 4304 irdma_sc_init_ah(&rf->sc_dev, sc_ah); 4305 ah->sgid_index = ah_attr->grh.sgid_index; 4306 sgid_attr = ah_attr->grh.sgid_attr; 4307 memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid)); 4308 rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid); 4309 rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid); 4310 ah->av.attrs = *ah_attr; 4311 ah->av.net_type = rdma_gid_attr_network_type(sgid_attr); 4312 ah_info = &sc_ah->ah_info; 4313 ah_info->pd_idx = pd->sc_pd.pd_id; 4314 if (ah_attr->ah_flags & IB_AH_GRH) { 4315 ah_info->flow_label = ah_attr->grh.flow_label; 4316 ah_info->hop_ttl = ah_attr->grh.hop_limit; 4317 ah_info->tc_tos = ah_attr->grh.traffic_class; 4318 } 4319 4320 ether_addr_copy(dmac, ah_attr->roce.dmac); 4321 if (ah->av.net_type == RDMA_NETWORK_IPV4) { 4322 ah_info->ipv4_valid = true; 4323 ah_info->dest_ip_addr[0] = 4324 ntohl(dgid_addr.saddr_in.sin_addr.s_addr); 4325 ah_info->src_ip_addr[0] = 4326 ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 4327 ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0], 4328 ah_info->dest_ip_addr[0]); 4329 if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) { 4330 ah_info->do_lpbk = true; 4331 irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true); 4332 } 4333 } else { 4334 irdma_copy_ip_ntohl(ah_info->dest_ip_addr, 4335 dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32); 4336 irdma_copy_ip_ntohl(ah_info->src_ip_addr, 4337 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32); 4338 ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr, 4339 ah_info->dest_ip_addr); 4340 if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) { 4341 ah_info->do_lpbk = true; 4342 irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false); 4343 } 4344 } 4345 4346 err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag, 4347 ah_info->mac_addr); 4348 if (err) 4349 return err; 4350 4351 ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr, 4352 ah_info->ipv4_valid, dmac); 4353 4354 if (ah_info->dst_arpindex == -1) 4355 return -EINVAL; 4356 4357 if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode) 4358 ah_info->vlan_tag = 0; 4359 4360 if (ah_info->vlan_tag < VLAN_N_VID) { 4361 u8 prio = rt_tos2priority(ah_info->tc_tos); 4362 4363 prio = irdma_roce_get_vlan_prio(sgid_attr, prio); 4364 4365 ah_info->vlan_tag |= (u16)prio << VLAN_PRIO_SHIFT; 4366 ah_info->insert_vlan_tag = true; 4367 } 4368 4369 return 0; 4370 } 4371 4372 /** 4373 * irdma_ah_exists - Check for existing identical AH 4374 * @iwdev: irdma device 4375 * @new_ah: AH to check for 4376 * 4377 * returns true if AH is found, false if not found. 4378 */ 4379 static bool irdma_ah_exists(struct irdma_device *iwdev, 4380 struct irdma_ah *new_ah) 4381 { 4382 struct irdma_ah *ah; 4383 u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^ 4384 new_ah->sc_ah.ah_info.dest_ip_addr[1] ^ 4385 new_ah->sc_ah.ah_info.dest_ip_addr[2] ^ 4386 new_ah->sc_ah.ah_info.dest_ip_addr[3]; 4387 4388 hash_for_each_possible(iwdev->ah_hash_tbl, ah, list, key) { 4389 /* Set ah_valid and ah_id the same so memcmp can work */ 4390 new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx; 4391 new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid; 4392 if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info, 4393 sizeof(ah->sc_ah.ah_info))) { 4394 refcount_inc(&ah->refcnt); 4395 new_ah->parent_ah = ah; 4396 return true; 4397 } 4398 } 4399 4400 return false; 4401 } 4402 4403 /** 4404 * irdma_destroy_ah - Destroy address handle 4405 * @ibah: pointer to address handle 4406 * @ah_flags: flags for sleepable 4407 */ 4408 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags) 4409 { 4410 struct irdma_device *iwdev = to_iwdev(ibah->device); 4411 struct irdma_ah *ah = to_iwah(ibah); 4412 4413 if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) { 4414 mutex_lock(&iwdev->ah_tbl_lock); 4415 if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) { 4416 mutex_unlock(&iwdev->ah_tbl_lock); 4417 return 0; 4418 } 4419 hash_del(&ah->parent_ah->list); 4420 kfree(ah->parent_ah); 4421 mutex_unlock(&iwdev->ah_tbl_lock); 4422 } 4423 4424 irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY, 4425 false, NULL, ah); 4426 4427 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, 4428 ah->sc_ah.ah_info.ah_idx); 4429 4430 return 0; 4431 } 4432 4433 /** 4434 * irdma_create_user_ah - create user address handle 4435 * @ibah: address handle 4436 * @attr: address handle attributes 4437 * @udata: User data 4438 * 4439 * returns 0 on success, error otherwise 4440 */ 4441 static int irdma_create_user_ah(struct ib_ah *ibah, 4442 struct rdma_ah_init_attr *attr, 4443 struct ib_udata *udata) 4444 { 4445 #define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd) 4446 struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah); 4447 struct irdma_device *iwdev = to_iwdev(ibah->pd->device); 4448 struct irdma_create_ah_resp uresp; 4449 struct irdma_ah *parent_ah; 4450 int err; 4451 4452 if (udata && udata->outlen < IRDMA_CREATE_AH_MIN_RESP_LEN) 4453 return -EINVAL; 4454 4455 err = irdma_setup_ah(ibah, attr); 4456 if (err) 4457 return err; 4458 mutex_lock(&iwdev->ah_tbl_lock); 4459 if (!irdma_ah_exists(iwdev, ah)) { 4460 err = irdma_create_hw_ah(iwdev, ah, true); 4461 if (err) { 4462 mutex_unlock(&iwdev->ah_tbl_lock); 4463 return err; 4464 } 4465 /* Add new AH to list */ 4466 parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL); 4467 if (parent_ah) { 4468 u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^ 4469 parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^ 4470 parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^ 4471 parent_ah->sc_ah.ah_info.dest_ip_addr[3]; 4472 4473 ah->parent_ah = parent_ah; 4474 hash_add(iwdev->ah_hash_tbl, &parent_ah->list, key); 4475 refcount_set(&parent_ah->refcnt, 1); 4476 } 4477 } 4478 mutex_unlock(&iwdev->ah_tbl_lock); 4479 4480 uresp.ah_id = ah->sc_ah.ah_info.ah_idx; 4481 err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen)); 4482 if (err) 4483 irdma_destroy_ah(ibah, attr->flags); 4484 4485 return err; 4486 } 4487 4488 /** 4489 * irdma_create_ah - create address handle 4490 * @ibah: address handle 4491 * @attr: address handle attributes 4492 * @udata: NULL 4493 * 4494 * returns 0 on success, error otherwise 4495 */ 4496 static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr, 4497 struct ib_udata *udata) 4498 { 4499 struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah); 4500 struct irdma_device *iwdev = to_iwdev(ibah->pd->device); 4501 int err; 4502 4503 err = irdma_setup_ah(ibah, attr); 4504 if (err) 4505 return err; 4506 err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE); 4507 4508 return err; 4509 } 4510 4511 /** 4512 * irdma_query_ah - Query address handle 4513 * @ibah: pointer to address handle 4514 * @ah_attr: address handle attributes 4515 */ 4516 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr) 4517 { 4518 struct irdma_ah *ah = to_iwah(ibah); 4519 4520 memset(ah_attr, 0, sizeof(*ah_attr)); 4521 if (ah->av.attrs.ah_flags & IB_AH_GRH) { 4522 ah_attr->ah_flags = IB_AH_GRH; 4523 ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label; 4524 ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos; 4525 ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl; 4526 ah_attr->grh.sgid_index = ah->sgid_index; 4527 memcpy(&ah_attr->grh.dgid, &ah->dgid, 4528 sizeof(ah_attr->grh.dgid)); 4529 } 4530 4531 return 0; 4532 } 4533 4534 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev, 4535 u32 port_num) 4536 { 4537 return IB_LINK_LAYER_ETHERNET; 4538 } 4539 4540 static const struct ib_device_ops irdma_roce_dev_ops = { 4541 .attach_mcast = irdma_attach_mcast, 4542 .create_ah = irdma_create_ah, 4543 .create_user_ah = irdma_create_user_ah, 4544 .destroy_ah = irdma_destroy_ah, 4545 .detach_mcast = irdma_detach_mcast, 4546 .get_link_layer = irdma_get_link_layer, 4547 .get_port_immutable = irdma_roce_port_immutable, 4548 .modify_qp = irdma_modify_qp_roce, 4549 .query_ah = irdma_query_ah, 4550 .query_pkey = irdma_query_pkey, 4551 }; 4552 4553 static const struct ib_device_ops irdma_iw_dev_ops = { 4554 .get_port_immutable = irdma_iw_port_immutable, 4555 .iw_accept = irdma_accept, 4556 .iw_add_ref = irdma_qp_add_ref, 4557 .iw_connect = irdma_connect, 4558 .iw_create_listen = irdma_create_listen, 4559 .iw_destroy_listen = irdma_destroy_listen, 4560 .iw_get_qp = irdma_get_qp, 4561 .iw_reject = irdma_reject, 4562 .iw_rem_ref = irdma_qp_rem_ref, 4563 .modify_qp = irdma_modify_qp, 4564 .query_gid = irdma_query_gid, 4565 }; 4566 4567 static const struct ib_device_ops irdma_dev_ops = { 4568 .owner = THIS_MODULE, 4569 .driver_id = RDMA_DRIVER_IRDMA, 4570 .uverbs_abi_ver = IRDMA_ABI_VER, 4571 4572 .alloc_hw_port_stats = irdma_alloc_hw_port_stats, 4573 .alloc_mr = irdma_alloc_mr, 4574 .alloc_mw = irdma_alloc_mw, 4575 .alloc_pd = irdma_alloc_pd, 4576 .alloc_ucontext = irdma_alloc_ucontext, 4577 .create_cq = irdma_create_cq, 4578 .create_qp = irdma_create_qp, 4579 .dealloc_driver = irdma_ib_dealloc_device, 4580 .dealloc_mw = irdma_dealloc_mw, 4581 .dealloc_pd = irdma_dealloc_pd, 4582 .dealloc_ucontext = irdma_dealloc_ucontext, 4583 .dereg_mr = irdma_dereg_mr, 4584 .destroy_cq = irdma_destroy_cq, 4585 .destroy_qp = irdma_destroy_qp, 4586 .disassociate_ucontext = irdma_disassociate_ucontext, 4587 .get_dev_fw_str = irdma_get_dev_fw_str, 4588 .get_dma_mr = irdma_get_dma_mr, 4589 .get_hw_stats = irdma_get_hw_stats, 4590 .map_mr_sg = irdma_map_mr_sg, 4591 .mmap = irdma_mmap, 4592 .mmap_free = irdma_mmap_free, 4593 .poll_cq = irdma_poll_cq, 4594 .post_recv = irdma_post_recv, 4595 .post_send = irdma_post_send, 4596 .query_device = irdma_query_device, 4597 .query_port = irdma_query_port, 4598 .query_qp = irdma_query_qp, 4599 .reg_user_mr = irdma_reg_user_mr, 4600 .reg_user_mr_dmabuf = irdma_reg_user_mr_dmabuf, 4601 .req_notify_cq = irdma_req_notify_cq, 4602 .resize_cq = irdma_resize_cq, 4603 INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd), 4604 INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext), 4605 INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah), 4606 INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq), 4607 INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw), 4608 INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp), 4609 }; 4610 4611 /** 4612 * irdma_init_roce_device - initialization of roce rdma device 4613 * @iwdev: irdma device 4614 */ 4615 static void irdma_init_roce_device(struct irdma_device *iwdev) 4616 { 4617 iwdev->ibdev.node_type = RDMA_NODE_IB_CA; 4618 addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid, 4619 iwdev->netdev->dev_addr); 4620 ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops); 4621 } 4622 4623 /** 4624 * irdma_init_iw_device - initialization of iwarp rdma device 4625 * @iwdev: irdma device 4626 */ 4627 static void irdma_init_iw_device(struct irdma_device *iwdev) 4628 { 4629 struct net_device *netdev = iwdev->netdev; 4630 4631 iwdev->ibdev.node_type = RDMA_NODE_RNIC; 4632 addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid, 4633 netdev->dev_addr); 4634 memcpy(iwdev->ibdev.iw_ifname, netdev->name, 4635 sizeof(iwdev->ibdev.iw_ifname)); 4636 ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops); 4637 } 4638 4639 /** 4640 * irdma_init_rdma_device - initialization of rdma device 4641 * @iwdev: irdma device 4642 */ 4643 static void irdma_init_rdma_device(struct irdma_device *iwdev) 4644 { 4645 struct pci_dev *pcidev = iwdev->rf->pcidev; 4646 4647 if (iwdev->roce_mode) 4648 irdma_init_roce_device(iwdev); 4649 else 4650 irdma_init_iw_device(iwdev); 4651 4652 iwdev->ibdev.phys_port_cnt = 1; 4653 iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count; 4654 iwdev->ibdev.dev.parent = &pcidev->dev; 4655 ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops); 4656 } 4657 4658 /** 4659 * irdma_port_ibevent - indicate port event 4660 * @iwdev: irdma device 4661 */ 4662 void irdma_port_ibevent(struct irdma_device *iwdev) 4663 { 4664 struct ib_event event; 4665 4666 event.device = &iwdev->ibdev; 4667 event.element.port_num = 1; 4668 event.event = 4669 iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 4670 ib_dispatch_event(&event); 4671 } 4672 4673 /** 4674 * irdma_ib_unregister_device - unregister rdma device from IB 4675 * core 4676 * @iwdev: irdma device 4677 */ 4678 void irdma_ib_unregister_device(struct irdma_device *iwdev) 4679 { 4680 iwdev->iw_status = 0; 4681 irdma_port_ibevent(iwdev); 4682 ib_unregister_device(&iwdev->ibdev); 4683 } 4684 4685 /** 4686 * irdma_ib_register_device - register irdma device to IB core 4687 * @iwdev: irdma device 4688 */ 4689 int irdma_ib_register_device(struct irdma_device *iwdev) 4690 { 4691 int ret; 4692 4693 irdma_init_rdma_device(iwdev); 4694 4695 ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1); 4696 if (ret) 4697 goto error; 4698 dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX); 4699 ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device); 4700 if (ret) 4701 goto error; 4702 4703 iwdev->iw_status = 1; 4704 irdma_port_ibevent(iwdev); 4705 4706 return 0; 4707 4708 error: 4709 if (ret) 4710 ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n"); 4711 4712 return ret; 4713 } 4714 4715 /** 4716 * irdma_ib_dealloc_device 4717 * @ibdev: ib device 4718 * 4719 * callback from ibdev dealloc_driver to deallocate resources 4720 * unber irdma device 4721 */ 4722 void irdma_ib_dealloc_device(struct ib_device *ibdev) 4723 { 4724 struct irdma_device *iwdev = to_iwdev(ibdev); 4725 4726 irdma_rt_deinit_hw(iwdev); 4727 irdma_ctrl_deinit_hw(iwdev->rf); 4728 kfree(iwdev->rf); 4729 } 4730