1 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4 
5 /**
6  * irdma_query_device - get device attributes
7  * @ibdev: device pointer from stack
8  * @props: returning device attributes
9  * @udata: user data
10  */
11 static int irdma_query_device(struct ib_device *ibdev,
12 			      struct ib_device_attr *props,
13 			      struct ib_udata *udata)
14 {
15 	struct irdma_device *iwdev = to_iwdev(ibdev);
16 	struct irdma_pci_f *rf = iwdev->rf;
17 	struct pci_dev *pcidev = iwdev->rf->pcidev;
18 	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19 
20 	if (udata->inlen || udata->outlen)
21 		return -EINVAL;
22 
23 	memset(props, 0, sizeof(*props));
24 	addrconf_addr_eui48((u8 *)&props->sys_image_guid,
25 			    iwdev->netdev->dev_addr);
26 	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
27 			irdma_fw_minor_ver(&rf->sc_dev);
28 	props->device_cap_flags = IB_DEVICE_MEM_WINDOW |
29 				  IB_DEVICE_MEM_MGT_EXTENSIONS;
30 	props->kernel_cap_flags = IBK_LOCAL_DMA_LKEY;
31 	props->vendor_id = pcidev->vendor;
32 	props->vendor_part_id = pcidev->device;
33 
34 	props->hw_ver = rf->pcidev->revision;
35 	props->page_size_cap = hw_attrs->page_size_cap;
36 	props->max_mr_size = hw_attrs->max_mr_size;
37 	props->max_qp = rf->max_qp - rf->used_qps;
38 	props->max_qp_wr = hw_attrs->max_qp_wr;
39 	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
40 	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
41 	props->max_cq = rf->max_cq - rf->used_cqs;
42 	props->max_cqe = rf->max_cqe - 1;
43 	props->max_mr = rf->max_mr - rf->used_mrs;
44 	props->max_mw = props->max_mr;
45 	props->max_pd = rf->max_pd - rf->used_pds;
46 	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
47 	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
48 	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
49 	if (rdma_protocol_roce(ibdev, 1)) {
50 		props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN;
51 		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
52 	}
53 
54 	props->max_ah = rf->max_ah;
55 	props->max_mcast_grp = rf->max_mcg;
56 	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
57 	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
58 	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
59 #define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff
60 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2)
61 		props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK;
62 
63 	return 0;
64 }
65 
66 /**
67  * irdma_query_port - get port attributes
68  * @ibdev: device pointer from stack
69  * @port: port number for query
70  * @props: returning device attributes
71  */
72 static int irdma_query_port(struct ib_device *ibdev, u32 port,
73 			    struct ib_port_attr *props)
74 {
75 	struct irdma_device *iwdev = to_iwdev(ibdev);
76 	struct net_device *netdev = iwdev->netdev;
77 
78 	/* no need to zero out pros here. done by caller */
79 
80 	props->max_mtu = IB_MTU_4096;
81 	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
82 	props->lid = 1;
83 	props->lmc = 0;
84 	props->sm_lid = 0;
85 	props->sm_sl = 0;
86 	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
87 		props->state = IB_PORT_ACTIVE;
88 		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
89 	} else {
90 		props->state = IB_PORT_DOWN;
91 		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
92 	}
93 
94 	ib_get_eth_speed(ibdev, port, &props->active_speed,
95 			 &props->active_width);
96 
97 	if (rdma_protocol_roce(ibdev, 1)) {
98 		props->gid_tbl_len = 32;
99 		props->ip_gids = true;
100 		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
101 	} else {
102 		props->gid_tbl_len = 1;
103 	}
104 	props->qkey_viol_cntr = 0;
105 	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
106 	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
107 
108 	return 0;
109 }
110 
111 /**
112  * irdma_disassociate_ucontext - Disassociate user context
113  * @context: ib user context
114  */
115 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
116 {
117 }
118 
119 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
120 			     struct vm_area_struct *vma)
121 {
122 	u64 pfn;
123 
124 	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
125 		return -EINVAL;
126 
127 	vma->vm_private_data = ucontext;
128 	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
129 	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
130 
131 	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
132 				 pgprot_noncached(vma->vm_page_prot), NULL);
133 }
134 
135 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
136 {
137 	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
138 
139 	kfree(entry);
140 }
141 
142 static struct rdma_user_mmap_entry*
143 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
144 			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
145 {
146 	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
147 	int ret;
148 
149 	if (!entry)
150 		return NULL;
151 
152 	entry->bar_offset = bar_offset;
153 	entry->mmap_flag = mmap_flag;
154 
155 	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
156 					  &entry->rdma_entry, PAGE_SIZE);
157 	if (ret) {
158 		kfree(entry);
159 		return NULL;
160 	}
161 	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
162 
163 	return &entry->rdma_entry;
164 }
165 
166 /**
167  * irdma_mmap - user memory map
168  * @context: context created during alloc
169  * @vma: kernel info for user memory map
170  */
171 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
172 {
173 	struct rdma_user_mmap_entry *rdma_entry;
174 	struct irdma_user_mmap_entry *entry;
175 	struct irdma_ucontext *ucontext;
176 	u64 pfn;
177 	int ret;
178 
179 	ucontext = to_ucontext(context);
180 
181 	/* Legacy support for libi40iw with hard-coded mmap key */
182 	if (ucontext->legacy_mode)
183 		return irdma_mmap_legacy(ucontext, vma);
184 
185 	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
186 	if (!rdma_entry) {
187 		ibdev_dbg(&ucontext->iwdev->ibdev,
188 			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
189 			  vma->vm_pgoff);
190 		return -EINVAL;
191 	}
192 
193 	entry = to_irdma_mmap_entry(rdma_entry);
194 	ibdev_dbg(&ucontext->iwdev->ibdev,
195 		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
196 		  entry->bar_offset, entry->mmap_flag);
197 
198 	pfn = (entry->bar_offset +
199 	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
200 
201 	switch (entry->mmap_flag) {
202 	case IRDMA_MMAP_IO_NC:
203 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
204 					pgprot_noncached(vma->vm_page_prot),
205 					rdma_entry);
206 		break;
207 	case IRDMA_MMAP_IO_WC:
208 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
209 					pgprot_writecombine(vma->vm_page_prot),
210 					rdma_entry);
211 		break;
212 	default:
213 		ret = -EINVAL;
214 	}
215 
216 	if (ret)
217 		ibdev_dbg(&ucontext->iwdev->ibdev,
218 			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
219 			  entry->bar_offset, entry->mmap_flag, ret);
220 	rdma_user_mmap_entry_put(rdma_entry);
221 
222 	return ret;
223 }
224 
225 /**
226  * irdma_alloc_push_page - allocate a push page for qp
227  * @iwqp: qp pointer
228  */
229 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
230 {
231 	struct irdma_cqp_request *cqp_request;
232 	struct cqp_cmds_info *cqp_info;
233 	struct irdma_device *iwdev = iwqp->iwdev;
234 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
235 	int status;
236 
237 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
238 	if (!cqp_request)
239 		return;
240 
241 	cqp_info = &cqp_request->info;
242 	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
243 	cqp_info->post_sq = 1;
244 	cqp_info->in.u.manage_push_page.info.push_idx = 0;
245 	cqp_info->in.u.manage_push_page.info.qs_handle =
246 		qp->vsi->qos[qp->user_pri].qs_handle;
247 	cqp_info->in.u.manage_push_page.info.free_page = 0;
248 	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
249 	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
250 	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
251 
252 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
253 	if (!status && cqp_request->compl_info.op_ret_val <
254 	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
255 		qp->push_idx = cqp_request->compl_info.op_ret_val;
256 		qp->push_offset = 0;
257 	}
258 
259 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
260 }
261 
262 /**
263  * irdma_alloc_ucontext - Allocate the user context data structure
264  * @uctx: uverbs context pointer
265  * @udata: user data
266  *
267  * This keeps track of all objects associated with a particular
268  * user-mode client.
269  */
270 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
271 				struct ib_udata *udata)
272 {
273 #define IRDMA_ALLOC_UCTX_MIN_REQ_LEN offsetofend(struct irdma_alloc_ucontext_req, rsvd8)
274 #define IRDMA_ALLOC_UCTX_MIN_RESP_LEN offsetofend(struct irdma_alloc_ucontext_resp, rsvd)
275 	struct ib_device *ibdev = uctx->device;
276 	struct irdma_device *iwdev = to_iwdev(ibdev);
277 	struct irdma_alloc_ucontext_req req = {};
278 	struct irdma_alloc_ucontext_resp uresp = {};
279 	struct irdma_ucontext *ucontext = to_ucontext(uctx);
280 	struct irdma_uk_attrs *uk_attrs;
281 
282 	if (udata->inlen < IRDMA_ALLOC_UCTX_MIN_REQ_LEN ||
283 	    udata->outlen < IRDMA_ALLOC_UCTX_MIN_RESP_LEN)
284 		return -EINVAL;
285 
286 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
287 		return -EINVAL;
288 
289 	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
290 		goto ver_error;
291 
292 	ucontext->iwdev = iwdev;
293 	ucontext->abi_ver = req.userspace_ver;
294 
295 	uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
296 	/* GEN_1 legacy support with libi40iw */
297 	if (udata->outlen == IRDMA_ALLOC_UCTX_MIN_RESP_LEN) {
298 		if (uk_attrs->hw_rev != IRDMA_GEN_1)
299 			return -EOPNOTSUPP;
300 
301 		ucontext->legacy_mode = true;
302 		uresp.max_qps = iwdev->rf->max_qp;
303 		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
304 		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
305 		uresp.kernel_ver = req.userspace_ver;
306 		if (ib_copy_to_udata(udata, &uresp,
307 				     min(sizeof(uresp), udata->outlen)))
308 			return -EFAULT;
309 	} else {
310 		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
311 
312 		ucontext->db_mmap_entry =
313 			irdma_user_mmap_entry_insert(ucontext, bar_off,
314 						     IRDMA_MMAP_IO_NC,
315 						     &uresp.db_mmap_key);
316 		if (!ucontext->db_mmap_entry)
317 			return -ENOMEM;
318 
319 		uresp.kernel_ver = IRDMA_ABI_VER;
320 		uresp.feature_flags = uk_attrs->feature_flags;
321 		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
322 		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
323 		uresp.max_hw_inline = uk_attrs->max_hw_inline;
324 		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
325 		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
326 		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
327 		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
328 		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
329 		uresp.hw_rev = uk_attrs->hw_rev;
330 		if (ib_copy_to_udata(udata, &uresp,
331 				     min(sizeof(uresp), udata->outlen))) {
332 			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
333 			return -EFAULT;
334 		}
335 	}
336 
337 	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
338 	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
339 	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
340 	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
341 
342 	return 0;
343 
344 ver_error:
345 	ibdev_err(&iwdev->ibdev,
346 		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
347 		  req.userspace_ver, IRDMA_ABI_VER);
348 	return -EINVAL;
349 }
350 
351 /**
352  * irdma_dealloc_ucontext - deallocate the user context data structure
353  * @context: user context created during alloc
354  */
355 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
356 {
357 	struct irdma_ucontext *ucontext = to_ucontext(context);
358 
359 	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
360 }
361 
362 /**
363  * irdma_alloc_pd - allocate protection domain
364  * @pd: PD pointer
365  * @udata: user data
366  */
367 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
368 {
369 #define IRDMA_ALLOC_PD_MIN_RESP_LEN offsetofend(struct irdma_alloc_pd_resp, rsvd)
370 	struct irdma_pd *iwpd = to_iwpd(pd);
371 	struct irdma_device *iwdev = to_iwdev(pd->device);
372 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
373 	struct irdma_pci_f *rf = iwdev->rf;
374 	struct irdma_alloc_pd_resp uresp = {};
375 	struct irdma_sc_pd *sc_pd;
376 	u32 pd_id = 0;
377 	int err;
378 
379 	if (udata && udata->outlen < IRDMA_ALLOC_PD_MIN_RESP_LEN)
380 		return -EINVAL;
381 
382 	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
383 			       &rf->next_pd);
384 	if (err)
385 		return err;
386 
387 	sc_pd = &iwpd->sc_pd;
388 	if (udata) {
389 		struct irdma_ucontext *ucontext =
390 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
391 						  ibucontext);
392 		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
393 		uresp.pd_id = pd_id;
394 		if (ib_copy_to_udata(udata, &uresp,
395 				     min(sizeof(uresp), udata->outlen))) {
396 			err = -EFAULT;
397 			goto error;
398 		}
399 	} else {
400 		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
401 	}
402 
403 	return 0;
404 error:
405 	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
406 
407 	return err;
408 }
409 
410 /**
411  * irdma_dealloc_pd - deallocate pd
412  * @ibpd: ptr of pd to be deallocated
413  * @udata: user data
414  */
415 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
416 {
417 	struct irdma_pd *iwpd = to_iwpd(ibpd);
418 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
419 
420 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
421 
422 	return 0;
423 }
424 
425 /**
426  * irdma_get_pbl - Retrieve pbl from a list given a virtual
427  * address
428  * @va: user virtual address
429  * @pbl_list: pbl list to search in (QP's or CQ's)
430  */
431 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
432 				       struct list_head *pbl_list)
433 {
434 	struct irdma_pbl *iwpbl;
435 
436 	list_for_each_entry (iwpbl, pbl_list, list) {
437 		if (iwpbl->user_base == va) {
438 			list_del(&iwpbl->list);
439 			iwpbl->on_list = false;
440 			return iwpbl;
441 		}
442 	}
443 
444 	return NULL;
445 }
446 
447 /**
448  * irdma_clean_cqes - clean cq entries for qp
449  * @iwqp: qp ptr (user or kernel)
450  * @iwcq: cq ptr
451  */
452 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
453 {
454 	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
455 	unsigned long flags;
456 
457 	spin_lock_irqsave(&iwcq->lock, flags);
458 	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
459 	spin_unlock_irqrestore(&iwcq->lock, flags);
460 }
461 
462 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
463 {
464 	if (iwqp->push_db_mmap_entry) {
465 		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
466 		iwqp->push_db_mmap_entry = NULL;
467 	}
468 	if (iwqp->push_wqe_mmap_entry) {
469 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
470 		iwqp->push_wqe_mmap_entry = NULL;
471 	}
472 }
473 
474 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
475 					 struct irdma_qp *iwqp,
476 					 u64 *push_wqe_mmap_key,
477 					 u64 *push_db_mmap_key)
478 {
479 	struct irdma_device *iwdev = ucontext->iwdev;
480 	u64 rsvd, bar_off;
481 
482 	rsvd = IRDMA_PF_BAR_RSVD;
483 	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
484 	/* skip over db page */
485 	bar_off += IRDMA_HW_PAGE_SIZE;
486 	/* push wqe page */
487 	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
488 	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
489 					bar_off, IRDMA_MMAP_IO_WC,
490 					push_wqe_mmap_key);
491 	if (!iwqp->push_wqe_mmap_entry)
492 		return -ENOMEM;
493 
494 	/* push doorbell page */
495 	bar_off += IRDMA_HW_PAGE_SIZE;
496 	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
497 					bar_off, IRDMA_MMAP_IO_NC,
498 					push_db_mmap_key);
499 	if (!iwqp->push_db_mmap_entry) {
500 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
501 		return -ENOMEM;
502 	}
503 
504 	return 0;
505 }
506 
507 /**
508  * irdma_destroy_qp - destroy qp
509  * @ibqp: qp's ib pointer also to get to device's qp address
510  * @udata: user data
511  */
512 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
513 {
514 	struct irdma_qp *iwqp = to_iwqp(ibqp);
515 	struct irdma_device *iwdev = iwqp->iwdev;
516 
517 	iwqp->sc_qp.qp_uk.destroy_pending = true;
518 
519 	if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS)
520 		irdma_modify_qp_to_err(&iwqp->sc_qp);
521 
522 	if (!iwqp->user_mode)
523 		cancel_delayed_work_sync(&iwqp->dwork_flush);
524 
525 	irdma_qp_rem_ref(&iwqp->ibqp);
526 	wait_for_completion(&iwqp->free_qp);
527 	irdma_free_lsmm_rsrc(iwqp);
528 	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
529 
530 	if (!iwqp->user_mode) {
531 		if (iwqp->iwscq) {
532 			irdma_clean_cqes(iwqp, iwqp->iwscq);
533 			if (iwqp->iwrcq != iwqp->iwscq)
534 				irdma_clean_cqes(iwqp, iwqp->iwrcq);
535 		}
536 	}
537 	irdma_remove_push_mmap_entries(iwqp);
538 	irdma_free_qp_rsrc(iwqp);
539 
540 	return 0;
541 }
542 
543 /**
544  * irdma_setup_virt_qp - setup for allocation of virtual qp
545  * @iwdev: irdma device
546  * @iwqp: qp ptr
547  * @init_info: initialize info to return
548  */
549 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
550 			       struct irdma_qp *iwqp,
551 			       struct irdma_qp_init_info *init_info)
552 {
553 	struct irdma_pbl *iwpbl = iwqp->iwpbl;
554 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
555 
556 	iwqp->page = qpmr->sq_page;
557 	init_info->shadow_area_pa = qpmr->shadow;
558 	if (iwpbl->pbl_allocated) {
559 		init_info->virtual_map = true;
560 		init_info->sq_pa = qpmr->sq_pbl.idx;
561 		init_info->rq_pa = qpmr->rq_pbl.idx;
562 	} else {
563 		init_info->sq_pa = qpmr->sq_pbl.addr;
564 		init_info->rq_pa = qpmr->rq_pbl.addr;
565 	}
566 }
567 
568 /**
569  * irdma_setup_kmode_qp - setup initialization for kernel mode qp
570  * @iwdev: iwarp device
571  * @iwqp: qp ptr (user or kernel)
572  * @info: initialize info to return
573  * @init_attr: Initial QP create attributes
574  */
575 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
576 				struct irdma_qp *iwqp,
577 				struct irdma_qp_init_info *info,
578 				struct ib_qp_init_attr *init_attr)
579 {
580 	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
581 	u32 sqdepth, rqdepth;
582 	u8 sqshift, rqshift;
583 	u32 size;
584 	int status;
585 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
586 	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
587 
588 	irdma_get_wqe_shift(uk_attrs,
589 		uk_attrs->hw_rev >= IRDMA_GEN_2 ? ukinfo->max_sq_frag_cnt + 1 :
590 						  ukinfo->max_sq_frag_cnt,
591 		ukinfo->max_inline_data, &sqshift);
592 	status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
593 				   &sqdepth);
594 	if (status)
595 		return status;
596 
597 	if (uk_attrs->hw_rev == IRDMA_GEN_1)
598 		rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
599 	else
600 		irdma_get_wqe_shift(uk_attrs, ukinfo->max_rq_frag_cnt, 0,
601 				    &rqshift);
602 
603 	status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
604 				   &rqdepth);
605 	if (status)
606 		return status;
607 
608 	iwqp->kqp.sq_wrid_mem =
609 		kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
610 	if (!iwqp->kqp.sq_wrid_mem)
611 		return -ENOMEM;
612 
613 	iwqp->kqp.rq_wrid_mem =
614 		kcalloc(rqdepth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
615 	if (!iwqp->kqp.rq_wrid_mem) {
616 		kfree(iwqp->kqp.sq_wrid_mem);
617 		iwqp->kqp.sq_wrid_mem = NULL;
618 		return -ENOMEM;
619 	}
620 
621 	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
622 	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
623 
624 	size = (sqdepth + rqdepth) * IRDMA_QP_WQE_MIN_SIZE;
625 	size += (IRDMA_SHADOW_AREA_SIZE << 3);
626 
627 	mem->size = ALIGN(size, 256);
628 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
629 				     &mem->pa, GFP_KERNEL);
630 	if (!mem->va) {
631 		kfree(iwqp->kqp.sq_wrid_mem);
632 		iwqp->kqp.sq_wrid_mem = NULL;
633 		kfree(iwqp->kqp.rq_wrid_mem);
634 		iwqp->kqp.rq_wrid_mem = NULL;
635 		return -ENOMEM;
636 	}
637 
638 	ukinfo->sq = mem->va;
639 	info->sq_pa = mem->pa;
640 	ukinfo->rq = &ukinfo->sq[sqdepth];
641 	info->rq_pa = info->sq_pa + (sqdepth * IRDMA_QP_WQE_MIN_SIZE);
642 	ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
643 	info->shadow_area_pa = info->rq_pa + (rqdepth * IRDMA_QP_WQE_MIN_SIZE);
644 	ukinfo->sq_size = sqdepth >> sqshift;
645 	ukinfo->rq_size = rqdepth >> rqshift;
646 	ukinfo->qp_id = iwqp->ibqp.qp_num;
647 
648 	init_attr->cap.max_send_wr = (sqdepth - IRDMA_SQ_RSVD) >> sqshift;
649 	init_attr->cap.max_recv_wr = (rqdepth - IRDMA_RQ_RSVD) >> rqshift;
650 
651 	return 0;
652 }
653 
654 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
655 {
656 	struct irdma_pci_f *rf = iwqp->iwdev->rf;
657 	struct irdma_cqp_request *cqp_request;
658 	struct cqp_cmds_info *cqp_info;
659 	struct irdma_create_qp_info *qp_info;
660 	int status;
661 
662 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
663 	if (!cqp_request)
664 		return -ENOMEM;
665 
666 	cqp_info = &cqp_request->info;
667 	qp_info = &cqp_request->info.in.u.qp_create.info;
668 	memset(qp_info, 0, sizeof(*qp_info));
669 	qp_info->mac_valid = true;
670 	qp_info->cq_num_valid = true;
671 	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
672 
673 	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
674 	cqp_info->post_sq = 1;
675 	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
676 	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
677 	status = irdma_handle_cqp_op(rf, cqp_request);
678 	irdma_put_cqp_request(&rf->cqp, cqp_request);
679 
680 	return status;
681 }
682 
683 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
684 					       struct irdma_qp_host_ctx_info *ctx_info)
685 {
686 	struct irdma_device *iwdev = iwqp->iwdev;
687 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
688 	struct irdma_roce_offload_info *roce_info;
689 	struct irdma_udp_offload_info *udp_info;
690 
691 	udp_info = &iwqp->udp_info;
692 	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
693 	udp_info->cwnd = iwdev->roce_cwnd;
694 	udp_info->rexmit_thresh = 2;
695 	udp_info->rnr_nak_thresh = 2;
696 	udp_info->src_port = 0xc000;
697 	udp_info->dst_port = ROCE_V2_UDP_DPORT;
698 	roce_info = &iwqp->roce_info;
699 	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
700 
701 	roce_info->rd_en = true;
702 	roce_info->wr_rdresp_en = true;
703 	roce_info->bind_en = true;
704 	roce_info->dcqcn_en = false;
705 	roce_info->rtomin = 5;
706 
707 	roce_info->ack_credits = iwdev->roce_ackcreds;
708 	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
709 	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
710 
711 	if (!iwqp->user_mode) {
712 		roce_info->priv_mode_en = true;
713 		roce_info->fast_reg_en = true;
714 		roce_info->udprivcq_en = true;
715 	}
716 	roce_info->roce_tver = 0;
717 
718 	ctx_info->roce_info = &iwqp->roce_info;
719 	ctx_info->udp_info = &iwqp->udp_info;
720 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
721 }
722 
723 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
724 					     struct irdma_qp_host_ctx_info *ctx_info)
725 {
726 	struct irdma_device *iwdev = iwqp->iwdev;
727 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
728 	struct irdma_iwarp_offload_info *iwarp_info;
729 
730 	iwarp_info = &iwqp->iwarp_info;
731 	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
732 	iwarp_info->rd_en = true;
733 	iwarp_info->wr_rdresp_en = true;
734 	iwarp_info->bind_en = true;
735 	iwarp_info->ecn_en = true;
736 	iwarp_info->rtomin = 5;
737 
738 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
739 		iwarp_info->ib_rd_en = true;
740 	if (!iwqp->user_mode) {
741 		iwarp_info->priv_mode_en = true;
742 		iwarp_info->fast_reg_en = true;
743 	}
744 	iwarp_info->ddp_ver = 1;
745 	iwarp_info->rdmap_ver = 1;
746 
747 	ctx_info->iwarp_info = &iwqp->iwarp_info;
748 	ctx_info->iwarp_info_valid = true;
749 	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
750 	ctx_info->iwarp_info_valid = false;
751 }
752 
753 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
754 				   struct irdma_device *iwdev)
755 {
756 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
757 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
758 
759 	if (init_attr->create_flags)
760 		return -EOPNOTSUPP;
761 
762 	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
763 	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
764 	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags)
765 		return -EINVAL;
766 
767 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
768 		if (init_attr->qp_type != IB_QPT_RC &&
769 		    init_attr->qp_type != IB_QPT_UD &&
770 		    init_attr->qp_type != IB_QPT_GSI)
771 			return -EOPNOTSUPP;
772 	} else {
773 		if (init_attr->qp_type != IB_QPT_RC)
774 			return -EOPNOTSUPP;
775 	}
776 
777 	return 0;
778 }
779 
780 static void irdma_flush_worker(struct work_struct *work)
781 {
782 	struct delayed_work *dwork = to_delayed_work(work);
783 	struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush);
784 
785 	irdma_generate_flush_completions(iwqp);
786 }
787 
788 /**
789  * irdma_create_qp - create qp
790  * @ibqp: ptr of qp
791  * @init_attr: attributes for qp
792  * @udata: user data for create qp
793  */
794 static int irdma_create_qp(struct ib_qp *ibqp,
795 			   struct ib_qp_init_attr *init_attr,
796 			   struct ib_udata *udata)
797 {
798 #define IRDMA_CREATE_QP_MIN_REQ_LEN offsetofend(struct irdma_create_qp_req, user_compl_ctx)
799 #define IRDMA_CREATE_QP_MIN_RESP_LEN offsetofend(struct irdma_create_qp_resp, rsvd)
800 	struct ib_pd *ibpd = ibqp->pd;
801 	struct irdma_pd *iwpd = to_iwpd(ibpd);
802 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
803 	struct irdma_pci_f *rf = iwdev->rf;
804 	struct irdma_qp *iwqp = to_iwqp(ibqp);
805 	struct irdma_create_qp_req req = {};
806 	struct irdma_create_qp_resp uresp = {};
807 	u32 qp_num = 0;
808 	int err_code;
809 	int sq_size;
810 	int rq_size;
811 	struct irdma_sc_qp *qp;
812 	struct irdma_sc_dev *dev = &rf->sc_dev;
813 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
814 	struct irdma_qp_init_info init_info = {};
815 	struct irdma_qp_host_ctx_info *ctx_info;
816 	unsigned long flags;
817 
818 	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
819 	if (err_code)
820 		return err_code;
821 
822 	if (udata && (udata->inlen < IRDMA_CREATE_QP_MIN_REQ_LEN ||
823 		      udata->outlen < IRDMA_CREATE_QP_MIN_RESP_LEN))
824 		return -EINVAL;
825 
826 	sq_size = init_attr->cap.max_send_wr;
827 	rq_size = init_attr->cap.max_recv_wr;
828 
829 	init_info.vsi = &iwdev->vsi;
830 	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
831 	init_info.qp_uk_init_info.sq_size = sq_size;
832 	init_info.qp_uk_init_info.rq_size = rq_size;
833 	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
834 	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
835 	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
836 
837 	qp = &iwqp->sc_qp;
838 	qp->qp_uk.back_qp = iwqp;
839 	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
840 
841 	iwqp->iwdev = iwdev;
842 	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
843 				      256);
844 	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
845 						 iwqp->q2_ctx_mem.size,
846 						 &iwqp->q2_ctx_mem.pa,
847 						 GFP_KERNEL);
848 	if (!iwqp->q2_ctx_mem.va)
849 		return -ENOMEM;
850 
851 	init_info.q2 = iwqp->q2_ctx_mem.va;
852 	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
853 	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
854 	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
855 
856 	if (init_attr->qp_type == IB_QPT_GSI)
857 		qp_num = 1;
858 	else
859 		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
860 					    &qp_num, &rf->next_qp);
861 	if (err_code)
862 		goto error;
863 
864 	iwqp->iwpd = iwpd;
865 	iwqp->ibqp.qp_num = qp_num;
866 	qp = &iwqp->sc_qp;
867 	iwqp->iwscq = to_iwcq(init_attr->send_cq);
868 	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
869 	iwqp->host_ctx.va = init_info.host_ctx;
870 	iwqp->host_ctx.pa = init_info.host_ctx_pa;
871 	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
872 
873 	init_info.pd = &iwpd->sc_pd;
874 	init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
875 	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
876 		init_info.qp_uk_init_info.first_sq_wq = 1;
877 	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
878 	init_waitqueue_head(&iwqp->waitq);
879 	init_waitqueue_head(&iwqp->mod_qp_waitq);
880 
881 	if (udata) {
882 		err_code = ib_copy_from_udata(&req, udata,
883 					      min(sizeof(req), udata->inlen));
884 		if (err_code) {
885 			ibdev_dbg(&iwdev->ibdev,
886 				  "VERBS: ib_copy_from_data fail\n");
887 			goto error;
888 		}
889 
890 		iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
891 		iwqp->user_mode = 1;
892 		if (req.user_wqe_bufs) {
893 			struct irdma_ucontext *ucontext =
894 				rdma_udata_to_drv_context(udata,
895 							  struct irdma_ucontext,
896 							  ibucontext);
897 
898 			init_info.qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
899 			spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
900 			iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
901 						    &ucontext->qp_reg_mem_list);
902 			spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
903 
904 			if (!iwqp->iwpbl) {
905 				err_code = -ENODATA;
906 				ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
907 				goto error;
908 			}
909 		}
910 		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
911 		irdma_setup_virt_qp(iwdev, iwqp, &init_info);
912 	} else {
913 		INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker);
914 		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
915 		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
916 	}
917 
918 	if (err_code) {
919 		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
920 		goto error;
921 	}
922 
923 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
924 		if (init_attr->qp_type == IB_QPT_RC) {
925 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
926 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
927 							    IRDMA_WRITE_WITH_IMM |
928 							    IRDMA_ROCE;
929 		} else {
930 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
931 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
932 							    IRDMA_ROCE;
933 		}
934 	} else {
935 		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
936 		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
937 	}
938 
939 	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
940 		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
941 
942 	err_code = irdma_sc_qp_init(qp, &init_info);
943 	if (err_code) {
944 		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
945 		goto error;
946 	}
947 
948 	ctx_info = &iwqp->ctx_info;
949 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
950 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
951 
952 	if (rdma_protocol_roce(&iwdev->ibdev, 1))
953 		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
954 	else
955 		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
956 
957 	err_code = irdma_cqp_create_qp_cmd(iwqp);
958 	if (err_code)
959 		goto error;
960 
961 	refcount_set(&iwqp->refcnt, 1);
962 	spin_lock_init(&iwqp->lock);
963 	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
964 	iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
965 	rf->qp_table[qp_num] = iwqp;
966 	iwqp->max_send_wr = sq_size;
967 	iwqp->max_recv_wr = rq_size;
968 
969 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
970 		if (dev->ws_add(&iwdev->vsi, 0)) {
971 			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
972 			err_code = -EINVAL;
973 			goto error;
974 		}
975 
976 		irdma_qp_add_qos(&iwqp->sc_qp);
977 	}
978 
979 	if (udata) {
980 		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
981 		if (udata->outlen < sizeof(uresp)) {
982 			uresp.lsmm = 1;
983 			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
984 		} else {
985 			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
986 				uresp.lsmm = 1;
987 		}
988 		uresp.actual_sq_size = sq_size;
989 		uresp.actual_rq_size = rq_size;
990 		uresp.qp_id = qp_num;
991 		uresp.qp_caps = qp->qp_uk.qp_caps;
992 
993 		err_code = ib_copy_to_udata(udata, &uresp,
994 					    min(sizeof(uresp), udata->outlen));
995 		if (err_code) {
996 			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
997 			irdma_destroy_qp(&iwqp->ibqp, udata);
998 			return err_code;
999 		}
1000 	}
1001 
1002 	init_completion(&iwqp->free_qp);
1003 	return 0;
1004 
1005 error:
1006 	irdma_free_qp_rsrc(iwqp);
1007 	return err_code;
1008 }
1009 
1010 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1011 {
1012 	int acc_flags = 0;
1013 
1014 	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1015 		if (iwqp->roce_info.wr_rdresp_en) {
1016 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1017 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1018 		}
1019 		if (iwqp->roce_info.rd_en)
1020 			acc_flags |= IB_ACCESS_REMOTE_READ;
1021 		if (iwqp->roce_info.bind_en)
1022 			acc_flags |= IB_ACCESS_MW_BIND;
1023 	} else {
1024 		if (iwqp->iwarp_info.wr_rdresp_en) {
1025 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1026 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1027 		}
1028 		if (iwqp->iwarp_info.rd_en)
1029 			acc_flags |= IB_ACCESS_REMOTE_READ;
1030 		if (iwqp->iwarp_info.bind_en)
1031 			acc_flags |= IB_ACCESS_MW_BIND;
1032 	}
1033 	return acc_flags;
1034 }
1035 
1036 /**
1037  * irdma_query_qp - query qp attributes
1038  * @ibqp: qp pointer
1039  * @attr: attributes pointer
1040  * @attr_mask: Not used
1041  * @init_attr: qp attributes to return
1042  */
1043 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1044 			  int attr_mask, struct ib_qp_init_attr *init_attr)
1045 {
1046 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1047 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1048 
1049 	memset(attr, 0, sizeof(*attr));
1050 	memset(init_attr, 0, sizeof(*init_attr));
1051 
1052 	attr->qp_state = iwqp->ibqp_state;
1053 	attr->cur_qp_state = iwqp->ibqp_state;
1054 	attr->cap.max_send_wr = iwqp->max_send_wr;
1055 	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1056 	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1057 	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1058 	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1059 	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1060 	attr->port_num = 1;
1061 	if (rdma_protocol_roce(ibqp->device, 1)) {
1062 		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1063 		attr->qkey = iwqp->roce_info.qkey;
1064 		attr->rq_psn = iwqp->udp_info.epsn;
1065 		attr->sq_psn = iwqp->udp_info.psn_nxt;
1066 		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1067 		attr->pkey_index = iwqp->roce_info.p_key;
1068 		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1069 		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1070 		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1071 		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1072 	}
1073 
1074 	init_attr->event_handler = iwqp->ibqp.event_handler;
1075 	init_attr->qp_context = iwqp->ibqp.qp_context;
1076 	init_attr->send_cq = iwqp->ibqp.send_cq;
1077 	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1078 	init_attr->cap = attr->cap;
1079 
1080 	return 0;
1081 }
1082 
1083 /**
1084  * irdma_query_pkey - Query partition key
1085  * @ibdev: device pointer from stack
1086  * @port: port number
1087  * @index: index of pkey
1088  * @pkey: pointer to store the pkey
1089  */
1090 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1091 			    u16 *pkey)
1092 {
1093 	if (index >= IRDMA_PKEY_TBL_SZ)
1094 		return -EINVAL;
1095 
1096 	*pkey = IRDMA_DEFAULT_PKEY;
1097 	return 0;
1098 }
1099 
1100 /**
1101  * irdma_modify_qp_roce - modify qp request
1102  * @ibqp: qp's pointer for modify
1103  * @attr: access attributes
1104  * @attr_mask: state mask
1105  * @udata: user data
1106  */
1107 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1108 			 int attr_mask, struct ib_udata *udata)
1109 {
1110 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1111 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1112 	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1113 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1114 	struct irdma_device *iwdev = iwqp->iwdev;
1115 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1116 	struct irdma_qp_host_ctx_info *ctx_info;
1117 	struct irdma_roce_offload_info *roce_info;
1118 	struct irdma_udp_offload_info *udp_info;
1119 	struct irdma_modify_qp_info info = {};
1120 	struct irdma_modify_qp_resp uresp = {};
1121 	struct irdma_modify_qp_req ureq = {};
1122 	unsigned long flags;
1123 	u8 issue_modify_qp = 0;
1124 	int ret = 0;
1125 
1126 	ctx_info = &iwqp->ctx_info;
1127 	roce_info = &iwqp->roce_info;
1128 	udp_info = &iwqp->udp_info;
1129 
1130 	if (udata) {
1131 		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1132 		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1133 		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1134 			return -EINVAL;
1135 	}
1136 
1137 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1138 		return -EOPNOTSUPP;
1139 
1140 	if (attr_mask & IB_QP_DEST_QPN)
1141 		roce_info->dest_qp = attr->dest_qp_num;
1142 
1143 	if (attr_mask & IB_QP_PKEY_INDEX) {
1144 		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1145 				       &roce_info->p_key);
1146 		if (ret)
1147 			return ret;
1148 	}
1149 
1150 	if (attr_mask & IB_QP_QKEY)
1151 		roce_info->qkey = attr->qkey;
1152 
1153 	if (attr_mask & IB_QP_PATH_MTU)
1154 		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1155 
1156 	if (attr_mask & IB_QP_SQ_PSN) {
1157 		udp_info->psn_nxt = attr->sq_psn;
1158 		udp_info->lsn =  0xffff;
1159 		udp_info->psn_una = attr->sq_psn;
1160 		udp_info->psn_max = attr->sq_psn;
1161 	}
1162 
1163 	if (attr_mask & IB_QP_RQ_PSN)
1164 		udp_info->epsn = attr->rq_psn;
1165 
1166 	if (attr_mask & IB_QP_RNR_RETRY)
1167 		udp_info->rnr_nak_thresh = attr->rnr_retry;
1168 
1169 	if (attr_mask & IB_QP_RETRY_CNT)
1170 		udp_info->rexmit_thresh = attr->retry_cnt;
1171 
1172 	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1173 
1174 	if (attr_mask & IB_QP_AV) {
1175 		struct irdma_av *av = &iwqp->roce_ah.av;
1176 		const struct ib_gid_attr *sgid_attr;
1177 		u16 vlan_id = VLAN_N_VID;
1178 		u32 local_ip[4];
1179 
1180 		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1181 		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1182 			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1183 			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1184 			udp_info->tos = attr->ah_attr.grh.traffic_class;
1185 			udp_info->src_port =
1186 				rdma_get_udp_sport(udp_info->flow_label,
1187 						   ibqp->qp_num,
1188 						   roce_info->dest_qp);
1189 			irdma_qp_rem_qos(&iwqp->sc_qp);
1190 			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1191 			ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1192 			iwqp->sc_qp.user_pri = ctx_info->user_pri;
1193 			if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1194 				return -ENOMEM;
1195 			irdma_qp_add_qos(&iwqp->sc_qp);
1196 		}
1197 		sgid_attr = attr->ah_attr.grh.sgid_attr;
1198 		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1199 					      ctx_info->roce_info->mac_addr);
1200 		if (ret)
1201 			return ret;
1202 
1203 		if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
1204 			vlan_id = 0;
1205 		if (vlan_id < VLAN_N_VID) {
1206 			udp_info->insert_vlan_tag = true;
1207 			udp_info->vlan_tag = vlan_id |
1208 				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1209 		} else {
1210 			udp_info->insert_vlan_tag = false;
1211 		}
1212 
1213 		av->attrs = attr->ah_attr;
1214 		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1215 		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1216 		av->net_type = rdma_gid_attr_network_type(sgid_attr);
1217 		if (av->net_type == RDMA_NETWORK_IPV6) {
1218 			__be32 *daddr =
1219 				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1220 			__be32 *saddr =
1221 				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1222 
1223 			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1224 			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1225 
1226 			udp_info->ipv4 = false;
1227 			irdma_copy_ip_ntohl(local_ip, daddr);
1228 
1229 		} else if (av->net_type == RDMA_NETWORK_IPV4) {
1230 			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1231 			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1232 
1233 			local_ip[0] = ntohl(daddr);
1234 
1235 			udp_info->ipv4 = true;
1236 			udp_info->dest_ip_addr[0] = 0;
1237 			udp_info->dest_ip_addr[1] = 0;
1238 			udp_info->dest_ip_addr[2] = 0;
1239 			udp_info->dest_ip_addr[3] = local_ip[0];
1240 
1241 			udp_info->local_ipaddr[0] = 0;
1242 			udp_info->local_ipaddr[1] = 0;
1243 			udp_info->local_ipaddr[2] = 0;
1244 			udp_info->local_ipaddr[3] = ntohl(saddr);
1245 		}
1246 		udp_info->arp_idx =
1247 			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1248 				      attr->ah_attr.roce.dmac);
1249 	}
1250 
1251 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1252 		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1253 			ibdev_err(&iwdev->ibdev,
1254 				  "rd_atomic = %d, above max_hw_ord=%d\n",
1255 				  attr->max_rd_atomic,
1256 				  dev->hw_attrs.max_hw_ord);
1257 			return -EINVAL;
1258 		}
1259 		if (attr->max_rd_atomic)
1260 			roce_info->ord_size = attr->max_rd_atomic;
1261 		info.ord_valid = true;
1262 	}
1263 
1264 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1265 		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1266 			ibdev_err(&iwdev->ibdev,
1267 				  "rd_atomic = %d, above max_hw_ird=%d\n",
1268 				   attr->max_rd_atomic,
1269 				   dev->hw_attrs.max_hw_ird);
1270 			return -EINVAL;
1271 		}
1272 		if (attr->max_dest_rd_atomic)
1273 			roce_info->ird_size = attr->max_dest_rd_atomic;
1274 	}
1275 
1276 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1277 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1278 			roce_info->wr_rdresp_en = true;
1279 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1280 			roce_info->wr_rdresp_en = true;
1281 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1282 			roce_info->rd_en = true;
1283 	}
1284 
1285 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1286 
1287 	ibdev_dbg(&iwdev->ibdev,
1288 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1289 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1290 		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1291 
1292 	spin_lock_irqsave(&iwqp->lock, flags);
1293 	if (attr_mask & IB_QP_STATE) {
1294 		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1295 					iwqp->ibqp.qp_type, attr_mask)) {
1296 			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1297 				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1298 				   attr->qp_state);
1299 			ret = -EINVAL;
1300 			goto exit;
1301 		}
1302 		info.curr_iwarp_state = iwqp->iwarp_state;
1303 
1304 		switch (attr->qp_state) {
1305 		case IB_QPS_INIT:
1306 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1307 				ret = -EINVAL;
1308 				goto exit;
1309 			}
1310 
1311 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1312 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1313 				issue_modify_qp = 1;
1314 			}
1315 			break;
1316 		case IB_QPS_RTR:
1317 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1318 				ret = -EINVAL;
1319 				goto exit;
1320 			}
1321 			info.arp_cache_idx_valid = true;
1322 			info.cq_num_valid = true;
1323 			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1324 			issue_modify_qp = 1;
1325 			break;
1326 		case IB_QPS_RTS:
1327 			if (iwqp->ibqp_state < IB_QPS_RTR ||
1328 			    iwqp->ibqp_state == IB_QPS_ERR) {
1329 				ret = -EINVAL;
1330 				goto exit;
1331 			}
1332 
1333 			info.arp_cache_idx_valid = true;
1334 			info.cq_num_valid = true;
1335 			info.ord_valid = true;
1336 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1337 			issue_modify_qp = 1;
1338 			if (iwdev->push_mode && udata &&
1339 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1340 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1341 				spin_unlock_irqrestore(&iwqp->lock, flags);
1342 				irdma_alloc_push_page(iwqp);
1343 				spin_lock_irqsave(&iwqp->lock, flags);
1344 			}
1345 			break;
1346 		case IB_QPS_SQD:
1347 			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1348 				goto exit;
1349 
1350 			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1351 				ret = -EINVAL;
1352 				goto exit;
1353 			}
1354 
1355 			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1356 			issue_modify_qp = 1;
1357 			break;
1358 		case IB_QPS_SQE:
1359 		case IB_QPS_ERR:
1360 		case IB_QPS_RESET:
1361 			if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) {
1362 				spin_unlock_irqrestore(&iwqp->lock, flags);
1363 				info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1364 				irdma_hw_modify_qp(iwdev, iwqp, &info, true);
1365 				spin_lock_irqsave(&iwqp->lock, flags);
1366 			}
1367 
1368 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1369 				spin_unlock_irqrestore(&iwqp->lock, flags);
1370 				if (udata && udata->inlen) {
1371 					if (ib_copy_from_udata(&ureq, udata,
1372 					    min(sizeof(ureq), udata->inlen)))
1373 						return -EINVAL;
1374 
1375 					irdma_flush_wqes(iwqp,
1376 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1377 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1378 					    IRDMA_REFLUSH);
1379 				}
1380 				return 0;
1381 			}
1382 
1383 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1384 			issue_modify_qp = 1;
1385 			break;
1386 		default:
1387 			ret = -EINVAL;
1388 			goto exit;
1389 		}
1390 
1391 		iwqp->ibqp_state = attr->qp_state;
1392 	}
1393 
1394 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1395 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1396 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1397 	spin_unlock_irqrestore(&iwqp->lock, flags);
1398 
1399 	if (attr_mask & IB_QP_STATE) {
1400 		if (issue_modify_qp) {
1401 			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1402 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1403 				return -EINVAL;
1404 			spin_lock_irqsave(&iwqp->lock, flags);
1405 			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1406 				iwqp->iwarp_state = info.next_iwarp_state;
1407 				iwqp->ibqp_state = attr->qp_state;
1408 			}
1409 			if (iwqp->ibqp_state > IB_QPS_RTS &&
1410 			    !iwqp->flush_issued) {
1411 				spin_unlock_irqrestore(&iwqp->lock, flags);
1412 				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1413 						       IRDMA_FLUSH_RQ |
1414 						       IRDMA_FLUSH_WAIT);
1415 				iwqp->flush_issued = 1;
1416 			} else {
1417 				spin_unlock_irqrestore(&iwqp->lock, flags);
1418 			}
1419 		} else {
1420 			iwqp->ibqp_state = attr->qp_state;
1421 		}
1422 		if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1423 			struct irdma_ucontext *ucontext;
1424 
1425 			ucontext = rdma_udata_to_drv_context(udata,
1426 					struct irdma_ucontext, ibucontext);
1427 			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1428 			    !iwqp->push_wqe_mmap_entry &&
1429 			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1430 				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1431 				uresp.push_valid = 1;
1432 				uresp.push_offset = iwqp->sc_qp.push_offset;
1433 			}
1434 			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1435 					       udata->outlen));
1436 			if (ret) {
1437 				irdma_remove_push_mmap_entries(iwqp);
1438 				ibdev_dbg(&iwdev->ibdev,
1439 					  "VERBS: copy_to_udata failed\n");
1440 				return ret;
1441 			}
1442 		}
1443 	}
1444 
1445 	return 0;
1446 exit:
1447 	spin_unlock_irqrestore(&iwqp->lock, flags);
1448 
1449 	return ret;
1450 }
1451 
1452 /**
1453  * irdma_modify_qp - modify qp request
1454  * @ibqp: qp's pointer for modify
1455  * @attr: access attributes
1456  * @attr_mask: state mask
1457  * @udata: user data
1458  */
1459 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1460 		    struct ib_udata *udata)
1461 {
1462 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1463 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1464 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1465 	struct irdma_device *iwdev = iwqp->iwdev;
1466 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1467 	struct irdma_qp_host_ctx_info *ctx_info;
1468 	struct irdma_tcp_offload_info *tcp_info;
1469 	struct irdma_iwarp_offload_info *offload_info;
1470 	struct irdma_modify_qp_info info = {};
1471 	struct irdma_modify_qp_resp uresp = {};
1472 	struct irdma_modify_qp_req ureq = {};
1473 	u8 issue_modify_qp = 0;
1474 	u8 dont_wait = 0;
1475 	int err;
1476 	unsigned long flags;
1477 
1478 	if (udata) {
1479 		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1480 		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1481 		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1482 			return -EINVAL;
1483 	}
1484 
1485 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1486 		return -EOPNOTSUPP;
1487 
1488 	ctx_info = &iwqp->ctx_info;
1489 	offload_info = &iwqp->iwarp_info;
1490 	tcp_info = &iwqp->tcp_info;
1491 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1492 	ibdev_dbg(&iwdev->ibdev,
1493 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1494 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1495 		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1496 		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1497 
1498 	spin_lock_irqsave(&iwqp->lock, flags);
1499 	if (attr_mask & IB_QP_STATE) {
1500 		info.curr_iwarp_state = iwqp->iwarp_state;
1501 		switch (attr->qp_state) {
1502 		case IB_QPS_INIT:
1503 		case IB_QPS_RTR:
1504 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1505 				err = -EINVAL;
1506 				goto exit;
1507 			}
1508 
1509 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1510 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1511 				issue_modify_qp = 1;
1512 			}
1513 			if (iwdev->push_mode && udata &&
1514 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1515 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1516 				spin_unlock_irqrestore(&iwqp->lock, flags);
1517 				irdma_alloc_push_page(iwqp);
1518 				spin_lock_irqsave(&iwqp->lock, flags);
1519 			}
1520 			break;
1521 		case IB_QPS_RTS:
1522 			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1523 			    !iwqp->cm_id) {
1524 				err = -EINVAL;
1525 				goto exit;
1526 			}
1527 
1528 			issue_modify_qp = 1;
1529 			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1530 			iwqp->hte_added = 1;
1531 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1532 			info.tcp_ctx_valid = true;
1533 			info.ord_valid = true;
1534 			info.arp_cache_idx_valid = true;
1535 			info.cq_num_valid = true;
1536 			break;
1537 		case IB_QPS_SQD:
1538 			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1539 				err = 0;
1540 				goto exit;
1541 			}
1542 
1543 			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1544 			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1545 				err = 0;
1546 				goto exit;
1547 			}
1548 
1549 			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1550 				err = -EINVAL;
1551 				goto exit;
1552 			}
1553 
1554 			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1555 			issue_modify_qp = 1;
1556 			break;
1557 		case IB_QPS_SQE:
1558 			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1559 				err = -EINVAL;
1560 				goto exit;
1561 			}
1562 
1563 			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1564 			issue_modify_qp = 1;
1565 			break;
1566 		case IB_QPS_ERR:
1567 		case IB_QPS_RESET:
1568 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1569 				spin_unlock_irqrestore(&iwqp->lock, flags);
1570 				if (udata && udata->inlen) {
1571 					if (ib_copy_from_udata(&ureq, udata,
1572 					    min(sizeof(ureq), udata->inlen)))
1573 						return -EINVAL;
1574 
1575 					irdma_flush_wqes(iwqp,
1576 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1577 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1578 					    IRDMA_REFLUSH);
1579 				}
1580 				return 0;
1581 			}
1582 
1583 			if (iwqp->sc_qp.term_flags) {
1584 				spin_unlock_irqrestore(&iwqp->lock, flags);
1585 				irdma_terminate_del_timer(&iwqp->sc_qp);
1586 				spin_lock_irqsave(&iwqp->lock, flags);
1587 			}
1588 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1589 			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1590 			    iwdev->iw_status &&
1591 			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1592 				info.reset_tcp_conn = true;
1593 			else
1594 				dont_wait = 1;
1595 
1596 			issue_modify_qp = 1;
1597 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1598 			break;
1599 		default:
1600 			err = -EINVAL;
1601 			goto exit;
1602 		}
1603 
1604 		iwqp->ibqp_state = attr->qp_state;
1605 	}
1606 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1607 		ctx_info->iwarp_info_valid = true;
1608 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1609 			offload_info->wr_rdresp_en = true;
1610 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1611 			offload_info->wr_rdresp_en = true;
1612 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1613 			offload_info->rd_en = true;
1614 	}
1615 
1616 	if (ctx_info->iwarp_info_valid) {
1617 		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1618 		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1619 		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1620 	}
1621 	spin_unlock_irqrestore(&iwqp->lock, flags);
1622 
1623 	if (attr_mask & IB_QP_STATE) {
1624 		if (issue_modify_qp) {
1625 			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1626 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1627 				return -EINVAL;
1628 		}
1629 
1630 		spin_lock_irqsave(&iwqp->lock, flags);
1631 		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1632 			iwqp->iwarp_state = info.next_iwarp_state;
1633 			iwqp->ibqp_state = attr->qp_state;
1634 		}
1635 		spin_unlock_irqrestore(&iwqp->lock, flags);
1636 	}
1637 
1638 	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1639 		if (dont_wait) {
1640 			if (iwqp->hw_tcp_state) {
1641 				spin_lock_irqsave(&iwqp->lock, flags);
1642 				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1643 				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1644 				spin_unlock_irqrestore(&iwqp->lock, flags);
1645 			}
1646 			irdma_cm_disconn(iwqp);
1647 		} else {
1648 			int close_timer_started;
1649 
1650 			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1651 
1652 			if (iwqp->cm_node) {
1653 				refcount_inc(&iwqp->cm_node->refcnt);
1654 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1655 				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1656 				if (iwqp->cm_id && close_timer_started == 1)
1657 					irdma_schedule_cm_timer(iwqp->cm_node,
1658 						(struct irdma_puda_buf *)iwqp,
1659 						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1660 
1661 				irdma_rem_ref_cm_node(iwqp->cm_node);
1662 			} else {
1663 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1664 			}
1665 		}
1666 	}
1667 	if (attr_mask & IB_QP_STATE && udata && udata->outlen &&
1668 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1669 		struct irdma_ucontext *ucontext;
1670 
1671 		ucontext = rdma_udata_to_drv_context(udata,
1672 					struct irdma_ucontext, ibucontext);
1673 		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1674 		    !iwqp->push_wqe_mmap_entry &&
1675 		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1676 			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1677 			uresp.push_valid = 1;
1678 			uresp.push_offset = iwqp->sc_qp.push_offset;
1679 		}
1680 
1681 		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1682 				       udata->outlen));
1683 		if (err) {
1684 			irdma_remove_push_mmap_entries(iwqp);
1685 			ibdev_dbg(&iwdev->ibdev,
1686 				  "VERBS: copy_to_udata failed\n");
1687 			return err;
1688 		}
1689 	}
1690 
1691 	return 0;
1692 exit:
1693 	spin_unlock_irqrestore(&iwqp->lock, flags);
1694 
1695 	return err;
1696 }
1697 
1698 /**
1699  * irdma_cq_free_rsrc - free up resources for cq
1700  * @rf: RDMA PCI function
1701  * @iwcq: cq ptr
1702  */
1703 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1704 {
1705 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1706 
1707 	if (!iwcq->user_mode) {
1708 		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1709 				  iwcq->kmem.va, iwcq->kmem.pa);
1710 		iwcq->kmem.va = NULL;
1711 		dma_free_coherent(rf->sc_dev.hw->device,
1712 				  iwcq->kmem_shadow.size,
1713 				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1714 		iwcq->kmem_shadow.va = NULL;
1715 	}
1716 
1717 	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1718 }
1719 
1720 /**
1721  * irdma_free_cqbuf - worker to free a cq buffer
1722  * @work: provides access to the cq buffer to free
1723  */
1724 static void irdma_free_cqbuf(struct work_struct *work)
1725 {
1726 	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1727 
1728 	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1729 			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1730 	cq_buf->kmem_buf.va = NULL;
1731 	kfree(cq_buf);
1732 }
1733 
1734 /**
1735  * irdma_process_resize_list - remove resized cq buffers from the resize_list
1736  * @iwcq: cq which owns the resize_list
1737  * @iwdev: irdma device
1738  * @lcqe_buf: the buffer where the last cqe is received
1739  */
1740 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1741 				     struct irdma_device *iwdev,
1742 				     struct irdma_cq_buf *lcqe_buf)
1743 {
1744 	struct list_head *tmp_node, *list_node;
1745 	struct irdma_cq_buf *cq_buf;
1746 	int cnt = 0;
1747 
1748 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1749 		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1750 		if (cq_buf == lcqe_buf)
1751 			return cnt;
1752 
1753 		list_del(&cq_buf->list);
1754 		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1755 		cnt++;
1756 	}
1757 
1758 	return cnt;
1759 }
1760 
1761 /**
1762  * irdma_destroy_cq - destroy cq
1763  * @ib_cq: cq pointer
1764  * @udata: user data
1765  */
1766 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1767 {
1768 	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1769 	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1770 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1771 	struct irdma_sc_dev *dev = cq->dev;
1772 	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1773 	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1774 	unsigned long flags;
1775 
1776 	spin_lock_irqsave(&iwcq->lock, flags);
1777 	if (!list_empty(&iwcq->cmpl_generated))
1778 		irdma_remove_cmpls_list(iwcq);
1779 	if (!list_empty(&iwcq->resize_list))
1780 		irdma_process_resize_list(iwcq, iwdev, NULL);
1781 	spin_unlock_irqrestore(&iwcq->lock, flags);
1782 
1783 	irdma_cq_wq_destroy(iwdev->rf, cq);
1784 
1785 	spin_lock_irqsave(&iwceq->ce_lock, flags);
1786 	irdma_sc_cleanup_ceqes(cq, ceq);
1787 	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
1788 	irdma_cq_free_rsrc(iwdev->rf, iwcq);
1789 
1790 	return 0;
1791 }
1792 
1793 /**
1794  * irdma_resize_cq - resize cq
1795  * @ibcq: cq to be resized
1796  * @entries: desired cq size
1797  * @udata: user data
1798  */
1799 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
1800 			   struct ib_udata *udata)
1801 {
1802 #define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer)
1803 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1804 	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
1805 	struct irdma_cqp_request *cqp_request;
1806 	struct cqp_cmds_info *cqp_info;
1807 	struct irdma_modify_cq_info *m_info;
1808 	struct irdma_modify_cq_info info = {};
1809 	struct irdma_dma_mem kmem_buf;
1810 	struct irdma_cq_mr *cqmr_buf;
1811 	struct irdma_pbl *iwpbl_buf;
1812 	struct irdma_device *iwdev;
1813 	struct irdma_pci_f *rf;
1814 	struct irdma_cq_buf *cq_buf = NULL;
1815 	unsigned long flags;
1816 	int ret;
1817 
1818 	iwdev = to_iwdev(ibcq->device);
1819 	rf = iwdev->rf;
1820 
1821 	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
1822 	    IRDMA_FEATURE_CQ_RESIZE))
1823 		return -EOPNOTSUPP;
1824 
1825 	if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN)
1826 		return -EINVAL;
1827 
1828 	if (entries > rf->max_cqe)
1829 		return -EINVAL;
1830 
1831 	if (!iwcq->user_mode) {
1832 		entries++;
1833 		if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1834 			entries *= 2;
1835 	}
1836 
1837 	info.cq_size = max(entries, 4);
1838 
1839 	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
1840 		return 0;
1841 
1842 	if (udata) {
1843 		struct irdma_resize_cq_req req = {};
1844 		struct irdma_ucontext *ucontext =
1845 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1846 						  ibucontext);
1847 
1848 		/* CQ resize not supported with legacy GEN_1 libi40iw */
1849 		if (ucontext->legacy_mode)
1850 			return -EOPNOTSUPP;
1851 
1852 		if (ib_copy_from_udata(&req, udata,
1853 				       min(sizeof(req), udata->inlen)))
1854 			return -EINVAL;
1855 
1856 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1857 		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
1858 					  &ucontext->cq_reg_mem_list);
1859 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1860 
1861 		if (!iwpbl_buf)
1862 			return -ENOMEM;
1863 
1864 		cqmr_buf = &iwpbl_buf->cq_mr;
1865 		if (iwpbl_buf->pbl_allocated) {
1866 			info.virtual_map = true;
1867 			info.pbl_chunk_size = 1;
1868 			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
1869 		} else {
1870 			info.cq_pa = cqmr_buf->cq_pbl.addr;
1871 		}
1872 	} else {
1873 		/* Kmode CQ resize */
1874 		int rsize;
1875 
1876 		rsize = info.cq_size * sizeof(struct irdma_cqe);
1877 		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
1878 		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
1879 						 kmem_buf.size, &kmem_buf.pa,
1880 						 GFP_KERNEL);
1881 		if (!kmem_buf.va)
1882 			return -ENOMEM;
1883 
1884 		info.cq_base = kmem_buf.va;
1885 		info.cq_pa = kmem_buf.pa;
1886 		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
1887 		if (!cq_buf) {
1888 			ret = -ENOMEM;
1889 			goto error;
1890 		}
1891 	}
1892 
1893 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1894 	if (!cqp_request) {
1895 		ret = -ENOMEM;
1896 		goto error;
1897 	}
1898 
1899 	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
1900 	info.cq_resize = true;
1901 
1902 	cqp_info = &cqp_request->info;
1903 	m_info = &cqp_info->in.u.cq_modify.info;
1904 	memcpy(m_info, &info, sizeof(*m_info));
1905 
1906 	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
1907 	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
1908 	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
1909 	cqp_info->post_sq = 1;
1910 	ret = irdma_handle_cqp_op(rf, cqp_request);
1911 	irdma_put_cqp_request(&rf->cqp, cqp_request);
1912 	if (ret)
1913 		goto error;
1914 
1915 	spin_lock_irqsave(&iwcq->lock, flags);
1916 	if (cq_buf) {
1917 		cq_buf->kmem_buf = iwcq->kmem;
1918 		cq_buf->hw = dev->hw;
1919 		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
1920 		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
1921 		list_add_tail(&cq_buf->list, &iwcq->resize_list);
1922 		iwcq->kmem = kmem_buf;
1923 	}
1924 
1925 	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
1926 	ibcq->cqe = info.cq_size - 1;
1927 	spin_unlock_irqrestore(&iwcq->lock, flags);
1928 
1929 	return 0;
1930 error:
1931 	if (!udata) {
1932 		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
1933 				  kmem_buf.pa);
1934 		kmem_buf.va = NULL;
1935 	}
1936 	kfree(cq_buf);
1937 
1938 	return ret;
1939 }
1940 
1941 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
1942 {
1943 	/* GEN1 does not support CQ create flags */
1944 	if (hw_rev == IRDMA_GEN_1)
1945 		return flags ? -EOPNOTSUPP : 0;
1946 
1947 	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
1948 }
1949 
1950 /**
1951  * irdma_create_cq - create cq
1952  * @ibcq: CQ allocated
1953  * @attr: attributes for cq
1954  * @udata: user data
1955  */
1956 static int irdma_create_cq(struct ib_cq *ibcq,
1957 			   const struct ib_cq_init_attr *attr,
1958 			   struct ib_udata *udata)
1959 {
1960 #define IRDMA_CREATE_CQ_MIN_REQ_LEN offsetofend(struct irdma_create_cq_req, user_cq_buf)
1961 #define IRDMA_CREATE_CQ_MIN_RESP_LEN offsetofend(struct irdma_create_cq_resp, cq_size)
1962 	struct ib_device *ibdev = ibcq->device;
1963 	struct irdma_device *iwdev = to_iwdev(ibdev);
1964 	struct irdma_pci_f *rf = iwdev->rf;
1965 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1966 	u32 cq_num = 0;
1967 	struct irdma_sc_cq *cq;
1968 	struct irdma_sc_dev *dev = &rf->sc_dev;
1969 	struct irdma_cq_init_info info = {};
1970 	struct irdma_cqp_request *cqp_request;
1971 	struct cqp_cmds_info *cqp_info;
1972 	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1973 	unsigned long flags;
1974 	int err_code;
1975 	int entries = attr->cqe;
1976 
1977 	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
1978 	if (err_code)
1979 		return err_code;
1980 
1981 	if (udata && (udata->inlen < IRDMA_CREATE_CQ_MIN_REQ_LEN ||
1982 		      udata->outlen < IRDMA_CREATE_CQ_MIN_RESP_LEN))
1983 		return -EINVAL;
1984 
1985 	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
1986 				    &rf->next_cq);
1987 	if (err_code)
1988 		return err_code;
1989 
1990 	cq = &iwcq->sc_cq;
1991 	cq->back_cq = iwcq;
1992 	spin_lock_init(&iwcq->lock);
1993 	INIT_LIST_HEAD(&iwcq->resize_list);
1994 	INIT_LIST_HEAD(&iwcq->cmpl_generated);
1995 	info.dev = dev;
1996 	ukinfo->cq_size = max(entries, 4);
1997 	ukinfo->cq_id = cq_num;
1998 	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1999 	if (attr->comp_vector < rf->ceqs_count)
2000 		info.ceq_id = attr->comp_vector;
2001 	info.ceq_id_valid = true;
2002 	info.ceqe_mask = 1;
2003 	info.type = IRDMA_CQ_TYPE_IWARP;
2004 	info.vsi = &iwdev->vsi;
2005 
2006 	if (udata) {
2007 		struct irdma_ucontext *ucontext;
2008 		struct irdma_create_cq_req req = {};
2009 		struct irdma_cq_mr *cqmr;
2010 		struct irdma_pbl *iwpbl;
2011 		struct irdma_pbl *iwpbl_shadow;
2012 		struct irdma_cq_mr *cqmr_shadow;
2013 
2014 		iwcq->user_mode = true;
2015 		ucontext =
2016 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2017 						  ibucontext);
2018 		if (ib_copy_from_udata(&req, udata,
2019 				       min(sizeof(req), udata->inlen))) {
2020 			err_code = -EFAULT;
2021 			goto cq_free_rsrc;
2022 		}
2023 
2024 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2025 		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
2026 				      &ucontext->cq_reg_mem_list);
2027 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2028 		if (!iwpbl) {
2029 			err_code = -EPROTO;
2030 			goto cq_free_rsrc;
2031 		}
2032 
2033 		iwcq->iwpbl = iwpbl;
2034 		iwcq->cq_mem_size = 0;
2035 		cqmr = &iwpbl->cq_mr;
2036 
2037 		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2038 		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2039 			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2040 			iwpbl_shadow = irdma_get_pbl(
2041 					(unsigned long)req.user_shadow_area,
2042 					&ucontext->cq_reg_mem_list);
2043 			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2044 
2045 			if (!iwpbl_shadow) {
2046 				err_code = -EPROTO;
2047 				goto cq_free_rsrc;
2048 			}
2049 			iwcq->iwpbl_shadow = iwpbl_shadow;
2050 			cqmr_shadow = &iwpbl_shadow->cq_mr;
2051 			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2052 			cqmr->split = true;
2053 		} else {
2054 			info.shadow_area_pa = cqmr->shadow;
2055 		}
2056 		if (iwpbl->pbl_allocated) {
2057 			info.virtual_map = true;
2058 			info.pbl_chunk_size = 1;
2059 			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2060 		} else {
2061 			info.cq_base_pa = cqmr->cq_pbl.addr;
2062 		}
2063 	} else {
2064 		/* Kmode allocations */
2065 		int rsize;
2066 
2067 		if (entries < 1 || entries > rf->max_cqe) {
2068 			err_code = -EINVAL;
2069 			goto cq_free_rsrc;
2070 		}
2071 
2072 		entries++;
2073 		if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2074 			entries *= 2;
2075 		ukinfo->cq_size = entries;
2076 
2077 		rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2078 		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2079 		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2080 						   iwcq->kmem.size,
2081 						   &iwcq->kmem.pa, GFP_KERNEL);
2082 		if (!iwcq->kmem.va) {
2083 			err_code = -ENOMEM;
2084 			goto cq_free_rsrc;
2085 		}
2086 
2087 		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2088 					       64);
2089 		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2090 							  iwcq->kmem_shadow.size,
2091 							  &iwcq->kmem_shadow.pa,
2092 							  GFP_KERNEL);
2093 		if (!iwcq->kmem_shadow.va) {
2094 			err_code = -ENOMEM;
2095 			goto cq_free_rsrc;
2096 		}
2097 		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2098 		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2099 		ukinfo->cq_base = iwcq->kmem.va;
2100 		info.cq_base_pa = iwcq->kmem.pa;
2101 	}
2102 
2103 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2104 		info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2105 						 (u32)IRDMA_MAX_CQ_READ_THRESH);
2106 
2107 	if (irdma_sc_cq_init(cq, &info)) {
2108 		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2109 		err_code = -EPROTO;
2110 		goto cq_free_rsrc;
2111 	}
2112 
2113 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2114 	if (!cqp_request) {
2115 		err_code = -ENOMEM;
2116 		goto cq_free_rsrc;
2117 	}
2118 
2119 	cqp_info = &cqp_request->info;
2120 	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2121 	cqp_info->post_sq = 1;
2122 	cqp_info->in.u.cq_create.cq = cq;
2123 	cqp_info->in.u.cq_create.check_overflow = true;
2124 	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2125 	err_code = irdma_handle_cqp_op(rf, cqp_request);
2126 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2127 	if (err_code)
2128 		goto cq_free_rsrc;
2129 
2130 	if (udata) {
2131 		struct irdma_create_cq_resp resp = {};
2132 
2133 		resp.cq_id = info.cq_uk_init_info.cq_id;
2134 		resp.cq_size = info.cq_uk_init_info.cq_size;
2135 		if (ib_copy_to_udata(udata, &resp,
2136 				     min(sizeof(resp), udata->outlen))) {
2137 			ibdev_dbg(&iwdev->ibdev,
2138 				  "VERBS: copy to user data\n");
2139 			err_code = -EPROTO;
2140 			goto cq_destroy;
2141 		}
2142 	}
2143 	return 0;
2144 cq_destroy:
2145 	irdma_cq_wq_destroy(rf, cq);
2146 cq_free_rsrc:
2147 	irdma_cq_free_rsrc(rf, iwcq);
2148 
2149 	return err_code;
2150 }
2151 
2152 /**
2153  * irdma_get_mr_access - get hw MR access permissions from IB access flags
2154  * @access: IB access flags
2155  */
2156 static inline u16 irdma_get_mr_access(int access)
2157 {
2158 	u16 hw_access = 0;
2159 
2160 	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2161 		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2162 	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2163 		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2164 	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2165 		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2166 	hw_access |= (access & IB_ACCESS_MW_BIND) ?
2167 		     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2168 	hw_access |= (access & IB_ZERO_BASED) ?
2169 		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2170 	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2171 
2172 	return hw_access;
2173 }
2174 
2175 /**
2176  * irdma_free_stag - free stag resource
2177  * @iwdev: irdma device
2178  * @stag: stag to free
2179  */
2180 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2181 {
2182 	u32 stag_idx;
2183 
2184 	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2185 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2186 }
2187 
2188 /**
2189  * irdma_create_stag - create random stag
2190  * @iwdev: irdma device
2191  */
2192 static u32 irdma_create_stag(struct irdma_device *iwdev)
2193 {
2194 	u32 stag = 0;
2195 	u32 stag_index = 0;
2196 	u32 next_stag_index;
2197 	u32 driver_key;
2198 	u32 random;
2199 	u8 consumer_key;
2200 	int ret;
2201 
2202 	get_random_bytes(&random, sizeof(random));
2203 	consumer_key = (u8)random;
2204 
2205 	driver_key = random & ~iwdev->rf->mr_stagmask;
2206 	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2207 	next_stag_index %= iwdev->rf->max_mr;
2208 
2209 	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2210 			       iwdev->rf->max_mr, &stag_index,
2211 			       &next_stag_index);
2212 	if (ret)
2213 		return stag;
2214 	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2215 	stag |= driver_key;
2216 	stag += (u32)consumer_key;
2217 
2218 	return stag;
2219 }
2220 
2221 /**
2222  * irdma_next_pbl_addr - Get next pbl address
2223  * @pbl: pointer to a pble
2224  * @pinfo: info pointer
2225  * @idx: index
2226  */
2227 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2228 				       u32 *idx)
2229 {
2230 	*idx += 1;
2231 	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2232 		return ++pbl;
2233 	*idx = 0;
2234 	(*pinfo)++;
2235 
2236 	return (*pinfo)->addr;
2237 }
2238 
2239 /**
2240  * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2241  * @iwmr: iwmr for IB's user page addresses
2242  * @pbl: ple pointer to save 1 level or 0 level pble
2243  * @level: indicated level 0, 1 or 2
2244  */
2245 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2246 				    enum irdma_pble_level level)
2247 {
2248 	struct ib_umem *region = iwmr->region;
2249 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2250 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2251 	struct irdma_pble_info *pinfo;
2252 	struct ib_block_iter biter;
2253 	u32 idx = 0;
2254 	u32 pbl_cnt = 0;
2255 
2256 	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2257 
2258 	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2259 		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2260 
2261 	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2262 		*pbl = rdma_block_iter_dma_address(&biter);
2263 		if (++pbl_cnt == palloc->total_cnt)
2264 			break;
2265 		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2266 	}
2267 }
2268 
2269 /**
2270  * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2271  * @arr: lvl1 pbl array
2272  * @npages: page count
2273  * @pg_size: page size
2274  *
2275  */
2276 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2277 {
2278 	u32 pg_idx;
2279 
2280 	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2281 		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2282 			return false;
2283 	}
2284 
2285 	return true;
2286 }
2287 
2288 /**
2289  * irdma_check_mr_contiguous - check if MR is physically contiguous
2290  * @palloc: pbl allocation struct
2291  * @pg_size: page size
2292  */
2293 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2294 				      u32 pg_size)
2295 {
2296 	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2297 	struct irdma_pble_info *leaf = lvl2->leaf;
2298 	u64 *arr = NULL;
2299 	u64 *start_addr = NULL;
2300 	int i;
2301 	bool ret;
2302 
2303 	if (palloc->level == PBLE_LEVEL_1) {
2304 		arr = palloc->level1.addr;
2305 		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2306 						 pg_size);
2307 		return ret;
2308 	}
2309 
2310 	start_addr = leaf->addr;
2311 
2312 	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2313 		arr = leaf->addr;
2314 		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2315 			return false;
2316 		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2317 		if (!ret)
2318 			return false;
2319 	}
2320 
2321 	return true;
2322 }
2323 
2324 /**
2325  * irdma_setup_pbles - copy user pg address to pble's
2326  * @rf: RDMA PCI function
2327  * @iwmr: mr pointer for this memory registration
2328  * @lvl: requested pble levels
2329  */
2330 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2331 			     u8 lvl)
2332 {
2333 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2334 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2335 	struct irdma_pble_info *pinfo;
2336 	u64 *pbl;
2337 	int status;
2338 	enum irdma_pble_level level = PBLE_LEVEL_1;
2339 
2340 	if (lvl) {
2341 		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2342 					lvl);
2343 		if (status)
2344 			return status;
2345 
2346 		iwpbl->pbl_allocated = true;
2347 		level = palloc->level;
2348 		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2349 						  palloc->level2.leaf;
2350 		pbl = pinfo->addr;
2351 	} else {
2352 		pbl = iwmr->pgaddrmem;
2353 	}
2354 
2355 	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2356 
2357 	if (lvl)
2358 		iwmr->pgaddrmem[0] = *pbl;
2359 
2360 	return 0;
2361 }
2362 
2363 /**
2364  * irdma_handle_q_mem - handle memory for qp and cq
2365  * @iwdev: irdma device
2366  * @req: information for q memory management
2367  * @iwpbl: pble struct
2368  * @lvl: pble level mask
2369  */
2370 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2371 			      struct irdma_mem_reg_req *req,
2372 			      struct irdma_pbl *iwpbl, u8 lvl)
2373 {
2374 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2375 	struct irdma_mr *iwmr = iwpbl->iwmr;
2376 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2377 	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2378 	struct irdma_hmc_pble *hmc_p;
2379 	u64 *arr = iwmr->pgaddrmem;
2380 	u32 pg_size, total;
2381 	int err = 0;
2382 	bool ret = true;
2383 
2384 	pg_size = iwmr->page_size;
2385 	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
2386 	if (err)
2387 		return err;
2388 
2389 	if (lvl)
2390 		arr = palloc->level1.addr;
2391 
2392 	switch (iwmr->type) {
2393 	case IRDMA_MEMREG_TYPE_QP:
2394 		total = req->sq_pages + req->rq_pages;
2395 		hmc_p = &qpmr->sq_pbl;
2396 		qpmr->shadow = (dma_addr_t)arr[total];
2397 
2398 		if (lvl) {
2399 			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2400 							 pg_size);
2401 			if (ret)
2402 				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2403 								 req->rq_pages,
2404 								 pg_size);
2405 		}
2406 
2407 		if (!ret) {
2408 			hmc_p->idx = palloc->level1.idx;
2409 			hmc_p = &qpmr->rq_pbl;
2410 			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2411 		} else {
2412 			hmc_p->addr = arr[0];
2413 			hmc_p = &qpmr->rq_pbl;
2414 			hmc_p->addr = arr[req->sq_pages];
2415 		}
2416 		break;
2417 	case IRDMA_MEMREG_TYPE_CQ:
2418 		hmc_p = &cqmr->cq_pbl;
2419 
2420 		if (!cqmr->split)
2421 			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2422 
2423 		if (lvl)
2424 			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2425 							 pg_size);
2426 
2427 		if (!ret)
2428 			hmc_p->idx = palloc->level1.idx;
2429 		else
2430 			hmc_p->addr = arr[0];
2431 	break;
2432 	default:
2433 		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2434 		err = -EINVAL;
2435 	}
2436 
2437 	if (lvl && ret) {
2438 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2439 		iwpbl->pbl_allocated = false;
2440 	}
2441 
2442 	return err;
2443 }
2444 
2445 /**
2446  * irdma_hw_alloc_mw - create the hw memory window
2447  * @iwdev: irdma device
2448  * @iwmr: pointer to memory window info
2449  */
2450 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2451 {
2452 	struct irdma_mw_alloc_info *info;
2453 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2454 	struct irdma_cqp_request *cqp_request;
2455 	struct cqp_cmds_info *cqp_info;
2456 	int status;
2457 
2458 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2459 	if (!cqp_request)
2460 		return -ENOMEM;
2461 
2462 	cqp_info = &cqp_request->info;
2463 	info = &cqp_info->in.u.mw_alloc.info;
2464 	memset(info, 0, sizeof(*info));
2465 	if (iwmr->ibmw.type == IB_MW_TYPE_1)
2466 		info->mw_wide = true;
2467 
2468 	info->page_size = PAGE_SIZE;
2469 	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2470 	info->pd_id = iwpd->sc_pd.pd_id;
2471 	info->remote_access = true;
2472 	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
2473 	cqp_info->post_sq = 1;
2474 	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
2475 	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
2476 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2477 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2478 
2479 	return status;
2480 }
2481 
2482 /**
2483  * irdma_alloc_mw - Allocate memory window
2484  * @ibmw: Memory Window
2485  * @udata: user data pointer
2486  */
2487 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
2488 {
2489 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2490 	struct irdma_mr *iwmr = to_iwmw(ibmw);
2491 	int err_code;
2492 	u32 stag;
2493 
2494 	stag = irdma_create_stag(iwdev);
2495 	if (!stag)
2496 		return -ENOMEM;
2497 
2498 	iwmr->stag = stag;
2499 	ibmw->rkey = stag;
2500 
2501 	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
2502 	if (err_code) {
2503 		irdma_free_stag(iwdev, stag);
2504 		return err_code;
2505 	}
2506 
2507 	return 0;
2508 }
2509 
2510 /**
2511  * irdma_dealloc_mw - Dealloc memory window
2512  * @ibmw: memory window structure.
2513  */
2514 static int irdma_dealloc_mw(struct ib_mw *ibmw)
2515 {
2516 	struct ib_pd *ibpd = ibmw->pd;
2517 	struct irdma_pd *iwpd = to_iwpd(ibpd);
2518 	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
2519 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2520 	struct irdma_cqp_request *cqp_request;
2521 	struct cqp_cmds_info *cqp_info;
2522 	struct irdma_dealloc_stag_info *info;
2523 
2524 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2525 	if (!cqp_request)
2526 		return -ENOMEM;
2527 
2528 	cqp_info = &cqp_request->info;
2529 	info = &cqp_info->in.u.dealloc_stag.info;
2530 	memset(info, 0, sizeof(*info));
2531 	info->pd_id = iwpd->sc_pd.pd_id;
2532 	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
2533 	info->mr = false;
2534 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
2535 	cqp_info->post_sq = 1;
2536 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
2537 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2538 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
2539 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2540 	irdma_free_stag(iwdev, iwmr->stag);
2541 
2542 	return 0;
2543 }
2544 
2545 /**
2546  * irdma_hw_alloc_stag - cqp command to allocate stag
2547  * @iwdev: irdma device
2548  * @iwmr: irdma mr pointer
2549  */
2550 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
2551 			       struct irdma_mr *iwmr)
2552 {
2553 	struct irdma_allocate_stag_info *info;
2554 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2555 	int status;
2556 	struct irdma_cqp_request *cqp_request;
2557 	struct cqp_cmds_info *cqp_info;
2558 
2559 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2560 	if (!cqp_request)
2561 		return -ENOMEM;
2562 
2563 	cqp_info = &cqp_request->info;
2564 	info = &cqp_info->in.u.alloc_stag.info;
2565 	memset(info, 0, sizeof(*info));
2566 	info->page_size = PAGE_SIZE;
2567 	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2568 	info->pd_id = iwpd->sc_pd.pd_id;
2569 	info->total_len = iwmr->len;
2570 	info->remote_access = true;
2571 	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
2572 	cqp_info->post_sq = 1;
2573 	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
2574 	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
2575 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2576 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2577 
2578 	return status;
2579 }
2580 
2581 /**
2582  * irdma_alloc_mr - register stag for fast memory registration
2583  * @pd: ibpd pointer
2584  * @mr_type: memory for stag registrion
2585  * @max_num_sg: man number of pages
2586  */
2587 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
2588 				    u32 max_num_sg)
2589 {
2590 	struct irdma_device *iwdev = to_iwdev(pd->device);
2591 	struct irdma_pble_alloc *palloc;
2592 	struct irdma_pbl *iwpbl;
2593 	struct irdma_mr *iwmr;
2594 	u32 stag;
2595 	int err_code;
2596 
2597 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2598 	if (!iwmr)
2599 		return ERR_PTR(-ENOMEM);
2600 
2601 	stag = irdma_create_stag(iwdev);
2602 	if (!stag) {
2603 		err_code = -ENOMEM;
2604 		goto err;
2605 	}
2606 
2607 	iwmr->stag = stag;
2608 	iwmr->ibmr.rkey = stag;
2609 	iwmr->ibmr.lkey = stag;
2610 	iwmr->ibmr.pd = pd;
2611 	iwmr->ibmr.device = pd->device;
2612 	iwpbl = &iwmr->iwpbl;
2613 	iwpbl->iwmr = iwmr;
2614 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2615 	palloc = &iwpbl->pble_alloc;
2616 	iwmr->page_cnt = max_num_sg;
2617 	err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2618 				  false);
2619 	if (err_code)
2620 		goto err_get_pble;
2621 
2622 	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
2623 	if (err_code)
2624 		goto err_alloc_stag;
2625 
2626 	iwpbl->pbl_allocated = true;
2627 
2628 	return &iwmr->ibmr;
2629 err_alloc_stag:
2630 	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2631 err_get_pble:
2632 	irdma_free_stag(iwdev, stag);
2633 err:
2634 	kfree(iwmr);
2635 
2636 	return ERR_PTR(err_code);
2637 }
2638 
2639 /**
2640  * irdma_set_page - populate pbl list for fmr
2641  * @ibmr: ib mem to access iwarp mr pointer
2642  * @addr: page dma address fro pbl list
2643  */
2644 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
2645 {
2646 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2647 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2648 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2649 	u64 *pbl;
2650 
2651 	if (unlikely(iwmr->npages == iwmr->page_cnt))
2652 		return -ENOMEM;
2653 
2654 	if (palloc->level == PBLE_LEVEL_2) {
2655 		struct irdma_pble_info *palloc_info =
2656 			palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT);
2657 
2658 		palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr;
2659 	} else {
2660 		pbl = palloc->level1.addr;
2661 		pbl[iwmr->npages] = addr;
2662 	}
2663 	iwmr->npages++;
2664 
2665 	return 0;
2666 }
2667 
2668 /**
2669  * irdma_map_mr_sg - map of sg list for fmr
2670  * @ibmr: ib mem to access iwarp mr pointer
2671  * @sg: scatter gather list
2672  * @sg_nents: number of sg pages
2673  * @sg_offset: scatter gather list for fmr
2674  */
2675 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
2676 			   int sg_nents, unsigned int *sg_offset)
2677 {
2678 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2679 
2680 	iwmr->npages = 0;
2681 
2682 	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
2683 }
2684 
2685 /**
2686  * irdma_hwreg_mr - send cqp command for memory registration
2687  * @iwdev: irdma device
2688  * @iwmr: irdma mr pointer
2689  * @access: access for MR
2690  */
2691 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
2692 			  u16 access)
2693 {
2694 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2695 	struct irdma_reg_ns_stag_info *stag_info;
2696 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2697 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2698 	struct irdma_cqp_request *cqp_request;
2699 	struct cqp_cmds_info *cqp_info;
2700 	int ret;
2701 
2702 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2703 	if (!cqp_request)
2704 		return -ENOMEM;
2705 
2706 	cqp_info = &cqp_request->info;
2707 	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
2708 	memset(stag_info, 0, sizeof(*stag_info));
2709 	stag_info->va = iwpbl->user_base;
2710 	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2711 	stag_info->stag_key = (u8)iwmr->stag;
2712 	stag_info->total_len = iwmr->len;
2713 	stag_info->access_rights = irdma_get_mr_access(access);
2714 	stag_info->pd_id = iwpd->sc_pd.pd_id;
2715 	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
2716 		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
2717 	else
2718 		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
2719 	stag_info->page_size = iwmr->page_size;
2720 
2721 	if (iwpbl->pbl_allocated) {
2722 		if (palloc->level == PBLE_LEVEL_1) {
2723 			stag_info->first_pm_pbl_index = palloc->level1.idx;
2724 			stag_info->chunk_size = 1;
2725 		} else {
2726 			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
2727 			stag_info->chunk_size = 3;
2728 		}
2729 	} else {
2730 		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
2731 	}
2732 
2733 	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
2734 	cqp_info->post_sq = 1;
2735 	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
2736 	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2737 	ret = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2738 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2739 
2740 	return ret;
2741 }
2742 
2743 static int irdma_reg_user_mr_type_mem(struct irdma_mr *iwmr, int access)
2744 {
2745 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
2746 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2747 	u32 stag;
2748 	u8 lvl;
2749 	int err;
2750 
2751 	lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0;
2752 
2753 	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
2754 	if (err)
2755 		return err;
2756 
2757 	if (lvl) {
2758 		err = irdma_check_mr_contiguous(&iwpbl->pble_alloc,
2759 						iwmr->page_size);
2760 		if (err) {
2761 			irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
2762 			iwpbl->pbl_allocated = false;
2763 		}
2764 	}
2765 
2766 	stag = irdma_create_stag(iwdev);
2767 	if (!stag) {
2768 		err = -ENOMEM;
2769 		goto free_pble;
2770 	}
2771 
2772 	iwmr->stag = stag;
2773 	iwmr->ibmr.rkey = stag;
2774 	iwmr->ibmr.lkey = stag;
2775 	err = irdma_hwreg_mr(iwdev, iwmr, access);
2776 	if (err)
2777 		goto err_hwreg;
2778 
2779 	return 0;
2780 
2781 err_hwreg:
2782 	irdma_free_stag(iwdev, stag);
2783 
2784 free_pble:
2785 	if (iwpbl->pble_alloc.level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
2786 		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
2787 
2788 	return err;
2789 }
2790 
2791 static struct irdma_mr *irdma_alloc_iwmr(struct ib_umem *region,
2792 					 struct ib_pd *pd, u64 virt,
2793 					 enum irdma_memreg_type reg_type)
2794 {
2795 	struct irdma_device *iwdev = to_iwdev(pd->device);
2796 	struct irdma_pbl *iwpbl = NULL;
2797 	struct irdma_mr *iwmr = NULL;
2798 	unsigned long pgsz_bitmap;
2799 
2800 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2801 	if (!iwmr)
2802 		return ERR_PTR(-ENOMEM);
2803 
2804 	iwpbl = &iwmr->iwpbl;
2805 	iwpbl->iwmr = iwmr;
2806 	iwmr->region = region;
2807 	iwmr->ibmr.pd = pd;
2808 	iwmr->ibmr.device = pd->device;
2809 	iwmr->ibmr.iova = virt;
2810 	iwmr->type = reg_type;
2811 
2812 	pgsz_bitmap = (reg_type == IRDMA_MEMREG_TYPE_MEM) ?
2813 		iwdev->rf->sc_dev.hw_attrs.page_size_cap : PAGE_SIZE;
2814 
2815 	iwmr->page_size = ib_umem_find_best_pgsz(region, pgsz_bitmap, virt);
2816 	if (unlikely(!iwmr->page_size)) {
2817 		kfree(iwmr);
2818 		return ERR_PTR(-EOPNOTSUPP);
2819 	}
2820 
2821 	iwmr->len = region->length;
2822 	iwpbl->user_base = virt;
2823 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
2824 
2825 	return iwmr;
2826 }
2827 
2828 static void irdma_free_iwmr(struct irdma_mr *iwmr)
2829 {
2830 	kfree(iwmr);
2831 }
2832 
2833 static int irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req,
2834 				     struct ib_udata *udata,
2835 				     struct irdma_mr *iwmr)
2836 {
2837 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
2838 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2839 	struct irdma_ucontext *ucontext = NULL;
2840 	unsigned long flags;
2841 	u32 total;
2842 	int err;
2843 	u8 lvl;
2844 
2845 	total = req.sq_pages + req.rq_pages + 1;
2846 	if (total > iwmr->page_cnt)
2847 		return -EINVAL;
2848 
2849 	total = req.sq_pages + req.rq_pages;
2850 	lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
2851 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
2852 	if (err)
2853 		return err;
2854 
2855 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2856 					     ibucontext);
2857 	spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2858 	list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
2859 	iwpbl->on_list = true;
2860 	spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2861 
2862 	return 0;
2863 }
2864 
2865 static int irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req,
2866 				     struct ib_udata *udata,
2867 				     struct irdma_mr *iwmr)
2868 {
2869 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
2870 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2871 	struct irdma_ucontext *ucontext = NULL;
2872 	u8 shadow_pgcnt = 1;
2873 	unsigned long flags;
2874 	u32 total;
2875 	int err;
2876 	u8 lvl;
2877 
2878 	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
2879 		shadow_pgcnt = 0;
2880 	total = req.cq_pages + shadow_pgcnt;
2881 	if (total > iwmr->page_cnt)
2882 		return -EINVAL;
2883 
2884 	lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
2885 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
2886 	if (err)
2887 		return err;
2888 
2889 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2890 					     ibucontext);
2891 	spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2892 	list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
2893 	iwpbl->on_list = true;
2894 	spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2895 
2896 	return 0;
2897 }
2898 
2899 /**
2900  * irdma_reg_user_mr - Register a user memory region
2901  * @pd: ptr of pd
2902  * @start: virtual start address
2903  * @len: length of mr
2904  * @virt: virtual address
2905  * @access: access of mr
2906  * @udata: user data
2907  */
2908 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
2909 				       u64 virt, int access,
2910 				       struct ib_udata *udata)
2911 {
2912 #define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages)
2913 	struct irdma_device *iwdev = to_iwdev(pd->device);
2914 	struct irdma_mem_reg_req req = {};
2915 	struct ib_umem *region = NULL;
2916 	struct irdma_mr *iwmr = NULL;
2917 	int err;
2918 
2919 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2920 		return ERR_PTR(-EINVAL);
2921 
2922 	if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN)
2923 		return ERR_PTR(-EINVAL);
2924 
2925 	region = ib_umem_get(pd->device, start, len, access);
2926 
2927 	if (IS_ERR(region)) {
2928 		ibdev_dbg(&iwdev->ibdev,
2929 			  "VERBS: Failed to create ib_umem region\n");
2930 		return (struct ib_mr *)region;
2931 	}
2932 
2933 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
2934 		ib_umem_release(region);
2935 		return ERR_PTR(-EFAULT);
2936 	}
2937 
2938 	iwmr = irdma_alloc_iwmr(region, pd, virt, req.reg_type);
2939 	if (IS_ERR(iwmr)) {
2940 		ib_umem_release(region);
2941 		return (struct ib_mr *)iwmr;
2942 	}
2943 
2944 	switch (req.reg_type) {
2945 	case IRDMA_MEMREG_TYPE_QP:
2946 		err = irdma_reg_user_mr_type_qp(req, udata, iwmr);
2947 		if (err)
2948 			goto error;
2949 
2950 		break;
2951 	case IRDMA_MEMREG_TYPE_CQ:
2952 		err = irdma_reg_user_mr_type_cq(req, udata, iwmr);
2953 		if (err)
2954 			goto error;
2955 		break;
2956 	case IRDMA_MEMREG_TYPE_MEM:
2957 		err = irdma_reg_user_mr_type_mem(iwmr, access);
2958 		if (err)
2959 			goto error;
2960 
2961 		break;
2962 	default:
2963 		err = -EINVAL;
2964 		goto error;
2965 	}
2966 
2967 	return &iwmr->ibmr;
2968 error:
2969 	ib_umem_release(region);
2970 	irdma_free_iwmr(iwmr);
2971 
2972 	return ERR_PTR(err);
2973 }
2974 
2975 static struct ib_mr *irdma_reg_user_mr_dmabuf(struct ib_pd *pd, u64 start,
2976 					      u64 len, u64 virt,
2977 					      int fd, int access,
2978 					      struct ib_udata *udata)
2979 {
2980 	struct irdma_device *iwdev = to_iwdev(pd->device);
2981 	struct ib_umem_dmabuf *umem_dmabuf;
2982 	struct irdma_mr *iwmr;
2983 	int err;
2984 
2985 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2986 		return ERR_PTR(-EINVAL);
2987 
2988 	umem_dmabuf = ib_umem_dmabuf_get_pinned(pd->device, start, len, fd, access);
2989 	if (IS_ERR(umem_dmabuf)) {
2990 		err = PTR_ERR(umem_dmabuf);
2991 		ibdev_dbg(&iwdev->ibdev, "Failed to get dmabuf umem[%d]\n", err);
2992 		return ERR_PTR(err);
2993 	}
2994 
2995 	iwmr = irdma_alloc_iwmr(&umem_dmabuf->umem, pd, virt, IRDMA_MEMREG_TYPE_MEM);
2996 	if (IS_ERR(iwmr)) {
2997 		err = PTR_ERR(iwmr);
2998 		goto err_release;
2999 	}
3000 
3001 	err = irdma_reg_user_mr_type_mem(iwmr, access);
3002 	if (err)
3003 		goto err_iwmr;
3004 
3005 	return &iwmr->ibmr;
3006 
3007 err_iwmr:
3008 	irdma_free_iwmr(iwmr);
3009 
3010 err_release:
3011 	ib_umem_release(&umem_dmabuf->umem);
3012 
3013 	return ERR_PTR(err);
3014 }
3015 
3016 /**
3017  * irdma_reg_phys_mr - register kernel physical memory
3018  * @pd: ibpd pointer
3019  * @addr: physical address of memory to register
3020  * @size: size of memory to register
3021  * @access: Access rights
3022  * @iova_start: start of virtual address for physical buffers
3023  */
3024 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
3025 				u64 *iova_start)
3026 {
3027 	struct irdma_device *iwdev = to_iwdev(pd->device);
3028 	struct irdma_pbl *iwpbl;
3029 	struct irdma_mr *iwmr;
3030 	u32 stag;
3031 	int ret;
3032 
3033 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3034 	if (!iwmr)
3035 		return ERR_PTR(-ENOMEM);
3036 
3037 	iwmr->ibmr.pd = pd;
3038 	iwmr->ibmr.device = pd->device;
3039 	iwpbl = &iwmr->iwpbl;
3040 	iwpbl->iwmr = iwmr;
3041 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3042 	iwpbl->user_base = *iova_start;
3043 	stag = irdma_create_stag(iwdev);
3044 	if (!stag) {
3045 		ret = -ENOMEM;
3046 		goto err;
3047 	}
3048 
3049 	iwmr->stag = stag;
3050 	iwmr->ibmr.iova = *iova_start;
3051 	iwmr->ibmr.rkey = stag;
3052 	iwmr->ibmr.lkey = stag;
3053 	iwmr->page_cnt = 1;
3054 	iwmr->pgaddrmem[0] = addr;
3055 	iwmr->len = size;
3056 	iwmr->page_size = SZ_4K;
3057 	ret = irdma_hwreg_mr(iwdev, iwmr, access);
3058 	if (ret) {
3059 		irdma_free_stag(iwdev, stag);
3060 		goto err;
3061 	}
3062 
3063 	return &iwmr->ibmr;
3064 
3065 err:
3066 	kfree(iwmr);
3067 
3068 	return ERR_PTR(ret);
3069 }
3070 
3071 /**
3072  * irdma_get_dma_mr - register physical mem
3073  * @pd: ptr of pd
3074  * @acc: access for memory
3075  */
3076 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
3077 {
3078 	u64 kva = 0;
3079 
3080 	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
3081 }
3082 
3083 /**
3084  * irdma_del_memlist - Deleting pbl list entries for CQ/QP
3085  * @iwmr: iwmr for IB's user page addresses
3086  * @ucontext: ptr to user context
3087  */
3088 static void irdma_del_memlist(struct irdma_mr *iwmr,
3089 			      struct irdma_ucontext *ucontext)
3090 {
3091 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3092 	unsigned long flags;
3093 
3094 	switch (iwmr->type) {
3095 	case IRDMA_MEMREG_TYPE_CQ:
3096 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3097 		if (iwpbl->on_list) {
3098 			iwpbl->on_list = false;
3099 			list_del(&iwpbl->list);
3100 		}
3101 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3102 		break;
3103 	case IRDMA_MEMREG_TYPE_QP:
3104 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3105 		if (iwpbl->on_list) {
3106 			iwpbl->on_list = false;
3107 			list_del(&iwpbl->list);
3108 		}
3109 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3110 		break;
3111 	default:
3112 		break;
3113 	}
3114 }
3115 
3116 /**
3117  * irdma_dereg_mr - deregister mr
3118  * @ib_mr: mr ptr for dereg
3119  * @udata: user data
3120  */
3121 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
3122 {
3123 	struct ib_pd *ibpd = ib_mr->pd;
3124 	struct irdma_pd *iwpd = to_iwpd(ibpd);
3125 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3126 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3127 	struct irdma_dealloc_stag_info *info;
3128 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3129 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3130 	struct irdma_cqp_request *cqp_request;
3131 	struct cqp_cmds_info *cqp_info;
3132 	int status;
3133 
3134 	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3135 		if (iwmr->region) {
3136 			struct irdma_ucontext *ucontext;
3137 
3138 			ucontext = rdma_udata_to_drv_context(udata,
3139 						struct irdma_ucontext,
3140 						ibucontext);
3141 			irdma_del_memlist(iwmr, ucontext);
3142 		}
3143 		goto done;
3144 	}
3145 
3146 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3147 	if (!cqp_request)
3148 		return -ENOMEM;
3149 
3150 	cqp_info = &cqp_request->info;
3151 	info = &cqp_info->in.u.dealloc_stag.info;
3152 	memset(info, 0, sizeof(*info));
3153 	info->pd_id = iwpd->sc_pd.pd_id;
3154 	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3155 	info->mr = true;
3156 	if (iwpbl->pbl_allocated)
3157 		info->dealloc_pbl = true;
3158 
3159 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3160 	cqp_info->post_sq = 1;
3161 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3162 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3163 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3164 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3165 	if (status)
3166 		return status;
3167 
3168 	irdma_free_stag(iwdev, iwmr->stag);
3169 done:
3170 	if (iwpbl->pbl_allocated)
3171 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3172 	ib_umem_release(iwmr->region);
3173 	kfree(iwmr);
3174 
3175 	return 0;
3176 }
3177 
3178 /**
3179  * irdma_post_send -  kernel application wr
3180  * @ibqp: qp ptr for wr
3181  * @ib_wr: work request ptr
3182  * @bad_wr: return of bad wr if err
3183  */
3184 static int irdma_post_send(struct ib_qp *ibqp,
3185 			   const struct ib_send_wr *ib_wr,
3186 			   const struct ib_send_wr **bad_wr)
3187 {
3188 	struct irdma_qp *iwqp;
3189 	struct irdma_qp_uk *ukqp;
3190 	struct irdma_sc_dev *dev;
3191 	struct irdma_post_sq_info info;
3192 	int err = 0;
3193 	unsigned long flags;
3194 	bool inv_stag;
3195 	struct irdma_ah *ah;
3196 
3197 	iwqp = to_iwqp(ibqp);
3198 	ukqp = &iwqp->sc_qp.qp_uk;
3199 	dev = &iwqp->iwdev->rf->sc_dev;
3200 
3201 	spin_lock_irqsave(&iwqp->lock, flags);
3202 	while (ib_wr) {
3203 		memset(&info, 0, sizeof(info));
3204 		inv_stag = false;
3205 		info.wr_id = (ib_wr->wr_id);
3206 		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3207 			info.signaled = true;
3208 		if (ib_wr->send_flags & IB_SEND_FENCE)
3209 			info.read_fence = true;
3210 		switch (ib_wr->opcode) {
3211 		case IB_WR_SEND_WITH_IMM:
3212 			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
3213 				info.imm_data_valid = true;
3214 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3215 			} else {
3216 				err = -EINVAL;
3217 				break;
3218 			}
3219 			fallthrough;
3220 		case IB_WR_SEND:
3221 		case IB_WR_SEND_WITH_INV:
3222 			if (ib_wr->opcode == IB_WR_SEND ||
3223 			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
3224 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3225 					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
3226 				else
3227 					info.op_type = IRDMA_OP_TYPE_SEND;
3228 			} else {
3229 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3230 					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
3231 				else
3232 					info.op_type = IRDMA_OP_TYPE_SEND_INV;
3233 				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
3234 			}
3235 
3236 			info.op.send.num_sges = ib_wr->num_sge;
3237 			info.op.send.sg_list = ib_wr->sg_list;
3238 			if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3239 			    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3240 				ah = to_iwah(ud_wr(ib_wr)->ah);
3241 				info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
3242 				info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
3243 				info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3244 			}
3245 
3246 			if (ib_wr->send_flags & IB_SEND_INLINE)
3247 				err = irdma_uk_inline_send(ukqp, &info, false);
3248 			else
3249 				err = irdma_uk_send(ukqp, &info, false);
3250 			break;
3251 		case IB_WR_RDMA_WRITE_WITH_IMM:
3252 			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
3253 				info.imm_data_valid = true;
3254 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3255 			} else {
3256 				err = -EINVAL;
3257 				break;
3258 			}
3259 			fallthrough;
3260 		case IB_WR_RDMA_WRITE:
3261 			if (ib_wr->send_flags & IB_SEND_SOLICITED)
3262 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
3263 			else
3264 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
3265 
3266 			info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
3267 			info.op.rdma_write.lo_sg_list = ib_wr->sg_list;
3268 			info.op.rdma_write.rem_addr.addr =
3269 				rdma_wr(ib_wr)->remote_addr;
3270 			info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3271 			if (ib_wr->send_flags & IB_SEND_INLINE)
3272 				err = irdma_uk_inline_rdma_write(ukqp, &info, false);
3273 			else
3274 				err = irdma_uk_rdma_write(ukqp, &info, false);
3275 			break;
3276 		case IB_WR_RDMA_READ_WITH_INV:
3277 			inv_stag = true;
3278 			fallthrough;
3279 		case IB_WR_RDMA_READ:
3280 			if (ib_wr->num_sge >
3281 			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
3282 				err = -EINVAL;
3283 				break;
3284 			}
3285 			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
3286 			info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
3287 			info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3288 			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
3289 			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3290 			err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3291 			break;
3292 		case IB_WR_LOCAL_INV:
3293 			info.op_type = IRDMA_OP_TYPE_INV_STAG;
3294 			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3295 			err = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3296 			break;
3297 		case IB_WR_REG_MR: {
3298 			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
3299 			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
3300 			struct irdma_fast_reg_stag_info stag_info = {};
3301 
3302 			stag_info.signaled = info.signaled;
3303 			stag_info.read_fence = info.read_fence;
3304 			stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access);
3305 			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
3306 			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
3307 			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
3308 			stag_info.wr_id = ib_wr->wr_id;
3309 			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3310 			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
3311 			stag_info.total_len = iwmr->ibmr.length;
3312 			stag_info.reg_addr_pa = *palloc->level1.addr;
3313 			stag_info.first_pm_pbl_index = palloc->level1.idx;
3314 			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
3315 			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
3316 				stag_info.chunk_size = 1;
3317 			err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3318 							true);
3319 			break;
3320 		}
3321 		default:
3322 			err = -EINVAL;
3323 			ibdev_dbg(&iwqp->iwdev->ibdev,
3324 				  "VERBS: upost_send bad opcode = 0x%x\n",
3325 				  ib_wr->opcode);
3326 			break;
3327 		}
3328 
3329 		if (err)
3330 			break;
3331 		ib_wr = ib_wr->next;
3332 	}
3333 
3334 	if (!iwqp->flush_issued) {
3335 		if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS)
3336 			irdma_uk_qp_post_wr(ukqp);
3337 		spin_unlock_irqrestore(&iwqp->lock, flags);
3338 	} else {
3339 		spin_unlock_irqrestore(&iwqp->lock, flags);
3340 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
3341 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
3342 	}
3343 	if (err)
3344 		*bad_wr = ib_wr;
3345 
3346 	return err;
3347 }
3348 
3349 /**
3350  * irdma_post_recv - post receive wr for kernel application
3351  * @ibqp: ib qp pointer
3352  * @ib_wr: work request for receive
3353  * @bad_wr: bad wr caused an error
3354  */
3355 static int irdma_post_recv(struct ib_qp *ibqp,
3356 			   const struct ib_recv_wr *ib_wr,
3357 			   const struct ib_recv_wr **bad_wr)
3358 {
3359 	struct irdma_qp *iwqp;
3360 	struct irdma_qp_uk *ukqp;
3361 	struct irdma_post_rq_info post_recv = {};
3362 	unsigned long flags;
3363 	int err = 0;
3364 
3365 	iwqp = to_iwqp(ibqp);
3366 	ukqp = &iwqp->sc_qp.qp_uk;
3367 
3368 	spin_lock_irqsave(&iwqp->lock, flags);
3369 	while (ib_wr) {
3370 		post_recv.num_sges = ib_wr->num_sge;
3371 		post_recv.wr_id = ib_wr->wr_id;
3372 		post_recv.sg_list = ib_wr->sg_list;
3373 		err = irdma_uk_post_receive(ukqp, &post_recv);
3374 		if (err) {
3375 			ibdev_dbg(&iwqp->iwdev->ibdev,
3376 				  "VERBS: post_recv err %d\n", err);
3377 			goto out;
3378 		}
3379 
3380 		ib_wr = ib_wr->next;
3381 	}
3382 
3383 out:
3384 	spin_unlock_irqrestore(&iwqp->lock, flags);
3385 	if (iwqp->flush_issued)
3386 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
3387 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
3388 
3389 	if (err)
3390 		*bad_wr = ib_wr;
3391 
3392 	return err;
3393 }
3394 
3395 /**
3396  * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
3397  * @opcode: iwarp flush code
3398  */
3399 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
3400 {
3401 	switch (opcode) {
3402 	case FLUSH_PROT_ERR:
3403 		return IB_WC_LOC_PROT_ERR;
3404 	case FLUSH_REM_ACCESS_ERR:
3405 		return IB_WC_REM_ACCESS_ERR;
3406 	case FLUSH_LOC_QP_OP_ERR:
3407 		return IB_WC_LOC_QP_OP_ERR;
3408 	case FLUSH_REM_OP_ERR:
3409 		return IB_WC_REM_OP_ERR;
3410 	case FLUSH_LOC_LEN_ERR:
3411 		return IB_WC_LOC_LEN_ERR;
3412 	case FLUSH_GENERAL_ERR:
3413 		return IB_WC_WR_FLUSH_ERR;
3414 	case FLUSH_RETRY_EXC_ERR:
3415 		return IB_WC_RETRY_EXC_ERR;
3416 	case FLUSH_MW_BIND_ERR:
3417 		return IB_WC_MW_BIND_ERR;
3418 	case FLUSH_REM_INV_REQ_ERR:
3419 		return IB_WC_REM_INV_REQ_ERR;
3420 	case FLUSH_FATAL_ERR:
3421 	default:
3422 		return IB_WC_FATAL_ERR;
3423 	}
3424 }
3425 
3426 /**
3427  * irdma_process_cqe - process cqe info
3428  * @entry: processed cqe
3429  * @cq_poll_info: cqe info
3430  */
3431 static void irdma_process_cqe(struct ib_wc *entry,
3432 			      struct irdma_cq_poll_info *cq_poll_info)
3433 {
3434 	struct irdma_sc_qp *qp;
3435 
3436 	entry->wc_flags = 0;
3437 	entry->pkey_index = 0;
3438 	entry->wr_id = cq_poll_info->wr_id;
3439 
3440 	qp = cq_poll_info->qp_handle;
3441 	entry->qp = qp->qp_uk.back_qp;
3442 
3443 	if (cq_poll_info->error) {
3444 		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
3445 				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
3446 
3447 		entry->vendor_err = cq_poll_info->major_err << 16 |
3448 				    cq_poll_info->minor_err;
3449 	} else {
3450 		entry->status = IB_WC_SUCCESS;
3451 		if (cq_poll_info->imm_valid) {
3452 			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
3453 			entry->wc_flags |= IB_WC_WITH_IMM;
3454 		}
3455 		if (cq_poll_info->ud_smac_valid) {
3456 			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
3457 			entry->wc_flags |= IB_WC_WITH_SMAC;
3458 		}
3459 
3460 		if (cq_poll_info->ud_vlan_valid) {
3461 			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
3462 
3463 			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
3464 			if (vlan) {
3465 				entry->vlan_id = vlan;
3466 				entry->wc_flags |= IB_WC_WITH_VLAN;
3467 			}
3468 		} else {
3469 			entry->sl = 0;
3470 		}
3471 	}
3472 
3473 	if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) {
3474 		set_ib_wc_op_sq(cq_poll_info, entry);
3475 	} else {
3476 		set_ib_wc_op_rq(cq_poll_info, entry,
3477 				qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ?
3478 				true : false);
3479 		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3480 		    cq_poll_info->stag_invalid_set) {
3481 			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
3482 			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
3483 		}
3484 	}
3485 
3486 	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
3487 		entry->src_qp = cq_poll_info->ud_src_qpn;
3488 		entry->slid = 0;
3489 		entry->wc_flags |=
3490 			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
3491 		entry->network_hdr_type = cq_poll_info->ipv4 ?
3492 						  RDMA_NETWORK_IPV4 :
3493 						  RDMA_NETWORK_IPV6;
3494 	} else {
3495 		entry->src_qp = cq_poll_info->qp_id;
3496 	}
3497 
3498 	entry->byte_len = cq_poll_info->bytes_xfered;
3499 }
3500 
3501 /**
3502  * irdma_poll_one - poll one entry of the CQ
3503  * @ukcq: ukcq to poll
3504  * @cur_cqe: current CQE info to be filled in
3505  * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
3506  *
3507  * Returns the internal irdma device error code or 0 on success
3508  */
3509 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
3510 				 struct irdma_cq_poll_info *cur_cqe,
3511 				 struct ib_wc *entry)
3512 {
3513 	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
3514 
3515 	if (ret)
3516 		return ret;
3517 
3518 	irdma_process_cqe(entry, cur_cqe);
3519 
3520 	return 0;
3521 }
3522 
3523 /**
3524  * __irdma_poll_cq - poll cq for completion (kernel apps)
3525  * @iwcq: cq to poll
3526  * @num_entries: number of entries to poll
3527  * @entry: wr of a completed entry
3528  */
3529 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
3530 {
3531 	struct list_head *tmp_node, *list_node;
3532 	struct irdma_cq_buf *last_buf = NULL;
3533 	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
3534 	struct irdma_cq_buf *cq_buf;
3535 	int ret;
3536 	struct irdma_device *iwdev;
3537 	struct irdma_cq_uk *ukcq;
3538 	bool cq_new_cqe = false;
3539 	int resized_bufs = 0;
3540 	int npolled = 0;
3541 
3542 	iwdev = to_iwdev(iwcq->ibcq.device);
3543 	ukcq = &iwcq->sc_cq.cq_uk;
3544 
3545 	/* go through the list of previously resized CQ buffers */
3546 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
3547 		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
3548 		while (npolled < num_entries) {
3549 			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
3550 			if (!ret) {
3551 				++npolled;
3552 				cq_new_cqe = true;
3553 				continue;
3554 			}
3555 			if (ret == -ENOENT)
3556 				break;
3557 			 /* QP using the CQ is destroyed. Skip reporting this CQE */
3558 			if (ret == -EFAULT) {
3559 				cq_new_cqe = true;
3560 				continue;
3561 			}
3562 			goto error;
3563 		}
3564 
3565 		/* save the resized CQ buffer which received the last cqe */
3566 		if (cq_new_cqe)
3567 			last_buf = cq_buf;
3568 		cq_new_cqe = false;
3569 	}
3570 
3571 	/* check the current CQ for new cqes */
3572 	while (npolled < num_entries) {
3573 		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
3574 		if (ret == -ENOENT) {
3575 			ret = irdma_generated_cmpls(iwcq, cur_cqe);
3576 			if (!ret)
3577 				irdma_process_cqe(entry + npolled, cur_cqe);
3578 		}
3579 		if (!ret) {
3580 			++npolled;
3581 			cq_new_cqe = true;
3582 			continue;
3583 		}
3584 
3585 		if (ret == -ENOENT)
3586 			break;
3587 		/* QP using the CQ is destroyed. Skip reporting this CQE */
3588 		if (ret == -EFAULT) {
3589 			cq_new_cqe = true;
3590 			continue;
3591 		}
3592 		goto error;
3593 	}
3594 
3595 	if (cq_new_cqe)
3596 		/* all previous CQ resizes are complete */
3597 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
3598 	else if (last_buf)
3599 		/* only CQ resizes up to the last_buf are complete */
3600 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
3601 	if (resized_bufs)
3602 		/* report to the HW the number of complete CQ resizes */
3603 		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
3604 
3605 	return npolled;
3606 error:
3607 	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
3608 		  __func__, ret);
3609 
3610 	return ret;
3611 }
3612 
3613 /**
3614  * irdma_poll_cq - poll cq for completion (kernel apps)
3615  * @ibcq: cq to poll
3616  * @num_entries: number of entries to poll
3617  * @entry: wr of a completed entry
3618  */
3619 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
3620 			 struct ib_wc *entry)
3621 {
3622 	struct irdma_cq *iwcq;
3623 	unsigned long flags;
3624 	int ret;
3625 
3626 	iwcq = to_iwcq(ibcq);
3627 
3628 	spin_lock_irqsave(&iwcq->lock, flags);
3629 	ret = __irdma_poll_cq(iwcq, num_entries, entry);
3630 	spin_unlock_irqrestore(&iwcq->lock, flags);
3631 
3632 	return ret;
3633 }
3634 
3635 /**
3636  * irdma_req_notify_cq - arm cq kernel application
3637  * @ibcq: cq to arm
3638  * @notify_flags: notofication flags
3639  */
3640 static int irdma_req_notify_cq(struct ib_cq *ibcq,
3641 			       enum ib_cq_notify_flags notify_flags)
3642 {
3643 	struct irdma_cq *iwcq;
3644 	struct irdma_cq_uk *ukcq;
3645 	unsigned long flags;
3646 	enum irdma_cmpl_notify cq_notify;
3647 	bool promo_event = false;
3648 	int ret = 0;
3649 
3650 	cq_notify = notify_flags == IB_CQ_SOLICITED ?
3651 		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
3652 	iwcq = to_iwcq(ibcq);
3653 	ukcq = &iwcq->sc_cq.cq_uk;
3654 
3655 	spin_lock_irqsave(&iwcq->lock, flags);
3656 	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
3657 	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
3658 		promo_event = true;
3659 
3660 	if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) {
3661 		iwcq->last_notify = cq_notify;
3662 		irdma_uk_cq_request_notification(ukcq, cq_notify);
3663 	}
3664 
3665 	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
3666 	    (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated)))
3667 		ret = 1;
3668 	spin_unlock_irqrestore(&iwcq->lock, flags);
3669 
3670 	return ret;
3671 }
3672 
3673 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
3674 				     struct ib_port_immutable *immutable)
3675 {
3676 	struct ib_port_attr attr;
3677 	int err;
3678 
3679 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
3680 	err = ib_query_port(ibdev, port_num, &attr);
3681 	if (err)
3682 		return err;
3683 
3684 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
3685 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
3686 	immutable->gid_tbl_len = attr.gid_tbl_len;
3687 
3688 	return 0;
3689 }
3690 
3691 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
3692 				   struct ib_port_immutable *immutable)
3693 {
3694 	struct ib_port_attr attr;
3695 	int err;
3696 
3697 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
3698 	err = ib_query_port(ibdev, port_num, &attr);
3699 	if (err)
3700 		return err;
3701 	immutable->gid_tbl_len = attr.gid_tbl_len;
3702 
3703 	return 0;
3704 }
3705 
3706 static const struct rdma_stat_desc irdma_hw_stat_names[] = {
3707 	/* gen1 - 32-bit */
3708 	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name		= "ip4InDiscards",
3709 	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name		= "ip4InTruncatedPkts",
3710 	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name		= "ip4OutNoRoutes",
3711 	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name		= "ip6InDiscards",
3712 	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name		= "ip6InTruncatedPkts",
3713 	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name		= "ip6OutNoRoutes",
3714 	[IRDMA_HW_STAT_INDEX_TCPRTXSEG].name		= "tcpRetransSegs",
3715 	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name		= "tcpInOptErrors",
3716 	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name	= "tcpInProtoErrors",
3717 	[IRDMA_HW_STAT_INDEX_RXVLANERR].name		= "rxVlanErrors",
3718 	/* gen1 - 64-bit */
3719 	[IRDMA_HW_STAT_INDEX_IP4RXOCTS].name		= "ip4InOctets",
3720 	[IRDMA_HW_STAT_INDEX_IP4RXPKTS].name		= "ip4InPkts",
3721 	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS].name		= "ip4InReasmRqd",
3722 	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS].name		= "ip4InMcastPkts",
3723 	[IRDMA_HW_STAT_INDEX_IP4TXOCTS].name		= "ip4OutOctets",
3724 	[IRDMA_HW_STAT_INDEX_IP4TXPKTS].name		= "ip4OutPkts",
3725 	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS].name		= "ip4OutSegRqd",
3726 	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS].name		= "ip4OutMcastPkts",
3727 	[IRDMA_HW_STAT_INDEX_IP6RXOCTS].name		= "ip6InOctets",
3728 	[IRDMA_HW_STAT_INDEX_IP6RXPKTS].name		= "ip6InPkts",
3729 	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS].name		= "ip6InReasmRqd",
3730 	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS].name		= "ip6InMcastPkts",
3731 	[IRDMA_HW_STAT_INDEX_IP6TXOCTS].name		= "ip6OutOctets",
3732 	[IRDMA_HW_STAT_INDEX_IP6TXPKTS].name		= "ip6OutPkts",
3733 	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS].name		= "ip6OutSegRqd",
3734 	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS].name		= "ip6OutMcastPkts",
3735 	[IRDMA_HW_STAT_INDEX_TCPRXSEGS].name		= "tcpInSegs",
3736 	[IRDMA_HW_STAT_INDEX_TCPTXSEG].name		= "tcpOutSegs",
3737 	[IRDMA_HW_STAT_INDEX_RDMARXRDS].name		= "iwInRdmaReads",
3738 	[IRDMA_HW_STAT_INDEX_RDMARXSNDS].name		= "iwInRdmaSends",
3739 	[IRDMA_HW_STAT_INDEX_RDMARXWRS].name		= "iwInRdmaWrites",
3740 	[IRDMA_HW_STAT_INDEX_RDMATXRDS].name		= "iwOutRdmaReads",
3741 	[IRDMA_HW_STAT_INDEX_RDMATXSNDS].name		= "iwOutRdmaSends",
3742 	[IRDMA_HW_STAT_INDEX_RDMATXWRS].name		= "iwOutRdmaWrites",
3743 	[IRDMA_HW_STAT_INDEX_RDMAVBND].name		= "iwRdmaBnd",
3744 	[IRDMA_HW_STAT_INDEX_RDMAVINV].name		= "iwRdmaInv",
3745 
3746 	/* gen2 - 32-bit */
3747 	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name	= "cnpHandled",
3748 	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name	= "cnpIgnored",
3749 	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name		= "cnpSent",
3750 	/* gen2 - 64-bit */
3751 	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS].name		= "ip4InMcastOctets",
3752 	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS].name		= "ip4OutMcastOctets",
3753 	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS].name		= "ip6InMcastOctets",
3754 	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS].name		= "ip6OutMcastOctets",
3755 	[IRDMA_HW_STAT_INDEX_UDPRXPKTS].name		= "RxUDP",
3756 	[IRDMA_HW_STAT_INDEX_UDPTXPKTS].name		= "TxUDP",
3757 	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS].name	= "RxECNMrkd",
3758 
3759 };
3760 
3761 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
3762 {
3763 	struct irdma_device *iwdev = to_iwdev(dev);
3764 
3765 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
3766 		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
3767 		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
3768 }
3769 
3770 /**
3771  * irdma_alloc_hw_port_stats - Allocate a hw stats structure
3772  * @ibdev: device pointer from stack
3773  * @port_num: port number
3774  */
3775 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
3776 						       u32 port_num)
3777 {
3778 	struct irdma_device *iwdev = to_iwdev(ibdev);
3779 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
3780 
3781 	int num_counters = dev->hw_attrs.max_stat_idx;
3782 	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
3783 
3784 	return rdma_alloc_hw_stats_struct(irdma_hw_stat_names, num_counters,
3785 					  lifespan);
3786 }
3787 
3788 /**
3789  * irdma_get_hw_stats - Populates the rdma_hw_stats structure
3790  * @ibdev: device pointer from stack
3791  * @stats: stats pointer from stack
3792  * @port_num: port number
3793  * @index: which hw counter the stack is requesting we update
3794  */
3795 static int irdma_get_hw_stats(struct ib_device *ibdev,
3796 			      struct rdma_hw_stats *stats, u32 port_num,
3797 			      int index)
3798 {
3799 	struct irdma_device *iwdev = to_iwdev(ibdev);
3800 	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
3801 
3802 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
3803 		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
3804 	else
3805 		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
3806 
3807 	memcpy(&stats->value[0], hw_stats, sizeof(u64) * stats->num_counters);
3808 
3809 	return stats->num_counters;
3810 }
3811 
3812 /**
3813  * irdma_query_gid - Query port GID
3814  * @ibdev: device pointer from stack
3815  * @port: port number
3816  * @index: Entry index
3817  * @gid: Global ID
3818  */
3819 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
3820 			   union ib_gid *gid)
3821 {
3822 	struct irdma_device *iwdev = to_iwdev(ibdev);
3823 
3824 	memset(gid->raw, 0, sizeof(gid->raw));
3825 	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
3826 
3827 	return 0;
3828 }
3829 
3830 /**
3831  * mcast_list_add -  Add a new mcast item to list
3832  * @rf: RDMA PCI function
3833  * @new_elem: pointer to element to add
3834  */
3835 static void mcast_list_add(struct irdma_pci_f *rf,
3836 			   struct mc_table_list *new_elem)
3837 {
3838 	list_add(&new_elem->list, &rf->mc_qht_list.list);
3839 }
3840 
3841 /**
3842  * mcast_list_del - Remove an mcast item from list
3843  * @mc_qht_elem: pointer to mcast table list element
3844  */
3845 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
3846 {
3847 	if (mc_qht_elem)
3848 		list_del(&mc_qht_elem->list);
3849 }
3850 
3851 /**
3852  * mcast_list_lookup_ip - Search mcast list for address
3853  * @rf: RDMA PCI function
3854  * @ip_mcast: pointer to mcast IP address
3855  */
3856 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
3857 						  u32 *ip_mcast)
3858 {
3859 	struct mc_table_list *mc_qht_el;
3860 	struct list_head *pos, *q;
3861 
3862 	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
3863 		mc_qht_el = list_entry(pos, struct mc_table_list, list);
3864 		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
3865 			    sizeof(mc_qht_el->mc_info.dest_ip)))
3866 			return mc_qht_el;
3867 	}
3868 
3869 	return NULL;
3870 }
3871 
3872 /**
3873  * irdma_mcast_cqp_op - perform a mcast cqp operation
3874  * @iwdev: irdma device
3875  * @mc_grp_ctx: mcast group info
3876  * @op: operation
3877  *
3878  * returns error status
3879  */
3880 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
3881 			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
3882 {
3883 	struct cqp_cmds_info *cqp_info;
3884 	struct irdma_cqp_request *cqp_request;
3885 	int status;
3886 
3887 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3888 	if (!cqp_request)
3889 		return -ENOMEM;
3890 
3891 	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
3892 	cqp_info = &cqp_request->info;
3893 	cqp_info->cqp_cmd = op;
3894 	cqp_info->post_sq = 1;
3895 	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
3896 	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
3897 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3898 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3899 
3900 	return status;
3901 }
3902 
3903 /**
3904  * irdma_mcast_mac - Get the multicast MAC for an IP address
3905  * @ip_addr: IPv4 or IPv6 address
3906  * @mac: pointer to result MAC address
3907  * @ipv4: flag indicating IPv4 or IPv6
3908  *
3909  */
3910 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
3911 {
3912 	u8 *ip = (u8 *)ip_addr;
3913 
3914 	if (ipv4) {
3915 		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
3916 						0x00, 0x00};
3917 
3918 		mac4[3] = ip[2] & 0x7F;
3919 		mac4[4] = ip[1];
3920 		mac4[5] = ip[0];
3921 		ether_addr_copy(mac, mac4);
3922 	} else {
3923 		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
3924 						0x00, 0x00};
3925 
3926 		mac6[2] = ip[3];
3927 		mac6[3] = ip[2];
3928 		mac6[4] = ip[1];
3929 		mac6[5] = ip[0];
3930 		ether_addr_copy(mac, mac6);
3931 	}
3932 }
3933 
3934 /**
3935  * irdma_attach_mcast - attach a qp to a multicast group
3936  * @ibqp: ptr to qp
3937  * @ibgid: pointer to global ID
3938  * @lid: local ID
3939  *
3940  * returns error status
3941  */
3942 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
3943 {
3944 	struct irdma_qp *iwqp = to_iwqp(ibqp);
3945 	struct irdma_device *iwdev = iwqp->iwdev;
3946 	struct irdma_pci_f *rf = iwdev->rf;
3947 	struct mc_table_list *mc_qht_elem;
3948 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
3949 	unsigned long flags;
3950 	u32 ip_addr[4] = {};
3951 	u32 mgn;
3952 	u32 no_mgs;
3953 	int ret = 0;
3954 	bool ipv4;
3955 	u16 vlan_id;
3956 	union irdma_sockaddr sgid_addr;
3957 	unsigned char dmac[ETH_ALEN];
3958 
3959 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
3960 
3961 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
3962 		irdma_copy_ip_ntohl(ip_addr,
3963 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
3964 		irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL);
3965 		ipv4 = false;
3966 		ibdev_dbg(&iwdev->ibdev,
3967 			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
3968 			  ip_addr);
3969 		irdma_mcast_mac(ip_addr, dmac, false);
3970 	} else {
3971 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
3972 		ipv4 = true;
3973 		vlan_id = irdma_get_vlan_ipv4(ip_addr);
3974 		irdma_mcast_mac(ip_addr, dmac, true);
3975 		ibdev_dbg(&iwdev->ibdev,
3976 			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
3977 			  ibqp->qp_num, ip_addr, dmac);
3978 	}
3979 
3980 	spin_lock_irqsave(&rf->qh_list_lock, flags);
3981 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
3982 	if (!mc_qht_elem) {
3983 		struct irdma_dma_mem *dma_mem_mc;
3984 
3985 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3986 		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
3987 		if (!mc_qht_elem)
3988 			return -ENOMEM;
3989 
3990 		mc_qht_elem->mc_info.ipv4_valid = ipv4;
3991 		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
3992 		       sizeof(mc_qht_elem->mc_info.dest_ip));
3993 		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
3994 				       &mgn, &rf->next_mcg);
3995 		if (ret) {
3996 			kfree(mc_qht_elem);
3997 			return -ENOMEM;
3998 		}
3999 
4000 		mc_qht_elem->mc_info.mgn = mgn;
4001 		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
4002 		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
4003 					 IRDMA_HW_PAGE_SIZE);
4004 		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
4005 						    dma_mem_mc->size,
4006 						    &dma_mem_mc->pa,
4007 						    GFP_KERNEL);
4008 		if (!dma_mem_mc->va) {
4009 			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
4010 			kfree(mc_qht_elem);
4011 			return -ENOMEM;
4012 		}
4013 
4014 		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
4015 		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
4016 		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4017 		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4018 		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4019 		if (vlan_id < VLAN_N_VID)
4020 			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4021 		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id;
4022 		mc_qht_elem->mc_grp_ctx.qs_handle =
4023 			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4024 		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4025 
4026 		spin_lock_irqsave(&rf->qh_list_lock, flags);
4027 		mcast_list_add(rf, mc_qht_elem);
4028 	} else {
4029 		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4030 		    IRDMA_MAX_MGS_PER_CTX) {
4031 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4032 			return -ENOMEM;
4033 		}
4034 	}
4035 
4036 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4037 	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4038 	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4039 	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4040 
4041 	/* Only if there is a change do we need to modify or create */
4042 	if (!no_mgs) {
4043 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4044 					 IRDMA_OP_MC_CREATE);
4045 	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4046 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4047 					 IRDMA_OP_MC_MODIFY);
4048 	} else {
4049 		return 0;
4050 	}
4051 
4052 	if (ret)
4053 		goto error;
4054 
4055 	return 0;
4056 
4057 error:
4058 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4059 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4060 		mcast_list_del(mc_qht_elem);
4061 		dma_free_coherent(rf->hw.device,
4062 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4063 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4064 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4065 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4066 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4067 				mc_qht_elem->mc_grp_ctx.mg_id);
4068 		kfree(mc_qht_elem);
4069 	}
4070 
4071 	return ret;
4072 }
4073 
4074 /**
4075  * irdma_detach_mcast - detach a qp from a multicast group
4076  * @ibqp: ptr to qp
4077  * @ibgid: pointer to global ID
4078  * @lid: local ID
4079  *
4080  * returns error status
4081  */
4082 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4083 {
4084 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4085 	struct irdma_device *iwdev = iwqp->iwdev;
4086 	struct irdma_pci_f *rf = iwdev->rf;
4087 	u32 ip_addr[4] = {};
4088 	struct mc_table_list *mc_qht_elem;
4089 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4090 	int ret;
4091 	unsigned long flags;
4092 	union irdma_sockaddr sgid_addr;
4093 
4094 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4095 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4096 		irdma_copy_ip_ntohl(ip_addr,
4097 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4098 	else
4099 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4100 
4101 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4102 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4103 	if (!mc_qht_elem) {
4104 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4105 		ibdev_dbg(&iwdev->ibdev,
4106 			  "VERBS: address not found MCG\n");
4107 		return 0;
4108 	}
4109 
4110 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4111 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4112 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4113 		mcast_list_del(mc_qht_elem);
4114 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4115 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4116 					 IRDMA_OP_MC_DESTROY);
4117 		if (ret) {
4118 			ibdev_dbg(&iwdev->ibdev,
4119 				  "VERBS: failed MC_DESTROY MCG\n");
4120 			spin_lock_irqsave(&rf->qh_list_lock, flags);
4121 			mcast_list_add(rf, mc_qht_elem);
4122 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4123 			return -EAGAIN;
4124 		}
4125 
4126 		dma_free_coherent(rf->hw.device,
4127 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4128 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4129 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4130 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4131 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4132 				mc_qht_elem->mc_grp_ctx.mg_id);
4133 		kfree(mc_qht_elem);
4134 	} else {
4135 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4136 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4137 					 IRDMA_OP_MC_MODIFY);
4138 		if (ret) {
4139 			ibdev_dbg(&iwdev->ibdev,
4140 				  "VERBS: failed Modify MCG\n");
4141 			return ret;
4142 		}
4143 	}
4144 
4145 	return 0;
4146 }
4147 
4148 static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep)
4149 {
4150 	struct irdma_pci_f *rf = iwdev->rf;
4151 	int err;
4152 
4153 	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx,
4154 			       &rf->next_ah);
4155 	if (err)
4156 		return err;
4157 
4158 	err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep,
4159 			      irdma_gsi_ud_qp_ah_cb, &ah->sc_ah);
4160 
4161 	if (err) {
4162 		ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail");
4163 		goto err_ah_create;
4164 	}
4165 
4166 	if (!sleep) {
4167 		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4168 
4169 		do {
4170 			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4171 			mdelay(1);
4172 		} while (!ah->sc_ah.ah_info.ah_valid && --cnt);
4173 
4174 		if (!cnt) {
4175 			ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out");
4176 			err = -ETIMEDOUT;
4177 			goto err_ah_create;
4178 		}
4179 	}
4180 	return 0;
4181 
4182 err_ah_create:
4183 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx);
4184 
4185 	return err;
4186 }
4187 
4188 static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr)
4189 {
4190 	struct irdma_pd *pd = to_iwpd(ibah->pd);
4191 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4192 	struct rdma_ah_attr *ah_attr = attr->ah_attr;
4193 	const struct ib_gid_attr *sgid_attr;
4194 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4195 	struct irdma_pci_f *rf = iwdev->rf;
4196 	struct irdma_sc_ah *sc_ah;
4197 	struct irdma_ah_info *ah_info;
4198 	union irdma_sockaddr sgid_addr, dgid_addr;
4199 	int err;
4200 	u8 dmac[ETH_ALEN];
4201 
4202 	ah->pd = pd;
4203 	sc_ah = &ah->sc_ah;
4204 	sc_ah->ah_info.vsi = &iwdev->vsi;
4205 	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
4206 	ah->sgid_index = ah_attr->grh.sgid_index;
4207 	sgid_attr = ah_attr->grh.sgid_attr;
4208 	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
4209 	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
4210 	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
4211 	ah->av.attrs = *ah_attr;
4212 	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4213 	ah_info = &sc_ah->ah_info;
4214 	ah_info->pd_idx = pd->sc_pd.pd_id;
4215 	if (ah_attr->ah_flags & IB_AH_GRH) {
4216 		ah_info->flow_label = ah_attr->grh.flow_label;
4217 		ah_info->hop_ttl = ah_attr->grh.hop_limit;
4218 		ah_info->tc_tos = ah_attr->grh.traffic_class;
4219 	}
4220 
4221 	ether_addr_copy(dmac, ah_attr->roce.dmac);
4222 	if (ah->av.net_type == RDMA_NETWORK_IPV4) {
4223 		ah_info->ipv4_valid = true;
4224 		ah_info->dest_ip_addr[0] =
4225 			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
4226 		ah_info->src_ip_addr[0] =
4227 			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4228 		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
4229 						     ah_info->dest_ip_addr[0]);
4230 		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
4231 			ah_info->do_lpbk = true;
4232 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
4233 		}
4234 	} else {
4235 		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
4236 				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4237 		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
4238 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4239 		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
4240 						     ah_info->dest_ip_addr);
4241 		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
4242 			ah_info->do_lpbk = true;
4243 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
4244 		}
4245 	}
4246 
4247 	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
4248 				      ah_info->mac_addr);
4249 	if (err)
4250 		return err;
4251 
4252 	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
4253 					      ah_info->ipv4_valid, dmac);
4254 
4255 	if (ah_info->dst_arpindex == -1)
4256 		return -EINVAL;
4257 
4258 	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode)
4259 		ah_info->vlan_tag = 0;
4260 
4261 	if (ah_info->vlan_tag < VLAN_N_VID) {
4262 		ah_info->insert_vlan_tag = true;
4263 		ah_info->vlan_tag |=
4264 			rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
4265 	}
4266 
4267 	return 0;
4268 }
4269 
4270 /**
4271  * irdma_ah_exists - Check for existing identical AH
4272  * @iwdev: irdma device
4273  * @new_ah: AH to check for
4274  *
4275  * returns true if AH is found, false if not found.
4276  */
4277 static bool irdma_ah_exists(struct irdma_device *iwdev,
4278 			    struct irdma_ah *new_ah)
4279 {
4280 	struct irdma_ah *ah;
4281 	u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^
4282 		  new_ah->sc_ah.ah_info.dest_ip_addr[1] ^
4283 		  new_ah->sc_ah.ah_info.dest_ip_addr[2] ^
4284 		  new_ah->sc_ah.ah_info.dest_ip_addr[3];
4285 
4286 	hash_for_each_possible(iwdev->ah_hash_tbl, ah, list, key) {
4287 		/* Set ah_valid and ah_id the same so memcmp can work */
4288 		new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx;
4289 		new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid;
4290 		if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info,
4291 			    sizeof(ah->sc_ah.ah_info))) {
4292 			refcount_inc(&ah->refcnt);
4293 			new_ah->parent_ah = ah;
4294 			return true;
4295 		}
4296 	}
4297 
4298 	return false;
4299 }
4300 
4301 /**
4302  * irdma_destroy_ah - Destroy address handle
4303  * @ibah: pointer to address handle
4304  * @ah_flags: flags for sleepable
4305  */
4306 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
4307 {
4308 	struct irdma_device *iwdev = to_iwdev(ibah->device);
4309 	struct irdma_ah *ah = to_iwah(ibah);
4310 
4311 	if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) {
4312 		mutex_lock(&iwdev->ah_tbl_lock);
4313 		if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) {
4314 			mutex_unlock(&iwdev->ah_tbl_lock);
4315 			return 0;
4316 		}
4317 		hash_del(&ah->parent_ah->list);
4318 		kfree(ah->parent_ah);
4319 		mutex_unlock(&iwdev->ah_tbl_lock);
4320 	}
4321 
4322 	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
4323 			false, NULL, ah);
4324 
4325 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
4326 			ah->sc_ah.ah_info.ah_idx);
4327 
4328 	return 0;
4329 }
4330 
4331 /**
4332  * irdma_create_user_ah - create user address handle
4333  * @ibah: address handle
4334  * @attr: address handle attributes
4335  * @udata: User data
4336  *
4337  * returns 0 on success, error otherwise
4338  */
4339 static int irdma_create_user_ah(struct ib_ah *ibah,
4340 				struct rdma_ah_init_attr *attr,
4341 				struct ib_udata *udata)
4342 {
4343 #define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd)
4344 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4345 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4346 	struct irdma_create_ah_resp uresp;
4347 	struct irdma_ah *parent_ah;
4348 	int err;
4349 
4350 	if (udata && udata->outlen < IRDMA_CREATE_AH_MIN_RESP_LEN)
4351 		return -EINVAL;
4352 
4353 	err = irdma_setup_ah(ibah, attr);
4354 	if (err)
4355 		return err;
4356 	mutex_lock(&iwdev->ah_tbl_lock);
4357 	if (!irdma_ah_exists(iwdev, ah)) {
4358 		err = irdma_create_hw_ah(iwdev, ah, true);
4359 		if (err) {
4360 			mutex_unlock(&iwdev->ah_tbl_lock);
4361 			return err;
4362 		}
4363 		/* Add new AH to list */
4364 		parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL);
4365 		if (parent_ah) {
4366 			u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^
4367 				  parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^
4368 				  parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^
4369 				  parent_ah->sc_ah.ah_info.dest_ip_addr[3];
4370 
4371 			ah->parent_ah = parent_ah;
4372 			hash_add(iwdev->ah_hash_tbl, &parent_ah->list, key);
4373 			refcount_set(&parent_ah->refcnt, 1);
4374 		}
4375 	}
4376 	mutex_unlock(&iwdev->ah_tbl_lock);
4377 
4378 	uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4379 	err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen));
4380 	if (err)
4381 		irdma_destroy_ah(ibah, attr->flags);
4382 
4383 	return err;
4384 }
4385 
4386 /**
4387  * irdma_create_ah - create address handle
4388  * @ibah: address handle
4389  * @attr: address handle attributes
4390  * @udata: NULL
4391  *
4392  * returns 0 on success, error otherwise
4393  */
4394 static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr,
4395 			   struct ib_udata *udata)
4396 {
4397 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4398 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4399 	int err;
4400 
4401 	err = irdma_setup_ah(ibah, attr);
4402 	if (err)
4403 		return err;
4404 	err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE);
4405 
4406 	return err;
4407 }
4408 
4409 /**
4410  * irdma_query_ah - Query address handle
4411  * @ibah: pointer to address handle
4412  * @ah_attr: address handle attributes
4413  */
4414 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
4415 {
4416 	struct irdma_ah *ah = to_iwah(ibah);
4417 
4418 	memset(ah_attr, 0, sizeof(*ah_attr));
4419 	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
4420 		ah_attr->ah_flags = IB_AH_GRH;
4421 		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
4422 		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
4423 		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
4424 		ah_attr->grh.sgid_index = ah->sgid_index;
4425 		ah_attr->grh.sgid_index = ah->sgid_index;
4426 		memcpy(&ah_attr->grh.dgid, &ah->dgid,
4427 		       sizeof(ah_attr->grh.dgid));
4428 	}
4429 
4430 	return 0;
4431 }
4432 
4433 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
4434 						 u32 port_num)
4435 {
4436 	return IB_LINK_LAYER_ETHERNET;
4437 }
4438 
4439 static const struct ib_device_ops irdma_roce_dev_ops = {
4440 	.attach_mcast = irdma_attach_mcast,
4441 	.create_ah = irdma_create_ah,
4442 	.create_user_ah = irdma_create_user_ah,
4443 	.destroy_ah = irdma_destroy_ah,
4444 	.detach_mcast = irdma_detach_mcast,
4445 	.get_link_layer = irdma_get_link_layer,
4446 	.get_port_immutable = irdma_roce_port_immutable,
4447 	.modify_qp = irdma_modify_qp_roce,
4448 	.query_ah = irdma_query_ah,
4449 	.query_pkey = irdma_query_pkey,
4450 };
4451 
4452 static const struct ib_device_ops irdma_iw_dev_ops = {
4453 	.modify_qp = irdma_modify_qp,
4454 	.get_port_immutable = irdma_iw_port_immutable,
4455 	.query_gid = irdma_query_gid,
4456 };
4457 
4458 static const struct ib_device_ops irdma_dev_ops = {
4459 	.owner = THIS_MODULE,
4460 	.driver_id = RDMA_DRIVER_IRDMA,
4461 	.uverbs_abi_ver = IRDMA_ABI_VER,
4462 
4463 	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
4464 	.alloc_mr = irdma_alloc_mr,
4465 	.alloc_mw = irdma_alloc_mw,
4466 	.alloc_pd = irdma_alloc_pd,
4467 	.alloc_ucontext = irdma_alloc_ucontext,
4468 	.create_cq = irdma_create_cq,
4469 	.create_qp = irdma_create_qp,
4470 	.dealloc_driver = irdma_ib_dealloc_device,
4471 	.dealloc_mw = irdma_dealloc_mw,
4472 	.dealloc_pd = irdma_dealloc_pd,
4473 	.dealloc_ucontext = irdma_dealloc_ucontext,
4474 	.dereg_mr = irdma_dereg_mr,
4475 	.destroy_cq = irdma_destroy_cq,
4476 	.destroy_qp = irdma_destroy_qp,
4477 	.disassociate_ucontext = irdma_disassociate_ucontext,
4478 	.get_dev_fw_str = irdma_get_dev_fw_str,
4479 	.get_dma_mr = irdma_get_dma_mr,
4480 	.get_hw_stats = irdma_get_hw_stats,
4481 	.map_mr_sg = irdma_map_mr_sg,
4482 	.mmap = irdma_mmap,
4483 	.mmap_free = irdma_mmap_free,
4484 	.poll_cq = irdma_poll_cq,
4485 	.post_recv = irdma_post_recv,
4486 	.post_send = irdma_post_send,
4487 	.query_device = irdma_query_device,
4488 	.query_port = irdma_query_port,
4489 	.query_qp = irdma_query_qp,
4490 	.reg_user_mr = irdma_reg_user_mr,
4491 	.reg_user_mr_dmabuf = irdma_reg_user_mr_dmabuf,
4492 	.req_notify_cq = irdma_req_notify_cq,
4493 	.resize_cq = irdma_resize_cq,
4494 	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
4495 	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
4496 	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
4497 	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
4498 	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
4499 	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
4500 };
4501 
4502 /**
4503  * irdma_init_roce_device - initialization of roce rdma device
4504  * @iwdev: irdma device
4505  */
4506 static void irdma_init_roce_device(struct irdma_device *iwdev)
4507 {
4508 	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
4509 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
4510 			    iwdev->netdev->dev_addr);
4511 	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
4512 }
4513 
4514 /**
4515  * irdma_init_iw_device - initialization of iwarp rdma device
4516  * @iwdev: irdma device
4517  */
4518 static int irdma_init_iw_device(struct irdma_device *iwdev)
4519 {
4520 	struct net_device *netdev = iwdev->netdev;
4521 
4522 	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
4523 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
4524 			    netdev->dev_addr);
4525 	iwdev->ibdev.ops.iw_add_ref = irdma_qp_add_ref;
4526 	iwdev->ibdev.ops.iw_rem_ref = irdma_qp_rem_ref;
4527 	iwdev->ibdev.ops.iw_get_qp = irdma_get_qp;
4528 	iwdev->ibdev.ops.iw_connect = irdma_connect;
4529 	iwdev->ibdev.ops.iw_accept = irdma_accept;
4530 	iwdev->ibdev.ops.iw_reject = irdma_reject;
4531 	iwdev->ibdev.ops.iw_create_listen = irdma_create_listen;
4532 	iwdev->ibdev.ops.iw_destroy_listen = irdma_destroy_listen;
4533 	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
4534 	       sizeof(iwdev->ibdev.iw_ifname));
4535 	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
4536 
4537 	return 0;
4538 }
4539 
4540 /**
4541  * irdma_init_rdma_device - initialization of rdma device
4542  * @iwdev: irdma device
4543  */
4544 static int irdma_init_rdma_device(struct irdma_device *iwdev)
4545 {
4546 	struct pci_dev *pcidev = iwdev->rf->pcidev;
4547 	int ret;
4548 
4549 	if (iwdev->roce_mode) {
4550 		irdma_init_roce_device(iwdev);
4551 	} else {
4552 		ret = irdma_init_iw_device(iwdev);
4553 		if (ret)
4554 			return ret;
4555 	}
4556 	iwdev->ibdev.phys_port_cnt = 1;
4557 	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
4558 	iwdev->ibdev.dev.parent = &pcidev->dev;
4559 	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
4560 
4561 	return 0;
4562 }
4563 
4564 /**
4565  * irdma_port_ibevent - indicate port event
4566  * @iwdev: irdma device
4567  */
4568 void irdma_port_ibevent(struct irdma_device *iwdev)
4569 {
4570 	struct ib_event event;
4571 
4572 	event.device = &iwdev->ibdev;
4573 	event.element.port_num = 1;
4574 	event.event =
4575 		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
4576 	ib_dispatch_event(&event);
4577 }
4578 
4579 /**
4580  * irdma_ib_unregister_device - unregister rdma device from IB
4581  * core
4582  * @iwdev: irdma device
4583  */
4584 void irdma_ib_unregister_device(struct irdma_device *iwdev)
4585 {
4586 	iwdev->iw_status = 0;
4587 	irdma_port_ibevent(iwdev);
4588 	ib_unregister_device(&iwdev->ibdev);
4589 }
4590 
4591 /**
4592  * irdma_ib_register_device - register irdma device to IB core
4593  * @iwdev: irdma device
4594  */
4595 int irdma_ib_register_device(struct irdma_device *iwdev)
4596 {
4597 	int ret;
4598 
4599 	ret = irdma_init_rdma_device(iwdev);
4600 	if (ret)
4601 		return ret;
4602 
4603 	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
4604 	if (ret)
4605 		goto error;
4606 	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
4607 	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
4608 	if (ret)
4609 		goto error;
4610 
4611 	iwdev->iw_status = 1;
4612 	irdma_port_ibevent(iwdev);
4613 
4614 	return 0;
4615 
4616 error:
4617 	if (ret)
4618 		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
4619 
4620 	return ret;
4621 }
4622 
4623 /**
4624  * irdma_ib_dealloc_device
4625  * @ibdev: ib device
4626  *
4627  * callback from ibdev dealloc_driver to deallocate resources
4628  * unber irdma device
4629  */
4630 void irdma_ib_dealloc_device(struct ib_device *ibdev)
4631 {
4632 	struct irdma_device *iwdev = to_iwdev(ibdev);
4633 
4634 	irdma_rt_deinit_hw(iwdev);
4635 	irdma_ctrl_deinit_hw(iwdev->rf);
4636 	kfree(iwdev->rf);
4637 }
4638