1 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4 
5 /**
6  * irdma_query_device - get device attributes
7  * @ibdev: device pointer from stack
8  * @props: returning device attributes
9  * @udata: user data
10  */
11 static int irdma_query_device(struct ib_device *ibdev,
12 			      struct ib_device_attr *props,
13 			      struct ib_udata *udata)
14 {
15 	struct irdma_device *iwdev = to_iwdev(ibdev);
16 	struct irdma_pci_f *rf = iwdev->rf;
17 	struct pci_dev *pcidev = iwdev->rf->pcidev;
18 	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19 
20 	if (udata->inlen || udata->outlen)
21 		return -EINVAL;
22 
23 	memset(props, 0, sizeof(*props));
24 	addrconf_addr_eui48((u8 *)&props->sys_image_guid,
25 			    iwdev->netdev->dev_addr);
26 	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
27 			irdma_fw_minor_ver(&rf->sc_dev);
28 	props->device_cap_flags = iwdev->device_cap_flags;
29 	props->vendor_id = pcidev->vendor;
30 	props->vendor_part_id = pcidev->device;
31 
32 	props->hw_ver = rf->pcidev->revision;
33 	props->page_size_cap = SZ_4K | SZ_2M | SZ_1G;
34 	props->max_mr_size = hw_attrs->max_mr_size;
35 	props->max_qp = rf->max_qp - rf->used_qps;
36 	props->max_qp_wr = hw_attrs->max_qp_wr;
37 	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
38 	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
39 	props->max_cq = rf->max_cq - rf->used_cqs;
40 	props->max_cqe = rf->max_cqe;
41 	props->max_mr = rf->max_mr - rf->used_mrs;
42 	props->max_mw = props->max_mr;
43 	props->max_pd = rf->max_pd - rf->used_pds;
44 	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
45 	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
46 	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
47 	if (rdma_protocol_roce(ibdev, 1))
48 		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
49 	props->max_ah = rf->max_ah;
50 	props->max_mcast_grp = rf->max_mcg;
51 	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
52 	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
53 	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
54 #define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff
55 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2)
56 		props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK;
57 
58 	return 0;
59 }
60 
61 /**
62  * irdma_get_eth_speed_and_width - Get IB port speed and width from netdev speed
63  * @link_speed: netdev phy link speed
64  * @active_speed: IB port speed
65  * @active_width: IB port width
66  */
67 static void irdma_get_eth_speed_and_width(u32 link_speed, u16 *active_speed,
68 					  u8 *active_width)
69 {
70 	if (link_speed <= SPEED_1000) {
71 		*active_width = IB_WIDTH_1X;
72 		*active_speed = IB_SPEED_SDR;
73 	} else if (link_speed <= SPEED_10000) {
74 		*active_width = IB_WIDTH_1X;
75 		*active_speed = IB_SPEED_FDR10;
76 	} else if (link_speed <= SPEED_20000) {
77 		*active_width = IB_WIDTH_4X;
78 		*active_speed = IB_SPEED_DDR;
79 	} else if (link_speed <= SPEED_25000) {
80 		*active_width = IB_WIDTH_1X;
81 		*active_speed = IB_SPEED_EDR;
82 	} else if (link_speed <= SPEED_40000) {
83 		*active_width = IB_WIDTH_4X;
84 		*active_speed = IB_SPEED_FDR10;
85 	} else {
86 		*active_width = IB_WIDTH_4X;
87 		*active_speed = IB_SPEED_EDR;
88 	}
89 }
90 
91 /**
92  * irdma_query_port - get port attributes
93  * @ibdev: device pointer from stack
94  * @port: port number for query
95  * @props: returning device attributes
96  */
97 static int irdma_query_port(struct ib_device *ibdev, u32 port,
98 			    struct ib_port_attr *props)
99 {
100 	struct irdma_device *iwdev = to_iwdev(ibdev);
101 	struct net_device *netdev = iwdev->netdev;
102 
103 	/* no need to zero out pros here. done by caller */
104 
105 	props->max_mtu = IB_MTU_4096;
106 	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
107 	props->lid = 1;
108 	props->lmc = 0;
109 	props->sm_lid = 0;
110 	props->sm_sl = 0;
111 	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
112 		props->state = IB_PORT_ACTIVE;
113 		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
114 	} else {
115 		props->state = IB_PORT_DOWN;
116 		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
117 	}
118 	irdma_get_eth_speed_and_width(SPEED_100000, &props->active_speed,
119 				      &props->active_width);
120 
121 	if (rdma_protocol_roce(ibdev, 1)) {
122 		props->gid_tbl_len = 32;
123 		props->ip_gids = true;
124 		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
125 	} else {
126 		props->gid_tbl_len = 1;
127 	}
128 	props->qkey_viol_cntr = 0;
129 	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
130 	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
131 
132 	return 0;
133 }
134 
135 /**
136  * irdma_disassociate_ucontext - Disassociate user context
137  * @context: ib user context
138  */
139 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
140 {
141 }
142 
143 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
144 			     struct vm_area_struct *vma)
145 {
146 	u64 pfn;
147 
148 	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
149 		return -EINVAL;
150 
151 	vma->vm_private_data = ucontext;
152 	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
153 	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
154 
155 	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
156 				 pgprot_noncached(vma->vm_page_prot), NULL);
157 }
158 
159 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
160 {
161 	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
162 
163 	kfree(entry);
164 }
165 
166 static struct rdma_user_mmap_entry*
167 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
168 			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
169 {
170 	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
171 	int ret;
172 
173 	if (!entry)
174 		return NULL;
175 
176 	entry->bar_offset = bar_offset;
177 	entry->mmap_flag = mmap_flag;
178 
179 	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
180 					  &entry->rdma_entry, PAGE_SIZE);
181 	if (ret) {
182 		kfree(entry);
183 		return NULL;
184 	}
185 	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
186 
187 	return &entry->rdma_entry;
188 }
189 
190 /**
191  * irdma_mmap - user memory map
192  * @context: context created during alloc
193  * @vma: kernel info for user memory map
194  */
195 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
196 {
197 	struct rdma_user_mmap_entry *rdma_entry;
198 	struct irdma_user_mmap_entry *entry;
199 	struct irdma_ucontext *ucontext;
200 	u64 pfn;
201 	int ret;
202 
203 	ucontext = to_ucontext(context);
204 
205 	/* Legacy support for libi40iw with hard-coded mmap key */
206 	if (ucontext->legacy_mode)
207 		return irdma_mmap_legacy(ucontext, vma);
208 
209 	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
210 	if (!rdma_entry) {
211 		ibdev_dbg(&ucontext->iwdev->ibdev,
212 			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
213 			  vma->vm_pgoff);
214 		return -EINVAL;
215 	}
216 
217 	entry = to_irdma_mmap_entry(rdma_entry);
218 	ibdev_dbg(&ucontext->iwdev->ibdev,
219 		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
220 		  entry->bar_offset, entry->mmap_flag);
221 
222 	pfn = (entry->bar_offset +
223 	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
224 
225 	switch (entry->mmap_flag) {
226 	case IRDMA_MMAP_IO_NC:
227 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
228 					pgprot_noncached(vma->vm_page_prot),
229 					rdma_entry);
230 		break;
231 	case IRDMA_MMAP_IO_WC:
232 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
233 					pgprot_writecombine(vma->vm_page_prot),
234 					rdma_entry);
235 		break;
236 	default:
237 		ret = -EINVAL;
238 	}
239 
240 	if (ret)
241 		ibdev_dbg(&ucontext->iwdev->ibdev,
242 			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
243 			  entry->bar_offset, entry->mmap_flag, ret);
244 	rdma_user_mmap_entry_put(rdma_entry);
245 
246 	return ret;
247 }
248 
249 /**
250  * irdma_alloc_push_page - allocate a push page for qp
251  * @iwqp: qp pointer
252  */
253 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
254 {
255 	struct irdma_cqp_request *cqp_request;
256 	struct cqp_cmds_info *cqp_info;
257 	struct irdma_device *iwdev = iwqp->iwdev;
258 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
259 	int status;
260 
261 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
262 	if (!cqp_request)
263 		return;
264 
265 	cqp_info = &cqp_request->info;
266 	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
267 	cqp_info->post_sq = 1;
268 	cqp_info->in.u.manage_push_page.info.push_idx = 0;
269 	cqp_info->in.u.manage_push_page.info.qs_handle =
270 		qp->vsi->qos[qp->user_pri].qs_handle;
271 	cqp_info->in.u.manage_push_page.info.free_page = 0;
272 	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
273 	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
274 	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
275 
276 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
277 	if (!status && cqp_request->compl_info.op_ret_val <
278 	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
279 		qp->push_idx = cqp_request->compl_info.op_ret_val;
280 		qp->push_offset = 0;
281 	}
282 
283 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
284 }
285 
286 /**
287  * irdma_alloc_ucontext - Allocate the user context data structure
288  * @uctx: uverbs context pointer
289  * @udata: user data
290  *
291  * This keeps track of all objects associated with a particular
292  * user-mode client.
293  */
294 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
295 				struct ib_udata *udata)
296 {
297 	struct ib_device *ibdev = uctx->device;
298 	struct irdma_device *iwdev = to_iwdev(ibdev);
299 	struct irdma_alloc_ucontext_req req;
300 	struct irdma_alloc_ucontext_resp uresp = {};
301 	struct irdma_ucontext *ucontext = to_ucontext(uctx);
302 	struct irdma_uk_attrs *uk_attrs;
303 
304 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
305 		return -EINVAL;
306 
307 	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
308 		goto ver_error;
309 
310 	ucontext->iwdev = iwdev;
311 	ucontext->abi_ver = req.userspace_ver;
312 
313 	uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
314 	/* GEN_1 legacy support with libi40iw */
315 	if (udata->outlen < sizeof(uresp)) {
316 		if (uk_attrs->hw_rev != IRDMA_GEN_1)
317 			return -EOPNOTSUPP;
318 
319 		ucontext->legacy_mode = true;
320 		uresp.max_qps = iwdev->rf->max_qp;
321 		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
322 		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
323 		uresp.kernel_ver = req.userspace_ver;
324 		if (ib_copy_to_udata(udata, &uresp,
325 				     min(sizeof(uresp), udata->outlen)))
326 			return -EFAULT;
327 	} else {
328 		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
329 
330 		ucontext->db_mmap_entry =
331 			irdma_user_mmap_entry_insert(ucontext, bar_off,
332 						     IRDMA_MMAP_IO_NC,
333 						     &uresp.db_mmap_key);
334 		if (!ucontext->db_mmap_entry)
335 			return -ENOMEM;
336 
337 		uresp.kernel_ver = IRDMA_ABI_VER;
338 		uresp.feature_flags = uk_attrs->feature_flags;
339 		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
340 		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
341 		uresp.max_hw_inline = uk_attrs->max_hw_inline;
342 		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
343 		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
344 		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
345 		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
346 		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
347 		uresp.hw_rev = uk_attrs->hw_rev;
348 		if (ib_copy_to_udata(udata, &uresp,
349 				     min(sizeof(uresp), udata->outlen))) {
350 			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
351 			return -EFAULT;
352 		}
353 	}
354 
355 	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
356 	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
357 	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
358 	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
359 
360 	return 0;
361 
362 ver_error:
363 	ibdev_err(&iwdev->ibdev,
364 		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
365 		  req.userspace_ver, IRDMA_ABI_VER);
366 	return -EINVAL;
367 }
368 
369 /**
370  * irdma_dealloc_ucontext - deallocate the user context data structure
371  * @context: user context created during alloc
372  */
373 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
374 {
375 	struct irdma_ucontext *ucontext = to_ucontext(context);
376 
377 	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
378 }
379 
380 /**
381  * irdma_alloc_pd - allocate protection domain
382  * @pd: PD pointer
383  * @udata: user data
384  */
385 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
386 {
387 	struct irdma_pd *iwpd = to_iwpd(pd);
388 	struct irdma_device *iwdev = to_iwdev(pd->device);
389 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
390 	struct irdma_pci_f *rf = iwdev->rf;
391 	struct irdma_alloc_pd_resp uresp = {};
392 	struct irdma_sc_pd *sc_pd;
393 	u32 pd_id = 0;
394 	int err;
395 
396 	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
397 			       &rf->next_pd);
398 	if (err)
399 		return err;
400 
401 	sc_pd = &iwpd->sc_pd;
402 	if (udata) {
403 		struct irdma_ucontext *ucontext =
404 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
405 						  ibucontext);
406 		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
407 		uresp.pd_id = pd_id;
408 		if (ib_copy_to_udata(udata, &uresp,
409 				     min(sizeof(uresp), udata->outlen))) {
410 			err = -EFAULT;
411 			goto error;
412 		}
413 	} else {
414 		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
415 	}
416 
417 	return 0;
418 error:
419 	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
420 
421 	return err;
422 }
423 
424 /**
425  * irdma_dealloc_pd - deallocate pd
426  * @ibpd: ptr of pd to be deallocated
427  * @udata: user data
428  */
429 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
430 {
431 	struct irdma_pd *iwpd = to_iwpd(ibpd);
432 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
433 
434 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
435 
436 	return 0;
437 }
438 
439 /**
440  * irdma_get_pbl - Retrieve pbl from a list given a virtual
441  * address
442  * @va: user virtual address
443  * @pbl_list: pbl list to search in (QP's or CQ's)
444  */
445 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
446 				       struct list_head *pbl_list)
447 {
448 	struct irdma_pbl *iwpbl;
449 
450 	list_for_each_entry (iwpbl, pbl_list, list) {
451 		if (iwpbl->user_base == va) {
452 			list_del(&iwpbl->list);
453 			iwpbl->on_list = false;
454 			return iwpbl;
455 		}
456 	}
457 
458 	return NULL;
459 }
460 
461 /**
462  * irdma_clean_cqes - clean cq entries for qp
463  * @iwqp: qp ptr (user or kernel)
464  * @iwcq: cq ptr
465  */
466 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
467 {
468 	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
469 	unsigned long flags;
470 
471 	spin_lock_irqsave(&iwcq->lock, flags);
472 	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
473 	spin_unlock_irqrestore(&iwcq->lock, flags);
474 }
475 
476 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
477 {
478 	if (iwqp->push_db_mmap_entry) {
479 		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
480 		iwqp->push_db_mmap_entry = NULL;
481 	}
482 	if (iwqp->push_wqe_mmap_entry) {
483 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
484 		iwqp->push_wqe_mmap_entry = NULL;
485 	}
486 }
487 
488 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
489 					 struct irdma_qp *iwqp,
490 					 u64 *push_wqe_mmap_key,
491 					 u64 *push_db_mmap_key)
492 {
493 	struct irdma_device *iwdev = ucontext->iwdev;
494 	u64 rsvd, bar_off;
495 
496 	rsvd = IRDMA_PF_BAR_RSVD;
497 	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
498 	/* skip over db page */
499 	bar_off += IRDMA_HW_PAGE_SIZE;
500 	/* push wqe page */
501 	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
502 	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
503 					bar_off, IRDMA_MMAP_IO_WC,
504 					push_wqe_mmap_key);
505 	if (!iwqp->push_wqe_mmap_entry)
506 		return -ENOMEM;
507 
508 	/* push doorbell page */
509 	bar_off += IRDMA_HW_PAGE_SIZE;
510 	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
511 					bar_off, IRDMA_MMAP_IO_NC,
512 					push_db_mmap_key);
513 	if (!iwqp->push_db_mmap_entry) {
514 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
515 		return -ENOMEM;
516 	}
517 
518 	return 0;
519 }
520 
521 /**
522  * irdma_destroy_qp - destroy qp
523  * @ibqp: qp's ib pointer also to get to device's qp address
524  * @udata: user data
525  */
526 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
527 {
528 	struct irdma_qp *iwqp = to_iwqp(ibqp);
529 	struct irdma_device *iwdev = iwqp->iwdev;
530 
531 	iwqp->sc_qp.qp_uk.destroy_pending = true;
532 
533 	if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS)
534 		irdma_modify_qp_to_err(&iwqp->sc_qp);
535 
536 	irdma_qp_rem_ref(&iwqp->ibqp);
537 	wait_for_completion(&iwqp->free_qp);
538 	irdma_free_lsmm_rsrc(iwqp);
539 	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
540 
541 	if (!iwqp->user_mode) {
542 		if (iwqp->iwscq) {
543 			irdma_clean_cqes(iwqp, iwqp->iwscq);
544 			if (iwqp->iwrcq != iwqp->iwscq)
545 				irdma_clean_cqes(iwqp, iwqp->iwrcq);
546 		}
547 	}
548 	irdma_remove_push_mmap_entries(iwqp);
549 	irdma_free_qp_rsrc(iwqp);
550 
551 	return 0;
552 }
553 
554 /**
555  * irdma_setup_virt_qp - setup for allocation of virtual qp
556  * @iwdev: irdma device
557  * @iwqp: qp ptr
558  * @init_info: initialize info to return
559  */
560 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
561 			       struct irdma_qp *iwqp,
562 			       struct irdma_qp_init_info *init_info)
563 {
564 	struct irdma_pbl *iwpbl = iwqp->iwpbl;
565 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
566 
567 	iwqp->page = qpmr->sq_page;
568 	init_info->shadow_area_pa = qpmr->shadow;
569 	if (iwpbl->pbl_allocated) {
570 		init_info->virtual_map = true;
571 		init_info->sq_pa = qpmr->sq_pbl.idx;
572 		init_info->rq_pa = qpmr->rq_pbl.idx;
573 	} else {
574 		init_info->sq_pa = qpmr->sq_pbl.addr;
575 		init_info->rq_pa = qpmr->rq_pbl.addr;
576 	}
577 }
578 
579 /**
580  * irdma_setup_kmode_qp - setup initialization for kernel mode qp
581  * @iwdev: iwarp device
582  * @iwqp: qp ptr (user or kernel)
583  * @info: initialize info to return
584  * @init_attr: Initial QP create attributes
585  */
586 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
587 				struct irdma_qp *iwqp,
588 				struct irdma_qp_init_info *info,
589 				struct ib_qp_init_attr *init_attr)
590 {
591 	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
592 	u32 sqdepth, rqdepth;
593 	u8 sqshift, rqshift;
594 	u32 size;
595 	int status;
596 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
597 	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
598 
599 	irdma_get_wqe_shift(uk_attrs,
600 		uk_attrs->hw_rev >= IRDMA_GEN_2 ? ukinfo->max_sq_frag_cnt + 1 :
601 						  ukinfo->max_sq_frag_cnt,
602 		ukinfo->max_inline_data, &sqshift);
603 	status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
604 				   &sqdepth);
605 	if (status)
606 		return status;
607 
608 	if (uk_attrs->hw_rev == IRDMA_GEN_1)
609 		rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
610 	else
611 		irdma_get_wqe_shift(uk_attrs, ukinfo->max_rq_frag_cnt, 0,
612 				    &rqshift);
613 
614 	status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
615 				   &rqdepth);
616 	if (status)
617 		return status;
618 
619 	iwqp->kqp.sq_wrid_mem =
620 		kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
621 	if (!iwqp->kqp.sq_wrid_mem)
622 		return -ENOMEM;
623 
624 	iwqp->kqp.rq_wrid_mem =
625 		kcalloc(rqdepth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
626 	if (!iwqp->kqp.rq_wrid_mem) {
627 		kfree(iwqp->kqp.sq_wrid_mem);
628 		iwqp->kqp.sq_wrid_mem = NULL;
629 		return -ENOMEM;
630 	}
631 
632 	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
633 	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
634 
635 	size = (sqdepth + rqdepth) * IRDMA_QP_WQE_MIN_SIZE;
636 	size += (IRDMA_SHADOW_AREA_SIZE << 3);
637 
638 	mem->size = ALIGN(size, 256);
639 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
640 				     &mem->pa, GFP_KERNEL);
641 	if (!mem->va) {
642 		kfree(iwqp->kqp.sq_wrid_mem);
643 		iwqp->kqp.sq_wrid_mem = NULL;
644 		kfree(iwqp->kqp.rq_wrid_mem);
645 		iwqp->kqp.rq_wrid_mem = NULL;
646 		return -ENOMEM;
647 	}
648 
649 	ukinfo->sq = mem->va;
650 	info->sq_pa = mem->pa;
651 	ukinfo->rq = &ukinfo->sq[sqdepth];
652 	info->rq_pa = info->sq_pa + (sqdepth * IRDMA_QP_WQE_MIN_SIZE);
653 	ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
654 	info->shadow_area_pa = info->rq_pa + (rqdepth * IRDMA_QP_WQE_MIN_SIZE);
655 	ukinfo->sq_size = sqdepth >> sqshift;
656 	ukinfo->rq_size = rqdepth >> rqshift;
657 	ukinfo->qp_id = iwqp->ibqp.qp_num;
658 
659 	init_attr->cap.max_send_wr = (sqdepth - IRDMA_SQ_RSVD) >> sqshift;
660 	init_attr->cap.max_recv_wr = (rqdepth - IRDMA_RQ_RSVD) >> rqshift;
661 
662 	return 0;
663 }
664 
665 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
666 {
667 	struct irdma_pci_f *rf = iwqp->iwdev->rf;
668 	struct irdma_cqp_request *cqp_request;
669 	struct cqp_cmds_info *cqp_info;
670 	struct irdma_create_qp_info *qp_info;
671 	int status;
672 
673 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
674 	if (!cqp_request)
675 		return -ENOMEM;
676 
677 	cqp_info = &cqp_request->info;
678 	qp_info = &cqp_request->info.in.u.qp_create.info;
679 	memset(qp_info, 0, sizeof(*qp_info));
680 	qp_info->mac_valid = true;
681 	qp_info->cq_num_valid = true;
682 	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
683 
684 	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
685 	cqp_info->post_sq = 1;
686 	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
687 	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
688 	status = irdma_handle_cqp_op(rf, cqp_request);
689 	irdma_put_cqp_request(&rf->cqp, cqp_request);
690 
691 	return status;
692 }
693 
694 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
695 					       struct irdma_qp_host_ctx_info *ctx_info)
696 {
697 	struct irdma_device *iwdev = iwqp->iwdev;
698 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
699 	struct irdma_roce_offload_info *roce_info;
700 	struct irdma_udp_offload_info *udp_info;
701 
702 	udp_info = &iwqp->udp_info;
703 	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
704 	udp_info->cwnd = iwdev->roce_cwnd;
705 	udp_info->rexmit_thresh = 2;
706 	udp_info->rnr_nak_thresh = 2;
707 	udp_info->src_port = 0xc000;
708 	udp_info->dst_port = ROCE_V2_UDP_DPORT;
709 	roce_info = &iwqp->roce_info;
710 	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
711 
712 	roce_info->rd_en = true;
713 	roce_info->wr_rdresp_en = true;
714 	roce_info->bind_en = true;
715 	roce_info->dcqcn_en = false;
716 	roce_info->rtomin = 5;
717 
718 	roce_info->ack_credits = iwdev->roce_ackcreds;
719 	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
720 	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
721 
722 	if (!iwqp->user_mode) {
723 		roce_info->priv_mode_en = true;
724 		roce_info->fast_reg_en = true;
725 		roce_info->udprivcq_en = true;
726 	}
727 	roce_info->roce_tver = 0;
728 
729 	ctx_info->roce_info = &iwqp->roce_info;
730 	ctx_info->udp_info = &iwqp->udp_info;
731 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
732 }
733 
734 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
735 					     struct irdma_qp_host_ctx_info *ctx_info)
736 {
737 	struct irdma_device *iwdev = iwqp->iwdev;
738 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
739 	struct irdma_iwarp_offload_info *iwarp_info;
740 
741 	iwarp_info = &iwqp->iwarp_info;
742 	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
743 	iwarp_info->rd_en = true;
744 	iwarp_info->wr_rdresp_en = true;
745 	iwarp_info->bind_en = true;
746 	iwarp_info->ecn_en = true;
747 	iwarp_info->rtomin = 5;
748 
749 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
750 		iwarp_info->ib_rd_en = true;
751 	if (!iwqp->user_mode) {
752 		iwarp_info->priv_mode_en = true;
753 		iwarp_info->fast_reg_en = true;
754 	}
755 	iwarp_info->ddp_ver = 1;
756 	iwarp_info->rdmap_ver = 1;
757 
758 	ctx_info->iwarp_info = &iwqp->iwarp_info;
759 	ctx_info->iwarp_info_valid = true;
760 	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
761 	ctx_info->iwarp_info_valid = false;
762 }
763 
764 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
765 				   struct irdma_device *iwdev)
766 {
767 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
768 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
769 
770 	if (init_attr->create_flags)
771 		return -EOPNOTSUPP;
772 
773 	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
774 	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
775 	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags)
776 		return -EINVAL;
777 
778 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
779 		if (init_attr->qp_type != IB_QPT_RC &&
780 		    init_attr->qp_type != IB_QPT_UD &&
781 		    init_attr->qp_type != IB_QPT_GSI)
782 			return -EOPNOTSUPP;
783 	} else {
784 		if (init_attr->qp_type != IB_QPT_RC)
785 			return -EOPNOTSUPP;
786 	}
787 
788 	return 0;
789 }
790 
791 /**
792  * irdma_create_qp - create qp
793  * @ibqp: ptr of qp
794  * @init_attr: attributes for qp
795  * @udata: user data for create qp
796  */
797 static int irdma_create_qp(struct ib_qp *ibqp,
798 			   struct ib_qp_init_attr *init_attr,
799 			   struct ib_udata *udata)
800 {
801 	struct ib_pd *ibpd = ibqp->pd;
802 	struct irdma_pd *iwpd = to_iwpd(ibpd);
803 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
804 	struct irdma_pci_f *rf = iwdev->rf;
805 	struct irdma_qp *iwqp = to_iwqp(ibqp);
806 	struct irdma_create_qp_req req;
807 	struct irdma_create_qp_resp uresp = {};
808 	u32 qp_num = 0;
809 	int err_code;
810 	int sq_size;
811 	int rq_size;
812 	struct irdma_sc_qp *qp;
813 	struct irdma_sc_dev *dev = &rf->sc_dev;
814 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
815 	struct irdma_qp_init_info init_info = {};
816 	struct irdma_qp_host_ctx_info *ctx_info;
817 	unsigned long flags;
818 
819 	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
820 	if (err_code)
821 		return err_code;
822 
823 	sq_size = init_attr->cap.max_send_wr;
824 	rq_size = init_attr->cap.max_recv_wr;
825 
826 	init_info.vsi = &iwdev->vsi;
827 	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
828 	init_info.qp_uk_init_info.sq_size = sq_size;
829 	init_info.qp_uk_init_info.rq_size = rq_size;
830 	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
831 	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
832 	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
833 
834 	qp = &iwqp->sc_qp;
835 	qp->qp_uk.back_qp = iwqp;
836 	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
837 
838 	iwqp->iwdev = iwdev;
839 	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
840 				      256);
841 	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
842 						 iwqp->q2_ctx_mem.size,
843 						 &iwqp->q2_ctx_mem.pa,
844 						 GFP_KERNEL);
845 	if (!iwqp->q2_ctx_mem.va)
846 		return -ENOMEM;
847 
848 	init_info.q2 = iwqp->q2_ctx_mem.va;
849 	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
850 	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
851 	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
852 
853 	if (init_attr->qp_type == IB_QPT_GSI)
854 		qp_num = 1;
855 	else
856 		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
857 					    &qp_num, &rf->next_qp);
858 	if (err_code)
859 		goto error;
860 
861 	iwqp->iwpd = iwpd;
862 	iwqp->ibqp.qp_num = qp_num;
863 	qp = &iwqp->sc_qp;
864 	iwqp->iwscq = to_iwcq(init_attr->send_cq);
865 	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
866 	iwqp->host_ctx.va = init_info.host_ctx;
867 	iwqp->host_ctx.pa = init_info.host_ctx_pa;
868 	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
869 
870 	init_info.pd = &iwpd->sc_pd;
871 	init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
872 	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
873 		init_info.qp_uk_init_info.first_sq_wq = 1;
874 	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
875 	init_waitqueue_head(&iwqp->waitq);
876 	init_waitqueue_head(&iwqp->mod_qp_waitq);
877 
878 	if (udata) {
879 		err_code = ib_copy_from_udata(&req, udata,
880 					      min(sizeof(req), udata->inlen));
881 		if (err_code) {
882 			ibdev_dbg(&iwdev->ibdev,
883 				  "VERBS: ib_copy_from_data fail\n");
884 			goto error;
885 		}
886 
887 		iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
888 		iwqp->user_mode = 1;
889 		if (req.user_wqe_bufs) {
890 			struct irdma_ucontext *ucontext =
891 				rdma_udata_to_drv_context(udata,
892 							  struct irdma_ucontext,
893 							  ibucontext);
894 
895 			init_info.qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
896 			spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
897 			iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
898 						    &ucontext->qp_reg_mem_list);
899 			spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
900 
901 			if (!iwqp->iwpbl) {
902 				err_code = -ENODATA;
903 				ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
904 				goto error;
905 			}
906 		}
907 		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
908 		irdma_setup_virt_qp(iwdev, iwqp, &init_info);
909 	} else {
910 		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
911 		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
912 	}
913 
914 	if (err_code) {
915 		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
916 		goto error;
917 	}
918 
919 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
920 		if (init_attr->qp_type == IB_QPT_RC) {
921 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
922 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
923 							    IRDMA_WRITE_WITH_IMM |
924 							    IRDMA_ROCE;
925 		} else {
926 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
927 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
928 							    IRDMA_ROCE;
929 		}
930 	} else {
931 		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
932 		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
933 	}
934 
935 	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
936 		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
937 
938 	err_code = irdma_sc_qp_init(qp, &init_info);
939 	if (err_code) {
940 		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
941 		goto error;
942 	}
943 
944 	ctx_info = &iwqp->ctx_info;
945 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
946 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
947 
948 	if (rdma_protocol_roce(&iwdev->ibdev, 1))
949 		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
950 	else
951 		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
952 
953 	err_code = irdma_cqp_create_qp_cmd(iwqp);
954 	if (err_code)
955 		goto error;
956 
957 	refcount_set(&iwqp->refcnt, 1);
958 	spin_lock_init(&iwqp->lock);
959 	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
960 	iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
961 	rf->qp_table[qp_num] = iwqp;
962 	iwqp->max_send_wr = sq_size;
963 	iwqp->max_recv_wr = rq_size;
964 
965 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
966 		if (dev->ws_add(&iwdev->vsi, 0)) {
967 			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
968 			err_code = -EINVAL;
969 			goto error;
970 		}
971 
972 		irdma_qp_add_qos(&iwqp->sc_qp);
973 	}
974 
975 	if (udata) {
976 		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
977 		if (udata->outlen < sizeof(uresp)) {
978 			uresp.lsmm = 1;
979 			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
980 		} else {
981 			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
982 				uresp.lsmm = 1;
983 		}
984 		uresp.actual_sq_size = sq_size;
985 		uresp.actual_rq_size = rq_size;
986 		uresp.qp_id = qp_num;
987 		uresp.qp_caps = qp->qp_uk.qp_caps;
988 
989 		err_code = ib_copy_to_udata(udata, &uresp,
990 					    min(sizeof(uresp), udata->outlen));
991 		if (err_code) {
992 			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
993 			irdma_destroy_qp(&iwqp->ibqp, udata);
994 			return err_code;
995 		}
996 	}
997 
998 	init_completion(&iwqp->free_qp);
999 	return 0;
1000 
1001 error:
1002 	irdma_free_qp_rsrc(iwqp);
1003 	return err_code;
1004 }
1005 
1006 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1007 {
1008 	int acc_flags = 0;
1009 
1010 	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1011 		if (iwqp->roce_info.wr_rdresp_en) {
1012 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1013 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1014 		}
1015 		if (iwqp->roce_info.rd_en)
1016 			acc_flags |= IB_ACCESS_REMOTE_READ;
1017 		if (iwqp->roce_info.bind_en)
1018 			acc_flags |= IB_ACCESS_MW_BIND;
1019 	} else {
1020 		if (iwqp->iwarp_info.wr_rdresp_en) {
1021 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1022 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1023 		}
1024 		if (iwqp->iwarp_info.rd_en)
1025 			acc_flags |= IB_ACCESS_REMOTE_READ;
1026 		if (iwqp->iwarp_info.bind_en)
1027 			acc_flags |= IB_ACCESS_MW_BIND;
1028 	}
1029 	return acc_flags;
1030 }
1031 
1032 /**
1033  * irdma_query_qp - query qp attributes
1034  * @ibqp: qp pointer
1035  * @attr: attributes pointer
1036  * @attr_mask: Not used
1037  * @init_attr: qp attributes to return
1038  */
1039 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1040 			  int attr_mask, struct ib_qp_init_attr *init_attr)
1041 {
1042 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1043 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1044 
1045 	memset(attr, 0, sizeof(*attr));
1046 	memset(init_attr, 0, sizeof(*init_attr));
1047 
1048 	attr->qp_state = iwqp->ibqp_state;
1049 	attr->cur_qp_state = iwqp->ibqp_state;
1050 	attr->cap.max_send_wr = iwqp->max_send_wr;
1051 	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1052 	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1053 	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1054 	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1055 	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1056 	attr->port_num = 1;
1057 	if (rdma_protocol_roce(ibqp->device, 1)) {
1058 		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1059 		attr->qkey = iwqp->roce_info.qkey;
1060 		attr->rq_psn = iwqp->udp_info.epsn;
1061 		attr->sq_psn = iwqp->udp_info.psn_nxt;
1062 		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1063 		attr->pkey_index = iwqp->roce_info.p_key;
1064 		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1065 		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1066 		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1067 		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1068 	}
1069 
1070 	init_attr->event_handler = iwqp->ibqp.event_handler;
1071 	init_attr->qp_context = iwqp->ibqp.qp_context;
1072 	init_attr->send_cq = iwqp->ibqp.send_cq;
1073 	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1074 	init_attr->cap = attr->cap;
1075 
1076 	return 0;
1077 }
1078 
1079 /**
1080  * irdma_query_pkey - Query partition key
1081  * @ibdev: device pointer from stack
1082  * @port: port number
1083  * @index: index of pkey
1084  * @pkey: pointer to store the pkey
1085  */
1086 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1087 			    u16 *pkey)
1088 {
1089 	if (index >= IRDMA_PKEY_TBL_SZ)
1090 		return -EINVAL;
1091 
1092 	*pkey = IRDMA_DEFAULT_PKEY;
1093 	return 0;
1094 }
1095 
1096 /**
1097  * irdma_modify_qp_roce - modify qp request
1098  * @ibqp: qp's pointer for modify
1099  * @attr: access attributes
1100  * @attr_mask: state mask
1101  * @udata: user data
1102  */
1103 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1104 			 int attr_mask, struct ib_udata *udata)
1105 {
1106 	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1107 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1108 	struct irdma_device *iwdev = iwqp->iwdev;
1109 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1110 	struct irdma_qp_host_ctx_info *ctx_info;
1111 	struct irdma_roce_offload_info *roce_info;
1112 	struct irdma_udp_offload_info *udp_info;
1113 	struct irdma_modify_qp_info info = {};
1114 	struct irdma_modify_qp_resp uresp = {};
1115 	struct irdma_modify_qp_req ureq = {};
1116 	unsigned long flags;
1117 	u8 issue_modify_qp = 0;
1118 	int ret = 0;
1119 
1120 	ctx_info = &iwqp->ctx_info;
1121 	roce_info = &iwqp->roce_info;
1122 	udp_info = &iwqp->udp_info;
1123 
1124 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1125 		return -EOPNOTSUPP;
1126 
1127 	if (attr_mask & IB_QP_DEST_QPN)
1128 		roce_info->dest_qp = attr->dest_qp_num;
1129 
1130 	if (attr_mask & IB_QP_PKEY_INDEX) {
1131 		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1132 				       &roce_info->p_key);
1133 		if (ret)
1134 			return ret;
1135 	}
1136 
1137 	if (attr_mask & IB_QP_QKEY)
1138 		roce_info->qkey = attr->qkey;
1139 
1140 	if (attr_mask & IB_QP_PATH_MTU)
1141 		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1142 
1143 	if (attr_mask & IB_QP_SQ_PSN) {
1144 		udp_info->psn_nxt = attr->sq_psn;
1145 		udp_info->lsn =  0xffff;
1146 		udp_info->psn_una = attr->sq_psn;
1147 		udp_info->psn_max = attr->sq_psn;
1148 	}
1149 
1150 	if (attr_mask & IB_QP_RQ_PSN)
1151 		udp_info->epsn = attr->rq_psn;
1152 
1153 	if (attr_mask & IB_QP_RNR_RETRY)
1154 		udp_info->rnr_nak_thresh = attr->rnr_retry;
1155 
1156 	if (attr_mask & IB_QP_RETRY_CNT)
1157 		udp_info->rexmit_thresh = attr->retry_cnt;
1158 
1159 	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1160 
1161 	if (attr_mask & IB_QP_AV) {
1162 		struct irdma_av *av = &iwqp->roce_ah.av;
1163 		const struct ib_gid_attr *sgid_attr;
1164 		u16 vlan_id = VLAN_N_VID;
1165 		u32 local_ip[4];
1166 
1167 		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1168 		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1169 			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1170 			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1171 			udp_info->tos = attr->ah_attr.grh.traffic_class;
1172 			udp_info->src_port =
1173 				rdma_get_udp_sport(udp_info->flow_label,
1174 						   ibqp->qp_num,
1175 						   roce_info->dest_qp);
1176 			irdma_qp_rem_qos(&iwqp->sc_qp);
1177 			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1178 			ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1179 			iwqp->sc_qp.user_pri = ctx_info->user_pri;
1180 			if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1181 				return -ENOMEM;
1182 			irdma_qp_add_qos(&iwqp->sc_qp);
1183 		}
1184 		sgid_attr = attr->ah_attr.grh.sgid_attr;
1185 		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1186 					      ctx_info->roce_info->mac_addr);
1187 		if (ret)
1188 			return ret;
1189 
1190 		if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
1191 			vlan_id = 0;
1192 		if (vlan_id < VLAN_N_VID) {
1193 			udp_info->insert_vlan_tag = true;
1194 			udp_info->vlan_tag = vlan_id |
1195 				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1196 		} else {
1197 			udp_info->insert_vlan_tag = false;
1198 		}
1199 
1200 		av->attrs = attr->ah_attr;
1201 		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1202 		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1203 		if (av->net_type == RDMA_NETWORK_IPV6) {
1204 			__be32 *daddr =
1205 				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1206 			__be32 *saddr =
1207 				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1208 
1209 			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1210 			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1211 
1212 			udp_info->ipv4 = false;
1213 			irdma_copy_ip_ntohl(local_ip, daddr);
1214 
1215 			udp_info->arp_idx = irdma_arp_table(iwdev->rf,
1216 							    &local_ip[0],
1217 							    false, NULL,
1218 							    IRDMA_ARP_RESOLVE);
1219 		} else if (av->net_type == RDMA_NETWORK_IPV4) {
1220 			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1221 			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1222 
1223 			local_ip[0] = ntohl(daddr);
1224 
1225 			udp_info->ipv4 = true;
1226 			udp_info->dest_ip_addr[0] = 0;
1227 			udp_info->dest_ip_addr[1] = 0;
1228 			udp_info->dest_ip_addr[2] = 0;
1229 			udp_info->dest_ip_addr[3] = local_ip[0];
1230 
1231 			udp_info->local_ipaddr[0] = 0;
1232 			udp_info->local_ipaddr[1] = 0;
1233 			udp_info->local_ipaddr[2] = 0;
1234 			udp_info->local_ipaddr[3] = ntohl(saddr);
1235 		}
1236 		udp_info->arp_idx =
1237 			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1238 				      attr->ah_attr.roce.dmac);
1239 	}
1240 
1241 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1242 		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1243 			ibdev_err(&iwdev->ibdev,
1244 				  "rd_atomic = %d, above max_hw_ord=%d\n",
1245 				  attr->max_rd_atomic,
1246 				  dev->hw_attrs.max_hw_ord);
1247 			return -EINVAL;
1248 		}
1249 		if (attr->max_rd_atomic)
1250 			roce_info->ord_size = attr->max_rd_atomic;
1251 		info.ord_valid = true;
1252 	}
1253 
1254 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1255 		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1256 			ibdev_err(&iwdev->ibdev,
1257 				  "rd_atomic = %d, above max_hw_ird=%d\n",
1258 				   attr->max_rd_atomic,
1259 				   dev->hw_attrs.max_hw_ird);
1260 			return -EINVAL;
1261 		}
1262 		if (attr->max_dest_rd_atomic)
1263 			roce_info->ird_size = attr->max_dest_rd_atomic;
1264 	}
1265 
1266 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1267 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1268 			roce_info->wr_rdresp_en = true;
1269 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1270 			roce_info->wr_rdresp_en = true;
1271 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1272 			roce_info->rd_en = true;
1273 	}
1274 
1275 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1276 
1277 	ibdev_dbg(&iwdev->ibdev,
1278 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1279 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1280 		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1281 
1282 	spin_lock_irqsave(&iwqp->lock, flags);
1283 	if (attr_mask & IB_QP_STATE) {
1284 		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1285 					iwqp->ibqp.qp_type, attr_mask)) {
1286 			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1287 				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1288 				   attr->qp_state);
1289 			ret = -EINVAL;
1290 			goto exit;
1291 		}
1292 		info.curr_iwarp_state = iwqp->iwarp_state;
1293 
1294 		switch (attr->qp_state) {
1295 		case IB_QPS_INIT:
1296 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1297 				ret = -EINVAL;
1298 				goto exit;
1299 			}
1300 
1301 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1302 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1303 				issue_modify_qp = 1;
1304 			}
1305 			break;
1306 		case IB_QPS_RTR:
1307 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1308 				ret = -EINVAL;
1309 				goto exit;
1310 			}
1311 			info.arp_cache_idx_valid = true;
1312 			info.cq_num_valid = true;
1313 			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1314 			issue_modify_qp = 1;
1315 			break;
1316 		case IB_QPS_RTS:
1317 			if (iwqp->ibqp_state < IB_QPS_RTR ||
1318 			    iwqp->ibqp_state == IB_QPS_ERR) {
1319 				ret = -EINVAL;
1320 				goto exit;
1321 			}
1322 
1323 			info.arp_cache_idx_valid = true;
1324 			info.cq_num_valid = true;
1325 			info.ord_valid = true;
1326 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1327 			issue_modify_qp = 1;
1328 			if (iwdev->push_mode && udata &&
1329 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1330 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1331 				spin_unlock_irqrestore(&iwqp->lock, flags);
1332 				irdma_alloc_push_page(iwqp);
1333 				spin_lock_irqsave(&iwqp->lock, flags);
1334 			}
1335 			break;
1336 		case IB_QPS_SQD:
1337 			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1338 				goto exit;
1339 
1340 			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1341 				ret = -EINVAL;
1342 				goto exit;
1343 			}
1344 
1345 			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1346 			issue_modify_qp = 1;
1347 			break;
1348 		case IB_QPS_SQE:
1349 		case IB_QPS_ERR:
1350 		case IB_QPS_RESET:
1351 			if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) {
1352 				spin_unlock_irqrestore(&iwqp->lock, flags);
1353 				info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1354 				irdma_hw_modify_qp(iwdev, iwqp, &info, true);
1355 				spin_lock_irqsave(&iwqp->lock, flags);
1356 			}
1357 
1358 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1359 				spin_unlock_irqrestore(&iwqp->lock, flags);
1360 				if (udata) {
1361 					if (ib_copy_from_udata(&ureq, udata,
1362 					    min(sizeof(ureq), udata->inlen)))
1363 						return -EINVAL;
1364 
1365 					irdma_flush_wqes(iwqp,
1366 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1367 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1368 					    IRDMA_REFLUSH);
1369 				}
1370 				return 0;
1371 			}
1372 
1373 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1374 			issue_modify_qp = 1;
1375 			break;
1376 		default:
1377 			ret = -EINVAL;
1378 			goto exit;
1379 		}
1380 
1381 		iwqp->ibqp_state = attr->qp_state;
1382 	}
1383 
1384 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1385 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1386 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1387 	spin_unlock_irqrestore(&iwqp->lock, flags);
1388 
1389 	if (attr_mask & IB_QP_STATE) {
1390 		if (issue_modify_qp) {
1391 			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1392 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1393 				return -EINVAL;
1394 			spin_lock_irqsave(&iwqp->lock, flags);
1395 			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1396 				iwqp->iwarp_state = info.next_iwarp_state;
1397 				iwqp->ibqp_state = attr->qp_state;
1398 			}
1399 			if (iwqp->ibqp_state > IB_QPS_RTS &&
1400 			    !iwqp->flush_issued) {
1401 				iwqp->flush_issued = 1;
1402 				spin_unlock_irqrestore(&iwqp->lock, flags);
1403 				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1404 						       IRDMA_FLUSH_RQ |
1405 						       IRDMA_FLUSH_WAIT);
1406 			} else {
1407 				spin_unlock_irqrestore(&iwqp->lock, flags);
1408 			}
1409 		} else {
1410 			iwqp->ibqp_state = attr->qp_state;
1411 		}
1412 		if (udata && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1413 			struct irdma_ucontext *ucontext;
1414 
1415 			ucontext = rdma_udata_to_drv_context(udata,
1416 					struct irdma_ucontext, ibucontext);
1417 			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1418 			    !iwqp->push_wqe_mmap_entry &&
1419 			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1420 				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1421 				uresp.push_valid = 1;
1422 				uresp.push_offset = iwqp->sc_qp.push_offset;
1423 			}
1424 			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1425 					       udata->outlen));
1426 			if (ret) {
1427 				irdma_remove_push_mmap_entries(iwqp);
1428 				ibdev_dbg(&iwdev->ibdev,
1429 					  "VERBS: copy_to_udata failed\n");
1430 				return ret;
1431 			}
1432 		}
1433 	}
1434 
1435 	return 0;
1436 exit:
1437 	spin_unlock_irqrestore(&iwqp->lock, flags);
1438 
1439 	return ret;
1440 }
1441 
1442 /**
1443  * irdma_modify_qp - modify qp request
1444  * @ibqp: qp's pointer for modify
1445  * @attr: access attributes
1446  * @attr_mask: state mask
1447  * @udata: user data
1448  */
1449 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1450 		    struct ib_udata *udata)
1451 {
1452 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1453 	struct irdma_device *iwdev = iwqp->iwdev;
1454 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1455 	struct irdma_qp_host_ctx_info *ctx_info;
1456 	struct irdma_tcp_offload_info *tcp_info;
1457 	struct irdma_iwarp_offload_info *offload_info;
1458 	struct irdma_modify_qp_info info = {};
1459 	struct irdma_modify_qp_resp uresp = {};
1460 	struct irdma_modify_qp_req ureq = {};
1461 	u8 issue_modify_qp = 0;
1462 	u8 dont_wait = 0;
1463 	int err;
1464 	unsigned long flags;
1465 
1466 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1467 		return -EOPNOTSUPP;
1468 
1469 	ctx_info = &iwqp->ctx_info;
1470 	offload_info = &iwqp->iwarp_info;
1471 	tcp_info = &iwqp->tcp_info;
1472 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1473 	ibdev_dbg(&iwdev->ibdev,
1474 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1475 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1476 		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1477 		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1478 
1479 	spin_lock_irqsave(&iwqp->lock, flags);
1480 	if (attr_mask & IB_QP_STATE) {
1481 		info.curr_iwarp_state = iwqp->iwarp_state;
1482 		switch (attr->qp_state) {
1483 		case IB_QPS_INIT:
1484 		case IB_QPS_RTR:
1485 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1486 				err = -EINVAL;
1487 				goto exit;
1488 			}
1489 
1490 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1491 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1492 				issue_modify_qp = 1;
1493 			}
1494 			if (iwdev->push_mode && udata &&
1495 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1496 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1497 				spin_unlock_irqrestore(&iwqp->lock, flags);
1498 				irdma_alloc_push_page(iwqp);
1499 				spin_lock_irqsave(&iwqp->lock, flags);
1500 			}
1501 			break;
1502 		case IB_QPS_RTS:
1503 			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1504 			    !iwqp->cm_id) {
1505 				err = -EINVAL;
1506 				goto exit;
1507 			}
1508 
1509 			issue_modify_qp = 1;
1510 			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1511 			iwqp->hte_added = 1;
1512 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1513 			info.tcp_ctx_valid = true;
1514 			info.ord_valid = true;
1515 			info.arp_cache_idx_valid = true;
1516 			info.cq_num_valid = true;
1517 			break;
1518 		case IB_QPS_SQD:
1519 			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1520 				err = 0;
1521 				goto exit;
1522 			}
1523 
1524 			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1525 			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1526 				err = 0;
1527 				goto exit;
1528 			}
1529 
1530 			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1531 				err = -EINVAL;
1532 				goto exit;
1533 			}
1534 
1535 			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1536 			issue_modify_qp = 1;
1537 			break;
1538 		case IB_QPS_SQE:
1539 			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1540 				err = -EINVAL;
1541 				goto exit;
1542 			}
1543 
1544 			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1545 			issue_modify_qp = 1;
1546 			break;
1547 		case IB_QPS_ERR:
1548 		case IB_QPS_RESET:
1549 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1550 				spin_unlock_irqrestore(&iwqp->lock, flags);
1551 				if (udata) {
1552 					if (ib_copy_from_udata(&ureq, udata,
1553 					    min(sizeof(ureq), udata->inlen)))
1554 						return -EINVAL;
1555 
1556 					irdma_flush_wqes(iwqp,
1557 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1558 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1559 					    IRDMA_REFLUSH);
1560 				}
1561 				return 0;
1562 			}
1563 
1564 			if (iwqp->sc_qp.term_flags) {
1565 				spin_unlock_irqrestore(&iwqp->lock, flags);
1566 				irdma_terminate_del_timer(&iwqp->sc_qp);
1567 				spin_lock_irqsave(&iwqp->lock, flags);
1568 			}
1569 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1570 			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1571 			    iwdev->iw_status &&
1572 			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1573 				info.reset_tcp_conn = true;
1574 			else
1575 				dont_wait = 1;
1576 
1577 			issue_modify_qp = 1;
1578 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1579 			break;
1580 		default:
1581 			err = -EINVAL;
1582 			goto exit;
1583 		}
1584 
1585 		iwqp->ibqp_state = attr->qp_state;
1586 	}
1587 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1588 		ctx_info->iwarp_info_valid = true;
1589 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1590 			offload_info->wr_rdresp_en = true;
1591 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1592 			offload_info->wr_rdresp_en = true;
1593 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1594 			offload_info->rd_en = true;
1595 	}
1596 
1597 	if (ctx_info->iwarp_info_valid) {
1598 		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1599 		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1600 		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1601 	}
1602 	spin_unlock_irqrestore(&iwqp->lock, flags);
1603 
1604 	if (attr_mask & IB_QP_STATE) {
1605 		if (issue_modify_qp) {
1606 			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1607 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1608 				return -EINVAL;
1609 		}
1610 
1611 		spin_lock_irqsave(&iwqp->lock, flags);
1612 		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1613 			iwqp->iwarp_state = info.next_iwarp_state;
1614 			iwqp->ibqp_state = attr->qp_state;
1615 		}
1616 		spin_unlock_irqrestore(&iwqp->lock, flags);
1617 	}
1618 
1619 	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1620 		if (dont_wait) {
1621 			if (iwqp->cm_id && iwqp->hw_tcp_state) {
1622 				spin_lock_irqsave(&iwqp->lock, flags);
1623 				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1624 				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1625 				spin_unlock_irqrestore(&iwqp->lock, flags);
1626 				irdma_cm_disconn(iwqp);
1627 			}
1628 		} else {
1629 			int close_timer_started;
1630 
1631 			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1632 
1633 			if (iwqp->cm_node) {
1634 				refcount_inc(&iwqp->cm_node->refcnt);
1635 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1636 				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1637 				if (iwqp->cm_id && close_timer_started == 1)
1638 					irdma_schedule_cm_timer(iwqp->cm_node,
1639 						(struct irdma_puda_buf *)iwqp,
1640 						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1641 
1642 				irdma_rem_ref_cm_node(iwqp->cm_node);
1643 			} else {
1644 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1645 			}
1646 		}
1647 	}
1648 	if (attr_mask & IB_QP_STATE && udata &&
1649 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1650 		struct irdma_ucontext *ucontext;
1651 
1652 		ucontext = rdma_udata_to_drv_context(udata,
1653 					struct irdma_ucontext, ibucontext);
1654 		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1655 		    !iwqp->push_wqe_mmap_entry &&
1656 		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1657 			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1658 			uresp.push_valid = 1;
1659 			uresp.push_offset = iwqp->sc_qp.push_offset;
1660 		}
1661 
1662 		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1663 				       udata->outlen));
1664 		if (err) {
1665 			irdma_remove_push_mmap_entries(iwqp);
1666 			ibdev_dbg(&iwdev->ibdev,
1667 				  "VERBS: copy_to_udata failed\n");
1668 			return err;
1669 		}
1670 	}
1671 
1672 	return 0;
1673 exit:
1674 	spin_unlock_irqrestore(&iwqp->lock, flags);
1675 
1676 	return err;
1677 }
1678 
1679 /**
1680  * irdma_cq_free_rsrc - free up resources for cq
1681  * @rf: RDMA PCI function
1682  * @iwcq: cq ptr
1683  */
1684 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1685 {
1686 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1687 
1688 	if (!iwcq->user_mode) {
1689 		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1690 				  iwcq->kmem.va, iwcq->kmem.pa);
1691 		iwcq->kmem.va = NULL;
1692 		dma_free_coherent(rf->sc_dev.hw->device,
1693 				  iwcq->kmem_shadow.size,
1694 				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1695 		iwcq->kmem_shadow.va = NULL;
1696 	}
1697 
1698 	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1699 }
1700 
1701 /**
1702  * irdma_free_cqbuf - worker to free a cq buffer
1703  * @work: provides access to the cq buffer to free
1704  */
1705 static void irdma_free_cqbuf(struct work_struct *work)
1706 {
1707 	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1708 
1709 	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1710 			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1711 	cq_buf->kmem_buf.va = NULL;
1712 	kfree(cq_buf);
1713 }
1714 
1715 /**
1716  * irdma_process_resize_list - remove resized cq buffers from the resize_list
1717  * @iwcq: cq which owns the resize_list
1718  * @iwdev: irdma device
1719  * @lcqe_buf: the buffer where the last cqe is received
1720  */
1721 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1722 				     struct irdma_device *iwdev,
1723 				     struct irdma_cq_buf *lcqe_buf)
1724 {
1725 	struct list_head *tmp_node, *list_node;
1726 	struct irdma_cq_buf *cq_buf;
1727 	int cnt = 0;
1728 
1729 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1730 		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1731 		if (cq_buf == lcqe_buf)
1732 			return cnt;
1733 
1734 		list_del(&cq_buf->list);
1735 		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1736 		cnt++;
1737 	}
1738 
1739 	return cnt;
1740 }
1741 
1742 /**
1743  * irdma_destroy_cq - destroy cq
1744  * @ib_cq: cq pointer
1745  * @udata: user data
1746  */
1747 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1748 {
1749 	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1750 	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1751 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1752 	struct irdma_sc_dev *dev = cq->dev;
1753 	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1754 	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1755 	unsigned long flags;
1756 
1757 	spin_lock_irqsave(&iwcq->lock, flags);
1758 	if (!list_empty(&iwcq->resize_list))
1759 		irdma_process_resize_list(iwcq, iwdev, NULL);
1760 	spin_unlock_irqrestore(&iwcq->lock, flags);
1761 
1762 	irdma_cq_wq_destroy(iwdev->rf, cq);
1763 	irdma_cq_free_rsrc(iwdev->rf, iwcq);
1764 
1765 	spin_lock_irqsave(&iwceq->ce_lock, flags);
1766 	irdma_sc_cleanup_ceqes(cq, ceq);
1767 	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
1768 
1769 	return 0;
1770 }
1771 
1772 /**
1773  * irdma_resize_cq - resize cq
1774  * @ibcq: cq to be resized
1775  * @entries: desired cq size
1776  * @udata: user data
1777  */
1778 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
1779 			   struct ib_udata *udata)
1780 {
1781 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1782 	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
1783 	struct irdma_cqp_request *cqp_request;
1784 	struct cqp_cmds_info *cqp_info;
1785 	struct irdma_modify_cq_info *m_info;
1786 	struct irdma_modify_cq_info info = {};
1787 	struct irdma_dma_mem kmem_buf;
1788 	struct irdma_cq_mr *cqmr_buf;
1789 	struct irdma_pbl *iwpbl_buf;
1790 	struct irdma_device *iwdev;
1791 	struct irdma_pci_f *rf;
1792 	struct irdma_cq_buf *cq_buf = NULL;
1793 	unsigned long flags;
1794 	int ret;
1795 
1796 	iwdev = to_iwdev(ibcq->device);
1797 	rf = iwdev->rf;
1798 
1799 	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
1800 	    IRDMA_FEATURE_CQ_RESIZE))
1801 		return -EOPNOTSUPP;
1802 
1803 	if (entries > rf->max_cqe)
1804 		return -EINVAL;
1805 
1806 	if (!iwcq->user_mode) {
1807 		entries++;
1808 		if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1809 			entries *= 2;
1810 	}
1811 
1812 	info.cq_size = max(entries, 4);
1813 
1814 	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
1815 		return 0;
1816 
1817 	if (udata) {
1818 		struct irdma_resize_cq_req req = {};
1819 		struct irdma_ucontext *ucontext =
1820 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1821 						  ibucontext);
1822 
1823 		/* CQ resize not supported with legacy GEN_1 libi40iw */
1824 		if (ucontext->legacy_mode)
1825 			return -EOPNOTSUPP;
1826 
1827 		if (ib_copy_from_udata(&req, udata,
1828 				       min(sizeof(req), udata->inlen)))
1829 			return -EINVAL;
1830 
1831 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1832 		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
1833 					  &ucontext->cq_reg_mem_list);
1834 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1835 
1836 		if (!iwpbl_buf)
1837 			return -ENOMEM;
1838 
1839 		cqmr_buf = &iwpbl_buf->cq_mr;
1840 		if (iwpbl_buf->pbl_allocated) {
1841 			info.virtual_map = true;
1842 			info.pbl_chunk_size = 1;
1843 			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
1844 		} else {
1845 			info.cq_pa = cqmr_buf->cq_pbl.addr;
1846 		}
1847 	} else {
1848 		/* Kmode CQ resize */
1849 		int rsize;
1850 
1851 		rsize = info.cq_size * sizeof(struct irdma_cqe);
1852 		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
1853 		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
1854 						 kmem_buf.size, &kmem_buf.pa,
1855 						 GFP_KERNEL);
1856 		if (!kmem_buf.va)
1857 			return -ENOMEM;
1858 
1859 		info.cq_base = kmem_buf.va;
1860 		info.cq_pa = kmem_buf.pa;
1861 		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
1862 		if (!cq_buf) {
1863 			ret = -ENOMEM;
1864 			goto error;
1865 		}
1866 	}
1867 
1868 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1869 	if (!cqp_request) {
1870 		ret = -ENOMEM;
1871 		goto error;
1872 	}
1873 
1874 	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
1875 	info.cq_resize = true;
1876 
1877 	cqp_info = &cqp_request->info;
1878 	m_info = &cqp_info->in.u.cq_modify.info;
1879 	memcpy(m_info, &info, sizeof(*m_info));
1880 
1881 	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
1882 	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
1883 	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
1884 	cqp_info->post_sq = 1;
1885 	ret = irdma_handle_cqp_op(rf, cqp_request);
1886 	irdma_put_cqp_request(&rf->cqp, cqp_request);
1887 	if (ret)
1888 		goto error;
1889 
1890 	spin_lock_irqsave(&iwcq->lock, flags);
1891 	if (cq_buf) {
1892 		cq_buf->kmem_buf = iwcq->kmem;
1893 		cq_buf->hw = dev->hw;
1894 		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
1895 		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
1896 		list_add_tail(&cq_buf->list, &iwcq->resize_list);
1897 		iwcq->kmem = kmem_buf;
1898 	}
1899 
1900 	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
1901 	ibcq->cqe = info.cq_size - 1;
1902 	spin_unlock_irqrestore(&iwcq->lock, flags);
1903 
1904 	return 0;
1905 error:
1906 	if (!udata) {
1907 		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
1908 				  kmem_buf.pa);
1909 		kmem_buf.va = NULL;
1910 	}
1911 	kfree(cq_buf);
1912 
1913 	return ret;
1914 }
1915 
1916 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
1917 {
1918 	/* GEN1 does not support CQ create flags */
1919 	if (hw_rev == IRDMA_GEN_1)
1920 		return flags ? -EOPNOTSUPP : 0;
1921 
1922 	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
1923 }
1924 
1925 /**
1926  * irdma_create_cq - create cq
1927  * @ibcq: CQ allocated
1928  * @attr: attributes for cq
1929  * @udata: user data
1930  */
1931 static int irdma_create_cq(struct ib_cq *ibcq,
1932 			   const struct ib_cq_init_attr *attr,
1933 			   struct ib_udata *udata)
1934 {
1935 	struct ib_device *ibdev = ibcq->device;
1936 	struct irdma_device *iwdev = to_iwdev(ibdev);
1937 	struct irdma_pci_f *rf = iwdev->rf;
1938 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1939 	u32 cq_num = 0;
1940 	struct irdma_sc_cq *cq;
1941 	struct irdma_sc_dev *dev = &rf->sc_dev;
1942 	struct irdma_cq_init_info info = {};
1943 	struct irdma_cqp_request *cqp_request;
1944 	struct cqp_cmds_info *cqp_info;
1945 	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1946 	unsigned long flags;
1947 	int err_code;
1948 	int entries = attr->cqe;
1949 
1950 	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
1951 	if (err_code)
1952 		return err_code;
1953 	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
1954 				    &rf->next_cq);
1955 	if (err_code)
1956 		return err_code;
1957 
1958 	cq = &iwcq->sc_cq;
1959 	cq->back_cq = iwcq;
1960 	spin_lock_init(&iwcq->lock);
1961 	INIT_LIST_HEAD(&iwcq->resize_list);
1962 	info.dev = dev;
1963 	ukinfo->cq_size = max(entries, 4);
1964 	ukinfo->cq_id = cq_num;
1965 	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1966 	if (attr->comp_vector < rf->ceqs_count)
1967 		info.ceq_id = attr->comp_vector;
1968 	info.ceq_id_valid = true;
1969 	info.ceqe_mask = 1;
1970 	info.type = IRDMA_CQ_TYPE_IWARP;
1971 	info.vsi = &iwdev->vsi;
1972 
1973 	if (udata) {
1974 		struct irdma_ucontext *ucontext;
1975 		struct irdma_create_cq_req req = {};
1976 		struct irdma_cq_mr *cqmr;
1977 		struct irdma_pbl *iwpbl;
1978 		struct irdma_pbl *iwpbl_shadow;
1979 		struct irdma_cq_mr *cqmr_shadow;
1980 
1981 		iwcq->user_mode = true;
1982 		ucontext =
1983 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1984 						  ibucontext);
1985 		if (ib_copy_from_udata(&req, udata,
1986 				       min(sizeof(req), udata->inlen))) {
1987 			err_code = -EFAULT;
1988 			goto cq_free_rsrc;
1989 		}
1990 
1991 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1992 		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
1993 				      &ucontext->cq_reg_mem_list);
1994 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1995 		if (!iwpbl) {
1996 			err_code = -EPROTO;
1997 			goto cq_free_rsrc;
1998 		}
1999 
2000 		iwcq->iwpbl = iwpbl;
2001 		iwcq->cq_mem_size = 0;
2002 		cqmr = &iwpbl->cq_mr;
2003 
2004 		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2005 		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2006 			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2007 			iwpbl_shadow = irdma_get_pbl(
2008 					(unsigned long)req.user_shadow_area,
2009 					&ucontext->cq_reg_mem_list);
2010 			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2011 
2012 			if (!iwpbl_shadow) {
2013 				err_code = -EPROTO;
2014 				goto cq_free_rsrc;
2015 			}
2016 			iwcq->iwpbl_shadow = iwpbl_shadow;
2017 			cqmr_shadow = &iwpbl_shadow->cq_mr;
2018 			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2019 			cqmr->split = true;
2020 		} else {
2021 			info.shadow_area_pa = cqmr->shadow;
2022 		}
2023 		if (iwpbl->pbl_allocated) {
2024 			info.virtual_map = true;
2025 			info.pbl_chunk_size = 1;
2026 			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2027 		} else {
2028 			info.cq_base_pa = cqmr->cq_pbl.addr;
2029 		}
2030 	} else {
2031 		/* Kmode allocations */
2032 		int rsize;
2033 
2034 		if (entries < 1 || entries > rf->max_cqe) {
2035 			err_code = -EINVAL;
2036 			goto cq_free_rsrc;
2037 		}
2038 
2039 		entries++;
2040 		if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2041 			entries *= 2;
2042 		ukinfo->cq_size = entries;
2043 
2044 		rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2045 		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2046 		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2047 						   iwcq->kmem.size,
2048 						   &iwcq->kmem.pa, GFP_KERNEL);
2049 		if (!iwcq->kmem.va) {
2050 			err_code = -ENOMEM;
2051 			goto cq_free_rsrc;
2052 		}
2053 
2054 		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2055 					       64);
2056 		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2057 							  iwcq->kmem_shadow.size,
2058 							  &iwcq->kmem_shadow.pa,
2059 							  GFP_KERNEL);
2060 		if (!iwcq->kmem_shadow.va) {
2061 			err_code = -ENOMEM;
2062 			goto cq_free_rsrc;
2063 		}
2064 		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2065 		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2066 		ukinfo->cq_base = iwcq->kmem.va;
2067 		info.cq_base_pa = iwcq->kmem.pa;
2068 	}
2069 
2070 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2071 		info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2072 						 (u32)IRDMA_MAX_CQ_READ_THRESH);
2073 
2074 	if (irdma_sc_cq_init(cq, &info)) {
2075 		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2076 		err_code = -EPROTO;
2077 		goto cq_free_rsrc;
2078 	}
2079 
2080 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2081 	if (!cqp_request) {
2082 		err_code = -ENOMEM;
2083 		goto cq_free_rsrc;
2084 	}
2085 
2086 	cqp_info = &cqp_request->info;
2087 	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2088 	cqp_info->post_sq = 1;
2089 	cqp_info->in.u.cq_create.cq = cq;
2090 	cqp_info->in.u.cq_create.check_overflow = true;
2091 	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2092 	err_code = irdma_handle_cqp_op(rf, cqp_request);
2093 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2094 	if (err_code)
2095 		goto cq_free_rsrc;
2096 
2097 	if (udata) {
2098 		struct irdma_create_cq_resp resp = {};
2099 
2100 		resp.cq_id = info.cq_uk_init_info.cq_id;
2101 		resp.cq_size = info.cq_uk_init_info.cq_size;
2102 		if (ib_copy_to_udata(udata, &resp,
2103 				     min(sizeof(resp), udata->outlen))) {
2104 			ibdev_dbg(&iwdev->ibdev,
2105 				  "VERBS: copy to user data\n");
2106 			err_code = -EPROTO;
2107 			goto cq_destroy;
2108 		}
2109 	}
2110 	return 0;
2111 cq_destroy:
2112 	irdma_cq_wq_destroy(rf, cq);
2113 cq_free_rsrc:
2114 	irdma_cq_free_rsrc(rf, iwcq);
2115 
2116 	return err_code;
2117 }
2118 
2119 /**
2120  * irdma_get_mr_access - get hw MR access permissions from IB access flags
2121  * @access: IB access flags
2122  */
2123 static inline u16 irdma_get_mr_access(int access)
2124 {
2125 	u16 hw_access = 0;
2126 
2127 	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2128 		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2129 	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2130 		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2131 	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2132 		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2133 	hw_access |= (access & IB_ACCESS_MW_BIND) ?
2134 		     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2135 	hw_access |= (access & IB_ZERO_BASED) ?
2136 		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2137 	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2138 
2139 	return hw_access;
2140 }
2141 
2142 /**
2143  * irdma_free_stag - free stag resource
2144  * @iwdev: irdma device
2145  * @stag: stag to free
2146  */
2147 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2148 {
2149 	u32 stag_idx;
2150 
2151 	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2152 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2153 }
2154 
2155 /**
2156  * irdma_create_stag - create random stag
2157  * @iwdev: irdma device
2158  */
2159 static u32 irdma_create_stag(struct irdma_device *iwdev)
2160 {
2161 	u32 stag = 0;
2162 	u32 stag_index = 0;
2163 	u32 next_stag_index;
2164 	u32 driver_key;
2165 	u32 random;
2166 	u8 consumer_key;
2167 	int ret;
2168 
2169 	get_random_bytes(&random, sizeof(random));
2170 	consumer_key = (u8)random;
2171 
2172 	driver_key = random & ~iwdev->rf->mr_stagmask;
2173 	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2174 	next_stag_index %= iwdev->rf->max_mr;
2175 
2176 	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2177 			       iwdev->rf->max_mr, &stag_index,
2178 			       &next_stag_index);
2179 	if (ret)
2180 		return stag;
2181 	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2182 	stag |= driver_key;
2183 	stag += (u32)consumer_key;
2184 
2185 	return stag;
2186 }
2187 
2188 /**
2189  * irdma_next_pbl_addr - Get next pbl address
2190  * @pbl: pointer to a pble
2191  * @pinfo: info pointer
2192  * @idx: index
2193  */
2194 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2195 				       u32 *idx)
2196 {
2197 	*idx += 1;
2198 	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2199 		return ++pbl;
2200 	*idx = 0;
2201 	(*pinfo)++;
2202 
2203 	return (*pinfo)->addr;
2204 }
2205 
2206 /**
2207  * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2208  * @iwmr: iwmr for IB's user page addresses
2209  * @pbl: ple pointer to save 1 level or 0 level pble
2210  * @level: indicated level 0, 1 or 2
2211  */
2212 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2213 				    enum irdma_pble_level level)
2214 {
2215 	struct ib_umem *region = iwmr->region;
2216 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2217 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2218 	struct irdma_pble_info *pinfo;
2219 	struct ib_block_iter biter;
2220 	u32 idx = 0;
2221 	u32 pbl_cnt = 0;
2222 
2223 	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2224 
2225 	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2226 		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2227 
2228 	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2229 		*pbl = rdma_block_iter_dma_address(&biter);
2230 		if (++pbl_cnt == palloc->total_cnt)
2231 			break;
2232 		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2233 	}
2234 }
2235 
2236 /**
2237  * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2238  * @arr: lvl1 pbl array
2239  * @npages: page count
2240  * @pg_size: page size
2241  *
2242  */
2243 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2244 {
2245 	u32 pg_idx;
2246 
2247 	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2248 		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2249 			return false;
2250 	}
2251 
2252 	return true;
2253 }
2254 
2255 /**
2256  * irdma_check_mr_contiguous - check if MR is physically contiguous
2257  * @palloc: pbl allocation struct
2258  * @pg_size: page size
2259  */
2260 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2261 				      u32 pg_size)
2262 {
2263 	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2264 	struct irdma_pble_info *leaf = lvl2->leaf;
2265 	u64 *arr = NULL;
2266 	u64 *start_addr = NULL;
2267 	int i;
2268 	bool ret;
2269 
2270 	if (palloc->level == PBLE_LEVEL_1) {
2271 		arr = palloc->level1.addr;
2272 		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2273 						 pg_size);
2274 		return ret;
2275 	}
2276 
2277 	start_addr = leaf->addr;
2278 
2279 	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2280 		arr = leaf->addr;
2281 		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2282 			return false;
2283 		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2284 		if (!ret)
2285 			return false;
2286 	}
2287 
2288 	return true;
2289 }
2290 
2291 /**
2292  * irdma_setup_pbles - copy user pg address to pble's
2293  * @rf: RDMA PCI function
2294  * @iwmr: mr pointer for this memory registration
2295  * @use_pbles: flag if to use pble's
2296  */
2297 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2298 			     bool use_pbles)
2299 {
2300 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2301 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2302 	struct irdma_pble_info *pinfo;
2303 	u64 *pbl;
2304 	int status;
2305 	enum irdma_pble_level level = PBLE_LEVEL_1;
2306 
2307 	if (use_pbles) {
2308 		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2309 					false);
2310 		if (status)
2311 			return status;
2312 
2313 		iwpbl->pbl_allocated = true;
2314 		level = palloc->level;
2315 		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2316 						  palloc->level2.leaf;
2317 		pbl = pinfo->addr;
2318 	} else {
2319 		pbl = iwmr->pgaddrmem;
2320 	}
2321 
2322 	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2323 
2324 	if (use_pbles)
2325 		iwmr->pgaddrmem[0] = *pbl;
2326 
2327 	return 0;
2328 }
2329 
2330 /**
2331  * irdma_handle_q_mem - handle memory for qp and cq
2332  * @iwdev: irdma device
2333  * @req: information for q memory management
2334  * @iwpbl: pble struct
2335  * @use_pbles: flag to use pble
2336  */
2337 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2338 			      struct irdma_mem_reg_req *req,
2339 			      struct irdma_pbl *iwpbl, bool use_pbles)
2340 {
2341 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2342 	struct irdma_mr *iwmr = iwpbl->iwmr;
2343 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2344 	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2345 	struct irdma_hmc_pble *hmc_p;
2346 	u64 *arr = iwmr->pgaddrmem;
2347 	u32 pg_size, total;
2348 	int err = 0;
2349 	bool ret = true;
2350 
2351 	pg_size = iwmr->page_size;
2352 	err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles);
2353 	if (err)
2354 		return err;
2355 
2356 	if (use_pbles && palloc->level != PBLE_LEVEL_1) {
2357 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2358 		iwpbl->pbl_allocated = false;
2359 		return -ENOMEM;
2360 	}
2361 
2362 	if (use_pbles)
2363 		arr = palloc->level1.addr;
2364 
2365 	switch (iwmr->type) {
2366 	case IRDMA_MEMREG_TYPE_QP:
2367 		total = req->sq_pages + req->rq_pages;
2368 		hmc_p = &qpmr->sq_pbl;
2369 		qpmr->shadow = (dma_addr_t)arr[total];
2370 
2371 		if (use_pbles) {
2372 			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2373 							 pg_size);
2374 			if (ret)
2375 				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2376 								 req->rq_pages,
2377 								 pg_size);
2378 		}
2379 
2380 		if (!ret) {
2381 			hmc_p->idx = palloc->level1.idx;
2382 			hmc_p = &qpmr->rq_pbl;
2383 			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2384 		} else {
2385 			hmc_p->addr = arr[0];
2386 			hmc_p = &qpmr->rq_pbl;
2387 			hmc_p->addr = arr[req->sq_pages];
2388 		}
2389 		break;
2390 	case IRDMA_MEMREG_TYPE_CQ:
2391 		hmc_p = &cqmr->cq_pbl;
2392 
2393 		if (!cqmr->split)
2394 			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2395 
2396 		if (use_pbles)
2397 			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2398 							 pg_size);
2399 
2400 		if (!ret)
2401 			hmc_p->idx = palloc->level1.idx;
2402 		else
2403 			hmc_p->addr = arr[0];
2404 	break;
2405 	default:
2406 		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2407 		err = -EINVAL;
2408 	}
2409 
2410 	if (use_pbles && ret) {
2411 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2412 		iwpbl->pbl_allocated = false;
2413 	}
2414 
2415 	return err;
2416 }
2417 
2418 /**
2419  * irdma_hw_alloc_mw - create the hw memory window
2420  * @iwdev: irdma device
2421  * @iwmr: pointer to memory window info
2422  */
2423 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2424 {
2425 	struct irdma_mw_alloc_info *info;
2426 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2427 	struct irdma_cqp_request *cqp_request;
2428 	struct cqp_cmds_info *cqp_info;
2429 	int status;
2430 
2431 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2432 	if (!cqp_request)
2433 		return -ENOMEM;
2434 
2435 	cqp_info = &cqp_request->info;
2436 	info = &cqp_info->in.u.mw_alloc.info;
2437 	memset(info, 0, sizeof(*info));
2438 	if (iwmr->ibmw.type == IB_MW_TYPE_1)
2439 		info->mw_wide = true;
2440 
2441 	info->page_size = PAGE_SIZE;
2442 	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2443 	info->pd_id = iwpd->sc_pd.pd_id;
2444 	info->remote_access = true;
2445 	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
2446 	cqp_info->post_sq = 1;
2447 	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
2448 	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
2449 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2450 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2451 
2452 	return status;
2453 }
2454 
2455 /**
2456  * irdma_alloc_mw - Allocate memory window
2457  * @ibmw: Memory Window
2458  * @udata: user data pointer
2459  */
2460 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
2461 {
2462 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2463 	struct irdma_mr *iwmr = to_iwmw(ibmw);
2464 	int err_code;
2465 	u32 stag;
2466 
2467 	stag = irdma_create_stag(iwdev);
2468 	if (!stag)
2469 		return -ENOMEM;
2470 
2471 	iwmr->stag = stag;
2472 	ibmw->rkey = stag;
2473 
2474 	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
2475 	if (err_code) {
2476 		irdma_free_stag(iwdev, stag);
2477 		return err_code;
2478 	}
2479 
2480 	return 0;
2481 }
2482 
2483 /**
2484  * irdma_dealloc_mw - Dealloc memory window
2485  * @ibmw: memory window structure.
2486  */
2487 static int irdma_dealloc_mw(struct ib_mw *ibmw)
2488 {
2489 	struct ib_pd *ibpd = ibmw->pd;
2490 	struct irdma_pd *iwpd = to_iwpd(ibpd);
2491 	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
2492 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2493 	struct irdma_cqp_request *cqp_request;
2494 	struct cqp_cmds_info *cqp_info;
2495 	struct irdma_dealloc_stag_info *info;
2496 
2497 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2498 	if (!cqp_request)
2499 		return -ENOMEM;
2500 
2501 	cqp_info = &cqp_request->info;
2502 	info = &cqp_info->in.u.dealloc_stag.info;
2503 	memset(info, 0, sizeof(*info));
2504 	info->pd_id = iwpd->sc_pd.pd_id;
2505 	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
2506 	info->mr = false;
2507 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
2508 	cqp_info->post_sq = 1;
2509 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
2510 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2511 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
2512 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2513 	irdma_free_stag(iwdev, iwmr->stag);
2514 
2515 	return 0;
2516 }
2517 
2518 /**
2519  * irdma_hw_alloc_stag - cqp command to allocate stag
2520  * @iwdev: irdma device
2521  * @iwmr: irdma mr pointer
2522  */
2523 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
2524 			       struct irdma_mr *iwmr)
2525 {
2526 	struct irdma_allocate_stag_info *info;
2527 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2528 	int status;
2529 	struct irdma_cqp_request *cqp_request;
2530 	struct cqp_cmds_info *cqp_info;
2531 
2532 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2533 	if (!cqp_request)
2534 		return -ENOMEM;
2535 
2536 	cqp_info = &cqp_request->info;
2537 	info = &cqp_info->in.u.alloc_stag.info;
2538 	memset(info, 0, sizeof(*info));
2539 	info->page_size = PAGE_SIZE;
2540 	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2541 	info->pd_id = iwpd->sc_pd.pd_id;
2542 	info->total_len = iwmr->len;
2543 	info->remote_access = true;
2544 	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
2545 	cqp_info->post_sq = 1;
2546 	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
2547 	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
2548 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2549 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2550 
2551 	return status;
2552 }
2553 
2554 /**
2555  * irdma_alloc_mr - register stag for fast memory registration
2556  * @pd: ibpd pointer
2557  * @mr_type: memory for stag registrion
2558  * @max_num_sg: man number of pages
2559  */
2560 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
2561 				    u32 max_num_sg)
2562 {
2563 	struct irdma_device *iwdev = to_iwdev(pd->device);
2564 	struct irdma_pble_alloc *palloc;
2565 	struct irdma_pbl *iwpbl;
2566 	struct irdma_mr *iwmr;
2567 	u32 stag;
2568 	int err_code;
2569 
2570 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2571 	if (!iwmr)
2572 		return ERR_PTR(-ENOMEM);
2573 
2574 	stag = irdma_create_stag(iwdev);
2575 	if (!stag) {
2576 		err_code = -ENOMEM;
2577 		goto err;
2578 	}
2579 
2580 	iwmr->stag = stag;
2581 	iwmr->ibmr.rkey = stag;
2582 	iwmr->ibmr.lkey = stag;
2583 	iwmr->ibmr.pd = pd;
2584 	iwmr->ibmr.device = pd->device;
2585 	iwpbl = &iwmr->iwpbl;
2586 	iwpbl->iwmr = iwmr;
2587 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2588 	palloc = &iwpbl->pble_alloc;
2589 	iwmr->page_cnt = max_num_sg;
2590 	err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2591 				  true);
2592 	if (err_code)
2593 		goto err_get_pble;
2594 
2595 	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
2596 	if (err_code)
2597 		goto err_alloc_stag;
2598 
2599 	iwpbl->pbl_allocated = true;
2600 
2601 	return &iwmr->ibmr;
2602 err_alloc_stag:
2603 	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2604 err_get_pble:
2605 	irdma_free_stag(iwdev, stag);
2606 err:
2607 	kfree(iwmr);
2608 
2609 	return ERR_PTR(err_code);
2610 }
2611 
2612 /**
2613  * irdma_set_page - populate pbl list for fmr
2614  * @ibmr: ib mem to access iwarp mr pointer
2615  * @addr: page dma address fro pbl list
2616  */
2617 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
2618 {
2619 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2620 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2621 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2622 	u64 *pbl;
2623 
2624 	if (unlikely(iwmr->npages == iwmr->page_cnt))
2625 		return -ENOMEM;
2626 
2627 	pbl = palloc->level1.addr;
2628 	pbl[iwmr->npages++] = addr;
2629 
2630 	return 0;
2631 }
2632 
2633 /**
2634  * irdma_map_mr_sg - map of sg list for fmr
2635  * @ibmr: ib mem to access iwarp mr pointer
2636  * @sg: scatter gather list
2637  * @sg_nents: number of sg pages
2638  * @sg_offset: scatter gather list for fmr
2639  */
2640 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
2641 			   int sg_nents, unsigned int *sg_offset)
2642 {
2643 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2644 
2645 	iwmr->npages = 0;
2646 
2647 	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
2648 }
2649 
2650 /**
2651  * irdma_hwreg_mr - send cqp command for memory registration
2652  * @iwdev: irdma device
2653  * @iwmr: irdma mr pointer
2654  * @access: access for MR
2655  */
2656 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
2657 			  u16 access)
2658 {
2659 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2660 	struct irdma_reg_ns_stag_info *stag_info;
2661 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2662 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2663 	struct irdma_cqp_request *cqp_request;
2664 	struct cqp_cmds_info *cqp_info;
2665 	int ret;
2666 
2667 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2668 	if (!cqp_request)
2669 		return -ENOMEM;
2670 
2671 	cqp_info = &cqp_request->info;
2672 	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
2673 	memset(stag_info, 0, sizeof(*stag_info));
2674 	stag_info->va = iwpbl->user_base;
2675 	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2676 	stag_info->stag_key = (u8)iwmr->stag;
2677 	stag_info->total_len = iwmr->len;
2678 	stag_info->access_rights = irdma_get_mr_access(access);
2679 	stag_info->pd_id = iwpd->sc_pd.pd_id;
2680 	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
2681 		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
2682 	else
2683 		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
2684 	stag_info->page_size = iwmr->page_size;
2685 
2686 	if (iwpbl->pbl_allocated) {
2687 		if (palloc->level == PBLE_LEVEL_1) {
2688 			stag_info->first_pm_pbl_index = palloc->level1.idx;
2689 			stag_info->chunk_size = 1;
2690 		} else {
2691 			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
2692 			stag_info->chunk_size = 3;
2693 		}
2694 	} else {
2695 		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
2696 	}
2697 
2698 	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
2699 	cqp_info->post_sq = 1;
2700 	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
2701 	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2702 	ret = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2703 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2704 
2705 	return ret;
2706 }
2707 
2708 /**
2709  * irdma_reg_user_mr - Register a user memory region
2710  * @pd: ptr of pd
2711  * @start: virtual start address
2712  * @len: length of mr
2713  * @virt: virtual address
2714  * @access: access of mr
2715  * @udata: user data
2716  */
2717 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
2718 				       u64 virt, int access,
2719 				       struct ib_udata *udata)
2720 {
2721 	struct irdma_device *iwdev = to_iwdev(pd->device);
2722 	struct irdma_ucontext *ucontext;
2723 	struct irdma_pble_alloc *palloc;
2724 	struct irdma_pbl *iwpbl;
2725 	struct irdma_mr *iwmr;
2726 	struct ib_umem *region;
2727 	struct irdma_mem_reg_req req;
2728 	u32 total, stag = 0;
2729 	u8 shadow_pgcnt = 1;
2730 	bool use_pbles = false;
2731 	unsigned long flags;
2732 	int err = -EINVAL;
2733 	int ret;
2734 
2735 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2736 		return ERR_PTR(-EINVAL);
2737 
2738 	region = ib_umem_get(pd->device, start, len, access);
2739 
2740 	if (IS_ERR(region)) {
2741 		ibdev_dbg(&iwdev->ibdev,
2742 			  "VERBS: Failed to create ib_umem region\n");
2743 		return (struct ib_mr *)region;
2744 	}
2745 
2746 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
2747 		ib_umem_release(region);
2748 		return ERR_PTR(-EFAULT);
2749 	}
2750 
2751 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2752 	if (!iwmr) {
2753 		ib_umem_release(region);
2754 		return ERR_PTR(-ENOMEM);
2755 	}
2756 
2757 	iwpbl = &iwmr->iwpbl;
2758 	iwpbl->iwmr = iwmr;
2759 	iwmr->region = region;
2760 	iwmr->ibmr.pd = pd;
2761 	iwmr->ibmr.device = pd->device;
2762 	iwmr->ibmr.iova = virt;
2763 	iwmr->page_size = PAGE_SIZE;
2764 
2765 	if (req.reg_type == IRDMA_MEMREG_TYPE_MEM) {
2766 		iwmr->page_size = ib_umem_find_best_pgsz(region,
2767 							 SZ_4K | SZ_2M | SZ_1G,
2768 							 virt);
2769 		if (unlikely(!iwmr->page_size)) {
2770 			kfree(iwmr);
2771 			ib_umem_release(region);
2772 			return ERR_PTR(-EOPNOTSUPP);
2773 		}
2774 	}
2775 	iwmr->len = region->length;
2776 	iwpbl->user_base = virt;
2777 	palloc = &iwpbl->pble_alloc;
2778 	iwmr->type = req.reg_type;
2779 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
2780 
2781 	switch (req.reg_type) {
2782 	case IRDMA_MEMREG_TYPE_QP:
2783 		total = req.sq_pages + req.rq_pages + shadow_pgcnt;
2784 		if (total > iwmr->page_cnt) {
2785 			err = -EINVAL;
2786 			goto error;
2787 		}
2788 		total = req.sq_pages + req.rq_pages;
2789 		use_pbles = (total > 2);
2790 		err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2791 		if (err)
2792 			goto error;
2793 
2794 		ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2795 						     ibucontext);
2796 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2797 		list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
2798 		iwpbl->on_list = true;
2799 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2800 		break;
2801 	case IRDMA_MEMREG_TYPE_CQ:
2802 		if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
2803 			shadow_pgcnt = 0;
2804 		total = req.cq_pages + shadow_pgcnt;
2805 		if (total > iwmr->page_cnt) {
2806 			err = -EINVAL;
2807 			goto error;
2808 		}
2809 
2810 		use_pbles = (req.cq_pages > 1);
2811 		err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2812 		if (err)
2813 			goto error;
2814 
2815 		ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2816 						     ibucontext);
2817 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2818 		list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
2819 		iwpbl->on_list = true;
2820 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2821 		break;
2822 	case IRDMA_MEMREG_TYPE_MEM:
2823 		use_pbles = (iwmr->page_cnt != 1);
2824 
2825 		err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles);
2826 		if (err)
2827 			goto error;
2828 
2829 		if (use_pbles) {
2830 			ret = irdma_check_mr_contiguous(palloc,
2831 							iwmr->page_size);
2832 			if (ret) {
2833 				irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2834 				iwpbl->pbl_allocated = false;
2835 			}
2836 		}
2837 
2838 		stag = irdma_create_stag(iwdev);
2839 		if (!stag) {
2840 			err = -ENOMEM;
2841 			goto error;
2842 		}
2843 
2844 		iwmr->stag = stag;
2845 		iwmr->ibmr.rkey = stag;
2846 		iwmr->ibmr.lkey = stag;
2847 		err = irdma_hwreg_mr(iwdev, iwmr, access);
2848 		if (err) {
2849 			irdma_free_stag(iwdev, stag);
2850 			goto error;
2851 		}
2852 
2853 		break;
2854 	default:
2855 		goto error;
2856 	}
2857 
2858 	iwmr->type = req.reg_type;
2859 
2860 	return &iwmr->ibmr;
2861 
2862 error:
2863 	if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
2864 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2865 	ib_umem_release(region);
2866 	kfree(iwmr);
2867 
2868 	return ERR_PTR(err);
2869 }
2870 
2871 /**
2872  * irdma_reg_phys_mr - register kernel physical memory
2873  * @pd: ibpd pointer
2874  * @addr: physical address of memory to register
2875  * @size: size of memory to register
2876  * @access: Access rights
2877  * @iova_start: start of virtual address for physical buffers
2878  */
2879 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
2880 				u64 *iova_start)
2881 {
2882 	struct irdma_device *iwdev = to_iwdev(pd->device);
2883 	struct irdma_pbl *iwpbl;
2884 	struct irdma_mr *iwmr;
2885 	u32 stag;
2886 	int ret;
2887 
2888 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2889 	if (!iwmr)
2890 		return ERR_PTR(-ENOMEM);
2891 
2892 	iwmr->ibmr.pd = pd;
2893 	iwmr->ibmr.device = pd->device;
2894 	iwpbl = &iwmr->iwpbl;
2895 	iwpbl->iwmr = iwmr;
2896 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2897 	iwpbl->user_base = *iova_start;
2898 	stag = irdma_create_stag(iwdev);
2899 	if (!stag) {
2900 		ret = -ENOMEM;
2901 		goto err;
2902 	}
2903 
2904 	iwmr->stag = stag;
2905 	iwmr->ibmr.iova = *iova_start;
2906 	iwmr->ibmr.rkey = stag;
2907 	iwmr->ibmr.lkey = stag;
2908 	iwmr->page_cnt = 1;
2909 	iwmr->pgaddrmem[0] = addr;
2910 	iwmr->len = size;
2911 	iwmr->page_size = SZ_4K;
2912 	ret = irdma_hwreg_mr(iwdev, iwmr, access);
2913 	if (ret) {
2914 		irdma_free_stag(iwdev, stag);
2915 		goto err;
2916 	}
2917 
2918 	return &iwmr->ibmr;
2919 
2920 err:
2921 	kfree(iwmr);
2922 
2923 	return ERR_PTR(ret);
2924 }
2925 
2926 /**
2927  * irdma_get_dma_mr - register physical mem
2928  * @pd: ptr of pd
2929  * @acc: access for memory
2930  */
2931 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
2932 {
2933 	u64 kva = 0;
2934 
2935 	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
2936 }
2937 
2938 /**
2939  * irdma_del_memlist - Deleting pbl list entries for CQ/QP
2940  * @iwmr: iwmr for IB's user page addresses
2941  * @ucontext: ptr to user context
2942  */
2943 static void irdma_del_memlist(struct irdma_mr *iwmr,
2944 			      struct irdma_ucontext *ucontext)
2945 {
2946 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2947 	unsigned long flags;
2948 
2949 	switch (iwmr->type) {
2950 	case IRDMA_MEMREG_TYPE_CQ:
2951 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2952 		if (iwpbl->on_list) {
2953 			iwpbl->on_list = false;
2954 			list_del(&iwpbl->list);
2955 		}
2956 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2957 		break;
2958 	case IRDMA_MEMREG_TYPE_QP:
2959 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2960 		if (iwpbl->on_list) {
2961 			iwpbl->on_list = false;
2962 			list_del(&iwpbl->list);
2963 		}
2964 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2965 		break;
2966 	default:
2967 		break;
2968 	}
2969 }
2970 
2971 /**
2972  * irdma_dereg_mr - deregister mr
2973  * @ib_mr: mr ptr for dereg
2974  * @udata: user data
2975  */
2976 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
2977 {
2978 	struct ib_pd *ibpd = ib_mr->pd;
2979 	struct irdma_pd *iwpd = to_iwpd(ibpd);
2980 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
2981 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
2982 	struct irdma_dealloc_stag_info *info;
2983 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2984 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2985 	struct irdma_cqp_request *cqp_request;
2986 	struct cqp_cmds_info *cqp_info;
2987 
2988 	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
2989 		if (iwmr->region) {
2990 			struct irdma_ucontext *ucontext;
2991 
2992 			ucontext = rdma_udata_to_drv_context(udata,
2993 						struct irdma_ucontext,
2994 						ibucontext);
2995 			irdma_del_memlist(iwmr, ucontext);
2996 		}
2997 		goto done;
2998 	}
2999 
3000 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3001 	if (!cqp_request)
3002 		return -ENOMEM;
3003 
3004 	cqp_info = &cqp_request->info;
3005 	info = &cqp_info->in.u.dealloc_stag.info;
3006 	memset(info, 0, sizeof(*info));
3007 	info->pd_id = iwpd->sc_pd.pd_id;
3008 	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3009 	info->mr = true;
3010 	if (iwpbl->pbl_allocated)
3011 		info->dealloc_pbl = true;
3012 
3013 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3014 	cqp_info->post_sq = 1;
3015 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3016 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3017 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
3018 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3019 	irdma_free_stag(iwdev, iwmr->stag);
3020 done:
3021 	if (iwpbl->pbl_allocated)
3022 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3023 	ib_umem_release(iwmr->region);
3024 	kfree(iwmr);
3025 
3026 	return 0;
3027 }
3028 
3029 /**
3030  * irdma_post_send -  kernel application wr
3031  * @ibqp: qp ptr for wr
3032  * @ib_wr: work request ptr
3033  * @bad_wr: return of bad wr if err
3034  */
3035 static int irdma_post_send(struct ib_qp *ibqp,
3036 			   const struct ib_send_wr *ib_wr,
3037 			   const struct ib_send_wr **bad_wr)
3038 {
3039 	struct irdma_qp *iwqp;
3040 	struct irdma_qp_uk *ukqp;
3041 	struct irdma_sc_dev *dev;
3042 	struct irdma_post_sq_info info;
3043 	int err = 0;
3044 	unsigned long flags;
3045 	bool inv_stag;
3046 	struct irdma_ah *ah;
3047 	bool reflush = false;
3048 
3049 	iwqp = to_iwqp(ibqp);
3050 	ukqp = &iwqp->sc_qp.qp_uk;
3051 	dev = &iwqp->iwdev->rf->sc_dev;
3052 
3053 	spin_lock_irqsave(&iwqp->lock, flags);
3054 	if (iwqp->flush_issued && ukqp->sq_flush_complete)
3055 		reflush = true;
3056 	while (ib_wr) {
3057 		memset(&info, 0, sizeof(info));
3058 		inv_stag = false;
3059 		info.wr_id = (ib_wr->wr_id);
3060 		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3061 			info.signaled = true;
3062 		if (ib_wr->send_flags & IB_SEND_FENCE)
3063 			info.read_fence = true;
3064 		switch (ib_wr->opcode) {
3065 		case IB_WR_SEND_WITH_IMM:
3066 			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
3067 				info.imm_data_valid = true;
3068 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3069 			} else {
3070 				err = -EINVAL;
3071 				break;
3072 			}
3073 			fallthrough;
3074 		case IB_WR_SEND:
3075 		case IB_WR_SEND_WITH_INV:
3076 			if (ib_wr->opcode == IB_WR_SEND ||
3077 			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
3078 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3079 					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
3080 				else
3081 					info.op_type = IRDMA_OP_TYPE_SEND;
3082 			} else {
3083 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3084 					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
3085 				else
3086 					info.op_type = IRDMA_OP_TYPE_SEND_INV;
3087 				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
3088 			}
3089 
3090 			if (ib_wr->send_flags & IB_SEND_INLINE) {
3091 				info.op.inline_send.data = (void *)(unsigned long)
3092 							   ib_wr->sg_list[0].addr;
3093 				info.op.inline_send.len = ib_wr->sg_list[0].length;
3094 				if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3095 				    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3096 					ah = to_iwah(ud_wr(ib_wr)->ah);
3097 					info.op.inline_send.ah_id = ah->sc_ah.ah_info.ah_idx;
3098 					info.op.inline_send.qkey = ud_wr(ib_wr)->remote_qkey;
3099 					info.op.inline_send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3100 				}
3101 				err = irdma_uk_inline_send(ukqp, &info, false);
3102 			} else {
3103 				info.op.send.num_sges = ib_wr->num_sge;
3104 				info.op.send.sg_list = ib_wr->sg_list;
3105 				if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3106 				    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3107 					ah = to_iwah(ud_wr(ib_wr)->ah);
3108 					info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
3109 					info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
3110 					info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3111 				}
3112 				err = irdma_uk_send(ukqp, &info, false);
3113 			}
3114 			break;
3115 		case IB_WR_RDMA_WRITE_WITH_IMM:
3116 			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
3117 				info.imm_data_valid = true;
3118 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3119 			} else {
3120 				err = -EINVAL;
3121 				break;
3122 			}
3123 			fallthrough;
3124 		case IB_WR_RDMA_WRITE:
3125 			if (ib_wr->send_flags & IB_SEND_SOLICITED)
3126 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
3127 			else
3128 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
3129 
3130 			if (ib_wr->send_flags & IB_SEND_INLINE) {
3131 				info.op.inline_rdma_write.data = (void *)(uintptr_t)ib_wr->sg_list[0].addr;
3132 				info.op.inline_rdma_write.len =
3133 						ib_wr->sg_list[0].length;
3134 				info.op.inline_rdma_write.rem_addr.addr =
3135 						rdma_wr(ib_wr)->remote_addr;
3136 				info.op.inline_rdma_write.rem_addr.lkey =
3137 						rdma_wr(ib_wr)->rkey;
3138 				err = irdma_uk_inline_rdma_write(ukqp, &info, false);
3139 			} else {
3140 				info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
3141 				info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
3142 				info.op.rdma_write.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
3143 				info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3144 				err = irdma_uk_rdma_write(ukqp, &info, false);
3145 			}
3146 			break;
3147 		case IB_WR_RDMA_READ_WITH_INV:
3148 			inv_stag = true;
3149 			fallthrough;
3150 		case IB_WR_RDMA_READ:
3151 			if (ib_wr->num_sge >
3152 			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
3153 				err = -EINVAL;
3154 				break;
3155 			}
3156 			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
3157 			info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
3158 			info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3159 			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
3160 			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3161 			err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3162 			break;
3163 		case IB_WR_LOCAL_INV:
3164 			info.op_type = IRDMA_OP_TYPE_INV_STAG;
3165 			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3166 			err = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3167 			break;
3168 		case IB_WR_REG_MR: {
3169 			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
3170 			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
3171 			struct irdma_fast_reg_stag_info stag_info = {};
3172 
3173 			stag_info.signaled = info.signaled;
3174 			stag_info.read_fence = info.read_fence;
3175 			stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access);
3176 			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
3177 			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
3178 			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
3179 			stag_info.wr_id = ib_wr->wr_id;
3180 			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3181 			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
3182 			stag_info.total_len = iwmr->ibmr.length;
3183 			stag_info.reg_addr_pa = *palloc->level1.addr;
3184 			stag_info.first_pm_pbl_index = palloc->level1.idx;
3185 			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
3186 			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
3187 				stag_info.chunk_size = 1;
3188 			err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3189 							true);
3190 			break;
3191 		}
3192 		default:
3193 			err = -EINVAL;
3194 			ibdev_dbg(&iwqp->iwdev->ibdev,
3195 				  "VERBS: upost_send bad opcode = 0x%x\n",
3196 				  ib_wr->opcode);
3197 			break;
3198 		}
3199 
3200 		if (err)
3201 			break;
3202 		ib_wr = ib_wr->next;
3203 	}
3204 
3205 	if (!iwqp->flush_issued && iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS) {
3206 		irdma_uk_qp_post_wr(ukqp);
3207 		spin_unlock_irqrestore(&iwqp->lock, flags);
3208 	} else if (reflush) {
3209 		ukqp->sq_flush_complete = false;
3210 		spin_unlock_irqrestore(&iwqp->lock, flags);
3211 		irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ | IRDMA_REFLUSH);
3212 	} else {
3213 		spin_unlock_irqrestore(&iwqp->lock, flags);
3214 	}
3215 	if (err)
3216 		*bad_wr = ib_wr;
3217 
3218 	return err;
3219 }
3220 
3221 /**
3222  * irdma_post_recv - post receive wr for kernel application
3223  * @ibqp: ib qp pointer
3224  * @ib_wr: work request for receive
3225  * @bad_wr: bad wr caused an error
3226  */
3227 static int irdma_post_recv(struct ib_qp *ibqp,
3228 			   const struct ib_recv_wr *ib_wr,
3229 			   const struct ib_recv_wr **bad_wr)
3230 {
3231 	struct irdma_qp *iwqp;
3232 	struct irdma_qp_uk *ukqp;
3233 	struct irdma_post_rq_info post_recv = {};
3234 	unsigned long flags;
3235 	int err = 0;
3236 	bool reflush = false;
3237 
3238 	iwqp = to_iwqp(ibqp);
3239 	ukqp = &iwqp->sc_qp.qp_uk;
3240 
3241 	spin_lock_irqsave(&iwqp->lock, flags);
3242 	if (iwqp->flush_issued && ukqp->rq_flush_complete)
3243 		reflush = true;
3244 	while (ib_wr) {
3245 		post_recv.num_sges = ib_wr->num_sge;
3246 		post_recv.wr_id = ib_wr->wr_id;
3247 		post_recv.sg_list = ib_wr->sg_list;
3248 		err = irdma_uk_post_receive(ukqp, &post_recv);
3249 		if (err) {
3250 			ibdev_dbg(&iwqp->iwdev->ibdev,
3251 				  "VERBS: post_recv err %d\n", err);
3252 			goto out;
3253 		}
3254 
3255 		ib_wr = ib_wr->next;
3256 	}
3257 
3258 out:
3259 	if (reflush) {
3260 		ukqp->rq_flush_complete = false;
3261 		spin_unlock_irqrestore(&iwqp->lock, flags);
3262 		irdma_flush_wqes(iwqp, IRDMA_FLUSH_RQ | IRDMA_REFLUSH);
3263 	} else {
3264 		spin_unlock_irqrestore(&iwqp->lock, flags);
3265 	}
3266 
3267 	if (err)
3268 		*bad_wr = ib_wr;
3269 
3270 	return err;
3271 }
3272 
3273 /**
3274  * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
3275  * @opcode: iwarp flush code
3276  */
3277 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
3278 {
3279 	switch (opcode) {
3280 	case FLUSH_PROT_ERR:
3281 		return IB_WC_LOC_PROT_ERR;
3282 	case FLUSH_REM_ACCESS_ERR:
3283 		return IB_WC_REM_ACCESS_ERR;
3284 	case FLUSH_LOC_QP_OP_ERR:
3285 		return IB_WC_LOC_QP_OP_ERR;
3286 	case FLUSH_REM_OP_ERR:
3287 		return IB_WC_REM_OP_ERR;
3288 	case FLUSH_LOC_LEN_ERR:
3289 		return IB_WC_LOC_LEN_ERR;
3290 	case FLUSH_GENERAL_ERR:
3291 		return IB_WC_WR_FLUSH_ERR;
3292 	case FLUSH_RETRY_EXC_ERR:
3293 		return IB_WC_RETRY_EXC_ERR;
3294 	case FLUSH_MW_BIND_ERR:
3295 		return IB_WC_MW_BIND_ERR;
3296 	case FLUSH_FATAL_ERR:
3297 	default:
3298 		return IB_WC_FATAL_ERR;
3299 	}
3300 }
3301 
3302 /**
3303  * irdma_process_cqe - process cqe info
3304  * @entry: processed cqe
3305  * @cq_poll_info: cqe info
3306  */
3307 static void irdma_process_cqe(struct ib_wc *entry,
3308 			      struct irdma_cq_poll_info *cq_poll_info)
3309 {
3310 	struct irdma_qp *iwqp;
3311 	struct irdma_sc_qp *qp;
3312 
3313 	entry->wc_flags = 0;
3314 	entry->pkey_index = 0;
3315 	entry->wr_id = cq_poll_info->wr_id;
3316 
3317 	qp = cq_poll_info->qp_handle;
3318 	iwqp = qp->qp_uk.back_qp;
3319 	entry->qp = qp->qp_uk.back_qp;
3320 
3321 	if (cq_poll_info->error) {
3322 		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
3323 				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
3324 
3325 		entry->vendor_err = cq_poll_info->major_err << 16 |
3326 				    cq_poll_info->minor_err;
3327 	} else {
3328 		entry->status = IB_WC_SUCCESS;
3329 		if (cq_poll_info->imm_valid) {
3330 			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
3331 			entry->wc_flags |= IB_WC_WITH_IMM;
3332 		}
3333 		if (cq_poll_info->ud_smac_valid) {
3334 			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
3335 			entry->wc_flags |= IB_WC_WITH_SMAC;
3336 		}
3337 
3338 		if (cq_poll_info->ud_vlan_valid) {
3339 			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
3340 
3341 			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
3342 			if (vlan) {
3343 				entry->vlan_id = vlan;
3344 				entry->wc_flags |= IB_WC_WITH_VLAN;
3345 			}
3346 		} else {
3347 			entry->sl = 0;
3348 		}
3349 	}
3350 
3351 	switch (cq_poll_info->op_type) {
3352 	case IRDMA_OP_TYPE_RDMA_WRITE:
3353 	case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
3354 		entry->opcode = IB_WC_RDMA_WRITE;
3355 		break;
3356 	case IRDMA_OP_TYPE_RDMA_READ_INV_STAG:
3357 	case IRDMA_OP_TYPE_RDMA_READ:
3358 		entry->opcode = IB_WC_RDMA_READ;
3359 		break;
3360 	case IRDMA_OP_TYPE_SEND_INV:
3361 	case IRDMA_OP_TYPE_SEND_SOL:
3362 	case IRDMA_OP_TYPE_SEND_SOL_INV:
3363 	case IRDMA_OP_TYPE_SEND:
3364 		entry->opcode = IB_WC_SEND;
3365 		break;
3366 	case IRDMA_OP_TYPE_FAST_REG_NSMR:
3367 		entry->opcode = IB_WC_REG_MR;
3368 		break;
3369 	case IRDMA_OP_TYPE_INV_STAG:
3370 		entry->opcode = IB_WC_LOCAL_INV;
3371 		break;
3372 	case IRDMA_OP_TYPE_REC_IMM:
3373 	case IRDMA_OP_TYPE_REC:
3374 		entry->opcode = cq_poll_info->op_type == IRDMA_OP_TYPE_REC_IMM ?
3375 			IB_WC_RECV_RDMA_WITH_IMM : IB_WC_RECV;
3376 		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3377 		    cq_poll_info->stag_invalid_set) {
3378 			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
3379 			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
3380 		}
3381 		break;
3382 	default:
3383 		ibdev_err(&iwqp->iwdev->ibdev,
3384 			  "Invalid opcode = %d in CQE\n", cq_poll_info->op_type);
3385 		entry->status = IB_WC_GENERAL_ERR;
3386 		return;
3387 	}
3388 
3389 	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
3390 		entry->src_qp = cq_poll_info->ud_src_qpn;
3391 		entry->slid = 0;
3392 		entry->wc_flags |=
3393 			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
3394 		entry->network_hdr_type = cq_poll_info->ipv4 ?
3395 						  RDMA_NETWORK_IPV4 :
3396 						  RDMA_NETWORK_IPV6;
3397 	} else {
3398 		entry->src_qp = cq_poll_info->qp_id;
3399 	}
3400 
3401 	entry->byte_len = cq_poll_info->bytes_xfered;
3402 }
3403 
3404 /**
3405  * irdma_poll_one - poll one entry of the CQ
3406  * @ukcq: ukcq to poll
3407  * @cur_cqe: current CQE info to be filled in
3408  * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
3409  *
3410  * Returns the internal irdma device error code or 0 on success
3411  */
3412 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
3413 				 struct irdma_cq_poll_info *cur_cqe,
3414 				 struct ib_wc *entry)
3415 {
3416 	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
3417 
3418 	if (ret)
3419 		return ret;
3420 
3421 	irdma_process_cqe(entry, cur_cqe);
3422 
3423 	return 0;
3424 }
3425 
3426 /**
3427  * __irdma_poll_cq - poll cq for completion (kernel apps)
3428  * @iwcq: cq to poll
3429  * @num_entries: number of entries to poll
3430  * @entry: wr of a completed entry
3431  */
3432 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
3433 {
3434 	struct list_head *tmp_node, *list_node;
3435 	struct irdma_cq_buf *last_buf = NULL;
3436 	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
3437 	struct irdma_cq_buf *cq_buf;
3438 	int ret;
3439 	struct irdma_device *iwdev;
3440 	struct irdma_cq_uk *ukcq;
3441 	bool cq_new_cqe = false;
3442 	int resized_bufs = 0;
3443 	int npolled = 0;
3444 
3445 	iwdev = to_iwdev(iwcq->ibcq.device);
3446 	ukcq = &iwcq->sc_cq.cq_uk;
3447 
3448 	/* go through the list of previously resized CQ buffers */
3449 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
3450 		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
3451 		while (npolled < num_entries) {
3452 			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
3453 			if (!ret) {
3454 				++npolled;
3455 				cq_new_cqe = true;
3456 				continue;
3457 			}
3458 			if (ret == -ENOENT)
3459 				break;
3460 			 /* QP using the CQ is destroyed. Skip reporting this CQE */
3461 			if (ret == -EFAULT) {
3462 				cq_new_cqe = true;
3463 				continue;
3464 			}
3465 			goto error;
3466 		}
3467 
3468 		/* save the resized CQ buffer which received the last cqe */
3469 		if (cq_new_cqe)
3470 			last_buf = cq_buf;
3471 		cq_new_cqe = false;
3472 	}
3473 
3474 	/* check the current CQ for new cqes */
3475 	while (npolled < num_entries) {
3476 		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
3477 		if (!ret) {
3478 			++npolled;
3479 			cq_new_cqe = true;
3480 			continue;
3481 		}
3482 
3483 		if (ret == -ENOENT)
3484 			break;
3485 		/* QP using the CQ is destroyed. Skip reporting this CQE */
3486 		if (ret == -EFAULT) {
3487 			cq_new_cqe = true;
3488 			continue;
3489 		}
3490 		goto error;
3491 	}
3492 
3493 	if (cq_new_cqe)
3494 		/* all previous CQ resizes are complete */
3495 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
3496 	else if (last_buf)
3497 		/* only CQ resizes up to the last_buf are complete */
3498 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
3499 	if (resized_bufs)
3500 		/* report to the HW the number of complete CQ resizes */
3501 		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
3502 
3503 	return npolled;
3504 error:
3505 	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
3506 		  __func__, ret);
3507 
3508 	return ret;
3509 }
3510 
3511 /**
3512  * irdma_poll_cq - poll cq for completion (kernel apps)
3513  * @ibcq: cq to poll
3514  * @num_entries: number of entries to poll
3515  * @entry: wr of a completed entry
3516  */
3517 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
3518 			 struct ib_wc *entry)
3519 {
3520 	struct irdma_cq *iwcq;
3521 	unsigned long flags;
3522 	int ret;
3523 
3524 	iwcq = to_iwcq(ibcq);
3525 
3526 	spin_lock_irqsave(&iwcq->lock, flags);
3527 	ret = __irdma_poll_cq(iwcq, num_entries, entry);
3528 	spin_unlock_irqrestore(&iwcq->lock, flags);
3529 
3530 	return ret;
3531 }
3532 
3533 /**
3534  * irdma_req_notify_cq - arm cq kernel application
3535  * @ibcq: cq to arm
3536  * @notify_flags: notofication flags
3537  */
3538 static int irdma_req_notify_cq(struct ib_cq *ibcq,
3539 			       enum ib_cq_notify_flags notify_flags)
3540 {
3541 	struct irdma_cq *iwcq;
3542 	struct irdma_cq_uk *ukcq;
3543 	unsigned long flags;
3544 	enum irdma_cmpl_notify cq_notify;
3545 	bool promo_event = false;
3546 	int ret = 0;
3547 
3548 	cq_notify = notify_flags == IB_CQ_SOLICITED ?
3549 		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
3550 	iwcq = to_iwcq(ibcq);
3551 	ukcq = &iwcq->sc_cq.cq_uk;
3552 
3553 	spin_lock_irqsave(&iwcq->lock, flags);
3554 	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
3555 	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
3556 		promo_event = true;
3557 
3558 	if (!iwcq->armed || promo_event) {
3559 		iwcq->armed = true;
3560 		iwcq->last_notify = cq_notify;
3561 		irdma_uk_cq_request_notification(ukcq, cq_notify);
3562 	}
3563 
3564 	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) && !irdma_cq_empty(iwcq))
3565 		ret = 1;
3566 	spin_unlock_irqrestore(&iwcq->lock, flags);
3567 
3568 	return ret;
3569 }
3570 
3571 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
3572 				     struct ib_port_immutable *immutable)
3573 {
3574 	struct ib_port_attr attr;
3575 	int err;
3576 
3577 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
3578 	err = ib_query_port(ibdev, port_num, &attr);
3579 	if (err)
3580 		return err;
3581 
3582 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
3583 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
3584 	immutable->gid_tbl_len = attr.gid_tbl_len;
3585 
3586 	return 0;
3587 }
3588 
3589 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
3590 				   struct ib_port_immutable *immutable)
3591 {
3592 	struct ib_port_attr attr;
3593 	int err;
3594 
3595 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
3596 	err = ib_query_port(ibdev, port_num, &attr);
3597 	if (err)
3598 		return err;
3599 	immutable->gid_tbl_len = attr.gid_tbl_len;
3600 
3601 	return 0;
3602 }
3603 
3604 static const struct rdma_stat_desc irdma_hw_stat_descs[] = {
3605 	/* 32bit names */
3606 	[IRDMA_HW_STAT_INDEX_RXVLANERR].name = "rxVlanErrors",
3607 	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name = "ip4InDiscards",
3608 	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name = "ip4InTruncatedPkts",
3609 	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name = "ip4OutNoRoutes",
3610 	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name = "ip6InDiscards",
3611 	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name = "ip6InTruncatedPkts",
3612 	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name = "ip6OutNoRoutes",
3613 	[IRDMA_HW_STAT_INDEX_TCPRTXSEG].name = "tcpRetransSegs",
3614 	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name = "tcpInOptErrors",
3615 	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name = "tcpInProtoErrors",
3616 	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name = "cnpHandled",
3617 	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name = "cnpIgnored",
3618 	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name = "cnpSent",
3619 
3620 	/* 64bit names */
3621 	[IRDMA_HW_STAT_INDEX_IP4RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3622 		"ip4InOctets",
3623 	[IRDMA_HW_STAT_INDEX_IP4RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3624 		"ip4InPkts",
3625 	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3626 		"ip4InReasmRqd",
3627 	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3628 		"ip4InMcastOctets",
3629 	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3630 		"ip4InMcastPkts",
3631 	[IRDMA_HW_STAT_INDEX_IP4TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3632 		"ip4OutOctets",
3633 	[IRDMA_HW_STAT_INDEX_IP4TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3634 		"ip4OutPkts",
3635 	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3636 		"ip4OutSegRqd",
3637 	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3638 		"ip4OutMcastOctets",
3639 	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3640 		"ip4OutMcastPkts",
3641 	[IRDMA_HW_STAT_INDEX_IP6RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3642 		"ip6InOctets",
3643 	[IRDMA_HW_STAT_INDEX_IP6RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3644 		"ip6InPkts",
3645 	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3646 		"ip6InReasmRqd",
3647 	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3648 		"ip6InMcastOctets",
3649 	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3650 		"ip6InMcastPkts",
3651 	[IRDMA_HW_STAT_INDEX_IP6TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3652 		"ip6OutOctets",
3653 	[IRDMA_HW_STAT_INDEX_IP6TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3654 		"ip6OutPkts",
3655 	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3656 		"ip6OutSegRqd",
3657 	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3658 		"ip6OutMcastOctets",
3659 	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3660 		"ip6OutMcastPkts",
3661 	[IRDMA_HW_STAT_INDEX_TCPRXSEGS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3662 		"tcpInSegs",
3663 	[IRDMA_HW_STAT_INDEX_TCPTXSEG + IRDMA_HW_STAT_INDEX_MAX_32].name =
3664 		"tcpOutSegs",
3665 	[IRDMA_HW_STAT_INDEX_RDMARXRDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3666 		"iwInRdmaReads",
3667 	[IRDMA_HW_STAT_INDEX_RDMARXSNDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3668 		"iwInRdmaSends",
3669 	[IRDMA_HW_STAT_INDEX_RDMARXWRS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3670 		"iwInRdmaWrites",
3671 	[IRDMA_HW_STAT_INDEX_RDMATXRDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3672 		"iwOutRdmaReads",
3673 	[IRDMA_HW_STAT_INDEX_RDMATXSNDS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3674 		"iwOutRdmaSends",
3675 	[IRDMA_HW_STAT_INDEX_RDMATXWRS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3676 		"iwOutRdmaWrites",
3677 	[IRDMA_HW_STAT_INDEX_RDMAVBND + IRDMA_HW_STAT_INDEX_MAX_32].name =
3678 		"iwRdmaBnd",
3679 	[IRDMA_HW_STAT_INDEX_RDMAVINV + IRDMA_HW_STAT_INDEX_MAX_32].name =
3680 		"iwRdmaInv",
3681 	[IRDMA_HW_STAT_INDEX_UDPRXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3682 		"RxUDP",
3683 	[IRDMA_HW_STAT_INDEX_UDPTXPKTS + IRDMA_HW_STAT_INDEX_MAX_32].name =
3684 		"TxUDP",
3685 	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS + IRDMA_HW_STAT_INDEX_MAX_32]
3686 		.name = "RxECNMrkd",
3687 };
3688 
3689 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
3690 {
3691 	struct irdma_device *iwdev = to_iwdev(dev);
3692 
3693 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
3694 		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
3695 		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
3696 }
3697 
3698 /**
3699  * irdma_alloc_hw_port_stats - Allocate a hw stats structure
3700  * @ibdev: device pointer from stack
3701  * @port_num: port number
3702  */
3703 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
3704 						       u32 port_num)
3705 {
3706 	int num_counters = IRDMA_HW_STAT_INDEX_MAX_32 +
3707 			   IRDMA_HW_STAT_INDEX_MAX_64;
3708 	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
3709 
3710 	BUILD_BUG_ON(ARRAY_SIZE(irdma_hw_stat_descs) !=
3711 		     (IRDMA_HW_STAT_INDEX_MAX_32 + IRDMA_HW_STAT_INDEX_MAX_64));
3712 
3713 	return rdma_alloc_hw_stats_struct(irdma_hw_stat_descs, num_counters,
3714 					  lifespan);
3715 }
3716 
3717 /**
3718  * irdma_get_hw_stats - Populates the rdma_hw_stats structure
3719  * @ibdev: device pointer from stack
3720  * @stats: stats pointer from stack
3721  * @port_num: port number
3722  * @index: which hw counter the stack is requesting we update
3723  */
3724 static int irdma_get_hw_stats(struct ib_device *ibdev,
3725 			      struct rdma_hw_stats *stats, u32 port_num,
3726 			      int index)
3727 {
3728 	struct irdma_device *iwdev = to_iwdev(ibdev);
3729 	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
3730 
3731 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
3732 		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
3733 	else
3734 		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
3735 
3736 	memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
3737 
3738 	return stats->num_counters;
3739 }
3740 
3741 /**
3742  * irdma_query_gid - Query port GID
3743  * @ibdev: device pointer from stack
3744  * @port: port number
3745  * @index: Entry index
3746  * @gid: Global ID
3747  */
3748 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
3749 			   union ib_gid *gid)
3750 {
3751 	struct irdma_device *iwdev = to_iwdev(ibdev);
3752 
3753 	memset(gid->raw, 0, sizeof(gid->raw));
3754 	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
3755 
3756 	return 0;
3757 }
3758 
3759 /**
3760  * mcast_list_add -  Add a new mcast item to list
3761  * @rf: RDMA PCI function
3762  * @new_elem: pointer to element to add
3763  */
3764 static void mcast_list_add(struct irdma_pci_f *rf,
3765 			   struct mc_table_list *new_elem)
3766 {
3767 	list_add(&new_elem->list, &rf->mc_qht_list.list);
3768 }
3769 
3770 /**
3771  * mcast_list_del - Remove an mcast item from list
3772  * @mc_qht_elem: pointer to mcast table list element
3773  */
3774 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
3775 {
3776 	if (mc_qht_elem)
3777 		list_del(&mc_qht_elem->list);
3778 }
3779 
3780 /**
3781  * mcast_list_lookup_ip - Search mcast list for address
3782  * @rf: RDMA PCI function
3783  * @ip_mcast: pointer to mcast IP address
3784  */
3785 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
3786 						  u32 *ip_mcast)
3787 {
3788 	struct mc_table_list *mc_qht_el;
3789 	struct list_head *pos, *q;
3790 
3791 	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
3792 		mc_qht_el = list_entry(pos, struct mc_table_list, list);
3793 		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
3794 			    sizeof(mc_qht_el->mc_info.dest_ip)))
3795 			return mc_qht_el;
3796 	}
3797 
3798 	return NULL;
3799 }
3800 
3801 /**
3802  * irdma_mcast_cqp_op - perform a mcast cqp operation
3803  * @iwdev: irdma device
3804  * @mc_grp_ctx: mcast group info
3805  * @op: operation
3806  *
3807  * returns error status
3808  */
3809 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
3810 			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
3811 {
3812 	struct cqp_cmds_info *cqp_info;
3813 	struct irdma_cqp_request *cqp_request;
3814 	int status;
3815 
3816 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3817 	if (!cqp_request)
3818 		return -ENOMEM;
3819 
3820 	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
3821 	cqp_info = &cqp_request->info;
3822 	cqp_info->cqp_cmd = op;
3823 	cqp_info->post_sq = 1;
3824 	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
3825 	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
3826 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3827 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3828 
3829 	return status;
3830 }
3831 
3832 /**
3833  * irdma_mcast_mac - Get the multicast MAC for an IP address
3834  * @ip_addr: IPv4 or IPv6 address
3835  * @mac: pointer to result MAC address
3836  * @ipv4: flag indicating IPv4 or IPv6
3837  *
3838  */
3839 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
3840 {
3841 	u8 *ip = (u8 *)ip_addr;
3842 
3843 	if (ipv4) {
3844 		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
3845 						0x00, 0x00};
3846 
3847 		mac4[3] = ip[2] & 0x7F;
3848 		mac4[4] = ip[1];
3849 		mac4[5] = ip[0];
3850 		ether_addr_copy(mac, mac4);
3851 	} else {
3852 		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
3853 						0x00, 0x00};
3854 
3855 		mac6[2] = ip[3];
3856 		mac6[3] = ip[2];
3857 		mac6[4] = ip[1];
3858 		mac6[5] = ip[0];
3859 		ether_addr_copy(mac, mac6);
3860 	}
3861 }
3862 
3863 /**
3864  * irdma_attach_mcast - attach a qp to a multicast group
3865  * @ibqp: ptr to qp
3866  * @ibgid: pointer to global ID
3867  * @lid: local ID
3868  *
3869  * returns error status
3870  */
3871 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
3872 {
3873 	struct irdma_qp *iwqp = to_iwqp(ibqp);
3874 	struct irdma_device *iwdev = iwqp->iwdev;
3875 	struct irdma_pci_f *rf = iwdev->rf;
3876 	struct mc_table_list *mc_qht_elem;
3877 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
3878 	unsigned long flags;
3879 	u32 ip_addr[4] = {};
3880 	u32 mgn;
3881 	u32 no_mgs;
3882 	int ret = 0;
3883 	bool ipv4;
3884 	u16 vlan_id;
3885 	union irdma_sockaddr sgid_addr;
3886 	unsigned char dmac[ETH_ALEN];
3887 
3888 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
3889 
3890 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
3891 		irdma_copy_ip_ntohl(ip_addr,
3892 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
3893 		irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL);
3894 		ipv4 = false;
3895 		ibdev_dbg(&iwdev->ibdev,
3896 			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
3897 			  ip_addr);
3898 		irdma_mcast_mac(ip_addr, dmac, false);
3899 	} else {
3900 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
3901 		ipv4 = true;
3902 		vlan_id = irdma_get_vlan_ipv4(ip_addr);
3903 		irdma_mcast_mac(ip_addr, dmac, true);
3904 		ibdev_dbg(&iwdev->ibdev,
3905 			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
3906 			  ibqp->qp_num, ip_addr, dmac);
3907 	}
3908 
3909 	spin_lock_irqsave(&rf->qh_list_lock, flags);
3910 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
3911 	if (!mc_qht_elem) {
3912 		struct irdma_dma_mem *dma_mem_mc;
3913 
3914 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3915 		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
3916 		if (!mc_qht_elem)
3917 			return -ENOMEM;
3918 
3919 		mc_qht_elem->mc_info.ipv4_valid = ipv4;
3920 		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
3921 		       sizeof(mc_qht_elem->mc_info.dest_ip));
3922 		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
3923 				       &mgn, &rf->next_mcg);
3924 		if (ret) {
3925 			kfree(mc_qht_elem);
3926 			return -ENOMEM;
3927 		}
3928 
3929 		mc_qht_elem->mc_info.mgn = mgn;
3930 		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
3931 		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
3932 					 IRDMA_HW_PAGE_SIZE);
3933 		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
3934 						    dma_mem_mc->size,
3935 						    &dma_mem_mc->pa,
3936 						    GFP_KERNEL);
3937 		if (!dma_mem_mc->va) {
3938 			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
3939 			kfree(mc_qht_elem);
3940 			return -ENOMEM;
3941 		}
3942 
3943 		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
3944 		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
3945 		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
3946 		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
3947 		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
3948 		if (vlan_id < VLAN_N_VID)
3949 			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
3950 		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->vsi.fcn_id;
3951 		mc_qht_elem->mc_grp_ctx.qs_handle =
3952 			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
3953 		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
3954 
3955 		spin_lock_irqsave(&rf->qh_list_lock, flags);
3956 		mcast_list_add(rf, mc_qht_elem);
3957 	} else {
3958 		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
3959 		    IRDMA_MAX_MGS_PER_CTX) {
3960 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3961 			return -ENOMEM;
3962 		}
3963 	}
3964 
3965 	mcg_info.qp_id = iwqp->ibqp.qp_num;
3966 	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
3967 	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
3968 	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3969 
3970 	/* Only if there is a change do we need to modify or create */
3971 	if (!no_mgs) {
3972 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
3973 					 IRDMA_OP_MC_CREATE);
3974 	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
3975 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
3976 					 IRDMA_OP_MC_MODIFY);
3977 	} else {
3978 		return 0;
3979 	}
3980 
3981 	if (ret)
3982 		goto error;
3983 
3984 	return 0;
3985 
3986 error:
3987 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
3988 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
3989 		mcast_list_del(mc_qht_elem);
3990 		dma_free_coherent(rf->hw.device,
3991 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
3992 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
3993 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
3994 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
3995 		irdma_free_rsrc(rf, rf->allocated_mcgs,
3996 				mc_qht_elem->mc_grp_ctx.mg_id);
3997 		kfree(mc_qht_elem);
3998 	}
3999 
4000 	return ret;
4001 }
4002 
4003 /**
4004  * irdma_detach_mcast - detach a qp from a multicast group
4005  * @ibqp: ptr to qp
4006  * @ibgid: pointer to global ID
4007  * @lid: local ID
4008  *
4009  * returns error status
4010  */
4011 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4012 {
4013 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4014 	struct irdma_device *iwdev = iwqp->iwdev;
4015 	struct irdma_pci_f *rf = iwdev->rf;
4016 	u32 ip_addr[4] = {};
4017 	struct mc_table_list *mc_qht_elem;
4018 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4019 	int ret;
4020 	unsigned long flags;
4021 	union irdma_sockaddr sgid_addr;
4022 
4023 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4024 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4025 		irdma_copy_ip_ntohl(ip_addr,
4026 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4027 	else
4028 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4029 
4030 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4031 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4032 	if (!mc_qht_elem) {
4033 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4034 		ibdev_dbg(&iwdev->ibdev,
4035 			  "VERBS: address not found MCG\n");
4036 		return 0;
4037 	}
4038 
4039 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4040 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4041 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4042 		mcast_list_del(mc_qht_elem);
4043 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4044 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4045 					 IRDMA_OP_MC_DESTROY);
4046 		if (ret) {
4047 			ibdev_dbg(&iwdev->ibdev,
4048 				  "VERBS: failed MC_DESTROY MCG\n");
4049 			spin_lock_irqsave(&rf->qh_list_lock, flags);
4050 			mcast_list_add(rf, mc_qht_elem);
4051 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4052 			return -EAGAIN;
4053 		}
4054 
4055 		dma_free_coherent(rf->hw.device,
4056 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4057 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4058 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4059 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4060 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4061 				mc_qht_elem->mc_grp_ctx.mg_id);
4062 		kfree(mc_qht_elem);
4063 	} else {
4064 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4065 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4066 					 IRDMA_OP_MC_MODIFY);
4067 		if (ret) {
4068 			ibdev_dbg(&iwdev->ibdev,
4069 				  "VERBS: failed Modify MCG\n");
4070 			return ret;
4071 		}
4072 	}
4073 
4074 	return 0;
4075 }
4076 
4077 static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep)
4078 {
4079 	struct irdma_pci_f *rf = iwdev->rf;
4080 	int err;
4081 
4082 	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx,
4083 			       &rf->next_ah);
4084 	if (err)
4085 		return err;
4086 
4087 	err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep,
4088 			      irdma_gsi_ud_qp_ah_cb, &ah->sc_ah);
4089 
4090 	if (err) {
4091 		ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail");
4092 		goto err_ah_create;
4093 	}
4094 
4095 	if (!sleep) {
4096 		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4097 
4098 		do {
4099 			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4100 			mdelay(1);
4101 		} while (!ah->sc_ah.ah_info.ah_valid && --cnt);
4102 
4103 		if (!cnt) {
4104 			ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out");
4105 			err = -ETIMEDOUT;
4106 			goto err_ah_create;
4107 		}
4108 	}
4109 	return 0;
4110 
4111 err_ah_create:
4112 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx);
4113 
4114 	return err;
4115 }
4116 
4117 static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr)
4118 {
4119 	struct irdma_pd *pd = to_iwpd(ibah->pd);
4120 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4121 	struct rdma_ah_attr *ah_attr = attr->ah_attr;
4122 	const struct ib_gid_attr *sgid_attr;
4123 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4124 	struct irdma_pci_f *rf = iwdev->rf;
4125 	struct irdma_sc_ah *sc_ah;
4126 	struct irdma_ah_info *ah_info;
4127 	union irdma_sockaddr sgid_addr, dgid_addr;
4128 	int err;
4129 	u8 dmac[ETH_ALEN];
4130 
4131 	ah->pd = pd;
4132 	sc_ah = &ah->sc_ah;
4133 	sc_ah->ah_info.vsi = &iwdev->vsi;
4134 	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
4135 	ah->sgid_index = ah_attr->grh.sgid_index;
4136 	sgid_attr = ah_attr->grh.sgid_attr;
4137 	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
4138 	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
4139 	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
4140 	ah->av.attrs = *ah_attr;
4141 	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4142 	ah_info = &sc_ah->ah_info;
4143 	ah_info->pd_idx = pd->sc_pd.pd_id;
4144 	if (ah_attr->ah_flags & IB_AH_GRH) {
4145 		ah_info->flow_label = ah_attr->grh.flow_label;
4146 		ah_info->hop_ttl = ah_attr->grh.hop_limit;
4147 		ah_info->tc_tos = ah_attr->grh.traffic_class;
4148 	}
4149 
4150 	ether_addr_copy(dmac, ah_attr->roce.dmac);
4151 	if (ah->av.net_type == RDMA_NETWORK_IPV4) {
4152 		ah_info->ipv4_valid = true;
4153 		ah_info->dest_ip_addr[0] =
4154 			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
4155 		ah_info->src_ip_addr[0] =
4156 			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4157 		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
4158 						     ah_info->dest_ip_addr[0]);
4159 		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
4160 			ah_info->do_lpbk = true;
4161 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
4162 		}
4163 	} else {
4164 		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
4165 				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4166 		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
4167 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4168 		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
4169 						     ah_info->dest_ip_addr);
4170 		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
4171 			ah_info->do_lpbk = true;
4172 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
4173 		}
4174 	}
4175 
4176 	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
4177 				      ah_info->mac_addr);
4178 	if (err)
4179 		return err;
4180 
4181 	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
4182 					      ah_info->ipv4_valid, dmac);
4183 
4184 	if (ah_info->dst_arpindex == -1)
4185 		return -EINVAL;
4186 
4187 	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode)
4188 		ah_info->vlan_tag = 0;
4189 
4190 	if (ah_info->vlan_tag < VLAN_N_VID) {
4191 		ah_info->insert_vlan_tag = true;
4192 		ah_info->vlan_tag |=
4193 			rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
4194 	}
4195 
4196 	return 0;
4197 }
4198 
4199 /**
4200  * irdma_ah_exists - Check for existing identical AH
4201  * @iwdev: irdma device
4202  * @new_ah: AH to check for
4203  *
4204  * returns true if AH is found, false if not found.
4205  */
4206 static bool irdma_ah_exists(struct irdma_device *iwdev,
4207 			    struct irdma_ah *new_ah)
4208 {
4209 	struct irdma_ah *ah;
4210 	u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^
4211 		  new_ah->sc_ah.ah_info.dest_ip_addr[1] ^
4212 		  new_ah->sc_ah.ah_info.dest_ip_addr[2] ^
4213 		  new_ah->sc_ah.ah_info.dest_ip_addr[3];
4214 
4215 	hash_for_each_possible(iwdev->ah_hash_tbl, ah, list, key) {
4216 		/* Set ah_valid and ah_id the same so memcmp can work */
4217 		new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx;
4218 		new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid;
4219 		if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info,
4220 			    sizeof(ah->sc_ah.ah_info))) {
4221 			refcount_inc(&ah->refcnt);
4222 			new_ah->parent_ah = ah;
4223 			return true;
4224 		}
4225 	}
4226 
4227 	return false;
4228 }
4229 
4230 /**
4231  * irdma_destroy_ah - Destroy address handle
4232  * @ibah: pointer to address handle
4233  * @ah_flags: flags for sleepable
4234  */
4235 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
4236 {
4237 	struct irdma_device *iwdev = to_iwdev(ibah->device);
4238 	struct irdma_ah *ah = to_iwah(ibah);
4239 
4240 	if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) {
4241 		mutex_lock(&iwdev->ah_tbl_lock);
4242 		if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) {
4243 			mutex_unlock(&iwdev->ah_tbl_lock);
4244 			return 0;
4245 		}
4246 		hash_del(&ah->parent_ah->list);
4247 		kfree(ah->parent_ah);
4248 		mutex_unlock(&iwdev->ah_tbl_lock);
4249 	}
4250 
4251 	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
4252 			false, NULL, ah);
4253 
4254 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
4255 			ah->sc_ah.ah_info.ah_idx);
4256 
4257 	return 0;
4258 }
4259 
4260 /**
4261  * irdma_create_user_ah - create user address handle
4262  * @ibah: address handle
4263  * @attr: address handle attributes
4264  * @udata: User data
4265  *
4266  * returns 0 on success, error otherwise
4267  */
4268 static int irdma_create_user_ah(struct ib_ah *ibah,
4269 				struct rdma_ah_init_attr *attr,
4270 				struct ib_udata *udata)
4271 {
4272 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4273 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4274 	struct irdma_create_ah_resp uresp;
4275 	struct irdma_ah *parent_ah;
4276 	int err;
4277 
4278 	err = irdma_setup_ah(ibah, attr);
4279 	if (err)
4280 		return err;
4281 	mutex_lock(&iwdev->ah_tbl_lock);
4282 	if (!irdma_ah_exists(iwdev, ah)) {
4283 		err = irdma_create_hw_ah(iwdev, ah, true);
4284 		if (err) {
4285 			mutex_unlock(&iwdev->ah_tbl_lock);
4286 			return err;
4287 		}
4288 		/* Add new AH to list */
4289 		parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL);
4290 		if (parent_ah) {
4291 			u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^
4292 				  parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^
4293 				  parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^
4294 				  parent_ah->sc_ah.ah_info.dest_ip_addr[3];
4295 
4296 			ah->parent_ah = parent_ah;
4297 			hash_add(iwdev->ah_hash_tbl, &parent_ah->list, key);
4298 			refcount_set(&parent_ah->refcnt, 1);
4299 		}
4300 	}
4301 	mutex_unlock(&iwdev->ah_tbl_lock);
4302 
4303 	uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4304 	err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen));
4305 	if (err)
4306 		irdma_destroy_ah(ibah, attr->flags);
4307 
4308 	return err;
4309 }
4310 
4311 /**
4312  * irdma_create_ah - create address handle
4313  * @ibah: address handle
4314  * @attr: address handle attributes
4315  * @udata: NULL
4316  *
4317  * returns 0 on success, error otherwise
4318  */
4319 static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr,
4320 			   struct ib_udata *udata)
4321 {
4322 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4323 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4324 	int err;
4325 
4326 	err = irdma_setup_ah(ibah, attr);
4327 	if (err)
4328 		return err;
4329 	err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE);
4330 
4331 	return err;
4332 }
4333 
4334 /**
4335  * irdma_query_ah - Query address handle
4336  * @ibah: pointer to address handle
4337  * @ah_attr: address handle attributes
4338  */
4339 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
4340 {
4341 	struct irdma_ah *ah = to_iwah(ibah);
4342 
4343 	memset(ah_attr, 0, sizeof(*ah_attr));
4344 	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
4345 		ah_attr->ah_flags = IB_AH_GRH;
4346 		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
4347 		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
4348 		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
4349 		ah_attr->grh.sgid_index = ah->sgid_index;
4350 		ah_attr->grh.sgid_index = ah->sgid_index;
4351 		memcpy(&ah_attr->grh.dgid, &ah->dgid,
4352 		       sizeof(ah_attr->grh.dgid));
4353 	}
4354 
4355 	return 0;
4356 }
4357 
4358 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
4359 						 u32 port_num)
4360 {
4361 	return IB_LINK_LAYER_ETHERNET;
4362 }
4363 
4364 static const struct ib_device_ops irdma_roce_dev_ops = {
4365 	.attach_mcast = irdma_attach_mcast,
4366 	.create_ah = irdma_create_ah,
4367 	.create_user_ah = irdma_create_user_ah,
4368 	.destroy_ah = irdma_destroy_ah,
4369 	.detach_mcast = irdma_detach_mcast,
4370 	.get_link_layer = irdma_get_link_layer,
4371 	.get_port_immutable = irdma_roce_port_immutable,
4372 	.modify_qp = irdma_modify_qp_roce,
4373 	.query_ah = irdma_query_ah,
4374 	.query_pkey = irdma_query_pkey,
4375 };
4376 
4377 static const struct ib_device_ops irdma_iw_dev_ops = {
4378 	.modify_qp = irdma_modify_qp,
4379 	.get_port_immutable = irdma_iw_port_immutable,
4380 	.query_gid = irdma_query_gid,
4381 };
4382 
4383 static const struct ib_device_ops irdma_dev_ops = {
4384 	.owner = THIS_MODULE,
4385 	.driver_id = RDMA_DRIVER_IRDMA,
4386 	.uverbs_abi_ver = IRDMA_ABI_VER,
4387 
4388 	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
4389 	.alloc_mr = irdma_alloc_mr,
4390 	.alloc_mw = irdma_alloc_mw,
4391 	.alloc_pd = irdma_alloc_pd,
4392 	.alloc_ucontext = irdma_alloc_ucontext,
4393 	.create_cq = irdma_create_cq,
4394 	.create_qp = irdma_create_qp,
4395 	.dealloc_driver = irdma_ib_dealloc_device,
4396 	.dealloc_mw = irdma_dealloc_mw,
4397 	.dealloc_pd = irdma_dealloc_pd,
4398 	.dealloc_ucontext = irdma_dealloc_ucontext,
4399 	.dereg_mr = irdma_dereg_mr,
4400 	.destroy_cq = irdma_destroy_cq,
4401 	.destroy_qp = irdma_destroy_qp,
4402 	.disassociate_ucontext = irdma_disassociate_ucontext,
4403 	.get_dev_fw_str = irdma_get_dev_fw_str,
4404 	.get_dma_mr = irdma_get_dma_mr,
4405 	.get_hw_stats = irdma_get_hw_stats,
4406 	.map_mr_sg = irdma_map_mr_sg,
4407 	.mmap = irdma_mmap,
4408 	.mmap_free = irdma_mmap_free,
4409 	.poll_cq = irdma_poll_cq,
4410 	.post_recv = irdma_post_recv,
4411 	.post_send = irdma_post_send,
4412 	.query_device = irdma_query_device,
4413 	.query_port = irdma_query_port,
4414 	.query_qp = irdma_query_qp,
4415 	.reg_user_mr = irdma_reg_user_mr,
4416 	.req_notify_cq = irdma_req_notify_cq,
4417 	.resize_cq = irdma_resize_cq,
4418 	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
4419 	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
4420 	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
4421 	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
4422 	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
4423 	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
4424 };
4425 
4426 /**
4427  * irdma_init_roce_device - initialization of roce rdma device
4428  * @iwdev: irdma device
4429  */
4430 static void irdma_init_roce_device(struct irdma_device *iwdev)
4431 {
4432 	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
4433 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
4434 			    iwdev->netdev->dev_addr);
4435 	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
4436 }
4437 
4438 /**
4439  * irdma_init_iw_device - initialization of iwarp rdma device
4440  * @iwdev: irdma device
4441  */
4442 static int irdma_init_iw_device(struct irdma_device *iwdev)
4443 {
4444 	struct net_device *netdev = iwdev->netdev;
4445 
4446 	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
4447 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
4448 			    netdev->dev_addr);
4449 	iwdev->ibdev.ops.iw_add_ref = irdma_qp_add_ref;
4450 	iwdev->ibdev.ops.iw_rem_ref = irdma_qp_rem_ref;
4451 	iwdev->ibdev.ops.iw_get_qp = irdma_get_qp;
4452 	iwdev->ibdev.ops.iw_connect = irdma_connect;
4453 	iwdev->ibdev.ops.iw_accept = irdma_accept;
4454 	iwdev->ibdev.ops.iw_reject = irdma_reject;
4455 	iwdev->ibdev.ops.iw_create_listen = irdma_create_listen;
4456 	iwdev->ibdev.ops.iw_destroy_listen = irdma_destroy_listen;
4457 	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
4458 	       sizeof(iwdev->ibdev.iw_ifname));
4459 	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
4460 
4461 	return 0;
4462 }
4463 
4464 /**
4465  * irdma_init_rdma_device - initialization of rdma device
4466  * @iwdev: irdma device
4467  */
4468 static int irdma_init_rdma_device(struct irdma_device *iwdev)
4469 {
4470 	struct pci_dev *pcidev = iwdev->rf->pcidev;
4471 	int ret;
4472 
4473 	if (iwdev->roce_mode) {
4474 		irdma_init_roce_device(iwdev);
4475 	} else {
4476 		ret = irdma_init_iw_device(iwdev);
4477 		if (ret)
4478 			return ret;
4479 	}
4480 	iwdev->ibdev.phys_port_cnt = 1;
4481 	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
4482 	iwdev->ibdev.dev.parent = &pcidev->dev;
4483 	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
4484 
4485 	return 0;
4486 }
4487 
4488 /**
4489  * irdma_port_ibevent - indicate port event
4490  * @iwdev: irdma device
4491  */
4492 void irdma_port_ibevent(struct irdma_device *iwdev)
4493 {
4494 	struct ib_event event;
4495 
4496 	event.device = &iwdev->ibdev;
4497 	event.element.port_num = 1;
4498 	event.event =
4499 		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
4500 	ib_dispatch_event(&event);
4501 }
4502 
4503 /**
4504  * irdma_ib_unregister_device - unregister rdma device from IB
4505  * core
4506  * @iwdev: irdma device
4507  */
4508 void irdma_ib_unregister_device(struct irdma_device *iwdev)
4509 {
4510 	iwdev->iw_status = 0;
4511 	irdma_port_ibevent(iwdev);
4512 	ib_unregister_device(&iwdev->ibdev);
4513 }
4514 
4515 /**
4516  * irdma_ib_register_device - register irdma device to IB core
4517  * @iwdev: irdma device
4518  */
4519 int irdma_ib_register_device(struct irdma_device *iwdev)
4520 {
4521 	int ret;
4522 
4523 	ret = irdma_init_rdma_device(iwdev);
4524 	if (ret)
4525 		return ret;
4526 
4527 	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
4528 	if (ret)
4529 		goto error;
4530 	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
4531 	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
4532 	if (ret)
4533 		goto error;
4534 
4535 	iwdev->iw_status = 1;
4536 	irdma_port_ibevent(iwdev);
4537 
4538 	return 0;
4539 
4540 error:
4541 	if (ret)
4542 		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
4543 
4544 	return ret;
4545 }
4546 
4547 /**
4548  * irdma_ib_dealloc_device
4549  * @ibdev: ib device
4550  *
4551  * callback from ibdev dealloc_driver to deallocate resources
4552  * unber irdma device
4553  */
4554 void irdma_ib_dealloc_device(struct ib_device *ibdev)
4555 {
4556 	struct irdma_device *iwdev = to_iwdev(ibdev);
4557 
4558 	irdma_rt_deinit_hw(iwdev);
4559 	irdma_ctrl_deinit_hw(iwdev->rf);
4560 	kfree(iwdev->rf);
4561 }
4562