1 /*
2  * Copyright (c) 2016 Hisilicon Limited.
3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 
34 #include <linux/vmalloc.h>
35 #include <rdma/ib_umem.h>
36 #include <linux/math.h>
37 #include "hns_roce_device.h"
38 #include "hns_roce_cmd.h"
39 #include "hns_roce_hem.h"
40 
41 static u32 hw_index_to_key(int ind)
42 {
43 	return ((u32)ind >> 24) | ((u32)ind << 8);
44 }
45 
46 unsigned long key_to_hw_index(u32 key)
47 {
48 	return (key << 24) | (key >> 8);
49 }
50 
51 static int alloc_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
52 {
53 	struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
54 	struct ib_device *ibdev = &hr_dev->ib_dev;
55 	int err;
56 	int id;
57 
58 	/* Allocate a key for mr from mr_table */
59 	id = ida_alloc_range(&mtpt_ida->ida, mtpt_ida->min, mtpt_ida->max,
60 			     GFP_KERNEL);
61 	if (id < 0) {
62 		ibdev_err(ibdev, "failed to alloc id for MR key, id(%d)\n", id);
63 		return -ENOMEM;
64 	}
65 
66 	mr->key = hw_index_to_key(id); /* MR key */
67 
68 	err = hns_roce_table_get(hr_dev, &hr_dev->mr_table.mtpt_table,
69 				 (unsigned long)id);
70 	if (err) {
71 		ibdev_err(ibdev, "failed to alloc mtpt, ret = %d.\n", err);
72 		goto err_free_bitmap;
73 	}
74 
75 	return 0;
76 err_free_bitmap:
77 	ida_free(&mtpt_ida->ida, id);
78 	return err;
79 }
80 
81 static void free_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
82 {
83 	unsigned long obj = key_to_hw_index(mr->key);
84 
85 	hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table, obj);
86 	ida_free(&hr_dev->mr_table.mtpt_ida.ida, (int)obj);
87 }
88 
89 static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr,
90 			struct ib_udata *udata, u64 start)
91 {
92 	struct ib_device *ibdev = &hr_dev->ib_dev;
93 	bool is_fast = mr->type == MR_TYPE_FRMR;
94 	struct hns_roce_buf_attr buf_attr = {};
95 	int err;
96 
97 	mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num;
98 	buf_attr.page_shift = is_fast ? PAGE_SHIFT :
99 			      hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT;
100 	buf_attr.region[0].size = mr->size;
101 	buf_attr.region[0].hopnum = mr->pbl_hop_num;
102 	buf_attr.region_count = 1;
103 	buf_attr.user_access = mr->access;
104 	/* fast MR's buffer is alloced before mapping, not at creation */
105 	buf_attr.mtt_only = is_fast;
106 
107 	err = hns_roce_mtr_create(hr_dev, &mr->pbl_mtr, &buf_attr,
108 				  hr_dev->caps.pbl_ba_pg_sz + PAGE_SHIFT,
109 				  udata, start);
110 	if (err)
111 		ibdev_err(ibdev, "failed to alloc pbl mtr, ret = %d.\n", err);
112 	else
113 		mr->npages = mr->pbl_mtr.hem_cfg.buf_pg_count;
114 
115 	return err;
116 }
117 
118 static void free_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
119 {
120 	hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr);
121 }
122 
123 static void hns_roce_mr_free(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
124 {
125 	struct ib_device *ibdev = &hr_dev->ib_dev;
126 	int ret;
127 
128 	if (mr->enabled) {
129 		ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
130 					      key_to_hw_index(mr->key) &
131 					      (hr_dev->caps.num_mtpts - 1));
132 		if (ret)
133 			ibdev_warn(ibdev, "failed to destroy mpt, ret = %d.\n",
134 				   ret);
135 	}
136 
137 	free_mr_pbl(hr_dev, mr);
138 	free_mr_key(hr_dev, mr);
139 }
140 
141 static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev,
142 			      struct hns_roce_mr *mr)
143 {
144 	unsigned long mtpt_idx = key_to_hw_index(mr->key);
145 	struct hns_roce_cmd_mailbox *mailbox;
146 	struct device *dev = hr_dev->dev;
147 	int ret;
148 
149 	/* Allocate mailbox memory */
150 	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
151 	if (IS_ERR(mailbox))
152 		return PTR_ERR(mailbox);
153 
154 	if (mr->type != MR_TYPE_FRMR)
155 		ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr);
156 	else
157 		ret = hr_dev->hw->frmr_write_mtpt(hr_dev, mailbox->buf, mr);
158 	if (ret) {
159 		dev_err(dev, "failed to write mtpt, ret = %d.\n", ret);
160 		goto err_page;
161 	}
162 
163 	ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
164 				     mtpt_idx & (hr_dev->caps.num_mtpts - 1));
165 	if (ret) {
166 		dev_err(dev, "failed to create mpt, ret = %d.\n", ret);
167 		goto err_page;
168 	}
169 
170 	mr->enabled = 1;
171 
172 err_page:
173 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
174 
175 	return ret;
176 }
177 
178 void hns_roce_init_mr_table(struct hns_roce_dev *hr_dev)
179 {
180 	struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
181 
182 	ida_init(&mtpt_ida->ida);
183 	mtpt_ida->max = hr_dev->caps.num_mtpts - 1;
184 	mtpt_ida->min = hr_dev->caps.reserved_mrws;
185 }
186 
187 struct ib_mr *hns_roce_get_dma_mr(struct ib_pd *pd, int acc)
188 {
189 	struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
190 	struct hns_roce_mr *mr;
191 	int ret;
192 
193 	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
194 	if (!mr)
195 		return  ERR_PTR(-ENOMEM);
196 
197 	mr->type = MR_TYPE_DMA;
198 	mr->pd = to_hr_pd(pd)->pdn;
199 	mr->access = acc;
200 
201 	/* Allocate memory region key */
202 	hns_roce_hem_list_init(&mr->pbl_mtr.hem_list);
203 	ret = alloc_mr_key(hr_dev, mr);
204 	if (ret)
205 		goto err_free;
206 
207 	ret = hns_roce_mr_enable(hr_dev, mr);
208 	if (ret)
209 		goto err_mr;
210 
211 	mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
212 
213 	return &mr->ibmr;
214 err_mr:
215 	free_mr_key(hr_dev, mr);
216 
217 err_free:
218 	kfree(mr);
219 	return ERR_PTR(ret);
220 }
221 
222 struct ib_mr *hns_roce_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
223 				   u64 virt_addr, int access_flags,
224 				   struct ib_udata *udata)
225 {
226 	struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
227 	struct hns_roce_mr *mr;
228 	int ret;
229 
230 	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
231 	if (!mr)
232 		return ERR_PTR(-ENOMEM);
233 
234 	mr->iova = virt_addr;
235 	mr->size = length;
236 	mr->pd = to_hr_pd(pd)->pdn;
237 	mr->access = access_flags;
238 	mr->type = MR_TYPE_MR;
239 
240 	ret = alloc_mr_key(hr_dev, mr);
241 	if (ret)
242 		goto err_alloc_mr;
243 
244 	ret = alloc_mr_pbl(hr_dev, mr, udata, start);
245 	if (ret)
246 		goto err_alloc_key;
247 
248 	ret = hns_roce_mr_enable(hr_dev, mr);
249 	if (ret)
250 		goto err_alloc_pbl;
251 
252 	mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
253 
254 	return &mr->ibmr;
255 
256 err_alloc_pbl:
257 	free_mr_pbl(hr_dev, mr);
258 err_alloc_key:
259 	free_mr_key(hr_dev, mr);
260 err_alloc_mr:
261 	kfree(mr);
262 	return ERR_PTR(ret);
263 }
264 
265 struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start,
266 				     u64 length, u64 virt_addr,
267 				     int mr_access_flags, struct ib_pd *pd,
268 				     struct ib_udata *udata)
269 {
270 	struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
271 	struct ib_device *ib_dev = &hr_dev->ib_dev;
272 	struct hns_roce_mr *mr = to_hr_mr(ibmr);
273 	struct hns_roce_cmd_mailbox *mailbox;
274 	unsigned long mtpt_idx;
275 	int ret;
276 
277 	if (!mr->enabled)
278 		return ERR_PTR(-EINVAL);
279 
280 	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
281 	if (IS_ERR(mailbox))
282 		return ERR_CAST(mailbox);
283 
284 	mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1);
285 
286 	ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_MPT,
287 				mtpt_idx);
288 	if (ret)
289 		goto free_cmd_mbox;
290 
291 	ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
292 				      mtpt_idx);
293 	if (ret)
294 		ibdev_warn(ib_dev, "failed to destroy MPT, ret = %d.\n", ret);
295 
296 	mr->enabled = 0;
297 	mr->iova = virt_addr;
298 	mr->size = length;
299 
300 	if (flags & IB_MR_REREG_PD)
301 		mr->pd = to_hr_pd(pd)->pdn;
302 
303 	if (flags & IB_MR_REREG_ACCESS)
304 		mr->access = mr_access_flags;
305 
306 	if (flags & IB_MR_REREG_TRANS) {
307 		free_mr_pbl(hr_dev, mr);
308 		ret = alloc_mr_pbl(hr_dev, mr, udata, start);
309 		if (ret) {
310 			ibdev_err(ib_dev, "failed to alloc mr PBL, ret = %d.\n",
311 				  ret);
312 			goto free_cmd_mbox;
313 		}
314 	}
315 
316 	ret = hr_dev->hw->rereg_write_mtpt(hr_dev, mr, flags, mailbox->buf);
317 	if (ret) {
318 		ibdev_err(ib_dev, "failed to write mtpt, ret = %d.\n", ret);
319 		goto free_cmd_mbox;
320 	}
321 
322 	ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
323 				     mtpt_idx);
324 	if (ret) {
325 		ibdev_err(ib_dev, "failed to create MPT, ret = %d.\n", ret);
326 		goto free_cmd_mbox;
327 	}
328 
329 	mr->enabled = 1;
330 
331 free_cmd_mbox:
332 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
333 
334 	if (ret)
335 		return ERR_PTR(ret);
336 	return NULL;
337 }
338 
339 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
340 {
341 	struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
342 	struct hns_roce_mr *mr = to_hr_mr(ibmr);
343 
344 	if (hr_dev->hw->dereg_mr)
345 		hr_dev->hw->dereg_mr(hr_dev);
346 
347 	hns_roce_mr_free(hr_dev, mr);
348 	kfree(mr);
349 
350 	return 0;
351 }
352 
353 struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
354 				u32 max_num_sg)
355 {
356 	struct hns_roce_dev *hr_dev = to_hr_dev(pd->device);
357 	struct device *dev = hr_dev->dev;
358 	struct hns_roce_mr *mr;
359 	int ret;
360 
361 	if (mr_type != IB_MR_TYPE_MEM_REG)
362 		return ERR_PTR(-EINVAL);
363 
364 	if (max_num_sg > HNS_ROCE_FRMR_MAX_PA) {
365 		dev_err(dev, "max_num_sg larger than %d\n",
366 			HNS_ROCE_FRMR_MAX_PA);
367 		return ERR_PTR(-EINVAL);
368 	}
369 
370 	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
371 	if (!mr)
372 		return ERR_PTR(-ENOMEM);
373 
374 	mr->type = MR_TYPE_FRMR;
375 	mr->pd = to_hr_pd(pd)->pdn;
376 	mr->size = max_num_sg * (1 << PAGE_SHIFT);
377 
378 	/* Allocate memory region key */
379 	ret = alloc_mr_key(hr_dev, mr);
380 	if (ret)
381 		goto err_free;
382 
383 	ret = alloc_mr_pbl(hr_dev, mr, NULL, 0);
384 	if (ret)
385 		goto err_key;
386 
387 	ret = hns_roce_mr_enable(hr_dev, mr);
388 	if (ret)
389 		goto err_pbl;
390 
391 	mr->ibmr.rkey = mr->ibmr.lkey = mr->key;
392 	mr->ibmr.length = mr->size;
393 
394 	return &mr->ibmr;
395 
396 err_pbl:
397 	free_mr_pbl(hr_dev, mr);
398 err_key:
399 	free_mr_key(hr_dev, mr);
400 err_free:
401 	kfree(mr);
402 	return ERR_PTR(ret);
403 }
404 
405 static int hns_roce_set_page(struct ib_mr *ibmr, u64 addr)
406 {
407 	struct hns_roce_mr *mr = to_hr_mr(ibmr);
408 
409 	if (likely(mr->npages < mr->pbl_mtr.hem_cfg.buf_pg_count)) {
410 		mr->page_list[mr->npages++] = addr;
411 		return 0;
412 	}
413 
414 	return -ENOBUFS;
415 }
416 
417 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
418 		       unsigned int *sg_offset)
419 {
420 	struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
421 	struct ib_device *ibdev = &hr_dev->ib_dev;
422 	struct hns_roce_mr *mr = to_hr_mr(ibmr);
423 	struct hns_roce_mtr *mtr = &mr->pbl_mtr;
424 	int ret, sg_num = 0;
425 
426 	mr->npages = 0;
427 	mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count,
428 				 sizeof(dma_addr_t), GFP_KERNEL);
429 	if (!mr->page_list)
430 		return sg_num;
431 
432 	sg_num = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, hns_roce_set_page);
433 	if (sg_num < 1) {
434 		ibdev_err(ibdev, "failed to store sg pages %u %u, cnt = %d.\n",
435 			  mr->npages, mr->pbl_mtr.hem_cfg.buf_pg_count, sg_num);
436 		goto err_page_list;
437 	}
438 
439 	mtr->hem_cfg.region[0].offset = 0;
440 	mtr->hem_cfg.region[0].count = mr->npages;
441 	mtr->hem_cfg.region[0].hopnum = mr->pbl_hop_num;
442 	mtr->hem_cfg.region_count = 1;
443 	ret = hns_roce_mtr_map(hr_dev, mtr, mr->page_list, mr->npages);
444 	if (ret) {
445 		ibdev_err(ibdev, "failed to map sg mtr, ret = %d.\n", ret);
446 		sg_num = 0;
447 	} else {
448 		mr->pbl_mtr.hem_cfg.buf_pg_shift = (u32)ilog2(ibmr->page_size);
449 	}
450 
451 err_page_list:
452 	kvfree(mr->page_list);
453 	mr->page_list = NULL;
454 
455 	return sg_num;
456 }
457 
458 static void hns_roce_mw_free(struct hns_roce_dev *hr_dev,
459 			     struct hns_roce_mw *mw)
460 {
461 	struct device *dev = hr_dev->dev;
462 	int ret;
463 
464 	if (mw->enabled) {
465 		ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
466 					      key_to_hw_index(mw->rkey) &
467 					      (hr_dev->caps.num_mtpts - 1));
468 		if (ret)
469 			dev_warn(dev, "MW DESTROY_MPT failed (%d)\n", ret);
470 
471 		hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table,
472 				   key_to_hw_index(mw->rkey));
473 	}
474 
475 	ida_free(&hr_dev->mr_table.mtpt_ida.ida,
476 		 (int)key_to_hw_index(mw->rkey));
477 }
478 
479 static int hns_roce_mw_enable(struct hns_roce_dev *hr_dev,
480 			      struct hns_roce_mw *mw)
481 {
482 	struct hns_roce_mr_table *mr_table = &hr_dev->mr_table;
483 	struct hns_roce_cmd_mailbox *mailbox;
484 	struct device *dev = hr_dev->dev;
485 	unsigned long mtpt_idx = key_to_hw_index(mw->rkey);
486 	int ret;
487 
488 	/* prepare HEM entry memory */
489 	ret = hns_roce_table_get(hr_dev, &mr_table->mtpt_table, mtpt_idx);
490 	if (ret)
491 		return ret;
492 
493 	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
494 	if (IS_ERR(mailbox)) {
495 		ret = PTR_ERR(mailbox);
496 		goto err_table;
497 	}
498 
499 	ret = hr_dev->hw->mw_write_mtpt(mailbox->buf, mw);
500 	if (ret) {
501 		dev_err(dev, "MW write mtpt fail!\n");
502 		goto err_page;
503 	}
504 
505 	ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
506 				     mtpt_idx & (hr_dev->caps.num_mtpts - 1));
507 	if (ret) {
508 		dev_err(dev, "MW CREATE_MPT failed (%d)\n", ret);
509 		goto err_page;
510 	}
511 
512 	mw->enabled = 1;
513 
514 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
515 
516 	return 0;
517 
518 err_page:
519 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
520 
521 err_table:
522 	hns_roce_table_put(hr_dev, &mr_table->mtpt_table, mtpt_idx);
523 
524 	return ret;
525 }
526 
527 int hns_roce_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
528 {
529 	struct hns_roce_dev *hr_dev = to_hr_dev(ibmw->device);
530 	struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
531 	struct ib_device *ibdev = &hr_dev->ib_dev;
532 	struct hns_roce_mw *mw = to_hr_mw(ibmw);
533 	int ret;
534 	int id;
535 
536 	/* Allocate a key for mw from mr_table */
537 	id = ida_alloc_range(&mtpt_ida->ida, mtpt_ida->min, mtpt_ida->max,
538 			     GFP_KERNEL);
539 	if (id < 0) {
540 		ibdev_err(ibdev, "failed to alloc id for MW key, id(%d)\n", id);
541 		return -ENOMEM;
542 	}
543 
544 	mw->rkey = hw_index_to_key(id);
545 
546 	ibmw->rkey = mw->rkey;
547 	mw->pdn = to_hr_pd(ibmw->pd)->pdn;
548 	mw->pbl_hop_num = hr_dev->caps.pbl_hop_num;
549 	mw->pbl_ba_pg_sz = hr_dev->caps.pbl_ba_pg_sz;
550 	mw->pbl_buf_pg_sz = hr_dev->caps.pbl_buf_pg_sz;
551 
552 	ret = hns_roce_mw_enable(hr_dev, mw);
553 	if (ret)
554 		goto err_mw;
555 
556 	return 0;
557 
558 err_mw:
559 	hns_roce_mw_free(hr_dev, mw);
560 	return ret;
561 }
562 
563 int hns_roce_dealloc_mw(struct ib_mw *ibmw)
564 {
565 	struct hns_roce_dev *hr_dev = to_hr_dev(ibmw->device);
566 	struct hns_roce_mw *mw = to_hr_mw(ibmw);
567 
568 	hns_roce_mw_free(hr_dev, mw);
569 	return 0;
570 }
571 
572 static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
573 			  struct hns_roce_buf_region *region, dma_addr_t *pages,
574 			  int max_count)
575 {
576 	int count, npage;
577 	int offset, end;
578 	__le64 *mtts;
579 	u64 addr;
580 	int i;
581 
582 	offset = region->offset;
583 	end = offset + region->count;
584 	npage = 0;
585 	while (offset < end && npage < max_count) {
586 		count = 0;
587 		mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list,
588 						  offset, &count);
589 		if (!mtts)
590 			return -ENOBUFS;
591 
592 		for (i = 0; i < count && npage < max_count; i++) {
593 			addr = pages[npage];
594 
595 			mtts[i] = cpu_to_le64(addr);
596 			npage++;
597 		}
598 		offset += count;
599 	}
600 
601 	return npage;
602 }
603 
604 static inline bool mtr_has_mtt(struct hns_roce_buf_attr *attr)
605 {
606 	int i;
607 
608 	for (i = 0; i < attr->region_count; i++)
609 		if (attr->region[i].hopnum != HNS_ROCE_HOP_NUM_0 &&
610 		    attr->region[i].hopnum > 0)
611 			return true;
612 
613 	/* because the mtr only one root base address, when hopnum is 0 means
614 	 * root base address equals the first buffer address, thus all alloced
615 	 * memory must in a continuous space accessed by direct mode.
616 	 */
617 	return false;
618 }
619 
620 static inline size_t mtr_bufs_size(struct hns_roce_buf_attr *attr)
621 {
622 	size_t size = 0;
623 	int i;
624 
625 	for (i = 0; i < attr->region_count; i++)
626 		size += attr->region[i].size;
627 
628 	return size;
629 }
630 
631 /*
632  * check the given pages in continuous address space
633  * Returns 0 on success, or the error page num.
634  */
635 static inline int mtr_check_direct_pages(dma_addr_t *pages, int page_count,
636 					 unsigned int page_shift)
637 {
638 	size_t page_size = 1 << page_shift;
639 	int i;
640 
641 	for (i = 1; i < page_count; i++)
642 		if (pages[i] - pages[i - 1] != page_size)
643 			return i;
644 
645 	return 0;
646 }
647 
648 static void mtr_free_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
649 {
650 	/* release user buffers */
651 	if (mtr->umem) {
652 		ib_umem_release(mtr->umem);
653 		mtr->umem = NULL;
654 	}
655 
656 	/* release kernel buffers */
657 	if (mtr->kmem) {
658 		hns_roce_buf_free(hr_dev, mtr->kmem);
659 		mtr->kmem = NULL;
660 	}
661 }
662 
663 static int mtr_alloc_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
664 			  struct hns_roce_buf_attr *buf_attr,
665 			  struct ib_udata *udata, unsigned long user_addr)
666 {
667 	struct ib_device *ibdev = &hr_dev->ib_dev;
668 	size_t total_size;
669 
670 	total_size = mtr_bufs_size(buf_attr);
671 
672 	if (udata) {
673 		mtr->kmem = NULL;
674 		mtr->umem = ib_umem_get(ibdev, user_addr, total_size,
675 					buf_attr->user_access);
676 		if (IS_ERR_OR_NULL(mtr->umem)) {
677 			ibdev_err(ibdev, "failed to get umem, ret = %ld.\n",
678 				  PTR_ERR(mtr->umem));
679 			return -ENOMEM;
680 		}
681 	} else {
682 		mtr->umem = NULL;
683 		mtr->kmem = hns_roce_buf_alloc(hr_dev, total_size,
684 					       buf_attr->page_shift,
685 					       mtr->hem_cfg.is_direct ?
686 					       HNS_ROCE_BUF_DIRECT : 0);
687 		if (IS_ERR(mtr->kmem)) {
688 			ibdev_err(ibdev, "failed to alloc kmem, ret = %ld.\n",
689 				  PTR_ERR(mtr->kmem));
690 			return PTR_ERR(mtr->kmem);
691 		}
692 	}
693 
694 	return 0;
695 }
696 
697 static int mtr_map_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
698 			int page_count, unsigned int page_shift)
699 {
700 	struct ib_device *ibdev = &hr_dev->ib_dev;
701 	dma_addr_t *pages;
702 	int npage;
703 	int ret;
704 
705 	/* alloc a tmp array to store buffer's dma address */
706 	pages = kvcalloc(page_count, sizeof(dma_addr_t), GFP_KERNEL);
707 	if (!pages)
708 		return -ENOMEM;
709 
710 	if (mtr->umem)
711 		npage = hns_roce_get_umem_bufs(hr_dev, pages, page_count,
712 					       mtr->umem, page_shift);
713 	else
714 		npage = hns_roce_get_kmem_bufs(hr_dev, pages, page_count,
715 					       mtr->kmem, page_shift);
716 
717 	if (npage != page_count) {
718 		ibdev_err(ibdev, "failed to get mtr page %d != %d.\n", npage,
719 			  page_count);
720 		ret = -ENOBUFS;
721 		goto err_alloc_list;
722 	}
723 
724 	if (mtr->hem_cfg.is_direct && npage > 1) {
725 		ret = mtr_check_direct_pages(pages, npage, page_shift);
726 		if (ret) {
727 			ibdev_err(ibdev, "failed to check %s page: %d / %d.\n",
728 				  mtr->umem ? "umtr" : "kmtr", ret, npage);
729 			ret = -ENOBUFS;
730 			goto err_alloc_list;
731 		}
732 	}
733 
734 	ret = hns_roce_mtr_map(hr_dev, mtr, pages, page_count);
735 	if (ret)
736 		ibdev_err(ibdev, "failed to map mtr pages, ret = %d.\n", ret);
737 
738 err_alloc_list:
739 	kvfree(pages);
740 
741 	return ret;
742 }
743 
744 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
745 		     dma_addr_t *pages, unsigned int page_cnt)
746 {
747 	struct ib_device *ibdev = &hr_dev->ib_dev;
748 	struct hns_roce_buf_region *r;
749 	unsigned int i, mapped_cnt;
750 	int ret = 0;
751 
752 	/*
753 	 * Only use the first page address as root ba when hopnum is 0, this
754 	 * is because the addresses of all pages are consecutive in this case.
755 	 */
756 	if (mtr->hem_cfg.is_direct) {
757 		mtr->hem_cfg.root_ba = pages[0];
758 		return 0;
759 	}
760 
761 	for (i = 0, mapped_cnt = 0; i < mtr->hem_cfg.region_count &&
762 	     mapped_cnt < page_cnt; i++) {
763 		r = &mtr->hem_cfg.region[i];
764 		/* if hopnum is 0, no need to map pages in this region */
765 		if (!r->hopnum) {
766 			mapped_cnt += r->count;
767 			continue;
768 		}
769 
770 		if (r->offset + r->count > page_cnt) {
771 			ret = -EINVAL;
772 			ibdev_err(ibdev,
773 				  "failed to check mtr%u count %u + %u > %u.\n",
774 				  i, r->offset, r->count, page_cnt);
775 			return ret;
776 		}
777 
778 		ret = mtr_map_region(hr_dev, mtr, r, &pages[r->offset],
779 				     page_cnt - mapped_cnt);
780 		if (ret < 0) {
781 			ibdev_err(ibdev,
782 				  "failed to map mtr%u offset %u, ret = %d.\n",
783 				  i, r->offset, ret);
784 			return ret;
785 		}
786 		mapped_cnt += ret;
787 		ret = 0;
788 	}
789 
790 	if (mapped_cnt < page_cnt) {
791 		ret = -ENOBUFS;
792 		ibdev_err(ibdev, "failed to map mtr pages count: %u < %u.\n",
793 			  mapped_cnt, page_cnt);
794 	}
795 
796 	return ret;
797 }
798 
799 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
800 		      u32 offset, u64 *mtt_buf, int mtt_max, u64 *base_addr)
801 {
802 	struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
803 	int mtt_count, left;
804 	u32 start_index;
805 	int total = 0;
806 	__le64 *mtts;
807 	u32 npage;
808 	u64 addr;
809 
810 	if (!mtt_buf || mtt_max < 1)
811 		goto done;
812 
813 	/* no mtt memory in direct mode, so just return the buffer address */
814 	if (cfg->is_direct) {
815 		start_index = offset >> HNS_HW_PAGE_SHIFT;
816 		for (mtt_count = 0; mtt_count < cfg->region_count &&
817 		     total < mtt_max; mtt_count++) {
818 			npage = cfg->region[mtt_count].offset;
819 			if (npage < start_index)
820 				continue;
821 
822 			addr = cfg->root_ba + (npage << HNS_HW_PAGE_SHIFT);
823 			mtt_buf[total] = addr;
824 
825 			total++;
826 		}
827 
828 		goto done;
829 	}
830 
831 	start_index = offset >> cfg->buf_pg_shift;
832 	left = mtt_max;
833 	while (left > 0) {
834 		mtt_count = 0;
835 		mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list,
836 						  start_index + total,
837 						  &mtt_count);
838 		if (!mtts || !mtt_count)
839 			goto done;
840 
841 		npage = min(mtt_count, left);
842 		left -= npage;
843 		for (mtt_count = 0; mtt_count < npage; mtt_count++)
844 			mtt_buf[total++] = le64_to_cpu(mtts[mtt_count]);
845 	}
846 
847 done:
848 	if (base_addr)
849 		*base_addr = cfg->root_ba;
850 
851 	return total;
852 }
853 
854 static int mtr_init_buf_cfg(struct hns_roce_dev *hr_dev,
855 			    struct hns_roce_buf_attr *attr,
856 			    struct hns_roce_hem_cfg *cfg,
857 			    unsigned int *buf_page_shift, u64 unalinged_size)
858 {
859 	struct hns_roce_buf_region *r;
860 	u64 first_region_padding;
861 	int page_cnt, region_cnt;
862 	unsigned int page_shift;
863 	size_t buf_size;
864 
865 	/* If mtt is disabled, all pages must be within a continuous range */
866 	cfg->is_direct = !mtr_has_mtt(attr);
867 	buf_size = mtr_bufs_size(attr);
868 	if (cfg->is_direct) {
869 		/* When HEM buffer uses 0-level addressing, the page size is
870 		 * equal to the whole buffer size, and we split the buffer into
871 		 * small pages which is used to check whether the adjacent
872 		 * units are in the continuous space and its size is fixed to
873 		 * 4K based on hns ROCEE's requirement.
874 		 */
875 		page_shift = HNS_HW_PAGE_SHIFT;
876 
877 		/* The ROCEE requires the page size to be 4K * 2 ^ N. */
878 		cfg->buf_pg_count = 1;
879 		cfg->buf_pg_shift = HNS_HW_PAGE_SHIFT +
880 			order_base_2(DIV_ROUND_UP(buf_size, HNS_HW_PAGE_SIZE));
881 		first_region_padding = 0;
882 	} else {
883 		page_shift = attr->page_shift;
884 		cfg->buf_pg_count = DIV_ROUND_UP(buf_size + unalinged_size,
885 						 1 << page_shift);
886 		cfg->buf_pg_shift = page_shift;
887 		first_region_padding = unalinged_size;
888 	}
889 
890 	/* Convert buffer size to page index and page count for each region and
891 	 * the buffer's offset needs to be appended to the first region.
892 	 */
893 	for (page_cnt = 0, region_cnt = 0; region_cnt < attr->region_count &&
894 	     region_cnt < ARRAY_SIZE(cfg->region); region_cnt++) {
895 		r = &cfg->region[region_cnt];
896 		r->offset = page_cnt;
897 		buf_size = hr_hw_page_align(attr->region[region_cnt].size +
898 					    first_region_padding);
899 		r->count = DIV_ROUND_UP(buf_size, 1 << page_shift);
900 		first_region_padding = 0;
901 		page_cnt += r->count;
902 		r->hopnum = to_hr_hem_hopnum(attr->region[region_cnt].hopnum,
903 					     r->count);
904 	}
905 
906 	cfg->region_count = region_cnt;
907 	*buf_page_shift = page_shift;
908 
909 	return page_cnt;
910 }
911 
912 static u64 cal_pages_per_l1ba(unsigned int ba_per_bt, unsigned int hopnum)
913 {
914 	return int_pow(ba_per_bt, hopnum - 1);
915 }
916 
917 static unsigned int cal_best_bt_pg_sz(struct hns_roce_dev *hr_dev,
918 				      struct hns_roce_mtr *mtr,
919 				      unsigned int pg_shift)
920 {
921 	unsigned long cap = hr_dev->caps.page_size_cap;
922 	struct hns_roce_buf_region *re;
923 	unsigned int pgs_per_l1ba;
924 	unsigned int ba_per_bt;
925 	unsigned int ba_num;
926 	int i;
927 
928 	for_each_set_bit_from(pg_shift, &cap, sizeof(cap) * BITS_PER_BYTE) {
929 		if (!(BIT(pg_shift) & cap))
930 			continue;
931 
932 		ba_per_bt = BIT(pg_shift) / BA_BYTE_LEN;
933 		ba_num = 0;
934 		for (i = 0; i < mtr->hem_cfg.region_count; i++) {
935 			re = &mtr->hem_cfg.region[i];
936 			if (re->hopnum == 0)
937 				continue;
938 
939 			pgs_per_l1ba = cal_pages_per_l1ba(ba_per_bt, re->hopnum);
940 			ba_num += DIV_ROUND_UP(re->count, pgs_per_l1ba);
941 		}
942 
943 		if (ba_num <= ba_per_bt)
944 			return pg_shift;
945 	}
946 
947 	return 0;
948 }
949 
950 static int mtr_alloc_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
951 			 unsigned int ba_page_shift)
952 {
953 	struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
954 	int ret;
955 
956 	hns_roce_hem_list_init(&mtr->hem_list);
957 	if (!cfg->is_direct) {
958 		ba_page_shift = cal_best_bt_pg_sz(hr_dev, mtr, ba_page_shift);
959 		if (!ba_page_shift)
960 			return -ERANGE;
961 
962 		ret = hns_roce_hem_list_request(hr_dev, &mtr->hem_list,
963 						cfg->region, cfg->region_count,
964 						ba_page_shift);
965 		if (ret)
966 			return ret;
967 		cfg->root_ba = mtr->hem_list.root_ba;
968 		cfg->ba_pg_shift = ba_page_shift;
969 	} else {
970 		cfg->ba_pg_shift = cfg->buf_pg_shift;
971 	}
972 
973 	return 0;
974 }
975 
976 static void mtr_free_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
977 {
978 	hns_roce_hem_list_release(hr_dev, &mtr->hem_list);
979 }
980 
981 /**
982  * hns_roce_mtr_create - Create hns memory translate region.
983  *
984  * @hr_dev: RoCE device struct pointer
985  * @mtr: memory translate region
986  * @buf_attr: buffer attribute for creating mtr
987  * @ba_page_shift: page shift for multi-hop base address table
988  * @udata: user space context, if it's NULL, means kernel space
989  * @user_addr: userspace virtual address to start at
990  */
991 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
992 			struct hns_roce_buf_attr *buf_attr,
993 			unsigned int ba_page_shift, struct ib_udata *udata,
994 			unsigned long user_addr)
995 {
996 	struct ib_device *ibdev = &hr_dev->ib_dev;
997 	unsigned int buf_page_shift = 0;
998 	int buf_page_cnt;
999 	int ret;
1000 
1001 	buf_page_cnt = mtr_init_buf_cfg(hr_dev, buf_attr, &mtr->hem_cfg,
1002 					&buf_page_shift,
1003 					udata ? user_addr & ~PAGE_MASK : 0);
1004 	if (buf_page_cnt < 1 || buf_page_shift < HNS_HW_PAGE_SHIFT) {
1005 		ibdev_err(ibdev, "failed to init mtr cfg, count %d shift %u.\n",
1006 			  buf_page_cnt, buf_page_shift);
1007 		return -EINVAL;
1008 	}
1009 
1010 	ret = mtr_alloc_mtt(hr_dev, mtr, ba_page_shift);
1011 	if (ret) {
1012 		ibdev_err(ibdev, "failed to alloc mtr mtt, ret = %d.\n", ret);
1013 		return ret;
1014 	}
1015 
1016 	/* The caller has its own buffer list and invokes the hns_roce_mtr_map()
1017 	 * to finish the MTT configuration.
1018 	 */
1019 	if (buf_attr->mtt_only) {
1020 		mtr->umem = NULL;
1021 		mtr->kmem = NULL;
1022 		return 0;
1023 	}
1024 
1025 	ret = mtr_alloc_bufs(hr_dev, mtr, buf_attr, udata, user_addr);
1026 	if (ret) {
1027 		ibdev_err(ibdev, "failed to alloc mtr bufs, ret = %d.\n", ret);
1028 		goto err_alloc_mtt;
1029 	}
1030 
1031 	/* Write buffer's dma address to MTT */
1032 	ret = mtr_map_bufs(hr_dev, mtr, buf_page_cnt, buf_page_shift);
1033 	if (ret)
1034 		ibdev_err(ibdev, "failed to map mtr bufs, ret = %d.\n", ret);
1035 	else
1036 		return 0;
1037 
1038 	mtr_free_bufs(hr_dev, mtr);
1039 err_alloc_mtt:
1040 	mtr_free_mtt(hr_dev, mtr);
1041 	return ret;
1042 }
1043 
1044 void hns_roce_mtr_destroy(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr)
1045 {
1046 	/* release multi-hop addressing resource */
1047 	hns_roce_hem_list_release(hr_dev, &mtr->hem_list);
1048 
1049 	/* free buffers */
1050 	mtr_free_bufs(hr_dev, mtr);
1051 }
1052