1 /*
2  * Copyright (c) 2016 Hisilicon Limited.
3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 #include <linux/acpi.h>
34 #include <linux/of_platform.h>
35 #include <linux/module.h>
36 #include <rdma/ib_addr.h>
37 #include <rdma/ib_smi.h>
38 #include <rdma/ib_user_verbs.h>
39 #include <rdma/ib_cache.h>
40 #include "hns_roce_common.h"
41 #include "hns_roce_device.h"
42 #include <rdma/hns-abi.h>
43 #include "hns_roce_hem.h"
44 
45 /**
46  * hns_get_gid_index - Get gid index.
47  * @hr_dev: pointer to structure hns_roce_dev.
48  * @port:  port, value range: 0 ~ MAX
49  * @gid_index:  gid_index, value range: 0 ~ MAX
50  * Description:
51  *    N ports shared gids, allocation method as follow:
52  *		GID[0][0], GID[1][0],.....GID[N - 1][0],
53  *		GID[0][0], GID[1][0],.....GID[N - 1][0],
54  *		And so on
55  */
56 int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
57 {
58 	return gid_index * hr_dev->caps.num_ports + port;
59 }
60 
61 static void hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
62 {
63 	u8 phy_port;
64 	u32 i = 0;
65 
66 	if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
67 		return;
68 
69 	for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
70 		hr_dev->dev_addr[port][i] = addr[i];
71 
72 	phy_port = hr_dev->iboe.phy_port[port];
73 	hr_dev->hw->set_mac(hr_dev, phy_port, addr);
74 }
75 
76 static int hns_roce_add_gid(struct ib_device *device, u8 port_num,
77 			    unsigned int index, const union ib_gid *gid,
78 			    const struct ib_gid_attr *attr, void **context)
79 {
80 	struct hns_roce_dev *hr_dev = to_hr_dev(device);
81 	u8 port = port_num - 1;
82 	unsigned long flags;
83 
84 	if (port >= hr_dev->caps.num_ports)
85 		return -EINVAL;
86 
87 	spin_lock_irqsave(&hr_dev->iboe.lock, flags);
88 
89 	hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid);
90 
91 	spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
92 
93 	return 0;
94 }
95 
96 static int hns_roce_del_gid(struct ib_device *device, u8 port_num,
97 			    unsigned int index, void **context)
98 {
99 	struct hns_roce_dev *hr_dev = to_hr_dev(device);
100 	union ib_gid zgid = { {0} };
101 	u8 port = port_num - 1;
102 	unsigned long flags;
103 
104 	if (port >= hr_dev->caps.num_ports)
105 		return -EINVAL;
106 
107 	spin_lock_irqsave(&hr_dev->iboe.lock, flags);
108 
109 	hr_dev->hw->set_gid(hr_dev, port, index, &zgid);
110 
111 	spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
112 
113 	return 0;
114 }
115 
116 static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
117 			   unsigned long event)
118 {
119 	struct device *dev = &hr_dev->pdev->dev;
120 	struct net_device *netdev;
121 
122 	netdev = hr_dev->iboe.netdevs[port];
123 	if (!netdev) {
124 		dev_err(dev, "port(%d) can't find netdev\n", port);
125 		return -ENODEV;
126 	}
127 
128 	spin_lock_bh(&hr_dev->iboe.lock);
129 
130 	switch (event) {
131 	case NETDEV_UP:
132 	case NETDEV_CHANGE:
133 	case NETDEV_REGISTER:
134 	case NETDEV_CHANGEADDR:
135 		hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
136 		break;
137 	case NETDEV_DOWN:
138 		/*
139 		 * In v1 engine, only support all ports closed together.
140 		 */
141 		break;
142 	default:
143 		dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
144 		break;
145 	}
146 
147 	spin_unlock_bh(&hr_dev->iboe.lock);
148 	return 0;
149 }
150 
151 static int hns_roce_netdev_event(struct notifier_block *self,
152 				 unsigned long event, void *ptr)
153 {
154 	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
155 	struct hns_roce_ib_iboe *iboe = NULL;
156 	struct hns_roce_dev *hr_dev = NULL;
157 	u8 port = 0;
158 	int ret = 0;
159 
160 	hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
161 	iboe = &hr_dev->iboe;
162 
163 	for (port = 0; port < hr_dev->caps.num_ports; port++) {
164 		if (dev == iboe->netdevs[port]) {
165 			ret = handle_en_event(hr_dev, port, event);
166 			if (ret)
167 				return NOTIFY_DONE;
168 			break;
169 		}
170 	}
171 
172 	return NOTIFY_DONE;
173 }
174 
175 static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
176 {
177 	u8 i;
178 
179 	for (i = 0; i < hr_dev->caps.num_ports; i++) {
180 		hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
181 				    hr_dev->caps.max_mtu);
182 		hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr);
183 	}
184 
185 	return 0;
186 }
187 
188 static int hns_roce_query_device(struct ib_device *ib_dev,
189 				 struct ib_device_attr *props,
190 				 struct ib_udata *uhw)
191 {
192 	struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
193 
194 	memset(props, 0, sizeof(*props));
195 
196 	props->sys_image_guid = hr_dev->sys_image_guid;
197 	props->max_mr_size = (u64)(~(0ULL));
198 	props->page_size_cap = hr_dev->caps.page_size_cap;
199 	props->vendor_id = hr_dev->vendor_id;
200 	props->vendor_part_id = hr_dev->vendor_part_id;
201 	props->hw_ver = hr_dev->hw_rev;
202 	props->max_qp = hr_dev->caps.num_qps;
203 	props->max_qp_wr = hr_dev->caps.max_wqes;
204 	props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
205 				  IB_DEVICE_RC_RNR_NAK_GEN;
206 	props->max_sge = hr_dev->caps.max_sq_sg;
207 	props->max_sge_rd = 1;
208 	props->max_cq = hr_dev->caps.num_cqs;
209 	props->max_cqe = hr_dev->caps.max_cqes;
210 	props->max_mr = hr_dev->caps.num_mtpts;
211 	props->max_pd = hr_dev->caps.num_pds;
212 	props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
213 	props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
214 	props->atomic_cap = IB_ATOMIC_NONE;
215 	props->max_pkeys = 1;
216 	props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
217 
218 	return 0;
219 }
220 
221 static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
222 					      u8 port_num)
223 {
224 	struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
225 	struct net_device *ndev;
226 
227 	if (port_num < 1 || port_num > hr_dev->caps.num_ports)
228 		return NULL;
229 
230 	rcu_read_lock();
231 
232 	ndev = hr_dev->iboe.netdevs[port_num - 1];
233 	if (ndev)
234 		dev_hold(ndev);
235 
236 	rcu_read_unlock();
237 	return ndev;
238 }
239 
240 static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
241 			       struct ib_port_attr *props)
242 {
243 	struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
244 	struct device *dev = &hr_dev->pdev->dev;
245 	struct net_device *net_dev;
246 	unsigned long flags;
247 	enum ib_mtu mtu;
248 	u8 port;
249 
250 	assert(port_num > 0);
251 	port = port_num - 1;
252 
253 	/* props being zeroed by the caller, avoid zeroing it here */
254 
255 	props->max_mtu = hr_dev->caps.max_mtu;
256 	props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
257 	props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
258 				IB_PORT_VENDOR_CLASS_SUP |
259 				IB_PORT_BOOT_MGMT_SUP;
260 	props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
261 	props->pkey_tbl_len = 1;
262 	props->active_width = IB_WIDTH_4X;
263 	props->active_speed = 1;
264 
265 	spin_lock_irqsave(&hr_dev->iboe.lock, flags);
266 
267 	net_dev = hr_dev->iboe.netdevs[port];
268 	if (!net_dev) {
269 		spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
270 		dev_err(dev, "find netdev %d failed!\r\n", port);
271 		return -EINVAL;
272 	}
273 
274 	mtu = iboe_get_mtu(net_dev->mtu);
275 	props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
276 	props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
277 			IB_PORT_ACTIVE : IB_PORT_DOWN;
278 	props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
279 
280 	spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
281 
282 	return 0;
283 }
284 
285 static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
286 						    u8 port_num)
287 {
288 	return IB_LINK_LAYER_ETHERNET;
289 }
290 
291 static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index,
292 			      union ib_gid *gid)
293 {
294 	return 0;
295 }
296 
297 static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
298 			       u16 *pkey)
299 {
300 	*pkey = PKEY_ID;
301 
302 	return 0;
303 }
304 
305 static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
306 				  struct ib_device_modify *props)
307 {
308 	unsigned long flags;
309 
310 	if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
311 		return -EOPNOTSUPP;
312 
313 	if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
314 		spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
315 		memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
316 		spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
317 	}
318 
319 	return 0;
320 }
321 
322 static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
323 				struct ib_port_modify *props)
324 {
325 	return 0;
326 }
327 
328 static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
329 						   struct ib_udata *udata)
330 {
331 	int ret = 0;
332 	struct hns_roce_ucontext *context;
333 	struct hns_roce_ib_alloc_ucontext_resp resp;
334 	struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
335 
336 	resp.qp_tab_size = hr_dev->caps.num_qps;
337 
338 	context = kmalloc(sizeof(*context), GFP_KERNEL);
339 	if (!context)
340 		return ERR_PTR(-ENOMEM);
341 
342 	ret = hns_roce_uar_alloc(hr_dev, &context->uar);
343 	if (ret)
344 		goto error_fail_uar_alloc;
345 
346 	ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
347 	if (ret)
348 		goto error_fail_copy_to_udata;
349 
350 	return &context->ibucontext;
351 
352 error_fail_copy_to_udata:
353 	hns_roce_uar_free(hr_dev, &context->uar);
354 
355 error_fail_uar_alloc:
356 	kfree(context);
357 
358 	return ERR_PTR(ret);
359 }
360 
361 static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
362 {
363 	struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
364 
365 	hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
366 	kfree(context);
367 
368 	return 0;
369 }
370 
371 static int hns_roce_mmap(struct ib_ucontext *context,
372 			 struct vm_area_struct *vma)
373 {
374 	struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
375 
376 	if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0)
377 		return -EINVAL;
378 
379 	if (vma->vm_pgoff == 0) {
380 		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
381 		if (io_remap_pfn_range(vma, vma->vm_start,
382 				       to_hr_ucontext(context)->uar.pfn,
383 				       PAGE_SIZE, vma->vm_page_prot))
384 			return -EAGAIN;
385 	} else if (vma->vm_pgoff == 1 && hr_dev->hw_rev == HNS_ROCE_HW_VER1) {
386 		/* vm_pgoff: 1 -- TPTR */
387 		if (io_remap_pfn_range(vma, vma->vm_start,
388 				       hr_dev->tptr_dma_addr >> PAGE_SHIFT,
389 				       hr_dev->tptr_size,
390 				       vma->vm_page_prot))
391 			return -EAGAIN;
392 	} else
393 		return -EINVAL;
394 
395 	return 0;
396 }
397 
398 static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
399 				   struct ib_port_immutable *immutable)
400 {
401 	struct ib_port_attr attr;
402 	int ret;
403 
404 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
405 
406 	ret = ib_query_port(ib_dev, port_num, &attr);
407 	if (ret)
408 		return ret;
409 
410 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
411 	immutable->gid_tbl_len = attr.gid_tbl_len;
412 
413 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
414 
415 	return 0;
416 }
417 
418 static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
419 {
420 	struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
421 
422 	unregister_inetaddr_notifier(&iboe->nb_inet);
423 	unregister_netdevice_notifier(&iboe->nb);
424 	ib_unregister_device(&hr_dev->ib_dev);
425 }
426 
427 static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
428 {
429 	int ret;
430 	struct hns_roce_ib_iboe *iboe = NULL;
431 	struct ib_device *ib_dev = NULL;
432 	struct device *dev = &hr_dev->pdev->dev;
433 
434 	iboe = &hr_dev->iboe;
435 	spin_lock_init(&iboe->lock);
436 
437 	ib_dev = &hr_dev->ib_dev;
438 	strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
439 
440 	ib_dev->owner			= THIS_MODULE;
441 	ib_dev->node_type		= RDMA_NODE_IB_CA;
442 	ib_dev->dev.parent		= dev;
443 
444 	ib_dev->phys_port_cnt		= hr_dev->caps.num_ports;
445 	ib_dev->local_dma_lkey		= hr_dev->caps.reserved_lkey;
446 	ib_dev->num_comp_vectors	= hr_dev->caps.num_comp_vectors;
447 	ib_dev->uverbs_abi_ver		= 1;
448 	ib_dev->uverbs_cmd_mask		=
449 		(1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
450 		(1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
451 		(1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
452 		(1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
453 		(1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
454 		(1ULL << IB_USER_VERBS_CMD_REG_MR) |
455 		(1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
456 		(1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
457 		(1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
458 		(1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
459 		(1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
460 		(1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
461 		(1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
462 		(1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
463 
464 	/* HCA||device||port */
465 	ib_dev->modify_device		= hns_roce_modify_device;
466 	ib_dev->query_device		= hns_roce_query_device;
467 	ib_dev->query_port		= hns_roce_query_port;
468 	ib_dev->modify_port		= hns_roce_modify_port;
469 	ib_dev->get_link_layer		= hns_roce_get_link_layer;
470 	ib_dev->get_netdev		= hns_roce_get_netdev;
471 	ib_dev->query_gid		= hns_roce_query_gid;
472 	ib_dev->add_gid			= hns_roce_add_gid;
473 	ib_dev->del_gid			= hns_roce_del_gid;
474 	ib_dev->query_pkey		= hns_roce_query_pkey;
475 	ib_dev->alloc_ucontext		= hns_roce_alloc_ucontext;
476 	ib_dev->dealloc_ucontext	= hns_roce_dealloc_ucontext;
477 	ib_dev->mmap			= hns_roce_mmap;
478 
479 	/* PD */
480 	ib_dev->alloc_pd		= hns_roce_alloc_pd;
481 	ib_dev->dealloc_pd		= hns_roce_dealloc_pd;
482 
483 	/* AH */
484 	ib_dev->create_ah		= hns_roce_create_ah;
485 	ib_dev->query_ah		= hns_roce_query_ah;
486 	ib_dev->destroy_ah		= hns_roce_destroy_ah;
487 
488 	/* QP */
489 	ib_dev->create_qp		= hns_roce_create_qp;
490 	ib_dev->modify_qp		= hns_roce_modify_qp;
491 	ib_dev->query_qp		= hr_dev->hw->query_qp;
492 	ib_dev->destroy_qp		= hr_dev->hw->destroy_qp;
493 	ib_dev->post_send		= hr_dev->hw->post_send;
494 	ib_dev->post_recv		= hr_dev->hw->post_recv;
495 
496 	/* CQ */
497 	ib_dev->create_cq		= hns_roce_ib_create_cq;
498 	ib_dev->destroy_cq		= hns_roce_ib_destroy_cq;
499 	ib_dev->req_notify_cq		= hr_dev->hw->req_notify_cq;
500 	ib_dev->poll_cq			= hr_dev->hw->poll_cq;
501 
502 	/* MR */
503 	ib_dev->get_dma_mr		= hns_roce_get_dma_mr;
504 	ib_dev->reg_user_mr		= hns_roce_reg_user_mr;
505 	ib_dev->dereg_mr		= hns_roce_dereg_mr;
506 
507 	/* OTHERS */
508 	ib_dev->get_port_immutable	= hns_roce_port_immutable;
509 
510 	ret = ib_register_device(ib_dev, NULL);
511 	if (ret) {
512 		dev_err(dev, "ib_register_device failed!\n");
513 		return ret;
514 	}
515 
516 	ret = hns_roce_setup_mtu_mac(hr_dev);
517 	if (ret) {
518 		dev_err(dev, "setup_mtu_mac failed!\n");
519 		goto error_failed_setup_mtu_mac;
520 	}
521 
522 	iboe->nb.notifier_call = hns_roce_netdev_event;
523 	ret = register_netdevice_notifier(&iboe->nb);
524 	if (ret) {
525 		dev_err(dev, "register_netdevice_notifier failed!\n");
526 		goto error_failed_setup_mtu_mac;
527 	}
528 
529 	return 0;
530 
531 error_failed_setup_mtu_mac:
532 	ib_unregister_device(ib_dev);
533 
534 	return ret;
535 }
536 
537 static const struct of_device_id hns_roce_of_match[] = {
538 	{ .compatible = "hisilicon,hns-roce-v1", .data = &hns_roce_hw_v1, },
539 	{},
540 };
541 MODULE_DEVICE_TABLE(of, hns_roce_of_match);
542 
543 static const struct acpi_device_id hns_roce_acpi_match[] = {
544 	{ "HISI00D1", (kernel_ulong_t)&hns_roce_hw_v1 },
545 	{},
546 };
547 MODULE_DEVICE_TABLE(acpi, hns_roce_acpi_match);
548 
549 static int hns_roce_node_match(struct device *dev, void *fwnode)
550 {
551 	return dev->fwnode == fwnode;
552 }
553 
554 static struct
555 platform_device *hns_roce_find_pdev(struct fwnode_handle *fwnode)
556 {
557 	struct device *dev;
558 
559 	/* get the 'device'corresponding to matching 'fwnode' */
560 	dev = bus_find_device(&platform_bus_type, NULL,
561 			      fwnode, hns_roce_node_match);
562 	/* get the platform device */
563 	return dev ? to_platform_device(dev) : NULL;
564 }
565 
566 static int hns_roce_get_cfg(struct hns_roce_dev *hr_dev)
567 {
568 	int i;
569 	int ret;
570 	u8 phy_port;
571 	int port_cnt = 0;
572 	struct device *dev = &hr_dev->pdev->dev;
573 	struct device_node *net_node;
574 	struct net_device *netdev = NULL;
575 	struct platform_device *pdev = NULL;
576 	struct resource *res;
577 
578 	/* check if we are compatible with the underlying SoC */
579 	if (dev_of_node(dev)) {
580 		const struct of_device_id *of_id;
581 
582 		of_id = of_match_node(hns_roce_of_match, dev->of_node);
583 		if (!of_id) {
584 			dev_err(dev, "device is not compatible!\n");
585 			return -ENXIO;
586 		}
587 		hr_dev->hw = (struct hns_roce_hw *)of_id->data;
588 		if (!hr_dev->hw) {
589 			dev_err(dev, "couldn't get H/W specific DT data!\n");
590 			return -ENXIO;
591 		}
592 	} else if (is_acpi_device_node(dev->fwnode)) {
593 		const struct acpi_device_id *acpi_id;
594 
595 		acpi_id = acpi_match_device(hns_roce_acpi_match, dev);
596 		if (!acpi_id) {
597 			dev_err(dev, "device is not compatible!\n");
598 			return -ENXIO;
599 		}
600 		hr_dev->hw = (struct hns_roce_hw *) acpi_id->driver_data;
601 		if (!hr_dev->hw) {
602 			dev_err(dev, "couldn't get H/W specific ACPI data!\n");
603 			return -ENXIO;
604 		}
605 	} else {
606 		dev_err(dev, "can't read compatibility data from DT or ACPI\n");
607 		return -ENXIO;
608 	}
609 
610 	/* get the mapped register base address */
611 	res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
612 	if (!res) {
613 		dev_err(dev, "memory resource not found!\n");
614 		return -EINVAL;
615 	}
616 	hr_dev->reg_base = devm_ioremap_resource(dev, res);
617 	if (IS_ERR(hr_dev->reg_base))
618 		return PTR_ERR(hr_dev->reg_base);
619 
620 	/* read the node_guid of IB device from the DT or ACPI */
621 	ret = device_property_read_u8_array(dev, "node-guid",
622 					    (u8 *)&hr_dev->ib_dev.node_guid,
623 					    GUID_LEN);
624 	if (ret) {
625 		dev_err(dev, "couldn't get node_guid from DT or ACPI!\n");
626 		return ret;
627 	}
628 
629 	/* get the RoCE associated ethernet ports or netdevices */
630 	for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) {
631 		if (dev_of_node(dev)) {
632 			net_node = of_parse_phandle(dev->of_node, "eth-handle",
633 						    i);
634 			if (!net_node)
635 				continue;
636 			pdev = of_find_device_by_node(net_node);
637 		} else if (is_acpi_device_node(dev->fwnode)) {
638 			struct acpi_reference_args args;
639 			struct fwnode_handle *fwnode;
640 
641 			ret = acpi_node_get_property_reference(dev->fwnode,
642 							       "eth-handle",
643 							       i, &args);
644 			if (ret)
645 				continue;
646 			fwnode = acpi_fwnode_handle(args.adev);
647 			pdev = hns_roce_find_pdev(fwnode);
648 		} else {
649 			dev_err(dev, "cannot read data from DT or ACPI\n");
650 			return -ENXIO;
651 		}
652 
653 		if (pdev) {
654 			netdev = platform_get_drvdata(pdev);
655 			phy_port = (u8)i;
656 			if (netdev) {
657 				hr_dev->iboe.netdevs[port_cnt] = netdev;
658 				hr_dev->iboe.phy_port[port_cnt] = phy_port;
659 			} else {
660 				dev_err(dev, "no netdev found with pdev %s\n",
661 					pdev->name);
662 				return -ENODEV;
663 			}
664 			port_cnt++;
665 		}
666 	}
667 
668 	if (port_cnt == 0) {
669 		dev_err(dev, "unable to get eth-handle for available ports!\n");
670 		return -EINVAL;
671 	}
672 
673 	hr_dev->caps.num_ports = port_cnt;
674 
675 	/* cmd issue mode: 0 is poll, 1 is event */
676 	hr_dev->cmd_mod = 1;
677 	hr_dev->loop_idc = 0;
678 
679 	/* read the interrupt names from the DT or ACPI */
680 	ret = device_property_read_string_array(dev, "interrupt-names",
681 						hr_dev->irq_names,
682 						HNS_ROCE_MAX_IRQ_NUM);
683 	if (ret < 0) {
684 		dev_err(dev, "couldn't get interrupt names from DT or ACPI!\n");
685 		return ret;
686 	}
687 
688 	/* fetch the interrupt numbers */
689 	for (i = 0; i < HNS_ROCE_MAX_IRQ_NUM; i++) {
690 		hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i);
691 		if (hr_dev->irq[i] <= 0) {
692 			dev_err(dev, "platform get of irq[=%d] failed!\n", i);
693 			return -EINVAL;
694 		}
695 	}
696 
697 	return 0;
698 }
699 
700 static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
701 {
702 	int ret;
703 	struct device *dev = &hr_dev->pdev->dev;
704 
705 	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
706 				      HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
707 				      hr_dev->caps.num_mtt_segs, 1);
708 	if (ret) {
709 		dev_err(dev, "Failed to init MTT context memory, aborting.\n");
710 		return ret;
711 	}
712 
713 	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
714 				      HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
715 				      hr_dev->caps.num_mtpts, 1);
716 	if (ret) {
717 		dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
718 		goto err_unmap_mtt;
719 	}
720 
721 	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
722 				      HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
723 				      hr_dev->caps.num_qps, 1);
724 	if (ret) {
725 		dev_err(dev, "Failed to init QP context memory, aborting.\n");
726 		goto err_unmap_dmpt;
727 	}
728 
729 	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
730 				      HEM_TYPE_IRRL,
731 				      hr_dev->caps.irrl_entry_sz *
732 				      hr_dev->caps.max_qp_init_rdma,
733 				      hr_dev->caps.num_qps, 1);
734 	if (ret) {
735 		dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
736 		goto err_unmap_qp;
737 	}
738 
739 	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
740 				      HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
741 				      hr_dev->caps.num_cqs, 1);
742 	if (ret) {
743 		dev_err(dev, "Failed to init CQ context memory, aborting.\n");
744 		goto err_unmap_irrl;
745 	}
746 
747 	return 0;
748 
749 err_unmap_irrl:
750 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
751 
752 err_unmap_qp:
753 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
754 
755 err_unmap_dmpt:
756 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
757 
758 err_unmap_mtt:
759 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
760 
761 	return ret;
762 }
763 
764 /**
765  * hns_roce_setup_hca - setup host channel adapter
766  * @hr_dev: pointer to hns roce device
767  * Return : int
768  */
769 static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
770 {
771 	int ret;
772 	struct device *dev = &hr_dev->pdev->dev;
773 
774 	spin_lock_init(&hr_dev->sm_lock);
775 	spin_lock_init(&hr_dev->bt_cmd_lock);
776 
777 	ret = hns_roce_init_uar_table(hr_dev);
778 	if (ret) {
779 		dev_err(dev, "Failed to initialize uar table. aborting\n");
780 		return ret;
781 	}
782 
783 	ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
784 	if (ret) {
785 		dev_err(dev, "Failed to allocate priv_uar.\n");
786 		goto err_uar_table_free;
787 	}
788 
789 	ret = hns_roce_init_pd_table(hr_dev);
790 	if (ret) {
791 		dev_err(dev, "Failed to init protected domain table.\n");
792 		goto err_uar_alloc_free;
793 	}
794 
795 	ret = hns_roce_init_mr_table(hr_dev);
796 	if (ret) {
797 		dev_err(dev, "Failed to init memory region table.\n");
798 		goto err_pd_table_free;
799 	}
800 
801 	ret = hns_roce_init_cq_table(hr_dev);
802 	if (ret) {
803 		dev_err(dev, "Failed to init completion queue table.\n");
804 		goto err_mr_table_free;
805 	}
806 
807 	ret = hns_roce_init_qp_table(hr_dev);
808 	if (ret) {
809 		dev_err(dev, "Failed to init queue pair table.\n");
810 		goto err_cq_table_free;
811 	}
812 
813 	return 0;
814 
815 err_cq_table_free:
816 	hns_roce_cleanup_cq_table(hr_dev);
817 
818 err_mr_table_free:
819 	hns_roce_cleanup_mr_table(hr_dev);
820 
821 err_pd_table_free:
822 	hns_roce_cleanup_pd_table(hr_dev);
823 
824 err_uar_alloc_free:
825 	hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
826 
827 err_uar_table_free:
828 	hns_roce_cleanup_uar_table(hr_dev);
829 	return ret;
830 }
831 
832 /**
833  * hns_roce_probe - RoCE driver entrance
834  * @pdev: pointer to platform device
835  * Return : int
836  *
837  */
838 static int hns_roce_probe(struct platform_device *pdev)
839 {
840 	int ret;
841 	struct hns_roce_dev *hr_dev;
842 	struct device *dev = &pdev->dev;
843 
844 	hr_dev = (struct hns_roce_dev *)ib_alloc_device(sizeof(*hr_dev));
845 	if (!hr_dev)
846 		return -ENOMEM;
847 
848 	hr_dev->pdev = pdev;
849 	platform_set_drvdata(pdev, hr_dev);
850 
851 	if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL)) &&
852 	    dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) {
853 		dev_err(dev, "Not usable DMA addressing mode\n");
854 		ret = -EIO;
855 		goto error_failed_get_cfg;
856 	}
857 
858 	ret = hns_roce_get_cfg(hr_dev);
859 	if (ret) {
860 		dev_err(dev, "Get Configuration failed!\n");
861 		goto error_failed_get_cfg;
862 	}
863 
864 	ret = hr_dev->hw->reset(hr_dev, true);
865 	if (ret) {
866 		dev_err(dev, "Reset RoCE engine failed!\n");
867 		goto error_failed_get_cfg;
868 	}
869 
870 	hr_dev->hw->hw_profile(hr_dev);
871 
872 	ret = hns_roce_cmd_init(hr_dev);
873 	if (ret) {
874 		dev_err(dev, "cmd init failed!\n");
875 		goto error_failed_cmd_init;
876 	}
877 
878 	ret = hns_roce_init_eq_table(hr_dev);
879 	if (ret) {
880 		dev_err(dev, "eq init failed!\n");
881 		goto error_failed_eq_table;
882 	}
883 
884 	if (hr_dev->cmd_mod) {
885 		ret = hns_roce_cmd_use_events(hr_dev);
886 		if (ret) {
887 			dev_err(dev, "Switch to event-driven cmd failed!\n");
888 			goto error_failed_use_event;
889 		}
890 	}
891 
892 	ret = hns_roce_init_hem(hr_dev);
893 	if (ret) {
894 		dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
895 		goto error_failed_init_hem;
896 	}
897 
898 	ret = hns_roce_setup_hca(hr_dev);
899 	if (ret) {
900 		dev_err(dev, "setup hca failed!\n");
901 		goto error_failed_setup_hca;
902 	}
903 
904 	ret = hr_dev->hw->hw_init(hr_dev);
905 	if (ret) {
906 		dev_err(dev, "hw_init failed!\n");
907 		goto error_failed_engine_init;
908 	}
909 
910 	ret = hns_roce_register_device(hr_dev);
911 	if (ret)
912 		goto error_failed_register_device;
913 
914 	return 0;
915 
916 error_failed_register_device:
917 	hr_dev->hw->hw_exit(hr_dev);
918 
919 error_failed_engine_init:
920 	hns_roce_cleanup_bitmap(hr_dev);
921 
922 error_failed_setup_hca:
923 	hns_roce_cleanup_hem(hr_dev);
924 
925 error_failed_init_hem:
926 	if (hr_dev->cmd_mod)
927 		hns_roce_cmd_use_polling(hr_dev);
928 
929 error_failed_use_event:
930 	hns_roce_cleanup_eq_table(hr_dev);
931 
932 error_failed_eq_table:
933 	hns_roce_cmd_cleanup(hr_dev);
934 
935 error_failed_cmd_init:
936 	ret = hr_dev->hw->reset(hr_dev, false);
937 	if (ret)
938 		dev_err(&hr_dev->pdev->dev, "roce_engine reset fail\n");
939 
940 error_failed_get_cfg:
941 	ib_dealloc_device(&hr_dev->ib_dev);
942 
943 	return ret;
944 }
945 
946 /**
947  * hns_roce_remove - remove RoCE device
948  * @pdev: pointer to platform device
949  */
950 static int hns_roce_remove(struct platform_device *pdev)
951 {
952 	struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev);
953 
954 	hns_roce_unregister_device(hr_dev);
955 	hr_dev->hw->hw_exit(hr_dev);
956 	hns_roce_cleanup_bitmap(hr_dev);
957 	hns_roce_cleanup_hem(hr_dev);
958 
959 	if (hr_dev->cmd_mod)
960 		hns_roce_cmd_use_polling(hr_dev);
961 
962 	hns_roce_cleanup_eq_table(hr_dev);
963 	hns_roce_cmd_cleanup(hr_dev);
964 	hr_dev->hw->reset(hr_dev, false);
965 
966 	ib_dealloc_device(&hr_dev->ib_dev);
967 
968 	return 0;
969 }
970 
971 static struct platform_driver hns_roce_driver = {
972 	.probe = hns_roce_probe,
973 	.remove = hns_roce_remove,
974 	.driver = {
975 		.name = DRV_NAME,
976 		.of_match_table = hns_roce_of_match,
977 		.acpi_match_table = ACPI_PTR(hns_roce_acpi_match),
978 	},
979 };
980 
981 module_platform_driver(hns_roce_driver);
982 
983 MODULE_LICENSE("Dual BSD/GPL");
984 MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
985 MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
986 MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
987 MODULE_DESCRIPTION("HNS RoCE Driver");
988