1 /* 2 * Copyright (c) 2016 Hisilicon Limited. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <rdma/ib_umem.h> 34 #include <rdma/uverbs_ioctl.h> 35 #include "hns_roce_device.h" 36 #include "hns_roce_cmd.h" 37 #include "hns_roce_hem.h" 38 #include "hns_roce_common.h" 39 40 static u8 get_least_load_bankid_for_cq(struct hns_roce_bank *bank) 41 { 42 u32 least_load = bank[0].inuse; 43 u8 bankid = 0; 44 u32 bankcnt; 45 u8 i; 46 47 for (i = 1; i < HNS_ROCE_CQ_BANK_NUM; i++) { 48 bankcnt = bank[i].inuse; 49 if (bankcnt < least_load) { 50 least_load = bankcnt; 51 bankid = i; 52 } 53 } 54 55 return bankid; 56 } 57 58 static int alloc_cqn(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 59 { 60 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 61 struct hns_roce_bank *bank; 62 u8 bankid; 63 int id; 64 65 mutex_lock(&cq_table->bank_mutex); 66 bankid = get_least_load_bankid_for_cq(cq_table->bank); 67 bank = &cq_table->bank[bankid]; 68 69 id = ida_alloc_range(&bank->ida, bank->min, bank->max, GFP_KERNEL); 70 if (id < 0) { 71 mutex_unlock(&cq_table->bank_mutex); 72 return id; 73 } 74 75 /* the lower 2 bits is bankid */ 76 hr_cq->cqn = (id << CQ_BANKID_SHIFT) | bankid; 77 bank->inuse++; 78 mutex_unlock(&cq_table->bank_mutex); 79 80 return 0; 81 } 82 83 static inline u8 get_cq_bankid(unsigned long cqn) 84 { 85 /* The lower 2 bits of CQN are used to hash to different banks */ 86 return (u8)(cqn & GENMASK(1, 0)); 87 } 88 89 static void free_cqn(struct hns_roce_dev *hr_dev, unsigned long cqn) 90 { 91 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 92 struct hns_roce_bank *bank; 93 94 bank = &cq_table->bank[get_cq_bankid(cqn)]; 95 96 ida_free(&bank->ida, cqn >> CQ_BANKID_SHIFT); 97 98 mutex_lock(&cq_table->bank_mutex); 99 bank->inuse--; 100 mutex_unlock(&cq_table->bank_mutex); 101 } 102 103 static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 104 { 105 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 106 struct ib_device *ibdev = &hr_dev->ib_dev; 107 struct hns_roce_cmd_mailbox *mailbox; 108 u64 mtts[MTT_MIN_COUNT] = { 0 }; 109 dma_addr_t dma_handle; 110 int ret; 111 112 ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts), 113 &dma_handle); 114 if (!ret) { 115 ibdev_err(ibdev, "failed to find CQ mtr, ret = %d.\n", ret); 116 return -EINVAL; 117 } 118 119 /* Get CQC memory HEM(Hardware Entry Memory) table */ 120 ret = hns_roce_table_get(hr_dev, &cq_table->table, hr_cq->cqn); 121 if (ret) { 122 ibdev_err(ibdev, "failed to get CQ(0x%lx) context, ret = %d.\n", 123 hr_cq->cqn, ret); 124 goto err_out; 125 } 126 127 ret = xa_err(xa_store(&cq_table->array, hr_cq->cqn, hr_cq, GFP_KERNEL)); 128 if (ret) { 129 ibdev_err(ibdev, "failed to xa_store CQ, ret = %d.\n", ret); 130 goto err_put; 131 } 132 133 /* Allocate mailbox memory */ 134 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 135 if (IS_ERR(mailbox)) { 136 ret = PTR_ERR(mailbox); 137 goto err_xa; 138 } 139 140 hr_dev->hw->write_cqc(hr_dev, hr_cq, mailbox->buf, mtts, dma_handle); 141 142 /* Send mailbox to hw */ 143 ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, hr_cq->cqn, 0, 144 HNS_ROCE_CMD_CREATE_CQC, HNS_ROCE_CMD_TIMEOUT_MSECS); 145 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 146 if (ret) { 147 ibdev_err(ibdev, 148 "failed to send create cmd for CQ(0x%lx), ret = %d.\n", 149 hr_cq->cqn, ret); 150 goto err_xa; 151 } 152 153 hr_cq->cons_index = 0; 154 hr_cq->arm_sn = 1; 155 156 refcount_set(&hr_cq->refcount, 1); 157 init_completion(&hr_cq->free); 158 159 return 0; 160 161 err_xa: 162 xa_erase(&cq_table->array, hr_cq->cqn); 163 164 err_put: 165 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn); 166 167 err_out: 168 return ret; 169 } 170 171 static void free_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 172 { 173 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 174 struct device *dev = hr_dev->dev; 175 int ret; 176 177 ret = hns_roce_cmd_mbox(hr_dev, 0, 0, hr_cq->cqn, 1, 178 HNS_ROCE_CMD_DESTROY_CQC, 179 HNS_ROCE_CMD_TIMEOUT_MSECS); 180 if (ret) 181 dev_err(dev, "DESTROY_CQ failed (%d) for CQN %06lx\n", ret, 182 hr_cq->cqn); 183 184 xa_erase(&cq_table->array, hr_cq->cqn); 185 186 /* Waiting interrupt process procedure carried out */ 187 synchronize_irq(hr_dev->eq_table.eq[hr_cq->vector].irq); 188 189 /* wait for all interrupt processed */ 190 if (refcount_dec_and_test(&hr_cq->refcount)) 191 complete(&hr_cq->free); 192 wait_for_completion(&hr_cq->free); 193 194 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn); 195 } 196 197 static int alloc_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 198 struct ib_udata *udata, unsigned long addr) 199 { 200 struct ib_device *ibdev = &hr_dev->ib_dev; 201 struct hns_roce_buf_attr buf_attr = {}; 202 int ret; 203 204 buf_attr.page_shift = hr_dev->caps.cqe_buf_pg_sz + PAGE_SHIFT; 205 buf_attr.region[0].size = hr_cq->cq_depth * hr_cq->cqe_size; 206 buf_attr.region[0].hopnum = hr_dev->caps.cqe_hop_num; 207 buf_attr.region_count = 1; 208 209 ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr, 210 hr_dev->caps.cqe_ba_pg_sz + PAGE_SHIFT, 211 udata, addr); 212 if (ret) 213 ibdev_err(ibdev, "failed to alloc CQ mtr, ret = %d.\n", ret); 214 215 return ret; 216 } 217 218 static void free_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 219 { 220 hns_roce_mtr_destroy(hr_dev, &hr_cq->mtr); 221 } 222 223 static int alloc_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 224 struct ib_udata *udata, unsigned long addr, 225 struct hns_roce_ib_create_cq_resp *resp) 226 { 227 bool has_db = hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQ_RECORD_DB; 228 struct hns_roce_ucontext *uctx; 229 int err; 230 231 if (udata) { 232 if (has_db && 233 udata->outlen >= offsetofend(typeof(*resp), cap_flags)) { 234 uctx = rdma_udata_to_drv_context(udata, 235 struct hns_roce_ucontext, ibucontext); 236 err = hns_roce_db_map_user(uctx, addr, &hr_cq->db); 237 if (err) 238 return err; 239 hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB; 240 resp->cap_flags |= HNS_ROCE_CQ_FLAG_RECORD_DB; 241 } 242 } else { 243 if (has_db) { 244 err = hns_roce_alloc_db(hr_dev, &hr_cq->db, 1); 245 if (err) 246 return err; 247 hr_cq->set_ci_db = hr_cq->db.db_record; 248 *hr_cq->set_ci_db = 0; 249 hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB; 250 } 251 hr_cq->db_reg = hr_dev->reg_base + hr_dev->odb_offset + 252 DB_REG_OFFSET * hr_dev->priv_uar.index; 253 } 254 255 return 0; 256 } 257 258 static void free_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 259 struct ib_udata *udata) 260 { 261 struct hns_roce_ucontext *uctx; 262 263 if (!(hr_cq->flags & HNS_ROCE_CQ_FLAG_RECORD_DB)) 264 return; 265 266 hr_cq->flags &= ~HNS_ROCE_CQ_FLAG_RECORD_DB; 267 if (udata) { 268 uctx = rdma_udata_to_drv_context(udata, 269 struct hns_roce_ucontext, 270 ibucontext); 271 hns_roce_db_unmap_user(uctx, &hr_cq->db); 272 } else { 273 hns_roce_free_db(hr_dev, &hr_cq->db); 274 } 275 } 276 277 static int verify_cq_create_attr(struct hns_roce_dev *hr_dev, 278 const struct ib_cq_init_attr *attr) 279 { 280 struct ib_device *ibdev = &hr_dev->ib_dev; 281 282 if (!attr->cqe || attr->cqe > hr_dev->caps.max_cqes) { 283 ibdev_err(ibdev, "failed to check CQ count %u, max = %u.\n", 284 attr->cqe, hr_dev->caps.max_cqes); 285 return -EINVAL; 286 } 287 288 if (attr->comp_vector >= hr_dev->caps.num_comp_vectors) { 289 ibdev_err(ibdev, "failed to check CQ vector = %u, max = %d.\n", 290 attr->comp_vector, hr_dev->caps.num_comp_vectors); 291 return -EINVAL; 292 } 293 294 return 0; 295 } 296 297 static int get_cq_ucmd(struct hns_roce_cq *hr_cq, struct ib_udata *udata, 298 struct hns_roce_ib_create_cq *ucmd) 299 { 300 struct ib_device *ibdev = hr_cq->ib_cq.device; 301 int ret; 302 303 ret = ib_copy_from_udata(ucmd, udata, min(udata->inlen, sizeof(*ucmd))); 304 if (ret) { 305 ibdev_err(ibdev, "failed to copy CQ udata, ret = %d.\n", ret); 306 return ret; 307 } 308 309 return 0; 310 } 311 312 static void set_cq_param(struct hns_roce_cq *hr_cq, u32 cq_entries, int vector, 313 struct hns_roce_ib_create_cq *ucmd) 314 { 315 struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device); 316 317 cq_entries = max(cq_entries, hr_dev->caps.min_cqes); 318 cq_entries = roundup_pow_of_two(cq_entries); 319 hr_cq->ib_cq.cqe = cq_entries - 1; /* used as cqe index */ 320 hr_cq->cq_depth = cq_entries; 321 hr_cq->vector = vector; 322 323 spin_lock_init(&hr_cq->lock); 324 INIT_LIST_HEAD(&hr_cq->sq_list); 325 INIT_LIST_HEAD(&hr_cq->rq_list); 326 } 327 328 static int set_cqe_size(struct hns_roce_cq *hr_cq, struct ib_udata *udata, 329 struct hns_roce_ib_create_cq *ucmd) 330 { 331 struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device); 332 333 if (!udata) { 334 hr_cq->cqe_size = hr_dev->caps.cqe_sz; 335 return 0; 336 } 337 338 if (udata->inlen >= offsetofend(typeof(*ucmd), cqe_size)) { 339 if (ucmd->cqe_size != HNS_ROCE_V2_CQE_SIZE && 340 ucmd->cqe_size != HNS_ROCE_V3_CQE_SIZE) { 341 ibdev_err(&hr_dev->ib_dev, 342 "invalid cqe size %u.\n", ucmd->cqe_size); 343 return -EINVAL; 344 } 345 346 hr_cq->cqe_size = ucmd->cqe_size; 347 } else { 348 hr_cq->cqe_size = HNS_ROCE_V2_CQE_SIZE; 349 } 350 351 return 0; 352 } 353 354 int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr, 355 struct ib_udata *udata) 356 { 357 struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device); 358 struct hns_roce_ib_create_cq_resp resp = {}; 359 struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq); 360 struct ib_device *ibdev = &hr_dev->ib_dev; 361 struct hns_roce_ib_create_cq ucmd = {}; 362 int ret; 363 364 if (attr->flags) 365 return -EOPNOTSUPP; 366 367 ret = verify_cq_create_attr(hr_dev, attr); 368 if (ret) 369 return ret; 370 371 if (udata) { 372 ret = get_cq_ucmd(hr_cq, udata, &ucmd); 373 if (ret) 374 return ret; 375 } 376 377 set_cq_param(hr_cq, attr->cqe, attr->comp_vector, &ucmd); 378 379 ret = set_cqe_size(hr_cq, udata, &ucmd); 380 if (ret) 381 return ret; 382 383 ret = alloc_cq_buf(hr_dev, hr_cq, udata, ucmd.buf_addr); 384 if (ret) { 385 ibdev_err(ibdev, "failed to alloc CQ buf, ret = %d.\n", ret); 386 return ret; 387 } 388 389 ret = alloc_cq_db(hr_dev, hr_cq, udata, ucmd.db_addr, &resp); 390 if (ret) { 391 ibdev_err(ibdev, "failed to alloc CQ db, ret = %d.\n", ret); 392 goto err_cq_buf; 393 } 394 395 ret = alloc_cqn(hr_dev, hr_cq); 396 if (ret) { 397 ibdev_err(ibdev, "failed to alloc CQN, ret = %d.\n", ret); 398 goto err_cq_db; 399 } 400 401 ret = alloc_cqc(hr_dev, hr_cq); 402 if (ret) { 403 ibdev_err(ibdev, 404 "failed to alloc CQ context, ret = %d.\n", ret); 405 goto err_cqn; 406 } 407 408 if (udata) { 409 resp.cqn = hr_cq->cqn; 410 ret = ib_copy_to_udata(udata, &resp, 411 min(udata->outlen, sizeof(resp))); 412 if (ret) 413 goto err_cqc; 414 } 415 416 return 0; 417 418 err_cqc: 419 free_cqc(hr_dev, hr_cq); 420 err_cqn: 421 free_cqn(hr_dev, hr_cq->cqn); 422 err_cq_db: 423 free_cq_db(hr_dev, hr_cq, udata); 424 err_cq_buf: 425 free_cq_buf(hr_dev, hr_cq); 426 return ret; 427 } 428 429 int hns_roce_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata) 430 { 431 struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device); 432 struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq); 433 434 free_cqc(hr_dev, hr_cq); 435 free_cqn(hr_dev, hr_cq->cqn); 436 free_cq_db(hr_dev, hr_cq, udata); 437 free_cq_buf(hr_dev, hr_cq); 438 439 return 0; 440 } 441 442 void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn) 443 { 444 struct hns_roce_cq *hr_cq; 445 struct ib_cq *ibcq; 446 447 hr_cq = xa_load(&hr_dev->cq_table.array, 448 cqn & (hr_dev->caps.num_cqs - 1)); 449 if (!hr_cq) { 450 dev_warn(hr_dev->dev, "Completion event for bogus CQ 0x%06x\n", 451 cqn); 452 return; 453 } 454 455 ++hr_cq->arm_sn; 456 ibcq = &hr_cq->ib_cq; 457 if (ibcq->comp_handler) 458 ibcq->comp_handler(ibcq, ibcq->cq_context); 459 } 460 461 void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type) 462 { 463 struct device *dev = hr_dev->dev; 464 struct hns_roce_cq *hr_cq; 465 struct ib_event event; 466 struct ib_cq *ibcq; 467 468 hr_cq = xa_load(&hr_dev->cq_table.array, 469 cqn & (hr_dev->caps.num_cqs - 1)); 470 if (!hr_cq) { 471 dev_warn(dev, "Async event for bogus CQ 0x%06x\n", cqn); 472 return; 473 } 474 475 if (event_type != HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID && 476 event_type != HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR && 477 event_type != HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW) { 478 dev_err(dev, "Unexpected event type 0x%x on CQ 0x%06x\n", 479 event_type, cqn); 480 return; 481 } 482 483 refcount_inc(&hr_cq->refcount); 484 485 ibcq = &hr_cq->ib_cq; 486 if (ibcq->event_handler) { 487 event.device = ibcq->device; 488 event.element.cq = ibcq; 489 event.event = IB_EVENT_CQ_ERR; 490 ibcq->event_handler(&event, ibcq->cq_context); 491 } 492 493 if (refcount_dec_and_test(&hr_cq->refcount)) 494 complete(&hr_cq->free); 495 } 496 497 void hns_roce_init_cq_table(struct hns_roce_dev *hr_dev) 498 { 499 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 500 unsigned int reserved_from_bot; 501 unsigned int i; 502 503 mutex_init(&cq_table->bank_mutex); 504 xa_init(&cq_table->array); 505 506 reserved_from_bot = hr_dev->caps.reserved_cqs; 507 508 for (i = 0; i < reserved_from_bot; i++) { 509 cq_table->bank[get_cq_bankid(i)].inuse++; 510 cq_table->bank[get_cq_bankid(i)].min++; 511 } 512 513 for (i = 0; i < HNS_ROCE_CQ_BANK_NUM; i++) { 514 ida_init(&cq_table->bank[i].ida); 515 cq_table->bank[i].max = hr_dev->caps.num_cqs / 516 HNS_ROCE_CQ_BANK_NUM - 1; 517 } 518 } 519 520 void hns_roce_cleanup_cq_table(struct hns_roce_dev *hr_dev) 521 { 522 int i; 523 524 for (i = 0; i < HNS_ROCE_CQ_BANK_NUM; i++) 525 ida_destroy(&hr_dev->cq_table.bank[i].ida); 526 } 527