1 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */ 2 /* 3 * Copyright(c) 2020 - Cornelis Networks, Inc. 4 * Copyright(c) 2015 - 2018 Intel Corporation. 5 */ 6 #ifndef _HFI1_USER_SDMA_H 7 #define _HFI1_USER_SDMA_H 8 9 #include <linux/device.h> 10 #include <linux/wait.h> 11 12 #include "common.h" 13 #include "iowait.h" 14 #include "user_exp_rcv.h" 15 #include "mmu_rb.h" 16 17 /* The maximum number of Data io vectors per message/request */ 18 #define MAX_VECTORS_PER_REQ 8 19 /* 20 * Maximum number of packet to send from each message/request 21 * before moving to the next one. 22 */ 23 #define MAX_PKTS_PER_QUEUE 16 24 25 #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT)) 26 27 #define req_opcode(x) \ 28 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) 29 #define req_version(x) \ 30 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) 31 #define req_iovcnt(x) \ 32 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK) 33 34 /* Number of BTH.PSN bits used for sequence number in expected rcvs */ 35 #define BTH_SEQ_MASK 0x7ffull 36 37 #define AHG_KDETH_INTR_SHIFT 12 38 #define AHG_KDETH_SH_SHIFT 13 39 #define AHG_KDETH_ARRAY_SIZE 9 40 41 #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4) 42 #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff) 43 44 /** 45 * Build an SDMA AHG header update descriptor and save it to an array. 46 * @arr - Array to save the descriptor to. 47 * @idx - Index of the array at which the descriptor will be saved. 48 * @array_size - Size of the array arr. 49 * @dw - Update index into the header in DWs. 50 * @bit - Start bit. 51 * @width - Field width. 52 * @value - 16 bits of immediate data to write into the field. 53 * Returns -ERANGE if idx is invalid. If successful, returns the next index 54 * (idx + 1) of the array to be used for the next descriptor. 55 */ 56 static inline int ahg_header_set(u32 *arr, int idx, size_t array_size, 57 u8 dw, u8 bit, u8 width, u16 value) 58 { 59 if ((size_t)idx >= array_size) 60 return -ERANGE; 61 arr[idx++] = sdma_build_ahg_descriptor(value, dw, bit, width); 62 return idx; 63 } 64 65 /* Tx request flag bits */ 66 #define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */ 67 #define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */ 68 69 enum pkt_q_sdma_state { 70 SDMA_PKT_Q_ACTIVE, 71 SDMA_PKT_Q_DEFERRED, 72 }; 73 74 #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */ 75 76 #define SDMA_DBG(req, fmt, ...) \ 77 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \ 78 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \ 79 ##__VA_ARGS__) 80 81 struct hfi1_user_sdma_pkt_q { 82 u16 ctxt; 83 u16 subctxt; 84 u16 n_max_reqs; 85 atomic_t n_reqs; 86 u16 reqidx; 87 struct hfi1_devdata *dd; 88 struct kmem_cache *txreq_cache; 89 struct user_sdma_request *reqs; 90 unsigned long *req_in_use; 91 struct iowait busy; 92 enum pkt_q_sdma_state state; 93 wait_queue_head_t wait; 94 unsigned long unpinned; 95 struct mmu_rb_handler *handler; 96 atomic_t n_locked; 97 }; 98 99 struct hfi1_user_sdma_comp_q { 100 u16 nentries; 101 struct hfi1_sdma_comp_entry *comps; 102 }; 103 104 struct sdma_mmu_node { 105 struct mmu_rb_node rb; 106 struct hfi1_user_sdma_pkt_q *pq; 107 atomic_t refcount; 108 struct page **pages; 109 unsigned int npages; 110 }; 111 112 struct user_sdma_iovec { 113 struct list_head list; 114 struct iovec iov; 115 /* 116 * offset into the virtual address space of the vector at 117 * which we last left off. 118 */ 119 u64 offset; 120 }; 121 122 /* evict operation argument */ 123 struct evict_data { 124 u32 cleared; /* count evicted so far */ 125 u32 target; /* target count to evict */ 126 }; 127 128 struct user_sdma_request { 129 /* This is the original header from user space */ 130 struct hfi1_pkt_header hdr; 131 132 /* Read mostly fields */ 133 struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp; 134 struct hfi1_user_sdma_comp_q *cq; 135 /* 136 * Pointer to the SDMA engine for this request. 137 * Since different request could be on different VLs, 138 * each request will need it's own engine pointer. 139 */ 140 struct sdma_engine *sde; 141 struct sdma_req_info info; 142 /* TID array values copied from the tid_iov vector */ 143 u32 *tids; 144 /* total length of the data in the request */ 145 u32 data_len; 146 /* number of elements copied to the tids array */ 147 u16 n_tids; 148 /* 149 * We copy the iovs for this request (based on 150 * info.iovcnt). These are only the data vectors 151 */ 152 u8 data_iovs; 153 s8 ahg_idx; 154 155 /* Writeable fields shared with interrupt */ 156 u16 seqcomp ____cacheline_aligned_in_smp; 157 u16 seqsubmitted; 158 159 /* Send side fields */ 160 struct list_head txps ____cacheline_aligned_in_smp; 161 u16 seqnum; 162 /* 163 * KDETH.OFFSET (TID) field 164 * The offset can cover multiple packets, depending on the 165 * size of the TID entry. 166 */ 167 u32 tidoffset; 168 /* 169 * KDETH.Offset (Eager) field 170 * We need to remember the initial value so the headers 171 * can be updated properly. 172 */ 173 u32 koffset; 174 u32 sent; 175 /* TID index copied from the tid_iov vector */ 176 u16 tididx; 177 /* progress index moving along the iovs array */ 178 u8 iov_idx; 179 u8 has_error; 180 181 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ]; 182 } ____cacheline_aligned_in_smp; 183 184 /* 185 * A single txreq could span up to 3 physical pages when the MTU 186 * is sufficiently large (> 4K). Each of the IOV pointers also 187 * needs it's own set of flags so the vector has been handled 188 * independently of each other. 189 */ 190 struct user_sdma_txreq { 191 /* Packet header for the txreq */ 192 struct hfi1_pkt_header hdr; 193 struct sdma_txreq txreq; 194 struct list_head list; 195 struct user_sdma_request *req; 196 u16 flags; 197 u16 seqnum; 198 }; 199 200 int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, 201 struct hfi1_filedata *fd); 202 int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd, 203 struct hfi1_ctxtdata *uctxt); 204 int hfi1_user_sdma_process_request(struct hfi1_filedata *fd, 205 struct iovec *iovec, unsigned long dim, 206 unsigned long *count); 207 208 static inline struct mm_struct *mm_from_sdma_node(struct sdma_mmu_node *node) 209 { 210 return node->rb.handler->mn.mm; 211 } 212 213 #endif /* _HFI1_USER_SDMA_H */ 214