1 #ifndef _HFI1_USER_SDMA_H 2 #define _HFI1_USER_SDMA_H 3 /* 4 * Copyright(c) 2020 - Cornelis Networks, Inc. 5 * Copyright(c) 2015 - 2018 Intel Corporation. 6 * 7 * This file is provided under a dual BSD/GPLv2 license. When using or 8 * redistributing this file, you may do so under either license. 9 * 10 * GPL LICENSE SUMMARY 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * BSD LICENSE 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 27 * - Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * - Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in 31 * the documentation and/or other materials provided with the 32 * distribution. 33 * - Neither the name of Intel Corporation nor the names of its 34 * contributors may be used to endorse or promote products derived 35 * from this software without specific prior written permission. 36 * 37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 * 49 */ 50 #include <linux/device.h> 51 #include <linux/wait.h> 52 53 #include "common.h" 54 #include "iowait.h" 55 #include "user_exp_rcv.h" 56 #include "mmu_rb.h" 57 58 /* The maximum number of Data io vectors per message/request */ 59 #define MAX_VECTORS_PER_REQ 8 60 /* 61 * Maximum number of packet to send from each message/request 62 * before moving to the next one. 63 */ 64 #define MAX_PKTS_PER_QUEUE 16 65 66 #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT)) 67 68 #define req_opcode(x) \ 69 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) 70 #define req_version(x) \ 71 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) 72 #define req_iovcnt(x) \ 73 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK) 74 75 /* Number of BTH.PSN bits used for sequence number in expected rcvs */ 76 #define BTH_SEQ_MASK 0x7ffull 77 78 #define AHG_KDETH_INTR_SHIFT 12 79 #define AHG_KDETH_SH_SHIFT 13 80 #define AHG_KDETH_ARRAY_SIZE 9 81 82 #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4) 83 #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff) 84 85 /** 86 * Build an SDMA AHG header update descriptor and save it to an array. 87 * @arr - Array to save the descriptor to. 88 * @idx - Index of the array at which the descriptor will be saved. 89 * @array_size - Size of the array arr. 90 * @dw - Update index into the header in DWs. 91 * @bit - Start bit. 92 * @width - Field width. 93 * @value - 16 bits of immediate data to write into the field. 94 * Returns -ERANGE if idx is invalid. If successful, returns the next index 95 * (idx + 1) of the array to be used for the next descriptor. 96 */ 97 static inline int ahg_header_set(u32 *arr, int idx, size_t array_size, 98 u8 dw, u8 bit, u8 width, u16 value) 99 { 100 if ((size_t)idx >= array_size) 101 return -ERANGE; 102 arr[idx++] = sdma_build_ahg_descriptor(value, dw, bit, width); 103 return idx; 104 } 105 106 /* Tx request flag bits */ 107 #define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */ 108 #define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */ 109 110 enum pkt_q_sdma_state { 111 SDMA_PKT_Q_ACTIVE, 112 SDMA_PKT_Q_DEFERRED, 113 }; 114 115 #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */ 116 117 #define SDMA_DBG(req, fmt, ...) \ 118 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \ 119 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \ 120 ##__VA_ARGS__) 121 122 struct hfi1_user_sdma_pkt_q { 123 u16 ctxt; 124 u16 subctxt; 125 u16 n_max_reqs; 126 atomic_t n_reqs; 127 u16 reqidx; 128 struct hfi1_devdata *dd; 129 struct kmem_cache *txreq_cache; 130 struct user_sdma_request *reqs; 131 unsigned long *req_in_use; 132 struct iowait busy; 133 enum pkt_q_sdma_state state; 134 wait_queue_head_t wait; 135 unsigned long unpinned; 136 struct mmu_rb_handler *handler; 137 atomic_t n_locked; 138 }; 139 140 struct hfi1_user_sdma_comp_q { 141 u16 nentries; 142 struct hfi1_sdma_comp_entry *comps; 143 }; 144 145 struct sdma_mmu_node { 146 struct mmu_rb_node rb; 147 struct hfi1_user_sdma_pkt_q *pq; 148 atomic_t refcount; 149 struct page **pages; 150 unsigned int npages; 151 }; 152 153 struct user_sdma_iovec { 154 struct list_head list; 155 struct iovec iov; 156 /* number of pages in this vector */ 157 unsigned int npages; 158 /* array of pinned pages for this vector */ 159 struct page **pages; 160 /* 161 * offset into the virtual address space of the vector at 162 * which we last left off. 163 */ 164 u64 offset; 165 struct sdma_mmu_node *node; 166 }; 167 168 /* evict operation argument */ 169 struct evict_data { 170 u32 cleared; /* count evicted so far */ 171 u32 target; /* target count to evict */ 172 }; 173 174 struct user_sdma_request { 175 /* This is the original header from user space */ 176 struct hfi1_pkt_header hdr; 177 178 /* Read mostly fields */ 179 struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp; 180 struct hfi1_user_sdma_comp_q *cq; 181 /* 182 * Pointer to the SDMA engine for this request. 183 * Since different request could be on different VLs, 184 * each request will need it's own engine pointer. 185 */ 186 struct sdma_engine *sde; 187 struct sdma_req_info info; 188 /* TID array values copied from the tid_iov vector */ 189 u32 *tids; 190 /* total length of the data in the request */ 191 u32 data_len; 192 /* number of elements copied to the tids array */ 193 u16 n_tids; 194 /* 195 * We copy the iovs for this request (based on 196 * info.iovcnt). These are only the data vectors 197 */ 198 u8 data_iovs; 199 s8 ahg_idx; 200 201 /* Writeable fields shared with interrupt */ 202 u16 seqcomp ____cacheline_aligned_in_smp; 203 u16 seqsubmitted; 204 205 /* Send side fields */ 206 struct list_head txps ____cacheline_aligned_in_smp; 207 u16 seqnum; 208 /* 209 * KDETH.OFFSET (TID) field 210 * The offset can cover multiple packets, depending on the 211 * size of the TID entry. 212 */ 213 u32 tidoffset; 214 /* 215 * KDETH.Offset (Eager) field 216 * We need to remember the initial value so the headers 217 * can be updated properly. 218 */ 219 u32 koffset; 220 u32 sent; 221 /* TID index copied from the tid_iov vector */ 222 u16 tididx; 223 /* progress index moving along the iovs array */ 224 u8 iov_idx; 225 u8 has_error; 226 227 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ]; 228 } ____cacheline_aligned_in_smp; 229 230 /* 231 * A single txreq could span up to 3 physical pages when the MTU 232 * is sufficiently large (> 4K). Each of the IOV pointers also 233 * needs it's own set of flags so the vector has been handled 234 * independently of each other. 235 */ 236 struct user_sdma_txreq { 237 /* Packet header for the txreq */ 238 struct hfi1_pkt_header hdr; 239 struct sdma_txreq txreq; 240 struct list_head list; 241 struct user_sdma_request *req; 242 u16 flags; 243 u16 seqnum; 244 }; 245 246 int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, 247 struct hfi1_filedata *fd); 248 int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd, 249 struct hfi1_ctxtdata *uctxt); 250 int hfi1_user_sdma_process_request(struct hfi1_filedata *fd, 251 struct iovec *iovec, unsigned long dim, 252 unsigned long *count); 253 254 static inline struct mm_struct *mm_from_sdma_node(struct sdma_mmu_node *node) 255 { 256 return node->rb.handler->mn.mm; 257 } 258 259 #endif /* _HFI1_USER_SDMA_H */ 260