1 /* 2 * Copyright(c) 2015, 2016 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 #if !defined(__HFI1_TRACE_TX_H) || defined(TRACE_HEADER_MULTI_READ) 48 #define __HFI1_TRACE_TX_H 49 50 #include <linux/tracepoint.h> 51 #include <linux/trace_seq.h> 52 53 #include "hfi.h" 54 #include "mad.h" 55 #include "sdma.h" 56 57 const char *parse_sdma_flags(struct trace_seq *p, u64 desc0, u64 desc1); 58 59 #define __parse_sdma_flags(desc0, desc1) parse_sdma_flags(p, desc0, desc1) 60 61 #undef TRACE_SYSTEM 62 #define TRACE_SYSTEM hfi1_tx 63 64 TRACE_EVENT(hfi1_piofree, 65 TP_PROTO(struct send_context *sc, int extra), 66 TP_ARGS(sc, extra), 67 TP_STRUCT__entry(DD_DEV_ENTRY(sc->dd) 68 __field(u32, sw_index) 69 __field(u32, hw_context) 70 __field(int, extra) 71 ), 72 TP_fast_assign(DD_DEV_ASSIGN(sc->dd); 73 __entry->sw_index = sc->sw_index; 74 __entry->hw_context = sc->hw_context; 75 __entry->extra = extra; 76 ), 77 TP_printk("[%s] ctxt %u(%u) extra %d", 78 __get_str(dev), 79 __entry->sw_index, 80 __entry->hw_context, 81 __entry->extra 82 ) 83 ); 84 85 TRACE_EVENT(hfi1_wantpiointr, 86 TP_PROTO(struct send_context *sc, u32 needint, u64 credit_ctrl), 87 TP_ARGS(sc, needint, credit_ctrl), 88 TP_STRUCT__entry(DD_DEV_ENTRY(sc->dd) 89 __field(u32, sw_index) 90 __field(u32, hw_context) 91 __field(u32, needint) 92 __field(u64, credit_ctrl) 93 ), 94 TP_fast_assign(DD_DEV_ASSIGN(sc->dd); 95 __entry->sw_index = sc->sw_index; 96 __entry->hw_context = sc->hw_context; 97 __entry->needint = needint; 98 __entry->credit_ctrl = credit_ctrl; 99 ), 100 TP_printk("[%s] ctxt %u(%u) on %d credit_ctrl 0x%llx", 101 __get_str(dev), 102 __entry->sw_index, 103 __entry->hw_context, 104 __entry->needint, 105 (unsigned long long)__entry->credit_ctrl 106 ) 107 ); 108 109 DECLARE_EVENT_CLASS(hfi1_qpsleepwakeup_template, 110 TP_PROTO(struct rvt_qp *qp, u32 flags), 111 TP_ARGS(qp, flags), 112 TP_STRUCT__entry( 113 DD_DEV_ENTRY(dd_from_ibdev(qp->ibqp.device)) 114 __field(u32, qpn) 115 __field(u32, flags) 116 __field(u32, s_flags) 117 ), 118 TP_fast_assign( 119 DD_DEV_ASSIGN(dd_from_ibdev(qp->ibqp.device)) 120 __entry->flags = flags; 121 __entry->qpn = qp->ibqp.qp_num; 122 __entry->s_flags = qp->s_flags; 123 ), 124 TP_printk( 125 "[%s] qpn 0x%x flags 0x%x s_flags 0x%x", 126 __get_str(dev), 127 __entry->qpn, 128 __entry->flags, 129 __entry->s_flags 130 ) 131 ); 132 133 DEFINE_EVENT(hfi1_qpsleepwakeup_template, hfi1_qpwakeup, 134 TP_PROTO(struct rvt_qp *qp, u32 flags), 135 TP_ARGS(qp, flags)); 136 137 DEFINE_EVENT(hfi1_qpsleepwakeup_template, hfi1_qpsleep, 138 TP_PROTO(struct rvt_qp *qp, u32 flags), 139 TP_ARGS(qp, flags)); 140 141 TRACE_EVENT(hfi1_sdma_descriptor, 142 TP_PROTO(struct sdma_engine *sde, 143 u64 desc0, 144 u64 desc1, 145 u16 e, 146 void *descp), 147 TP_ARGS(sde, desc0, desc1, e, descp), 148 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 149 __field(void *, descp) 150 __field(u64, desc0) 151 __field(u64, desc1) 152 __field(u16, e) 153 __field(u8, idx) 154 ), 155 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 156 __entry->desc0 = desc0; 157 __entry->desc1 = desc1; 158 __entry->idx = sde->this_idx; 159 __entry->descp = descp; 160 __entry->e = e; 161 ), 162 TP_printk( 163 "[%s] SDE(%u) flags:%s addr:0x%016llx gen:%u len:%u d0:%016llx d1:%016llx to %p,%u", 164 __get_str(dev), 165 __entry->idx, 166 __parse_sdma_flags(__entry->desc0, __entry->desc1), 167 (__entry->desc0 >> SDMA_DESC0_PHY_ADDR_SHIFT) & 168 SDMA_DESC0_PHY_ADDR_MASK, 169 (u8)((__entry->desc1 >> SDMA_DESC1_GENERATION_SHIFT) & 170 SDMA_DESC1_GENERATION_MASK), 171 (u16)((__entry->desc0 >> SDMA_DESC0_BYTE_COUNT_SHIFT) & 172 SDMA_DESC0_BYTE_COUNT_MASK), 173 __entry->desc0, 174 __entry->desc1, 175 __entry->descp, 176 __entry->e 177 ) 178 ); 179 180 TRACE_EVENT(hfi1_sdma_engine_select, 181 TP_PROTO(struct hfi1_devdata *dd, u32 sel, u8 vl, u8 idx), 182 TP_ARGS(dd, sel, vl, idx), 183 TP_STRUCT__entry(DD_DEV_ENTRY(dd) 184 __field(u32, sel) 185 __field(u8, vl) 186 __field(u8, idx) 187 ), 188 TP_fast_assign(DD_DEV_ASSIGN(dd); 189 __entry->sel = sel; 190 __entry->vl = vl; 191 __entry->idx = idx; 192 ), 193 TP_printk("[%s] selecting SDE %u sel 0x%x vl %u", 194 __get_str(dev), 195 __entry->idx, 196 __entry->sel, 197 __entry->vl 198 ) 199 ); 200 201 DECLARE_EVENT_CLASS(hfi1_sdma_engine_class, 202 TP_PROTO(struct sdma_engine *sde, u64 status), 203 TP_ARGS(sde, status), 204 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 205 __field(u64, status) 206 __field(u8, idx) 207 ), 208 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 209 __entry->status = status; 210 __entry->idx = sde->this_idx; 211 ), 212 TP_printk("[%s] SDE(%u) status %llx", 213 __get_str(dev), 214 __entry->idx, 215 (unsigned long long)__entry->status 216 ) 217 ); 218 219 DEFINE_EVENT(hfi1_sdma_engine_class, hfi1_sdma_engine_interrupt, 220 TP_PROTO(struct sdma_engine *sde, u64 status), 221 TP_ARGS(sde, status) 222 ); 223 224 DEFINE_EVENT(hfi1_sdma_engine_class, hfi1_sdma_engine_progress, 225 TP_PROTO(struct sdma_engine *sde, u64 status), 226 TP_ARGS(sde, status) 227 ); 228 229 DECLARE_EVENT_CLASS(hfi1_sdma_ahg_ad, 230 TP_PROTO(struct sdma_engine *sde, int aidx), 231 TP_ARGS(sde, aidx), 232 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 233 __field(int, aidx) 234 __field(u8, idx) 235 ), 236 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 237 __entry->idx = sde->this_idx; 238 __entry->aidx = aidx; 239 ), 240 TP_printk("[%s] SDE(%u) aidx %d", 241 __get_str(dev), 242 __entry->idx, 243 __entry->aidx 244 ) 245 ); 246 247 DEFINE_EVENT(hfi1_sdma_ahg_ad, hfi1_ahg_allocate, 248 TP_PROTO(struct sdma_engine *sde, int aidx), 249 TP_ARGS(sde, aidx)); 250 251 DEFINE_EVENT(hfi1_sdma_ahg_ad, hfi1_ahg_deallocate, 252 TP_PROTO(struct sdma_engine *sde, int aidx), 253 TP_ARGS(sde, aidx)); 254 255 #ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER 256 TRACE_EVENT(hfi1_sdma_progress, 257 TP_PROTO(struct sdma_engine *sde, 258 u16 hwhead, 259 u16 swhead, 260 struct sdma_txreq *txp 261 ), 262 TP_ARGS(sde, hwhead, swhead, txp), 263 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 264 __field(u64, sn) 265 __field(u16, hwhead) 266 __field(u16, swhead) 267 __field(u16, txnext) 268 __field(u16, tx_tail) 269 __field(u16, tx_head) 270 __field(u8, idx) 271 ), 272 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 273 __entry->hwhead = hwhead; 274 __entry->swhead = swhead; 275 __entry->tx_tail = sde->tx_tail; 276 __entry->tx_head = sde->tx_head; 277 __entry->txnext = txp ? txp->next_descq_idx : ~0; 278 __entry->idx = sde->this_idx; 279 __entry->sn = txp ? txp->sn : ~0; 280 ), 281 TP_printk( 282 "[%s] SDE(%u) sn %llu hwhead %u swhead %u next_descq_idx %u tx_head %u tx_tail %u", 283 __get_str(dev), 284 __entry->idx, 285 __entry->sn, 286 __entry->hwhead, 287 __entry->swhead, 288 __entry->txnext, 289 __entry->tx_head, 290 __entry->tx_tail 291 ) 292 ); 293 #else 294 TRACE_EVENT(hfi1_sdma_progress, 295 TP_PROTO(struct sdma_engine *sde, 296 u16 hwhead, u16 swhead, 297 struct sdma_txreq *txp 298 ), 299 TP_ARGS(sde, hwhead, swhead, txp), 300 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 301 __field(u16, hwhead) 302 __field(u16, swhead) 303 __field(u16, txnext) 304 __field(u16, tx_tail) 305 __field(u16, tx_head) 306 __field(u8, idx) 307 ), 308 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 309 __entry->hwhead = hwhead; 310 __entry->swhead = swhead; 311 __entry->tx_tail = sde->tx_tail; 312 __entry->tx_head = sde->tx_head; 313 __entry->txnext = txp ? txp->next_descq_idx : ~0; 314 __entry->idx = sde->this_idx; 315 ), 316 TP_printk( 317 "[%s] SDE(%u) hwhead %u swhead %u next_descq_idx %u tx_head %u tx_tail %u", 318 __get_str(dev), 319 __entry->idx, 320 __entry->hwhead, 321 __entry->swhead, 322 __entry->txnext, 323 __entry->tx_head, 324 __entry->tx_tail 325 ) 326 ); 327 #endif 328 329 DECLARE_EVENT_CLASS(hfi1_sdma_sn, 330 TP_PROTO(struct sdma_engine *sde, u64 sn), 331 TP_ARGS(sde, sn), 332 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 333 __field(u64, sn) 334 __field(u8, idx) 335 ), 336 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 337 __entry->sn = sn; 338 __entry->idx = sde->this_idx; 339 ), 340 TP_printk("[%s] SDE(%u) sn %llu", 341 __get_str(dev), 342 __entry->idx, 343 __entry->sn 344 ) 345 ); 346 347 DEFINE_EVENT(hfi1_sdma_sn, hfi1_sdma_out_sn, 348 TP_PROTO( 349 struct sdma_engine *sde, 350 u64 sn 351 ), 352 TP_ARGS(sde, sn) 353 ); 354 355 DEFINE_EVENT(hfi1_sdma_sn, hfi1_sdma_in_sn, 356 TP_PROTO(struct sdma_engine *sde, u64 sn), 357 TP_ARGS(sde, sn) 358 ); 359 360 #define USDMA_HDR_FORMAT \ 361 "[%s:%u:%u:%u] PBC=(0x%x 0x%x) LRH=(0x%x 0x%x) BTH=(0x%x 0x%x 0x%x) KDETH=(0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x) TIDVal=0x%x" 362 363 TRACE_EVENT(hfi1_sdma_user_header, 364 TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 req, 365 struct hfi1_pkt_header *hdr, u32 tidval), 366 TP_ARGS(dd, ctxt, subctxt, req, hdr, tidval), 367 TP_STRUCT__entry( 368 DD_DEV_ENTRY(dd) 369 __field(u16, ctxt) 370 __field(u8, subctxt) 371 __field(u16, req) 372 __field(u32, pbc0) 373 __field(u32, pbc1) 374 __field(u32, lrh0) 375 __field(u32, lrh1) 376 __field(u32, bth0) 377 __field(u32, bth1) 378 __field(u32, bth2) 379 __field(u32, kdeth0) 380 __field(u32, kdeth1) 381 __field(u32, kdeth2) 382 __field(u32, kdeth3) 383 __field(u32, kdeth4) 384 __field(u32, kdeth5) 385 __field(u32, kdeth6) 386 __field(u32, kdeth7) 387 __field(u32, kdeth8) 388 __field(u32, tidval) 389 ), 390 TP_fast_assign( 391 __le32 *pbc = (__le32 *)hdr->pbc; 392 __be32 *lrh = (__be32 *)hdr->lrh; 393 __be32 *bth = (__be32 *)hdr->bth; 394 __le32 *kdeth = (__le32 *)&hdr->kdeth; 395 396 DD_DEV_ASSIGN(dd); 397 __entry->ctxt = ctxt; 398 __entry->subctxt = subctxt; 399 __entry->req = req; 400 __entry->pbc0 = le32_to_cpu(pbc[0]); 401 __entry->pbc1 = le32_to_cpu(pbc[1]); 402 __entry->lrh0 = be32_to_cpu(lrh[0]); 403 __entry->lrh1 = be32_to_cpu(lrh[1]); 404 __entry->bth0 = be32_to_cpu(bth[0]); 405 __entry->bth1 = be32_to_cpu(bth[1]); 406 __entry->bth2 = be32_to_cpu(bth[2]); 407 __entry->kdeth0 = le32_to_cpu(kdeth[0]); 408 __entry->kdeth1 = le32_to_cpu(kdeth[1]); 409 __entry->kdeth2 = le32_to_cpu(kdeth[2]); 410 __entry->kdeth3 = le32_to_cpu(kdeth[3]); 411 __entry->kdeth4 = le32_to_cpu(kdeth[4]); 412 __entry->kdeth5 = le32_to_cpu(kdeth[5]); 413 __entry->kdeth6 = le32_to_cpu(kdeth[6]); 414 __entry->kdeth7 = le32_to_cpu(kdeth[7]); 415 __entry->kdeth8 = le32_to_cpu(kdeth[8]); 416 __entry->tidval = tidval; 417 ), 418 TP_printk(USDMA_HDR_FORMAT, 419 __get_str(dev), 420 __entry->ctxt, 421 __entry->subctxt, 422 __entry->req, 423 __entry->pbc1, 424 __entry->pbc0, 425 __entry->lrh0, 426 __entry->lrh1, 427 __entry->bth0, 428 __entry->bth1, 429 __entry->bth2, 430 __entry->kdeth0, 431 __entry->kdeth1, 432 __entry->kdeth2, 433 __entry->kdeth3, 434 __entry->kdeth4, 435 __entry->kdeth5, 436 __entry->kdeth6, 437 __entry->kdeth7, 438 __entry->kdeth8, 439 __entry->tidval 440 ) 441 ); 442 443 #define SDMA_UREQ_FMT \ 444 "[%s:%u:%u] ver/op=0x%x, iovcnt=%u, npkts=%u, frag=%u, idx=%u" 445 TRACE_EVENT(hfi1_sdma_user_reqinfo, 446 TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 *i), 447 TP_ARGS(dd, ctxt, subctxt, i), 448 TP_STRUCT__entry( 449 DD_DEV_ENTRY(dd); 450 __field(u16, ctxt) 451 __field(u8, subctxt) 452 __field(u8, ver_opcode) 453 __field(u8, iovcnt) 454 __field(u16, npkts) 455 __field(u16, fragsize) 456 __field(u16, comp_idx) 457 ), 458 TP_fast_assign( 459 DD_DEV_ASSIGN(dd); 460 __entry->ctxt = ctxt; 461 __entry->subctxt = subctxt; 462 __entry->ver_opcode = i[0] & 0xff; 463 __entry->iovcnt = (i[0] >> 8) & 0xff; 464 __entry->npkts = i[1]; 465 __entry->fragsize = i[2]; 466 __entry->comp_idx = i[3]; 467 ), 468 TP_printk(SDMA_UREQ_FMT, 469 __get_str(dev), 470 __entry->ctxt, 471 __entry->subctxt, 472 __entry->ver_opcode, 473 __entry->iovcnt, 474 __entry->npkts, 475 __entry->fragsize, 476 __entry->comp_idx 477 ) 478 ); 479 480 #define usdma_complete_name(st) { st, #st } 481 #define show_usdma_complete_state(st) \ 482 __print_symbolic(st, \ 483 usdma_complete_name(FREE), \ 484 usdma_complete_name(QUEUED), \ 485 usdma_complete_name(COMPLETE), \ 486 usdma_complete_name(ERROR)) 487 488 TRACE_EVENT(hfi1_sdma_user_completion, 489 TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 idx, 490 u8 state, int code), 491 TP_ARGS(dd, ctxt, subctxt, idx, state, code), 492 TP_STRUCT__entry( 493 DD_DEV_ENTRY(dd) 494 __field(u16, ctxt) 495 __field(u8, subctxt) 496 __field(u16, idx) 497 __field(u8, state) 498 __field(int, code) 499 ), 500 TP_fast_assign( 501 DD_DEV_ASSIGN(dd); 502 __entry->ctxt = ctxt; 503 __entry->subctxt = subctxt; 504 __entry->idx = idx; 505 __entry->state = state; 506 __entry->code = code; 507 ), 508 TP_printk("[%s:%u:%u:%u] SDMA completion state %s (%d)", 509 __get_str(dev), __entry->ctxt, __entry->subctxt, 510 __entry->idx, show_usdma_complete_state(__entry->state), 511 __entry->code) 512 ); 513 514 const char *print_u32_array(struct trace_seq *, u32 *, int); 515 #define __print_u32_hex(arr, len) print_u32_array(p, arr, len) 516 517 TRACE_EVENT(hfi1_sdma_user_header_ahg, 518 TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 req, 519 u8 sde, u8 ahgidx, u32 *ahg, int len, u32 tidval), 520 TP_ARGS(dd, ctxt, subctxt, req, sde, ahgidx, ahg, len, tidval), 521 TP_STRUCT__entry( 522 DD_DEV_ENTRY(dd) 523 __field(u16, ctxt) 524 __field(u8, subctxt) 525 __field(u16, req) 526 __field(u8, sde) 527 __field(u8, idx) 528 __field(int, len) 529 __field(u32, tidval) 530 __array(u32, ahg, 10) 531 ), 532 TP_fast_assign( 533 DD_DEV_ASSIGN(dd); 534 __entry->ctxt = ctxt; 535 __entry->subctxt = subctxt; 536 __entry->req = req; 537 __entry->sde = sde; 538 __entry->idx = ahgidx; 539 __entry->len = len; 540 __entry->tidval = tidval; 541 memcpy(__entry->ahg, ahg, len * sizeof(u32)); 542 ), 543 TP_printk("[%s:%u:%u:%u] (SDE%u/AHG%u) ahg[0-%d]=(%s) TIDVal=0x%x", 544 __get_str(dev), 545 __entry->ctxt, 546 __entry->subctxt, 547 __entry->req, 548 __entry->sde, 549 __entry->idx, 550 __entry->len - 1, 551 __print_u32_hex(__entry->ahg, __entry->len), 552 __entry->tidval 553 ) 554 ); 555 556 TRACE_EVENT(hfi1_sdma_state, 557 TP_PROTO(struct sdma_engine *sde, 558 const char *cstate, 559 const char *nstate 560 ), 561 TP_ARGS(sde, cstate, nstate), 562 TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd) 563 __string(curstate, cstate) 564 __string(newstate, nstate) 565 ), 566 TP_fast_assign(DD_DEV_ASSIGN(sde->dd); 567 __assign_str(curstate, cstate); 568 __assign_str(newstate, nstate); 569 ), 570 TP_printk("[%s] current state %s new state %s", 571 __get_str(dev), 572 __get_str(curstate), 573 __get_str(newstate) 574 ) 575 ); 576 577 #define BCT_FORMAT \ 578 "shared_limit %x vls 0-7 [%x,%x][%x,%x][%x,%x][%x,%x][%x,%x][%x,%x][%x,%x][%x,%x] 15 [%x,%x]" 579 580 #define BCT(field) \ 581 be16_to_cpu( \ 582 ((struct buffer_control *)__get_dynamic_array(bct))->field \ 583 ) 584 585 DECLARE_EVENT_CLASS(hfi1_bct_template, 586 TP_PROTO(struct hfi1_devdata *dd, 587 struct buffer_control *bc), 588 TP_ARGS(dd, bc), 589 TP_STRUCT__entry(DD_DEV_ENTRY(dd) 590 __dynamic_array(u8, bct, sizeof(*bc)) 591 ), 592 TP_fast_assign(DD_DEV_ASSIGN(dd); 593 memcpy(__get_dynamic_array(bct), bc, 594 sizeof(*bc)); 595 ), 596 TP_printk(BCT_FORMAT, 597 BCT(overall_shared_limit), 598 599 BCT(vl[0].dedicated), 600 BCT(vl[0].shared), 601 602 BCT(vl[1].dedicated), 603 BCT(vl[1].shared), 604 605 BCT(vl[2].dedicated), 606 BCT(vl[2].shared), 607 608 BCT(vl[3].dedicated), 609 BCT(vl[3].shared), 610 611 BCT(vl[4].dedicated), 612 BCT(vl[4].shared), 613 614 BCT(vl[5].dedicated), 615 BCT(vl[5].shared), 616 617 BCT(vl[6].dedicated), 618 BCT(vl[6].shared), 619 620 BCT(vl[7].dedicated), 621 BCT(vl[7].shared), 622 623 BCT(vl[15].dedicated), 624 BCT(vl[15].shared) 625 ) 626 ); 627 628 DEFINE_EVENT(hfi1_bct_template, bct_set, 629 TP_PROTO(struct hfi1_devdata *dd, struct buffer_control *bc), 630 TP_ARGS(dd, bc)); 631 632 DEFINE_EVENT(hfi1_bct_template, bct_get, 633 TP_PROTO(struct hfi1_devdata *dd, struct buffer_control *bc), 634 TP_ARGS(dd, bc)); 635 636 #endif /* __HFI1_TRACE_TX_H */ 637 638 #undef TRACE_INCLUDE_PATH 639 #undef TRACE_INCLUDE_FILE 640 #define TRACE_INCLUDE_PATH . 641 #define TRACE_INCLUDE_FILE trace_tx 642 #include <trace/define_trace.h> 643