1 /* 2 * Copyright(c) 2015, 2016 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48 #include <linux/io.h> 49 #include <rdma/rdma_vt.h> 50 #include <rdma/rdmavt_qp.h> 51 52 #include "hfi.h" 53 #include "qp.h" 54 #include "verbs_txreq.h" 55 #include "trace.h" 56 57 /* cut down ridiculously long IB macro names */ 58 #define OP(x) RC_OP(x) 59 60 static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe, 61 u32 psn, u32 pmtu) 62 { 63 u32 len; 64 65 len = delta_psn(psn, wqe->psn) * pmtu; 66 ss->sge = wqe->sg_list[0]; 67 ss->sg_list = wqe->sg_list + 1; 68 ss->num_sge = wqe->wr.num_sge; 69 ss->total_len = wqe->length; 70 rvt_skip_sge(ss, len, false); 71 return wqe->length - len; 72 } 73 74 /** 75 * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read) 76 * @dev: the device for this QP 77 * @qp: a pointer to the QP 78 * @ohdr: a pointer to the IB header being constructed 79 * @ps: the xmit packet state 80 * 81 * Return 1 if constructed; otherwise, return 0. 82 * Note that we are in the responder's side of the QP context. 83 * Note the QP s_lock must be held. 84 */ 85 static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp, 86 struct ib_other_headers *ohdr, 87 struct hfi1_pkt_state *ps) 88 { 89 struct rvt_ack_entry *e; 90 u32 hwords; 91 u32 len; 92 u32 bth0; 93 u32 bth2; 94 int middle = 0; 95 u32 pmtu = qp->pmtu; 96 struct hfi1_qp_priv *priv = qp->priv; 97 98 lockdep_assert_held(&qp->s_lock); 99 /* Don't send an ACK if we aren't supposed to. */ 100 if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) 101 goto bail; 102 103 /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 104 hwords = 5; 105 106 switch (qp->s_ack_state) { 107 case OP(RDMA_READ_RESPONSE_LAST): 108 case OP(RDMA_READ_RESPONSE_ONLY): 109 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 110 if (e->rdma_sge.mr) { 111 rvt_put_mr(e->rdma_sge.mr); 112 e->rdma_sge.mr = NULL; 113 } 114 /* FALLTHROUGH */ 115 case OP(ATOMIC_ACKNOWLEDGE): 116 /* 117 * We can increment the tail pointer now that the last 118 * response has been sent instead of only being 119 * constructed. 120 */ 121 if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC) 122 qp->s_tail_ack_queue = 0; 123 /* FALLTHROUGH */ 124 case OP(SEND_ONLY): 125 case OP(ACKNOWLEDGE): 126 /* Check for no next entry in the queue. */ 127 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) { 128 if (qp->s_flags & RVT_S_ACK_PENDING) 129 goto normal; 130 goto bail; 131 } 132 133 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 134 if (e->opcode == OP(RDMA_READ_REQUEST)) { 135 /* 136 * If a RDMA read response is being resent and 137 * we haven't seen the duplicate request yet, 138 * then stop sending the remaining responses the 139 * responder has seen until the requester re-sends it. 140 */ 141 len = e->rdma_sge.sge_length; 142 if (len && !e->rdma_sge.mr) { 143 qp->s_tail_ack_queue = qp->r_head_ack_queue; 144 goto bail; 145 } 146 /* Copy SGE state in case we need to resend */ 147 ps->s_txreq->mr = e->rdma_sge.mr; 148 if (ps->s_txreq->mr) 149 rvt_get_mr(ps->s_txreq->mr); 150 qp->s_ack_rdma_sge.sge = e->rdma_sge; 151 qp->s_ack_rdma_sge.num_sge = 1; 152 ps->s_txreq->ss = &qp->s_ack_rdma_sge; 153 if (len > pmtu) { 154 len = pmtu; 155 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST); 156 } else { 157 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY); 158 e->sent = 1; 159 } 160 ohdr->u.aeth = rvt_compute_aeth(qp); 161 hwords++; 162 qp->s_ack_rdma_psn = e->psn; 163 bth2 = mask_psn(qp->s_ack_rdma_psn++); 164 } else { 165 /* COMPARE_SWAP or FETCH_ADD */ 166 ps->s_txreq->ss = NULL; 167 len = 0; 168 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE); 169 ohdr->u.at.aeth = rvt_compute_aeth(qp); 170 ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth); 171 hwords += sizeof(ohdr->u.at) / sizeof(u32); 172 bth2 = mask_psn(e->psn); 173 e->sent = 1; 174 } 175 bth0 = qp->s_ack_state << 24; 176 break; 177 178 case OP(RDMA_READ_RESPONSE_FIRST): 179 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE); 180 /* FALLTHROUGH */ 181 case OP(RDMA_READ_RESPONSE_MIDDLE): 182 ps->s_txreq->ss = &qp->s_ack_rdma_sge; 183 ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr; 184 if (ps->s_txreq->mr) 185 rvt_get_mr(ps->s_txreq->mr); 186 len = qp->s_ack_rdma_sge.sge.sge_length; 187 if (len > pmtu) { 188 len = pmtu; 189 middle = HFI1_CAP_IS_KSET(SDMA_AHG); 190 } else { 191 ohdr->u.aeth = rvt_compute_aeth(qp); 192 hwords++; 193 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST); 194 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 195 e->sent = 1; 196 } 197 bth0 = qp->s_ack_state << 24; 198 bth2 = mask_psn(qp->s_ack_rdma_psn++); 199 break; 200 201 default: 202 normal: 203 /* 204 * Send a regular ACK. 205 * Set the s_ack_state so we wait until after sending 206 * the ACK before setting s_ack_state to ACKNOWLEDGE 207 * (see above). 208 */ 209 qp->s_ack_state = OP(SEND_ONLY); 210 qp->s_flags &= ~RVT_S_ACK_PENDING; 211 ps->s_txreq->ss = NULL; 212 if (qp->s_nak_state) 213 ohdr->u.aeth = 214 cpu_to_be32((qp->r_msn & IB_MSN_MASK) | 215 (qp->s_nak_state << 216 IB_AETH_CREDIT_SHIFT)); 217 else 218 ohdr->u.aeth = rvt_compute_aeth(qp); 219 hwords++; 220 len = 0; 221 bth0 = OP(ACKNOWLEDGE) << 24; 222 bth2 = mask_psn(qp->s_ack_psn); 223 } 224 qp->s_rdma_ack_cnt++; 225 qp->s_hdrwords = hwords; 226 ps->s_txreq->sde = priv->s_sde; 227 ps->s_txreq->s_cur_size = len; 228 hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps); 229 /* pbc */ 230 ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; 231 return 1; 232 233 bail: 234 qp->s_ack_state = OP(ACKNOWLEDGE); 235 /* 236 * Ensure s_rdma_ack_cnt changes are committed prior to resetting 237 * RVT_S_RESP_PENDING 238 */ 239 smp_wmb(); 240 qp->s_flags &= ~(RVT_S_RESP_PENDING 241 | RVT_S_ACK_PENDING 242 | RVT_S_AHG_VALID); 243 return 0; 244 } 245 246 /** 247 * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC) 248 * @qp: a pointer to the QP 249 * 250 * Assumes s_lock is held. 251 * 252 * Return 1 if constructed; otherwise, return 0. 253 */ 254 int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps) 255 { 256 struct hfi1_qp_priv *priv = qp->priv; 257 struct hfi1_ibdev *dev = to_idev(qp->ibqp.device); 258 struct ib_other_headers *ohdr; 259 struct rvt_sge_state *ss; 260 struct rvt_swqe *wqe; 261 /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 262 u32 hwords = 5; 263 u32 len; 264 u32 bth0 = 0; 265 u32 bth2; 266 u32 pmtu = qp->pmtu; 267 char newreq; 268 int middle = 0; 269 int delta; 270 271 lockdep_assert_held(&qp->s_lock); 272 ps->s_txreq = get_txreq(ps->dev, qp); 273 if (IS_ERR(ps->s_txreq)) 274 goto bail_no_tx; 275 276 ohdr = &ps->s_txreq->phdr.hdr.u.oth; 277 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH) 278 ohdr = &ps->s_txreq->phdr.hdr.u.l.oth; 279 280 /* Sending responses has higher priority over sending requests. */ 281 if ((qp->s_flags & RVT_S_RESP_PENDING) && 282 make_rc_ack(dev, qp, ohdr, ps)) 283 return 1; 284 285 if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) { 286 if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND)) 287 goto bail; 288 /* We are in the error state, flush the work request. */ 289 smp_read_barrier_depends(); /* see post_one_send() */ 290 if (qp->s_last == READ_ONCE(qp->s_head)) 291 goto bail; 292 /* If DMAs are in progress, we can't flush immediately. */ 293 if (iowait_sdma_pending(&priv->s_iowait)) { 294 qp->s_flags |= RVT_S_WAIT_DMA; 295 goto bail; 296 } 297 clear_ahg(qp); 298 wqe = rvt_get_swqe_ptr(qp, qp->s_last); 299 hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ? 300 IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR); 301 /* will get called again */ 302 goto done_free_tx; 303 } 304 305 if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK)) 306 goto bail; 307 308 if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) { 309 if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) { 310 qp->s_flags |= RVT_S_WAIT_PSN; 311 goto bail; 312 } 313 qp->s_sending_psn = qp->s_psn; 314 qp->s_sending_hpsn = qp->s_psn - 1; 315 } 316 317 /* Send a request. */ 318 wqe = rvt_get_swqe_ptr(qp, qp->s_cur); 319 switch (qp->s_state) { 320 default: 321 if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK)) 322 goto bail; 323 /* 324 * Resend an old request or start a new one. 325 * 326 * We keep track of the current SWQE so that 327 * we don't reset the "furthest progress" state 328 * if we need to back up. 329 */ 330 newreq = 0; 331 if (qp->s_cur == qp->s_tail) { 332 /* Check if send work queue is empty. */ 333 smp_read_barrier_depends(); /* see post_one_send() */ 334 if (qp->s_tail == READ_ONCE(qp->s_head)) { 335 clear_ahg(qp); 336 goto bail; 337 } 338 /* 339 * If a fence is requested, wait for previous 340 * RDMA read and atomic operations to finish. 341 */ 342 if ((wqe->wr.send_flags & IB_SEND_FENCE) && 343 qp->s_num_rd_atomic) { 344 qp->s_flags |= RVT_S_WAIT_FENCE; 345 goto bail; 346 } 347 /* 348 * Local operations are processed immediately 349 * after all prior requests have completed 350 */ 351 if (wqe->wr.opcode == IB_WR_REG_MR || 352 wqe->wr.opcode == IB_WR_LOCAL_INV) { 353 int local_ops = 0; 354 int err = 0; 355 356 if (qp->s_last != qp->s_cur) 357 goto bail; 358 if (++qp->s_cur == qp->s_size) 359 qp->s_cur = 0; 360 if (++qp->s_tail == qp->s_size) 361 qp->s_tail = 0; 362 if (!(wqe->wr.send_flags & 363 RVT_SEND_COMPLETION_ONLY)) { 364 err = rvt_invalidate_rkey( 365 qp, 366 wqe->wr.ex.invalidate_rkey); 367 local_ops = 1; 368 } 369 hfi1_send_complete(qp, wqe, 370 err ? IB_WC_LOC_PROT_ERR 371 : IB_WC_SUCCESS); 372 if (local_ops) 373 atomic_dec(&qp->local_ops_pending); 374 qp->s_hdrwords = 0; 375 goto done_free_tx; 376 } 377 378 newreq = 1; 379 qp->s_psn = wqe->psn; 380 } 381 /* 382 * Note that we have to be careful not to modify the 383 * original work request since we may need to resend 384 * it. 385 */ 386 len = wqe->length; 387 ss = &qp->s_sge; 388 bth2 = mask_psn(qp->s_psn); 389 switch (wqe->wr.opcode) { 390 case IB_WR_SEND: 391 case IB_WR_SEND_WITH_IMM: 392 case IB_WR_SEND_WITH_INV: 393 /* If no credit, return. */ 394 if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) && 395 rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) { 396 qp->s_flags |= RVT_S_WAIT_SSN_CREDIT; 397 goto bail; 398 } 399 if (len > pmtu) { 400 qp->s_state = OP(SEND_FIRST); 401 len = pmtu; 402 break; 403 } 404 if (wqe->wr.opcode == IB_WR_SEND) { 405 qp->s_state = OP(SEND_ONLY); 406 } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 407 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE); 408 /* Immediate data comes after the BTH */ 409 ohdr->u.imm_data = wqe->wr.ex.imm_data; 410 hwords += 1; 411 } else { 412 qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE); 413 /* Invalidate rkey comes after the BTH */ 414 ohdr->u.ieth = cpu_to_be32( 415 wqe->wr.ex.invalidate_rkey); 416 hwords += 1; 417 } 418 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 419 bth0 |= IB_BTH_SOLICITED; 420 bth2 |= IB_BTH_REQ_ACK; 421 if (++qp->s_cur == qp->s_size) 422 qp->s_cur = 0; 423 break; 424 425 case IB_WR_RDMA_WRITE: 426 if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT)) 427 qp->s_lsn++; 428 /* FALLTHROUGH */ 429 case IB_WR_RDMA_WRITE_WITH_IMM: 430 /* If no credit, return. */ 431 if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) && 432 rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) { 433 qp->s_flags |= RVT_S_WAIT_SSN_CREDIT; 434 goto bail; 435 } 436 put_ib_reth_vaddr( 437 wqe->rdma_wr.remote_addr, 438 &ohdr->u.rc.reth); 439 ohdr->u.rc.reth.rkey = 440 cpu_to_be32(wqe->rdma_wr.rkey); 441 ohdr->u.rc.reth.length = cpu_to_be32(len); 442 hwords += sizeof(struct ib_reth) / sizeof(u32); 443 if (len > pmtu) { 444 qp->s_state = OP(RDMA_WRITE_FIRST); 445 len = pmtu; 446 break; 447 } 448 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { 449 qp->s_state = OP(RDMA_WRITE_ONLY); 450 } else { 451 qp->s_state = 452 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); 453 /* Immediate data comes after RETH */ 454 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data; 455 hwords += 1; 456 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 457 bth0 |= IB_BTH_SOLICITED; 458 } 459 bth2 |= IB_BTH_REQ_ACK; 460 if (++qp->s_cur == qp->s_size) 461 qp->s_cur = 0; 462 break; 463 464 case IB_WR_RDMA_READ: 465 /* 466 * Don't allow more operations to be started 467 * than the QP limits allow. 468 */ 469 if (newreq) { 470 if (qp->s_num_rd_atomic >= 471 qp->s_max_rd_atomic) { 472 qp->s_flags |= RVT_S_WAIT_RDMAR; 473 goto bail; 474 } 475 qp->s_num_rd_atomic++; 476 if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT)) 477 qp->s_lsn++; 478 } 479 put_ib_reth_vaddr( 480 wqe->rdma_wr.remote_addr, 481 &ohdr->u.rc.reth); 482 ohdr->u.rc.reth.rkey = 483 cpu_to_be32(wqe->rdma_wr.rkey); 484 ohdr->u.rc.reth.length = cpu_to_be32(len); 485 qp->s_state = OP(RDMA_READ_REQUEST); 486 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32); 487 ss = NULL; 488 len = 0; 489 bth2 |= IB_BTH_REQ_ACK; 490 if (++qp->s_cur == qp->s_size) 491 qp->s_cur = 0; 492 break; 493 494 case IB_WR_ATOMIC_CMP_AND_SWP: 495 case IB_WR_ATOMIC_FETCH_AND_ADD: 496 /* 497 * Don't allow more operations to be started 498 * than the QP limits allow. 499 */ 500 if (newreq) { 501 if (qp->s_num_rd_atomic >= 502 qp->s_max_rd_atomic) { 503 qp->s_flags |= RVT_S_WAIT_RDMAR; 504 goto bail; 505 } 506 qp->s_num_rd_atomic++; 507 if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT)) 508 qp->s_lsn++; 509 } 510 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { 511 qp->s_state = OP(COMPARE_SWAP); 512 put_ib_ateth_swap(wqe->atomic_wr.swap, 513 &ohdr->u.atomic_eth); 514 put_ib_ateth_compare(wqe->atomic_wr.compare_add, 515 &ohdr->u.atomic_eth); 516 } else { 517 qp->s_state = OP(FETCH_ADD); 518 put_ib_ateth_swap(wqe->atomic_wr.compare_add, 519 &ohdr->u.atomic_eth); 520 put_ib_ateth_compare(0, &ohdr->u.atomic_eth); 521 } 522 put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr, 523 &ohdr->u.atomic_eth); 524 ohdr->u.atomic_eth.rkey = cpu_to_be32( 525 wqe->atomic_wr.rkey); 526 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32); 527 ss = NULL; 528 len = 0; 529 bth2 |= IB_BTH_REQ_ACK; 530 if (++qp->s_cur == qp->s_size) 531 qp->s_cur = 0; 532 break; 533 534 default: 535 goto bail; 536 } 537 qp->s_sge.sge = wqe->sg_list[0]; 538 qp->s_sge.sg_list = wqe->sg_list + 1; 539 qp->s_sge.num_sge = wqe->wr.num_sge; 540 qp->s_sge.total_len = wqe->length; 541 qp->s_len = wqe->length; 542 if (newreq) { 543 qp->s_tail++; 544 if (qp->s_tail >= qp->s_size) 545 qp->s_tail = 0; 546 } 547 if (wqe->wr.opcode == IB_WR_RDMA_READ) 548 qp->s_psn = wqe->lpsn + 1; 549 else 550 qp->s_psn++; 551 break; 552 553 case OP(RDMA_READ_RESPONSE_FIRST): 554 /* 555 * qp->s_state is normally set to the opcode of the 556 * last packet constructed for new requests and therefore 557 * is never set to RDMA read response. 558 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing 559 * thread to indicate a SEND needs to be restarted from an 560 * earlier PSN without interfering with the sending thread. 561 * See restart_rc(). 562 */ 563 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu); 564 /* FALLTHROUGH */ 565 case OP(SEND_FIRST): 566 qp->s_state = OP(SEND_MIDDLE); 567 /* FALLTHROUGH */ 568 case OP(SEND_MIDDLE): 569 bth2 = mask_psn(qp->s_psn++); 570 ss = &qp->s_sge; 571 len = qp->s_len; 572 if (len > pmtu) { 573 len = pmtu; 574 middle = HFI1_CAP_IS_KSET(SDMA_AHG); 575 break; 576 } 577 if (wqe->wr.opcode == IB_WR_SEND) { 578 qp->s_state = OP(SEND_LAST); 579 } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 580 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); 581 /* Immediate data comes after the BTH */ 582 ohdr->u.imm_data = wqe->wr.ex.imm_data; 583 hwords += 1; 584 } else { 585 qp->s_state = OP(SEND_LAST_WITH_INVALIDATE); 586 /* invalidate data comes after the BTH */ 587 ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey); 588 hwords += 1; 589 } 590 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 591 bth0 |= IB_BTH_SOLICITED; 592 bth2 |= IB_BTH_REQ_ACK; 593 qp->s_cur++; 594 if (qp->s_cur >= qp->s_size) 595 qp->s_cur = 0; 596 break; 597 598 case OP(RDMA_READ_RESPONSE_LAST): 599 /* 600 * qp->s_state is normally set to the opcode of the 601 * last packet constructed for new requests and therefore 602 * is never set to RDMA read response. 603 * RDMA_READ_RESPONSE_LAST is used by the ACK processing 604 * thread to indicate a RDMA write needs to be restarted from 605 * an earlier PSN without interfering with the sending thread. 606 * See restart_rc(). 607 */ 608 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu); 609 /* FALLTHROUGH */ 610 case OP(RDMA_WRITE_FIRST): 611 qp->s_state = OP(RDMA_WRITE_MIDDLE); 612 /* FALLTHROUGH */ 613 case OP(RDMA_WRITE_MIDDLE): 614 bth2 = mask_psn(qp->s_psn++); 615 ss = &qp->s_sge; 616 len = qp->s_len; 617 if (len > pmtu) { 618 len = pmtu; 619 middle = HFI1_CAP_IS_KSET(SDMA_AHG); 620 break; 621 } 622 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { 623 qp->s_state = OP(RDMA_WRITE_LAST); 624 } else { 625 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); 626 /* Immediate data comes after the BTH */ 627 ohdr->u.imm_data = wqe->wr.ex.imm_data; 628 hwords += 1; 629 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 630 bth0 |= IB_BTH_SOLICITED; 631 } 632 bth2 |= IB_BTH_REQ_ACK; 633 qp->s_cur++; 634 if (qp->s_cur >= qp->s_size) 635 qp->s_cur = 0; 636 break; 637 638 case OP(RDMA_READ_RESPONSE_MIDDLE): 639 /* 640 * qp->s_state is normally set to the opcode of the 641 * last packet constructed for new requests and therefore 642 * is never set to RDMA read response. 643 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing 644 * thread to indicate a RDMA read needs to be restarted from 645 * an earlier PSN without interfering with the sending thread. 646 * See restart_rc(). 647 */ 648 len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu; 649 put_ib_reth_vaddr( 650 wqe->rdma_wr.remote_addr + len, 651 &ohdr->u.rc.reth); 652 ohdr->u.rc.reth.rkey = 653 cpu_to_be32(wqe->rdma_wr.rkey); 654 ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len); 655 qp->s_state = OP(RDMA_READ_REQUEST); 656 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32); 657 bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK; 658 qp->s_psn = wqe->lpsn + 1; 659 ss = NULL; 660 len = 0; 661 qp->s_cur++; 662 if (qp->s_cur == qp->s_size) 663 qp->s_cur = 0; 664 break; 665 } 666 qp->s_sending_hpsn = bth2; 667 delta = delta_psn(bth2, wqe->psn); 668 if (delta && delta % HFI1_PSN_CREDIT == 0) 669 bth2 |= IB_BTH_REQ_ACK; 670 if (qp->s_flags & RVT_S_SEND_ONE) { 671 qp->s_flags &= ~RVT_S_SEND_ONE; 672 qp->s_flags |= RVT_S_WAIT_ACK; 673 bth2 |= IB_BTH_REQ_ACK; 674 } 675 qp->s_len -= len; 676 qp->s_hdrwords = hwords; 677 ps->s_txreq->sde = priv->s_sde; 678 ps->s_txreq->ss = ss; 679 ps->s_txreq->s_cur_size = len; 680 hfi1_make_ruc_header( 681 qp, 682 ohdr, 683 bth0 | (qp->s_state << 24), 684 bth2, 685 middle, 686 ps); 687 /* pbc */ 688 ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; 689 return 1; 690 691 done_free_tx: 692 hfi1_put_txreq(ps->s_txreq); 693 ps->s_txreq = NULL; 694 return 1; 695 696 bail: 697 hfi1_put_txreq(ps->s_txreq); 698 699 bail_no_tx: 700 ps->s_txreq = NULL; 701 qp->s_flags &= ~RVT_S_BUSY; 702 qp->s_hdrwords = 0; 703 return 0; 704 } 705 706 /** 707 * hfi1_send_rc_ack - Construct an ACK packet and send it 708 * @qp: a pointer to the QP 709 * 710 * This is called from hfi1_rc_rcv() and handle_receive_interrupt(). 711 * Note that RDMA reads and atomics are handled in the 712 * send side QP state and send engine. 713 */ 714 void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp, 715 int is_fecn) 716 { 717 struct hfi1_ibport *ibp = rcd_to_iport(rcd); 718 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 719 u64 pbc, pbc_flags = 0; 720 u16 lrh0; 721 u16 sc5; 722 u32 bth0; 723 u32 hwords; 724 u32 vl, plen; 725 struct send_context *sc; 726 struct pio_buf *pbuf; 727 struct ib_header hdr; 728 struct ib_other_headers *ohdr; 729 unsigned long flags; 730 struct hfi1_qp_priv *priv = qp->priv; 731 732 /* clear the defer count */ 733 priv->r_adefered = 0; 734 735 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */ 736 if (qp->s_flags & RVT_S_RESP_PENDING) 737 goto queue_ack; 738 739 /* Ensure s_rdma_ack_cnt changes are committed */ 740 smp_read_barrier_depends(); 741 if (qp->s_rdma_ack_cnt) 742 goto queue_ack; 743 744 /* Construct the header */ 745 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */ 746 hwords = 6; 747 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) { 748 hwords += hfi1_make_grh(ibp, &hdr.u.l.grh, 749 &qp->remote_ah_attr.grh, hwords, 0); 750 ohdr = &hdr.u.l.oth; 751 lrh0 = HFI1_LRH_GRH; 752 } else { 753 ohdr = &hdr.u.oth; 754 lrh0 = HFI1_LRH_BTH; 755 } 756 /* read pkey_index w/o lock (its atomic) */ 757 bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24); 758 if (qp->s_mig_state == IB_MIG_MIGRATED) 759 bth0 |= IB_BTH_MIG_REQ; 760 if (qp->r_nak_state) 761 ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) | 762 (qp->r_nak_state << 763 IB_AETH_CREDIT_SHIFT)); 764 else 765 ohdr->u.aeth = rvt_compute_aeth(qp); 766 sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl]; 767 /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */ 768 pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT); 769 lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4; 770 hdr.lrh[0] = cpu_to_be16(lrh0); 771 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid); 772 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC); 773 hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits); 774 ohdr->bth[0] = cpu_to_be32(bth0); 775 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn); 776 ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT); 777 ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn)); 778 779 /* Don't try to send ACKs if the link isn't ACTIVE */ 780 if (driver_lstate(ppd) != IB_PORT_ACTIVE) 781 return; 782 783 sc = rcd->sc; 784 plen = 2 /* PBC */ + hwords; 785 vl = sc_to_vlt(ppd->dd, sc5); 786 pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen); 787 788 pbuf = sc_buffer_alloc(sc, plen, NULL, NULL); 789 if (!pbuf) { 790 /* 791 * We have no room to send at the moment. Pass 792 * responsibility for sending the ACK to the send engine 793 * so that when enough buffer space becomes available, 794 * the ACK is sent ahead of other outgoing packets. 795 */ 796 goto queue_ack; 797 } 798 799 trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr); 800 801 /* write the pbc and data */ 802 ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords); 803 804 return; 805 806 queue_ack: 807 spin_lock_irqsave(&qp->s_lock, flags); 808 if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) 809 goto unlock; 810 this_cpu_inc(*ibp->rvp.rc_qacks); 811 qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING; 812 qp->s_nak_state = qp->r_nak_state; 813 qp->s_ack_psn = qp->r_ack_psn; 814 if (is_fecn) 815 qp->s_flags |= RVT_S_ECN; 816 817 /* Schedule the send engine. */ 818 hfi1_schedule_send(qp); 819 unlock: 820 spin_unlock_irqrestore(&qp->s_lock, flags); 821 } 822 823 /** 824 * reset_psn - reset the QP state to send starting from PSN 825 * @qp: the QP 826 * @psn: the packet sequence number to restart at 827 * 828 * This is called from hfi1_rc_rcv() to process an incoming RC ACK 829 * for the given QP. 830 * Called at interrupt level with the QP s_lock held. 831 */ 832 static void reset_psn(struct rvt_qp *qp, u32 psn) 833 { 834 u32 n = qp->s_acked; 835 struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n); 836 u32 opcode; 837 838 lockdep_assert_held(&qp->s_lock); 839 qp->s_cur = n; 840 841 /* 842 * If we are starting the request from the beginning, 843 * let the normal send code handle initialization. 844 */ 845 if (cmp_psn(psn, wqe->psn) <= 0) { 846 qp->s_state = OP(SEND_LAST); 847 goto done; 848 } 849 850 /* Find the work request opcode corresponding to the given PSN. */ 851 opcode = wqe->wr.opcode; 852 for (;;) { 853 int diff; 854 855 if (++n == qp->s_size) 856 n = 0; 857 if (n == qp->s_tail) 858 break; 859 wqe = rvt_get_swqe_ptr(qp, n); 860 diff = cmp_psn(psn, wqe->psn); 861 if (diff < 0) 862 break; 863 qp->s_cur = n; 864 /* 865 * If we are starting the request from the beginning, 866 * let the normal send code handle initialization. 867 */ 868 if (diff == 0) { 869 qp->s_state = OP(SEND_LAST); 870 goto done; 871 } 872 opcode = wqe->wr.opcode; 873 } 874 875 /* 876 * Set the state to restart in the middle of a request. 877 * Don't change the s_sge, s_cur_sge, or s_cur_size. 878 * See hfi1_make_rc_req(). 879 */ 880 switch (opcode) { 881 case IB_WR_SEND: 882 case IB_WR_SEND_WITH_IMM: 883 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST); 884 break; 885 886 case IB_WR_RDMA_WRITE: 887 case IB_WR_RDMA_WRITE_WITH_IMM: 888 qp->s_state = OP(RDMA_READ_RESPONSE_LAST); 889 break; 890 891 case IB_WR_RDMA_READ: 892 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE); 893 break; 894 895 default: 896 /* 897 * This case shouldn't happen since its only 898 * one PSN per req. 899 */ 900 qp->s_state = OP(SEND_LAST); 901 } 902 done: 903 qp->s_psn = psn; 904 /* 905 * Set RVT_S_WAIT_PSN as rc_complete() may start the timer 906 * asynchronously before the send engine can get scheduled. 907 * Doing it in hfi1_make_rc_req() is too late. 908 */ 909 if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) && 910 (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) 911 qp->s_flags |= RVT_S_WAIT_PSN; 912 qp->s_flags &= ~RVT_S_AHG_VALID; 913 } 914 915 /* 916 * Back up requester to resend the last un-ACKed request. 917 * The QP r_lock and s_lock should be held and interrupts disabled. 918 */ 919 void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait) 920 { 921 struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 922 struct hfi1_ibport *ibp; 923 924 lockdep_assert_held(&qp->r_lock); 925 lockdep_assert_held(&qp->s_lock); 926 if (qp->s_retry == 0) { 927 if (qp->s_mig_state == IB_MIG_ARMED) { 928 hfi1_migrate_qp(qp); 929 qp->s_retry = qp->s_retry_cnt; 930 } else if (qp->s_last == qp->s_acked) { 931 hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR); 932 rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 933 return; 934 } else { /* need to handle delayed completion */ 935 return; 936 } 937 } else { 938 qp->s_retry--; 939 } 940 941 ibp = to_iport(qp->ibqp.device, qp->port_num); 942 if (wqe->wr.opcode == IB_WR_RDMA_READ) 943 ibp->rvp.n_rc_resends++; 944 else 945 ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn); 946 947 qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR | 948 RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN | 949 RVT_S_WAIT_ACK); 950 if (wait) 951 qp->s_flags |= RVT_S_SEND_ONE; 952 reset_psn(qp, psn); 953 } 954 955 /* 956 * Set qp->s_sending_psn to the next PSN after the given one. 957 * This would be psn+1 except when RDMA reads are present. 958 */ 959 static void reset_sending_psn(struct rvt_qp *qp, u32 psn) 960 { 961 struct rvt_swqe *wqe; 962 u32 n = qp->s_last; 963 964 lockdep_assert_held(&qp->s_lock); 965 /* Find the work request corresponding to the given PSN. */ 966 for (;;) { 967 wqe = rvt_get_swqe_ptr(qp, n); 968 if (cmp_psn(psn, wqe->lpsn) <= 0) { 969 if (wqe->wr.opcode == IB_WR_RDMA_READ) 970 qp->s_sending_psn = wqe->lpsn + 1; 971 else 972 qp->s_sending_psn = psn + 1; 973 break; 974 } 975 if (++n == qp->s_size) 976 n = 0; 977 if (n == qp->s_tail) 978 break; 979 } 980 } 981 982 /* 983 * This should be called with the QP s_lock held and interrupts disabled. 984 */ 985 void hfi1_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr) 986 { 987 struct ib_other_headers *ohdr; 988 struct rvt_swqe *wqe; 989 u32 opcode; 990 u32 psn; 991 992 lockdep_assert_held(&qp->s_lock); 993 if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK)) 994 return; 995 996 /* Find out where the BTH is */ 997 if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH) 998 ohdr = &hdr->u.oth; 999 else 1000 ohdr = &hdr->u.l.oth; 1001 1002 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; 1003 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && 1004 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { 1005 WARN_ON(!qp->s_rdma_ack_cnt); 1006 qp->s_rdma_ack_cnt--; 1007 return; 1008 } 1009 1010 psn = be32_to_cpu(ohdr->bth[2]); 1011 reset_sending_psn(qp, psn); 1012 1013 /* 1014 * Start timer after a packet requesting an ACK has been sent and 1015 * there are still requests that haven't been acked. 1016 */ 1017 if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && 1018 !(qp->s_flags & 1019 (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) && 1020 (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) 1021 rvt_add_retry_timer(qp); 1022 1023 while (qp->s_last != qp->s_acked) { 1024 u32 s_last; 1025 1026 wqe = rvt_get_swqe_ptr(qp, qp->s_last); 1027 if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 && 1028 cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) 1029 break; 1030 s_last = qp->s_last; 1031 if (++s_last >= qp->s_size) 1032 s_last = 0; 1033 qp->s_last = s_last; 1034 /* see post_send() */ 1035 barrier(); 1036 rvt_put_swqe(wqe); 1037 rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS); 1038 } 1039 /* 1040 * If we were waiting for sends to complete before re-sending, 1041 * and they are now complete, restart sending. 1042 */ 1043 trace_hfi1_sendcomplete(qp, psn); 1044 if (qp->s_flags & RVT_S_WAIT_PSN && 1045 cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) { 1046 qp->s_flags &= ~RVT_S_WAIT_PSN; 1047 qp->s_sending_psn = qp->s_psn; 1048 qp->s_sending_hpsn = qp->s_psn - 1; 1049 hfi1_schedule_send(qp); 1050 } 1051 } 1052 1053 static inline void update_last_psn(struct rvt_qp *qp, u32 psn) 1054 { 1055 qp->s_last_psn = psn; 1056 } 1057 1058 /* 1059 * Generate a SWQE completion. 1060 * This is similar to hfi1_send_complete but has to check to be sure 1061 * that the SGEs are not being referenced if the SWQE is being resent. 1062 */ 1063 static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp, 1064 struct rvt_swqe *wqe, 1065 struct hfi1_ibport *ibp) 1066 { 1067 lockdep_assert_held(&qp->s_lock); 1068 /* 1069 * Don't decrement refcount and don't generate a 1070 * completion if the SWQE is being resent until the send 1071 * is finished. 1072 */ 1073 if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 || 1074 cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) { 1075 u32 s_last; 1076 1077 rvt_put_swqe(wqe); 1078 s_last = qp->s_last; 1079 if (++s_last >= qp->s_size) 1080 s_last = 0; 1081 qp->s_last = s_last; 1082 /* see post_send() */ 1083 barrier(); 1084 rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS); 1085 } else { 1086 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 1087 1088 this_cpu_inc(*ibp->rvp.rc_delayed_comp); 1089 /* 1090 * If send progress not running attempt to progress 1091 * SDMA queue. 1092 */ 1093 if (ppd->dd->flags & HFI1_HAS_SEND_DMA) { 1094 struct sdma_engine *engine; 1095 u8 sc5; 1096 1097 /* For now use sc to find engine */ 1098 sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl]; 1099 engine = qp_to_sdma_engine(qp, sc5); 1100 sdma_engine_progress_schedule(engine); 1101 } 1102 } 1103 1104 qp->s_retry = qp->s_retry_cnt; 1105 update_last_psn(qp, wqe->lpsn); 1106 1107 /* 1108 * If we are completing a request which is in the process of 1109 * being resent, we can stop re-sending it since we know the 1110 * responder has already seen it. 1111 */ 1112 if (qp->s_acked == qp->s_cur) { 1113 if (++qp->s_cur >= qp->s_size) 1114 qp->s_cur = 0; 1115 qp->s_acked = qp->s_cur; 1116 wqe = rvt_get_swqe_ptr(qp, qp->s_cur); 1117 if (qp->s_acked != qp->s_tail) { 1118 qp->s_state = OP(SEND_LAST); 1119 qp->s_psn = wqe->psn; 1120 } 1121 } else { 1122 if (++qp->s_acked >= qp->s_size) 1123 qp->s_acked = 0; 1124 if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur) 1125 qp->s_draining = 0; 1126 wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1127 } 1128 return wqe; 1129 } 1130 1131 /** 1132 * do_rc_ack - process an incoming RC ACK 1133 * @qp: the QP the ACK came in on 1134 * @psn: the packet sequence number of the ACK 1135 * @opcode: the opcode of the request that resulted in the ACK 1136 * 1137 * This is called from rc_rcv_resp() to process an incoming RC ACK 1138 * for the given QP. 1139 * May be called at interrupt level, with the QP s_lock held. 1140 * Returns 1 if OK, 0 if current operation should be aborted (NAK). 1141 */ 1142 static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode, 1143 u64 val, struct hfi1_ctxtdata *rcd) 1144 { 1145 struct hfi1_ibport *ibp; 1146 enum ib_wc_status status; 1147 struct rvt_swqe *wqe; 1148 int ret = 0; 1149 u32 ack_psn; 1150 int diff; 1151 1152 lockdep_assert_held(&qp->s_lock); 1153 /* 1154 * Note that NAKs implicitly ACK outstanding SEND and RDMA write 1155 * requests and implicitly NAK RDMA read and atomic requests issued 1156 * before the NAK'ed request. The MSN won't include the NAK'ed 1157 * request but will include an ACK'ed request(s). 1158 */ 1159 ack_psn = psn; 1160 if (aeth >> IB_AETH_NAK_SHIFT) 1161 ack_psn--; 1162 wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1163 ibp = rcd_to_iport(rcd); 1164 1165 /* 1166 * The MSN might be for a later WQE than the PSN indicates so 1167 * only complete WQEs that the PSN finishes. 1168 */ 1169 while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) { 1170 /* 1171 * RDMA_READ_RESPONSE_ONLY is a special case since 1172 * we want to generate completion events for everything 1173 * before the RDMA read, copy the data, then generate 1174 * the completion for the read. 1175 */ 1176 if (wqe->wr.opcode == IB_WR_RDMA_READ && 1177 opcode == OP(RDMA_READ_RESPONSE_ONLY) && 1178 diff == 0) { 1179 ret = 1; 1180 goto bail_stop; 1181 } 1182 /* 1183 * If this request is a RDMA read or atomic, and the ACK is 1184 * for a later operation, this ACK NAKs the RDMA read or 1185 * atomic. In other words, only a RDMA_READ_LAST or ONLY 1186 * can ACK a RDMA read and likewise for atomic ops. Note 1187 * that the NAK case can only happen if relaxed ordering is 1188 * used and requests are sent after an RDMA read or atomic 1189 * is sent but before the response is received. 1190 */ 1191 if ((wqe->wr.opcode == IB_WR_RDMA_READ && 1192 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || 1193 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1194 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && 1195 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { 1196 /* Retry this request. */ 1197 if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) { 1198 qp->r_flags |= RVT_R_RDMAR_SEQ; 1199 hfi1_restart_rc(qp, qp->s_last_psn + 1, 0); 1200 if (list_empty(&qp->rspwait)) { 1201 qp->r_flags |= RVT_R_RSP_SEND; 1202 rvt_get_qp(qp); 1203 list_add_tail(&qp->rspwait, 1204 &rcd->qp_wait_list); 1205 } 1206 } 1207 /* 1208 * No need to process the ACK/NAK since we are 1209 * restarting an earlier request. 1210 */ 1211 goto bail_stop; 1212 } 1213 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1214 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { 1215 u64 *vaddr = wqe->sg_list[0].vaddr; 1216 *vaddr = val; 1217 } 1218 if (qp->s_num_rd_atomic && 1219 (wqe->wr.opcode == IB_WR_RDMA_READ || 1220 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1221 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { 1222 qp->s_num_rd_atomic--; 1223 /* Restart sending task if fence is complete */ 1224 if ((qp->s_flags & RVT_S_WAIT_FENCE) && 1225 !qp->s_num_rd_atomic) { 1226 qp->s_flags &= ~(RVT_S_WAIT_FENCE | 1227 RVT_S_WAIT_ACK); 1228 hfi1_schedule_send(qp); 1229 } else if (qp->s_flags & RVT_S_WAIT_RDMAR) { 1230 qp->s_flags &= ~(RVT_S_WAIT_RDMAR | 1231 RVT_S_WAIT_ACK); 1232 hfi1_schedule_send(qp); 1233 } 1234 } 1235 wqe = do_rc_completion(qp, wqe, ibp); 1236 if (qp->s_acked == qp->s_tail) 1237 break; 1238 } 1239 1240 switch (aeth >> IB_AETH_NAK_SHIFT) { 1241 case 0: /* ACK */ 1242 this_cpu_inc(*ibp->rvp.rc_acks); 1243 if (qp->s_acked != qp->s_tail) { 1244 /* 1245 * We are expecting more ACKs so 1246 * mod the retry timer. 1247 */ 1248 rvt_mod_retry_timer(qp); 1249 /* 1250 * We can stop re-sending the earlier packets and 1251 * continue with the next packet the receiver wants. 1252 */ 1253 if (cmp_psn(qp->s_psn, psn) <= 0) 1254 reset_psn(qp, psn + 1); 1255 } else { 1256 /* No more acks - kill all timers */ 1257 rvt_stop_rc_timers(qp); 1258 if (cmp_psn(qp->s_psn, psn) <= 0) { 1259 qp->s_state = OP(SEND_LAST); 1260 qp->s_psn = psn + 1; 1261 } 1262 } 1263 if (qp->s_flags & RVT_S_WAIT_ACK) { 1264 qp->s_flags &= ~RVT_S_WAIT_ACK; 1265 hfi1_schedule_send(qp); 1266 } 1267 rvt_get_credit(qp, aeth); 1268 qp->s_rnr_retry = qp->s_rnr_retry_cnt; 1269 qp->s_retry = qp->s_retry_cnt; 1270 update_last_psn(qp, psn); 1271 return 1; 1272 1273 case 1: /* RNR NAK */ 1274 ibp->rvp.n_rnr_naks++; 1275 if (qp->s_acked == qp->s_tail) 1276 goto bail_stop; 1277 if (qp->s_flags & RVT_S_WAIT_RNR) 1278 goto bail_stop; 1279 if (qp->s_rnr_retry == 0) { 1280 status = IB_WC_RNR_RETRY_EXC_ERR; 1281 goto class_b; 1282 } 1283 if (qp->s_rnr_retry_cnt < 7) 1284 qp->s_rnr_retry--; 1285 1286 /* The last valid PSN is the previous PSN. */ 1287 update_last_psn(qp, psn - 1); 1288 1289 ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn); 1290 1291 reset_psn(qp, psn); 1292 1293 qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK); 1294 rvt_stop_rc_timers(qp); 1295 rvt_add_rnr_timer(qp, aeth); 1296 return 0; 1297 1298 case 3: /* NAK */ 1299 if (qp->s_acked == qp->s_tail) 1300 goto bail_stop; 1301 /* The last valid PSN is the previous PSN. */ 1302 update_last_psn(qp, psn - 1); 1303 switch ((aeth >> IB_AETH_CREDIT_SHIFT) & 1304 IB_AETH_CREDIT_MASK) { 1305 case 0: /* PSN sequence error */ 1306 ibp->rvp.n_seq_naks++; 1307 /* 1308 * Back up to the responder's expected PSN. 1309 * Note that we might get a NAK in the middle of an 1310 * RDMA READ response which terminates the RDMA 1311 * READ. 1312 */ 1313 hfi1_restart_rc(qp, psn, 0); 1314 hfi1_schedule_send(qp); 1315 break; 1316 1317 case 1: /* Invalid Request */ 1318 status = IB_WC_REM_INV_REQ_ERR; 1319 ibp->rvp.n_other_naks++; 1320 goto class_b; 1321 1322 case 2: /* Remote Access Error */ 1323 status = IB_WC_REM_ACCESS_ERR; 1324 ibp->rvp.n_other_naks++; 1325 goto class_b; 1326 1327 case 3: /* Remote Operation Error */ 1328 status = IB_WC_REM_OP_ERR; 1329 ibp->rvp.n_other_naks++; 1330 class_b: 1331 if (qp->s_last == qp->s_acked) { 1332 hfi1_send_complete(qp, wqe, status); 1333 rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1334 } 1335 break; 1336 1337 default: 1338 /* Ignore other reserved NAK error codes */ 1339 goto reserved; 1340 } 1341 qp->s_retry = qp->s_retry_cnt; 1342 qp->s_rnr_retry = qp->s_rnr_retry_cnt; 1343 goto bail_stop; 1344 1345 default: /* 2: reserved */ 1346 reserved: 1347 /* Ignore reserved NAK codes. */ 1348 goto bail_stop; 1349 } 1350 /* cannot be reached */ 1351 bail_stop: 1352 rvt_stop_rc_timers(qp); 1353 return ret; 1354 } 1355 1356 /* 1357 * We have seen an out of sequence RDMA read middle or last packet. 1358 * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE. 1359 */ 1360 static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn, 1361 struct hfi1_ctxtdata *rcd) 1362 { 1363 struct rvt_swqe *wqe; 1364 1365 lockdep_assert_held(&qp->s_lock); 1366 /* Remove QP from retry timer */ 1367 rvt_stop_rc_timers(qp); 1368 1369 wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1370 1371 while (cmp_psn(psn, wqe->lpsn) > 0) { 1372 if (wqe->wr.opcode == IB_WR_RDMA_READ || 1373 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1374 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) 1375 break; 1376 wqe = do_rc_completion(qp, wqe, ibp); 1377 } 1378 1379 ibp->rvp.n_rdma_seq++; 1380 qp->r_flags |= RVT_R_RDMAR_SEQ; 1381 hfi1_restart_rc(qp, qp->s_last_psn + 1, 0); 1382 if (list_empty(&qp->rspwait)) { 1383 qp->r_flags |= RVT_R_RSP_SEND; 1384 rvt_get_qp(qp); 1385 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 1386 } 1387 } 1388 1389 /** 1390 * rc_rcv_resp - process an incoming RC response packet 1391 * @ibp: the port this packet came in on 1392 * @ohdr: the other headers for this packet 1393 * @data: the packet data 1394 * @tlen: the packet length 1395 * @qp: the QP for this packet 1396 * @opcode: the opcode for this packet 1397 * @psn: the packet sequence number for this packet 1398 * @hdrsize: the header length 1399 * @pmtu: the path MTU 1400 * 1401 * This is called from hfi1_rc_rcv() to process an incoming RC response 1402 * packet for the given QP. 1403 * Called at interrupt level. 1404 */ 1405 static void rc_rcv_resp(struct hfi1_ibport *ibp, 1406 struct ib_other_headers *ohdr, 1407 void *data, u32 tlen, struct rvt_qp *qp, 1408 u32 opcode, u32 psn, u32 hdrsize, u32 pmtu, 1409 struct hfi1_ctxtdata *rcd) 1410 { 1411 struct rvt_swqe *wqe; 1412 enum ib_wc_status status; 1413 unsigned long flags; 1414 int diff; 1415 u32 pad; 1416 u32 aeth; 1417 u64 val; 1418 1419 spin_lock_irqsave(&qp->s_lock, flags); 1420 1421 trace_hfi1_ack(qp, psn); 1422 1423 /* Ignore invalid responses. */ 1424 smp_read_barrier_depends(); /* see post_one_send */ 1425 if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0) 1426 goto ack_done; 1427 1428 /* Ignore duplicate responses. */ 1429 diff = cmp_psn(psn, qp->s_last_psn); 1430 if (unlikely(diff <= 0)) { 1431 /* Update credits for "ghost" ACKs */ 1432 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { 1433 aeth = be32_to_cpu(ohdr->u.aeth); 1434 if ((aeth >> IB_AETH_NAK_SHIFT) == 0) 1435 rvt_get_credit(qp, aeth); 1436 } 1437 goto ack_done; 1438 } 1439 1440 /* 1441 * Skip everything other than the PSN we expect, if we are waiting 1442 * for a reply to a restarted RDMA read or atomic op. 1443 */ 1444 if (qp->r_flags & RVT_R_RDMAR_SEQ) { 1445 if (cmp_psn(psn, qp->s_last_psn + 1) != 0) 1446 goto ack_done; 1447 qp->r_flags &= ~RVT_R_RDMAR_SEQ; 1448 } 1449 1450 if (unlikely(qp->s_acked == qp->s_tail)) 1451 goto ack_done; 1452 wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1453 status = IB_WC_SUCCESS; 1454 1455 switch (opcode) { 1456 case OP(ACKNOWLEDGE): 1457 case OP(ATOMIC_ACKNOWLEDGE): 1458 case OP(RDMA_READ_RESPONSE_FIRST): 1459 aeth = be32_to_cpu(ohdr->u.aeth); 1460 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) 1461 val = ib_u64_get(&ohdr->u.at.atomic_ack_eth); 1462 else 1463 val = 0; 1464 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || 1465 opcode != OP(RDMA_READ_RESPONSE_FIRST)) 1466 goto ack_done; 1467 wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1468 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1469 goto ack_op_err; 1470 /* 1471 * If this is a response to a resent RDMA read, we 1472 * have to be careful to copy the data to the right 1473 * location. 1474 */ 1475 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge, 1476 wqe, psn, pmtu); 1477 goto read_middle; 1478 1479 case OP(RDMA_READ_RESPONSE_MIDDLE): 1480 /* no AETH, no ACK */ 1481 if (unlikely(cmp_psn(psn, qp->s_last_psn + 1))) 1482 goto ack_seq_err; 1483 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1484 goto ack_op_err; 1485 read_middle: 1486 if (unlikely(tlen != (hdrsize + pmtu + 4))) 1487 goto ack_len_err; 1488 if (unlikely(pmtu >= qp->s_rdma_read_len)) 1489 goto ack_len_err; 1490 1491 /* 1492 * We got a response so update the timeout. 1493 * 4.096 usec. * (1 << qp->timeout) 1494 */ 1495 rvt_mod_retry_timer(qp); 1496 if (qp->s_flags & RVT_S_WAIT_ACK) { 1497 qp->s_flags &= ~RVT_S_WAIT_ACK; 1498 hfi1_schedule_send(qp); 1499 } 1500 1501 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) 1502 qp->s_retry = qp->s_retry_cnt; 1503 1504 /* 1505 * Update the RDMA receive state but do the copy w/o 1506 * holding the locks and blocking interrupts. 1507 */ 1508 qp->s_rdma_read_len -= pmtu; 1509 update_last_psn(qp, psn); 1510 spin_unlock_irqrestore(&qp->s_lock, flags); 1511 hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, false, false); 1512 goto bail; 1513 1514 case OP(RDMA_READ_RESPONSE_ONLY): 1515 aeth = be32_to_cpu(ohdr->u.aeth); 1516 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) 1517 goto ack_done; 1518 /* Get the number of bytes the message was padded by. */ 1519 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1520 /* 1521 * Check that the data size is >= 0 && <= pmtu. 1522 * Remember to account for ICRC (4). 1523 */ 1524 if (unlikely(tlen < (hdrsize + pad + 4))) 1525 goto ack_len_err; 1526 /* 1527 * If this is a response to a resent RDMA read, we 1528 * have to be careful to copy the data to the right 1529 * location. 1530 */ 1531 wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1532 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge, 1533 wqe, psn, pmtu); 1534 goto read_last; 1535 1536 case OP(RDMA_READ_RESPONSE_LAST): 1537 /* ACKs READ req. */ 1538 if (unlikely(cmp_psn(psn, qp->s_last_psn + 1))) 1539 goto ack_seq_err; 1540 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1541 goto ack_op_err; 1542 /* Get the number of bytes the message was padded by. */ 1543 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1544 /* 1545 * Check that the data size is >= 1 && <= pmtu. 1546 * Remember to account for ICRC (4). 1547 */ 1548 if (unlikely(tlen <= (hdrsize + pad + 4))) 1549 goto ack_len_err; 1550 read_last: 1551 tlen -= hdrsize + pad + 4; 1552 if (unlikely(tlen != qp->s_rdma_read_len)) 1553 goto ack_len_err; 1554 aeth = be32_to_cpu(ohdr->u.aeth); 1555 hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, false, false); 1556 WARN_ON(qp->s_rdma_read_sge.num_sge); 1557 (void)do_rc_ack(qp, aeth, psn, 1558 OP(RDMA_READ_RESPONSE_LAST), 0, rcd); 1559 goto ack_done; 1560 } 1561 1562 ack_op_err: 1563 status = IB_WC_LOC_QP_OP_ERR; 1564 goto ack_err; 1565 1566 ack_seq_err: 1567 rdma_seq_err(qp, ibp, psn, rcd); 1568 goto ack_done; 1569 1570 ack_len_err: 1571 status = IB_WC_LOC_LEN_ERR; 1572 ack_err: 1573 if (qp->s_last == qp->s_acked) { 1574 hfi1_send_complete(qp, wqe, status); 1575 rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1576 } 1577 ack_done: 1578 spin_unlock_irqrestore(&qp->s_lock, flags); 1579 bail: 1580 return; 1581 } 1582 1583 static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd, 1584 struct rvt_qp *qp) 1585 { 1586 if (list_empty(&qp->rspwait)) { 1587 qp->r_flags |= RVT_R_RSP_NAK; 1588 rvt_get_qp(qp); 1589 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 1590 } 1591 } 1592 1593 static inline void rc_cancel_ack(struct rvt_qp *qp) 1594 { 1595 struct hfi1_qp_priv *priv = qp->priv; 1596 1597 priv->r_adefered = 0; 1598 if (list_empty(&qp->rspwait)) 1599 return; 1600 list_del_init(&qp->rspwait); 1601 qp->r_flags &= ~RVT_R_RSP_NAK; 1602 rvt_put_qp(qp); 1603 } 1604 1605 /** 1606 * rc_rcv_error - process an incoming duplicate or error RC packet 1607 * @ohdr: the other headers for this packet 1608 * @data: the packet data 1609 * @qp: the QP for this packet 1610 * @opcode: the opcode for this packet 1611 * @psn: the packet sequence number for this packet 1612 * @diff: the difference between the PSN and the expected PSN 1613 * 1614 * This is called from hfi1_rc_rcv() to process an unexpected 1615 * incoming RC packet for the given QP. 1616 * Called at interrupt level. 1617 * Return 1 if no more processing is needed; otherwise return 0 to 1618 * schedule a response to be sent. 1619 */ 1620 static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data, 1621 struct rvt_qp *qp, u32 opcode, u32 psn, 1622 int diff, struct hfi1_ctxtdata *rcd) 1623 { 1624 struct hfi1_ibport *ibp = rcd_to_iport(rcd); 1625 struct rvt_ack_entry *e; 1626 unsigned long flags; 1627 u8 i, prev; 1628 int old_req; 1629 1630 trace_hfi1_rcv_error(qp, psn); 1631 if (diff > 0) { 1632 /* 1633 * Packet sequence error. 1634 * A NAK will ACK earlier sends and RDMA writes. 1635 * Don't queue the NAK if we already sent one. 1636 */ 1637 if (!qp->r_nak_state) { 1638 ibp->rvp.n_rc_seqnak++; 1639 qp->r_nak_state = IB_NAK_PSN_ERROR; 1640 /* Use the expected PSN. */ 1641 qp->r_ack_psn = qp->r_psn; 1642 /* 1643 * Wait to send the sequence NAK until all packets 1644 * in the receive queue have been processed. 1645 * Otherwise, we end up propagating congestion. 1646 */ 1647 rc_defered_ack(rcd, qp); 1648 } 1649 goto done; 1650 } 1651 1652 /* 1653 * Handle a duplicate request. Don't re-execute SEND, RDMA 1654 * write or atomic op. Don't NAK errors, just silently drop 1655 * the duplicate request. Note that r_sge, r_len, and 1656 * r_rcv_len may be in use so don't modify them. 1657 * 1658 * We are supposed to ACK the earliest duplicate PSN but we 1659 * can coalesce an outstanding duplicate ACK. We have to 1660 * send the earliest so that RDMA reads can be restarted at 1661 * the requester's expected PSN. 1662 * 1663 * First, find where this duplicate PSN falls within the 1664 * ACKs previously sent. 1665 * old_req is true if there is an older response that is scheduled 1666 * to be sent before sending this one. 1667 */ 1668 e = NULL; 1669 old_req = 1; 1670 ibp->rvp.n_rc_dupreq++; 1671 1672 spin_lock_irqsave(&qp->s_lock, flags); 1673 1674 for (i = qp->r_head_ack_queue; ; i = prev) { 1675 if (i == qp->s_tail_ack_queue) 1676 old_req = 0; 1677 if (i) 1678 prev = i - 1; 1679 else 1680 prev = HFI1_MAX_RDMA_ATOMIC; 1681 if (prev == qp->r_head_ack_queue) { 1682 e = NULL; 1683 break; 1684 } 1685 e = &qp->s_ack_queue[prev]; 1686 if (!e->opcode) { 1687 e = NULL; 1688 break; 1689 } 1690 if (cmp_psn(psn, e->psn) >= 0) { 1691 if (prev == qp->s_tail_ack_queue && 1692 cmp_psn(psn, e->lpsn) <= 0) 1693 old_req = 0; 1694 break; 1695 } 1696 } 1697 switch (opcode) { 1698 case OP(RDMA_READ_REQUEST): { 1699 struct ib_reth *reth; 1700 u32 offset; 1701 u32 len; 1702 1703 /* 1704 * If we didn't find the RDMA read request in the ack queue, 1705 * we can ignore this request. 1706 */ 1707 if (!e || e->opcode != OP(RDMA_READ_REQUEST)) 1708 goto unlock_done; 1709 /* RETH comes after BTH */ 1710 reth = &ohdr->u.rc.reth; 1711 /* 1712 * Address range must be a subset of the original 1713 * request and start on pmtu boundaries. 1714 * We reuse the old ack_queue slot since the requester 1715 * should not back up and request an earlier PSN for the 1716 * same request. 1717 */ 1718 offset = delta_psn(psn, e->psn) * qp->pmtu; 1719 len = be32_to_cpu(reth->length); 1720 if (unlikely(offset + len != e->rdma_sge.sge_length)) 1721 goto unlock_done; 1722 if (e->rdma_sge.mr) { 1723 rvt_put_mr(e->rdma_sge.mr); 1724 e->rdma_sge.mr = NULL; 1725 } 1726 if (len != 0) { 1727 u32 rkey = be32_to_cpu(reth->rkey); 1728 u64 vaddr = get_ib_reth_vaddr(reth); 1729 int ok; 1730 1731 ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey, 1732 IB_ACCESS_REMOTE_READ); 1733 if (unlikely(!ok)) 1734 goto unlock_done; 1735 } else { 1736 e->rdma_sge.vaddr = NULL; 1737 e->rdma_sge.length = 0; 1738 e->rdma_sge.sge_length = 0; 1739 } 1740 e->psn = psn; 1741 if (old_req) 1742 goto unlock_done; 1743 qp->s_tail_ack_queue = prev; 1744 break; 1745 } 1746 1747 case OP(COMPARE_SWAP): 1748 case OP(FETCH_ADD): { 1749 /* 1750 * If we didn't find the atomic request in the ack queue 1751 * or the send engine is already backed up to send an 1752 * earlier entry, we can ignore this request. 1753 */ 1754 if (!e || e->opcode != (u8)opcode || old_req) 1755 goto unlock_done; 1756 qp->s_tail_ack_queue = prev; 1757 break; 1758 } 1759 1760 default: 1761 /* 1762 * Ignore this operation if it doesn't request an ACK 1763 * or an earlier RDMA read or atomic is going to be resent. 1764 */ 1765 if (!(psn & IB_BTH_REQ_ACK) || old_req) 1766 goto unlock_done; 1767 /* 1768 * Resend the most recent ACK if this request is 1769 * after all the previous RDMA reads and atomics. 1770 */ 1771 if (i == qp->r_head_ack_queue) { 1772 spin_unlock_irqrestore(&qp->s_lock, flags); 1773 qp->r_nak_state = 0; 1774 qp->r_ack_psn = qp->r_psn - 1; 1775 goto send_ack; 1776 } 1777 1778 /* 1779 * Resend the RDMA read or atomic op which 1780 * ACKs this duplicate request. 1781 */ 1782 qp->s_tail_ack_queue = i; 1783 break; 1784 } 1785 qp->s_ack_state = OP(ACKNOWLEDGE); 1786 qp->s_flags |= RVT_S_RESP_PENDING; 1787 qp->r_nak_state = 0; 1788 hfi1_schedule_send(qp); 1789 1790 unlock_done: 1791 spin_unlock_irqrestore(&qp->s_lock, flags); 1792 done: 1793 return 1; 1794 1795 send_ack: 1796 return 0; 1797 } 1798 1799 static inline void update_ack_queue(struct rvt_qp *qp, unsigned n) 1800 { 1801 unsigned next; 1802 1803 next = n + 1; 1804 if (next > HFI1_MAX_RDMA_ATOMIC) 1805 next = 0; 1806 qp->s_tail_ack_queue = next; 1807 qp->s_ack_state = OP(ACKNOWLEDGE); 1808 } 1809 1810 static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, 1811 u32 lqpn, u32 rqpn, u8 svc_type) 1812 { 1813 struct opa_hfi1_cong_log_event_internal *cc_event; 1814 unsigned long flags; 1815 1816 if (sl >= OPA_MAX_SLS) 1817 return; 1818 1819 spin_lock_irqsave(&ppd->cc_log_lock, flags); 1820 1821 ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8); 1822 ppd->threshold_event_counter++; 1823 1824 cc_event = &ppd->cc_events[ppd->cc_log_idx++]; 1825 if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS) 1826 ppd->cc_log_idx = 0; 1827 cc_event->lqpn = lqpn & RVT_QPN_MASK; 1828 cc_event->rqpn = rqpn & RVT_QPN_MASK; 1829 cc_event->sl = sl; 1830 cc_event->svc_type = svc_type; 1831 cc_event->rlid = rlid; 1832 /* keep timestamp in units of 1.024 usec */ 1833 cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024; 1834 1835 spin_unlock_irqrestore(&ppd->cc_log_lock, flags); 1836 } 1837 1838 void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn, 1839 u32 rqpn, u8 svc_type) 1840 { 1841 struct cca_timer *cca_timer; 1842 u16 ccti, ccti_incr, ccti_timer, ccti_limit; 1843 u8 trigger_threshold; 1844 struct cc_state *cc_state; 1845 unsigned long flags; 1846 1847 if (sl >= OPA_MAX_SLS) 1848 return; 1849 1850 cc_state = get_cc_state(ppd); 1851 1852 if (!cc_state) 1853 return; 1854 1855 /* 1856 * 1) increase CCTI (for this SL) 1857 * 2) select IPG (i.e., call set_link_ipg()) 1858 * 3) start timer 1859 */ 1860 ccti_limit = cc_state->cct.ccti_limit; 1861 ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase; 1862 ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer; 1863 trigger_threshold = 1864 cc_state->cong_setting.entries[sl].trigger_threshold; 1865 1866 spin_lock_irqsave(&ppd->cca_timer_lock, flags); 1867 1868 cca_timer = &ppd->cca_timer[sl]; 1869 if (cca_timer->ccti < ccti_limit) { 1870 if (cca_timer->ccti + ccti_incr <= ccti_limit) 1871 cca_timer->ccti += ccti_incr; 1872 else 1873 cca_timer->ccti = ccti_limit; 1874 set_link_ipg(ppd); 1875 } 1876 1877 ccti = cca_timer->ccti; 1878 1879 if (!hrtimer_active(&cca_timer->hrtimer)) { 1880 /* ccti_timer is in units of 1.024 usec */ 1881 unsigned long nsec = 1024 * ccti_timer; 1882 1883 hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec), 1884 HRTIMER_MODE_REL); 1885 } 1886 1887 spin_unlock_irqrestore(&ppd->cca_timer_lock, flags); 1888 1889 if ((trigger_threshold != 0) && (ccti >= trigger_threshold)) 1890 log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type); 1891 } 1892 1893 /** 1894 * hfi1_rc_rcv - process an incoming RC packet 1895 * @rcd: the context pointer 1896 * @hdr: the header of this packet 1897 * @rcv_flags: flags relevant to rcv processing 1898 * @data: the packet data 1899 * @tlen: the packet length 1900 * @qp: the QP for this packet 1901 * 1902 * This is called from qp_rcv() to process an incoming RC packet 1903 * for the given QP. 1904 * May be called at interrupt level. 1905 */ 1906 void hfi1_rc_rcv(struct hfi1_packet *packet) 1907 { 1908 struct hfi1_ctxtdata *rcd = packet->rcd; 1909 struct ib_header *hdr = packet->hdr; 1910 u32 rcv_flags = packet->rcv_flags; 1911 void *data = packet->ebuf; 1912 u32 tlen = packet->tlen; 1913 struct rvt_qp *qp = packet->qp; 1914 struct hfi1_ibport *ibp = rcd_to_iport(rcd); 1915 struct ib_other_headers *ohdr = packet->ohdr; 1916 u32 bth0, opcode; 1917 u32 hdrsize = packet->hlen; 1918 u32 psn; 1919 u32 pad; 1920 struct ib_wc wc; 1921 u32 pmtu = qp->pmtu; 1922 int diff; 1923 struct ib_reth *reth; 1924 unsigned long flags; 1925 int ret, is_fecn = 0; 1926 bool copy_last = false; 1927 u32 rkey; 1928 1929 lockdep_assert_held(&qp->r_lock); 1930 bth0 = be32_to_cpu(ohdr->bth[0]); 1931 if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0)) 1932 return; 1933 1934 is_fecn = process_ecn(qp, packet, false); 1935 1936 psn = be32_to_cpu(ohdr->bth[2]); 1937 opcode = (bth0 >> 24) & 0xff; 1938 1939 /* 1940 * Process responses (ACKs) before anything else. Note that the 1941 * packet sequence number will be for something in the send work 1942 * queue rather than the expected receive packet sequence number. 1943 * In other words, this QP is the requester. 1944 */ 1945 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && 1946 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { 1947 rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn, 1948 hdrsize, pmtu, rcd); 1949 if (is_fecn) 1950 goto send_ack; 1951 return; 1952 } 1953 1954 /* Compute 24 bits worth of difference. */ 1955 diff = delta_psn(psn, qp->r_psn); 1956 if (unlikely(diff)) { 1957 if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) 1958 return; 1959 goto send_ack; 1960 } 1961 1962 /* Check for opcode sequence errors. */ 1963 switch (qp->r_state) { 1964 case OP(SEND_FIRST): 1965 case OP(SEND_MIDDLE): 1966 if (opcode == OP(SEND_MIDDLE) || 1967 opcode == OP(SEND_LAST) || 1968 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || 1969 opcode == OP(SEND_LAST_WITH_INVALIDATE)) 1970 break; 1971 goto nack_inv; 1972 1973 case OP(RDMA_WRITE_FIRST): 1974 case OP(RDMA_WRITE_MIDDLE): 1975 if (opcode == OP(RDMA_WRITE_MIDDLE) || 1976 opcode == OP(RDMA_WRITE_LAST) || 1977 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 1978 break; 1979 goto nack_inv; 1980 1981 default: 1982 if (opcode == OP(SEND_MIDDLE) || 1983 opcode == OP(SEND_LAST) || 1984 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || 1985 opcode == OP(SEND_LAST_WITH_INVALIDATE) || 1986 opcode == OP(RDMA_WRITE_MIDDLE) || 1987 opcode == OP(RDMA_WRITE_LAST) || 1988 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 1989 goto nack_inv; 1990 /* 1991 * Note that it is up to the requester to not send a new 1992 * RDMA read or atomic operation before receiving an ACK 1993 * for the previous operation. 1994 */ 1995 break; 1996 } 1997 1998 if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST)) 1999 rvt_comm_est(qp); 2000 2001 /* OK, process the packet. */ 2002 switch (opcode) { 2003 case OP(SEND_FIRST): 2004 ret = hfi1_rvt_get_rwqe(qp, 0); 2005 if (ret < 0) 2006 goto nack_op_err; 2007 if (!ret) 2008 goto rnr_nak; 2009 qp->r_rcv_len = 0; 2010 /* FALLTHROUGH */ 2011 case OP(SEND_MIDDLE): 2012 case OP(RDMA_WRITE_MIDDLE): 2013 send_middle: 2014 /* Check for invalid length PMTU or posted rwqe len. */ 2015 if (unlikely(tlen != (hdrsize + pmtu + 4))) 2016 goto nack_inv; 2017 qp->r_rcv_len += pmtu; 2018 if (unlikely(qp->r_rcv_len > qp->r_len)) 2019 goto nack_inv; 2020 hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false); 2021 break; 2022 2023 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): 2024 /* consume RWQE */ 2025 ret = hfi1_rvt_get_rwqe(qp, 1); 2026 if (ret < 0) 2027 goto nack_op_err; 2028 if (!ret) 2029 goto rnr_nak; 2030 goto send_last_imm; 2031 2032 case OP(SEND_ONLY): 2033 case OP(SEND_ONLY_WITH_IMMEDIATE): 2034 case OP(SEND_ONLY_WITH_INVALIDATE): 2035 ret = hfi1_rvt_get_rwqe(qp, 0); 2036 if (ret < 0) 2037 goto nack_op_err; 2038 if (!ret) 2039 goto rnr_nak; 2040 qp->r_rcv_len = 0; 2041 if (opcode == OP(SEND_ONLY)) 2042 goto no_immediate_data; 2043 if (opcode == OP(SEND_ONLY_WITH_INVALIDATE)) 2044 goto send_last_inv; 2045 /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */ 2046 case OP(SEND_LAST_WITH_IMMEDIATE): 2047 send_last_imm: 2048 wc.ex.imm_data = ohdr->u.imm_data; 2049 wc.wc_flags = IB_WC_WITH_IMM; 2050 goto send_last; 2051 case OP(SEND_LAST_WITH_INVALIDATE): 2052 send_last_inv: 2053 rkey = be32_to_cpu(ohdr->u.ieth); 2054 if (rvt_invalidate_rkey(qp, rkey)) 2055 goto no_immediate_data; 2056 wc.ex.invalidate_rkey = rkey; 2057 wc.wc_flags = IB_WC_WITH_INVALIDATE; 2058 goto send_last; 2059 case OP(RDMA_WRITE_LAST): 2060 copy_last = rvt_is_user_qp(qp); 2061 /* fall through */ 2062 case OP(SEND_LAST): 2063 no_immediate_data: 2064 wc.wc_flags = 0; 2065 wc.ex.imm_data = 0; 2066 send_last: 2067 /* Get the number of bytes the message was padded by. */ 2068 pad = (bth0 >> 20) & 3; 2069 /* Check for invalid length. */ 2070 /* LAST len should be >= 1 */ 2071 if (unlikely(tlen < (hdrsize + pad + 4))) 2072 goto nack_inv; 2073 /* Don't count the CRC. */ 2074 tlen -= (hdrsize + pad + 4); 2075 wc.byte_len = tlen + qp->r_rcv_len; 2076 if (unlikely(wc.byte_len > qp->r_len)) 2077 goto nack_inv; 2078 hfi1_copy_sge(&qp->r_sge, data, tlen, true, copy_last); 2079 rvt_put_ss(&qp->r_sge); 2080 qp->r_msn++; 2081 if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags)) 2082 break; 2083 wc.wr_id = qp->r_wr_id; 2084 wc.status = IB_WC_SUCCESS; 2085 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || 2086 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) 2087 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; 2088 else 2089 wc.opcode = IB_WC_RECV; 2090 wc.qp = &qp->ibqp; 2091 wc.src_qp = qp->remote_qpn; 2092 wc.slid = qp->remote_ah_attr.dlid; 2093 /* 2094 * It seems that IB mandates the presence of an SL in a 2095 * work completion only for the UD transport (see section 2096 * 11.4.2 of IBTA Vol. 1). 2097 * 2098 * However, the way the SL is chosen below is consistent 2099 * with the way that IB/qib works and is trying avoid 2100 * introducing incompatibilities. 2101 * 2102 * See also OPA Vol. 1, section 9.7.6, and table 9-17. 2103 */ 2104 wc.sl = qp->remote_ah_attr.sl; 2105 /* zero fields that are N/A */ 2106 wc.vendor_err = 0; 2107 wc.pkey_index = 0; 2108 wc.dlid_path_bits = 0; 2109 wc.port_num = 0; 2110 /* Signal completion event if the solicited bit is set. */ 2111 rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc, 2112 (bth0 & IB_BTH_SOLICITED) != 0); 2113 break; 2114 2115 case OP(RDMA_WRITE_ONLY): 2116 copy_last = rvt_is_user_qp(qp); 2117 /* fall through */ 2118 case OP(RDMA_WRITE_FIRST): 2119 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): 2120 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE))) 2121 goto nack_inv; 2122 /* consume RWQE */ 2123 reth = &ohdr->u.rc.reth; 2124 qp->r_len = be32_to_cpu(reth->length); 2125 qp->r_rcv_len = 0; 2126 qp->r_sge.sg_list = NULL; 2127 if (qp->r_len != 0) { 2128 u32 rkey = be32_to_cpu(reth->rkey); 2129 u64 vaddr = get_ib_reth_vaddr(reth); 2130 int ok; 2131 2132 /* Check rkey & NAK */ 2133 ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr, 2134 rkey, IB_ACCESS_REMOTE_WRITE); 2135 if (unlikely(!ok)) 2136 goto nack_acc; 2137 qp->r_sge.num_sge = 1; 2138 } else { 2139 qp->r_sge.num_sge = 0; 2140 qp->r_sge.sge.mr = NULL; 2141 qp->r_sge.sge.vaddr = NULL; 2142 qp->r_sge.sge.length = 0; 2143 qp->r_sge.sge.sge_length = 0; 2144 } 2145 if (opcode == OP(RDMA_WRITE_FIRST)) 2146 goto send_middle; 2147 else if (opcode == OP(RDMA_WRITE_ONLY)) 2148 goto no_immediate_data; 2149 ret = hfi1_rvt_get_rwqe(qp, 1); 2150 if (ret < 0) 2151 goto nack_op_err; 2152 if (!ret) 2153 goto rnr_nak; 2154 wc.ex.imm_data = ohdr->u.rc.imm_data; 2155 wc.wc_flags = IB_WC_WITH_IMM; 2156 goto send_last; 2157 2158 case OP(RDMA_READ_REQUEST): { 2159 struct rvt_ack_entry *e; 2160 u32 len; 2161 u8 next; 2162 2163 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ))) 2164 goto nack_inv; 2165 next = qp->r_head_ack_queue + 1; 2166 /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */ 2167 if (next > HFI1_MAX_RDMA_ATOMIC) 2168 next = 0; 2169 spin_lock_irqsave(&qp->s_lock, flags); 2170 if (unlikely(next == qp->s_tail_ack_queue)) { 2171 if (!qp->s_ack_queue[next].sent) 2172 goto nack_inv_unlck; 2173 update_ack_queue(qp, next); 2174 } 2175 e = &qp->s_ack_queue[qp->r_head_ack_queue]; 2176 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { 2177 rvt_put_mr(e->rdma_sge.mr); 2178 e->rdma_sge.mr = NULL; 2179 } 2180 reth = &ohdr->u.rc.reth; 2181 len = be32_to_cpu(reth->length); 2182 if (len) { 2183 u32 rkey = be32_to_cpu(reth->rkey); 2184 u64 vaddr = get_ib_reth_vaddr(reth); 2185 int ok; 2186 2187 /* Check rkey & NAK */ 2188 ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, 2189 rkey, IB_ACCESS_REMOTE_READ); 2190 if (unlikely(!ok)) 2191 goto nack_acc_unlck; 2192 /* 2193 * Update the next expected PSN. We add 1 later 2194 * below, so only add the remainder here. 2195 */ 2196 qp->r_psn += rvt_div_mtu(qp, len - 1); 2197 } else { 2198 e->rdma_sge.mr = NULL; 2199 e->rdma_sge.vaddr = NULL; 2200 e->rdma_sge.length = 0; 2201 e->rdma_sge.sge_length = 0; 2202 } 2203 e->opcode = opcode; 2204 e->sent = 0; 2205 e->psn = psn; 2206 e->lpsn = qp->r_psn; 2207 /* 2208 * We need to increment the MSN here instead of when we 2209 * finish sending the result since a duplicate request would 2210 * increment it more than once. 2211 */ 2212 qp->r_msn++; 2213 qp->r_psn++; 2214 qp->r_state = opcode; 2215 qp->r_nak_state = 0; 2216 qp->r_head_ack_queue = next; 2217 2218 /* Schedule the send engine. */ 2219 qp->s_flags |= RVT_S_RESP_PENDING; 2220 hfi1_schedule_send(qp); 2221 2222 spin_unlock_irqrestore(&qp->s_lock, flags); 2223 if (is_fecn) 2224 goto send_ack; 2225 return; 2226 } 2227 2228 case OP(COMPARE_SWAP): 2229 case OP(FETCH_ADD): { 2230 struct ib_atomic_eth *ateth; 2231 struct rvt_ack_entry *e; 2232 u64 vaddr; 2233 atomic64_t *maddr; 2234 u64 sdata; 2235 u32 rkey; 2236 u8 next; 2237 2238 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC))) 2239 goto nack_inv; 2240 next = qp->r_head_ack_queue + 1; 2241 if (next > HFI1_MAX_RDMA_ATOMIC) 2242 next = 0; 2243 spin_lock_irqsave(&qp->s_lock, flags); 2244 if (unlikely(next == qp->s_tail_ack_queue)) { 2245 if (!qp->s_ack_queue[next].sent) 2246 goto nack_inv_unlck; 2247 update_ack_queue(qp, next); 2248 } 2249 e = &qp->s_ack_queue[qp->r_head_ack_queue]; 2250 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { 2251 rvt_put_mr(e->rdma_sge.mr); 2252 e->rdma_sge.mr = NULL; 2253 } 2254 ateth = &ohdr->u.atomic_eth; 2255 vaddr = get_ib_ateth_vaddr(ateth); 2256 if (unlikely(vaddr & (sizeof(u64) - 1))) 2257 goto nack_inv_unlck; 2258 rkey = be32_to_cpu(ateth->rkey); 2259 /* Check rkey & NAK */ 2260 if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64), 2261 vaddr, rkey, 2262 IB_ACCESS_REMOTE_ATOMIC))) 2263 goto nack_acc_unlck; 2264 /* Perform atomic OP and save result. */ 2265 maddr = (atomic64_t *)qp->r_sge.sge.vaddr; 2266 sdata = get_ib_ateth_swap(ateth); 2267 e->atomic_data = (opcode == OP(FETCH_ADD)) ? 2268 (u64)atomic64_add_return(sdata, maddr) - sdata : 2269 (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr, 2270 get_ib_ateth_compare(ateth), 2271 sdata); 2272 rvt_put_mr(qp->r_sge.sge.mr); 2273 qp->r_sge.num_sge = 0; 2274 e->opcode = opcode; 2275 e->sent = 0; 2276 e->psn = psn; 2277 e->lpsn = psn; 2278 qp->r_msn++; 2279 qp->r_psn++; 2280 qp->r_state = opcode; 2281 qp->r_nak_state = 0; 2282 qp->r_head_ack_queue = next; 2283 2284 /* Schedule the send engine. */ 2285 qp->s_flags |= RVT_S_RESP_PENDING; 2286 hfi1_schedule_send(qp); 2287 2288 spin_unlock_irqrestore(&qp->s_lock, flags); 2289 if (is_fecn) 2290 goto send_ack; 2291 return; 2292 } 2293 2294 default: 2295 /* NAK unknown opcodes. */ 2296 goto nack_inv; 2297 } 2298 qp->r_psn++; 2299 qp->r_state = opcode; 2300 qp->r_ack_psn = psn; 2301 qp->r_nak_state = 0; 2302 /* Send an ACK if requested or required. */ 2303 if (psn & IB_BTH_REQ_ACK) { 2304 struct hfi1_qp_priv *priv = qp->priv; 2305 2306 if (packet->numpkt == 0) { 2307 rc_cancel_ack(qp); 2308 goto send_ack; 2309 } 2310 if (priv->r_adefered >= HFI1_PSN_CREDIT) { 2311 rc_cancel_ack(qp); 2312 goto send_ack; 2313 } 2314 if (unlikely(is_fecn)) { 2315 rc_cancel_ack(qp); 2316 goto send_ack; 2317 } 2318 priv->r_adefered++; 2319 rc_defered_ack(rcd, qp); 2320 } 2321 return; 2322 2323 rnr_nak: 2324 qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK; 2325 qp->r_ack_psn = qp->r_psn; 2326 /* Queue RNR NAK for later */ 2327 rc_defered_ack(rcd, qp); 2328 return; 2329 2330 nack_op_err: 2331 rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 2332 qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR; 2333 qp->r_ack_psn = qp->r_psn; 2334 /* Queue NAK for later */ 2335 rc_defered_ack(rcd, qp); 2336 return; 2337 2338 nack_inv_unlck: 2339 spin_unlock_irqrestore(&qp->s_lock, flags); 2340 nack_inv: 2341 rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 2342 qp->r_nak_state = IB_NAK_INVALID_REQUEST; 2343 qp->r_ack_psn = qp->r_psn; 2344 /* Queue NAK for later */ 2345 rc_defered_ack(rcd, qp); 2346 return; 2347 2348 nack_acc_unlck: 2349 spin_unlock_irqrestore(&qp->s_lock, flags); 2350 nack_acc: 2351 rvt_rc_error(qp, IB_WC_LOC_PROT_ERR); 2352 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR; 2353 qp->r_ack_psn = qp->r_psn; 2354 send_ack: 2355 hfi1_send_rc_ack(rcd, qp, is_fecn); 2356 } 2357 2358 void hfi1_rc_hdrerr( 2359 struct hfi1_ctxtdata *rcd, 2360 struct ib_header *hdr, 2361 u32 rcv_flags, 2362 struct rvt_qp *qp) 2363 { 2364 int has_grh = rcv_flags & HFI1_HAS_GRH; 2365 struct ib_other_headers *ohdr; 2366 struct hfi1_ibport *ibp = rcd_to_iport(rcd); 2367 int diff; 2368 u32 opcode; 2369 u32 psn, bth0; 2370 2371 /* Check for GRH */ 2372 ohdr = &hdr->u.oth; 2373 if (has_grh) 2374 ohdr = &hdr->u.l.oth; 2375 2376 bth0 = be32_to_cpu(ohdr->bth[0]); 2377 if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0)) 2378 return; 2379 2380 psn = be32_to_cpu(ohdr->bth[2]); 2381 opcode = (bth0 >> 24) & 0xff; 2382 2383 /* Only deal with RDMA Writes for now */ 2384 if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { 2385 diff = delta_psn(psn, qp->r_psn); 2386 if (!qp->r_nak_state && diff >= 0) { 2387 ibp->rvp.n_rc_seqnak++; 2388 qp->r_nak_state = IB_NAK_PSN_ERROR; 2389 /* Use the expected PSN. */ 2390 qp->r_ack_psn = qp->r_psn; 2391 /* 2392 * Wait to send the sequence 2393 * NAK until all packets 2394 * in the receive queue have 2395 * been processed. 2396 * Otherwise, we end up 2397 * propagating congestion. 2398 */ 2399 rc_defered_ack(rcd, qp); 2400 } /* Out of sequence NAK */ 2401 } /* QP Request NAKs */ 2402 } 2403