1f48ad614SDennis Dalessandro /* 2f48ad614SDennis Dalessandro * Copyright(c) 2015, 2016 Intel Corporation. 3f48ad614SDennis Dalessandro * 4f48ad614SDennis Dalessandro * This file is provided under a dual BSD/GPLv2 license. When using or 5f48ad614SDennis Dalessandro * redistributing this file, you may do so under either license. 6f48ad614SDennis Dalessandro * 7f48ad614SDennis Dalessandro * GPL LICENSE SUMMARY 8f48ad614SDennis Dalessandro * 9f48ad614SDennis Dalessandro * This program is free software; you can redistribute it and/or modify 10f48ad614SDennis Dalessandro * it under the terms of version 2 of the GNU General Public License as 11f48ad614SDennis Dalessandro * published by the Free Software Foundation. 12f48ad614SDennis Dalessandro * 13f48ad614SDennis Dalessandro * This program is distributed in the hope that it will be useful, but 14f48ad614SDennis Dalessandro * WITHOUT ANY WARRANTY; without even the implied warranty of 15f48ad614SDennis Dalessandro * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16f48ad614SDennis Dalessandro * General Public License for more details. 17f48ad614SDennis Dalessandro * 18f48ad614SDennis Dalessandro * BSD LICENSE 19f48ad614SDennis Dalessandro * 20f48ad614SDennis Dalessandro * Redistribution and use in source and binary forms, with or without 21f48ad614SDennis Dalessandro * modification, are permitted provided that the following conditions 22f48ad614SDennis Dalessandro * are met: 23f48ad614SDennis Dalessandro * 24f48ad614SDennis Dalessandro * - Redistributions of source code must retain the above copyright 25f48ad614SDennis Dalessandro * notice, this list of conditions and the following disclaimer. 26f48ad614SDennis Dalessandro * - Redistributions in binary form must reproduce the above copyright 27f48ad614SDennis Dalessandro * notice, this list of conditions and the following disclaimer in 28f48ad614SDennis Dalessandro * the documentation and/or other materials provided with the 29f48ad614SDennis Dalessandro * distribution. 30f48ad614SDennis Dalessandro * - Neither the name of Intel Corporation nor the names of its 31f48ad614SDennis Dalessandro * contributors may be used to endorse or promote products derived 32f48ad614SDennis Dalessandro * from this software without specific prior written permission. 33f48ad614SDennis Dalessandro * 34f48ad614SDennis Dalessandro * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35f48ad614SDennis Dalessandro * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36f48ad614SDennis Dalessandro * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37f48ad614SDennis Dalessandro * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38f48ad614SDennis Dalessandro * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39f48ad614SDennis Dalessandro * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40f48ad614SDennis Dalessandro * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41f48ad614SDennis Dalessandro * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42f48ad614SDennis Dalessandro * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43f48ad614SDennis Dalessandro * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44f48ad614SDennis Dalessandro * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45f48ad614SDennis Dalessandro * 46f48ad614SDennis Dalessandro */ 47f48ad614SDennis Dalessandro 48f48ad614SDennis Dalessandro #include <linux/io.h> 49f48ad614SDennis Dalessandro #include <rdma/rdma_vt.h> 50f48ad614SDennis Dalessandro #include <rdma/rdmavt_qp.h> 51f48ad614SDennis Dalessandro 52f48ad614SDennis Dalessandro #include "hfi.h" 53f48ad614SDennis Dalessandro #include "qp.h" 54f48ad614SDennis Dalessandro #include "verbs_txreq.h" 55f48ad614SDennis Dalessandro #include "trace.h" 56f48ad614SDennis Dalessandro 57f48ad614SDennis Dalessandro /* cut down ridiculously long IB macro names */ 58b374e060SMike Marciniszyn #define OP(x) RC_OP(x) 59f48ad614SDennis Dalessandro 60f48ad614SDennis Dalessandro /** 61f48ad614SDennis Dalessandro * hfi1_add_retry_timer - add/start a retry timer 62f48ad614SDennis Dalessandro * @qp - the QP 63f48ad614SDennis Dalessandro * 64f48ad614SDennis Dalessandro * add a retry timer on the QP 65f48ad614SDennis Dalessandro */ 66f48ad614SDennis Dalessandro static inline void hfi1_add_retry_timer(struct rvt_qp *qp) 67f48ad614SDennis Dalessandro { 68f48ad614SDennis Dalessandro struct ib_qp *ibqp = &qp->ibqp; 69f48ad614SDennis Dalessandro struct rvt_dev_info *rdi = ib_to_rvt(ibqp->device); 70f48ad614SDennis Dalessandro 7168e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 72f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_TIMER; 73f48ad614SDennis Dalessandro /* 4.096 usec. * (1 << qp->timeout) */ 74f48ad614SDennis Dalessandro qp->s_timer.expires = jiffies + qp->timeout_jiffies + 75f48ad614SDennis Dalessandro rdi->busy_jiffies; 76f48ad614SDennis Dalessandro add_timer(&qp->s_timer); 77f48ad614SDennis Dalessandro } 78f48ad614SDennis Dalessandro 79f48ad614SDennis Dalessandro /** 80f48ad614SDennis Dalessandro * hfi1_add_rnr_timer - add/start an rnr timer 81f48ad614SDennis Dalessandro * @qp - the QP 82f48ad614SDennis Dalessandro * @to - timeout in usecs 83f48ad614SDennis Dalessandro * 84f48ad614SDennis Dalessandro * add an rnr timer on the QP 85f48ad614SDennis Dalessandro */ 86f48ad614SDennis Dalessandro void hfi1_add_rnr_timer(struct rvt_qp *qp, u32 to) 87f48ad614SDennis Dalessandro { 88f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 89f48ad614SDennis Dalessandro 9068e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 91f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_RNR; 92458ed666SIra Weiny priv->s_rnr_timer.expires = jiffies + usecs_to_jiffies(to); 93f48ad614SDennis Dalessandro add_timer(&priv->s_rnr_timer); 94f48ad614SDennis Dalessandro } 95f48ad614SDennis Dalessandro 96f48ad614SDennis Dalessandro /** 97f48ad614SDennis Dalessandro * hfi1_mod_retry_timer - mod a retry timer 98f48ad614SDennis Dalessandro * @qp - the QP 99f48ad614SDennis Dalessandro * 100f48ad614SDennis Dalessandro * Modify a potentially already running retry 101f48ad614SDennis Dalessandro * timer 102f48ad614SDennis Dalessandro */ 103f48ad614SDennis Dalessandro static inline void hfi1_mod_retry_timer(struct rvt_qp *qp) 104f48ad614SDennis Dalessandro { 105f48ad614SDennis Dalessandro struct ib_qp *ibqp = &qp->ibqp; 106f48ad614SDennis Dalessandro struct rvt_dev_info *rdi = ib_to_rvt(ibqp->device); 107f48ad614SDennis Dalessandro 10868e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 109f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_TIMER; 110f48ad614SDennis Dalessandro /* 4.096 usec. * (1 << qp->timeout) */ 111f48ad614SDennis Dalessandro mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies + 112f48ad614SDennis Dalessandro rdi->busy_jiffies); 113f48ad614SDennis Dalessandro } 114f48ad614SDennis Dalessandro 115f48ad614SDennis Dalessandro /** 116f48ad614SDennis Dalessandro * hfi1_stop_retry_timer - stop a retry timer 117f48ad614SDennis Dalessandro * @qp - the QP 118f48ad614SDennis Dalessandro * 119f48ad614SDennis Dalessandro * stop a retry timer and return if the timer 120f48ad614SDennis Dalessandro * had been pending. 121f48ad614SDennis Dalessandro */ 122f48ad614SDennis Dalessandro static inline int hfi1_stop_retry_timer(struct rvt_qp *qp) 123f48ad614SDennis Dalessandro { 124f48ad614SDennis Dalessandro int rval = 0; 125f48ad614SDennis Dalessandro 12668e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 127f48ad614SDennis Dalessandro /* Remove QP from retry */ 128f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_TIMER) { 129f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_TIMER; 130f48ad614SDennis Dalessandro rval = del_timer(&qp->s_timer); 131f48ad614SDennis Dalessandro } 132f48ad614SDennis Dalessandro return rval; 133f48ad614SDennis Dalessandro } 134f48ad614SDennis Dalessandro 135f48ad614SDennis Dalessandro /** 136f48ad614SDennis Dalessandro * hfi1_stop_rc_timers - stop all timers 137f48ad614SDennis Dalessandro * @qp - the QP 138f48ad614SDennis Dalessandro * 139f48ad614SDennis Dalessandro * stop any pending timers 140f48ad614SDennis Dalessandro */ 141f48ad614SDennis Dalessandro void hfi1_stop_rc_timers(struct rvt_qp *qp) 142f48ad614SDennis Dalessandro { 143f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 144f48ad614SDennis Dalessandro 14568e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 146f48ad614SDennis Dalessandro /* Remove QP from all timers */ 147f48ad614SDennis Dalessandro if (qp->s_flags & (RVT_S_TIMER | RVT_S_WAIT_RNR)) { 148f48ad614SDennis Dalessandro qp->s_flags &= ~(RVT_S_TIMER | RVT_S_WAIT_RNR); 149f48ad614SDennis Dalessandro del_timer(&qp->s_timer); 150f48ad614SDennis Dalessandro del_timer(&priv->s_rnr_timer); 151f48ad614SDennis Dalessandro } 152f48ad614SDennis Dalessandro } 153f48ad614SDennis Dalessandro 154f48ad614SDennis Dalessandro /** 155f48ad614SDennis Dalessandro * hfi1_stop_rnr_timer - stop an rnr timer 156f48ad614SDennis Dalessandro * @qp - the QP 157f48ad614SDennis Dalessandro * 158f48ad614SDennis Dalessandro * stop an rnr timer and return if the timer 159f48ad614SDennis Dalessandro * had been pending. 160f48ad614SDennis Dalessandro */ 161f48ad614SDennis Dalessandro static inline int hfi1_stop_rnr_timer(struct rvt_qp *qp) 162f48ad614SDennis Dalessandro { 163f48ad614SDennis Dalessandro int rval = 0; 164f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 165f48ad614SDennis Dalessandro 16668e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 167f48ad614SDennis Dalessandro /* Remove QP from rnr timer */ 168f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_WAIT_RNR) { 169f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_WAIT_RNR; 170f48ad614SDennis Dalessandro rval = del_timer(&priv->s_rnr_timer); 171f48ad614SDennis Dalessandro } 172f48ad614SDennis Dalessandro return rval; 173f48ad614SDennis Dalessandro } 174f48ad614SDennis Dalessandro 175f48ad614SDennis Dalessandro /** 176f48ad614SDennis Dalessandro * hfi1_del_timers_sync - wait for any timeout routines to exit 177f48ad614SDennis Dalessandro * @qp - the QP 178f48ad614SDennis Dalessandro */ 179f48ad614SDennis Dalessandro void hfi1_del_timers_sync(struct rvt_qp *qp) 180f48ad614SDennis Dalessandro { 181f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 182f48ad614SDennis Dalessandro 183f48ad614SDennis Dalessandro del_timer_sync(&qp->s_timer); 184f48ad614SDennis Dalessandro del_timer_sync(&priv->s_rnr_timer); 185f48ad614SDennis Dalessandro } 186f48ad614SDennis Dalessandro 187f48ad614SDennis Dalessandro static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe, 188f48ad614SDennis Dalessandro u32 psn, u32 pmtu) 189f48ad614SDennis Dalessandro { 190f48ad614SDennis Dalessandro u32 len; 191f48ad614SDennis Dalessandro 192f48ad614SDennis Dalessandro len = delta_psn(psn, wqe->psn) * pmtu; 193f48ad614SDennis Dalessandro ss->sge = wqe->sg_list[0]; 194f48ad614SDennis Dalessandro ss->sg_list = wqe->sg_list + 1; 195f48ad614SDennis Dalessandro ss->num_sge = wqe->wr.num_sge; 196f48ad614SDennis Dalessandro ss->total_len = wqe->length; 197f48ad614SDennis Dalessandro hfi1_skip_sge(ss, len, 0); 198f48ad614SDennis Dalessandro return wqe->length - len; 199f48ad614SDennis Dalessandro } 200f48ad614SDennis Dalessandro 201f48ad614SDennis Dalessandro /** 202f48ad614SDennis Dalessandro * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read) 203f48ad614SDennis Dalessandro * @dev: the device for this QP 204f48ad614SDennis Dalessandro * @qp: a pointer to the QP 205f48ad614SDennis Dalessandro * @ohdr: a pointer to the IB header being constructed 206f48ad614SDennis Dalessandro * @ps: the xmit packet state 207f48ad614SDennis Dalessandro * 208f48ad614SDennis Dalessandro * Return 1 if constructed; otherwise, return 0. 209f48ad614SDennis Dalessandro * Note that we are in the responder's side of the QP context. 210f48ad614SDennis Dalessandro * Note the QP s_lock must be held. 211f48ad614SDennis Dalessandro */ 212f48ad614SDennis Dalessandro static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp, 213261a4351SMike Marciniszyn struct ib_other_headers *ohdr, 214f48ad614SDennis Dalessandro struct hfi1_pkt_state *ps) 215f48ad614SDennis Dalessandro { 216f48ad614SDennis Dalessandro struct rvt_ack_entry *e; 217f48ad614SDennis Dalessandro u32 hwords; 218f48ad614SDennis Dalessandro u32 len; 219f48ad614SDennis Dalessandro u32 bth0; 220f48ad614SDennis Dalessandro u32 bth2; 221f48ad614SDennis Dalessandro int middle = 0; 222f48ad614SDennis Dalessandro u32 pmtu = qp->pmtu; 223f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 224f48ad614SDennis Dalessandro 22568e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 226f48ad614SDennis Dalessandro /* Don't send an ACK if we aren't supposed to. */ 227f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) 228f48ad614SDennis Dalessandro goto bail; 229f48ad614SDennis Dalessandro 230f48ad614SDennis Dalessandro /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 231f48ad614SDennis Dalessandro hwords = 5; 232f48ad614SDennis Dalessandro 233f48ad614SDennis Dalessandro switch (qp->s_ack_state) { 234f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_LAST): 235f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_ONLY): 236f48ad614SDennis Dalessandro e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 237f48ad614SDennis Dalessandro if (e->rdma_sge.mr) { 238f48ad614SDennis Dalessandro rvt_put_mr(e->rdma_sge.mr); 239f48ad614SDennis Dalessandro e->rdma_sge.mr = NULL; 240f48ad614SDennis Dalessandro } 241f48ad614SDennis Dalessandro /* FALLTHROUGH */ 242f48ad614SDennis Dalessandro case OP(ATOMIC_ACKNOWLEDGE): 243f48ad614SDennis Dalessandro /* 244f48ad614SDennis Dalessandro * We can increment the tail pointer now that the last 245f48ad614SDennis Dalessandro * response has been sent instead of only being 246f48ad614SDennis Dalessandro * constructed. 247f48ad614SDennis Dalessandro */ 248f48ad614SDennis Dalessandro if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC) 249f48ad614SDennis Dalessandro qp->s_tail_ack_queue = 0; 250f48ad614SDennis Dalessandro /* FALLTHROUGH */ 251f48ad614SDennis Dalessandro case OP(SEND_ONLY): 252f48ad614SDennis Dalessandro case OP(ACKNOWLEDGE): 253f48ad614SDennis Dalessandro /* Check for no next entry in the queue. */ 254f48ad614SDennis Dalessandro if (qp->r_head_ack_queue == qp->s_tail_ack_queue) { 255f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_ACK_PENDING) 256f48ad614SDennis Dalessandro goto normal; 257f48ad614SDennis Dalessandro goto bail; 258f48ad614SDennis Dalessandro } 259f48ad614SDennis Dalessandro 260f48ad614SDennis Dalessandro e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 261f48ad614SDennis Dalessandro if (e->opcode == OP(RDMA_READ_REQUEST)) { 262f48ad614SDennis Dalessandro /* 263f48ad614SDennis Dalessandro * If a RDMA read response is being resent and 264f48ad614SDennis Dalessandro * we haven't seen the duplicate request yet, 265f48ad614SDennis Dalessandro * then stop sending the remaining responses the 266f48ad614SDennis Dalessandro * responder has seen until the requester re-sends it. 267f48ad614SDennis Dalessandro */ 268f48ad614SDennis Dalessandro len = e->rdma_sge.sge_length; 269f48ad614SDennis Dalessandro if (len && !e->rdma_sge.mr) { 270f48ad614SDennis Dalessandro qp->s_tail_ack_queue = qp->r_head_ack_queue; 271f48ad614SDennis Dalessandro goto bail; 272f48ad614SDennis Dalessandro } 273f48ad614SDennis Dalessandro /* Copy SGE state in case we need to resend */ 274f48ad614SDennis Dalessandro ps->s_txreq->mr = e->rdma_sge.mr; 275f48ad614SDennis Dalessandro if (ps->s_txreq->mr) 276f48ad614SDennis Dalessandro rvt_get_mr(ps->s_txreq->mr); 277f48ad614SDennis Dalessandro qp->s_ack_rdma_sge.sge = e->rdma_sge; 278f48ad614SDennis Dalessandro qp->s_ack_rdma_sge.num_sge = 1; 279b777f154SMitko Haralanov ps->s_txreq->ss = &qp->s_ack_rdma_sge; 280f48ad614SDennis Dalessandro if (len > pmtu) { 281f48ad614SDennis Dalessandro len = pmtu; 282f48ad614SDennis Dalessandro qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST); 283f48ad614SDennis Dalessandro } else { 284f48ad614SDennis Dalessandro qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY); 285f48ad614SDennis Dalessandro e->sent = 1; 286f48ad614SDennis Dalessandro } 287f48ad614SDennis Dalessandro ohdr->u.aeth = hfi1_compute_aeth(qp); 288f48ad614SDennis Dalessandro hwords++; 289f48ad614SDennis Dalessandro qp->s_ack_rdma_psn = e->psn; 290f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_ack_rdma_psn++); 291f48ad614SDennis Dalessandro } else { 292f48ad614SDennis Dalessandro /* COMPARE_SWAP or FETCH_ADD */ 293b777f154SMitko Haralanov ps->s_txreq->ss = NULL; 294f48ad614SDennis Dalessandro len = 0; 295f48ad614SDennis Dalessandro qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE); 296f48ad614SDennis Dalessandro ohdr->u.at.aeth = hfi1_compute_aeth(qp); 297261a4351SMike Marciniszyn ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth); 298f48ad614SDennis Dalessandro hwords += sizeof(ohdr->u.at) / sizeof(u32); 299f48ad614SDennis Dalessandro bth2 = mask_psn(e->psn); 300f48ad614SDennis Dalessandro e->sent = 1; 301f48ad614SDennis Dalessandro } 302f48ad614SDennis Dalessandro bth0 = qp->s_ack_state << 24; 303f48ad614SDennis Dalessandro break; 304f48ad614SDennis Dalessandro 305f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_FIRST): 306f48ad614SDennis Dalessandro qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE); 307f48ad614SDennis Dalessandro /* FALLTHROUGH */ 308f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_MIDDLE): 309b777f154SMitko Haralanov ps->s_txreq->ss = &qp->s_ack_rdma_sge; 310f48ad614SDennis Dalessandro ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr; 311f48ad614SDennis Dalessandro if (ps->s_txreq->mr) 312f48ad614SDennis Dalessandro rvt_get_mr(ps->s_txreq->mr); 313f48ad614SDennis Dalessandro len = qp->s_ack_rdma_sge.sge.sge_length; 314f48ad614SDennis Dalessandro if (len > pmtu) { 315f48ad614SDennis Dalessandro len = pmtu; 316f48ad614SDennis Dalessandro middle = HFI1_CAP_IS_KSET(SDMA_AHG); 317f48ad614SDennis Dalessandro } else { 318f48ad614SDennis Dalessandro ohdr->u.aeth = hfi1_compute_aeth(qp); 319f48ad614SDennis Dalessandro hwords++; 320f48ad614SDennis Dalessandro qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST); 321f48ad614SDennis Dalessandro e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 322f48ad614SDennis Dalessandro e->sent = 1; 323f48ad614SDennis Dalessandro } 324f48ad614SDennis Dalessandro bth0 = qp->s_ack_state << 24; 325f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_ack_rdma_psn++); 326f48ad614SDennis Dalessandro break; 327f48ad614SDennis Dalessandro 328f48ad614SDennis Dalessandro default: 329f48ad614SDennis Dalessandro normal: 330f48ad614SDennis Dalessandro /* 331f48ad614SDennis Dalessandro * Send a regular ACK. 332f48ad614SDennis Dalessandro * Set the s_ack_state so we wait until after sending 333f48ad614SDennis Dalessandro * the ACK before setting s_ack_state to ACKNOWLEDGE 334f48ad614SDennis Dalessandro * (see above). 335f48ad614SDennis Dalessandro */ 336f48ad614SDennis Dalessandro qp->s_ack_state = OP(SEND_ONLY); 337f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_ACK_PENDING; 338b777f154SMitko Haralanov ps->s_txreq->ss = NULL; 339f48ad614SDennis Dalessandro if (qp->s_nak_state) 340f48ad614SDennis Dalessandro ohdr->u.aeth = 341f48ad614SDennis Dalessandro cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) | 342f48ad614SDennis Dalessandro (qp->s_nak_state << 343f48ad614SDennis Dalessandro HFI1_AETH_CREDIT_SHIFT)); 344f48ad614SDennis Dalessandro else 345f48ad614SDennis Dalessandro ohdr->u.aeth = hfi1_compute_aeth(qp); 346f48ad614SDennis Dalessandro hwords++; 347f48ad614SDennis Dalessandro len = 0; 348f48ad614SDennis Dalessandro bth0 = OP(ACKNOWLEDGE) << 24; 349f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_ack_psn); 350f48ad614SDennis Dalessandro } 351f48ad614SDennis Dalessandro qp->s_rdma_ack_cnt++; 352f48ad614SDennis Dalessandro qp->s_hdrwords = hwords; 353f48ad614SDennis Dalessandro ps->s_txreq->sde = priv->s_sde; 354e922ae06SDon Hiatt ps->s_txreq->s_cur_size = len; 355f48ad614SDennis Dalessandro hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps); 356f48ad614SDennis Dalessandro /* pbc */ 357f48ad614SDennis Dalessandro ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; 358f48ad614SDennis Dalessandro return 1; 359f48ad614SDennis Dalessandro 360f48ad614SDennis Dalessandro bail: 361f48ad614SDennis Dalessandro qp->s_ack_state = OP(ACKNOWLEDGE); 362f48ad614SDennis Dalessandro /* 363f48ad614SDennis Dalessandro * Ensure s_rdma_ack_cnt changes are committed prior to resetting 364f48ad614SDennis Dalessandro * RVT_S_RESP_PENDING 365f48ad614SDennis Dalessandro */ 366f48ad614SDennis Dalessandro smp_wmb(); 367f48ad614SDennis Dalessandro qp->s_flags &= ~(RVT_S_RESP_PENDING 368f48ad614SDennis Dalessandro | RVT_S_ACK_PENDING 369f48ad614SDennis Dalessandro | RVT_S_AHG_VALID); 370f48ad614SDennis Dalessandro return 0; 371f48ad614SDennis Dalessandro } 372f48ad614SDennis Dalessandro 373f48ad614SDennis Dalessandro /** 374f48ad614SDennis Dalessandro * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC) 375f48ad614SDennis Dalessandro * @qp: a pointer to the QP 376f48ad614SDennis Dalessandro * 377f48ad614SDennis Dalessandro * Assumes s_lock is held. 378f48ad614SDennis Dalessandro * 379f48ad614SDennis Dalessandro * Return 1 if constructed; otherwise, return 0. 380f48ad614SDennis Dalessandro */ 381f48ad614SDennis Dalessandro int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps) 382f48ad614SDennis Dalessandro { 383f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 384f48ad614SDennis Dalessandro struct hfi1_ibdev *dev = to_idev(qp->ibqp.device); 385261a4351SMike Marciniszyn struct ib_other_headers *ohdr; 386f48ad614SDennis Dalessandro struct rvt_sge_state *ss; 387f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 388f48ad614SDennis Dalessandro /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 389f48ad614SDennis Dalessandro u32 hwords = 5; 390f48ad614SDennis Dalessandro u32 len; 391f48ad614SDennis Dalessandro u32 bth0 = 0; 392f48ad614SDennis Dalessandro u32 bth2; 393f48ad614SDennis Dalessandro u32 pmtu = qp->pmtu; 394f48ad614SDennis Dalessandro char newreq; 395f48ad614SDennis Dalessandro int middle = 0; 396f48ad614SDennis Dalessandro int delta; 397f48ad614SDennis Dalessandro 39868e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 399f48ad614SDennis Dalessandro ps->s_txreq = get_txreq(ps->dev, qp); 400f48ad614SDennis Dalessandro if (IS_ERR(ps->s_txreq)) 401f48ad614SDennis Dalessandro goto bail_no_tx; 402f48ad614SDennis Dalessandro 403f48ad614SDennis Dalessandro ohdr = &ps->s_txreq->phdr.hdr.u.oth; 404f48ad614SDennis Dalessandro if (qp->remote_ah_attr.ah_flags & IB_AH_GRH) 405f48ad614SDennis Dalessandro ohdr = &ps->s_txreq->phdr.hdr.u.l.oth; 406f48ad614SDennis Dalessandro 407f48ad614SDennis Dalessandro /* Sending responses has higher priority over sending requests. */ 408f48ad614SDennis Dalessandro if ((qp->s_flags & RVT_S_RESP_PENDING) && 409f48ad614SDennis Dalessandro make_rc_ack(dev, qp, ohdr, ps)) 410f48ad614SDennis Dalessandro return 1; 411f48ad614SDennis Dalessandro 412f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) { 413f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND)) 414f48ad614SDennis Dalessandro goto bail; 415f48ad614SDennis Dalessandro /* We are in the error state, flush the work request. */ 416f48ad614SDennis Dalessandro smp_read_barrier_depends(); /* see post_one_send() */ 417f48ad614SDennis Dalessandro if (qp->s_last == ACCESS_ONCE(qp->s_head)) 418f48ad614SDennis Dalessandro goto bail; 419f48ad614SDennis Dalessandro /* If DMAs are in progress, we can't flush immediately. */ 420f48ad614SDennis Dalessandro if (iowait_sdma_pending(&priv->s_iowait)) { 421f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_DMA; 422f48ad614SDennis Dalessandro goto bail; 423f48ad614SDennis Dalessandro } 424f48ad614SDennis Dalessandro clear_ahg(qp); 425f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_last); 426f48ad614SDennis Dalessandro hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ? 427f48ad614SDennis Dalessandro IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR); 428f48ad614SDennis Dalessandro /* will get called again */ 429f48ad614SDennis Dalessandro goto done_free_tx; 430f48ad614SDennis Dalessandro } 431f48ad614SDennis Dalessandro 432f48ad614SDennis Dalessandro if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK)) 433f48ad614SDennis Dalessandro goto bail; 434f48ad614SDennis Dalessandro 435f48ad614SDennis Dalessandro if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) { 436f48ad614SDennis Dalessandro if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) { 437f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_PSN; 438f48ad614SDennis Dalessandro goto bail; 439f48ad614SDennis Dalessandro } 440f48ad614SDennis Dalessandro qp->s_sending_psn = qp->s_psn; 441f48ad614SDennis Dalessandro qp->s_sending_hpsn = qp->s_psn - 1; 442f48ad614SDennis Dalessandro } 443f48ad614SDennis Dalessandro 444f48ad614SDennis Dalessandro /* Send a request. */ 445f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_cur); 446f48ad614SDennis Dalessandro switch (qp->s_state) { 447f48ad614SDennis Dalessandro default: 448f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK)) 449f48ad614SDennis Dalessandro goto bail; 450f48ad614SDennis Dalessandro /* 451f48ad614SDennis Dalessandro * Resend an old request or start a new one. 452f48ad614SDennis Dalessandro * 453f48ad614SDennis Dalessandro * We keep track of the current SWQE so that 454f48ad614SDennis Dalessandro * we don't reset the "furthest progress" state 455f48ad614SDennis Dalessandro * if we need to back up. 456f48ad614SDennis Dalessandro */ 457f48ad614SDennis Dalessandro newreq = 0; 458f48ad614SDennis Dalessandro if (qp->s_cur == qp->s_tail) { 459f48ad614SDennis Dalessandro /* Check if send work queue is empty. */ 460f48ad614SDennis Dalessandro if (qp->s_tail == qp->s_head) { 461f48ad614SDennis Dalessandro clear_ahg(qp); 462f48ad614SDennis Dalessandro goto bail; 463f48ad614SDennis Dalessandro } 464f48ad614SDennis Dalessandro /* 465f48ad614SDennis Dalessandro * If a fence is requested, wait for previous 466f48ad614SDennis Dalessandro * RDMA read and atomic operations to finish. 467f48ad614SDennis Dalessandro */ 468f48ad614SDennis Dalessandro if ((wqe->wr.send_flags & IB_SEND_FENCE) && 469f48ad614SDennis Dalessandro qp->s_num_rd_atomic) { 470f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_FENCE; 471f48ad614SDennis Dalessandro goto bail; 472f48ad614SDennis Dalessandro } 4730db3dfa0SJianxin Xiong /* 4740db3dfa0SJianxin Xiong * Local operations are processed immediately 4750db3dfa0SJianxin Xiong * after all prior requests have completed 4760db3dfa0SJianxin Xiong */ 4770db3dfa0SJianxin Xiong if (wqe->wr.opcode == IB_WR_REG_MR || 4780db3dfa0SJianxin Xiong wqe->wr.opcode == IB_WR_LOCAL_INV) { 479d9b13c20SJianxin Xiong int local_ops = 0; 480d9b13c20SJianxin Xiong int err = 0; 481d9b13c20SJianxin Xiong 4820db3dfa0SJianxin Xiong if (qp->s_last != qp->s_cur) 4830db3dfa0SJianxin Xiong goto bail; 4840db3dfa0SJianxin Xiong if (++qp->s_cur == qp->s_size) 4850db3dfa0SJianxin Xiong qp->s_cur = 0; 4860db3dfa0SJianxin Xiong if (++qp->s_tail == qp->s_size) 4870db3dfa0SJianxin Xiong qp->s_tail = 0; 488d9b13c20SJianxin Xiong if (!(wqe->wr.send_flags & 489d9b13c20SJianxin Xiong RVT_SEND_COMPLETION_ONLY)) { 4900db3dfa0SJianxin Xiong err = rvt_invalidate_rkey( 4910db3dfa0SJianxin Xiong qp, 4920db3dfa0SJianxin Xiong wqe->wr.ex.invalidate_rkey); 493d9b13c20SJianxin Xiong local_ops = 1; 494d9b13c20SJianxin Xiong } 4950db3dfa0SJianxin Xiong hfi1_send_complete(qp, wqe, 4960db3dfa0SJianxin Xiong err ? IB_WC_LOC_PROT_ERR 4970db3dfa0SJianxin Xiong : IB_WC_SUCCESS); 498d9b13c20SJianxin Xiong if (local_ops) 4990db3dfa0SJianxin Xiong atomic_dec(&qp->local_ops_pending); 5000db3dfa0SJianxin Xiong qp->s_hdrwords = 0; 5010db3dfa0SJianxin Xiong goto done_free_tx; 5020db3dfa0SJianxin Xiong } 5030db3dfa0SJianxin Xiong 504f48ad614SDennis Dalessandro newreq = 1; 505f48ad614SDennis Dalessandro qp->s_psn = wqe->psn; 506f48ad614SDennis Dalessandro } 507f48ad614SDennis Dalessandro /* 508f48ad614SDennis Dalessandro * Note that we have to be careful not to modify the 509f48ad614SDennis Dalessandro * original work request since we may need to resend 510f48ad614SDennis Dalessandro * it. 511f48ad614SDennis Dalessandro */ 512f48ad614SDennis Dalessandro len = wqe->length; 513f48ad614SDennis Dalessandro ss = &qp->s_sge; 514f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_psn); 515f48ad614SDennis Dalessandro switch (wqe->wr.opcode) { 516f48ad614SDennis Dalessandro case IB_WR_SEND: 517f48ad614SDennis Dalessandro case IB_WR_SEND_WITH_IMM: 5180db3dfa0SJianxin Xiong case IB_WR_SEND_WITH_INV: 519f48ad614SDennis Dalessandro /* If no credit, return. */ 520f48ad614SDennis Dalessandro if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) && 521f48ad614SDennis Dalessandro cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) { 522f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_SSN_CREDIT; 523f48ad614SDennis Dalessandro goto bail; 524f48ad614SDennis Dalessandro } 525f48ad614SDennis Dalessandro if (len > pmtu) { 526f48ad614SDennis Dalessandro qp->s_state = OP(SEND_FIRST); 527f48ad614SDennis Dalessandro len = pmtu; 528f48ad614SDennis Dalessandro break; 529f48ad614SDennis Dalessandro } 530f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_SEND) { 531f48ad614SDennis Dalessandro qp->s_state = OP(SEND_ONLY); 5320db3dfa0SJianxin Xiong } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 533f48ad614SDennis Dalessandro qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE); 534f48ad614SDennis Dalessandro /* Immediate data comes after the BTH */ 535f48ad614SDennis Dalessandro ohdr->u.imm_data = wqe->wr.ex.imm_data; 536f48ad614SDennis Dalessandro hwords += 1; 5370db3dfa0SJianxin Xiong } else { 5380db3dfa0SJianxin Xiong qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE); 5390db3dfa0SJianxin Xiong /* Invalidate rkey comes after the BTH */ 5400db3dfa0SJianxin Xiong ohdr->u.ieth = cpu_to_be32( 5410db3dfa0SJianxin Xiong wqe->wr.ex.invalidate_rkey); 5420db3dfa0SJianxin Xiong hwords += 1; 543f48ad614SDennis Dalessandro } 544f48ad614SDennis Dalessandro if (wqe->wr.send_flags & IB_SEND_SOLICITED) 545f48ad614SDennis Dalessandro bth0 |= IB_BTH_SOLICITED; 546f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 547f48ad614SDennis Dalessandro if (++qp->s_cur == qp->s_size) 548f48ad614SDennis Dalessandro qp->s_cur = 0; 549f48ad614SDennis Dalessandro break; 550f48ad614SDennis Dalessandro 551f48ad614SDennis Dalessandro case IB_WR_RDMA_WRITE: 552f48ad614SDennis Dalessandro if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT)) 553f48ad614SDennis Dalessandro qp->s_lsn++; 554f48ad614SDennis Dalessandro /* FALLTHROUGH */ 555f48ad614SDennis Dalessandro case IB_WR_RDMA_WRITE_WITH_IMM: 556f48ad614SDennis Dalessandro /* If no credit, return. */ 557f48ad614SDennis Dalessandro if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) && 558f48ad614SDennis Dalessandro cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) { 559f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_SSN_CREDIT; 560f48ad614SDennis Dalessandro goto bail; 561f48ad614SDennis Dalessandro } 562261a4351SMike Marciniszyn put_ib_reth_vaddr( 563261a4351SMike Marciniszyn wqe->rdma_wr.remote_addr, 564261a4351SMike Marciniszyn &ohdr->u.rc.reth); 565f48ad614SDennis Dalessandro ohdr->u.rc.reth.rkey = 566f48ad614SDennis Dalessandro cpu_to_be32(wqe->rdma_wr.rkey); 567f48ad614SDennis Dalessandro ohdr->u.rc.reth.length = cpu_to_be32(len); 568f48ad614SDennis Dalessandro hwords += sizeof(struct ib_reth) / sizeof(u32); 569f48ad614SDennis Dalessandro if (len > pmtu) { 570f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_WRITE_FIRST); 571f48ad614SDennis Dalessandro len = pmtu; 572f48ad614SDennis Dalessandro break; 573f48ad614SDennis Dalessandro } 574f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { 575f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_WRITE_ONLY); 576f48ad614SDennis Dalessandro } else { 577f48ad614SDennis Dalessandro qp->s_state = 578f48ad614SDennis Dalessandro OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); 579f48ad614SDennis Dalessandro /* Immediate data comes after RETH */ 580f48ad614SDennis Dalessandro ohdr->u.rc.imm_data = wqe->wr.ex.imm_data; 581f48ad614SDennis Dalessandro hwords += 1; 582f48ad614SDennis Dalessandro if (wqe->wr.send_flags & IB_SEND_SOLICITED) 583f48ad614SDennis Dalessandro bth0 |= IB_BTH_SOLICITED; 584f48ad614SDennis Dalessandro } 585f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 586f48ad614SDennis Dalessandro if (++qp->s_cur == qp->s_size) 587f48ad614SDennis Dalessandro qp->s_cur = 0; 588f48ad614SDennis Dalessandro break; 589f48ad614SDennis Dalessandro 590f48ad614SDennis Dalessandro case IB_WR_RDMA_READ: 591f48ad614SDennis Dalessandro /* 592f48ad614SDennis Dalessandro * Don't allow more operations to be started 593f48ad614SDennis Dalessandro * than the QP limits allow. 594f48ad614SDennis Dalessandro */ 595f48ad614SDennis Dalessandro if (newreq) { 596f48ad614SDennis Dalessandro if (qp->s_num_rd_atomic >= 597f48ad614SDennis Dalessandro qp->s_max_rd_atomic) { 598f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_RDMAR; 599f48ad614SDennis Dalessandro goto bail; 600f48ad614SDennis Dalessandro } 601f48ad614SDennis Dalessandro qp->s_num_rd_atomic++; 602f48ad614SDennis Dalessandro if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT)) 603f48ad614SDennis Dalessandro qp->s_lsn++; 604f48ad614SDennis Dalessandro } 605261a4351SMike Marciniszyn put_ib_reth_vaddr( 606261a4351SMike Marciniszyn wqe->rdma_wr.remote_addr, 607261a4351SMike Marciniszyn &ohdr->u.rc.reth); 608f48ad614SDennis Dalessandro ohdr->u.rc.reth.rkey = 609f48ad614SDennis Dalessandro cpu_to_be32(wqe->rdma_wr.rkey); 610f48ad614SDennis Dalessandro ohdr->u.rc.reth.length = cpu_to_be32(len); 611f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_READ_REQUEST); 612f48ad614SDennis Dalessandro hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32); 613f48ad614SDennis Dalessandro ss = NULL; 614f48ad614SDennis Dalessandro len = 0; 615f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 616f48ad614SDennis Dalessandro if (++qp->s_cur == qp->s_size) 617f48ad614SDennis Dalessandro qp->s_cur = 0; 618f48ad614SDennis Dalessandro break; 619f48ad614SDennis Dalessandro 620f48ad614SDennis Dalessandro case IB_WR_ATOMIC_CMP_AND_SWP: 621f48ad614SDennis Dalessandro case IB_WR_ATOMIC_FETCH_AND_ADD: 622f48ad614SDennis Dalessandro /* 623f48ad614SDennis Dalessandro * Don't allow more operations to be started 624f48ad614SDennis Dalessandro * than the QP limits allow. 625f48ad614SDennis Dalessandro */ 626f48ad614SDennis Dalessandro if (newreq) { 627f48ad614SDennis Dalessandro if (qp->s_num_rd_atomic >= 628f48ad614SDennis Dalessandro qp->s_max_rd_atomic) { 629f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_RDMAR; 630f48ad614SDennis Dalessandro goto bail; 631f48ad614SDennis Dalessandro } 632f48ad614SDennis Dalessandro qp->s_num_rd_atomic++; 633f48ad614SDennis Dalessandro if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT)) 634f48ad614SDennis Dalessandro qp->s_lsn++; 635f48ad614SDennis Dalessandro } 636f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { 637f48ad614SDennis Dalessandro qp->s_state = OP(COMPARE_SWAP); 638261a4351SMike Marciniszyn put_ib_ateth_swap(wqe->atomic_wr.swap, 639261a4351SMike Marciniszyn &ohdr->u.atomic_eth); 640261a4351SMike Marciniszyn put_ib_ateth_compare(wqe->atomic_wr.compare_add, 641261a4351SMike Marciniszyn &ohdr->u.atomic_eth); 642f48ad614SDennis Dalessandro } else { 643f48ad614SDennis Dalessandro qp->s_state = OP(FETCH_ADD); 644261a4351SMike Marciniszyn put_ib_ateth_swap(wqe->atomic_wr.compare_add, 645261a4351SMike Marciniszyn &ohdr->u.atomic_eth); 646261a4351SMike Marciniszyn put_ib_ateth_compare(0, &ohdr->u.atomic_eth); 647f48ad614SDennis Dalessandro } 648261a4351SMike Marciniszyn put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr, 649261a4351SMike Marciniszyn &ohdr->u.atomic_eth); 650f48ad614SDennis Dalessandro ohdr->u.atomic_eth.rkey = cpu_to_be32( 651f48ad614SDennis Dalessandro wqe->atomic_wr.rkey); 652f48ad614SDennis Dalessandro hwords += sizeof(struct ib_atomic_eth) / sizeof(u32); 653f48ad614SDennis Dalessandro ss = NULL; 654f48ad614SDennis Dalessandro len = 0; 655f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 656f48ad614SDennis Dalessandro if (++qp->s_cur == qp->s_size) 657f48ad614SDennis Dalessandro qp->s_cur = 0; 658f48ad614SDennis Dalessandro break; 659f48ad614SDennis Dalessandro 660f48ad614SDennis Dalessandro default: 661f48ad614SDennis Dalessandro goto bail; 662f48ad614SDennis Dalessandro } 663f48ad614SDennis Dalessandro qp->s_sge.sge = wqe->sg_list[0]; 664f48ad614SDennis Dalessandro qp->s_sge.sg_list = wqe->sg_list + 1; 665f48ad614SDennis Dalessandro qp->s_sge.num_sge = wqe->wr.num_sge; 666f48ad614SDennis Dalessandro qp->s_sge.total_len = wqe->length; 667f48ad614SDennis Dalessandro qp->s_len = wqe->length; 668f48ad614SDennis Dalessandro if (newreq) { 669f48ad614SDennis Dalessandro qp->s_tail++; 670f48ad614SDennis Dalessandro if (qp->s_tail >= qp->s_size) 671f48ad614SDennis Dalessandro qp->s_tail = 0; 672f48ad614SDennis Dalessandro } 673f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_READ) 674f48ad614SDennis Dalessandro qp->s_psn = wqe->lpsn + 1; 675f48ad614SDennis Dalessandro else 676f48ad614SDennis Dalessandro qp->s_psn++; 677f48ad614SDennis Dalessandro break; 678f48ad614SDennis Dalessandro 679f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_FIRST): 680f48ad614SDennis Dalessandro /* 681f48ad614SDennis Dalessandro * qp->s_state is normally set to the opcode of the 682f48ad614SDennis Dalessandro * last packet constructed for new requests and therefore 683f48ad614SDennis Dalessandro * is never set to RDMA read response. 684f48ad614SDennis Dalessandro * RDMA_READ_RESPONSE_FIRST is used by the ACK processing 685f48ad614SDennis Dalessandro * thread to indicate a SEND needs to be restarted from an 686f48ad614SDennis Dalessandro * earlier PSN without interfering with the sending thread. 687f48ad614SDennis Dalessandro * See restart_rc(). 688f48ad614SDennis Dalessandro */ 689f48ad614SDennis Dalessandro qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu); 690f48ad614SDennis Dalessandro /* FALLTHROUGH */ 691f48ad614SDennis Dalessandro case OP(SEND_FIRST): 692f48ad614SDennis Dalessandro qp->s_state = OP(SEND_MIDDLE); 693f48ad614SDennis Dalessandro /* FALLTHROUGH */ 694f48ad614SDennis Dalessandro case OP(SEND_MIDDLE): 695f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_psn++); 696f48ad614SDennis Dalessandro ss = &qp->s_sge; 697f48ad614SDennis Dalessandro len = qp->s_len; 698f48ad614SDennis Dalessandro if (len > pmtu) { 699f48ad614SDennis Dalessandro len = pmtu; 700f48ad614SDennis Dalessandro middle = HFI1_CAP_IS_KSET(SDMA_AHG); 701f48ad614SDennis Dalessandro break; 702f48ad614SDennis Dalessandro } 703f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_SEND) { 704f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST); 7050db3dfa0SJianxin Xiong } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 706f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); 707f48ad614SDennis Dalessandro /* Immediate data comes after the BTH */ 708f48ad614SDennis Dalessandro ohdr->u.imm_data = wqe->wr.ex.imm_data; 709f48ad614SDennis Dalessandro hwords += 1; 7100db3dfa0SJianxin Xiong } else { 7110db3dfa0SJianxin Xiong qp->s_state = OP(SEND_LAST_WITH_INVALIDATE); 7120db3dfa0SJianxin Xiong /* invalidate data comes after the BTH */ 7130db3dfa0SJianxin Xiong ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey); 7140db3dfa0SJianxin Xiong hwords += 1; 715f48ad614SDennis Dalessandro } 716f48ad614SDennis Dalessandro if (wqe->wr.send_flags & IB_SEND_SOLICITED) 717f48ad614SDennis Dalessandro bth0 |= IB_BTH_SOLICITED; 718f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 719f48ad614SDennis Dalessandro qp->s_cur++; 720f48ad614SDennis Dalessandro if (qp->s_cur >= qp->s_size) 721f48ad614SDennis Dalessandro qp->s_cur = 0; 722f48ad614SDennis Dalessandro break; 723f48ad614SDennis Dalessandro 724f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_LAST): 725f48ad614SDennis Dalessandro /* 726f48ad614SDennis Dalessandro * qp->s_state is normally set to the opcode of the 727f48ad614SDennis Dalessandro * last packet constructed for new requests and therefore 728f48ad614SDennis Dalessandro * is never set to RDMA read response. 729f48ad614SDennis Dalessandro * RDMA_READ_RESPONSE_LAST is used by the ACK processing 730f48ad614SDennis Dalessandro * thread to indicate a RDMA write needs to be restarted from 731f48ad614SDennis Dalessandro * an earlier PSN without interfering with the sending thread. 732f48ad614SDennis Dalessandro * See restart_rc(). 733f48ad614SDennis Dalessandro */ 734f48ad614SDennis Dalessandro qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu); 735f48ad614SDennis Dalessandro /* FALLTHROUGH */ 736f48ad614SDennis Dalessandro case OP(RDMA_WRITE_FIRST): 737f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_WRITE_MIDDLE); 738f48ad614SDennis Dalessandro /* FALLTHROUGH */ 739f48ad614SDennis Dalessandro case OP(RDMA_WRITE_MIDDLE): 740f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_psn++); 741f48ad614SDennis Dalessandro ss = &qp->s_sge; 742f48ad614SDennis Dalessandro len = qp->s_len; 743f48ad614SDennis Dalessandro if (len > pmtu) { 744f48ad614SDennis Dalessandro len = pmtu; 745f48ad614SDennis Dalessandro middle = HFI1_CAP_IS_KSET(SDMA_AHG); 746f48ad614SDennis Dalessandro break; 747f48ad614SDennis Dalessandro } 748f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { 749f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_WRITE_LAST); 750f48ad614SDennis Dalessandro } else { 751f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); 752f48ad614SDennis Dalessandro /* Immediate data comes after the BTH */ 753f48ad614SDennis Dalessandro ohdr->u.imm_data = wqe->wr.ex.imm_data; 754f48ad614SDennis Dalessandro hwords += 1; 755f48ad614SDennis Dalessandro if (wqe->wr.send_flags & IB_SEND_SOLICITED) 756f48ad614SDennis Dalessandro bth0 |= IB_BTH_SOLICITED; 757f48ad614SDennis Dalessandro } 758f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 759f48ad614SDennis Dalessandro qp->s_cur++; 760f48ad614SDennis Dalessandro if (qp->s_cur >= qp->s_size) 761f48ad614SDennis Dalessandro qp->s_cur = 0; 762f48ad614SDennis Dalessandro break; 763f48ad614SDennis Dalessandro 764f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_MIDDLE): 765f48ad614SDennis Dalessandro /* 766f48ad614SDennis Dalessandro * qp->s_state is normally set to the opcode of the 767f48ad614SDennis Dalessandro * last packet constructed for new requests and therefore 768f48ad614SDennis Dalessandro * is never set to RDMA read response. 769f48ad614SDennis Dalessandro * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing 770f48ad614SDennis Dalessandro * thread to indicate a RDMA read needs to be restarted from 771f48ad614SDennis Dalessandro * an earlier PSN without interfering with the sending thread. 772f48ad614SDennis Dalessandro * See restart_rc(). 773f48ad614SDennis Dalessandro */ 774f48ad614SDennis Dalessandro len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu; 775261a4351SMike Marciniszyn put_ib_reth_vaddr( 776261a4351SMike Marciniszyn wqe->rdma_wr.remote_addr + len, 777261a4351SMike Marciniszyn &ohdr->u.rc.reth); 778f48ad614SDennis Dalessandro ohdr->u.rc.reth.rkey = 779f48ad614SDennis Dalessandro cpu_to_be32(wqe->rdma_wr.rkey); 780f48ad614SDennis Dalessandro ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len); 781f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_READ_REQUEST); 782f48ad614SDennis Dalessandro hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32); 783f48ad614SDennis Dalessandro bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK; 784f48ad614SDennis Dalessandro qp->s_psn = wqe->lpsn + 1; 785f48ad614SDennis Dalessandro ss = NULL; 786f48ad614SDennis Dalessandro len = 0; 787f48ad614SDennis Dalessandro qp->s_cur++; 788f48ad614SDennis Dalessandro if (qp->s_cur == qp->s_size) 789f48ad614SDennis Dalessandro qp->s_cur = 0; 790f48ad614SDennis Dalessandro break; 791f48ad614SDennis Dalessandro } 792f48ad614SDennis Dalessandro qp->s_sending_hpsn = bth2; 793f48ad614SDennis Dalessandro delta = delta_psn(bth2, wqe->psn); 794f48ad614SDennis Dalessandro if (delta && delta % HFI1_PSN_CREDIT == 0) 795f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 796f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_SEND_ONE) { 797f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_SEND_ONE; 798f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_ACK; 799f48ad614SDennis Dalessandro bth2 |= IB_BTH_REQ_ACK; 800f48ad614SDennis Dalessandro } 801f48ad614SDennis Dalessandro qp->s_len -= len; 802f48ad614SDennis Dalessandro qp->s_hdrwords = hwords; 803f48ad614SDennis Dalessandro ps->s_txreq->sde = priv->s_sde; 804b777f154SMitko Haralanov ps->s_txreq->ss = ss; 805e922ae06SDon Hiatt ps->s_txreq->s_cur_size = len; 806f48ad614SDennis Dalessandro hfi1_make_ruc_header( 807f48ad614SDennis Dalessandro qp, 808f48ad614SDennis Dalessandro ohdr, 809f48ad614SDennis Dalessandro bth0 | (qp->s_state << 24), 810f48ad614SDennis Dalessandro bth2, 811f48ad614SDennis Dalessandro middle, 812f48ad614SDennis Dalessandro ps); 813f48ad614SDennis Dalessandro /* pbc */ 814f48ad614SDennis Dalessandro ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; 815f48ad614SDennis Dalessandro return 1; 816f48ad614SDennis Dalessandro 817f48ad614SDennis Dalessandro done_free_tx: 818f48ad614SDennis Dalessandro hfi1_put_txreq(ps->s_txreq); 819f48ad614SDennis Dalessandro ps->s_txreq = NULL; 820f48ad614SDennis Dalessandro return 1; 821f48ad614SDennis Dalessandro 822f48ad614SDennis Dalessandro bail: 823f48ad614SDennis Dalessandro hfi1_put_txreq(ps->s_txreq); 824f48ad614SDennis Dalessandro 825f48ad614SDennis Dalessandro bail_no_tx: 826f48ad614SDennis Dalessandro ps->s_txreq = NULL; 827f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_BUSY; 828f48ad614SDennis Dalessandro qp->s_hdrwords = 0; 829f48ad614SDennis Dalessandro return 0; 830f48ad614SDennis Dalessandro } 831f48ad614SDennis Dalessandro 832f48ad614SDennis Dalessandro /** 833f48ad614SDennis Dalessandro * hfi1_send_rc_ack - Construct an ACK packet and send it 834f48ad614SDennis Dalessandro * @qp: a pointer to the QP 835f48ad614SDennis Dalessandro * 836f48ad614SDennis Dalessandro * This is called from hfi1_rc_rcv() and handle_receive_interrupt(). 837f48ad614SDennis Dalessandro * Note that RDMA reads and atomics are handled in the 838ca00c62bSDennis Dalessandro * send side QP state and send engine. 839f48ad614SDennis Dalessandro */ 840f48ad614SDennis Dalessandro void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp, 841f48ad614SDennis Dalessandro int is_fecn) 842f48ad614SDennis Dalessandro { 843f48ad614SDennis Dalessandro struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 844f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 845f48ad614SDennis Dalessandro u64 pbc, pbc_flags = 0; 846f48ad614SDennis Dalessandro u16 lrh0; 847f48ad614SDennis Dalessandro u16 sc5; 848f48ad614SDennis Dalessandro u32 bth0; 849f48ad614SDennis Dalessandro u32 hwords; 850f48ad614SDennis Dalessandro u32 vl, plen; 851f48ad614SDennis Dalessandro struct send_context *sc; 852f48ad614SDennis Dalessandro struct pio_buf *pbuf; 853261a4351SMike Marciniszyn struct ib_header hdr; 854261a4351SMike Marciniszyn struct ib_other_headers *ohdr; 855f48ad614SDennis Dalessandro unsigned long flags; 8564fcf1de5SMike Marciniszyn struct hfi1_qp_priv *priv = qp->priv; 8574fcf1de5SMike Marciniszyn 8584fcf1de5SMike Marciniszyn /* clear the defer count */ 8594fcf1de5SMike Marciniszyn priv->r_adefered = 0; 860f48ad614SDennis Dalessandro 861f48ad614SDennis Dalessandro /* Don't send ACK or NAK if a RDMA read or atomic is pending. */ 862f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_RESP_PENDING) 863f48ad614SDennis Dalessandro goto queue_ack; 864f48ad614SDennis Dalessandro 865f48ad614SDennis Dalessandro /* Ensure s_rdma_ack_cnt changes are committed */ 866f48ad614SDennis Dalessandro smp_read_barrier_depends(); 867f48ad614SDennis Dalessandro if (qp->s_rdma_ack_cnt) 868f48ad614SDennis Dalessandro goto queue_ack; 869f48ad614SDennis Dalessandro 870f48ad614SDennis Dalessandro /* Construct the header */ 871f48ad614SDennis Dalessandro /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */ 872f48ad614SDennis Dalessandro hwords = 6; 873f48ad614SDennis Dalessandro if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) { 874f48ad614SDennis Dalessandro hwords += hfi1_make_grh(ibp, &hdr.u.l.grh, 875f48ad614SDennis Dalessandro &qp->remote_ah_attr.grh, hwords, 0); 876f48ad614SDennis Dalessandro ohdr = &hdr.u.l.oth; 877f48ad614SDennis Dalessandro lrh0 = HFI1_LRH_GRH; 878f48ad614SDennis Dalessandro } else { 879f48ad614SDennis Dalessandro ohdr = &hdr.u.oth; 880f48ad614SDennis Dalessandro lrh0 = HFI1_LRH_BTH; 881f48ad614SDennis Dalessandro } 882f48ad614SDennis Dalessandro /* read pkey_index w/o lock (its atomic) */ 883f48ad614SDennis Dalessandro bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24); 884f48ad614SDennis Dalessandro if (qp->s_mig_state == IB_MIG_MIGRATED) 885f48ad614SDennis Dalessandro bth0 |= IB_BTH_MIG_REQ; 886f48ad614SDennis Dalessandro if (qp->r_nak_state) 887f48ad614SDennis Dalessandro ohdr->u.aeth = cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) | 888f48ad614SDennis Dalessandro (qp->r_nak_state << 889f48ad614SDennis Dalessandro HFI1_AETH_CREDIT_SHIFT)); 890f48ad614SDennis Dalessandro else 891f48ad614SDennis Dalessandro ohdr->u.aeth = hfi1_compute_aeth(qp); 892f48ad614SDennis Dalessandro sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl]; 893f48ad614SDennis Dalessandro /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */ 894f48ad614SDennis Dalessandro pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT); 895f48ad614SDennis Dalessandro lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4; 896f48ad614SDennis Dalessandro hdr.lrh[0] = cpu_to_be16(lrh0); 897f48ad614SDennis Dalessandro hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid); 898f48ad614SDennis Dalessandro hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC); 899f48ad614SDennis Dalessandro hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits); 900f48ad614SDennis Dalessandro ohdr->bth[0] = cpu_to_be32(bth0); 901f48ad614SDennis Dalessandro ohdr->bth[1] = cpu_to_be32(qp->remote_qpn); 902f48ad614SDennis Dalessandro ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT); 903f48ad614SDennis Dalessandro ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn)); 904f48ad614SDennis Dalessandro 905f48ad614SDennis Dalessandro /* Don't try to send ACKs if the link isn't ACTIVE */ 906f48ad614SDennis Dalessandro if (driver_lstate(ppd) != IB_PORT_ACTIVE) 907f48ad614SDennis Dalessandro return; 908f48ad614SDennis Dalessandro 909f48ad614SDennis Dalessandro sc = rcd->sc; 910f48ad614SDennis Dalessandro plen = 2 /* PBC */ + hwords; 911f48ad614SDennis Dalessandro vl = sc_to_vlt(ppd->dd, sc5); 912f48ad614SDennis Dalessandro pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen); 913f48ad614SDennis Dalessandro 914f48ad614SDennis Dalessandro pbuf = sc_buffer_alloc(sc, plen, NULL, NULL); 915f48ad614SDennis Dalessandro if (!pbuf) { 916f48ad614SDennis Dalessandro /* 917f48ad614SDennis Dalessandro * We have no room to send at the moment. Pass 918ca00c62bSDennis Dalessandro * responsibility for sending the ACK to the send engine 919f48ad614SDennis Dalessandro * so that when enough buffer space becomes available, 920f48ad614SDennis Dalessandro * the ACK is sent ahead of other outgoing packets. 921f48ad614SDennis Dalessandro */ 922f48ad614SDennis Dalessandro goto queue_ack; 923f48ad614SDennis Dalessandro } 924f48ad614SDennis Dalessandro 925f48ad614SDennis Dalessandro trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr); 926f48ad614SDennis Dalessandro 927f48ad614SDennis Dalessandro /* write the pbc and data */ 928f48ad614SDennis Dalessandro ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords); 929f48ad614SDennis Dalessandro 930f48ad614SDennis Dalessandro return; 931f48ad614SDennis Dalessandro 932f48ad614SDennis Dalessandro queue_ack: 933f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 93472f53af2SMike Marciniszyn if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) 93572f53af2SMike Marciniszyn goto unlock; 93672f53af2SMike Marciniszyn this_cpu_inc(*ibp->rvp.rc_qacks); 937f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING; 938f48ad614SDennis Dalessandro qp->s_nak_state = qp->r_nak_state; 939f48ad614SDennis Dalessandro qp->s_ack_psn = qp->r_ack_psn; 940f48ad614SDennis Dalessandro if (is_fecn) 941f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_ECN; 942f48ad614SDennis Dalessandro 943ca00c62bSDennis Dalessandro /* Schedule the send engine. */ 944f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 94572f53af2SMike Marciniszyn unlock: 946f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 947f48ad614SDennis Dalessandro } 948f48ad614SDennis Dalessandro 949f48ad614SDennis Dalessandro /** 950f48ad614SDennis Dalessandro * reset_psn - reset the QP state to send starting from PSN 951f48ad614SDennis Dalessandro * @qp: the QP 952f48ad614SDennis Dalessandro * @psn: the packet sequence number to restart at 953f48ad614SDennis Dalessandro * 954f48ad614SDennis Dalessandro * This is called from hfi1_rc_rcv() to process an incoming RC ACK 955f48ad614SDennis Dalessandro * for the given QP. 956f48ad614SDennis Dalessandro * Called at interrupt level with the QP s_lock held. 957f48ad614SDennis Dalessandro */ 958f48ad614SDennis Dalessandro static void reset_psn(struct rvt_qp *qp, u32 psn) 959f48ad614SDennis Dalessandro { 960f48ad614SDennis Dalessandro u32 n = qp->s_acked; 961f48ad614SDennis Dalessandro struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n); 962f48ad614SDennis Dalessandro u32 opcode; 963f48ad614SDennis Dalessandro 96468e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 965f48ad614SDennis Dalessandro qp->s_cur = n; 966f48ad614SDennis Dalessandro 967f48ad614SDennis Dalessandro /* 968f48ad614SDennis Dalessandro * If we are starting the request from the beginning, 969f48ad614SDennis Dalessandro * let the normal send code handle initialization. 970f48ad614SDennis Dalessandro */ 971f48ad614SDennis Dalessandro if (cmp_psn(psn, wqe->psn) <= 0) { 972f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST); 973f48ad614SDennis Dalessandro goto done; 974f48ad614SDennis Dalessandro } 975f48ad614SDennis Dalessandro 976f48ad614SDennis Dalessandro /* Find the work request opcode corresponding to the given PSN. */ 977f48ad614SDennis Dalessandro opcode = wqe->wr.opcode; 978f48ad614SDennis Dalessandro for (;;) { 979f48ad614SDennis Dalessandro int diff; 980f48ad614SDennis Dalessandro 981f48ad614SDennis Dalessandro if (++n == qp->s_size) 982f48ad614SDennis Dalessandro n = 0; 983f48ad614SDennis Dalessandro if (n == qp->s_tail) 984f48ad614SDennis Dalessandro break; 985f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, n); 986f48ad614SDennis Dalessandro diff = cmp_psn(psn, wqe->psn); 987f48ad614SDennis Dalessandro if (diff < 0) 988f48ad614SDennis Dalessandro break; 989f48ad614SDennis Dalessandro qp->s_cur = n; 990f48ad614SDennis Dalessandro /* 991f48ad614SDennis Dalessandro * If we are starting the request from the beginning, 992f48ad614SDennis Dalessandro * let the normal send code handle initialization. 993f48ad614SDennis Dalessandro */ 994f48ad614SDennis Dalessandro if (diff == 0) { 995f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST); 996f48ad614SDennis Dalessandro goto done; 997f48ad614SDennis Dalessandro } 998f48ad614SDennis Dalessandro opcode = wqe->wr.opcode; 999f48ad614SDennis Dalessandro } 1000f48ad614SDennis Dalessandro 1001f48ad614SDennis Dalessandro /* 1002f48ad614SDennis Dalessandro * Set the state to restart in the middle of a request. 1003f48ad614SDennis Dalessandro * Don't change the s_sge, s_cur_sge, or s_cur_size. 1004f48ad614SDennis Dalessandro * See hfi1_make_rc_req(). 1005f48ad614SDennis Dalessandro */ 1006f48ad614SDennis Dalessandro switch (opcode) { 1007f48ad614SDennis Dalessandro case IB_WR_SEND: 1008f48ad614SDennis Dalessandro case IB_WR_SEND_WITH_IMM: 1009f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_READ_RESPONSE_FIRST); 1010f48ad614SDennis Dalessandro break; 1011f48ad614SDennis Dalessandro 1012f48ad614SDennis Dalessandro case IB_WR_RDMA_WRITE: 1013f48ad614SDennis Dalessandro case IB_WR_RDMA_WRITE_WITH_IMM: 1014f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_READ_RESPONSE_LAST); 1015f48ad614SDennis Dalessandro break; 1016f48ad614SDennis Dalessandro 1017f48ad614SDennis Dalessandro case IB_WR_RDMA_READ: 1018f48ad614SDennis Dalessandro qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE); 1019f48ad614SDennis Dalessandro break; 1020f48ad614SDennis Dalessandro 1021f48ad614SDennis Dalessandro default: 1022f48ad614SDennis Dalessandro /* 1023f48ad614SDennis Dalessandro * This case shouldn't happen since its only 1024f48ad614SDennis Dalessandro * one PSN per req. 1025f48ad614SDennis Dalessandro */ 1026f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST); 1027f48ad614SDennis Dalessandro } 1028f48ad614SDennis Dalessandro done: 1029f48ad614SDennis Dalessandro qp->s_psn = psn; 1030f48ad614SDennis Dalessandro /* 1031f48ad614SDennis Dalessandro * Set RVT_S_WAIT_PSN as rc_complete() may start the timer 1032ca00c62bSDennis Dalessandro * asynchronously before the send engine can get scheduled. 1033f48ad614SDennis Dalessandro * Doing it in hfi1_make_rc_req() is too late. 1034f48ad614SDennis Dalessandro */ 1035f48ad614SDennis Dalessandro if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) && 1036f48ad614SDennis Dalessandro (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) 1037f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_PSN; 1038f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_AHG_VALID; 1039f48ad614SDennis Dalessandro } 1040f48ad614SDennis Dalessandro 1041f48ad614SDennis Dalessandro /* 1042f48ad614SDennis Dalessandro * Back up requester to resend the last un-ACKed request. 1043f48ad614SDennis Dalessandro * The QP r_lock and s_lock should be held and interrupts disabled. 1044f48ad614SDennis Dalessandro */ 1045f48ad614SDennis Dalessandro static void restart_rc(struct rvt_qp *qp, u32 psn, int wait) 1046f48ad614SDennis Dalessandro { 1047f48ad614SDennis Dalessandro struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1048f48ad614SDennis Dalessandro struct hfi1_ibport *ibp; 1049f48ad614SDennis Dalessandro 105068e78b3dSMike Marciniszyn lockdep_assert_held(&qp->r_lock); 105168e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 1052f48ad614SDennis Dalessandro if (qp->s_retry == 0) { 1053f48ad614SDennis Dalessandro if (qp->s_mig_state == IB_MIG_ARMED) { 1054f48ad614SDennis Dalessandro hfi1_migrate_qp(qp); 1055f48ad614SDennis Dalessandro qp->s_retry = qp->s_retry_cnt; 1056f48ad614SDennis Dalessandro } else if (qp->s_last == qp->s_acked) { 1057f48ad614SDennis Dalessandro hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR); 1058f48ad614SDennis Dalessandro rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1059f48ad614SDennis Dalessandro return; 1060f48ad614SDennis Dalessandro } else { /* need to handle delayed completion */ 1061f48ad614SDennis Dalessandro return; 1062f48ad614SDennis Dalessandro } 1063f48ad614SDennis Dalessandro } else { 1064f48ad614SDennis Dalessandro qp->s_retry--; 1065f48ad614SDennis Dalessandro } 1066f48ad614SDennis Dalessandro 1067f48ad614SDennis Dalessandro ibp = to_iport(qp->ibqp.device, qp->port_num); 1068f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_READ) 1069f48ad614SDennis Dalessandro ibp->rvp.n_rc_resends++; 1070f48ad614SDennis Dalessandro else 1071f48ad614SDennis Dalessandro ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn); 1072f48ad614SDennis Dalessandro 1073f48ad614SDennis Dalessandro qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR | 1074f48ad614SDennis Dalessandro RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN | 1075f48ad614SDennis Dalessandro RVT_S_WAIT_ACK); 1076f48ad614SDennis Dalessandro if (wait) 1077f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_SEND_ONE; 1078f48ad614SDennis Dalessandro reset_psn(qp, psn); 1079f48ad614SDennis Dalessandro } 1080f48ad614SDennis Dalessandro 1081f48ad614SDennis Dalessandro /* 1082f48ad614SDennis Dalessandro * This is called from s_timer for missing responses. 1083f48ad614SDennis Dalessandro */ 1084f48ad614SDennis Dalessandro void hfi1_rc_timeout(unsigned long arg) 1085f48ad614SDennis Dalessandro { 1086f48ad614SDennis Dalessandro struct rvt_qp *qp = (struct rvt_qp *)arg; 1087f48ad614SDennis Dalessandro struct hfi1_ibport *ibp; 1088f48ad614SDennis Dalessandro unsigned long flags; 1089f48ad614SDennis Dalessandro 1090f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->r_lock, flags); 1091f48ad614SDennis Dalessandro spin_lock(&qp->s_lock); 1092f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_TIMER) { 1093f48ad614SDennis Dalessandro ibp = to_iport(qp->ibqp.device, qp->port_num); 1094f48ad614SDennis Dalessandro ibp->rvp.n_rc_timeouts++; 1095f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_TIMER; 1096f48ad614SDennis Dalessandro del_timer(&qp->s_timer); 1097462b6b21SSebastian Sanchez trace_hfi1_timeout(qp, qp->s_last_psn + 1); 1098f48ad614SDennis Dalessandro restart_rc(qp, qp->s_last_psn + 1, 1); 1099f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1100f48ad614SDennis Dalessandro } 1101f48ad614SDennis Dalessandro spin_unlock(&qp->s_lock); 1102f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->r_lock, flags); 1103f48ad614SDennis Dalessandro } 1104f48ad614SDennis Dalessandro 1105f48ad614SDennis Dalessandro /* 1106f48ad614SDennis Dalessandro * This is called from s_timer for RNR timeouts. 1107f48ad614SDennis Dalessandro */ 1108f48ad614SDennis Dalessandro void hfi1_rc_rnr_retry(unsigned long arg) 1109f48ad614SDennis Dalessandro { 1110f48ad614SDennis Dalessandro struct rvt_qp *qp = (struct rvt_qp *)arg; 1111f48ad614SDennis Dalessandro unsigned long flags; 1112f48ad614SDennis Dalessandro 1113f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 1114f48ad614SDennis Dalessandro hfi1_stop_rnr_timer(qp); 1115f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1116f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 1117f48ad614SDennis Dalessandro } 1118f48ad614SDennis Dalessandro 1119f48ad614SDennis Dalessandro /* 1120f48ad614SDennis Dalessandro * Set qp->s_sending_psn to the next PSN after the given one. 1121f48ad614SDennis Dalessandro * This would be psn+1 except when RDMA reads are present. 1122f48ad614SDennis Dalessandro */ 1123f48ad614SDennis Dalessandro static void reset_sending_psn(struct rvt_qp *qp, u32 psn) 1124f48ad614SDennis Dalessandro { 1125f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 1126f48ad614SDennis Dalessandro u32 n = qp->s_last; 1127f48ad614SDennis Dalessandro 112868e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 1129f48ad614SDennis Dalessandro /* Find the work request corresponding to the given PSN. */ 1130f48ad614SDennis Dalessandro for (;;) { 1131f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, n); 1132f48ad614SDennis Dalessandro if (cmp_psn(psn, wqe->lpsn) <= 0) { 1133f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_READ) 1134f48ad614SDennis Dalessandro qp->s_sending_psn = wqe->lpsn + 1; 1135f48ad614SDennis Dalessandro else 1136f48ad614SDennis Dalessandro qp->s_sending_psn = psn + 1; 1137f48ad614SDennis Dalessandro break; 1138f48ad614SDennis Dalessandro } 1139f48ad614SDennis Dalessandro if (++n == qp->s_size) 1140f48ad614SDennis Dalessandro n = 0; 1141f48ad614SDennis Dalessandro if (n == qp->s_tail) 1142f48ad614SDennis Dalessandro break; 1143f48ad614SDennis Dalessandro } 1144f48ad614SDennis Dalessandro } 1145f48ad614SDennis Dalessandro 1146f48ad614SDennis Dalessandro /* 1147f48ad614SDennis Dalessandro * This should be called with the QP s_lock held and interrupts disabled. 1148f48ad614SDennis Dalessandro */ 1149261a4351SMike Marciniszyn void hfi1_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr) 1150f48ad614SDennis Dalessandro { 1151261a4351SMike Marciniszyn struct ib_other_headers *ohdr; 1152f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 1153f48ad614SDennis Dalessandro u32 opcode; 1154f48ad614SDennis Dalessandro u32 psn; 1155f48ad614SDennis Dalessandro 115668e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 1157f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_OR_FLUSH_SEND)) 1158f48ad614SDennis Dalessandro return; 1159f48ad614SDennis Dalessandro 1160f48ad614SDennis Dalessandro /* Find out where the BTH is */ 1161f48ad614SDennis Dalessandro if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH) 1162f48ad614SDennis Dalessandro ohdr = &hdr->u.oth; 1163f48ad614SDennis Dalessandro else 1164f48ad614SDennis Dalessandro ohdr = &hdr->u.l.oth; 1165f48ad614SDennis Dalessandro 1166f48ad614SDennis Dalessandro opcode = be32_to_cpu(ohdr->bth[0]) >> 24; 1167f48ad614SDennis Dalessandro if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && 1168f48ad614SDennis Dalessandro opcode <= OP(ATOMIC_ACKNOWLEDGE)) { 1169f48ad614SDennis Dalessandro WARN_ON(!qp->s_rdma_ack_cnt); 1170f48ad614SDennis Dalessandro qp->s_rdma_ack_cnt--; 1171f48ad614SDennis Dalessandro return; 1172f48ad614SDennis Dalessandro } 1173f48ad614SDennis Dalessandro 1174f48ad614SDennis Dalessandro psn = be32_to_cpu(ohdr->bth[2]); 1175f48ad614SDennis Dalessandro reset_sending_psn(qp, psn); 1176f48ad614SDennis Dalessandro 1177f48ad614SDennis Dalessandro /* 1178f48ad614SDennis Dalessandro * Start timer after a packet requesting an ACK has been sent and 1179f48ad614SDennis Dalessandro * there are still requests that haven't been acked. 1180f48ad614SDennis Dalessandro */ 1181f48ad614SDennis Dalessandro if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && 1182f48ad614SDennis Dalessandro !(qp->s_flags & 1183f48ad614SDennis Dalessandro (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) && 1184f48ad614SDennis Dalessandro (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) 1185f48ad614SDennis Dalessandro hfi1_add_retry_timer(qp); 1186f48ad614SDennis Dalessandro 1187f48ad614SDennis Dalessandro while (qp->s_last != qp->s_acked) { 1188f48ad614SDennis Dalessandro u32 s_last; 1189f48ad614SDennis Dalessandro 1190f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_last); 1191f48ad614SDennis Dalessandro if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 && 1192f48ad614SDennis Dalessandro cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) 1193f48ad614SDennis Dalessandro break; 1194f48ad614SDennis Dalessandro s_last = qp->s_last; 1195f48ad614SDennis Dalessandro if (++s_last >= qp->s_size) 1196f48ad614SDennis Dalessandro s_last = 0; 1197f48ad614SDennis Dalessandro qp->s_last = s_last; 1198f48ad614SDennis Dalessandro /* see post_send() */ 1199f48ad614SDennis Dalessandro barrier(); 1200c64607aaSMike Marciniszyn rvt_put_swqe(wqe); 12010771da5aSMike Marciniszyn rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS); 1202f48ad614SDennis Dalessandro } 1203f48ad614SDennis Dalessandro /* 1204f48ad614SDennis Dalessandro * If we were waiting for sends to complete before re-sending, 1205f48ad614SDennis Dalessandro * and they are now complete, restart sending. 1206f48ad614SDennis Dalessandro */ 1207462b6b21SSebastian Sanchez trace_hfi1_sendcomplete(qp, psn); 1208f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_WAIT_PSN && 1209f48ad614SDennis Dalessandro cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) { 1210f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_WAIT_PSN; 1211f48ad614SDennis Dalessandro qp->s_sending_psn = qp->s_psn; 1212f48ad614SDennis Dalessandro qp->s_sending_hpsn = qp->s_psn - 1; 1213f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1214f48ad614SDennis Dalessandro } 1215f48ad614SDennis Dalessandro } 1216f48ad614SDennis Dalessandro 1217f48ad614SDennis Dalessandro static inline void update_last_psn(struct rvt_qp *qp, u32 psn) 1218f48ad614SDennis Dalessandro { 1219f48ad614SDennis Dalessandro qp->s_last_psn = psn; 1220f48ad614SDennis Dalessandro } 1221f48ad614SDennis Dalessandro 1222f48ad614SDennis Dalessandro /* 1223f48ad614SDennis Dalessandro * Generate a SWQE completion. 1224f48ad614SDennis Dalessandro * This is similar to hfi1_send_complete but has to check to be sure 1225f48ad614SDennis Dalessandro * that the SGEs are not being referenced if the SWQE is being resent. 1226f48ad614SDennis Dalessandro */ 1227f48ad614SDennis Dalessandro static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp, 1228f48ad614SDennis Dalessandro struct rvt_swqe *wqe, 1229f48ad614SDennis Dalessandro struct hfi1_ibport *ibp) 1230f48ad614SDennis Dalessandro { 123168e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 1232f48ad614SDennis Dalessandro /* 1233f48ad614SDennis Dalessandro * Don't decrement refcount and don't generate a 1234f48ad614SDennis Dalessandro * completion if the SWQE is being resent until the send 1235f48ad614SDennis Dalessandro * is finished. 1236f48ad614SDennis Dalessandro */ 1237f48ad614SDennis Dalessandro if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 || 1238f48ad614SDennis Dalessandro cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) { 1239f48ad614SDennis Dalessandro u32 s_last; 1240f48ad614SDennis Dalessandro 1241c64607aaSMike Marciniszyn rvt_put_swqe(wqe); 1242f48ad614SDennis Dalessandro s_last = qp->s_last; 1243f48ad614SDennis Dalessandro if (++s_last >= qp->s_size) 1244f48ad614SDennis Dalessandro s_last = 0; 1245f48ad614SDennis Dalessandro qp->s_last = s_last; 1246f48ad614SDennis Dalessandro /* see post_send() */ 1247f48ad614SDennis Dalessandro barrier(); 12480771da5aSMike Marciniszyn rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS); 1249f48ad614SDennis Dalessandro } else { 1250f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 1251f48ad614SDennis Dalessandro 1252f48ad614SDennis Dalessandro this_cpu_inc(*ibp->rvp.rc_delayed_comp); 1253f48ad614SDennis Dalessandro /* 1254f48ad614SDennis Dalessandro * If send progress not running attempt to progress 1255f48ad614SDennis Dalessandro * SDMA queue. 1256f48ad614SDennis Dalessandro */ 1257f48ad614SDennis Dalessandro if (ppd->dd->flags & HFI1_HAS_SEND_DMA) { 1258f48ad614SDennis Dalessandro struct sdma_engine *engine; 1259f48ad614SDennis Dalessandro u8 sc5; 1260f48ad614SDennis Dalessandro 1261f48ad614SDennis Dalessandro /* For now use sc to find engine */ 1262f48ad614SDennis Dalessandro sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl]; 1263f48ad614SDennis Dalessandro engine = qp_to_sdma_engine(qp, sc5); 1264f48ad614SDennis Dalessandro sdma_engine_progress_schedule(engine); 1265f48ad614SDennis Dalessandro } 1266f48ad614SDennis Dalessandro } 1267f48ad614SDennis Dalessandro 1268f48ad614SDennis Dalessandro qp->s_retry = qp->s_retry_cnt; 1269f48ad614SDennis Dalessandro update_last_psn(qp, wqe->lpsn); 1270f48ad614SDennis Dalessandro 1271f48ad614SDennis Dalessandro /* 1272f48ad614SDennis Dalessandro * If we are completing a request which is in the process of 1273f48ad614SDennis Dalessandro * being resent, we can stop re-sending it since we know the 1274f48ad614SDennis Dalessandro * responder has already seen it. 1275f48ad614SDennis Dalessandro */ 1276f48ad614SDennis Dalessandro if (qp->s_acked == qp->s_cur) { 1277f48ad614SDennis Dalessandro if (++qp->s_cur >= qp->s_size) 1278f48ad614SDennis Dalessandro qp->s_cur = 0; 1279f48ad614SDennis Dalessandro qp->s_acked = qp->s_cur; 1280f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_cur); 1281f48ad614SDennis Dalessandro if (qp->s_acked != qp->s_tail) { 1282f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST); 1283f48ad614SDennis Dalessandro qp->s_psn = wqe->psn; 1284f48ad614SDennis Dalessandro } 1285f48ad614SDennis Dalessandro } else { 1286f48ad614SDennis Dalessandro if (++qp->s_acked >= qp->s_size) 1287f48ad614SDennis Dalessandro qp->s_acked = 0; 1288f48ad614SDennis Dalessandro if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur) 1289f48ad614SDennis Dalessandro qp->s_draining = 0; 1290f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1291f48ad614SDennis Dalessandro } 1292f48ad614SDennis Dalessandro return wqe; 1293f48ad614SDennis Dalessandro } 1294f48ad614SDennis Dalessandro 1295f48ad614SDennis Dalessandro /** 1296f48ad614SDennis Dalessandro * do_rc_ack - process an incoming RC ACK 1297f48ad614SDennis Dalessandro * @qp: the QP the ACK came in on 1298f48ad614SDennis Dalessandro * @psn: the packet sequence number of the ACK 1299f48ad614SDennis Dalessandro * @opcode: the opcode of the request that resulted in the ACK 1300f48ad614SDennis Dalessandro * 1301f48ad614SDennis Dalessandro * This is called from rc_rcv_resp() to process an incoming RC ACK 1302f48ad614SDennis Dalessandro * for the given QP. 1303f48ad614SDennis Dalessandro * May be called at interrupt level, with the QP s_lock held. 1304f48ad614SDennis Dalessandro * Returns 1 if OK, 0 if current operation should be aborted (NAK). 1305f48ad614SDennis Dalessandro */ 1306f48ad614SDennis Dalessandro static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode, 1307f48ad614SDennis Dalessandro u64 val, struct hfi1_ctxtdata *rcd) 1308f48ad614SDennis Dalessandro { 1309f48ad614SDennis Dalessandro struct hfi1_ibport *ibp; 1310f48ad614SDennis Dalessandro enum ib_wc_status status; 1311f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 1312f48ad614SDennis Dalessandro int ret = 0; 1313f48ad614SDennis Dalessandro u32 ack_psn; 1314f48ad614SDennis Dalessandro int diff; 1315f48ad614SDennis Dalessandro unsigned long to; 1316f48ad614SDennis Dalessandro 131768e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 1318f48ad614SDennis Dalessandro /* 1319f48ad614SDennis Dalessandro * Note that NAKs implicitly ACK outstanding SEND and RDMA write 1320f48ad614SDennis Dalessandro * requests and implicitly NAK RDMA read and atomic requests issued 1321f48ad614SDennis Dalessandro * before the NAK'ed request. The MSN won't include the NAK'ed 1322f48ad614SDennis Dalessandro * request but will include an ACK'ed request(s). 1323f48ad614SDennis Dalessandro */ 1324f48ad614SDennis Dalessandro ack_psn = psn; 1325f48ad614SDennis Dalessandro if (aeth >> 29) 1326f48ad614SDennis Dalessandro ack_psn--; 1327f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1328f48ad614SDennis Dalessandro ibp = to_iport(qp->ibqp.device, qp->port_num); 1329f48ad614SDennis Dalessandro 1330f48ad614SDennis Dalessandro /* 1331f48ad614SDennis Dalessandro * The MSN might be for a later WQE than the PSN indicates so 1332f48ad614SDennis Dalessandro * only complete WQEs that the PSN finishes. 1333f48ad614SDennis Dalessandro */ 1334f48ad614SDennis Dalessandro while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) { 1335f48ad614SDennis Dalessandro /* 1336f48ad614SDennis Dalessandro * RDMA_READ_RESPONSE_ONLY is a special case since 1337f48ad614SDennis Dalessandro * we want to generate completion events for everything 1338f48ad614SDennis Dalessandro * before the RDMA read, copy the data, then generate 1339f48ad614SDennis Dalessandro * the completion for the read. 1340f48ad614SDennis Dalessandro */ 1341f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_READ && 1342f48ad614SDennis Dalessandro opcode == OP(RDMA_READ_RESPONSE_ONLY) && 1343f48ad614SDennis Dalessandro diff == 0) { 1344f48ad614SDennis Dalessandro ret = 1; 1345f48ad614SDennis Dalessandro goto bail_stop; 1346f48ad614SDennis Dalessandro } 1347f48ad614SDennis Dalessandro /* 1348f48ad614SDennis Dalessandro * If this request is a RDMA read or atomic, and the ACK is 1349f48ad614SDennis Dalessandro * for a later operation, this ACK NAKs the RDMA read or 1350f48ad614SDennis Dalessandro * atomic. In other words, only a RDMA_READ_LAST or ONLY 1351f48ad614SDennis Dalessandro * can ACK a RDMA read and likewise for atomic ops. Note 1352f48ad614SDennis Dalessandro * that the NAK case can only happen if relaxed ordering is 1353f48ad614SDennis Dalessandro * used and requests are sent after an RDMA read or atomic 1354f48ad614SDennis Dalessandro * is sent but before the response is received. 1355f48ad614SDennis Dalessandro */ 1356f48ad614SDennis Dalessandro if ((wqe->wr.opcode == IB_WR_RDMA_READ && 1357f48ad614SDennis Dalessandro (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || 1358f48ad614SDennis Dalessandro ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1359f48ad614SDennis Dalessandro wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && 1360f48ad614SDennis Dalessandro (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { 1361f48ad614SDennis Dalessandro /* Retry this request. */ 1362f48ad614SDennis Dalessandro if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) { 1363f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_RDMAR_SEQ; 1364f48ad614SDennis Dalessandro restart_rc(qp, qp->s_last_psn + 1, 0); 1365f48ad614SDennis Dalessandro if (list_empty(&qp->rspwait)) { 1366f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_RSP_SEND; 13674d6f85c3SMike Marciniszyn rvt_get_qp(qp); 1368f48ad614SDennis Dalessandro list_add_tail(&qp->rspwait, 1369f48ad614SDennis Dalessandro &rcd->qp_wait_list); 1370f48ad614SDennis Dalessandro } 1371f48ad614SDennis Dalessandro } 1372f48ad614SDennis Dalessandro /* 1373f48ad614SDennis Dalessandro * No need to process the ACK/NAK since we are 1374f48ad614SDennis Dalessandro * restarting an earlier request. 1375f48ad614SDennis Dalessandro */ 1376f48ad614SDennis Dalessandro goto bail_stop; 1377f48ad614SDennis Dalessandro } 1378f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1379f48ad614SDennis Dalessandro wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { 1380f48ad614SDennis Dalessandro u64 *vaddr = wqe->sg_list[0].vaddr; 1381f48ad614SDennis Dalessandro *vaddr = val; 1382f48ad614SDennis Dalessandro } 1383f48ad614SDennis Dalessandro if (qp->s_num_rd_atomic && 1384f48ad614SDennis Dalessandro (wqe->wr.opcode == IB_WR_RDMA_READ || 1385f48ad614SDennis Dalessandro wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1386f48ad614SDennis Dalessandro wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { 1387f48ad614SDennis Dalessandro qp->s_num_rd_atomic--; 1388f48ad614SDennis Dalessandro /* Restart sending task if fence is complete */ 1389f48ad614SDennis Dalessandro if ((qp->s_flags & RVT_S_WAIT_FENCE) && 1390f48ad614SDennis Dalessandro !qp->s_num_rd_atomic) { 1391f48ad614SDennis Dalessandro qp->s_flags &= ~(RVT_S_WAIT_FENCE | 1392f48ad614SDennis Dalessandro RVT_S_WAIT_ACK); 1393f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1394f48ad614SDennis Dalessandro } else if (qp->s_flags & RVT_S_WAIT_RDMAR) { 1395f48ad614SDennis Dalessandro qp->s_flags &= ~(RVT_S_WAIT_RDMAR | 1396f48ad614SDennis Dalessandro RVT_S_WAIT_ACK); 1397f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1398f48ad614SDennis Dalessandro } 1399f48ad614SDennis Dalessandro } 1400f48ad614SDennis Dalessandro wqe = do_rc_completion(qp, wqe, ibp); 1401f48ad614SDennis Dalessandro if (qp->s_acked == qp->s_tail) 1402f48ad614SDennis Dalessandro break; 1403f48ad614SDennis Dalessandro } 1404f48ad614SDennis Dalessandro 1405f48ad614SDennis Dalessandro switch (aeth >> 29) { 1406f48ad614SDennis Dalessandro case 0: /* ACK */ 1407f48ad614SDennis Dalessandro this_cpu_inc(*ibp->rvp.rc_acks); 1408f48ad614SDennis Dalessandro if (qp->s_acked != qp->s_tail) { 1409f48ad614SDennis Dalessandro /* 1410f48ad614SDennis Dalessandro * We are expecting more ACKs so 1411f48ad614SDennis Dalessandro * mod the retry timer. 1412f48ad614SDennis Dalessandro */ 1413f48ad614SDennis Dalessandro hfi1_mod_retry_timer(qp); 1414f48ad614SDennis Dalessandro /* 1415f48ad614SDennis Dalessandro * We can stop re-sending the earlier packets and 1416f48ad614SDennis Dalessandro * continue with the next packet the receiver wants. 1417f48ad614SDennis Dalessandro */ 1418f48ad614SDennis Dalessandro if (cmp_psn(qp->s_psn, psn) <= 0) 1419f48ad614SDennis Dalessandro reset_psn(qp, psn + 1); 1420f48ad614SDennis Dalessandro } else { 1421f48ad614SDennis Dalessandro /* No more acks - kill all timers */ 1422f48ad614SDennis Dalessandro hfi1_stop_rc_timers(qp); 1423f48ad614SDennis Dalessandro if (cmp_psn(qp->s_psn, psn) <= 0) { 1424f48ad614SDennis Dalessandro qp->s_state = OP(SEND_LAST); 1425f48ad614SDennis Dalessandro qp->s_psn = psn + 1; 1426f48ad614SDennis Dalessandro } 1427f48ad614SDennis Dalessandro } 1428f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_WAIT_ACK) { 1429f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_WAIT_ACK; 1430f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1431f48ad614SDennis Dalessandro } 1432f48ad614SDennis Dalessandro hfi1_get_credit(qp, aeth); 1433f48ad614SDennis Dalessandro qp->s_rnr_retry = qp->s_rnr_retry_cnt; 1434f48ad614SDennis Dalessandro qp->s_retry = qp->s_retry_cnt; 1435f48ad614SDennis Dalessandro update_last_psn(qp, psn); 1436f48ad614SDennis Dalessandro return 1; 1437f48ad614SDennis Dalessandro 1438f48ad614SDennis Dalessandro case 1: /* RNR NAK */ 1439f48ad614SDennis Dalessandro ibp->rvp.n_rnr_naks++; 1440f48ad614SDennis Dalessandro if (qp->s_acked == qp->s_tail) 1441f48ad614SDennis Dalessandro goto bail_stop; 1442f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_WAIT_RNR) 1443f48ad614SDennis Dalessandro goto bail_stop; 1444f48ad614SDennis Dalessandro if (qp->s_rnr_retry == 0) { 1445f48ad614SDennis Dalessandro status = IB_WC_RNR_RETRY_EXC_ERR; 1446f48ad614SDennis Dalessandro goto class_b; 1447f48ad614SDennis Dalessandro } 1448f48ad614SDennis Dalessandro if (qp->s_rnr_retry_cnt < 7) 1449f48ad614SDennis Dalessandro qp->s_rnr_retry--; 1450f48ad614SDennis Dalessandro 1451f48ad614SDennis Dalessandro /* The last valid PSN is the previous PSN. */ 1452f48ad614SDennis Dalessandro update_last_psn(qp, psn - 1); 1453f48ad614SDennis Dalessandro 1454f48ad614SDennis Dalessandro ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn); 1455f48ad614SDennis Dalessandro 1456f48ad614SDennis Dalessandro reset_psn(qp, psn); 1457f48ad614SDennis Dalessandro 1458f48ad614SDennis Dalessandro qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK); 1459f48ad614SDennis Dalessandro hfi1_stop_rc_timers(qp); 1460f48ad614SDennis Dalessandro to = 1461f48ad614SDennis Dalessandro ib_hfi1_rnr_table[(aeth >> HFI1_AETH_CREDIT_SHIFT) & 1462f48ad614SDennis Dalessandro HFI1_AETH_CREDIT_MASK]; 1463f48ad614SDennis Dalessandro hfi1_add_rnr_timer(qp, to); 1464f48ad614SDennis Dalessandro return 0; 1465f48ad614SDennis Dalessandro 1466f48ad614SDennis Dalessandro case 3: /* NAK */ 1467f48ad614SDennis Dalessandro if (qp->s_acked == qp->s_tail) 1468f48ad614SDennis Dalessandro goto bail_stop; 1469f48ad614SDennis Dalessandro /* The last valid PSN is the previous PSN. */ 1470f48ad614SDennis Dalessandro update_last_psn(qp, psn - 1); 1471f48ad614SDennis Dalessandro switch ((aeth >> HFI1_AETH_CREDIT_SHIFT) & 1472f48ad614SDennis Dalessandro HFI1_AETH_CREDIT_MASK) { 1473f48ad614SDennis Dalessandro case 0: /* PSN sequence error */ 1474f48ad614SDennis Dalessandro ibp->rvp.n_seq_naks++; 1475f48ad614SDennis Dalessandro /* 1476f48ad614SDennis Dalessandro * Back up to the responder's expected PSN. 1477f48ad614SDennis Dalessandro * Note that we might get a NAK in the middle of an 1478f48ad614SDennis Dalessandro * RDMA READ response which terminates the RDMA 1479f48ad614SDennis Dalessandro * READ. 1480f48ad614SDennis Dalessandro */ 1481f48ad614SDennis Dalessandro restart_rc(qp, psn, 0); 1482f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1483f48ad614SDennis Dalessandro break; 1484f48ad614SDennis Dalessandro 1485f48ad614SDennis Dalessandro case 1: /* Invalid Request */ 1486f48ad614SDennis Dalessandro status = IB_WC_REM_INV_REQ_ERR; 1487f48ad614SDennis Dalessandro ibp->rvp.n_other_naks++; 1488f48ad614SDennis Dalessandro goto class_b; 1489f48ad614SDennis Dalessandro 1490f48ad614SDennis Dalessandro case 2: /* Remote Access Error */ 1491f48ad614SDennis Dalessandro status = IB_WC_REM_ACCESS_ERR; 1492f48ad614SDennis Dalessandro ibp->rvp.n_other_naks++; 1493f48ad614SDennis Dalessandro goto class_b; 1494f48ad614SDennis Dalessandro 1495f48ad614SDennis Dalessandro case 3: /* Remote Operation Error */ 1496f48ad614SDennis Dalessandro status = IB_WC_REM_OP_ERR; 1497f48ad614SDennis Dalessandro ibp->rvp.n_other_naks++; 1498f48ad614SDennis Dalessandro class_b: 1499f48ad614SDennis Dalessandro if (qp->s_last == qp->s_acked) { 1500f48ad614SDennis Dalessandro hfi1_send_complete(qp, wqe, status); 1501f48ad614SDennis Dalessandro rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1502f48ad614SDennis Dalessandro } 1503f48ad614SDennis Dalessandro break; 1504f48ad614SDennis Dalessandro 1505f48ad614SDennis Dalessandro default: 1506f48ad614SDennis Dalessandro /* Ignore other reserved NAK error codes */ 1507f48ad614SDennis Dalessandro goto reserved; 1508f48ad614SDennis Dalessandro } 1509f48ad614SDennis Dalessandro qp->s_retry = qp->s_retry_cnt; 1510f48ad614SDennis Dalessandro qp->s_rnr_retry = qp->s_rnr_retry_cnt; 1511f48ad614SDennis Dalessandro goto bail_stop; 1512f48ad614SDennis Dalessandro 1513f48ad614SDennis Dalessandro default: /* 2: reserved */ 1514f48ad614SDennis Dalessandro reserved: 1515f48ad614SDennis Dalessandro /* Ignore reserved NAK codes. */ 1516f48ad614SDennis Dalessandro goto bail_stop; 1517f48ad614SDennis Dalessandro } 1518f48ad614SDennis Dalessandro /* cannot be reached */ 1519f48ad614SDennis Dalessandro bail_stop: 1520f48ad614SDennis Dalessandro hfi1_stop_rc_timers(qp); 1521f48ad614SDennis Dalessandro return ret; 1522f48ad614SDennis Dalessandro } 1523f48ad614SDennis Dalessandro 1524f48ad614SDennis Dalessandro /* 1525f48ad614SDennis Dalessandro * We have seen an out of sequence RDMA read middle or last packet. 1526f48ad614SDennis Dalessandro * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE. 1527f48ad614SDennis Dalessandro */ 1528f48ad614SDennis Dalessandro static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn, 1529f48ad614SDennis Dalessandro struct hfi1_ctxtdata *rcd) 1530f48ad614SDennis Dalessandro { 1531f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 1532f48ad614SDennis Dalessandro 153368e78b3dSMike Marciniszyn lockdep_assert_held(&qp->s_lock); 1534f48ad614SDennis Dalessandro /* Remove QP from retry timer */ 1535f48ad614SDennis Dalessandro hfi1_stop_rc_timers(qp); 1536f48ad614SDennis Dalessandro 1537f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1538f48ad614SDennis Dalessandro 1539f48ad614SDennis Dalessandro while (cmp_psn(psn, wqe->lpsn) > 0) { 1540f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_RDMA_READ || 1541f48ad614SDennis Dalessandro wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1542f48ad614SDennis Dalessandro wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) 1543f48ad614SDennis Dalessandro break; 1544f48ad614SDennis Dalessandro wqe = do_rc_completion(qp, wqe, ibp); 1545f48ad614SDennis Dalessandro } 1546f48ad614SDennis Dalessandro 1547f48ad614SDennis Dalessandro ibp->rvp.n_rdma_seq++; 1548f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_RDMAR_SEQ; 1549f48ad614SDennis Dalessandro restart_rc(qp, qp->s_last_psn + 1, 0); 1550f48ad614SDennis Dalessandro if (list_empty(&qp->rspwait)) { 1551f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_RSP_SEND; 15524d6f85c3SMike Marciniszyn rvt_get_qp(qp); 1553f48ad614SDennis Dalessandro list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 1554f48ad614SDennis Dalessandro } 1555f48ad614SDennis Dalessandro } 1556f48ad614SDennis Dalessandro 1557f48ad614SDennis Dalessandro /** 1558f48ad614SDennis Dalessandro * rc_rcv_resp - process an incoming RC response packet 1559f48ad614SDennis Dalessandro * @ibp: the port this packet came in on 1560f48ad614SDennis Dalessandro * @ohdr: the other headers for this packet 1561f48ad614SDennis Dalessandro * @data: the packet data 1562f48ad614SDennis Dalessandro * @tlen: the packet length 1563f48ad614SDennis Dalessandro * @qp: the QP for this packet 1564f48ad614SDennis Dalessandro * @opcode: the opcode for this packet 1565f48ad614SDennis Dalessandro * @psn: the packet sequence number for this packet 1566f48ad614SDennis Dalessandro * @hdrsize: the header length 1567f48ad614SDennis Dalessandro * @pmtu: the path MTU 1568f48ad614SDennis Dalessandro * 1569f48ad614SDennis Dalessandro * This is called from hfi1_rc_rcv() to process an incoming RC response 1570f48ad614SDennis Dalessandro * packet for the given QP. 1571f48ad614SDennis Dalessandro * Called at interrupt level. 1572f48ad614SDennis Dalessandro */ 1573f48ad614SDennis Dalessandro static void rc_rcv_resp(struct hfi1_ibport *ibp, 1574261a4351SMike Marciniszyn struct ib_other_headers *ohdr, 1575f48ad614SDennis Dalessandro void *data, u32 tlen, struct rvt_qp *qp, 1576f48ad614SDennis Dalessandro u32 opcode, u32 psn, u32 hdrsize, u32 pmtu, 1577f48ad614SDennis Dalessandro struct hfi1_ctxtdata *rcd) 1578f48ad614SDennis Dalessandro { 1579f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 1580f48ad614SDennis Dalessandro enum ib_wc_status status; 1581f48ad614SDennis Dalessandro unsigned long flags; 1582f48ad614SDennis Dalessandro int diff; 1583f48ad614SDennis Dalessandro u32 pad; 1584f48ad614SDennis Dalessandro u32 aeth; 1585f48ad614SDennis Dalessandro u64 val; 1586f48ad614SDennis Dalessandro 1587f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 1588f48ad614SDennis Dalessandro 1589462b6b21SSebastian Sanchez trace_hfi1_ack(qp, psn); 1590f48ad614SDennis Dalessandro 1591f48ad614SDennis Dalessandro /* Ignore invalid responses. */ 1592f48ad614SDennis Dalessandro smp_read_barrier_depends(); /* see post_one_send */ 1593f48ad614SDennis Dalessandro if (cmp_psn(psn, ACCESS_ONCE(qp->s_next_psn)) >= 0) 1594f48ad614SDennis Dalessandro goto ack_done; 1595f48ad614SDennis Dalessandro 1596f48ad614SDennis Dalessandro /* Ignore duplicate responses. */ 1597f48ad614SDennis Dalessandro diff = cmp_psn(psn, qp->s_last_psn); 1598f48ad614SDennis Dalessandro if (unlikely(diff <= 0)) { 1599f48ad614SDennis Dalessandro /* Update credits for "ghost" ACKs */ 1600f48ad614SDennis Dalessandro if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { 1601f48ad614SDennis Dalessandro aeth = be32_to_cpu(ohdr->u.aeth); 1602f48ad614SDennis Dalessandro if ((aeth >> 29) == 0) 1603f48ad614SDennis Dalessandro hfi1_get_credit(qp, aeth); 1604f48ad614SDennis Dalessandro } 1605f48ad614SDennis Dalessandro goto ack_done; 1606f48ad614SDennis Dalessandro } 1607f48ad614SDennis Dalessandro 1608f48ad614SDennis Dalessandro /* 1609f48ad614SDennis Dalessandro * Skip everything other than the PSN we expect, if we are waiting 1610f48ad614SDennis Dalessandro * for a reply to a restarted RDMA read or atomic op. 1611f48ad614SDennis Dalessandro */ 1612f48ad614SDennis Dalessandro if (qp->r_flags & RVT_R_RDMAR_SEQ) { 1613f48ad614SDennis Dalessandro if (cmp_psn(psn, qp->s_last_psn + 1) != 0) 1614f48ad614SDennis Dalessandro goto ack_done; 1615f48ad614SDennis Dalessandro qp->r_flags &= ~RVT_R_RDMAR_SEQ; 1616f48ad614SDennis Dalessandro } 1617f48ad614SDennis Dalessandro 1618f48ad614SDennis Dalessandro if (unlikely(qp->s_acked == qp->s_tail)) 1619f48ad614SDennis Dalessandro goto ack_done; 1620f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1621f48ad614SDennis Dalessandro status = IB_WC_SUCCESS; 1622f48ad614SDennis Dalessandro 1623f48ad614SDennis Dalessandro switch (opcode) { 1624f48ad614SDennis Dalessandro case OP(ACKNOWLEDGE): 1625f48ad614SDennis Dalessandro case OP(ATOMIC_ACKNOWLEDGE): 1626f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_FIRST): 1627f48ad614SDennis Dalessandro aeth = be32_to_cpu(ohdr->u.aeth); 1628261a4351SMike Marciniszyn if (opcode == OP(ATOMIC_ACKNOWLEDGE)) 1629261a4351SMike Marciniszyn val = ib_u64_get(&ohdr->u.at.atomic_ack_eth); 1630261a4351SMike Marciniszyn else 1631f48ad614SDennis Dalessandro val = 0; 1632f48ad614SDennis Dalessandro if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || 1633f48ad614SDennis Dalessandro opcode != OP(RDMA_READ_RESPONSE_FIRST)) 1634f48ad614SDennis Dalessandro goto ack_done; 1635f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1636f48ad614SDennis Dalessandro if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1637f48ad614SDennis Dalessandro goto ack_op_err; 1638f48ad614SDennis Dalessandro /* 1639f48ad614SDennis Dalessandro * If this is a response to a resent RDMA read, we 1640f48ad614SDennis Dalessandro * have to be careful to copy the data to the right 1641f48ad614SDennis Dalessandro * location. 1642f48ad614SDennis Dalessandro */ 1643f48ad614SDennis Dalessandro qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge, 1644f48ad614SDennis Dalessandro wqe, psn, pmtu); 1645f48ad614SDennis Dalessandro goto read_middle; 1646f48ad614SDennis Dalessandro 1647f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_MIDDLE): 1648f48ad614SDennis Dalessandro /* no AETH, no ACK */ 1649f48ad614SDennis Dalessandro if (unlikely(cmp_psn(psn, qp->s_last_psn + 1))) 1650f48ad614SDennis Dalessandro goto ack_seq_err; 1651f48ad614SDennis Dalessandro if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1652f48ad614SDennis Dalessandro goto ack_op_err; 1653f48ad614SDennis Dalessandro read_middle: 1654f48ad614SDennis Dalessandro if (unlikely(tlen != (hdrsize + pmtu + 4))) 1655f48ad614SDennis Dalessandro goto ack_len_err; 1656f48ad614SDennis Dalessandro if (unlikely(pmtu >= qp->s_rdma_read_len)) 1657f48ad614SDennis Dalessandro goto ack_len_err; 1658f48ad614SDennis Dalessandro 1659f48ad614SDennis Dalessandro /* 1660f48ad614SDennis Dalessandro * We got a response so update the timeout. 1661f48ad614SDennis Dalessandro * 4.096 usec. * (1 << qp->timeout) 1662f48ad614SDennis Dalessandro */ 1663f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_TIMER; 1664f48ad614SDennis Dalessandro mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies); 1665f48ad614SDennis Dalessandro if (qp->s_flags & RVT_S_WAIT_ACK) { 1666f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_WAIT_ACK; 1667f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1668f48ad614SDennis Dalessandro } 1669f48ad614SDennis Dalessandro 1670f48ad614SDennis Dalessandro if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) 1671f48ad614SDennis Dalessandro qp->s_retry = qp->s_retry_cnt; 1672f48ad614SDennis Dalessandro 1673f48ad614SDennis Dalessandro /* 1674f48ad614SDennis Dalessandro * Update the RDMA receive state but do the copy w/o 1675f48ad614SDennis Dalessandro * holding the locks and blocking interrupts. 1676f48ad614SDennis Dalessandro */ 1677f48ad614SDennis Dalessandro qp->s_rdma_read_len -= pmtu; 1678f48ad614SDennis Dalessandro update_last_psn(qp, psn); 1679f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 1680f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0, 0); 1681f48ad614SDennis Dalessandro goto bail; 1682f48ad614SDennis Dalessandro 1683f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_ONLY): 1684f48ad614SDennis Dalessandro aeth = be32_to_cpu(ohdr->u.aeth); 1685f48ad614SDennis Dalessandro if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) 1686f48ad614SDennis Dalessandro goto ack_done; 1687f48ad614SDennis Dalessandro /* Get the number of bytes the message was padded by. */ 1688f48ad614SDennis Dalessandro pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1689f48ad614SDennis Dalessandro /* 1690f48ad614SDennis Dalessandro * Check that the data size is >= 0 && <= pmtu. 1691f48ad614SDennis Dalessandro * Remember to account for ICRC (4). 1692f48ad614SDennis Dalessandro */ 1693f48ad614SDennis Dalessandro if (unlikely(tlen < (hdrsize + pad + 4))) 1694f48ad614SDennis Dalessandro goto ack_len_err; 1695f48ad614SDennis Dalessandro /* 1696f48ad614SDennis Dalessandro * If this is a response to a resent RDMA read, we 1697f48ad614SDennis Dalessandro * have to be careful to copy the data to the right 1698f48ad614SDennis Dalessandro * location. 1699f48ad614SDennis Dalessandro */ 1700f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_acked); 1701f48ad614SDennis Dalessandro qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge, 1702f48ad614SDennis Dalessandro wqe, psn, pmtu); 1703f48ad614SDennis Dalessandro goto read_last; 1704f48ad614SDennis Dalessandro 1705f48ad614SDennis Dalessandro case OP(RDMA_READ_RESPONSE_LAST): 1706f48ad614SDennis Dalessandro /* ACKs READ req. */ 1707f48ad614SDennis Dalessandro if (unlikely(cmp_psn(psn, qp->s_last_psn + 1))) 1708f48ad614SDennis Dalessandro goto ack_seq_err; 1709f48ad614SDennis Dalessandro if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1710f48ad614SDennis Dalessandro goto ack_op_err; 1711f48ad614SDennis Dalessandro /* Get the number of bytes the message was padded by. */ 1712f48ad614SDennis Dalessandro pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1713f48ad614SDennis Dalessandro /* 1714f48ad614SDennis Dalessandro * Check that the data size is >= 1 && <= pmtu. 1715f48ad614SDennis Dalessandro * Remember to account for ICRC (4). 1716f48ad614SDennis Dalessandro */ 1717f48ad614SDennis Dalessandro if (unlikely(tlen <= (hdrsize + pad + 4))) 1718f48ad614SDennis Dalessandro goto ack_len_err; 1719f48ad614SDennis Dalessandro read_last: 1720f48ad614SDennis Dalessandro tlen -= hdrsize + pad + 4; 1721f48ad614SDennis Dalessandro if (unlikely(tlen != qp->s_rdma_read_len)) 1722f48ad614SDennis Dalessandro goto ack_len_err; 1723f48ad614SDennis Dalessandro aeth = be32_to_cpu(ohdr->u.aeth); 1724f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0, 0); 1725f48ad614SDennis Dalessandro WARN_ON(qp->s_rdma_read_sge.num_sge); 1726f48ad614SDennis Dalessandro (void)do_rc_ack(qp, aeth, psn, 1727f48ad614SDennis Dalessandro OP(RDMA_READ_RESPONSE_LAST), 0, rcd); 1728f48ad614SDennis Dalessandro goto ack_done; 1729f48ad614SDennis Dalessandro } 1730f48ad614SDennis Dalessandro 1731f48ad614SDennis Dalessandro ack_op_err: 1732f48ad614SDennis Dalessandro status = IB_WC_LOC_QP_OP_ERR; 1733f48ad614SDennis Dalessandro goto ack_err; 1734f48ad614SDennis Dalessandro 1735f48ad614SDennis Dalessandro ack_seq_err: 1736f48ad614SDennis Dalessandro rdma_seq_err(qp, ibp, psn, rcd); 1737f48ad614SDennis Dalessandro goto ack_done; 1738f48ad614SDennis Dalessandro 1739f48ad614SDennis Dalessandro ack_len_err: 1740f48ad614SDennis Dalessandro status = IB_WC_LOC_LEN_ERR; 1741f48ad614SDennis Dalessandro ack_err: 1742f48ad614SDennis Dalessandro if (qp->s_last == qp->s_acked) { 1743f48ad614SDennis Dalessandro hfi1_send_complete(qp, wqe, status); 1744f48ad614SDennis Dalessandro rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1745f48ad614SDennis Dalessandro } 1746f48ad614SDennis Dalessandro ack_done: 1747f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 1748f48ad614SDennis Dalessandro bail: 1749f48ad614SDennis Dalessandro return; 1750f48ad614SDennis Dalessandro } 1751f48ad614SDennis Dalessandro 1752f48ad614SDennis Dalessandro static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd, 1753f48ad614SDennis Dalessandro struct rvt_qp *qp) 1754f48ad614SDennis Dalessandro { 1755f48ad614SDennis Dalessandro if (list_empty(&qp->rspwait)) { 1756f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_RSP_NAK; 17574d6f85c3SMike Marciniszyn rvt_get_qp(qp); 1758f48ad614SDennis Dalessandro list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 1759f48ad614SDennis Dalessandro } 1760f48ad614SDennis Dalessandro } 1761f48ad614SDennis Dalessandro 1762f48ad614SDennis Dalessandro static inline void rc_cancel_ack(struct rvt_qp *qp) 1763f48ad614SDennis Dalessandro { 1764f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 1765f48ad614SDennis Dalessandro 1766f48ad614SDennis Dalessandro priv->r_adefered = 0; 1767f48ad614SDennis Dalessandro if (list_empty(&qp->rspwait)) 1768f48ad614SDennis Dalessandro return; 1769f48ad614SDennis Dalessandro list_del_init(&qp->rspwait); 1770f48ad614SDennis Dalessandro qp->r_flags &= ~RVT_R_RSP_NAK; 17714d6f85c3SMike Marciniszyn rvt_put_qp(qp); 1772f48ad614SDennis Dalessandro } 1773f48ad614SDennis Dalessandro 1774f48ad614SDennis Dalessandro /** 1775f48ad614SDennis Dalessandro * rc_rcv_error - process an incoming duplicate or error RC packet 1776f48ad614SDennis Dalessandro * @ohdr: the other headers for this packet 1777f48ad614SDennis Dalessandro * @data: the packet data 1778f48ad614SDennis Dalessandro * @qp: the QP for this packet 1779f48ad614SDennis Dalessandro * @opcode: the opcode for this packet 1780f48ad614SDennis Dalessandro * @psn: the packet sequence number for this packet 1781f48ad614SDennis Dalessandro * @diff: the difference between the PSN and the expected PSN 1782f48ad614SDennis Dalessandro * 1783f48ad614SDennis Dalessandro * This is called from hfi1_rc_rcv() to process an unexpected 1784f48ad614SDennis Dalessandro * incoming RC packet for the given QP. 1785f48ad614SDennis Dalessandro * Called at interrupt level. 1786f48ad614SDennis Dalessandro * Return 1 if no more processing is needed; otherwise return 0 to 1787f48ad614SDennis Dalessandro * schedule a response to be sent. 1788f48ad614SDennis Dalessandro */ 1789261a4351SMike Marciniszyn static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data, 1790f48ad614SDennis Dalessandro struct rvt_qp *qp, u32 opcode, u32 psn, 1791f48ad614SDennis Dalessandro int diff, struct hfi1_ctxtdata *rcd) 1792f48ad614SDennis Dalessandro { 1793f48ad614SDennis Dalessandro struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 1794f48ad614SDennis Dalessandro struct rvt_ack_entry *e; 1795f48ad614SDennis Dalessandro unsigned long flags; 1796f48ad614SDennis Dalessandro u8 i, prev; 1797f48ad614SDennis Dalessandro int old_req; 1798f48ad614SDennis Dalessandro 1799462b6b21SSebastian Sanchez trace_hfi1_rcv_error(qp, psn); 1800f48ad614SDennis Dalessandro if (diff > 0) { 1801f48ad614SDennis Dalessandro /* 1802f48ad614SDennis Dalessandro * Packet sequence error. 1803f48ad614SDennis Dalessandro * A NAK will ACK earlier sends and RDMA writes. 1804f48ad614SDennis Dalessandro * Don't queue the NAK if we already sent one. 1805f48ad614SDennis Dalessandro */ 1806f48ad614SDennis Dalessandro if (!qp->r_nak_state) { 1807f48ad614SDennis Dalessandro ibp->rvp.n_rc_seqnak++; 1808f48ad614SDennis Dalessandro qp->r_nak_state = IB_NAK_PSN_ERROR; 1809f48ad614SDennis Dalessandro /* Use the expected PSN. */ 1810f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn; 1811f48ad614SDennis Dalessandro /* 1812f48ad614SDennis Dalessandro * Wait to send the sequence NAK until all packets 1813f48ad614SDennis Dalessandro * in the receive queue have been processed. 1814f48ad614SDennis Dalessandro * Otherwise, we end up propagating congestion. 1815f48ad614SDennis Dalessandro */ 1816f48ad614SDennis Dalessandro rc_defered_ack(rcd, qp); 1817f48ad614SDennis Dalessandro } 1818f48ad614SDennis Dalessandro goto done; 1819f48ad614SDennis Dalessandro } 1820f48ad614SDennis Dalessandro 1821f48ad614SDennis Dalessandro /* 1822f48ad614SDennis Dalessandro * Handle a duplicate request. Don't re-execute SEND, RDMA 1823f48ad614SDennis Dalessandro * write or atomic op. Don't NAK errors, just silently drop 1824f48ad614SDennis Dalessandro * the duplicate request. Note that r_sge, r_len, and 1825f48ad614SDennis Dalessandro * r_rcv_len may be in use so don't modify them. 1826f48ad614SDennis Dalessandro * 1827f48ad614SDennis Dalessandro * We are supposed to ACK the earliest duplicate PSN but we 1828f48ad614SDennis Dalessandro * can coalesce an outstanding duplicate ACK. We have to 1829f48ad614SDennis Dalessandro * send the earliest so that RDMA reads can be restarted at 1830f48ad614SDennis Dalessandro * the requester's expected PSN. 1831f48ad614SDennis Dalessandro * 1832f48ad614SDennis Dalessandro * First, find where this duplicate PSN falls within the 1833f48ad614SDennis Dalessandro * ACKs previously sent. 1834f48ad614SDennis Dalessandro * old_req is true if there is an older response that is scheduled 1835f48ad614SDennis Dalessandro * to be sent before sending this one. 1836f48ad614SDennis Dalessandro */ 1837f48ad614SDennis Dalessandro e = NULL; 1838f48ad614SDennis Dalessandro old_req = 1; 1839f48ad614SDennis Dalessandro ibp->rvp.n_rc_dupreq++; 1840f48ad614SDennis Dalessandro 1841f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 1842f48ad614SDennis Dalessandro 1843f48ad614SDennis Dalessandro for (i = qp->r_head_ack_queue; ; i = prev) { 1844f48ad614SDennis Dalessandro if (i == qp->s_tail_ack_queue) 1845f48ad614SDennis Dalessandro old_req = 0; 1846f48ad614SDennis Dalessandro if (i) 1847f48ad614SDennis Dalessandro prev = i - 1; 1848f48ad614SDennis Dalessandro else 1849f48ad614SDennis Dalessandro prev = HFI1_MAX_RDMA_ATOMIC; 1850f48ad614SDennis Dalessandro if (prev == qp->r_head_ack_queue) { 1851f48ad614SDennis Dalessandro e = NULL; 1852f48ad614SDennis Dalessandro break; 1853f48ad614SDennis Dalessandro } 1854f48ad614SDennis Dalessandro e = &qp->s_ack_queue[prev]; 1855f48ad614SDennis Dalessandro if (!e->opcode) { 1856f48ad614SDennis Dalessandro e = NULL; 1857f48ad614SDennis Dalessandro break; 1858f48ad614SDennis Dalessandro } 1859f48ad614SDennis Dalessandro if (cmp_psn(psn, e->psn) >= 0) { 1860f48ad614SDennis Dalessandro if (prev == qp->s_tail_ack_queue && 1861f48ad614SDennis Dalessandro cmp_psn(psn, e->lpsn) <= 0) 1862f48ad614SDennis Dalessandro old_req = 0; 1863f48ad614SDennis Dalessandro break; 1864f48ad614SDennis Dalessandro } 1865f48ad614SDennis Dalessandro } 1866f48ad614SDennis Dalessandro switch (opcode) { 1867f48ad614SDennis Dalessandro case OP(RDMA_READ_REQUEST): { 1868f48ad614SDennis Dalessandro struct ib_reth *reth; 1869f48ad614SDennis Dalessandro u32 offset; 1870f48ad614SDennis Dalessandro u32 len; 1871f48ad614SDennis Dalessandro 1872f48ad614SDennis Dalessandro /* 1873f48ad614SDennis Dalessandro * If we didn't find the RDMA read request in the ack queue, 1874f48ad614SDennis Dalessandro * we can ignore this request. 1875f48ad614SDennis Dalessandro */ 1876f48ad614SDennis Dalessandro if (!e || e->opcode != OP(RDMA_READ_REQUEST)) 1877f48ad614SDennis Dalessandro goto unlock_done; 1878f48ad614SDennis Dalessandro /* RETH comes after BTH */ 1879f48ad614SDennis Dalessandro reth = &ohdr->u.rc.reth; 1880f48ad614SDennis Dalessandro /* 1881f48ad614SDennis Dalessandro * Address range must be a subset of the original 1882f48ad614SDennis Dalessandro * request and start on pmtu boundaries. 1883f48ad614SDennis Dalessandro * We reuse the old ack_queue slot since the requester 1884f48ad614SDennis Dalessandro * should not back up and request an earlier PSN for the 1885f48ad614SDennis Dalessandro * same request. 1886f48ad614SDennis Dalessandro */ 1887f48ad614SDennis Dalessandro offset = delta_psn(psn, e->psn) * qp->pmtu; 1888f48ad614SDennis Dalessandro len = be32_to_cpu(reth->length); 1889f48ad614SDennis Dalessandro if (unlikely(offset + len != e->rdma_sge.sge_length)) 1890f48ad614SDennis Dalessandro goto unlock_done; 1891f48ad614SDennis Dalessandro if (e->rdma_sge.mr) { 1892f48ad614SDennis Dalessandro rvt_put_mr(e->rdma_sge.mr); 1893f48ad614SDennis Dalessandro e->rdma_sge.mr = NULL; 1894f48ad614SDennis Dalessandro } 1895f48ad614SDennis Dalessandro if (len != 0) { 1896f48ad614SDennis Dalessandro u32 rkey = be32_to_cpu(reth->rkey); 1897261a4351SMike Marciniszyn u64 vaddr = get_ib_reth_vaddr(reth); 1898f48ad614SDennis Dalessandro int ok; 1899f48ad614SDennis Dalessandro 1900f48ad614SDennis Dalessandro ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey, 1901f48ad614SDennis Dalessandro IB_ACCESS_REMOTE_READ); 1902f48ad614SDennis Dalessandro if (unlikely(!ok)) 1903f48ad614SDennis Dalessandro goto unlock_done; 1904f48ad614SDennis Dalessandro } else { 1905f48ad614SDennis Dalessandro e->rdma_sge.vaddr = NULL; 1906f48ad614SDennis Dalessandro e->rdma_sge.length = 0; 1907f48ad614SDennis Dalessandro e->rdma_sge.sge_length = 0; 1908f48ad614SDennis Dalessandro } 1909f48ad614SDennis Dalessandro e->psn = psn; 1910f48ad614SDennis Dalessandro if (old_req) 1911f48ad614SDennis Dalessandro goto unlock_done; 1912f48ad614SDennis Dalessandro qp->s_tail_ack_queue = prev; 1913f48ad614SDennis Dalessandro break; 1914f48ad614SDennis Dalessandro } 1915f48ad614SDennis Dalessandro 1916f48ad614SDennis Dalessandro case OP(COMPARE_SWAP): 1917f48ad614SDennis Dalessandro case OP(FETCH_ADD): { 1918f48ad614SDennis Dalessandro /* 1919f48ad614SDennis Dalessandro * If we didn't find the atomic request in the ack queue 1920ca00c62bSDennis Dalessandro * or the send engine is already backed up to send an 1921f48ad614SDennis Dalessandro * earlier entry, we can ignore this request. 1922f48ad614SDennis Dalessandro */ 1923f48ad614SDennis Dalessandro if (!e || e->opcode != (u8)opcode || old_req) 1924f48ad614SDennis Dalessandro goto unlock_done; 1925f48ad614SDennis Dalessandro qp->s_tail_ack_queue = prev; 1926f48ad614SDennis Dalessandro break; 1927f48ad614SDennis Dalessandro } 1928f48ad614SDennis Dalessandro 1929f48ad614SDennis Dalessandro default: 1930f48ad614SDennis Dalessandro /* 1931f48ad614SDennis Dalessandro * Ignore this operation if it doesn't request an ACK 1932f48ad614SDennis Dalessandro * or an earlier RDMA read or atomic is going to be resent. 1933f48ad614SDennis Dalessandro */ 1934f48ad614SDennis Dalessandro if (!(psn & IB_BTH_REQ_ACK) || old_req) 1935f48ad614SDennis Dalessandro goto unlock_done; 1936f48ad614SDennis Dalessandro /* 1937f48ad614SDennis Dalessandro * Resend the most recent ACK if this request is 1938f48ad614SDennis Dalessandro * after all the previous RDMA reads and atomics. 1939f48ad614SDennis Dalessandro */ 1940f48ad614SDennis Dalessandro if (i == qp->r_head_ack_queue) { 1941f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 1942f48ad614SDennis Dalessandro qp->r_nak_state = 0; 1943f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn - 1; 1944f48ad614SDennis Dalessandro goto send_ack; 1945f48ad614SDennis Dalessandro } 1946f48ad614SDennis Dalessandro 1947f48ad614SDennis Dalessandro /* 1948f48ad614SDennis Dalessandro * Resend the RDMA read or atomic op which 1949f48ad614SDennis Dalessandro * ACKs this duplicate request. 1950f48ad614SDennis Dalessandro */ 1951f48ad614SDennis Dalessandro qp->s_tail_ack_queue = i; 1952f48ad614SDennis Dalessandro break; 1953f48ad614SDennis Dalessandro } 1954f48ad614SDennis Dalessandro qp->s_ack_state = OP(ACKNOWLEDGE); 1955f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_RESP_PENDING; 1956f48ad614SDennis Dalessandro qp->r_nak_state = 0; 1957f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 1958f48ad614SDennis Dalessandro 1959f48ad614SDennis Dalessandro unlock_done: 1960f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 1961f48ad614SDennis Dalessandro done: 1962f48ad614SDennis Dalessandro return 1; 1963f48ad614SDennis Dalessandro 1964f48ad614SDennis Dalessandro send_ack: 1965f48ad614SDennis Dalessandro return 0; 1966f48ad614SDennis Dalessandro } 1967f48ad614SDennis Dalessandro 1968f48ad614SDennis Dalessandro void hfi1_rc_error(struct rvt_qp *qp, enum ib_wc_status err) 1969f48ad614SDennis Dalessandro { 1970f48ad614SDennis Dalessandro unsigned long flags; 1971f48ad614SDennis Dalessandro int lastwqe; 1972f48ad614SDennis Dalessandro 1973f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 1974f48ad614SDennis Dalessandro lastwqe = rvt_error_qp(qp, err); 1975f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 1976f48ad614SDennis Dalessandro 1977f48ad614SDennis Dalessandro if (lastwqe) { 1978f48ad614SDennis Dalessandro struct ib_event ev; 1979f48ad614SDennis Dalessandro 1980f48ad614SDennis Dalessandro ev.device = qp->ibqp.device; 1981f48ad614SDennis Dalessandro ev.element.qp = &qp->ibqp; 1982f48ad614SDennis Dalessandro ev.event = IB_EVENT_QP_LAST_WQE_REACHED; 1983f48ad614SDennis Dalessandro qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 1984f48ad614SDennis Dalessandro } 1985f48ad614SDennis Dalessandro } 1986f48ad614SDennis Dalessandro 1987f48ad614SDennis Dalessandro static inline void update_ack_queue(struct rvt_qp *qp, unsigned n) 1988f48ad614SDennis Dalessandro { 1989f48ad614SDennis Dalessandro unsigned next; 1990f48ad614SDennis Dalessandro 1991f48ad614SDennis Dalessandro next = n + 1; 1992f48ad614SDennis Dalessandro if (next > HFI1_MAX_RDMA_ATOMIC) 1993f48ad614SDennis Dalessandro next = 0; 1994f48ad614SDennis Dalessandro qp->s_tail_ack_queue = next; 1995f48ad614SDennis Dalessandro qp->s_ack_state = OP(ACKNOWLEDGE); 1996f48ad614SDennis Dalessandro } 1997f48ad614SDennis Dalessandro 1998f48ad614SDennis Dalessandro static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, 1999f48ad614SDennis Dalessandro u32 lqpn, u32 rqpn, u8 svc_type) 2000f48ad614SDennis Dalessandro { 2001f48ad614SDennis Dalessandro struct opa_hfi1_cong_log_event_internal *cc_event; 2002f48ad614SDennis Dalessandro unsigned long flags; 2003f48ad614SDennis Dalessandro 2004f48ad614SDennis Dalessandro if (sl >= OPA_MAX_SLS) 2005f48ad614SDennis Dalessandro return; 2006f48ad614SDennis Dalessandro 2007f48ad614SDennis Dalessandro spin_lock_irqsave(&ppd->cc_log_lock, flags); 2008f48ad614SDennis Dalessandro 2009f48ad614SDennis Dalessandro ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8); 2010f48ad614SDennis Dalessandro ppd->threshold_event_counter++; 2011f48ad614SDennis Dalessandro 2012f48ad614SDennis Dalessandro cc_event = &ppd->cc_events[ppd->cc_log_idx++]; 2013f48ad614SDennis Dalessandro if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS) 2014f48ad614SDennis Dalessandro ppd->cc_log_idx = 0; 2015f48ad614SDennis Dalessandro cc_event->lqpn = lqpn & RVT_QPN_MASK; 2016f48ad614SDennis Dalessandro cc_event->rqpn = rqpn & RVT_QPN_MASK; 2017f48ad614SDennis Dalessandro cc_event->sl = sl; 2018f48ad614SDennis Dalessandro cc_event->svc_type = svc_type; 2019f48ad614SDennis Dalessandro cc_event->rlid = rlid; 2020f48ad614SDennis Dalessandro /* keep timestamp in units of 1.024 usec */ 2021f48ad614SDennis Dalessandro cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024; 2022f48ad614SDennis Dalessandro 2023f48ad614SDennis Dalessandro spin_unlock_irqrestore(&ppd->cc_log_lock, flags); 2024f48ad614SDennis Dalessandro } 2025f48ad614SDennis Dalessandro 2026f48ad614SDennis Dalessandro void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn, 2027f48ad614SDennis Dalessandro u32 rqpn, u8 svc_type) 2028f48ad614SDennis Dalessandro { 2029f48ad614SDennis Dalessandro struct cca_timer *cca_timer; 2030f48ad614SDennis Dalessandro u16 ccti, ccti_incr, ccti_timer, ccti_limit; 2031f48ad614SDennis Dalessandro u8 trigger_threshold; 2032f48ad614SDennis Dalessandro struct cc_state *cc_state; 2033f48ad614SDennis Dalessandro unsigned long flags; 2034f48ad614SDennis Dalessandro 2035f48ad614SDennis Dalessandro if (sl >= OPA_MAX_SLS) 2036f48ad614SDennis Dalessandro return; 2037f48ad614SDennis Dalessandro 2038f48ad614SDennis Dalessandro cc_state = get_cc_state(ppd); 2039f48ad614SDennis Dalessandro 2040f48ad614SDennis Dalessandro if (!cc_state) 2041f48ad614SDennis Dalessandro return; 2042f48ad614SDennis Dalessandro 2043f48ad614SDennis Dalessandro /* 2044f48ad614SDennis Dalessandro * 1) increase CCTI (for this SL) 2045f48ad614SDennis Dalessandro * 2) select IPG (i.e., call set_link_ipg()) 2046f48ad614SDennis Dalessandro * 3) start timer 2047f48ad614SDennis Dalessandro */ 2048f48ad614SDennis Dalessandro ccti_limit = cc_state->cct.ccti_limit; 2049f48ad614SDennis Dalessandro ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase; 2050f48ad614SDennis Dalessandro ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer; 2051f48ad614SDennis Dalessandro trigger_threshold = 2052f48ad614SDennis Dalessandro cc_state->cong_setting.entries[sl].trigger_threshold; 2053f48ad614SDennis Dalessandro 2054f48ad614SDennis Dalessandro spin_lock_irqsave(&ppd->cca_timer_lock, flags); 2055f48ad614SDennis Dalessandro 2056f48ad614SDennis Dalessandro cca_timer = &ppd->cca_timer[sl]; 2057f48ad614SDennis Dalessandro if (cca_timer->ccti < ccti_limit) { 2058f48ad614SDennis Dalessandro if (cca_timer->ccti + ccti_incr <= ccti_limit) 2059f48ad614SDennis Dalessandro cca_timer->ccti += ccti_incr; 2060f48ad614SDennis Dalessandro else 2061f48ad614SDennis Dalessandro cca_timer->ccti = ccti_limit; 2062f48ad614SDennis Dalessandro set_link_ipg(ppd); 2063f48ad614SDennis Dalessandro } 2064f48ad614SDennis Dalessandro 2065f48ad614SDennis Dalessandro ccti = cca_timer->ccti; 2066f48ad614SDennis Dalessandro 2067f48ad614SDennis Dalessandro if (!hrtimer_active(&cca_timer->hrtimer)) { 2068f48ad614SDennis Dalessandro /* ccti_timer is in units of 1.024 usec */ 2069f48ad614SDennis Dalessandro unsigned long nsec = 1024 * ccti_timer; 2070f48ad614SDennis Dalessandro 2071f48ad614SDennis Dalessandro hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec), 2072f48ad614SDennis Dalessandro HRTIMER_MODE_REL); 2073f48ad614SDennis Dalessandro } 2074f48ad614SDennis Dalessandro 2075f48ad614SDennis Dalessandro spin_unlock_irqrestore(&ppd->cca_timer_lock, flags); 2076f48ad614SDennis Dalessandro 2077f48ad614SDennis Dalessandro if ((trigger_threshold != 0) && (ccti >= trigger_threshold)) 2078f48ad614SDennis Dalessandro log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type); 2079f48ad614SDennis Dalessandro } 2080f48ad614SDennis Dalessandro 2081f48ad614SDennis Dalessandro /** 2082f48ad614SDennis Dalessandro * hfi1_rc_rcv - process an incoming RC packet 2083f48ad614SDennis Dalessandro * @rcd: the context pointer 2084f48ad614SDennis Dalessandro * @hdr: the header of this packet 2085f48ad614SDennis Dalessandro * @rcv_flags: flags relevant to rcv processing 2086f48ad614SDennis Dalessandro * @data: the packet data 2087f48ad614SDennis Dalessandro * @tlen: the packet length 2088f48ad614SDennis Dalessandro * @qp: the QP for this packet 2089f48ad614SDennis Dalessandro * 2090f48ad614SDennis Dalessandro * This is called from qp_rcv() to process an incoming RC packet 2091f48ad614SDennis Dalessandro * for the given QP. 2092f48ad614SDennis Dalessandro * May be called at interrupt level. 2093f48ad614SDennis Dalessandro */ 2094f48ad614SDennis Dalessandro void hfi1_rc_rcv(struct hfi1_packet *packet) 2095f48ad614SDennis Dalessandro { 2096f48ad614SDennis Dalessandro struct hfi1_ctxtdata *rcd = packet->rcd; 2097261a4351SMike Marciniszyn struct ib_header *hdr = packet->hdr; 2098f48ad614SDennis Dalessandro u32 rcv_flags = packet->rcv_flags; 2099f48ad614SDennis Dalessandro void *data = packet->ebuf; 2100f48ad614SDennis Dalessandro u32 tlen = packet->tlen; 2101f48ad614SDennis Dalessandro struct rvt_qp *qp = packet->qp; 2102f48ad614SDennis Dalessandro struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 2103261a4351SMike Marciniszyn struct ib_other_headers *ohdr = packet->ohdr; 2104f48ad614SDennis Dalessandro u32 bth0, opcode; 2105f48ad614SDennis Dalessandro u32 hdrsize = packet->hlen; 2106f48ad614SDennis Dalessandro u32 psn; 2107f48ad614SDennis Dalessandro u32 pad; 2108f48ad614SDennis Dalessandro struct ib_wc wc; 2109f48ad614SDennis Dalessandro u32 pmtu = qp->pmtu; 2110f48ad614SDennis Dalessandro int diff; 2111f48ad614SDennis Dalessandro struct ib_reth *reth; 2112f48ad614SDennis Dalessandro unsigned long flags; 2113f48ad614SDennis Dalessandro int ret, is_fecn = 0; 2114f48ad614SDennis Dalessandro int copy_last = 0; 2115a2df0c83SJianxin Xiong u32 rkey; 2116f48ad614SDennis Dalessandro 211768e78b3dSMike Marciniszyn lockdep_assert_held(&qp->r_lock); 2118f48ad614SDennis Dalessandro bth0 = be32_to_cpu(ohdr->bth[0]); 2119f48ad614SDennis Dalessandro if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0)) 2120f48ad614SDennis Dalessandro return; 2121f48ad614SDennis Dalessandro 21225fd2b562SMitko Haralanov is_fecn = process_ecn(qp, packet, false); 2123f48ad614SDennis Dalessandro 2124f48ad614SDennis Dalessandro psn = be32_to_cpu(ohdr->bth[2]); 2125f48ad614SDennis Dalessandro opcode = (bth0 >> 24) & 0xff; 2126f48ad614SDennis Dalessandro 2127f48ad614SDennis Dalessandro /* 2128f48ad614SDennis Dalessandro * Process responses (ACKs) before anything else. Note that the 2129f48ad614SDennis Dalessandro * packet sequence number will be for something in the send work 2130f48ad614SDennis Dalessandro * queue rather than the expected receive packet sequence number. 2131f48ad614SDennis Dalessandro * In other words, this QP is the requester. 2132f48ad614SDennis Dalessandro */ 2133f48ad614SDennis Dalessandro if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && 2134f48ad614SDennis Dalessandro opcode <= OP(ATOMIC_ACKNOWLEDGE)) { 2135f48ad614SDennis Dalessandro rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn, 2136f48ad614SDennis Dalessandro hdrsize, pmtu, rcd); 2137f48ad614SDennis Dalessandro if (is_fecn) 2138f48ad614SDennis Dalessandro goto send_ack; 2139f48ad614SDennis Dalessandro return; 2140f48ad614SDennis Dalessandro } 2141f48ad614SDennis Dalessandro 2142f48ad614SDennis Dalessandro /* Compute 24 bits worth of difference. */ 2143f48ad614SDennis Dalessandro diff = delta_psn(psn, qp->r_psn); 2144f48ad614SDennis Dalessandro if (unlikely(diff)) { 2145f48ad614SDennis Dalessandro if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) 2146f48ad614SDennis Dalessandro return; 2147f48ad614SDennis Dalessandro goto send_ack; 2148f48ad614SDennis Dalessandro } 2149f48ad614SDennis Dalessandro 2150f48ad614SDennis Dalessandro /* Check for opcode sequence errors. */ 2151f48ad614SDennis Dalessandro switch (qp->r_state) { 2152f48ad614SDennis Dalessandro case OP(SEND_FIRST): 2153f48ad614SDennis Dalessandro case OP(SEND_MIDDLE): 2154f48ad614SDennis Dalessandro if (opcode == OP(SEND_MIDDLE) || 2155f48ad614SDennis Dalessandro opcode == OP(SEND_LAST) || 2156a2df0c83SJianxin Xiong opcode == OP(SEND_LAST_WITH_IMMEDIATE) || 2157a2df0c83SJianxin Xiong opcode == OP(SEND_LAST_WITH_INVALIDATE)) 2158f48ad614SDennis Dalessandro break; 2159f48ad614SDennis Dalessandro goto nack_inv; 2160f48ad614SDennis Dalessandro 2161f48ad614SDennis Dalessandro case OP(RDMA_WRITE_FIRST): 2162f48ad614SDennis Dalessandro case OP(RDMA_WRITE_MIDDLE): 2163f48ad614SDennis Dalessandro if (opcode == OP(RDMA_WRITE_MIDDLE) || 2164f48ad614SDennis Dalessandro opcode == OP(RDMA_WRITE_LAST) || 2165f48ad614SDennis Dalessandro opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 2166f48ad614SDennis Dalessandro break; 2167f48ad614SDennis Dalessandro goto nack_inv; 2168f48ad614SDennis Dalessandro 2169f48ad614SDennis Dalessandro default: 2170f48ad614SDennis Dalessandro if (opcode == OP(SEND_MIDDLE) || 2171f48ad614SDennis Dalessandro opcode == OP(SEND_LAST) || 2172f48ad614SDennis Dalessandro opcode == OP(SEND_LAST_WITH_IMMEDIATE) || 2173a2df0c83SJianxin Xiong opcode == OP(SEND_LAST_WITH_INVALIDATE) || 2174f48ad614SDennis Dalessandro opcode == OP(RDMA_WRITE_MIDDLE) || 2175f48ad614SDennis Dalessandro opcode == OP(RDMA_WRITE_LAST) || 2176f48ad614SDennis Dalessandro opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 2177f48ad614SDennis Dalessandro goto nack_inv; 2178f48ad614SDennis Dalessandro /* 2179f48ad614SDennis Dalessandro * Note that it is up to the requester to not send a new 2180f48ad614SDennis Dalessandro * RDMA read or atomic operation before receiving an ACK 2181f48ad614SDennis Dalessandro * for the previous operation. 2182f48ad614SDennis Dalessandro */ 2183f48ad614SDennis Dalessandro break; 2184f48ad614SDennis Dalessandro } 2185f48ad614SDennis Dalessandro 2186f48ad614SDennis Dalessandro if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST)) 2187f48ad614SDennis Dalessandro qp_comm_est(qp); 2188f48ad614SDennis Dalessandro 2189f48ad614SDennis Dalessandro /* OK, process the packet. */ 2190f48ad614SDennis Dalessandro switch (opcode) { 2191f48ad614SDennis Dalessandro case OP(SEND_FIRST): 2192f48ad614SDennis Dalessandro ret = hfi1_rvt_get_rwqe(qp, 0); 2193f48ad614SDennis Dalessandro if (ret < 0) 2194f48ad614SDennis Dalessandro goto nack_op_err; 2195f48ad614SDennis Dalessandro if (!ret) 2196f48ad614SDennis Dalessandro goto rnr_nak; 2197f48ad614SDennis Dalessandro qp->r_rcv_len = 0; 2198f48ad614SDennis Dalessandro /* FALLTHROUGH */ 2199f48ad614SDennis Dalessandro case OP(SEND_MIDDLE): 2200f48ad614SDennis Dalessandro case OP(RDMA_WRITE_MIDDLE): 2201f48ad614SDennis Dalessandro send_middle: 2202f48ad614SDennis Dalessandro /* Check for invalid length PMTU or posted rwqe len. */ 2203f48ad614SDennis Dalessandro if (unlikely(tlen != (hdrsize + pmtu + 4))) 2204f48ad614SDennis Dalessandro goto nack_inv; 2205f48ad614SDennis Dalessandro qp->r_rcv_len += pmtu; 2206f48ad614SDennis Dalessandro if (unlikely(qp->r_rcv_len > qp->r_len)) 2207f48ad614SDennis Dalessandro goto nack_inv; 2208f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->r_sge, data, pmtu, 1, 0); 2209f48ad614SDennis Dalessandro break; 2210f48ad614SDennis Dalessandro 2211f48ad614SDennis Dalessandro case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): 2212f48ad614SDennis Dalessandro /* consume RWQE */ 2213f48ad614SDennis Dalessandro ret = hfi1_rvt_get_rwqe(qp, 1); 2214f48ad614SDennis Dalessandro if (ret < 0) 2215f48ad614SDennis Dalessandro goto nack_op_err; 2216f48ad614SDennis Dalessandro if (!ret) 2217f48ad614SDennis Dalessandro goto rnr_nak; 2218f48ad614SDennis Dalessandro goto send_last_imm; 2219f48ad614SDennis Dalessandro 2220f48ad614SDennis Dalessandro case OP(SEND_ONLY): 2221f48ad614SDennis Dalessandro case OP(SEND_ONLY_WITH_IMMEDIATE): 2222a2df0c83SJianxin Xiong case OP(SEND_ONLY_WITH_INVALIDATE): 2223f48ad614SDennis Dalessandro ret = hfi1_rvt_get_rwqe(qp, 0); 2224f48ad614SDennis Dalessandro if (ret < 0) 2225f48ad614SDennis Dalessandro goto nack_op_err; 2226f48ad614SDennis Dalessandro if (!ret) 2227f48ad614SDennis Dalessandro goto rnr_nak; 2228f48ad614SDennis Dalessandro qp->r_rcv_len = 0; 2229f48ad614SDennis Dalessandro if (opcode == OP(SEND_ONLY)) 2230f48ad614SDennis Dalessandro goto no_immediate_data; 2231a2df0c83SJianxin Xiong if (opcode == OP(SEND_ONLY_WITH_INVALIDATE)) 2232a2df0c83SJianxin Xiong goto send_last_inv; 2233f48ad614SDennis Dalessandro /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */ 2234f48ad614SDennis Dalessandro case OP(SEND_LAST_WITH_IMMEDIATE): 2235f48ad614SDennis Dalessandro send_last_imm: 2236f48ad614SDennis Dalessandro wc.ex.imm_data = ohdr->u.imm_data; 2237f48ad614SDennis Dalessandro wc.wc_flags = IB_WC_WITH_IMM; 2238f48ad614SDennis Dalessandro goto send_last; 2239a2df0c83SJianxin Xiong case OP(SEND_LAST_WITH_INVALIDATE): 2240a2df0c83SJianxin Xiong send_last_inv: 2241a2df0c83SJianxin Xiong rkey = be32_to_cpu(ohdr->u.ieth); 2242a2df0c83SJianxin Xiong if (rvt_invalidate_rkey(qp, rkey)) 2243a2df0c83SJianxin Xiong goto no_immediate_data; 2244a2df0c83SJianxin Xiong wc.ex.invalidate_rkey = rkey; 2245a2df0c83SJianxin Xiong wc.wc_flags = IB_WC_WITH_INVALIDATE; 2246a2df0c83SJianxin Xiong goto send_last; 2247f48ad614SDennis Dalessandro case OP(RDMA_WRITE_LAST): 2248f48ad614SDennis Dalessandro copy_last = ibpd_to_rvtpd(qp->ibqp.pd)->user; 2249f48ad614SDennis Dalessandro /* fall through */ 2250f48ad614SDennis Dalessandro case OP(SEND_LAST): 2251f48ad614SDennis Dalessandro no_immediate_data: 2252f48ad614SDennis Dalessandro wc.wc_flags = 0; 2253f48ad614SDennis Dalessandro wc.ex.imm_data = 0; 2254f48ad614SDennis Dalessandro send_last: 2255f48ad614SDennis Dalessandro /* Get the number of bytes the message was padded by. */ 2256f48ad614SDennis Dalessandro pad = (bth0 >> 20) & 3; 2257f48ad614SDennis Dalessandro /* Check for invalid length. */ 2258f48ad614SDennis Dalessandro /* LAST len should be >= 1 */ 2259f48ad614SDennis Dalessandro if (unlikely(tlen < (hdrsize + pad + 4))) 2260f48ad614SDennis Dalessandro goto nack_inv; 2261f48ad614SDennis Dalessandro /* Don't count the CRC. */ 2262f48ad614SDennis Dalessandro tlen -= (hdrsize + pad + 4); 2263f48ad614SDennis Dalessandro wc.byte_len = tlen + qp->r_rcv_len; 2264f48ad614SDennis Dalessandro if (unlikely(wc.byte_len > qp->r_len)) 2265f48ad614SDennis Dalessandro goto nack_inv; 2266f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->r_sge, data, tlen, 1, copy_last); 2267f48ad614SDennis Dalessandro rvt_put_ss(&qp->r_sge); 2268f48ad614SDennis Dalessandro qp->r_msn++; 226953e91d26SSebastian Sanchez if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags)) 2270f48ad614SDennis Dalessandro break; 2271f48ad614SDennis Dalessandro wc.wr_id = qp->r_wr_id; 2272f48ad614SDennis Dalessandro wc.status = IB_WC_SUCCESS; 2273f48ad614SDennis Dalessandro if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || 2274f48ad614SDennis Dalessandro opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) 2275f48ad614SDennis Dalessandro wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; 2276f48ad614SDennis Dalessandro else 2277f48ad614SDennis Dalessandro wc.opcode = IB_WC_RECV; 2278f48ad614SDennis Dalessandro wc.qp = &qp->ibqp; 2279f48ad614SDennis Dalessandro wc.src_qp = qp->remote_qpn; 2280f48ad614SDennis Dalessandro wc.slid = qp->remote_ah_attr.dlid; 2281f48ad614SDennis Dalessandro /* 2282f48ad614SDennis Dalessandro * It seems that IB mandates the presence of an SL in a 2283f48ad614SDennis Dalessandro * work completion only for the UD transport (see section 2284f48ad614SDennis Dalessandro * 11.4.2 of IBTA Vol. 1). 2285f48ad614SDennis Dalessandro * 2286f48ad614SDennis Dalessandro * However, the way the SL is chosen below is consistent 2287f48ad614SDennis Dalessandro * with the way that IB/qib works and is trying avoid 2288f48ad614SDennis Dalessandro * introducing incompatibilities. 2289f48ad614SDennis Dalessandro * 2290f48ad614SDennis Dalessandro * See also OPA Vol. 1, section 9.7.6, and table 9-17. 2291f48ad614SDennis Dalessandro */ 2292f48ad614SDennis Dalessandro wc.sl = qp->remote_ah_attr.sl; 2293f48ad614SDennis Dalessandro /* zero fields that are N/A */ 2294f48ad614SDennis Dalessandro wc.vendor_err = 0; 2295f48ad614SDennis Dalessandro wc.pkey_index = 0; 2296f48ad614SDennis Dalessandro wc.dlid_path_bits = 0; 2297f48ad614SDennis Dalessandro wc.port_num = 0; 2298f48ad614SDennis Dalessandro /* Signal completion event if the solicited bit is set. */ 2299f48ad614SDennis Dalessandro rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc, 2300f48ad614SDennis Dalessandro (bth0 & IB_BTH_SOLICITED) != 0); 2301f48ad614SDennis Dalessandro break; 2302f48ad614SDennis Dalessandro 2303f48ad614SDennis Dalessandro case OP(RDMA_WRITE_ONLY): 2304f48ad614SDennis Dalessandro copy_last = 1; 2305f48ad614SDennis Dalessandro /* fall through */ 2306f48ad614SDennis Dalessandro case OP(RDMA_WRITE_FIRST): 2307f48ad614SDennis Dalessandro case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): 2308f48ad614SDennis Dalessandro if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE))) 2309f48ad614SDennis Dalessandro goto nack_inv; 2310f48ad614SDennis Dalessandro /* consume RWQE */ 2311f48ad614SDennis Dalessandro reth = &ohdr->u.rc.reth; 2312f48ad614SDennis Dalessandro qp->r_len = be32_to_cpu(reth->length); 2313f48ad614SDennis Dalessandro qp->r_rcv_len = 0; 2314f48ad614SDennis Dalessandro qp->r_sge.sg_list = NULL; 2315f48ad614SDennis Dalessandro if (qp->r_len != 0) { 2316f48ad614SDennis Dalessandro u32 rkey = be32_to_cpu(reth->rkey); 2317261a4351SMike Marciniszyn u64 vaddr = get_ib_reth_vaddr(reth); 2318f48ad614SDennis Dalessandro int ok; 2319f48ad614SDennis Dalessandro 2320f48ad614SDennis Dalessandro /* Check rkey & NAK */ 2321f48ad614SDennis Dalessandro ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr, 2322f48ad614SDennis Dalessandro rkey, IB_ACCESS_REMOTE_WRITE); 2323f48ad614SDennis Dalessandro if (unlikely(!ok)) 2324f48ad614SDennis Dalessandro goto nack_acc; 2325f48ad614SDennis Dalessandro qp->r_sge.num_sge = 1; 2326f48ad614SDennis Dalessandro } else { 2327f48ad614SDennis Dalessandro qp->r_sge.num_sge = 0; 2328f48ad614SDennis Dalessandro qp->r_sge.sge.mr = NULL; 2329f48ad614SDennis Dalessandro qp->r_sge.sge.vaddr = NULL; 2330f48ad614SDennis Dalessandro qp->r_sge.sge.length = 0; 2331f48ad614SDennis Dalessandro qp->r_sge.sge.sge_length = 0; 2332f48ad614SDennis Dalessandro } 2333f48ad614SDennis Dalessandro if (opcode == OP(RDMA_WRITE_FIRST)) 2334f48ad614SDennis Dalessandro goto send_middle; 2335f48ad614SDennis Dalessandro else if (opcode == OP(RDMA_WRITE_ONLY)) 2336f48ad614SDennis Dalessandro goto no_immediate_data; 2337f48ad614SDennis Dalessandro ret = hfi1_rvt_get_rwqe(qp, 1); 2338f48ad614SDennis Dalessandro if (ret < 0) 2339f48ad614SDennis Dalessandro goto nack_op_err; 2340f48ad614SDennis Dalessandro if (!ret) 2341f48ad614SDennis Dalessandro goto rnr_nak; 2342f48ad614SDennis Dalessandro wc.ex.imm_data = ohdr->u.rc.imm_data; 2343f48ad614SDennis Dalessandro wc.wc_flags = IB_WC_WITH_IMM; 2344f48ad614SDennis Dalessandro goto send_last; 2345f48ad614SDennis Dalessandro 2346f48ad614SDennis Dalessandro case OP(RDMA_READ_REQUEST): { 2347f48ad614SDennis Dalessandro struct rvt_ack_entry *e; 2348f48ad614SDennis Dalessandro u32 len; 2349f48ad614SDennis Dalessandro u8 next; 2350f48ad614SDennis Dalessandro 2351f48ad614SDennis Dalessandro if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ))) 2352f48ad614SDennis Dalessandro goto nack_inv; 2353f48ad614SDennis Dalessandro next = qp->r_head_ack_queue + 1; 2354f48ad614SDennis Dalessandro /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */ 2355f48ad614SDennis Dalessandro if (next > HFI1_MAX_RDMA_ATOMIC) 2356f48ad614SDennis Dalessandro next = 0; 2357f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 2358f48ad614SDennis Dalessandro if (unlikely(next == qp->s_tail_ack_queue)) { 2359f48ad614SDennis Dalessandro if (!qp->s_ack_queue[next].sent) 2360f48ad614SDennis Dalessandro goto nack_inv_unlck; 2361f48ad614SDennis Dalessandro update_ack_queue(qp, next); 2362f48ad614SDennis Dalessandro } 2363f48ad614SDennis Dalessandro e = &qp->s_ack_queue[qp->r_head_ack_queue]; 2364f48ad614SDennis Dalessandro if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { 2365f48ad614SDennis Dalessandro rvt_put_mr(e->rdma_sge.mr); 2366f48ad614SDennis Dalessandro e->rdma_sge.mr = NULL; 2367f48ad614SDennis Dalessandro } 2368f48ad614SDennis Dalessandro reth = &ohdr->u.rc.reth; 2369f48ad614SDennis Dalessandro len = be32_to_cpu(reth->length); 2370f48ad614SDennis Dalessandro if (len) { 2371f48ad614SDennis Dalessandro u32 rkey = be32_to_cpu(reth->rkey); 2372261a4351SMike Marciniszyn u64 vaddr = get_ib_reth_vaddr(reth); 2373f48ad614SDennis Dalessandro int ok; 2374f48ad614SDennis Dalessandro 2375f48ad614SDennis Dalessandro /* Check rkey & NAK */ 2376f48ad614SDennis Dalessandro ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, 2377f48ad614SDennis Dalessandro rkey, IB_ACCESS_REMOTE_READ); 2378f48ad614SDennis Dalessandro if (unlikely(!ok)) 2379f48ad614SDennis Dalessandro goto nack_acc_unlck; 2380f48ad614SDennis Dalessandro /* 2381f48ad614SDennis Dalessandro * Update the next expected PSN. We add 1 later 2382f48ad614SDennis Dalessandro * below, so only add the remainder here. 2383f48ad614SDennis Dalessandro */ 23845dc80605SMike Marciniszyn qp->r_psn += rvt_div_mtu(qp, len - 1); 2385f48ad614SDennis Dalessandro } else { 2386f48ad614SDennis Dalessandro e->rdma_sge.mr = NULL; 2387f48ad614SDennis Dalessandro e->rdma_sge.vaddr = NULL; 2388f48ad614SDennis Dalessandro e->rdma_sge.length = 0; 2389f48ad614SDennis Dalessandro e->rdma_sge.sge_length = 0; 2390f48ad614SDennis Dalessandro } 2391f48ad614SDennis Dalessandro e->opcode = opcode; 2392f48ad614SDennis Dalessandro e->sent = 0; 2393f48ad614SDennis Dalessandro e->psn = psn; 2394f48ad614SDennis Dalessandro e->lpsn = qp->r_psn; 2395f48ad614SDennis Dalessandro /* 2396f48ad614SDennis Dalessandro * We need to increment the MSN here instead of when we 2397f48ad614SDennis Dalessandro * finish sending the result since a duplicate request would 2398f48ad614SDennis Dalessandro * increment it more than once. 2399f48ad614SDennis Dalessandro */ 2400f48ad614SDennis Dalessandro qp->r_msn++; 2401f48ad614SDennis Dalessandro qp->r_psn++; 2402f48ad614SDennis Dalessandro qp->r_state = opcode; 2403f48ad614SDennis Dalessandro qp->r_nak_state = 0; 2404f48ad614SDennis Dalessandro qp->r_head_ack_queue = next; 2405f48ad614SDennis Dalessandro 2406ca00c62bSDennis Dalessandro /* Schedule the send engine. */ 2407f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_RESP_PENDING; 2408f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 2409f48ad614SDennis Dalessandro 2410f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 2411f48ad614SDennis Dalessandro if (is_fecn) 2412f48ad614SDennis Dalessandro goto send_ack; 2413f48ad614SDennis Dalessandro return; 2414f48ad614SDennis Dalessandro } 2415f48ad614SDennis Dalessandro 2416f48ad614SDennis Dalessandro case OP(COMPARE_SWAP): 2417f48ad614SDennis Dalessandro case OP(FETCH_ADD): { 2418f48ad614SDennis Dalessandro struct ib_atomic_eth *ateth; 2419f48ad614SDennis Dalessandro struct rvt_ack_entry *e; 2420f48ad614SDennis Dalessandro u64 vaddr; 2421f48ad614SDennis Dalessandro atomic64_t *maddr; 2422f48ad614SDennis Dalessandro u64 sdata; 2423f48ad614SDennis Dalessandro u32 rkey; 2424f48ad614SDennis Dalessandro u8 next; 2425f48ad614SDennis Dalessandro 2426f48ad614SDennis Dalessandro if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC))) 2427f48ad614SDennis Dalessandro goto nack_inv; 2428f48ad614SDennis Dalessandro next = qp->r_head_ack_queue + 1; 2429f48ad614SDennis Dalessandro if (next > HFI1_MAX_RDMA_ATOMIC) 2430f48ad614SDennis Dalessandro next = 0; 2431f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, flags); 2432f48ad614SDennis Dalessandro if (unlikely(next == qp->s_tail_ack_queue)) { 2433f48ad614SDennis Dalessandro if (!qp->s_ack_queue[next].sent) 2434f48ad614SDennis Dalessandro goto nack_inv_unlck; 2435f48ad614SDennis Dalessandro update_ack_queue(qp, next); 2436f48ad614SDennis Dalessandro } 2437f48ad614SDennis Dalessandro e = &qp->s_ack_queue[qp->r_head_ack_queue]; 2438f48ad614SDennis Dalessandro if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { 2439f48ad614SDennis Dalessandro rvt_put_mr(e->rdma_sge.mr); 2440f48ad614SDennis Dalessandro e->rdma_sge.mr = NULL; 2441f48ad614SDennis Dalessandro } 2442f48ad614SDennis Dalessandro ateth = &ohdr->u.atomic_eth; 2443261a4351SMike Marciniszyn vaddr = get_ib_ateth_vaddr(ateth); 2444f48ad614SDennis Dalessandro if (unlikely(vaddr & (sizeof(u64) - 1))) 2445f48ad614SDennis Dalessandro goto nack_inv_unlck; 2446f48ad614SDennis Dalessandro rkey = be32_to_cpu(ateth->rkey); 2447f48ad614SDennis Dalessandro /* Check rkey & NAK */ 2448f48ad614SDennis Dalessandro if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64), 2449f48ad614SDennis Dalessandro vaddr, rkey, 2450f48ad614SDennis Dalessandro IB_ACCESS_REMOTE_ATOMIC))) 2451f48ad614SDennis Dalessandro goto nack_acc_unlck; 2452f48ad614SDennis Dalessandro /* Perform atomic OP and save result. */ 2453f48ad614SDennis Dalessandro maddr = (atomic64_t *)qp->r_sge.sge.vaddr; 2454261a4351SMike Marciniszyn sdata = get_ib_ateth_swap(ateth); 2455f48ad614SDennis Dalessandro e->atomic_data = (opcode == OP(FETCH_ADD)) ? 2456f48ad614SDennis Dalessandro (u64)atomic64_add_return(sdata, maddr) - sdata : 2457f48ad614SDennis Dalessandro (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr, 2458261a4351SMike Marciniszyn get_ib_ateth_compare(ateth), 2459f48ad614SDennis Dalessandro sdata); 2460f48ad614SDennis Dalessandro rvt_put_mr(qp->r_sge.sge.mr); 2461f48ad614SDennis Dalessandro qp->r_sge.num_sge = 0; 2462f48ad614SDennis Dalessandro e->opcode = opcode; 2463f48ad614SDennis Dalessandro e->sent = 0; 2464f48ad614SDennis Dalessandro e->psn = psn; 2465f48ad614SDennis Dalessandro e->lpsn = psn; 2466f48ad614SDennis Dalessandro qp->r_msn++; 2467f48ad614SDennis Dalessandro qp->r_psn++; 2468f48ad614SDennis Dalessandro qp->r_state = opcode; 2469f48ad614SDennis Dalessandro qp->r_nak_state = 0; 2470f48ad614SDennis Dalessandro qp->r_head_ack_queue = next; 2471f48ad614SDennis Dalessandro 2472ca00c62bSDennis Dalessandro /* Schedule the send engine. */ 2473f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_RESP_PENDING; 2474f48ad614SDennis Dalessandro hfi1_schedule_send(qp); 2475f48ad614SDennis Dalessandro 2476f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 2477f48ad614SDennis Dalessandro if (is_fecn) 2478f48ad614SDennis Dalessandro goto send_ack; 2479f48ad614SDennis Dalessandro return; 2480f48ad614SDennis Dalessandro } 2481f48ad614SDennis Dalessandro 2482f48ad614SDennis Dalessandro default: 2483f48ad614SDennis Dalessandro /* NAK unknown opcodes. */ 2484f48ad614SDennis Dalessandro goto nack_inv; 2485f48ad614SDennis Dalessandro } 2486f48ad614SDennis Dalessandro qp->r_psn++; 2487f48ad614SDennis Dalessandro qp->r_state = opcode; 2488f48ad614SDennis Dalessandro qp->r_ack_psn = psn; 2489f48ad614SDennis Dalessandro qp->r_nak_state = 0; 2490f48ad614SDennis Dalessandro /* Send an ACK if requested or required. */ 2491f48ad614SDennis Dalessandro if (psn & IB_BTH_REQ_ACK) { 2492f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 2493f48ad614SDennis Dalessandro 2494f48ad614SDennis Dalessandro if (packet->numpkt == 0) { 2495f48ad614SDennis Dalessandro rc_cancel_ack(qp); 2496f48ad614SDennis Dalessandro goto send_ack; 2497f48ad614SDennis Dalessandro } 2498f48ad614SDennis Dalessandro if (priv->r_adefered >= HFI1_PSN_CREDIT) { 2499f48ad614SDennis Dalessandro rc_cancel_ack(qp); 2500f48ad614SDennis Dalessandro goto send_ack; 2501f48ad614SDennis Dalessandro } 2502f48ad614SDennis Dalessandro if (unlikely(is_fecn)) { 2503f48ad614SDennis Dalessandro rc_cancel_ack(qp); 2504f48ad614SDennis Dalessandro goto send_ack; 2505f48ad614SDennis Dalessandro } 2506f48ad614SDennis Dalessandro priv->r_adefered++; 2507f48ad614SDennis Dalessandro rc_defered_ack(rcd, qp); 2508f48ad614SDennis Dalessandro } 2509f48ad614SDennis Dalessandro return; 2510f48ad614SDennis Dalessandro 2511f48ad614SDennis Dalessandro rnr_nak: 2512f48ad614SDennis Dalessandro qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK; 2513f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn; 2514f48ad614SDennis Dalessandro /* Queue RNR NAK for later */ 2515f48ad614SDennis Dalessandro rc_defered_ack(rcd, qp); 2516f48ad614SDennis Dalessandro return; 2517f48ad614SDennis Dalessandro 2518f48ad614SDennis Dalessandro nack_op_err: 2519f48ad614SDennis Dalessandro hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 2520f48ad614SDennis Dalessandro qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR; 2521f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn; 2522f48ad614SDennis Dalessandro /* Queue NAK for later */ 2523f48ad614SDennis Dalessandro rc_defered_ack(rcd, qp); 2524f48ad614SDennis Dalessandro return; 2525f48ad614SDennis Dalessandro 2526f48ad614SDennis Dalessandro nack_inv_unlck: 2527f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 2528f48ad614SDennis Dalessandro nack_inv: 2529f48ad614SDennis Dalessandro hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 2530f48ad614SDennis Dalessandro qp->r_nak_state = IB_NAK_INVALID_REQUEST; 2531f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn; 2532f48ad614SDennis Dalessandro /* Queue NAK for later */ 2533f48ad614SDennis Dalessandro rc_defered_ack(rcd, qp); 2534f48ad614SDennis Dalessandro return; 2535f48ad614SDennis Dalessandro 2536f48ad614SDennis Dalessandro nack_acc_unlck: 2537f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, flags); 2538f48ad614SDennis Dalessandro nack_acc: 2539f48ad614SDennis Dalessandro hfi1_rc_error(qp, IB_WC_LOC_PROT_ERR); 2540f48ad614SDennis Dalessandro qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR; 2541f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn; 2542f48ad614SDennis Dalessandro send_ack: 2543f48ad614SDennis Dalessandro hfi1_send_rc_ack(rcd, qp, is_fecn); 2544f48ad614SDennis Dalessandro } 2545f48ad614SDennis Dalessandro 2546f48ad614SDennis Dalessandro void hfi1_rc_hdrerr( 2547f48ad614SDennis Dalessandro struct hfi1_ctxtdata *rcd, 2548261a4351SMike Marciniszyn struct ib_header *hdr, 2549f48ad614SDennis Dalessandro u32 rcv_flags, 2550f48ad614SDennis Dalessandro struct rvt_qp *qp) 2551f48ad614SDennis Dalessandro { 2552f48ad614SDennis Dalessandro int has_grh = rcv_flags & HFI1_HAS_GRH; 2553261a4351SMike Marciniszyn struct ib_other_headers *ohdr; 2554f48ad614SDennis Dalessandro struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 2555f48ad614SDennis Dalessandro int diff; 2556f48ad614SDennis Dalessandro u32 opcode; 2557f48ad614SDennis Dalessandro u32 psn, bth0; 2558f48ad614SDennis Dalessandro 2559f48ad614SDennis Dalessandro /* Check for GRH */ 2560f48ad614SDennis Dalessandro ohdr = &hdr->u.oth; 2561f48ad614SDennis Dalessandro if (has_grh) 2562f48ad614SDennis Dalessandro ohdr = &hdr->u.l.oth; 2563f48ad614SDennis Dalessandro 2564f48ad614SDennis Dalessandro bth0 = be32_to_cpu(ohdr->bth[0]); 2565f48ad614SDennis Dalessandro if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0)) 2566f48ad614SDennis Dalessandro return; 2567f48ad614SDennis Dalessandro 2568f48ad614SDennis Dalessandro psn = be32_to_cpu(ohdr->bth[2]); 2569f48ad614SDennis Dalessandro opcode = (bth0 >> 24) & 0xff; 2570f48ad614SDennis Dalessandro 2571f48ad614SDennis Dalessandro /* Only deal with RDMA Writes for now */ 2572f48ad614SDennis Dalessandro if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { 2573f48ad614SDennis Dalessandro diff = delta_psn(psn, qp->r_psn); 2574f48ad614SDennis Dalessandro if (!qp->r_nak_state && diff >= 0) { 2575f48ad614SDennis Dalessandro ibp->rvp.n_rc_seqnak++; 2576f48ad614SDennis Dalessandro qp->r_nak_state = IB_NAK_PSN_ERROR; 2577f48ad614SDennis Dalessandro /* Use the expected PSN. */ 2578f48ad614SDennis Dalessandro qp->r_ack_psn = qp->r_psn; 2579f48ad614SDennis Dalessandro /* 2580f48ad614SDennis Dalessandro * Wait to send the sequence 2581f48ad614SDennis Dalessandro * NAK until all packets 2582f48ad614SDennis Dalessandro * in the receive queue have 2583f48ad614SDennis Dalessandro * been processed. 2584f48ad614SDennis Dalessandro * Otherwise, we end up 2585f48ad614SDennis Dalessandro * propagating congestion. 2586f48ad614SDennis Dalessandro */ 2587f48ad614SDennis Dalessandro rc_defered_ack(rcd, qp); 2588f48ad614SDennis Dalessandro } /* Out of sequence NAK */ 2589f48ad614SDennis Dalessandro } /* QP Request NAKs */ 2590f48ad614SDennis Dalessandro } 2591