xref: /openbmc/linux/drivers/infiniband/hw/hfi1/rc.c (revision 4f9264d1)
1f48ad614SDennis Dalessandro /*
22e2ba09eSMike Marciniszyn  * Copyright(c) 2015 - 2018 Intel Corporation.
3f48ad614SDennis Dalessandro  *
4f48ad614SDennis Dalessandro  * This file is provided under a dual BSD/GPLv2 license.  When using or
5f48ad614SDennis Dalessandro  * redistributing this file, you may do so under either license.
6f48ad614SDennis Dalessandro  *
7f48ad614SDennis Dalessandro  * GPL LICENSE SUMMARY
8f48ad614SDennis Dalessandro  *
9f48ad614SDennis Dalessandro  * This program is free software; you can redistribute it and/or modify
10f48ad614SDennis Dalessandro  * it under the terms of version 2 of the GNU General Public License as
11f48ad614SDennis Dalessandro  * published by the Free Software Foundation.
12f48ad614SDennis Dalessandro  *
13f48ad614SDennis Dalessandro  * This program is distributed in the hope that it will be useful, but
14f48ad614SDennis Dalessandro  * WITHOUT ANY WARRANTY; without even the implied warranty of
15f48ad614SDennis Dalessandro  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16f48ad614SDennis Dalessandro  * General Public License for more details.
17f48ad614SDennis Dalessandro  *
18f48ad614SDennis Dalessandro  * BSD LICENSE
19f48ad614SDennis Dalessandro  *
20f48ad614SDennis Dalessandro  * Redistribution and use in source and binary forms, with or without
21f48ad614SDennis Dalessandro  * modification, are permitted provided that the following conditions
22f48ad614SDennis Dalessandro  * are met:
23f48ad614SDennis Dalessandro  *
24f48ad614SDennis Dalessandro  *  - Redistributions of source code must retain the above copyright
25f48ad614SDennis Dalessandro  *    notice, this list of conditions and the following disclaimer.
26f48ad614SDennis Dalessandro  *  - Redistributions in binary form must reproduce the above copyright
27f48ad614SDennis Dalessandro  *    notice, this list of conditions and the following disclaimer in
28f48ad614SDennis Dalessandro  *    the documentation and/or other materials provided with the
29f48ad614SDennis Dalessandro  *    distribution.
30f48ad614SDennis Dalessandro  *  - Neither the name of Intel Corporation nor the names of its
31f48ad614SDennis Dalessandro  *    contributors may be used to endorse or promote products derived
32f48ad614SDennis Dalessandro  *    from this software without specific prior written permission.
33f48ad614SDennis Dalessandro  *
34f48ad614SDennis Dalessandro  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35f48ad614SDennis Dalessandro  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36f48ad614SDennis Dalessandro  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37f48ad614SDennis Dalessandro  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38f48ad614SDennis Dalessandro  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39f48ad614SDennis Dalessandro  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40f48ad614SDennis Dalessandro  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41f48ad614SDennis Dalessandro  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42f48ad614SDennis Dalessandro  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43f48ad614SDennis Dalessandro  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44f48ad614SDennis Dalessandro  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45f48ad614SDennis Dalessandro  *
46f48ad614SDennis Dalessandro  */
47f48ad614SDennis Dalessandro 
48f48ad614SDennis Dalessandro #include <linux/io.h>
49f48ad614SDennis Dalessandro #include <rdma/rdma_vt.h>
50f48ad614SDennis Dalessandro #include <rdma/rdmavt_qp.h>
51f48ad614SDennis Dalessandro 
52f48ad614SDennis Dalessandro #include "hfi.h"
53f48ad614SDennis Dalessandro #include "qp.h"
54385156c5SKaike Wan #include "rc.h"
55f48ad614SDennis Dalessandro #include "verbs_txreq.h"
56f48ad614SDennis Dalessandro #include "trace.h"
57f48ad614SDennis Dalessandro 
58385156c5SKaike Wan struct rvt_ack_entry *find_prev_entry(struct rvt_qp *qp, u32 psn, u8 *prev,
59385156c5SKaike Wan 				      u8 *prev_ack, bool *scheduled)
60385156c5SKaike Wan 	__must_hold(&qp->s_lock)
61f48ad614SDennis Dalessandro {
62385156c5SKaike Wan 	struct rvt_ack_entry *e = NULL;
63385156c5SKaike Wan 	u8 i, p;
64385156c5SKaike Wan 	bool s = true;
65f48ad614SDennis Dalessandro 
66385156c5SKaike Wan 	for (i = qp->r_head_ack_queue; ; i = p) {
67385156c5SKaike Wan 		if (i == qp->s_tail_ack_queue)
68385156c5SKaike Wan 			s = false;
69385156c5SKaike Wan 		if (i)
70385156c5SKaike Wan 			p = i - 1;
71385156c5SKaike Wan 		else
72385156c5SKaike Wan 			p = rvt_size_atomic(ib_to_rvt(qp->ibqp.device));
73385156c5SKaike Wan 		if (p == qp->r_head_ack_queue) {
74385156c5SKaike Wan 			e = NULL;
75385156c5SKaike Wan 			break;
76385156c5SKaike Wan 		}
77385156c5SKaike Wan 		e = &qp->s_ack_queue[p];
78385156c5SKaike Wan 		if (!e->opcode) {
79385156c5SKaike Wan 			e = NULL;
80385156c5SKaike Wan 			break;
81385156c5SKaike Wan 		}
82385156c5SKaike Wan 		if (cmp_psn(psn, e->psn) >= 0) {
83385156c5SKaike Wan 			if (p == qp->s_tail_ack_queue &&
84385156c5SKaike Wan 			    cmp_psn(psn, e->lpsn) <= 0)
85385156c5SKaike Wan 				s = false;
86385156c5SKaike Wan 			break;
87385156c5SKaike Wan 		}
88385156c5SKaike Wan 	}
89385156c5SKaike Wan 	if (prev)
90385156c5SKaike Wan 		*prev = p;
91385156c5SKaike Wan 	if (prev_ack)
92385156c5SKaike Wan 		*prev_ack = i;
93385156c5SKaike Wan 	if (scheduled)
94385156c5SKaike Wan 		*scheduled = s;
95385156c5SKaike Wan 	return e;
96f48ad614SDennis Dalessandro }
97f48ad614SDennis Dalessandro 
98f48ad614SDennis Dalessandro /**
99f48ad614SDennis Dalessandro  * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
100f48ad614SDennis Dalessandro  * @dev: the device for this QP
101f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
102f48ad614SDennis Dalessandro  * @ohdr: a pointer to the IB header being constructed
103f48ad614SDennis Dalessandro  * @ps: the xmit packet state
104f48ad614SDennis Dalessandro  *
105f48ad614SDennis Dalessandro  * Return 1 if constructed; otherwise, return 0.
106f48ad614SDennis Dalessandro  * Note that we are in the responder's side of the QP context.
107f48ad614SDennis Dalessandro  * Note the QP s_lock must be held.
108f48ad614SDennis Dalessandro  */
109f48ad614SDennis Dalessandro static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
110261a4351SMike Marciniszyn 		       struct ib_other_headers *ohdr,
111f48ad614SDennis Dalessandro 		       struct hfi1_pkt_state *ps)
112f48ad614SDennis Dalessandro {
113f48ad614SDennis Dalessandro 	struct rvt_ack_entry *e;
114f48ad614SDennis Dalessandro 	u32 hwords;
11524b11923SKaike Wan 	u32 len = 0;
11624b11923SKaike Wan 	u32 bth0 = 0, bth2 = 0;
11744e43d91SMitko Haralanov 	u32 bth1 = qp->remote_qpn | (HFI1_CAP_IS_KSET(OPFN) << IB_BTHE_E_SHIFT);
118f48ad614SDennis Dalessandro 	int middle = 0;
119f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
120f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
12124b11923SKaike Wan 	bool last_pkt;
12224b11923SKaike Wan 	u32 delta;
1234f9264d1SKaike Wan 	u8 next = qp->s_tail_ack_queue;
124f48ad614SDennis Dalessandro 
1253ce5daa2SKaike Wan 	trace_hfi1_rsp_make_rc_ack(qp, 0);
12668e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
127f48ad614SDennis Dalessandro 	/* Don't send an ACK if we aren't supposed to. */
128f48ad614SDennis Dalessandro 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
129f48ad614SDennis Dalessandro 		goto bail;
130f48ad614SDennis Dalessandro 
1315b6cabb0SDon Hiatt 	if (priv->hdr_type == HFI1_PKT_TYPE_9B)
132f48ad614SDennis Dalessandro 		/* header size in 32-bit words LRH+BTH = (8+12)/4. */
133f48ad614SDennis Dalessandro 		hwords = 5;
1345b6cabb0SDon Hiatt 	else
1355b6cabb0SDon Hiatt 		/* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
1365b6cabb0SDon Hiatt 		hwords = 7;
137f48ad614SDennis Dalessandro 
138f48ad614SDennis Dalessandro 	switch (qp->s_ack_state) {
139f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
140f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_ONLY):
141f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
142f48ad614SDennis Dalessandro 		if (e->rdma_sge.mr) {
143f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
144f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
145f48ad614SDennis Dalessandro 		}
146f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
147f48ad614SDennis Dalessandro 	case OP(ATOMIC_ACKNOWLEDGE):
148f48ad614SDennis Dalessandro 		/*
149f48ad614SDennis Dalessandro 		 * We can increment the tail pointer now that the last
150f48ad614SDennis Dalessandro 		 * response has been sent instead of only being
151f48ad614SDennis Dalessandro 		 * constructed.
152f48ad614SDennis Dalessandro 		 */
1534f9264d1SKaike Wan 		if (++next > rvt_size_atomic(&dev->rdi))
1544f9264d1SKaike Wan 			next = 0;
1554f9264d1SKaike Wan 		/*
1564f9264d1SKaike Wan 		 * Only advance the s_acked_ack_queue pointer if there
1574f9264d1SKaike Wan 		 * have been no TID RDMA requests.
1584f9264d1SKaike Wan 		 */
1594f9264d1SKaike Wan 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
1604f9264d1SKaike Wan 		if (e->opcode != TID_OP(WRITE_REQ) &&
1614f9264d1SKaike Wan 		    qp->s_acked_ack_queue == qp->s_tail_ack_queue)
1624f9264d1SKaike Wan 			qp->s_acked_ack_queue = next;
1634f9264d1SKaike Wan 		qp->s_tail_ack_queue = next;
164f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
165f48ad614SDennis Dalessandro 	case OP(SEND_ONLY):
166f48ad614SDennis Dalessandro 	case OP(ACKNOWLEDGE):
167f48ad614SDennis Dalessandro 		/* Check for no next entry in the queue. */
168f48ad614SDennis Dalessandro 		if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
169f48ad614SDennis Dalessandro 			if (qp->s_flags & RVT_S_ACK_PENDING)
170f48ad614SDennis Dalessandro 				goto normal;
171f48ad614SDennis Dalessandro 			goto bail;
172f48ad614SDennis Dalessandro 		}
173f48ad614SDennis Dalessandro 
174f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
175f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST)) {
176f48ad614SDennis Dalessandro 			/*
177f48ad614SDennis Dalessandro 			 * If a RDMA read response is being resent and
178f48ad614SDennis Dalessandro 			 * we haven't seen the duplicate request yet,
179f48ad614SDennis Dalessandro 			 * then stop sending the remaining responses the
180f48ad614SDennis Dalessandro 			 * responder has seen until the requester re-sends it.
181f48ad614SDennis Dalessandro 			 */
182f48ad614SDennis Dalessandro 			len = e->rdma_sge.sge_length;
183f48ad614SDennis Dalessandro 			if (len && !e->rdma_sge.mr) {
1844f9264d1SKaike Wan 				if (qp->s_acked_ack_queue ==
1854f9264d1SKaike Wan 				    qp->s_tail_ack_queue)
1864f9264d1SKaike Wan 					qp->s_acked_ack_queue =
1874f9264d1SKaike Wan 						qp->r_head_ack_queue;
188f48ad614SDennis Dalessandro 				qp->s_tail_ack_queue = qp->r_head_ack_queue;
189f48ad614SDennis Dalessandro 				goto bail;
190f48ad614SDennis Dalessandro 			}
191f48ad614SDennis Dalessandro 			/* Copy SGE state in case we need to resend */
192f48ad614SDennis Dalessandro 			ps->s_txreq->mr = e->rdma_sge.mr;
193f48ad614SDennis Dalessandro 			if (ps->s_txreq->mr)
194f48ad614SDennis Dalessandro 				rvt_get_mr(ps->s_txreq->mr);
195f48ad614SDennis Dalessandro 			qp->s_ack_rdma_sge.sge = e->rdma_sge;
196f48ad614SDennis Dalessandro 			qp->s_ack_rdma_sge.num_sge = 1;
197b777f154SMitko Haralanov 			ps->s_txreq->ss = &qp->s_ack_rdma_sge;
198f48ad614SDennis Dalessandro 			if (len > pmtu) {
199f48ad614SDennis Dalessandro 				len = pmtu;
200f48ad614SDennis Dalessandro 				qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
201f48ad614SDennis Dalessandro 			} else {
202f48ad614SDennis Dalessandro 				qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
203f48ad614SDennis Dalessandro 				e->sent = 1;
204f48ad614SDennis Dalessandro 			}
205696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
206f48ad614SDennis Dalessandro 			hwords++;
207f48ad614SDennis Dalessandro 			qp->s_ack_rdma_psn = e->psn;
208f48ad614SDennis Dalessandro 			bth2 = mask_psn(qp->s_ack_rdma_psn++);
20924b11923SKaike Wan 		} else if (e->opcode == TID_OP(READ_REQ)) {
21024b11923SKaike Wan 			/*
21124b11923SKaike Wan 			 * If a TID RDMA read response is being resent and
21224b11923SKaike Wan 			 * we haven't seen the duplicate request yet,
21324b11923SKaike Wan 			 * then stop sending the remaining responses the
21424b11923SKaike Wan 			 * responder has seen until the requester re-sends it.
21524b11923SKaike Wan 			 */
21624b11923SKaike Wan 			len = e->rdma_sge.sge_length;
21724b11923SKaike Wan 			if (len && !e->rdma_sge.mr) {
2184f9264d1SKaike Wan 				if (qp->s_acked_ack_queue ==
2194f9264d1SKaike Wan 				    qp->s_tail_ack_queue)
2204f9264d1SKaike Wan 					qp->s_acked_ack_queue =
2214f9264d1SKaike Wan 						qp->r_head_ack_queue;
22224b11923SKaike Wan 				qp->s_tail_ack_queue = qp->r_head_ack_queue;
22324b11923SKaike Wan 				goto bail;
22424b11923SKaike Wan 			}
22524b11923SKaike Wan 			/* Copy SGE state in case we need to resend */
22624b11923SKaike Wan 			ps->s_txreq->mr = e->rdma_sge.mr;
22724b11923SKaike Wan 			if (ps->s_txreq->mr)
22824b11923SKaike Wan 				rvt_get_mr(ps->s_txreq->mr);
22924b11923SKaike Wan 			qp->s_ack_rdma_sge.sge = e->rdma_sge;
23024b11923SKaike Wan 			qp->s_ack_rdma_sge.num_sge = 1;
23124b11923SKaike Wan 			qp->s_ack_state = TID_OP(READ_RESP);
23224b11923SKaike Wan 			goto read_resp;
233f48ad614SDennis Dalessandro 		} else {
234f48ad614SDennis Dalessandro 			/* COMPARE_SWAP or FETCH_ADD */
235b777f154SMitko Haralanov 			ps->s_txreq->ss = NULL;
236f48ad614SDennis Dalessandro 			len = 0;
237f48ad614SDennis Dalessandro 			qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
238696513e8SBrian Welty 			ohdr->u.at.aeth = rvt_compute_aeth(qp);
239261a4351SMike Marciniszyn 			ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
240f48ad614SDennis Dalessandro 			hwords += sizeof(ohdr->u.at) / sizeof(u32);
241f48ad614SDennis Dalessandro 			bth2 = mask_psn(e->psn);
242f48ad614SDennis Dalessandro 			e->sent = 1;
243f48ad614SDennis Dalessandro 		}
244f48ad614SDennis Dalessandro 		bth0 = qp->s_ack_state << 24;
245f48ad614SDennis Dalessandro 		break;
246f48ad614SDennis Dalessandro 
247f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
248f48ad614SDennis Dalessandro 		qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
249f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
250f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
251b777f154SMitko Haralanov 		ps->s_txreq->ss = &qp->s_ack_rdma_sge;
252f48ad614SDennis Dalessandro 		ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
253f48ad614SDennis Dalessandro 		if (ps->s_txreq->mr)
254f48ad614SDennis Dalessandro 			rvt_get_mr(ps->s_txreq->mr);
255f48ad614SDennis Dalessandro 		len = qp->s_ack_rdma_sge.sge.sge_length;
256f48ad614SDennis Dalessandro 		if (len > pmtu) {
257f48ad614SDennis Dalessandro 			len = pmtu;
258f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
259f48ad614SDennis Dalessandro 		} else {
260696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
261f48ad614SDennis Dalessandro 			hwords++;
262f48ad614SDennis Dalessandro 			qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
263f48ad614SDennis Dalessandro 			e = &qp->s_ack_queue[qp->s_tail_ack_queue];
264f48ad614SDennis Dalessandro 			e->sent = 1;
265f48ad614SDennis Dalessandro 		}
266f48ad614SDennis Dalessandro 		bth0 = qp->s_ack_state << 24;
267f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_ack_rdma_psn++);
268f48ad614SDennis Dalessandro 		break;
269f48ad614SDennis Dalessandro 
27024b11923SKaike Wan 	case TID_OP(READ_RESP):
27124b11923SKaike Wan read_resp:
27224b11923SKaike Wan 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
27324b11923SKaike Wan 		ps->s_txreq->ss = &qp->s_ack_rdma_sge;
27424b11923SKaike Wan 		delta = hfi1_build_tid_rdma_read_resp(qp, e, ohdr, &bth0,
27524b11923SKaike Wan 						      &bth1, &bth2, &len,
27624b11923SKaike Wan 						      &last_pkt);
27724b11923SKaike Wan 		if (delta == 0)
27824b11923SKaike Wan 			goto error_qp;
27924b11923SKaike Wan 		hwords += delta;
28024b11923SKaike Wan 		if (last_pkt) {
28124b11923SKaike Wan 			e->sent = 1;
28224b11923SKaike Wan 			/*
28324b11923SKaike Wan 			 * Increment qp->s_tail_ack_queue through s_ack_state
28424b11923SKaike Wan 			 * transition.
28524b11923SKaike Wan 			 */
28624b11923SKaike Wan 			qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
28724b11923SKaike Wan 		}
28824b11923SKaike Wan 		break;
28924b11923SKaike Wan 	case TID_OP(READ_REQ):
29024b11923SKaike Wan 		goto bail;
29124b11923SKaike Wan 
292f48ad614SDennis Dalessandro 	default:
293f48ad614SDennis Dalessandro normal:
294f48ad614SDennis Dalessandro 		/*
295f48ad614SDennis Dalessandro 		 * Send a regular ACK.
296f48ad614SDennis Dalessandro 		 * Set the s_ack_state so we wait until after sending
297f48ad614SDennis Dalessandro 		 * the ACK before setting s_ack_state to ACKNOWLEDGE
298f48ad614SDennis Dalessandro 		 * (see above).
299f48ad614SDennis Dalessandro 		 */
300f48ad614SDennis Dalessandro 		qp->s_ack_state = OP(SEND_ONLY);
301f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_ACK_PENDING;
302b777f154SMitko Haralanov 		ps->s_txreq->ss = NULL;
303f48ad614SDennis Dalessandro 		if (qp->s_nak_state)
304f48ad614SDennis Dalessandro 			ohdr->u.aeth =
305832666c1SDon Hiatt 				cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
306f48ad614SDennis Dalessandro 					    (qp->s_nak_state <<
307832666c1SDon Hiatt 					     IB_AETH_CREDIT_SHIFT));
308f48ad614SDennis Dalessandro 		else
309696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
310f48ad614SDennis Dalessandro 		hwords++;
311f48ad614SDennis Dalessandro 		len = 0;
312f48ad614SDennis Dalessandro 		bth0 = OP(ACKNOWLEDGE) << 24;
313f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_ack_psn);
314f48ad614SDennis Dalessandro 	}
315f48ad614SDennis Dalessandro 	qp->s_rdma_ack_cnt++;
316f48ad614SDennis Dalessandro 	ps->s_txreq->sde = priv->s_sde;
317e922ae06SDon Hiatt 	ps->s_txreq->s_cur_size = len;
3189636258fSMitko Haralanov 	ps->s_txreq->hdr_dwords = hwords;
31944e43d91SMitko Haralanov 	hfi1_make_ruc_header(qp, ohdr, bth0, bth1, bth2, middle, ps);
320f48ad614SDennis Dalessandro 	return 1;
32124b11923SKaike Wan error_qp:
32224b11923SKaike Wan 	spin_unlock_irqrestore(&qp->s_lock, ps->flags);
32324b11923SKaike Wan 	spin_lock_irqsave(&qp->r_lock, ps->flags);
32424b11923SKaike Wan 	spin_lock(&qp->s_lock);
32524b11923SKaike Wan 	rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
32624b11923SKaike Wan 	spin_unlock(&qp->s_lock);
32724b11923SKaike Wan 	spin_unlock_irqrestore(&qp->r_lock, ps->flags);
32824b11923SKaike Wan 	spin_lock_irqsave(&qp->s_lock, ps->flags);
329f48ad614SDennis Dalessandro bail:
330f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
331f48ad614SDennis Dalessandro 	/*
332f48ad614SDennis Dalessandro 	 * Ensure s_rdma_ack_cnt changes are committed prior to resetting
333f48ad614SDennis Dalessandro 	 * RVT_S_RESP_PENDING
334f48ad614SDennis Dalessandro 	 */
335f48ad614SDennis Dalessandro 	smp_wmb();
336f48ad614SDennis Dalessandro 	qp->s_flags &= ~(RVT_S_RESP_PENDING
337f48ad614SDennis Dalessandro 				| RVT_S_ACK_PENDING
3382e2ba09eSMike Marciniszyn 				| HFI1_S_AHG_VALID);
339f48ad614SDennis Dalessandro 	return 0;
340f48ad614SDennis Dalessandro }
341f48ad614SDennis Dalessandro 
342f48ad614SDennis Dalessandro /**
343f48ad614SDennis Dalessandro  * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
344f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
345f48ad614SDennis Dalessandro  *
346f48ad614SDennis Dalessandro  * Assumes s_lock is held.
347f48ad614SDennis Dalessandro  *
348f48ad614SDennis Dalessandro  * Return 1 if constructed; otherwise, return 0.
349f48ad614SDennis Dalessandro  */
350f48ad614SDennis Dalessandro int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
351f48ad614SDennis Dalessandro {
352f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
353f48ad614SDennis Dalessandro 	struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
354261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
35524b11923SKaike Wan 	struct rvt_sge_state *ss = NULL;
356f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
35724b11923SKaike Wan 	struct hfi1_swqe_priv *wpriv;
35824b11923SKaike Wan 	struct tid_rdma_request *req = NULL;
35924b11923SKaike Wan 	/* header size in 32-bit words LRH+BTH = (8+12)/4. */
36024b11923SKaike Wan 	u32 hwords = 5;
36124b11923SKaike Wan 	u32 len = 0;
36224b11923SKaike Wan 	u32 bth0 = 0, bth2 = 0;
36344e43d91SMitko Haralanov 	u32 bth1 = qp->remote_qpn | (HFI1_CAP_IS_KSET(OPFN) << IB_BTHE_E_SHIFT);
364f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
365f48ad614SDennis Dalessandro 	char newreq;
366f48ad614SDennis Dalessandro 	int middle = 0;
367f48ad614SDennis Dalessandro 	int delta;
36824b11923SKaike Wan 	struct tid_rdma_flow *flow = NULL;
369f48ad614SDennis Dalessandro 
3703ce5daa2SKaike Wan 	trace_hfi1_sender_make_rc_req(qp);
37168e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
372f48ad614SDennis Dalessandro 	ps->s_txreq = get_txreq(ps->dev, qp);
373b697d7d8SMichael J. Ruhl 	if (!ps->s_txreq)
374f48ad614SDennis Dalessandro 		goto bail_no_tx;
375f48ad614SDennis Dalessandro 
3765b6cabb0SDon Hiatt 	if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
3775b6cabb0SDon Hiatt 		/* header size in 32-bit words LRH+BTH = (8+12)/4. */
3785b6cabb0SDon Hiatt 		hwords = 5;
379d8966fcdSDasaratharaman Chandramouli 		if (rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)
38030e07416SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.ibh.u.l.oth;
3815b6cabb0SDon Hiatt 		else
3825b6cabb0SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.ibh.u.oth;
3835b6cabb0SDon Hiatt 	} else {
3845b6cabb0SDon Hiatt 		/* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
3855b6cabb0SDon Hiatt 		hwords = 7;
3865b6cabb0SDon Hiatt 		if ((rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
3875b6cabb0SDon Hiatt 		    (hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))))
3885b6cabb0SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.opah.u.l.oth;
3895b6cabb0SDon Hiatt 		else
3905b6cabb0SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.opah.u.oth;
3915b6cabb0SDon Hiatt 	}
392f48ad614SDennis Dalessandro 
393f48ad614SDennis Dalessandro 	/* Sending responses has higher priority over sending requests. */
394f48ad614SDennis Dalessandro 	if ((qp->s_flags & RVT_S_RESP_PENDING) &&
395f48ad614SDennis Dalessandro 	    make_rc_ack(dev, qp, ohdr, ps))
396f48ad614SDennis Dalessandro 		return 1;
397f48ad614SDennis Dalessandro 
398f48ad614SDennis Dalessandro 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
399f48ad614SDennis Dalessandro 		if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
400f48ad614SDennis Dalessandro 			goto bail;
401f48ad614SDennis Dalessandro 		/* We are in the error state, flush the work request. */
402eb04ff09SMike Marciniszyn 		if (qp->s_last == READ_ONCE(qp->s_head))
403f48ad614SDennis Dalessandro 			goto bail;
404f48ad614SDennis Dalessandro 		/* If DMAs are in progress, we can't flush immediately. */
405f48ad614SDennis Dalessandro 		if (iowait_sdma_pending(&priv->s_iowait)) {
406f48ad614SDennis Dalessandro 			qp->s_flags |= RVT_S_WAIT_DMA;
407f48ad614SDennis Dalessandro 			goto bail;
408f48ad614SDennis Dalessandro 		}
409f48ad614SDennis Dalessandro 		clear_ahg(qp);
410f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_last);
41124b11923SKaike Wan 		hfi1_trdma_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
412f48ad614SDennis Dalessandro 					 IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
413f48ad614SDennis Dalessandro 		/* will get called again */
414f48ad614SDennis Dalessandro 		goto done_free_tx;
415f48ad614SDennis Dalessandro 	}
416f48ad614SDennis Dalessandro 
417f48ad614SDennis Dalessandro 	if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
418f48ad614SDennis Dalessandro 		goto bail;
419f48ad614SDennis Dalessandro 
420f48ad614SDennis Dalessandro 	if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
421f48ad614SDennis Dalessandro 		if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
422f48ad614SDennis Dalessandro 			qp->s_flags |= RVT_S_WAIT_PSN;
423f48ad614SDennis Dalessandro 			goto bail;
424f48ad614SDennis Dalessandro 		}
425f48ad614SDennis Dalessandro 		qp->s_sending_psn = qp->s_psn;
426f48ad614SDennis Dalessandro 		qp->s_sending_hpsn = qp->s_psn - 1;
427f48ad614SDennis Dalessandro 	}
428f48ad614SDennis Dalessandro 
429f48ad614SDennis Dalessandro 	/* Send a request. */
430f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
43124b11923SKaike Wan check_s_state:
432f48ad614SDennis Dalessandro 	switch (qp->s_state) {
433f48ad614SDennis Dalessandro 	default:
434f48ad614SDennis Dalessandro 		if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
435f48ad614SDennis Dalessandro 			goto bail;
436f48ad614SDennis Dalessandro 		/*
437f48ad614SDennis Dalessandro 		 * Resend an old request or start a new one.
438f48ad614SDennis Dalessandro 		 *
439f48ad614SDennis Dalessandro 		 * We keep track of the current SWQE so that
440f48ad614SDennis Dalessandro 		 * we don't reset the "furthest progress" state
441f48ad614SDennis Dalessandro 		 * if we need to back up.
442f48ad614SDennis Dalessandro 		 */
443f48ad614SDennis Dalessandro 		newreq = 0;
444f48ad614SDennis Dalessandro 		if (qp->s_cur == qp->s_tail) {
445f48ad614SDennis Dalessandro 			/* Check if send work queue is empty. */
446eb04ff09SMike Marciniszyn 			if (qp->s_tail == READ_ONCE(qp->s_head)) {
447f48ad614SDennis Dalessandro 				clear_ahg(qp);
448f48ad614SDennis Dalessandro 				goto bail;
449f48ad614SDennis Dalessandro 			}
450f48ad614SDennis Dalessandro 			/*
451f48ad614SDennis Dalessandro 			 * If a fence is requested, wait for previous
452f48ad614SDennis Dalessandro 			 * RDMA read and atomic operations to finish.
45324b11923SKaike Wan 			 * However, there is no need to guard against
45424b11923SKaike Wan 			 * TID RDMA READ after TID RDMA READ.
455f48ad614SDennis Dalessandro 			 */
456f48ad614SDennis Dalessandro 			if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
45724b11923SKaike Wan 			    qp->s_num_rd_atomic &&
45824b11923SKaike Wan 			    (wqe->wr.opcode != IB_WR_TID_RDMA_READ ||
45924b11923SKaike Wan 			     priv->pending_tid_r_segs < qp->s_num_rd_atomic)) {
460f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_FENCE;
461f48ad614SDennis Dalessandro 				goto bail;
462f48ad614SDennis Dalessandro 			}
4630db3dfa0SJianxin Xiong 			/*
4640db3dfa0SJianxin Xiong 			 * Local operations are processed immediately
4650db3dfa0SJianxin Xiong 			 * after all prior requests have completed
4660db3dfa0SJianxin Xiong 			 */
4670db3dfa0SJianxin Xiong 			if (wqe->wr.opcode == IB_WR_REG_MR ||
4680db3dfa0SJianxin Xiong 			    wqe->wr.opcode == IB_WR_LOCAL_INV) {
469d9b13c20SJianxin Xiong 				int local_ops = 0;
470d9b13c20SJianxin Xiong 				int err = 0;
471d9b13c20SJianxin Xiong 
4720db3dfa0SJianxin Xiong 				if (qp->s_last != qp->s_cur)
4730db3dfa0SJianxin Xiong 					goto bail;
4740db3dfa0SJianxin Xiong 				if (++qp->s_cur == qp->s_size)
4750db3dfa0SJianxin Xiong 					qp->s_cur = 0;
4760db3dfa0SJianxin Xiong 				if (++qp->s_tail == qp->s_size)
4770db3dfa0SJianxin Xiong 					qp->s_tail = 0;
478d9b13c20SJianxin Xiong 				if (!(wqe->wr.send_flags &
479d9b13c20SJianxin Xiong 				      RVT_SEND_COMPLETION_ONLY)) {
4800db3dfa0SJianxin Xiong 					err = rvt_invalidate_rkey(
4810db3dfa0SJianxin Xiong 						qp,
4820db3dfa0SJianxin Xiong 						wqe->wr.ex.invalidate_rkey);
483d9b13c20SJianxin Xiong 					local_ops = 1;
484d9b13c20SJianxin Xiong 				}
485116aa033SVenkata Sandeep Dhanalakota 				rvt_send_complete(qp, wqe,
4860db3dfa0SJianxin Xiong 						  err ? IB_WC_LOC_PROT_ERR
4870db3dfa0SJianxin Xiong 						      : IB_WC_SUCCESS);
488d9b13c20SJianxin Xiong 				if (local_ops)
4890db3dfa0SJianxin Xiong 					atomic_dec(&qp->local_ops_pending);
4900db3dfa0SJianxin Xiong 				goto done_free_tx;
4910db3dfa0SJianxin Xiong 			}
4920db3dfa0SJianxin Xiong 
493f48ad614SDennis Dalessandro 			newreq = 1;
494f48ad614SDennis Dalessandro 			qp->s_psn = wqe->psn;
495f48ad614SDennis Dalessandro 		}
496f48ad614SDennis Dalessandro 		/*
497f48ad614SDennis Dalessandro 		 * Note that we have to be careful not to modify the
498f48ad614SDennis Dalessandro 		 * original work request since we may need to resend
499f48ad614SDennis Dalessandro 		 * it.
500f48ad614SDennis Dalessandro 		 */
501f48ad614SDennis Dalessandro 		len = wqe->length;
502f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
503f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn);
504a0b34f75SKaike Wan 
505a0b34f75SKaike Wan 		/*
506a0b34f75SKaike Wan 		 * Interlock between various IB requests and TID RDMA
507a0b34f75SKaike Wan 		 * if necessary.
508a0b34f75SKaike Wan 		 */
509a0b34f75SKaike Wan 		if ((priv->s_flags & HFI1_S_TID_WAIT_INTERLCK) ||
510a0b34f75SKaike Wan 		    hfi1_tid_rdma_wqe_interlock(qp, wqe))
511a0b34f75SKaike Wan 			goto bail;
512a0b34f75SKaike Wan 
513f48ad614SDennis Dalessandro 		switch (wqe->wr.opcode) {
514f48ad614SDennis Dalessandro 		case IB_WR_SEND:
515f48ad614SDennis Dalessandro 		case IB_WR_SEND_WITH_IMM:
5160db3dfa0SJianxin Xiong 		case IB_WR_SEND_WITH_INV:
517f48ad614SDennis Dalessandro 			/* If no credit, return. */
518f48ad614SDennis Dalessandro 			if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
519696513e8SBrian Welty 			    rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
520f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
521f48ad614SDennis Dalessandro 				goto bail;
522f48ad614SDennis Dalessandro 			}
523f48ad614SDennis Dalessandro 			if (len > pmtu) {
524f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_FIRST);
525f48ad614SDennis Dalessandro 				len = pmtu;
526f48ad614SDennis Dalessandro 				break;
527f48ad614SDennis Dalessandro 			}
528f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_SEND) {
529f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_ONLY);
5300db3dfa0SJianxin Xiong 			} else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
531f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
532f48ad614SDennis Dalessandro 				/* Immediate data comes after the BTH */
533f48ad614SDennis Dalessandro 				ohdr->u.imm_data = wqe->wr.ex.imm_data;
534f48ad614SDennis Dalessandro 				hwords += 1;
5350db3dfa0SJianxin Xiong 			} else {
5360db3dfa0SJianxin Xiong 				qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
5370db3dfa0SJianxin Xiong 				/* Invalidate rkey comes after the BTH */
5380db3dfa0SJianxin Xiong 				ohdr->u.ieth = cpu_to_be32(
5390db3dfa0SJianxin Xiong 						wqe->wr.ex.invalidate_rkey);
5400db3dfa0SJianxin Xiong 				hwords += 1;
541f48ad614SDennis Dalessandro 			}
542f48ad614SDennis Dalessandro 			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
543f48ad614SDennis Dalessandro 				bth0 |= IB_BTH_SOLICITED;
544f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
545f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
546f48ad614SDennis Dalessandro 				qp->s_cur = 0;
547f48ad614SDennis Dalessandro 			break;
548f48ad614SDennis Dalessandro 
549f48ad614SDennis Dalessandro 		case IB_WR_RDMA_WRITE:
550f48ad614SDennis Dalessandro 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
551f48ad614SDennis Dalessandro 				qp->s_lsn++;
5525b0ef650SMike Marciniszyn 			goto no_flow_control;
553f48ad614SDennis Dalessandro 		case IB_WR_RDMA_WRITE_WITH_IMM:
554f48ad614SDennis Dalessandro 			/* If no credit, return. */
555f48ad614SDennis Dalessandro 			if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
556696513e8SBrian Welty 			    rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
557f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
558f48ad614SDennis Dalessandro 				goto bail;
559f48ad614SDennis Dalessandro 			}
5605b0ef650SMike Marciniszyn no_flow_control:
561261a4351SMike Marciniszyn 			put_ib_reth_vaddr(
562261a4351SMike Marciniszyn 				wqe->rdma_wr.remote_addr,
563261a4351SMike Marciniszyn 				&ohdr->u.rc.reth);
564f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.rkey =
565f48ad614SDennis Dalessandro 				cpu_to_be32(wqe->rdma_wr.rkey);
566f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.length = cpu_to_be32(len);
567f48ad614SDennis Dalessandro 			hwords += sizeof(struct ib_reth) / sizeof(u32);
568f48ad614SDennis Dalessandro 			if (len > pmtu) {
569f48ad614SDennis Dalessandro 				qp->s_state = OP(RDMA_WRITE_FIRST);
570f48ad614SDennis Dalessandro 				len = pmtu;
571f48ad614SDennis Dalessandro 				break;
572f48ad614SDennis Dalessandro 			}
573f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
574f48ad614SDennis Dalessandro 				qp->s_state = OP(RDMA_WRITE_ONLY);
575f48ad614SDennis Dalessandro 			} else {
576f48ad614SDennis Dalessandro 				qp->s_state =
577f48ad614SDennis Dalessandro 					OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
578f48ad614SDennis Dalessandro 				/* Immediate data comes after RETH */
579f48ad614SDennis Dalessandro 				ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
580f48ad614SDennis Dalessandro 				hwords += 1;
581f48ad614SDennis Dalessandro 				if (wqe->wr.send_flags & IB_SEND_SOLICITED)
582f48ad614SDennis Dalessandro 					bth0 |= IB_BTH_SOLICITED;
583f48ad614SDennis Dalessandro 			}
584f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
585f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
586f48ad614SDennis Dalessandro 				qp->s_cur = 0;
587f48ad614SDennis Dalessandro 			break;
588f48ad614SDennis Dalessandro 
589f48ad614SDennis Dalessandro 		case IB_WR_RDMA_READ:
590f48ad614SDennis Dalessandro 			/*
591f48ad614SDennis Dalessandro 			 * Don't allow more operations to be started
592f48ad614SDennis Dalessandro 			 * than the QP limits allow.
593f48ad614SDennis Dalessandro 			 */
594f48ad614SDennis Dalessandro 			if (qp->s_num_rd_atomic >=
595f48ad614SDennis Dalessandro 			    qp->s_max_rd_atomic) {
596f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_RDMAR;
597f48ad614SDennis Dalessandro 				goto bail;
598f48ad614SDennis Dalessandro 			}
599f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic++;
600b126078eSKaike Wan 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
601f48ad614SDennis Dalessandro 				qp->s_lsn++;
602261a4351SMike Marciniszyn 			put_ib_reth_vaddr(
603261a4351SMike Marciniszyn 				wqe->rdma_wr.remote_addr,
604261a4351SMike Marciniszyn 				&ohdr->u.rc.reth);
605f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.rkey =
606f48ad614SDennis Dalessandro 				cpu_to_be32(wqe->rdma_wr.rkey);
607f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.length = cpu_to_be32(len);
608f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_READ_REQUEST);
609f48ad614SDennis Dalessandro 			hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
610f48ad614SDennis Dalessandro 			ss = NULL;
611f48ad614SDennis Dalessandro 			len = 0;
612f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
613f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
614f48ad614SDennis Dalessandro 				qp->s_cur = 0;
615f48ad614SDennis Dalessandro 			break;
616f48ad614SDennis Dalessandro 
61724b11923SKaike Wan 		case IB_WR_TID_RDMA_READ:
6183ce5daa2SKaike Wan 			trace_hfi1_tid_read_sender_make_req(qp, newreq);
61924b11923SKaike Wan 			wpriv = wqe->priv;
62024b11923SKaike Wan 			req = wqe_to_tid_req(wqe);
6213ce5daa2SKaike Wan 			trace_hfi1_tid_req_make_req_read(qp, newreq,
6223ce5daa2SKaike Wan 							 wqe->wr.opcode,
6233ce5daa2SKaike Wan 							 wqe->psn, wqe->lpsn,
6243ce5daa2SKaike Wan 							 req);
62524b11923SKaike Wan 			delta = cmp_psn(qp->s_psn, wqe->psn);
62624b11923SKaike Wan 
62724b11923SKaike Wan 			/*
62824b11923SKaike Wan 			 * Don't allow more operations to be started
62924b11923SKaike Wan 			 * than the QP limits allow. We could get here under
63024b11923SKaike Wan 			 * three conditions; (1) It's a new request; (2) We are
63124b11923SKaike Wan 			 * sending the second or later segment of a request,
63224b11923SKaike Wan 			 * but the qp->s_state is set to OP(RDMA_READ_REQUEST)
63324b11923SKaike Wan 			 * when the last segment of a previous request is
63424b11923SKaike Wan 			 * received just before this; (3) We are re-sending a
63524b11923SKaike Wan 			 * request.
63624b11923SKaike Wan 			 */
63724b11923SKaike Wan 			if (qp->s_num_rd_atomic >= qp->s_max_rd_atomic) {
63824b11923SKaike Wan 				qp->s_flags |= RVT_S_WAIT_RDMAR;
63924b11923SKaike Wan 				goto bail;
64024b11923SKaike Wan 			}
64124b11923SKaike Wan 			if (newreq) {
64224b11923SKaike Wan 				struct tid_rdma_flow *flow =
64324b11923SKaike Wan 					&req->flows[req->setup_head];
64424b11923SKaike Wan 
64524b11923SKaike Wan 				/*
64624b11923SKaike Wan 				 * Set up s_sge as it is needed for TID
64724b11923SKaike Wan 				 * allocation. However, if the pages have been
64824b11923SKaike Wan 				 * walked and mapped, skip it. An earlier try
64924b11923SKaike Wan 				 * has failed to allocate the TID entries.
65024b11923SKaike Wan 				 */
65124b11923SKaike Wan 				if (!flow->npagesets) {
65224b11923SKaike Wan 					qp->s_sge.sge = wqe->sg_list[0];
65324b11923SKaike Wan 					qp->s_sge.sg_list = wqe->sg_list + 1;
65424b11923SKaike Wan 					qp->s_sge.num_sge = wqe->wr.num_sge;
65524b11923SKaike Wan 					qp->s_sge.total_len = wqe->length;
65624b11923SKaike Wan 					qp->s_len = wqe->length;
65724b11923SKaike Wan 					req->isge = 0;
65824b11923SKaike Wan 					req->clear_tail = req->setup_head;
65924b11923SKaike Wan 					req->flow_idx = req->setup_head;
66024b11923SKaike Wan 					req->state = TID_REQUEST_ACTIVE;
66124b11923SKaike Wan 				}
66224b11923SKaike Wan 			} else if (delta == 0) {
66324b11923SKaike Wan 				/* Re-send a request */
66424b11923SKaike Wan 				req->cur_seg = 0;
66524b11923SKaike Wan 				req->comp_seg = 0;
66624b11923SKaike Wan 				req->ack_pending = 0;
66724b11923SKaike Wan 				req->flow_idx = req->clear_tail;
66824b11923SKaike Wan 				req->state = TID_REQUEST_RESEND;
66924b11923SKaike Wan 			}
67024b11923SKaike Wan 			req->s_next_psn = qp->s_psn;
67124b11923SKaike Wan 			/* Read one segment at a time */
67224b11923SKaike Wan 			len = min_t(u32, req->seg_len,
67324b11923SKaike Wan 				    wqe->length - req->seg_len * req->cur_seg);
67424b11923SKaike Wan 			delta = hfi1_build_tid_rdma_read_req(qp, wqe, ohdr,
67524b11923SKaike Wan 							     &bth1, &bth2,
67624b11923SKaike Wan 							     &len);
67724b11923SKaike Wan 			if (delta <= 0) {
67824b11923SKaike Wan 				/* Wait for TID space */
67924b11923SKaike Wan 				goto bail;
68024b11923SKaike Wan 			}
68124b11923SKaike Wan 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
68224b11923SKaike Wan 				qp->s_lsn++;
68324b11923SKaike Wan 			hwords += delta;
68424b11923SKaike Wan 			ss = &wpriv->ss;
68524b11923SKaike Wan 			/* Check if this is the last segment */
68624b11923SKaike Wan 			if (req->cur_seg >= req->total_segs &&
68724b11923SKaike Wan 			    ++qp->s_cur == qp->s_size)
68824b11923SKaike Wan 				qp->s_cur = 0;
68924b11923SKaike Wan 			break;
69024b11923SKaike Wan 
691f48ad614SDennis Dalessandro 		case IB_WR_ATOMIC_CMP_AND_SWP:
692f48ad614SDennis Dalessandro 		case IB_WR_ATOMIC_FETCH_AND_ADD:
693f48ad614SDennis Dalessandro 			/*
694f48ad614SDennis Dalessandro 			 * Don't allow more operations to be started
695f48ad614SDennis Dalessandro 			 * than the QP limits allow.
696f48ad614SDennis Dalessandro 			 */
697f48ad614SDennis Dalessandro 			if (qp->s_num_rd_atomic >=
698f48ad614SDennis Dalessandro 			    qp->s_max_rd_atomic) {
699f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_RDMAR;
700f48ad614SDennis Dalessandro 				goto bail;
701f48ad614SDennis Dalessandro 			}
702f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic++;
70348a615dcSKaike Wan 
70448a615dcSKaike Wan 			/* FALLTHROUGH */
70548a615dcSKaike Wan 		case IB_WR_OPFN:
70648a615dcSKaike Wan 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
70748a615dcSKaike Wan 				qp->s_lsn++;
70848a615dcSKaike Wan 			if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
70948a615dcSKaike Wan 			    wqe->wr.opcode == IB_WR_OPFN) {
710f48ad614SDennis Dalessandro 				qp->s_state = OP(COMPARE_SWAP);
711261a4351SMike Marciniszyn 				put_ib_ateth_swap(wqe->atomic_wr.swap,
712261a4351SMike Marciniszyn 						  &ohdr->u.atomic_eth);
713261a4351SMike Marciniszyn 				put_ib_ateth_compare(wqe->atomic_wr.compare_add,
714261a4351SMike Marciniszyn 						     &ohdr->u.atomic_eth);
715f48ad614SDennis Dalessandro 			} else {
716f48ad614SDennis Dalessandro 				qp->s_state = OP(FETCH_ADD);
717261a4351SMike Marciniszyn 				put_ib_ateth_swap(wqe->atomic_wr.compare_add,
718261a4351SMike Marciniszyn 						  &ohdr->u.atomic_eth);
719261a4351SMike Marciniszyn 				put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
720f48ad614SDennis Dalessandro 			}
721261a4351SMike Marciniszyn 			put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
722261a4351SMike Marciniszyn 					   &ohdr->u.atomic_eth);
723f48ad614SDennis Dalessandro 			ohdr->u.atomic_eth.rkey = cpu_to_be32(
724f48ad614SDennis Dalessandro 				wqe->atomic_wr.rkey);
725f48ad614SDennis Dalessandro 			hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
726f48ad614SDennis Dalessandro 			ss = NULL;
727f48ad614SDennis Dalessandro 			len = 0;
728f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
729f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
730f48ad614SDennis Dalessandro 				qp->s_cur = 0;
731f48ad614SDennis Dalessandro 			break;
732f48ad614SDennis Dalessandro 
733f48ad614SDennis Dalessandro 		default:
734f48ad614SDennis Dalessandro 			goto bail;
735f48ad614SDennis Dalessandro 		}
73624b11923SKaike Wan 		if (wqe->wr.opcode != IB_WR_TID_RDMA_READ) {
737f48ad614SDennis Dalessandro 			qp->s_sge.sge = wqe->sg_list[0];
738f48ad614SDennis Dalessandro 			qp->s_sge.sg_list = wqe->sg_list + 1;
739f48ad614SDennis Dalessandro 			qp->s_sge.num_sge = wqe->wr.num_sge;
740f48ad614SDennis Dalessandro 			qp->s_sge.total_len = wqe->length;
741f48ad614SDennis Dalessandro 			qp->s_len = wqe->length;
74224b11923SKaike Wan 		}
743f48ad614SDennis Dalessandro 		if (newreq) {
744f48ad614SDennis Dalessandro 			qp->s_tail++;
745f48ad614SDennis Dalessandro 			if (qp->s_tail >= qp->s_size)
746f48ad614SDennis Dalessandro 				qp->s_tail = 0;
747f48ad614SDennis Dalessandro 		}
748f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ)
749f48ad614SDennis Dalessandro 			qp->s_psn = wqe->lpsn + 1;
75024b11923SKaike Wan 		else if (wqe->wr.opcode == IB_WR_TID_RDMA_READ)
75124b11923SKaike Wan 			qp->s_psn = req->s_next_psn;
752f48ad614SDennis Dalessandro 		else
753f48ad614SDennis Dalessandro 			qp->s_psn++;
754f48ad614SDennis Dalessandro 		break;
755f48ad614SDennis Dalessandro 
756f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
757f48ad614SDennis Dalessandro 		/*
758f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
759f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
760f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
761f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
762f48ad614SDennis Dalessandro 		 * thread to indicate a SEND needs to be restarted from an
763f48ad614SDennis Dalessandro 		 * earlier PSN without interfering with the sending thread.
764f48ad614SDennis Dalessandro 		 * See restart_rc().
765f48ad614SDennis Dalessandro 		 */
766f48ad614SDennis Dalessandro 		qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
767f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
768f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
769f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_MIDDLE);
770f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
771f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
772f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn++);
773f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
774f48ad614SDennis Dalessandro 		len = qp->s_len;
775f48ad614SDennis Dalessandro 		if (len > pmtu) {
776f48ad614SDennis Dalessandro 			len = pmtu;
777f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
778f48ad614SDennis Dalessandro 			break;
779f48ad614SDennis Dalessandro 		}
780f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_SEND) {
781f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
7820db3dfa0SJianxin Xiong 		} else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
783f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
784f48ad614SDennis Dalessandro 			/* Immediate data comes after the BTH */
785f48ad614SDennis Dalessandro 			ohdr->u.imm_data = wqe->wr.ex.imm_data;
786f48ad614SDennis Dalessandro 			hwords += 1;
7870db3dfa0SJianxin Xiong 		} else {
7880db3dfa0SJianxin Xiong 			qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
7890db3dfa0SJianxin Xiong 			/* invalidate data comes after the BTH */
7900db3dfa0SJianxin Xiong 			ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
7910db3dfa0SJianxin Xiong 			hwords += 1;
792f48ad614SDennis Dalessandro 		}
793f48ad614SDennis Dalessandro 		if (wqe->wr.send_flags & IB_SEND_SOLICITED)
794f48ad614SDennis Dalessandro 			bth0 |= IB_BTH_SOLICITED;
795f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
796f48ad614SDennis Dalessandro 		qp->s_cur++;
797f48ad614SDennis Dalessandro 		if (qp->s_cur >= qp->s_size)
798f48ad614SDennis Dalessandro 			qp->s_cur = 0;
799f48ad614SDennis Dalessandro 		break;
800f48ad614SDennis Dalessandro 
801f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
802f48ad614SDennis Dalessandro 		/*
803f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
804f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
805f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
806f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_LAST is used by the ACK processing
807f48ad614SDennis Dalessandro 		 * thread to indicate a RDMA write needs to be restarted from
808f48ad614SDennis Dalessandro 		 * an earlier PSN without interfering with the sending thread.
809f48ad614SDennis Dalessandro 		 * See restart_rc().
810f48ad614SDennis Dalessandro 		 */
811f48ad614SDennis Dalessandro 		qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
812f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
813f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
814f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_WRITE_MIDDLE);
815f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
816f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
817f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn++);
818f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
819f48ad614SDennis Dalessandro 		len = qp->s_len;
820f48ad614SDennis Dalessandro 		if (len > pmtu) {
821f48ad614SDennis Dalessandro 			len = pmtu;
822f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
823f48ad614SDennis Dalessandro 			break;
824f48ad614SDennis Dalessandro 		}
825f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
826f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_WRITE_LAST);
827f48ad614SDennis Dalessandro 		} else {
828f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
829f48ad614SDennis Dalessandro 			/* Immediate data comes after the BTH */
830f48ad614SDennis Dalessandro 			ohdr->u.imm_data = wqe->wr.ex.imm_data;
831f48ad614SDennis Dalessandro 			hwords += 1;
832f48ad614SDennis Dalessandro 			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
833f48ad614SDennis Dalessandro 				bth0 |= IB_BTH_SOLICITED;
834f48ad614SDennis Dalessandro 		}
835f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
836f48ad614SDennis Dalessandro 		qp->s_cur++;
837f48ad614SDennis Dalessandro 		if (qp->s_cur >= qp->s_size)
838f48ad614SDennis Dalessandro 			qp->s_cur = 0;
839f48ad614SDennis Dalessandro 		break;
840f48ad614SDennis Dalessandro 
841f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
842f48ad614SDennis Dalessandro 		/*
843f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
844f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
845f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
846f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
847f48ad614SDennis Dalessandro 		 * thread to indicate a RDMA read needs to be restarted from
848f48ad614SDennis Dalessandro 		 * an earlier PSN without interfering with the sending thread.
849f48ad614SDennis Dalessandro 		 * See restart_rc().
850f48ad614SDennis Dalessandro 		 */
851f48ad614SDennis Dalessandro 		len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
852261a4351SMike Marciniszyn 		put_ib_reth_vaddr(
853261a4351SMike Marciniszyn 			wqe->rdma_wr.remote_addr + len,
854261a4351SMike Marciniszyn 			&ohdr->u.rc.reth);
855f48ad614SDennis Dalessandro 		ohdr->u.rc.reth.rkey =
856f48ad614SDennis Dalessandro 			cpu_to_be32(wqe->rdma_wr.rkey);
857f48ad614SDennis Dalessandro 		ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
858f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_REQUEST);
859f48ad614SDennis Dalessandro 		hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
860f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
861f48ad614SDennis Dalessandro 		qp->s_psn = wqe->lpsn + 1;
862f48ad614SDennis Dalessandro 		ss = NULL;
863f48ad614SDennis Dalessandro 		len = 0;
864f48ad614SDennis Dalessandro 		qp->s_cur++;
865f48ad614SDennis Dalessandro 		if (qp->s_cur == qp->s_size)
866f48ad614SDennis Dalessandro 			qp->s_cur = 0;
867f48ad614SDennis Dalessandro 		break;
86824b11923SKaike Wan 	case TID_OP(READ_RESP):
86924b11923SKaike Wan 		if (wqe->wr.opcode != IB_WR_TID_RDMA_READ)
87024b11923SKaike Wan 			goto bail;
87124b11923SKaike Wan 		/* This is used to restart a TID read request */
87224b11923SKaike Wan 		req = wqe_to_tid_req(wqe);
87324b11923SKaike Wan 		wpriv = wqe->priv;
87424b11923SKaike Wan 		/*
87524b11923SKaike Wan 		 * Back down. The field qp->s_psn has been set to the psn with
87624b11923SKaike Wan 		 * which the request should be restart. It's OK to use division
87724b11923SKaike Wan 		 * as this is on the retry path.
87824b11923SKaike Wan 		 */
87924b11923SKaike Wan 		req->cur_seg = delta_psn(qp->s_psn, wqe->psn) / priv->pkts_ps;
88024b11923SKaike Wan 
88124b11923SKaike Wan 		/*
88224b11923SKaike Wan 		 * The following function need to be redefined to return the
88324b11923SKaike Wan 		 * status to make sure that we find the flow. At the same
88424b11923SKaike Wan 		 * time, we can use the req->state change to check if the
88524b11923SKaike Wan 		 * call succeeds or not.
88624b11923SKaike Wan 		 */
88724b11923SKaike Wan 		req->state = TID_REQUEST_RESEND;
88824b11923SKaike Wan 		hfi1_tid_rdma_restart_req(qp, wqe, &bth2);
88924b11923SKaike Wan 		if (req->state != TID_REQUEST_ACTIVE) {
89024b11923SKaike Wan 			/*
89124b11923SKaike Wan 			 * Failed to find the flow. Release all allocated tid
89224b11923SKaike Wan 			 * resources.
89324b11923SKaike Wan 			 */
89424b11923SKaike Wan 			hfi1_kern_exp_rcv_clear_all(req);
89524b11923SKaike Wan 			hfi1_kern_clear_hw_flow(priv->rcd, qp);
89624b11923SKaike Wan 
89724b11923SKaike Wan 			hfi1_trdma_send_complete(qp, wqe, IB_WC_LOC_QP_OP_ERR);
89824b11923SKaike Wan 			goto bail;
89924b11923SKaike Wan 		}
90024b11923SKaike Wan 		req->state = TID_REQUEST_RESEND;
90124b11923SKaike Wan 		len = min_t(u32, req->seg_len,
90224b11923SKaike Wan 			    wqe->length - req->seg_len * req->cur_seg);
90324b11923SKaike Wan 		flow = &req->flows[req->flow_idx];
90424b11923SKaike Wan 		len -= flow->sent;
90524b11923SKaike Wan 		req->s_next_psn = flow->flow_state.ib_lpsn + 1;
90624b11923SKaike Wan 		delta = hfi1_build_tid_rdma_read_packet(wqe, ohdr, &bth1,
90724b11923SKaike Wan 							&bth2, &len);
90824b11923SKaike Wan 		if (delta <= 0) {
90924b11923SKaike Wan 			/* Wait for TID space */
91024b11923SKaike Wan 			goto bail;
91124b11923SKaike Wan 		}
91224b11923SKaike Wan 		hwords += delta;
91324b11923SKaike Wan 		ss = &wpriv->ss;
91424b11923SKaike Wan 		/* Check if this is the last segment */
91524b11923SKaike Wan 		if (req->cur_seg >= req->total_segs &&
91624b11923SKaike Wan 		    ++qp->s_cur == qp->s_size)
91724b11923SKaike Wan 			qp->s_cur = 0;
91824b11923SKaike Wan 		qp->s_psn = req->s_next_psn;
9193ce5daa2SKaike Wan 		trace_hfi1_tid_req_make_req_read(qp, 0, wqe->wr.opcode,
9203ce5daa2SKaike Wan 						 wqe->psn, wqe->lpsn, req);
92124b11923SKaike Wan 		break;
92224b11923SKaike Wan 	case TID_OP(READ_REQ):
92324b11923SKaike Wan 		req = wqe_to_tid_req(wqe);
92424b11923SKaike Wan 		delta = cmp_psn(qp->s_psn, wqe->psn);
92524b11923SKaike Wan 		/*
92624b11923SKaike Wan 		 * If the current WR is not TID RDMA READ, or this is the start
92724b11923SKaike Wan 		 * of a new request, we need to change the qp->s_state so that
92824b11923SKaike Wan 		 * the request can be set up properly.
92924b11923SKaike Wan 		 */
93024b11923SKaike Wan 		if (wqe->wr.opcode != IB_WR_TID_RDMA_READ || delta == 0 ||
93124b11923SKaike Wan 		    qp->s_cur == qp->s_tail) {
93224b11923SKaike Wan 			qp->s_state = OP(RDMA_READ_REQUEST);
93324b11923SKaike Wan 			if (delta == 0 || qp->s_cur == qp->s_tail)
93424b11923SKaike Wan 				goto check_s_state;
93524b11923SKaike Wan 			else
93624b11923SKaike Wan 				goto bail;
93724b11923SKaike Wan 		}
93824b11923SKaike Wan 
93924b11923SKaike Wan 		/* Rate limiting */
94024b11923SKaike Wan 		if (qp->s_num_rd_atomic >= qp->s_max_rd_atomic) {
94124b11923SKaike Wan 			qp->s_flags |= RVT_S_WAIT_RDMAR;
94224b11923SKaike Wan 			goto bail;
94324b11923SKaike Wan 		}
94424b11923SKaike Wan 
94524b11923SKaike Wan 		wpriv = wqe->priv;
94624b11923SKaike Wan 		/* Read one segment at a time */
94724b11923SKaike Wan 		len = min_t(u32, req->seg_len,
94824b11923SKaike Wan 			    wqe->length - req->seg_len * req->cur_seg);
94924b11923SKaike Wan 		delta = hfi1_build_tid_rdma_read_req(qp, wqe, ohdr, &bth1,
95024b11923SKaike Wan 						     &bth2, &len);
95124b11923SKaike Wan 		if (delta <= 0) {
95224b11923SKaike Wan 			/* Wait for TID space */
95324b11923SKaike Wan 			goto bail;
95424b11923SKaike Wan 		}
95524b11923SKaike Wan 		hwords += delta;
95624b11923SKaike Wan 		ss = &wpriv->ss;
95724b11923SKaike Wan 		/* Check if this is the last segment */
95824b11923SKaike Wan 		if (req->cur_seg >= req->total_segs &&
95924b11923SKaike Wan 		    ++qp->s_cur == qp->s_size)
96024b11923SKaike Wan 			qp->s_cur = 0;
96124b11923SKaike Wan 		qp->s_psn = req->s_next_psn;
9623ce5daa2SKaike Wan 		trace_hfi1_tid_req_make_req_read(qp, 0, wqe->wr.opcode,
9633ce5daa2SKaike Wan 						 wqe->psn, wqe->lpsn, req);
96424b11923SKaike Wan 		break;
965f48ad614SDennis Dalessandro 	}
966f48ad614SDennis Dalessandro 	qp->s_sending_hpsn = bth2;
967f48ad614SDennis Dalessandro 	delta = delta_psn(bth2, wqe->psn);
968f48ad614SDennis Dalessandro 	if (delta && delta % HFI1_PSN_CREDIT == 0)
969f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
970f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_SEND_ONE) {
971f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_SEND_ONE;
972f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_WAIT_ACK;
973f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
974f48ad614SDennis Dalessandro 	}
975f48ad614SDennis Dalessandro 	qp->s_len -= len;
9769636258fSMitko Haralanov 	ps->s_txreq->hdr_dwords = hwords;
977f48ad614SDennis Dalessandro 	ps->s_txreq->sde = priv->s_sde;
978b777f154SMitko Haralanov 	ps->s_txreq->ss = ss;
979e922ae06SDon Hiatt 	ps->s_txreq->s_cur_size = len;
980f48ad614SDennis Dalessandro 	hfi1_make_ruc_header(
981f48ad614SDennis Dalessandro 		qp,
982f48ad614SDennis Dalessandro 		ohdr,
983f48ad614SDennis Dalessandro 		bth0 | (qp->s_state << 24),
98444e43d91SMitko Haralanov 		bth1,
985f48ad614SDennis Dalessandro 		bth2,
986f48ad614SDennis Dalessandro 		middle,
987f48ad614SDennis Dalessandro 		ps);
988f48ad614SDennis Dalessandro 	return 1;
989f48ad614SDennis Dalessandro 
990f48ad614SDennis Dalessandro done_free_tx:
991f48ad614SDennis Dalessandro 	hfi1_put_txreq(ps->s_txreq);
992f48ad614SDennis Dalessandro 	ps->s_txreq = NULL;
993f48ad614SDennis Dalessandro 	return 1;
994f48ad614SDennis Dalessandro 
995f48ad614SDennis Dalessandro bail:
996f48ad614SDennis Dalessandro 	hfi1_put_txreq(ps->s_txreq);
997f48ad614SDennis Dalessandro 
998f48ad614SDennis Dalessandro bail_no_tx:
999f48ad614SDennis Dalessandro 	ps->s_txreq = NULL;
1000f48ad614SDennis Dalessandro 	qp->s_flags &= ~RVT_S_BUSY;
1001f48ad614SDennis Dalessandro 	return 0;
1002f48ad614SDennis Dalessandro }
1003f48ad614SDennis Dalessandro 
10045b6cabb0SDon Hiatt static inline void hfi1_make_bth_aeth(struct rvt_qp *qp,
10055b6cabb0SDon Hiatt 				      struct ib_other_headers *ohdr,
10065b6cabb0SDon Hiatt 				      u32 bth0, u32 bth1)
1007f48ad614SDennis Dalessandro {
1008f48ad614SDennis Dalessandro 	if (qp->r_nak_state)
1009832666c1SDon Hiatt 		ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
1010f48ad614SDennis Dalessandro 					    (qp->r_nak_state <<
1011832666c1SDon Hiatt 					     IB_AETH_CREDIT_SHIFT));
1012f48ad614SDennis Dalessandro 	else
1013696513e8SBrian Welty 		ohdr->u.aeth = rvt_compute_aeth(qp);
10145b6cabb0SDon Hiatt 
1015f48ad614SDennis Dalessandro 	ohdr->bth[0] = cpu_to_be32(bth0);
10165b6cabb0SDon Hiatt 	ohdr->bth[1] = cpu_to_be32(bth1 | qp->remote_qpn);
1017f48ad614SDennis Dalessandro 	ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
1018f48ad614SDennis Dalessandro }
1019f48ad614SDennis Dalessandro 
1020bdaf96f6SSebastian Sanchez static inline void hfi1_queue_rc_ack(struct hfi1_packet *packet, bool is_fecn)
10215b6cabb0SDon Hiatt {
1022bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
1023bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp;
10245b6cabb0SDon Hiatt 	unsigned long flags;
1025f48ad614SDennis Dalessandro 
1026f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
102772f53af2SMike Marciniszyn 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
102872f53af2SMike Marciniszyn 		goto unlock;
1029bdaf96f6SSebastian Sanchez 	ibp = rcd_to_iport(packet->rcd);
103072f53af2SMike Marciniszyn 	this_cpu_inc(*ibp->rvp.rc_qacks);
1031f48ad614SDennis Dalessandro 	qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
1032f48ad614SDennis Dalessandro 	qp->s_nak_state = qp->r_nak_state;
1033f48ad614SDennis Dalessandro 	qp->s_ack_psn = qp->r_ack_psn;
1034f48ad614SDennis Dalessandro 	if (is_fecn)
1035f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_ECN;
1036f48ad614SDennis Dalessandro 
10375b6cabb0SDon Hiatt 	/* Schedule the send tasklet. */
1038f48ad614SDennis Dalessandro 	hfi1_schedule_send(qp);
103972f53af2SMike Marciniszyn unlock:
1040f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
1041f48ad614SDennis Dalessandro }
1042f48ad614SDennis Dalessandro 
1043bdaf96f6SSebastian Sanchez static inline void hfi1_make_rc_ack_9B(struct hfi1_packet *packet,
10445b6cabb0SDon Hiatt 				       struct hfi1_opa_header *opa_hdr,
10455b6cabb0SDon Hiatt 				       u8 sc5, bool is_fecn,
10465b6cabb0SDon Hiatt 				       u64 *pbc_flags, u32 *hwords,
10475b6cabb0SDon Hiatt 				       u32 *nwords)
10485b6cabb0SDon Hiatt {
1049bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
1050bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
10515b6cabb0SDon Hiatt 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
10525b6cabb0SDon Hiatt 	struct ib_header *hdr = &opa_hdr->ibh;
10535b6cabb0SDon Hiatt 	struct ib_other_headers *ohdr;
10545b6cabb0SDon Hiatt 	u16 lrh0 = HFI1_LRH_BTH;
10555b6cabb0SDon Hiatt 	u16 pkey;
10565b6cabb0SDon Hiatt 	u32 bth0, bth1;
10575b6cabb0SDon Hiatt 
10585b6cabb0SDon Hiatt 	opa_hdr->hdr_type = HFI1_PKT_TYPE_9B;
10595b6cabb0SDon Hiatt 	ohdr = &hdr->u.oth;
10605b6cabb0SDon Hiatt 	/* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
10615b6cabb0SDon Hiatt 	*hwords = 6;
10625b6cabb0SDon Hiatt 
10635b6cabb0SDon Hiatt 	if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) {
10645b6cabb0SDon Hiatt 		*hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
10655b6cabb0SDon Hiatt 					 rdma_ah_read_grh(&qp->remote_ah_attr),
10665b6cabb0SDon Hiatt 					 *hwords - 2, SIZE_OF_CRC);
10675b6cabb0SDon Hiatt 		ohdr = &hdr->u.l.oth;
10685b6cabb0SDon Hiatt 		lrh0 = HFI1_LRH_GRH;
10695b6cabb0SDon Hiatt 	}
10705b6cabb0SDon Hiatt 	/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
10715b6cabb0SDon Hiatt 	*pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
10725b6cabb0SDon Hiatt 
10735b6cabb0SDon Hiatt 	/* read pkey_index w/o lock (its atomic) */
10745b6cabb0SDon Hiatt 	pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
10755b6cabb0SDon Hiatt 
10765b6cabb0SDon Hiatt 	lrh0 |= (sc5 & IB_SC_MASK) << IB_SC_SHIFT |
10775b6cabb0SDon Hiatt 		(rdma_ah_get_sl(&qp->remote_ah_attr) & IB_SL_MASK) <<
10785b6cabb0SDon Hiatt 			IB_SL_SHIFT;
10795b6cabb0SDon Hiatt 
10805b6cabb0SDon Hiatt 	hfi1_make_ib_hdr(hdr, lrh0, *hwords + SIZE_OF_CRC,
10815b6cabb0SDon Hiatt 			 opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr), 9B),
10825b6cabb0SDon Hiatt 			 ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr));
10835b6cabb0SDon Hiatt 
10845b6cabb0SDon Hiatt 	bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
10855b6cabb0SDon Hiatt 	if (qp->s_mig_state == IB_MIG_MIGRATED)
10865b6cabb0SDon Hiatt 		bth0 |= IB_BTH_MIG_REQ;
10875b6cabb0SDon Hiatt 	bth1 = (!!is_fecn) << IB_BECN_SHIFT;
108844e43d91SMitko Haralanov 	/*
108944e43d91SMitko Haralanov 	 * Inline ACKs go out without the use of the Verbs send engine, so
109044e43d91SMitko Haralanov 	 * we need to set the STL Verbs Extended bit here
109144e43d91SMitko Haralanov 	 */
109244e43d91SMitko Haralanov 	bth1 |= HFI1_CAP_IS_KSET(OPFN) << IB_BTHE_E_SHIFT;
10935b6cabb0SDon Hiatt 	hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
10945b6cabb0SDon Hiatt }
10955b6cabb0SDon Hiatt 
1096bdaf96f6SSebastian Sanchez static inline void hfi1_make_rc_ack_16B(struct hfi1_packet *packet,
10975b6cabb0SDon Hiatt 					struct hfi1_opa_header *opa_hdr,
10985b6cabb0SDon Hiatt 					u8 sc5, bool is_fecn,
10995b6cabb0SDon Hiatt 					u64 *pbc_flags, u32 *hwords,
11005b6cabb0SDon Hiatt 					u32 *nwords)
11015b6cabb0SDon Hiatt {
1102bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
1103bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
11045b6cabb0SDon Hiatt 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
11055b6cabb0SDon Hiatt 	struct hfi1_16b_header *hdr = &opa_hdr->opah;
11065b6cabb0SDon Hiatt 	struct ib_other_headers *ohdr;
11078935780bSDennis Dalessandro 	u32 bth0, bth1 = 0;
11085b6cabb0SDon Hiatt 	u16 len, pkey;
1109ca85bb1cSSebastian Sanchez 	bool becn = is_fecn;
11105b6cabb0SDon Hiatt 	u8 l4 = OPA_16B_L4_IB_LOCAL;
11115b6cabb0SDon Hiatt 	u8 extra_bytes;
11125b6cabb0SDon Hiatt 
11135b6cabb0SDon Hiatt 	opa_hdr->hdr_type = HFI1_PKT_TYPE_16B;
11145b6cabb0SDon Hiatt 	ohdr = &hdr->u.oth;
11155b6cabb0SDon Hiatt 	/* header size in 32-bit words 16B LRH+BTH+AETH = (16+12+4)/4 */
11165b6cabb0SDon Hiatt 	*hwords = 8;
11175b6cabb0SDon Hiatt 	extra_bytes = hfi1_get_16b_padding(*hwords << 2, 0);
11185b6cabb0SDon Hiatt 	*nwords = SIZE_OF_CRC + ((extra_bytes + SIZE_OF_LT) >> 2);
11195b6cabb0SDon Hiatt 
11205b6cabb0SDon Hiatt 	if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
11215b6cabb0SDon Hiatt 	    hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))) {
11225b6cabb0SDon Hiatt 		*hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
11235b6cabb0SDon Hiatt 					 rdma_ah_read_grh(&qp->remote_ah_attr),
11245b6cabb0SDon Hiatt 					 *hwords - 4, *nwords);
11255b6cabb0SDon Hiatt 		ohdr = &hdr->u.l.oth;
11265b6cabb0SDon Hiatt 		l4 = OPA_16B_L4_IB_GLOBAL;
11275b6cabb0SDon Hiatt 	}
11285b6cabb0SDon Hiatt 	*pbc_flags |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
11295b6cabb0SDon Hiatt 
11305b6cabb0SDon Hiatt 	/* read pkey_index w/o lock (its atomic) */
11315b6cabb0SDon Hiatt 	pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
11325b6cabb0SDon Hiatt 
11335b6cabb0SDon Hiatt 	/* Convert dwords to flits */
11345b6cabb0SDon Hiatt 	len = (*hwords + *nwords) >> 1;
11355b6cabb0SDon Hiatt 
11363cafad43SDon Hiatt 	hfi1_make_16b_hdr(hdr, ppd->lid |
11373cafad43SDon Hiatt 			  (rdma_ah_get_path_bits(&qp->remote_ah_attr) &
11383cafad43SDon Hiatt 			  ((1 << ppd->lmc) - 1)),
11395b6cabb0SDon Hiatt 			  opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr),
11403cafad43SDon Hiatt 				      16B), len, pkey, becn, 0, l4, sc5);
11415b6cabb0SDon Hiatt 
11425b6cabb0SDon Hiatt 	bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
11435b6cabb0SDon Hiatt 	bth0 |= extra_bytes << 20;
11445b6cabb0SDon Hiatt 	if (qp->s_mig_state == IB_MIG_MIGRATED)
11455b6cabb0SDon Hiatt 		bth1 = OPA_BTH_MIG_REQ;
11465b6cabb0SDon Hiatt 	hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
11475b6cabb0SDon Hiatt }
11485b6cabb0SDon Hiatt 
1149bdaf96f6SSebastian Sanchez typedef void (*hfi1_make_rc_ack)(struct hfi1_packet *packet,
11505b6cabb0SDon Hiatt 				 struct hfi1_opa_header *opa_hdr,
11515b6cabb0SDon Hiatt 				 u8 sc5, bool is_fecn,
11525b6cabb0SDon Hiatt 				 u64 *pbc_flags, u32 *hwords,
11535b6cabb0SDon Hiatt 				 u32 *nwords);
11545b6cabb0SDon Hiatt 
11555b6cabb0SDon Hiatt /* We support only two types - 9B and 16B for now */
11565b6cabb0SDon Hiatt static const hfi1_make_rc_ack hfi1_make_rc_ack_tbl[2] = {
11575b6cabb0SDon Hiatt 	[HFI1_PKT_TYPE_9B] = &hfi1_make_rc_ack_9B,
11585b6cabb0SDon Hiatt 	[HFI1_PKT_TYPE_16B] = &hfi1_make_rc_ack_16B
11595b6cabb0SDon Hiatt };
11605b6cabb0SDon Hiatt 
11615b6cabb0SDon Hiatt /**
11625b6cabb0SDon Hiatt  * hfi1_send_rc_ack - Construct an ACK packet and send it
11635b6cabb0SDon Hiatt  * @qp: a pointer to the QP
11645b6cabb0SDon Hiatt  *
11655b6cabb0SDon Hiatt  * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
11665b6cabb0SDon Hiatt  * Note that RDMA reads and atomics are handled in the
11675b6cabb0SDon Hiatt  * send side QP state and send engine.
11685b6cabb0SDon Hiatt  */
1169bdaf96f6SSebastian Sanchez void hfi1_send_rc_ack(struct hfi1_packet *packet, bool is_fecn)
11705b6cabb0SDon Hiatt {
1171bdaf96f6SSebastian Sanchez 	struct hfi1_ctxtdata *rcd = packet->rcd;
1172bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
11735b6cabb0SDon Hiatt 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
11745b6cabb0SDon Hiatt 	struct hfi1_qp_priv *priv = qp->priv;
11755b6cabb0SDon Hiatt 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
11765b6cabb0SDon Hiatt 	u8 sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
11775b6cabb0SDon Hiatt 	u64 pbc, pbc_flags = 0;
11785b6cabb0SDon Hiatt 	u32 hwords = 0;
11795b6cabb0SDon Hiatt 	u32 nwords = 0;
11805b6cabb0SDon Hiatt 	u32 plen;
11815b6cabb0SDon Hiatt 	struct pio_buf *pbuf;
11825b6cabb0SDon Hiatt 	struct hfi1_opa_header opa_hdr;
11835b6cabb0SDon Hiatt 
11845b6cabb0SDon Hiatt 	/* clear the defer count */
11855b6cabb0SDon Hiatt 	qp->r_adefered = 0;
11865b6cabb0SDon Hiatt 
11875b6cabb0SDon Hiatt 	/* Don't send ACK or NAK if a RDMA read or atomic is pending. */
11885b6cabb0SDon Hiatt 	if (qp->s_flags & RVT_S_RESP_PENDING) {
1189bdaf96f6SSebastian Sanchez 		hfi1_queue_rc_ack(packet, is_fecn);
11905b6cabb0SDon Hiatt 		return;
11915b6cabb0SDon Hiatt 	}
11925b6cabb0SDon Hiatt 
11935b6cabb0SDon Hiatt 	/* Ensure s_rdma_ack_cnt changes are committed */
11945b6cabb0SDon Hiatt 	if (qp->s_rdma_ack_cnt) {
1195bdaf96f6SSebastian Sanchez 		hfi1_queue_rc_ack(packet, is_fecn);
11965b6cabb0SDon Hiatt 		return;
11975b6cabb0SDon Hiatt 	}
11985b6cabb0SDon Hiatt 
11995b6cabb0SDon Hiatt 	/* Don't try to send ACKs if the link isn't ACTIVE */
12005b6cabb0SDon Hiatt 	if (driver_lstate(ppd) != IB_PORT_ACTIVE)
12015b6cabb0SDon Hiatt 		return;
12025b6cabb0SDon Hiatt 
12035b6cabb0SDon Hiatt 	/* Make the appropriate header */
1204bdaf96f6SSebastian Sanchez 	hfi1_make_rc_ack_tbl[priv->hdr_type](packet, &opa_hdr, sc5, is_fecn,
12055b6cabb0SDon Hiatt 					     &pbc_flags, &hwords, &nwords);
12065b6cabb0SDon Hiatt 
12075b6cabb0SDon Hiatt 	plen = 2 /* PBC */ + hwords + nwords;
12085b6cabb0SDon Hiatt 	pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps,
12095b6cabb0SDon Hiatt 			 sc_to_vlt(ppd->dd, sc5), plen);
12105b6cabb0SDon Hiatt 	pbuf = sc_buffer_alloc(rcd->sc, plen, NULL, NULL);
12115b6cabb0SDon Hiatt 	if (!pbuf) {
12125b6cabb0SDon Hiatt 		/*
12135b6cabb0SDon Hiatt 		 * We have no room to send at the moment.  Pass
12145b6cabb0SDon Hiatt 		 * responsibility for sending the ACK to the send engine
12155b6cabb0SDon Hiatt 		 * so that when enough buffer space becomes available,
12165b6cabb0SDon Hiatt 		 * the ACK is sent ahead of other outgoing packets.
12175b6cabb0SDon Hiatt 		 */
1218bdaf96f6SSebastian Sanchez 		hfi1_queue_rc_ack(packet, is_fecn);
12195b6cabb0SDon Hiatt 		return;
12205b6cabb0SDon Hiatt 	}
12215b6cabb0SDon Hiatt 	trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
12225b6cabb0SDon Hiatt 			       &opa_hdr, ib_is_sc5(sc5));
12235b6cabb0SDon Hiatt 
12245b6cabb0SDon Hiatt 	/* write the pbc and data */
12255b6cabb0SDon Hiatt 	ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc,
12265b6cabb0SDon Hiatt 				 (priv->hdr_type == HFI1_PKT_TYPE_9B ?
12275b6cabb0SDon Hiatt 				 (void *)&opa_hdr.ibh :
12285b6cabb0SDon Hiatt 				 (void *)&opa_hdr.opah), hwords);
12295b6cabb0SDon Hiatt 	return;
12305b6cabb0SDon Hiatt }
12315b6cabb0SDon Hiatt 
1232f48ad614SDennis Dalessandro /**
1233b126078eSKaike Wan  * update_num_rd_atomic - update the qp->s_num_rd_atomic
1234b126078eSKaike Wan  * @qp: the QP
1235b126078eSKaike Wan  * @psn: the packet sequence number to restart at
1236b126078eSKaike Wan  * @wqe: the wqe
1237b126078eSKaike Wan  *
1238b126078eSKaike Wan  * This is called from reset_psn() to update qp->s_num_rd_atomic
1239b126078eSKaike Wan  * for the current wqe.
1240b126078eSKaike Wan  * Called at interrupt level with the QP s_lock held.
1241b126078eSKaike Wan  */
1242b126078eSKaike Wan static void update_num_rd_atomic(struct rvt_qp *qp, u32 psn,
1243b126078eSKaike Wan 				 struct rvt_swqe *wqe)
1244b126078eSKaike Wan {
1245b126078eSKaike Wan 	u32 opcode = wqe->wr.opcode;
1246b126078eSKaike Wan 
1247b126078eSKaike Wan 	if (opcode == IB_WR_RDMA_READ ||
1248b126078eSKaike Wan 	    opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1249b126078eSKaike Wan 	    opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1250b126078eSKaike Wan 		qp->s_num_rd_atomic++;
1251b126078eSKaike Wan 	} else if (opcode == IB_WR_TID_RDMA_READ) {
1252b126078eSKaike Wan 		struct tid_rdma_request *req = wqe_to_tid_req(wqe);
1253b126078eSKaike Wan 		struct hfi1_qp_priv *priv = qp->priv;
1254b126078eSKaike Wan 
1255b126078eSKaike Wan 		if (cmp_psn(psn, wqe->lpsn) <= 0) {
1256b126078eSKaike Wan 			u32 cur_seg;
1257b126078eSKaike Wan 
1258b126078eSKaike Wan 			cur_seg = (psn - wqe->psn) / priv->pkts_ps;
1259b126078eSKaike Wan 			req->ack_pending = cur_seg - req->comp_seg;
1260b126078eSKaike Wan 			priv->pending_tid_r_segs += req->ack_pending;
1261b126078eSKaike Wan 			qp->s_num_rd_atomic += req->ack_pending;
1262b126078eSKaike Wan 		} else {
1263b126078eSKaike Wan 			priv->pending_tid_r_segs += req->total_segs;
1264b126078eSKaike Wan 			qp->s_num_rd_atomic += req->total_segs;
1265b126078eSKaike Wan 		}
1266b126078eSKaike Wan 	}
1267b126078eSKaike Wan }
1268b126078eSKaike Wan 
1269b126078eSKaike Wan /**
1270f48ad614SDennis Dalessandro  * reset_psn - reset the QP state to send starting from PSN
1271f48ad614SDennis Dalessandro  * @qp: the QP
1272f48ad614SDennis Dalessandro  * @psn: the packet sequence number to restart at
1273f48ad614SDennis Dalessandro  *
1274f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an incoming RC ACK
1275f48ad614SDennis Dalessandro  * for the given QP.
1276f48ad614SDennis Dalessandro  * Called at interrupt level with the QP s_lock held.
1277f48ad614SDennis Dalessandro  */
1278f48ad614SDennis Dalessandro static void reset_psn(struct rvt_qp *qp, u32 psn)
1279f48ad614SDennis Dalessandro {
1280f48ad614SDennis Dalessandro 	u32 n = qp->s_acked;
1281f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
1282f48ad614SDennis Dalessandro 	u32 opcode;
1283b126078eSKaike Wan 	struct hfi1_qp_priv *priv = qp->priv;
1284f48ad614SDennis Dalessandro 
128568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1286f48ad614SDennis Dalessandro 	qp->s_cur = n;
1287b126078eSKaike Wan 	priv->pending_tid_r_segs = 0;
1288b126078eSKaike Wan 	qp->s_num_rd_atomic = 0;
1289f48ad614SDennis Dalessandro 
1290f48ad614SDennis Dalessandro 	/*
1291f48ad614SDennis Dalessandro 	 * If we are starting the request from the beginning,
1292f48ad614SDennis Dalessandro 	 * let the normal send code handle initialization.
1293f48ad614SDennis Dalessandro 	 */
1294f48ad614SDennis Dalessandro 	if (cmp_psn(psn, wqe->psn) <= 0) {
1295f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_LAST);
1296f48ad614SDennis Dalessandro 		goto done;
1297f48ad614SDennis Dalessandro 	}
1298b126078eSKaike Wan 	update_num_rd_atomic(qp, psn, wqe);
1299f48ad614SDennis Dalessandro 
1300f48ad614SDennis Dalessandro 	/* Find the work request opcode corresponding to the given PSN. */
1301f48ad614SDennis Dalessandro 	for (;;) {
1302f48ad614SDennis Dalessandro 		int diff;
1303f48ad614SDennis Dalessandro 
1304f48ad614SDennis Dalessandro 		if (++n == qp->s_size)
1305f48ad614SDennis Dalessandro 			n = 0;
1306f48ad614SDennis Dalessandro 		if (n == qp->s_tail)
1307f48ad614SDennis Dalessandro 			break;
1308f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, n);
1309f48ad614SDennis Dalessandro 		diff = cmp_psn(psn, wqe->psn);
1310b126078eSKaike Wan 		if (diff < 0) {
1311b126078eSKaike Wan 			/* Point wqe back to the previous one*/
1312b126078eSKaike Wan 			wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
1313f48ad614SDennis Dalessandro 			break;
1314b126078eSKaike Wan 		}
1315f48ad614SDennis Dalessandro 		qp->s_cur = n;
1316f48ad614SDennis Dalessandro 		/*
1317f48ad614SDennis Dalessandro 		 * If we are starting the request from the beginning,
1318f48ad614SDennis Dalessandro 		 * let the normal send code handle initialization.
1319f48ad614SDennis Dalessandro 		 */
1320f48ad614SDennis Dalessandro 		if (diff == 0) {
1321f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
1322f48ad614SDennis Dalessandro 			goto done;
1323f48ad614SDennis Dalessandro 		}
1324b126078eSKaike Wan 
1325b126078eSKaike Wan 		update_num_rd_atomic(qp, psn, wqe);
1326f48ad614SDennis Dalessandro 	}
1327b126078eSKaike Wan 	opcode = wqe->wr.opcode;
1328f48ad614SDennis Dalessandro 
1329f48ad614SDennis Dalessandro 	/*
1330f48ad614SDennis Dalessandro 	 * Set the state to restart in the middle of a request.
1331f48ad614SDennis Dalessandro 	 * Don't change the s_sge, s_cur_sge, or s_cur_size.
1332f48ad614SDennis Dalessandro 	 * See hfi1_make_rc_req().
1333f48ad614SDennis Dalessandro 	 */
1334f48ad614SDennis Dalessandro 	switch (opcode) {
1335f48ad614SDennis Dalessandro 	case IB_WR_SEND:
1336f48ad614SDennis Dalessandro 	case IB_WR_SEND_WITH_IMM:
1337f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
1338f48ad614SDennis Dalessandro 		break;
1339f48ad614SDennis Dalessandro 
1340f48ad614SDennis Dalessandro 	case IB_WR_RDMA_WRITE:
1341f48ad614SDennis Dalessandro 	case IB_WR_RDMA_WRITE_WITH_IMM:
1342f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
1343f48ad614SDennis Dalessandro 		break;
1344f48ad614SDennis Dalessandro 
1345f48ad614SDennis Dalessandro 	case IB_WR_RDMA_READ:
1346f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
1347f48ad614SDennis Dalessandro 		break;
1348f48ad614SDennis Dalessandro 
1349b126078eSKaike Wan 	case IB_WR_TID_RDMA_READ:
1350b126078eSKaike Wan 		qp->s_state = TID_OP(READ_RESP);
1351b126078eSKaike Wan 		break;
1352b126078eSKaike Wan 
1353f48ad614SDennis Dalessandro 	default:
1354f48ad614SDennis Dalessandro 		/*
1355f48ad614SDennis Dalessandro 		 * This case shouldn't happen since its only
1356f48ad614SDennis Dalessandro 		 * one PSN per req.
1357f48ad614SDennis Dalessandro 		 */
1358f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_LAST);
1359f48ad614SDennis Dalessandro 	}
1360f48ad614SDennis Dalessandro done:
1361a0b34f75SKaike Wan 	priv->s_flags &= ~HFI1_S_TID_WAIT_INTERLCK;
1362f48ad614SDennis Dalessandro 	qp->s_psn = psn;
1363f48ad614SDennis Dalessandro 	/*
1364f48ad614SDennis Dalessandro 	 * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
1365ca00c62bSDennis Dalessandro 	 * asynchronously before the send engine can get scheduled.
1366f48ad614SDennis Dalessandro 	 * Doing it in hfi1_make_rc_req() is too late.
1367f48ad614SDennis Dalessandro 	 */
1368f48ad614SDennis Dalessandro 	if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
1369f48ad614SDennis Dalessandro 	    (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
1370f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_WAIT_PSN;
13712e2ba09eSMike Marciniszyn 	qp->s_flags &= ~HFI1_S_AHG_VALID;
13723ce5daa2SKaike Wan 	trace_hfi1_sender_reset_psn(qp);
1373f48ad614SDennis Dalessandro }
1374f48ad614SDennis Dalessandro 
1375f48ad614SDennis Dalessandro /*
1376f48ad614SDennis Dalessandro  * Back up requester to resend the last un-ACKed request.
1377f48ad614SDennis Dalessandro  * The QP r_lock and s_lock should be held and interrupts disabled.
1378f48ad614SDennis Dalessandro  */
137956acbbfbSVenkata Sandeep Dhanalakota void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
1380f48ad614SDennis Dalessandro {
138148a615dcSKaike Wan 	struct hfi1_qp_priv *priv = qp->priv;
1382f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1383f48ad614SDennis Dalessandro 	struct hfi1_ibport *ibp;
1384f48ad614SDennis Dalessandro 
138568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->r_lock);
138668e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
13873ce5daa2SKaike Wan 	trace_hfi1_sender_restart_rc(qp);
1388f48ad614SDennis Dalessandro 	if (qp->s_retry == 0) {
1389f48ad614SDennis Dalessandro 		if (qp->s_mig_state == IB_MIG_ARMED) {
1390f48ad614SDennis Dalessandro 			hfi1_migrate_qp(qp);
1391f48ad614SDennis Dalessandro 			qp->s_retry = qp->s_retry_cnt;
1392f48ad614SDennis Dalessandro 		} else if (qp->s_last == qp->s_acked) {
139348a615dcSKaike Wan 			/*
139448a615dcSKaike Wan 			 * We need special handling for the OPFN request WQEs as
139548a615dcSKaike Wan 			 * they are not allowed to generate real user errors
139648a615dcSKaike Wan 			 */
139748a615dcSKaike Wan 			if (wqe->wr.opcode == IB_WR_OPFN) {
139848a615dcSKaike Wan 				struct hfi1_ibport *ibp =
139948a615dcSKaike Wan 					to_iport(qp->ibqp.device, qp->port_num);
140048a615dcSKaike Wan 				/*
140148a615dcSKaike Wan 				 * Call opfn_conn_reply() with capcode and
140248a615dcSKaike Wan 				 * remaining data as 0 to close out the
140348a615dcSKaike Wan 				 * current request
140448a615dcSKaike Wan 				 */
140548a615dcSKaike Wan 				opfn_conn_reply(qp, priv->opfn.curr);
140648a615dcSKaike Wan 				wqe = do_rc_completion(qp, wqe, ibp);
140748a615dcSKaike Wan 				qp->s_flags &= ~RVT_S_WAIT_ACK;
140848a615dcSKaike Wan 			} else {
1409b126078eSKaike Wan 				if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) {
1410b126078eSKaike Wan 					struct tid_rdma_request *req;
1411b126078eSKaike Wan 
1412b126078eSKaike Wan 					req = wqe_to_tid_req(wqe);
1413b126078eSKaike Wan 					hfi1_kern_exp_rcv_clear_all(req);
1414b126078eSKaike Wan 					hfi1_kern_clear_hw_flow(priv->rcd, qp);
1415b126078eSKaike Wan 				}
1416b126078eSKaike Wan 
141724b11923SKaike Wan 				hfi1_trdma_send_complete(qp, wqe,
141848a615dcSKaike Wan 							 IB_WC_RETRY_EXC_ERR);
1419f48ad614SDennis Dalessandro 				rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
142048a615dcSKaike Wan 			}
1421f48ad614SDennis Dalessandro 			return;
1422f48ad614SDennis Dalessandro 		} else { /* need to handle delayed completion */
1423f48ad614SDennis Dalessandro 			return;
1424f48ad614SDennis Dalessandro 		}
1425f48ad614SDennis Dalessandro 	} else {
1426f48ad614SDennis Dalessandro 		qp->s_retry--;
1427f48ad614SDennis Dalessandro 	}
1428f48ad614SDennis Dalessandro 
1429f48ad614SDennis Dalessandro 	ibp = to_iport(qp->ibqp.device, qp->port_num);
1430b126078eSKaike Wan 	if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1431b126078eSKaike Wan 	    wqe->wr.opcode == IB_WR_TID_RDMA_READ)
1432f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends++;
1433f48ad614SDennis Dalessandro 	else
1434f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
1435f48ad614SDennis Dalessandro 
1436f48ad614SDennis Dalessandro 	qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
1437f48ad614SDennis Dalessandro 			 RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
1438f48ad614SDennis Dalessandro 			 RVT_S_WAIT_ACK);
1439f48ad614SDennis Dalessandro 	if (wait)
1440f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_SEND_ONE;
1441f48ad614SDennis Dalessandro 	reset_psn(qp, psn);
1442f48ad614SDennis Dalessandro }
1443f48ad614SDennis Dalessandro 
1444f48ad614SDennis Dalessandro /*
1445f48ad614SDennis Dalessandro  * Set qp->s_sending_psn to the next PSN after the given one.
1446f48ad614SDennis Dalessandro  * This would be psn+1 except when RDMA reads are present.
1447f48ad614SDennis Dalessandro  */
1448f48ad614SDennis Dalessandro static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
1449f48ad614SDennis Dalessandro {
1450f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1451f48ad614SDennis Dalessandro 	u32 n = qp->s_last;
1452f48ad614SDennis Dalessandro 
145368e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1454f48ad614SDennis Dalessandro 	/* Find the work request corresponding to the given PSN. */
1455f48ad614SDennis Dalessandro 	for (;;) {
1456f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, n);
1457f48ad614SDennis Dalessandro 		if (cmp_psn(psn, wqe->lpsn) <= 0) {
145824b11923SKaike Wan 			if (wqe->wr.opcode == IB_WR_RDMA_READ ||
145924b11923SKaike Wan 			    wqe->wr.opcode == IB_WR_TID_RDMA_READ)
1460f48ad614SDennis Dalessandro 				qp->s_sending_psn = wqe->lpsn + 1;
1461f48ad614SDennis Dalessandro 			else
1462f48ad614SDennis Dalessandro 				qp->s_sending_psn = psn + 1;
1463f48ad614SDennis Dalessandro 			break;
1464f48ad614SDennis Dalessandro 		}
1465f48ad614SDennis Dalessandro 		if (++n == qp->s_size)
1466f48ad614SDennis Dalessandro 			n = 0;
1467f48ad614SDennis Dalessandro 		if (n == qp->s_tail)
1468f48ad614SDennis Dalessandro 			break;
1469f48ad614SDennis Dalessandro 	}
1470f48ad614SDennis Dalessandro }
1471f48ad614SDennis Dalessandro 
1472f48ad614SDennis Dalessandro /*
1473f48ad614SDennis Dalessandro  * This should be called with the QP s_lock held and interrupts disabled.
1474f48ad614SDennis Dalessandro  */
147530e07416SDon Hiatt void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah)
1476f48ad614SDennis Dalessandro {
1477261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
14785b6cabb0SDon Hiatt 	struct hfi1_qp_priv *priv = qp->priv;
1479f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
14805b6cabb0SDon Hiatt 	struct ib_header *hdr = NULL;
14815b6cabb0SDon Hiatt 	struct hfi1_16b_header *hdr_16b = NULL;
1482f48ad614SDennis Dalessandro 	u32 opcode;
1483f48ad614SDennis Dalessandro 	u32 psn;
1484f48ad614SDennis Dalessandro 
148568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1486f9215b5eSMike Marciniszyn 	if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
1487f48ad614SDennis Dalessandro 		return;
1488f48ad614SDennis Dalessandro 
1489f48ad614SDennis Dalessandro 	/* Find out where the BTH is */
14905b6cabb0SDon Hiatt 	if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
14915b6cabb0SDon Hiatt 		hdr = &opah->ibh;
1492cb427057SDon Hiatt 		if (ib_get_lnh(hdr) == HFI1_LRH_BTH)
1493f48ad614SDennis Dalessandro 			ohdr = &hdr->u.oth;
1494f48ad614SDennis Dalessandro 		else
1495f48ad614SDennis Dalessandro 			ohdr = &hdr->u.l.oth;
14965b6cabb0SDon Hiatt 	} else {
14975b6cabb0SDon Hiatt 		u8 l4;
14985b6cabb0SDon Hiatt 
14995b6cabb0SDon Hiatt 		hdr_16b = &opah->opah;
15005b6cabb0SDon Hiatt 		l4  = hfi1_16B_get_l4(hdr_16b);
15015b6cabb0SDon Hiatt 		if (l4 == OPA_16B_L4_IB_LOCAL)
15025b6cabb0SDon Hiatt 			ohdr = &hdr_16b->u.oth;
15035b6cabb0SDon Hiatt 		else
15045b6cabb0SDon Hiatt 			ohdr = &hdr_16b->u.l.oth;
15055b6cabb0SDon Hiatt 	}
1506f48ad614SDennis Dalessandro 
1507cb427057SDon Hiatt 	opcode = ib_bth_get_opcode(ohdr);
150824b11923SKaike Wan 	if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
150924b11923SKaike Wan 	     opcode <= OP(ATOMIC_ACKNOWLEDGE)) ||
151024b11923SKaike Wan 	    opcode == TID_OP(READ_RESP)) {
1511f48ad614SDennis Dalessandro 		WARN_ON(!qp->s_rdma_ack_cnt);
1512f48ad614SDennis Dalessandro 		qp->s_rdma_ack_cnt--;
1513f48ad614SDennis Dalessandro 		return;
1514f48ad614SDennis Dalessandro 	}
1515f48ad614SDennis Dalessandro 
15167dafbab3SDon Hiatt 	psn = ib_bth_get_psn(ohdr);
1517f48ad614SDennis Dalessandro 	reset_sending_psn(qp, psn);
1518f48ad614SDennis Dalessandro 
1519f48ad614SDennis Dalessandro 	/*
1520f48ad614SDennis Dalessandro 	 * Start timer after a packet requesting an ACK has been sent and
1521f48ad614SDennis Dalessandro 	 * there are still requests that haven't been acked.
1522f48ad614SDennis Dalessandro 	 */
1523f48ad614SDennis Dalessandro 	if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
1524f48ad614SDennis Dalessandro 	    !(qp->s_flags &
1525f48ad614SDennis Dalessandro 		(RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
152624b11923SKaike Wan 		(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) {
152724b11923SKaike Wan 		if (opcode == TID_OP(READ_REQ))
152824b11923SKaike Wan 			rvt_add_retry_timer_ext(qp, priv->timeout_shift);
152924b11923SKaike Wan 		else
153056acbbfbSVenkata Sandeep Dhanalakota 			rvt_add_retry_timer(qp);
153124b11923SKaike Wan 	}
1532f48ad614SDennis Dalessandro 
1533f48ad614SDennis Dalessandro 	while (qp->s_last != qp->s_acked) {
1534f48ad614SDennis Dalessandro 		u32 s_last;
1535f48ad614SDennis Dalessandro 
1536f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_last);
1537f48ad614SDennis Dalessandro 		if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1538f48ad614SDennis Dalessandro 		    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1539f48ad614SDennis Dalessandro 			break;
154024b11923SKaike Wan 		trdma_clean_swqe(qp, wqe);
1541ca95f802SKaike Wan 		rvt_qp_wqe_unreserve(qp, wqe);
1542f48ad614SDennis Dalessandro 		s_last = qp->s_last;
15439260b354SMike Marciniszyn 		trace_hfi1_qp_send_completion(qp, wqe, s_last);
1544f48ad614SDennis Dalessandro 		if (++s_last >= qp->s_size)
1545f48ad614SDennis Dalessandro 			s_last = 0;
1546f48ad614SDennis Dalessandro 		qp->s_last = s_last;
1547f48ad614SDennis Dalessandro 		/* see post_send() */
1548f48ad614SDennis Dalessandro 		barrier();
1549c64607aaSMike Marciniszyn 		rvt_put_swqe(wqe);
155043a474aaSMike Marciniszyn 		rvt_qp_swqe_complete(qp,
155143a474aaSMike Marciniszyn 				     wqe,
155243a474aaSMike Marciniszyn 				     ib_hfi1_wc_opcode[wqe->wr.opcode],
155343a474aaSMike Marciniszyn 				     IB_WC_SUCCESS);
1554f48ad614SDennis Dalessandro 	}
1555f48ad614SDennis Dalessandro 	/*
1556f48ad614SDennis Dalessandro 	 * If we were waiting for sends to complete before re-sending,
1557f48ad614SDennis Dalessandro 	 * and they are now complete, restart sending.
1558f48ad614SDennis Dalessandro 	 */
1559462b6b21SSebastian Sanchez 	trace_hfi1_sendcomplete(qp, psn);
1560f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_WAIT_PSN &&
1561f48ad614SDennis Dalessandro 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1562f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_WAIT_PSN;
1563f48ad614SDennis Dalessandro 		qp->s_sending_psn = qp->s_psn;
1564f48ad614SDennis Dalessandro 		qp->s_sending_hpsn = qp->s_psn - 1;
1565f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
1566f48ad614SDennis Dalessandro 	}
1567f48ad614SDennis Dalessandro }
1568f48ad614SDennis Dalessandro 
1569f48ad614SDennis Dalessandro static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
1570f48ad614SDennis Dalessandro {
1571f48ad614SDennis Dalessandro 	qp->s_last_psn = psn;
1572f48ad614SDennis Dalessandro }
1573f48ad614SDennis Dalessandro 
1574f48ad614SDennis Dalessandro /*
1575f48ad614SDennis Dalessandro  * Generate a SWQE completion.
1576f48ad614SDennis Dalessandro  * This is similar to hfi1_send_complete but has to check to be sure
1577f48ad614SDennis Dalessandro  * that the SGEs are not being referenced if the SWQE is being resent.
1578f48ad614SDennis Dalessandro  */
1579385156c5SKaike Wan struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
1580f48ad614SDennis Dalessandro 				  struct rvt_swqe *wqe,
1581f48ad614SDennis Dalessandro 				  struct hfi1_ibport *ibp)
1582f48ad614SDennis Dalessandro {
1583a0b34f75SKaike Wan 	struct hfi1_qp_priv *priv = qp->priv;
1584a0b34f75SKaike Wan 
158568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1586f48ad614SDennis Dalessandro 	/*
1587f48ad614SDennis Dalessandro 	 * Don't decrement refcount and don't generate a
1588f48ad614SDennis Dalessandro 	 * completion if the SWQE is being resent until the send
1589f48ad614SDennis Dalessandro 	 * is finished.
1590f48ad614SDennis Dalessandro 	 */
15913ce5daa2SKaike Wan 	trace_hfi1_rc_completion(qp, wqe->lpsn);
1592f48ad614SDennis Dalessandro 	if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
1593f48ad614SDennis Dalessandro 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1594f48ad614SDennis Dalessandro 		u32 s_last;
1595f48ad614SDennis Dalessandro 
159624b11923SKaike Wan 		trdma_clean_swqe(qp, wqe);
1597c64607aaSMike Marciniszyn 		rvt_put_swqe(wqe);
1598ca95f802SKaike Wan 		rvt_qp_wqe_unreserve(qp, wqe);
1599f48ad614SDennis Dalessandro 		s_last = qp->s_last;
16009260b354SMike Marciniszyn 		trace_hfi1_qp_send_completion(qp, wqe, s_last);
1601f48ad614SDennis Dalessandro 		if (++s_last >= qp->s_size)
1602f48ad614SDennis Dalessandro 			s_last = 0;
1603f48ad614SDennis Dalessandro 		qp->s_last = s_last;
1604f48ad614SDennis Dalessandro 		/* see post_send() */
1605f48ad614SDennis Dalessandro 		barrier();
160643a474aaSMike Marciniszyn 		rvt_qp_swqe_complete(qp,
160743a474aaSMike Marciniszyn 				     wqe,
160843a474aaSMike Marciniszyn 				     ib_hfi1_wc_opcode[wqe->wr.opcode],
160943a474aaSMike Marciniszyn 				     IB_WC_SUCCESS);
1610f48ad614SDennis Dalessandro 	} else {
1611f48ad614SDennis Dalessandro 		struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1612f48ad614SDennis Dalessandro 
1613f48ad614SDennis Dalessandro 		this_cpu_inc(*ibp->rvp.rc_delayed_comp);
1614f48ad614SDennis Dalessandro 		/*
1615f48ad614SDennis Dalessandro 		 * If send progress not running attempt to progress
1616f48ad614SDennis Dalessandro 		 * SDMA queue.
1617f48ad614SDennis Dalessandro 		 */
1618f48ad614SDennis Dalessandro 		if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
1619f48ad614SDennis Dalessandro 			struct sdma_engine *engine;
1620d8966fcdSDasaratharaman Chandramouli 			u8 sl = rdma_ah_get_sl(&qp->remote_ah_attr);
1621f48ad614SDennis Dalessandro 			u8 sc5;
1622f48ad614SDennis Dalessandro 
1623f48ad614SDennis Dalessandro 			/* For now use sc to find engine */
1624d8966fcdSDasaratharaman Chandramouli 			sc5 = ibp->sl_to_sc[sl];
1625f48ad614SDennis Dalessandro 			engine = qp_to_sdma_engine(qp, sc5);
1626f48ad614SDennis Dalessandro 			sdma_engine_progress_schedule(engine);
1627f48ad614SDennis Dalessandro 		}
1628f48ad614SDennis Dalessandro 	}
1629f48ad614SDennis Dalessandro 
1630f48ad614SDennis Dalessandro 	qp->s_retry = qp->s_retry_cnt;
1631f48ad614SDennis Dalessandro 	update_last_psn(qp, wqe->lpsn);
1632f48ad614SDennis Dalessandro 
1633f48ad614SDennis Dalessandro 	/*
1634f48ad614SDennis Dalessandro 	 * If we are completing a request which is in the process of
1635f48ad614SDennis Dalessandro 	 * being resent, we can stop re-sending it since we know the
1636f48ad614SDennis Dalessandro 	 * responder has already seen it.
1637f48ad614SDennis Dalessandro 	 */
1638f48ad614SDennis Dalessandro 	if (qp->s_acked == qp->s_cur) {
1639f48ad614SDennis Dalessandro 		if (++qp->s_cur >= qp->s_size)
1640f48ad614SDennis Dalessandro 			qp->s_cur = 0;
1641f48ad614SDennis Dalessandro 		qp->s_acked = qp->s_cur;
1642f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
1643f48ad614SDennis Dalessandro 		if (qp->s_acked != qp->s_tail) {
1644f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
1645f48ad614SDennis Dalessandro 			qp->s_psn = wqe->psn;
1646f48ad614SDennis Dalessandro 		}
1647f48ad614SDennis Dalessandro 	} else {
1648f48ad614SDennis Dalessandro 		if (++qp->s_acked >= qp->s_size)
1649f48ad614SDennis Dalessandro 			qp->s_acked = 0;
1650f48ad614SDennis Dalessandro 		if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1651f48ad614SDennis Dalessandro 			qp->s_draining = 0;
1652f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1653f48ad614SDennis Dalessandro 	}
1654a0b34f75SKaike Wan 	if (priv->s_flags & HFI1_S_TID_WAIT_INTERLCK) {
1655a0b34f75SKaike Wan 		priv->s_flags &= ~HFI1_S_TID_WAIT_INTERLCK;
1656a0b34f75SKaike Wan 		hfi1_schedule_send(qp);
1657a0b34f75SKaike Wan 	}
1658f48ad614SDennis Dalessandro 	return wqe;
1659f48ad614SDennis Dalessandro }
1660f48ad614SDennis Dalessandro 
1661f48ad614SDennis Dalessandro /**
1662f48ad614SDennis Dalessandro  * do_rc_ack - process an incoming RC ACK
1663f48ad614SDennis Dalessandro  * @qp: the QP the ACK came in on
1664f48ad614SDennis Dalessandro  * @psn: the packet sequence number of the ACK
1665f48ad614SDennis Dalessandro  * @opcode: the opcode of the request that resulted in the ACK
1666f48ad614SDennis Dalessandro  *
1667f48ad614SDennis Dalessandro  * This is called from rc_rcv_resp() to process an incoming RC ACK
1668f48ad614SDennis Dalessandro  * for the given QP.
1669f48ad614SDennis Dalessandro  * May be called at interrupt level, with the QP s_lock held.
1670f48ad614SDennis Dalessandro  * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1671f48ad614SDennis Dalessandro  */
1672385156c5SKaike Wan int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
1673f48ad614SDennis Dalessandro 	      u64 val, struct hfi1_ctxtdata *rcd)
1674f48ad614SDennis Dalessandro {
1675f48ad614SDennis Dalessandro 	struct hfi1_ibport *ibp;
1676f48ad614SDennis Dalessandro 	enum ib_wc_status status;
167724b11923SKaike Wan 	struct hfi1_qp_priv *qpriv = qp->priv;
1678f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1679f48ad614SDennis Dalessandro 	int ret = 0;
1680f48ad614SDennis Dalessandro 	u32 ack_psn;
1681f48ad614SDennis Dalessandro 	int diff;
1682f48ad614SDennis Dalessandro 
168368e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1684f48ad614SDennis Dalessandro 	/*
1685f48ad614SDennis Dalessandro 	 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1686f48ad614SDennis Dalessandro 	 * requests and implicitly NAK RDMA read and atomic requests issued
1687f48ad614SDennis Dalessandro 	 * before the NAK'ed request.  The MSN won't include the NAK'ed
1688f48ad614SDennis Dalessandro 	 * request but will include an ACK'ed request(s).
1689f48ad614SDennis Dalessandro 	 */
1690f48ad614SDennis Dalessandro 	ack_psn = psn;
1691832666c1SDon Hiatt 	if (aeth >> IB_AETH_NAK_SHIFT)
1692f48ad614SDennis Dalessandro 		ack_psn--;
1693f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1694f3e862cbSSebastian Sanchez 	ibp = rcd_to_iport(rcd);
1695f48ad614SDennis Dalessandro 
1696f48ad614SDennis Dalessandro 	/*
1697f48ad614SDennis Dalessandro 	 * The MSN might be for a later WQE than the PSN indicates so
1698f48ad614SDennis Dalessandro 	 * only complete WQEs that the PSN finishes.
1699f48ad614SDennis Dalessandro 	 */
1700f48ad614SDennis Dalessandro 	while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
1701f48ad614SDennis Dalessandro 		/*
1702f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_ONLY is a special case since
1703f48ad614SDennis Dalessandro 		 * we want to generate completion events for everything
1704f48ad614SDennis Dalessandro 		 * before the RDMA read, copy the data, then generate
1705f48ad614SDennis Dalessandro 		 * the completion for the read.
1706f48ad614SDennis Dalessandro 		 */
1707f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ &&
1708f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
1709f48ad614SDennis Dalessandro 		    diff == 0) {
1710f48ad614SDennis Dalessandro 			ret = 1;
1711f48ad614SDennis Dalessandro 			goto bail_stop;
1712f48ad614SDennis Dalessandro 		}
1713f48ad614SDennis Dalessandro 		/*
1714f48ad614SDennis Dalessandro 		 * If this request is a RDMA read or atomic, and the ACK is
1715f48ad614SDennis Dalessandro 		 * for a later operation, this ACK NAKs the RDMA read or
1716f48ad614SDennis Dalessandro 		 * atomic.  In other words, only a RDMA_READ_LAST or ONLY
1717f48ad614SDennis Dalessandro 		 * can ACK a RDMA read and likewise for atomic ops.  Note
1718f48ad614SDennis Dalessandro 		 * that the NAK case can only happen if relaxed ordering is
1719f48ad614SDennis Dalessandro 		 * used and requests are sent after an RDMA read or atomic
1720f48ad614SDennis Dalessandro 		 * is sent but before the response is received.
1721f48ad614SDennis Dalessandro 		 */
1722f48ad614SDennis Dalessandro 		if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
1723f48ad614SDennis Dalessandro 		     (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
172424b11923SKaike Wan 		    (wqe->wr.opcode == IB_WR_TID_RDMA_READ &&
172524b11923SKaike Wan 		     (opcode != TID_OP(READ_RESP) || diff != 0)) ||
1726f48ad614SDennis Dalessandro 		    ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1727f48ad614SDennis Dalessandro 		      wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
1728f48ad614SDennis Dalessandro 		     (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
1729f48ad614SDennis Dalessandro 			/* Retry this request. */
1730f48ad614SDennis Dalessandro 			if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
1731f48ad614SDennis Dalessandro 				qp->r_flags |= RVT_R_RDMAR_SEQ;
173256acbbfbSVenkata Sandeep Dhanalakota 				hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
1733f48ad614SDennis Dalessandro 				if (list_empty(&qp->rspwait)) {
1734f48ad614SDennis Dalessandro 					qp->r_flags |= RVT_R_RSP_SEND;
17354d6f85c3SMike Marciniszyn 					rvt_get_qp(qp);
1736f48ad614SDennis Dalessandro 					list_add_tail(&qp->rspwait,
1737f48ad614SDennis Dalessandro 						      &rcd->qp_wait_list);
1738f48ad614SDennis Dalessandro 				}
1739f48ad614SDennis Dalessandro 			}
1740f48ad614SDennis Dalessandro 			/*
1741f48ad614SDennis Dalessandro 			 * No need to process the ACK/NAK since we are
1742f48ad614SDennis Dalessandro 			 * restarting an earlier request.
1743f48ad614SDennis Dalessandro 			 */
1744f48ad614SDennis Dalessandro 			goto bail_stop;
1745f48ad614SDennis Dalessandro 		}
1746f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1747f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1748f48ad614SDennis Dalessandro 			u64 *vaddr = wqe->sg_list[0].vaddr;
1749f48ad614SDennis Dalessandro 			*vaddr = val;
1750f48ad614SDennis Dalessandro 		}
175148a615dcSKaike Wan 		if (wqe->wr.opcode == IB_WR_OPFN)
175248a615dcSKaike Wan 			opfn_conn_reply(qp, val);
175348a615dcSKaike Wan 
1754f48ad614SDennis Dalessandro 		if (qp->s_num_rd_atomic &&
1755f48ad614SDennis Dalessandro 		    (wqe->wr.opcode == IB_WR_RDMA_READ ||
1756f48ad614SDennis Dalessandro 		     wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1757f48ad614SDennis Dalessandro 		     wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
1758f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic--;
1759f48ad614SDennis Dalessandro 			/* Restart sending task if fence is complete */
1760f48ad614SDennis Dalessandro 			if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
1761f48ad614SDennis Dalessandro 			    !qp->s_num_rd_atomic) {
1762f48ad614SDennis Dalessandro 				qp->s_flags &= ~(RVT_S_WAIT_FENCE |
1763f48ad614SDennis Dalessandro 						 RVT_S_WAIT_ACK);
1764f48ad614SDennis Dalessandro 				hfi1_schedule_send(qp);
1765f48ad614SDennis Dalessandro 			} else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
1766f48ad614SDennis Dalessandro 				qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
1767f48ad614SDennis Dalessandro 						 RVT_S_WAIT_ACK);
1768f48ad614SDennis Dalessandro 				hfi1_schedule_send(qp);
1769f48ad614SDennis Dalessandro 			}
1770f48ad614SDennis Dalessandro 		}
1771f48ad614SDennis Dalessandro 		wqe = do_rc_completion(qp, wqe, ibp);
1772f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
1773f48ad614SDennis Dalessandro 			break;
1774f48ad614SDennis Dalessandro 	}
1775f48ad614SDennis Dalessandro 
17763ce5daa2SKaike Wan 	trace_hfi1_rc_ack_do(qp, aeth, psn, wqe);
17773ce5daa2SKaike Wan 	trace_hfi1_sender_do_rc_ack(qp);
1778832666c1SDon Hiatt 	switch (aeth >> IB_AETH_NAK_SHIFT) {
1779f48ad614SDennis Dalessandro 	case 0:         /* ACK */
1780f48ad614SDennis Dalessandro 		this_cpu_inc(*ibp->rvp.rc_acks);
178124b11923SKaike Wan 		if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) {
178224b11923SKaike Wan 			if (wqe_to_tid_req(wqe)->ack_pending)
178324b11923SKaike Wan 				rvt_mod_retry_timer_ext(qp,
178424b11923SKaike Wan 							qpriv->timeout_shift);
178524b11923SKaike Wan 			else
178624b11923SKaike Wan 				rvt_stop_rc_timers(qp);
178724b11923SKaike Wan 		} else if (qp->s_acked != qp->s_tail) {
1788f48ad614SDennis Dalessandro 			/*
1789f48ad614SDennis Dalessandro 			 * We are expecting more ACKs so
1790f48ad614SDennis Dalessandro 			 * mod the retry timer.
1791f48ad614SDennis Dalessandro 			 */
179256acbbfbSVenkata Sandeep Dhanalakota 			rvt_mod_retry_timer(qp);
1793f48ad614SDennis Dalessandro 			/*
1794f48ad614SDennis Dalessandro 			 * We can stop re-sending the earlier packets and
1795f48ad614SDennis Dalessandro 			 * continue with the next packet the receiver wants.
1796f48ad614SDennis Dalessandro 			 */
1797f48ad614SDennis Dalessandro 			if (cmp_psn(qp->s_psn, psn) <= 0)
1798f48ad614SDennis Dalessandro 				reset_psn(qp, psn + 1);
1799f48ad614SDennis Dalessandro 		} else {
1800f48ad614SDennis Dalessandro 			/* No more acks - kill all timers */
180156acbbfbSVenkata Sandeep Dhanalakota 			rvt_stop_rc_timers(qp);
1802f48ad614SDennis Dalessandro 			if (cmp_psn(qp->s_psn, psn) <= 0) {
1803f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_LAST);
1804f48ad614SDennis Dalessandro 				qp->s_psn = psn + 1;
1805f48ad614SDennis Dalessandro 			}
1806f48ad614SDennis Dalessandro 		}
1807f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_ACK) {
1808f48ad614SDennis Dalessandro 			qp->s_flags &= ~RVT_S_WAIT_ACK;
1809f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
1810f48ad614SDennis Dalessandro 		}
1811696513e8SBrian Welty 		rvt_get_credit(qp, aeth);
1812f48ad614SDennis Dalessandro 		qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1813f48ad614SDennis Dalessandro 		qp->s_retry = qp->s_retry_cnt;
1814f48ad614SDennis Dalessandro 		update_last_psn(qp, psn);
1815f48ad614SDennis Dalessandro 		return 1;
1816f48ad614SDennis Dalessandro 
1817f48ad614SDennis Dalessandro 	case 1:         /* RNR NAK */
1818f48ad614SDennis Dalessandro 		ibp->rvp.n_rnr_naks++;
1819f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
1820f48ad614SDennis Dalessandro 			goto bail_stop;
1821f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_RNR)
1822f48ad614SDennis Dalessandro 			goto bail_stop;
1823f48ad614SDennis Dalessandro 		if (qp->s_rnr_retry == 0) {
1824f48ad614SDennis Dalessandro 			status = IB_WC_RNR_RETRY_EXC_ERR;
1825f48ad614SDennis Dalessandro 			goto class_b;
1826f48ad614SDennis Dalessandro 		}
1827f48ad614SDennis Dalessandro 		if (qp->s_rnr_retry_cnt < 7)
1828f48ad614SDennis Dalessandro 			qp->s_rnr_retry--;
1829f48ad614SDennis Dalessandro 
1830f48ad614SDennis Dalessandro 		/* The last valid PSN is the previous PSN. */
1831f48ad614SDennis Dalessandro 		update_last_psn(qp, psn - 1);
1832f48ad614SDennis Dalessandro 
1833f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
1834f48ad614SDennis Dalessandro 
1835f48ad614SDennis Dalessandro 		reset_psn(qp, psn);
1836f48ad614SDennis Dalessandro 
1837f48ad614SDennis Dalessandro 		qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
183856acbbfbSVenkata Sandeep Dhanalakota 		rvt_stop_rc_timers(qp);
183956acbbfbSVenkata Sandeep Dhanalakota 		rvt_add_rnr_timer(qp, aeth);
1840f48ad614SDennis Dalessandro 		return 0;
1841f48ad614SDennis Dalessandro 
1842f48ad614SDennis Dalessandro 	case 3:         /* NAK */
1843f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
1844f48ad614SDennis Dalessandro 			goto bail_stop;
1845f48ad614SDennis Dalessandro 		/* The last valid PSN is the previous PSN. */
1846f48ad614SDennis Dalessandro 		update_last_psn(qp, psn - 1);
1847832666c1SDon Hiatt 		switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
1848832666c1SDon Hiatt 			IB_AETH_CREDIT_MASK) {
1849f48ad614SDennis Dalessandro 		case 0: /* PSN sequence error */
1850f48ad614SDennis Dalessandro 			ibp->rvp.n_seq_naks++;
1851f48ad614SDennis Dalessandro 			/*
1852f48ad614SDennis Dalessandro 			 * Back up to the responder's expected PSN.
1853f48ad614SDennis Dalessandro 			 * Note that we might get a NAK in the middle of an
1854f48ad614SDennis Dalessandro 			 * RDMA READ response which terminates the RDMA
1855f48ad614SDennis Dalessandro 			 * READ.
1856f48ad614SDennis Dalessandro 			 */
185756acbbfbSVenkata Sandeep Dhanalakota 			hfi1_restart_rc(qp, psn, 0);
1858f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
1859f48ad614SDennis Dalessandro 			break;
1860f48ad614SDennis Dalessandro 
1861f48ad614SDennis Dalessandro 		case 1: /* Invalid Request */
1862f48ad614SDennis Dalessandro 			status = IB_WC_REM_INV_REQ_ERR;
1863f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
1864f48ad614SDennis Dalessandro 			goto class_b;
1865f48ad614SDennis Dalessandro 
1866f48ad614SDennis Dalessandro 		case 2: /* Remote Access Error */
1867f48ad614SDennis Dalessandro 			status = IB_WC_REM_ACCESS_ERR;
1868f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
1869f48ad614SDennis Dalessandro 			goto class_b;
1870f48ad614SDennis Dalessandro 
1871f48ad614SDennis Dalessandro 		case 3: /* Remote Operation Error */
1872f48ad614SDennis Dalessandro 			status = IB_WC_REM_OP_ERR;
1873f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
1874f48ad614SDennis Dalessandro class_b:
1875f48ad614SDennis Dalessandro 			if (qp->s_last == qp->s_acked) {
187624b11923SKaike Wan 				if (wqe->wr.opcode == IB_WR_TID_RDMA_READ)
187724b11923SKaike Wan 					hfi1_kern_read_tid_flow_free(qp);
187824b11923SKaike Wan 
187924b11923SKaike Wan 				hfi1_trdma_send_complete(qp, wqe, status);
1880f48ad614SDennis Dalessandro 				rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1881f48ad614SDennis Dalessandro 			}
1882f48ad614SDennis Dalessandro 			break;
1883f48ad614SDennis Dalessandro 
1884f48ad614SDennis Dalessandro 		default:
1885f48ad614SDennis Dalessandro 			/* Ignore other reserved NAK error codes */
1886f48ad614SDennis Dalessandro 			goto reserved;
1887f48ad614SDennis Dalessandro 		}
1888f48ad614SDennis Dalessandro 		qp->s_retry = qp->s_retry_cnt;
1889f48ad614SDennis Dalessandro 		qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1890f48ad614SDennis Dalessandro 		goto bail_stop;
1891f48ad614SDennis Dalessandro 
1892f48ad614SDennis Dalessandro 	default:                /* 2: reserved */
1893f48ad614SDennis Dalessandro reserved:
1894f48ad614SDennis Dalessandro 		/* Ignore reserved NAK codes. */
1895f48ad614SDennis Dalessandro 		goto bail_stop;
1896f48ad614SDennis Dalessandro 	}
1897f48ad614SDennis Dalessandro 	/* cannot be reached  */
1898f48ad614SDennis Dalessandro bail_stop:
189956acbbfbSVenkata Sandeep Dhanalakota 	rvt_stop_rc_timers(qp);
1900f48ad614SDennis Dalessandro 	return ret;
1901f48ad614SDennis Dalessandro }
1902f48ad614SDennis Dalessandro 
1903f48ad614SDennis Dalessandro /*
1904f48ad614SDennis Dalessandro  * We have seen an out of sequence RDMA read middle or last packet.
1905f48ad614SDennis Dalessandro  * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
1906f48ad614SDennis Dalessandro  */
1907f48ad614SDennis Dalessandro static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
1908f48ad614SDennis Dalessandro 			 struct hfi1_ctxtdata *rcd)
1909f48ad614SDennis Dalessandro {
1910f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1911f48ad614SDennis Dalessandro 
191268e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1913f48ad614SDennis Dalessandro 	/* Remove QP from retry timer */
191456acbbfbSVenkata Sandeep Dhanalakota 	rvt_stop_rc_timers(qp);
1915f48ad614SDennis Dalessandro 
1916f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1917f48ad614SDennis Dalessandro 
1918f48ad614SDennis Dalessandro 	while (cmp_psn(psn, wqe->lpsn) > 0) {
1919f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ ||
192024b11923SKaike Wan 		    wqe->wr.opcode == IB_WR_TID_RDMA_READ ||
1921f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1922f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
1923f48ad614SDennis Dalessandro 			break;
1924f48ad614SDennis Dalessandro 		wqe = do_rc_completion(qp, wqe, ibp);
1925f48ad614SDennis Dalessandro 	}
1926f48ad614SDennis Dalessandro 
1927f48ad614SDennis Dalessandro 	ibp->rvp.n_rdma_seq++;
1928f48ad614SDennis Dalessandro 	qp->r_flags |= RVT_R_RDMAR_SEQ;
192956acbbfbSVenkata Sandeep Dhanalakota 	hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
1930f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait)) {
1931f48ad614SDennis Dalessandro 		qp->r_flags |= RVT_R_RSP_SEND;
19324d6f85c3SMike Marciniszyn 		rvt_get_qp(qp);
1933f48ad614SDennis Dalessandro 		list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1934f48ad614SDennis Dalessandro 	}
1935f48ad614SDennis Dalessandro }
1936f48ad614SDennis Dalessandro 
1937f48ad614SDennis Dalessandro /**
1938f48ad614SDennis Dalessandro  * rc_rcv_resp - process an incoming RC response packet
19395b6cabb0SDon Hiatt  * @packet: data packet information
1940f48ad614SDennis Dalessandro  *
1941f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an incoming RC response
1942f48ad614SDennis Dalessandro  * packet for the given QP.
1943f48ad614SDennis Dalessandro  * Called at interrupt level.
1944f48ad614SDennis Dalessandro  */
19455b6cabb0SDon Hiatt static void rc_rcv_resp(struct hfi1_packet *packet)
1946f48ad614SDennis Dalessandro {
19475b6cabb0SDon Hiatt 	struct hfi1_ctxtdata *rcd = packet->rcd;
19485b6cabb0SDon Hiatt 	void *data = packet->payload;
19495b6cabb0SDon Hiatt 	u32 tlen = packet->tlen;
19505b6cabb0SDon Hiatt 	struct rvt_qp *qp = packet->qp;
1951bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp;
19525b6cabb0SDon Hiatt 	struct ib_other_headers *ohdr = packet->ohdr;
1953f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1954f48ad614SDennis Dalessandro 	enum ib_wc_status status;
1955f48ad614SDennis Dalessandro 	unsigned long flags;
1956f48ad614SDennis Dalessandro 	int diff;
1957f48ad614SDennis Dalessandro 	u64 val;
19585b6cabb0SDon Hiatt 	u32 aeth;
19595b6cabb0SDon Hiatt 	u32 psn = ib_bth_get_psn(packet->ohdr);
19605b6cabb0SDon Hiatt 	u32 pmtu = qp->pmtu;
19615b6cabb0SDon Hiatt 	u16 hdrsize = packet->hlen;
19625b6cabb0SDon Hiatt 	u8 opcode = packet->opcode;
19635b6cabb0SDon Hiatt 	u8 pad = packet->pad;
19645b6cabb0SDon Hiatt 	u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
1965f48ad614SDennis Dalessandro 
1966f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
1967462b6b21SSebastian Sanchez 	trace_hfi1_ack(qp, psn);
1968f48ad614SDennis Dalessandro 
1969f48ad614SDennis Dalessandro 	/* Ignore invalid responses. */
1970eb04ff09SMike Marciniszyn 	if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
1971f48ad614SDennis Dalessandro 		goto ack_done;
1972f48ad614SDennis Dalessandro 
1973f48ad614SDennis Dalessandro 	/* Ignore duplicate responses. */
1974f48ad614SDennis Dalessandro 	diff = cmp_psn(psn, qp->s_last_psn);
1975f48ad614SDennis Dalessandro 	if (unlikely(diff <= 0)) {
1976f48ad614SDennis Dalessandro 		/* Update credits for "ghost" ACKs */
1977f48ad614SDennis Dalessandro 		if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1978f48ad614SDennis Dalessandro 			aeth = be32_to_cpu(ohdr->u.aeth);
1979832666c1SDon Hiatt 			if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
1980696513e8SBrian Welty 				rvt_get_credit(qp, aeth);
1981f48ad614SDennis Dalessandro 		}
1982f48ad614SDennis Dalessandro 		goto ack_done;
1983f48ad614SDennis Dalessandro 	}
1984f48ad614SDennis Dalessandro 
1985f48ad614SDennis Dalessandro 	/*
1986f48ad614SDennis Dalessandro 	 * Skip everything other than the PSN we expect, if we are waiting
1987f48ad614SDennis Dalessandro 	 * for a reply to a restarted RDMA read or atomic op.
1988f48ad614SDennis Dalessandro 	 */
1989f48ad614SDennis Dalessandro 	if (qp->r_flags & RVT_R_RDMAR_SEQ) {
1990f48ad614SDennis Dalessandro 		if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
1991f48ad614SDennis Dalessandro 			goto ack_done;
1992f48ad614SDennis Dalessandro 		qp->r_flags &= ~RVT_R_RDMAR_SEQ;
1993f48ad614SDennis Dalessandro 	}
1994f48ad614SDennis Dalessandro 
1995f48ad614SDennis Dalessandro 	if (unlikely(qp->s_acked == qp->s_tail))
1996f48ad614SDennis Dalessandro 		goto ack_done;
1997f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1998f48ad614SDennis Dalessandro 	status = IB_WC_SUCCESS;
1999f48ad614SDennis Dalessandro 
2000f48ad614SDennis Dalessandro 	switch (opcode) {
2001f48ad614SDennis Dalessandro 	case OP(ACKNOWLEDGE):
2002f48ad614SDennis Dalessandro 	case OP(ATOMIC_ACKNOWLEDGE):
2003f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
2004f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
2005261a4351SMike Marciniszyn 		if (opcode == OP(ATOMIC_ACKNOWLEDGE))
2006261a4351SMike Marciniszyn 			val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
2007261a4351SMike Marciniszyn 		else
2008f48ad614SDennis Dalessandro 			val = 0;
2009f48ad614SDennis Dalessandro 		if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
2010f48ad614SDennis Dalessandro 		    opcode != OP(RDMA_READ_RESPONSE_FIRST))
2011f48ad614SDennis Dalessandro 			goto ack_done;
2012f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
2013f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
2014f48ad614SDennis Dalessandro 			goto ack_op_err;
2015f48ad614SDennis Dalessandro 		/*
2016f48ad614SDennis Dalessandro 		 * If this is a response to a resent RDMA read, we
2017f48ad614SDennis Dalessandro 		 * have to be careful to copy the data to the right
2018f48ad614SDennis Dalessandro 		 * location.
2019f48ad614SDennis Dalessandro 		 */
2020f48ad614SDennis Dalessandro 		qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
2021f48ad614SDennis Dalessandro 						  wqe, psn, pmtu);
2022f48ad614SDennis Dalessandro 		goto read_middle;
2023f48ad614SDennis Dalessandro 
2024f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
2025f48ad614SDennis Dalessandro 		/* no AETH, no ACK */
2026f48ad614SDennis Dalessandro 		if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
2027f48ad614SDennis Dalessandro 			goto ack_seq_err;
2028f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
2029f48ad614SDennis Dalessandro 			goto ack_op_err;
2030f48ad614SDennis Dalessandro read_middle:
20315b6cabb0SDon Hiatt 		if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
2032f48ad614SDennis Dalessandro 			goto ack_len_err;
2033f48ad614SDennis Dalessandro 		if (unlikely(pmtu >= qp->s_rdma_read_len))
2034f48ad614SDennis Dalessandro 			goto ack_len_err;
2035f48ad614SDennis Dalessandro 
2036f48ad614SDennis Dalessandro 		/*
2037f48ad614SDennis Dalessandro 		 * We got a response so update the timeout.
2038f48ad614SDennis Dalessandro 		 * 4.096 usec. * (1 << qp->timeout)
2039f48ad614SDennis Dalessandro 		 */
204056acbbfbSVenkata Sandeep Dhanalakota 		rvt_mod_retry_timer(qp);
2041f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_ACK) {
2042f48ad614SDennis Dalessandro 			qp->s_flags &= ~RVT_S_WAIT_ACK;
2043f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
2044f48ad614SDennis Dalessandro 		}
2045f48ad614SDennis Dalessandro 
2046f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
2047f48ad614SDennis Dalessandro 			qp->s_retry = qp->s_retry_cnt;
2048f48ad614SDennis Dalessandro 
2049f48ad614SDennis Dalessandro 		/*
2050f48ad614SDennis Dalessandro 		 * Update the RDMA receive state but do the copy w/o
2051f48ad614SDennis Dalessandro 		 * holding the locks and blocking interrupts.
2052f48ad614SDennis Dalessandro 		 */
2053f48ad614SDennis Dalessandro 		qp->s_rdma_read_len -= pmtu;
2054f48ad614SDennis Dalessandro 		update_last_psn(qp, psn);
2055f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
2056019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->s_rdma_read_sge,
2057019f118bSBrian Welty 			     data, pmtu, false, false);
2058f48ad614SDennis Dalessandro 		goto bail;
2059f48ad614SDennis Dalessandro 
2060f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_ONLY):
2061f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
2062f48ad614SDennis Dalessandro 		if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
2063f48ad614SDennis Dalessandro 			goto ack_done;
2064f48ad614SDennis Dalessandro 		/*
2065f48ad614SDennis Dalessandro 		 * Check that the data size is >= 0 && <= pmtu.
2066f48ad614SDennis Dalessandro 		 * Remember to account for ICRC (4).
2067f48ad614SDennis Dalessandro 		 */
20685b6cabb0SDon Hiatt 		if (unlikely(tlen < (hdrsize + extra_bytes)))
2069f48ad614SDennis Dalessandro 			goto ack_len_err;
2070f48ad614SDennis Dalessandro 		/*
2071f48ad614SDennis Dalessandro 		 * If this is a response to a resent RDMA read, we
2072f48ad614SDennis Dalessandro 		 * have to be careful to copy the data to the right
2073f48ad614SDennis Dalessandro 		 * location.
2074f48ad614SDennis Dalessandro 		 */
2075f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
2076f48ad614SDennis Dalessandro 		qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
2077f48ad614SDennis Dalessandro 						  wqe, psn, pmtu);
2078f48ad614SDennis Dalessandro 		goto read_last;
2079f48ad614SDennis Dalessandro 
2080f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
2081f48ad614SDennis Dalessandro 		/* ACKs READ req. */
2082f48ad614SDennis Dalessandro 		if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
2083f48ad614SDennis Dalessandro 			goto ack_seq_err;
2084f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
2085f48ad614SDennis Dalessandro 			goto ack_op_err;
2086f48ad614SDennis Dalessandro 		/*
2087f48ad614SDennis Dalessandro 		 * Check that the data size is >= 1 && <= pmtu.
2088f48ad614SDennis Dalessandro 		 * Remember to account for ICRC (4).
2089f48ad614SDennis Dalessandro 		 */
20905b6cabb0SDon Hiatt 		if (unlikely(tlen <= (hdrsize + extra_bytes)))
2091f48ad614SDennis Dalessandro 			goto ack_len_err;
2092f48ad614SDennis Dalessandro read_last:
20935b6cabb0SDon Hiatt 		tlen -= hdrsize + extra_bytes;
2094f48ad614SDennis Dalessandro 		if (unlikely(tlen != qp->s_rdma_read_len))
2095f48ad614SDennis Dalessandro 			goto ack_len_err;
2096f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
2097019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->s_rdma_read_sge,
2098019f118bSBrian Welty 			     data, tlen, false, false);
2099f48ad614SDennis Dalessandro 		WARN_ON(qp->s_rdma_read_sge.num_sge);
2100f48ad614SDennis Dalessandro 		(void)do_rc_ack(qp, aeth, psn,
2101f48ad614SDennis Dalessandro 				 OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
2102f48ad614SDennis Dalessandro 		goto ack_done;
2103f48ad614SDennis Dalessandro 	}
2104f48ad614SDennis Dalessandro 
2105f48ad614SDennis Dalessandro ack_op_err:
2106f48ad614SDennis Dalessandro 	status = IB_WC_LOC_QP_OP_ERR;
2107f48ad614SDennis Dalessandro 	goto ack_err;
2108f48ad614SDennis Dalessandro 
2109f48ad614SDennis Dalessandro ack_seq_err:
2110bdaf96f6SSebastian Sanchez 	ibp = rcd_to_iport(rcd);
2111f48ad614SDennis Dalessandro 	rdma_seq_err(qp, ibp, psn, rcd);
2112f48ad614SDennis Dalessandro 	goto ack_done;
2113f48ad614SDennis Dalessandro 
2114f48ad614SDennis Dalessandro ack_len_err:
2115f48ad614SDennis Dalessandro 	status = IB_WC_LOC_LEN_ERR;
2116f48ad614SDennis Dalessandro ack_err:
2117f48ad614SDennis Dalessandro 	if (qp->s_last == qp->s_acked) {
2118116aa033SVenkata Sandeep Dhanalakota 		rvt_send_complete(qp, wqe, status);
2119f48ad614SDennis Dalessandro 		rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
2120f48ad614SDennis Dalessandro 	}
2121f48ad614SDennis Dalessandro ack_done:
2122f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2123f48ad614SDennis Dalessandro bail:
2124f48ad614SDennis Dalessandro 	return;
2125f48ad614SDennis Dalessandro }
2126f48ad614SDennis Dalessandro 
2127f48ad614SDennis Dalessandro static inline void rc_cancel_ack(struct rvt_qp *qp)
2128f48ad614SDennis Dalessandro {
2129688f21c0SMike Marciniszyn 	qp->r_adefered = 0;
2130f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait))
2131f48ad614SDennis Dalessandro 		return;
2132f48ad614SDennis Dalessandro 	list_del_init(&qp->rspwait);
2133f48ad614SDennis Dalessandro 	qp->r_flags &= ~RVT_R_RSP_NAK;
21344d6f85c3SMike Marciniszyn 	rvt_put_qp(qp);
2135f48ad614SDennis Dalessandro }
2136f48ad614SDennis Dalessandro 
2137f48ad614SDennis Dalessandro /**
2138f48ad614SDennis Dalessandro  * rc_rcv_error - process an incoming duplicate or error RC packet
2139f48ad614SDennis Dalessandro  * @ohdr: the other headers for this packet
2140f48ad614SDennis Dalessandro  * @data: the packet data
2141f48ad614SDennis Dalessandro  * @qp: the QP for this packet
2142f48ad614SDennis Dalessandro  * @opcode: the opcode for this packet
2143f48ad614SDennis Dalessandro  * @psn: the packet sequence number for this packet
2144f48ad614SDennis Dalessandro  * @diff: the difference between the PSN and the expected PSN
2145f48ad614SDennis Dalessandro  *
2146f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an unexpected
2147f48ad614SDennis Dalessandro  * incoming RC packet for the given QP.
2148f48ad614SDennis Dalessandro  * Called at interrupt level.
2149f48ad614SDennis Dalessandro  * Return 1 if no more processing is needed; otherwise return 0 to
2150f48ad614SDennis Dalessandro  * schedule a response to be sent.
2151f48ad614SDennis Dalessandro  */
2152261a4351SMike Marciniszyn static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
2153f48ad614SDennis Dalessandro 				 struct rvt_qp *qp, u32 opcode, u32 psn,
2154f48ad614SDennis Dalessandro 				 int diff, struct hfi1_ctxtdata *rcd)
2155f48ad614SDennis Dalessandro {
2156f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
2157f48ad614SDennis Dalessandro 	struct rvt_ack_entry *e;
2158f48ad614SDennis Dalessandro 	unsigned long flags;
2159385156c5SKaike Wan 	u8 prev;
2160385156c5SKaike Wan 	u8 mra; /* most recent ACK */
2161385156c5SKaike Wan 	bool old_req;
2162f48ad614SDennis Dalessandro 
2163462b6b21SSebastian Sanchez 	trace_hfi1_rcv_error(qp, psn);
2164f48ad614SDennis Dalessandro 	if (diff > 0) {
2165f48ad614SDennis Dalessandro 		/*
2166f48ad614SDennis Dalessandro 		 * Packet sequence error.
2167f48ad614SDennis Dalessandro 		 * A NAK will ACK earlier sends and RDMA writes.
2168f48ad614SDennis Dalessandro 		 * Don't queue the NAK if we already sent one.
2169f48ad614SDennis Dalessandro 		 */
2170f48ad614SDennis Dalessandro 		if (!qp->r_nak_state) {
2171f48ad614SDennis Dalessandro 			ibp->rvp.n_rc_seqnak++;
2172f48ad614SDennis Dalessandro 			qp->r_nak_state = IB_NAK_PSN_ERROR;
2173f48ad614SDennis Dalessandro 			/* Use the expected PSN. */
2174f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn;
2175f48ad614SDennis Dalessandro 			/*
2176f48ad614SDennis Dalessandro 			 * Wait to send the sequence NAK until all packets
2177f48ad614SDennis Dalessandro 			 * in the receive queue have been processed.
2178f48ad614SDennis Dalessandro 			 * Otherwise, we end up propagating congestion.
2179f48ad614SDennis Dalessandro 			 */
2180f48ad614SDennis Dalessandro 			rc_defered_ack(rcd, qp);
2181f48ad614SDennis Dalessandro 		}
2182f48ad614SDennis Dalessandro 		goto done;
2183f48ad614SDennis Dalessandro 	}
2184f48ad614SDennis Dalessandro 
2185f48ad614SDennis Dalessandro 	/*
2186f48ad614SDennis Dalessandro 	 * Handle a duplicate request.  Don't re-execute SEND, RDMA
2187f48ad614SDennis Dalessandro 	 * write or atomic op.  Don't NAK errors, just silently drop
2188f48ad614SDennis Dalessandro 	 * the duplicate request.  Note that r_sge, r_len, and
2189f48ad614SDennis Dalessandro 	 * r_rcv_len may be in use so don't modify them.
2190f48ad614SDennis Dalessandro 	 *
2191f48ad614SDennis Dalessandro 	 * We are supposed to ACK the earliest duplicate PSN but we
2192f48ad614SDennis Dalessandro 	 * can coalesce an outstanding duplicate ACK.  We have to
2193f48ad614SDennis Dalessandro 	 * send the earliest so that RDMA reads can be restarted at
2194f48ad614SDennis Dalessandro 	 * the requester's expected PSN.
2195f48ad614SDennis Dalessandro 	 *
2196f48ad614SDennis Dalessandro 	 * First, find where this duplicate PSN falls within the
2197f48ad614SDennis Dalessandro 	 * ACKs previously sent.
2198f48ad614SDennis Dalessandro 	 * old_req is true if there is an older response that is scheduled
2199f48ad614SDennis Dalessandro 	 * to be sent before sending this one.
2200f48ad614SDennis Dalessandro 	 */
2201f48ad614SDennis Dalessandro 	e = NULL;
2202f48ad614SDennis Dalessandro 	old_req = 1;
2203f48ad614SDennis Dalessandro 	ibp->rvp.n_rc_dupreq++;
2204f48ad614SDennis Dalessandro 
2205f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
2206f48ad614SDennis Dalessandro 
2207385156c5SKaike Wan 	e = find_prev_entry(qp, psn, &prev, &mra, &old_req);
2208385156c5SKaike Wan 
2209f48ad614SDennis Dalessandro 	switch (opcode) {
2210f48ad614SDennis Dalessandro 	case OP(RDMA_READ_REQUEST): {
2211f48ad614SDennis Dalessandro 		struct ib_reth *reth;
2212f48ad614SDennis Dalessandro 		u32 offset;
2213f48ad614SDennis Dalessandro 		u32 len;
2214f48ad614SDennis Dalessandro 
2215f48ad614SDennis Dalessandro 		/*
2216f48ad614SDennis Dalessandro 		 * If we didn't find the RDMA read request in the ack queue,
2217f48ad614SDennis Dalessandro 		 * we can ignore this request.
2218f48ad614SDennis Dalessandro 		 */
2219f48ad614SDennis Dalessandro 		if (!e || e->opcode != OP(RDMA_READ_REQUEST))
2220f48ad614SDennis Dalessandro 			goto unlock_done;
2221f48ad614SDennis Dalessandro 		/* RETH comes after BTH */
2222f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2223f48ad614SDennis Dalessandro 		/*
2224f48ad614SDennis Dalessandro 		 * Address range must be a subset of the original
2225f48ad614SDennis Dalessandro 		 * request and start on pmtu boundaries.
2226f48ad614SDennis Dalessandro 		 * We reuse the old ack_queue slot since the requester
2227f48ad614SDennis Dalessandro 		 * should not back up and request an earlier PSN for the
2228f48ad614SDennis Dalessandro 		 * same request.
2229f48ad614SDennis Dalessandro 		 */
2230f48ad614SDennis Dalessandro 		offset = delta_psn(psn, e->psn) * qp->pmtu;
2231f48ad614SDennis Dalessandro 		len = be32_to_cpu(reth->length);
2232f48ad614SDennis Dalessandro 		if (unlikely(offset + len != e->rdma_sge.sge_length))
2233f48ad614SDennis Dalessandro 			goto unlock_done;
2234f48ad614SDennis Dalessandro 		if (e->rdma_sge.mr) {
2235f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
2236f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2237f48ad614SDennis Dalessandro 		}
2238f48ad614SDennis Dalessandro 		if (len != 0) {
2239f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2240261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2241f48ad614SDennis Dalessandro 			int ok;
2242f48ad614SDennis Dalessandro 
2243f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
2244f48ad614SDennis Dalessandro 					 IB_ACCESS_REMOTE_READ);
2245f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2246f48ad614SDennis Dalessandro 				goto unlock_done;
2247f48ad614SDennis Dalessandro 		} else {
2248f48ad614SDennis Dalessandro 			e->rdma_sge.vaddr = NULL;
2249f48ad614SDennis Dalessandro 			e->rdma_sge.length = 0;
2250f48ad614SDennis Dalessandro 			e->rdma_sge.sge_length = 0;
2251f48ad614SDennis Dalessandro 		}
2252f48ad614SDennis Dalessandro 		e->psn = psn;
2253f48ad614SDennis Dalessandro 		if (old_req)
2254f48ad614SDennis Dalessandro 			goto unlock_done;
22554f9264d1SKaike Wan 		if (qp->s_acked_ack_queue == qp->s_tail_ack_queue)
22564f9264d1SKaike Wan 			qp->s_acked_ack_queue = prev;
2257f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = prev;
2258f48ad614SDennis Dalessandro 		break;
2259f48ad614SDennis Dalessandro 	}
2260f48ad614SDennis Dalessandro 
2261f48ad614SDennis Dalessandro 	case OP(COMPARE_SWAP):
2262f48ad614SDennis Dalessandro 	case OP(FETCH_ADD): {
2263f48ad614SDennis Dalessandro 		/*
2264f48ad614SDennis Dalessandro 		 * If we didn't find the atomic request in the ack queue
2265ca00c62bSDennis Dalessandro 		 * or the send engine is already backed up to send an
2266f48ad614SDennis Dalessandro 		 * earlier entry, we can ignore this request.
2267f48ad614SDennis Dalessandro 		 */
2268f48ad614SDennis Dalessandro 		if (!e || e->opcode != (u8)opcode || old_req)
2269f48ad614SDennis Dalessandro 			goto unlock_done;
22704f9264d1SKaike Wan 		if (qp->s_tail_ack_queue == qp->s_acked_ack_queue)
22714f9264d1SKaike Wan 			qp->s_acked_ack_queue = prev;
2272f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = prev;
2273f48ad614SDennis Dalessandro 		break;
2274f48ad614SDennis Dalessandro 	}
2275f48ad614SDennis Dalessandro 
2276f48ad614SDennis Dalessandro 	default:
2277f48ad614SDennis Dalessandro 		/*
2278f48ad614SDennis Dalessandro 		 * Ignore this operation if it doesn't request an ACK
2279f48ad614SDennis Dalessandro 		 * or an earlier RDMA read or atomic is going to be resent.
2280f48ad614SDennis Dalessandro 		 */
2281f48ad614SDennis Dalessandro 		if (!(psn & IB_BTH_REQ_ACK) || old_req)
2282f48ad614SDennis Dalessandro 			goto unlock_done;
2283f48ad614SDennis Dalessandro 		/*
2284f48ad614SDennis Dalessandro 		 * Resend the most recent ACK if this request is
2285f48ad614SDennis Dalessandro 		 * after all the previous RDMA reads and atomics.
2286f48ad614SDennis Dalessandro 		 */
2287385156c5SKaike Wan 		if (mra == qp->r_head_ack_queue) {
2288f48ad614SDennis Dalessandro 			spin_unlock_irqrestore(&qp->s_lock, flags);
2289f48ad614SDennis Dalessandro 			qp->r_nak_state = 0;
2290f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn - 1;
2291f48ad614SDennis Dalessandro 			goto send_ack;
2292f48ad614SDennis Dalessandro 		}
2293f48ad614SDennis Dalessandro 
2294f48ad614SDennis Dalessandro 		/*
2295f48ad614SDennis Dalessandro 		 * Resend the RDMA read or atomic op which
2296f48ad614SDennis Dalessandro 		 * ACKs this duplicate request.
2297f48ad614SDennis Dalessandro 		 */
22984f9264d1SKaike Wan 		if (qp->s_tail_ack_queue == qp->s_acked_ack_queue)
22994f9264d1SKaike Wan 			qp->s_acked_ack_queue = mra;
2300385156c5SKaike Wan 		qp->s_tail_ack_queue = mra;
2301f48ad614SDennis Dalessandro 		break;
2302f48ad614SDennis Dalessandro 	}
2303f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
2304f48ad614SDennis Dalessandro 	qp->s_flags |= RVT_S_RESP_PENDING;
2305f48ad614SDennis Dalessandro 	qp->r_nak_state = 0;
2306f48ad614SDennis Dalessandro 	hfi1_schedule_send(qp);
2307f48ad614SDennis Dalessandro 
2308f48ad614SDennis Dalessandro unlock_done:
2309f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2310f48ad614SDennis Dalessandro done:
2311f48ad614SDennis Dalessandro 	return 1;
2312f48ad614SDennis Dalessandro 
2313f48ad614SDennis Dalessandro send_ack:
2314f48ad614SDennis Dalessandro 	return 0;
2315f48ad614SDennis Dalessandro }
2316f48ad614SDennis Dalessandro 
2317f48ad614SDennis Dalessandro static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
2318f48ad614SDennis Dalessandro 			  u32 lqpn, u32 rqpn, u8 svc_type)
2319f48ad614SDennis Dalessandro {
2320f48ad614SDennis Dalessandro 	struct opa_hfi1_cong_log_event_internal *cc_event;
2321f48ad614SDennis Dalessandro 	unsigned long flags;
2322f48ad614SDennis Dalessandro 
2323f48ad614SDennis Dalessandro 	if (sl >= OPA_MAX_SLS)
2324f48ad614SDennis Dalessandro 		return;
2325f48ad614SDennis Dalessandro 
2326f48ad614SDennis Dalessandro 	spin_lock_irqsave(&ppd->cc_log_lock, flags);
2327f48ad614SDennis Dalessandro 
2328f48ad614SDennis Dalessandro 	ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
2329f48ad614SDennis Dalessandro 	ppd->threshold_event_counter++;
2330f48ad614SDennis Dalessandro 
2331f48ad614SDennis Dalessandro 	cc_event = &ppd->cc_events[ppd->cc_log_idx++];
2332f48ad614SDennis Dalessandro 	if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
2333f48ad614SDennis Dalessandro 		ppd->cc_log_idx = 0;
2334f48ad614SDennis Dalessandro 	cc_event->lqpn = lqpn & RVT_QPN_MASK;
2335f48ad614SDennis Dalessandro 	cc_event->rqpn = rqpn & RVT_QPN_MASK;
2336f48ad614SDennis Dalessandro 	cc_event->sl = sl;
2337f48ad614SDennis Dalessandro 	cc_event->svc_type = svc_type;
2338f48ad614SDennis Dalessandro 	cc_event->rlid = rlid;
2339f48ad614SDennis Dalessandro 	/* keep timestamp in units of 1.024 usec */
2340d61ea075SMike Marciniszyn 	cc_event->timestamp = ktime_get_ns() / 1024;
2341f48ad614SDennis Dalessandro 
2342f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
2343f48ad614SDennis Dalessandro }
2344f48ad614SDennis Dalessandro 
23455b6cabb0SDon Hiatt void process_becn(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, u32 lqpn,
2346f48ad614SDennis Dalessandro 		  u32 rqpn, u8 svc_type)
2347f48ad614SDennis Dalessandro {
2348f48ad614SDennis Dalessandro 	struct cca_timer *cca_timer;
2349f48ad614SDennis Dalessandro 	u16 ccti, ccti_incr, ccti_timer, ccti_limit;
2350f48ad614SDennis Dalessandro 	u8 trigger_threshold;
2351f48ad614SDennis Dalessandro 	struct cc_state *cc_state;
2352f48ad614SDennis Dalessandro 	unsigned long flags;
2353f48ad614SDennis Dalessandro 
2354f48ad614SDennis Dalessandro 	if (sl >= OPA_MAX_SLS)
2355f48ad614SDennis Dalessandro 		return;
2356f48ad614SDennis Dalessandro 
2357f48ad614SDennis Dalessandro 	cc_state = get_cc_state(ppd);
2358f48ad614SDennis Dalessandro 
2359f48ad614SDennis Dalessandro 	if (!cc_state)
2360f48ad614SDennis Dalessandro 		return;
2361f48ad614SDennis Dalessandro 
2362f48ad614SDennis Dalessandro 	/*
2363f48ad614SDennis Dalessandro 	 * 1) increase CCTI (for this SL)
2364f48ad614SDennis Dalessandro 	 * 2) select IPG (i.e., call set_link_ipg())
2365f48ad614SDennis Dalessandro 	 * 3) start timer
2366f48ad614SDennis Dalessandro 	 */
2367f48ad614SDennis Dalessandro 	ccti_limit = cc_state->cct.ccti_limit;
2368f48ad614SDennis Dalessandro 	ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
2369f48ad614SDennis Dalessandro 	ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
2370f48ad614SDennis Dalessandro 	trigger_threshold =
2371f48ad614SDennis Dalessandro 		cc_state->cong_setting.entries[sl].trigger_threshold;
2372f48ad614SDennis Dalessandro 
2373f48ad614SDennis Dalessandro 	spin_lock_irqsave(&ppd->cca_timer_lock, flags);
2374f48ad614SDennis Dalessandro 
2375f48ad614SDennis Dalessandro 	cca_timer = &ppd->cca_timer[sl];
2376f48ad614SDennis Dalessandro 	if (cca_timer->ccti < ccti_limit) {
2377f48ad614SDennis Dalessandro 		if (cca_timer->ccti + ccti_incr <= ccti_limit)
2378f48ad614SDennis Dalessandro 			cca_timer->ccti += ccti_incr;
2379f48ad614SDennis Dalessandro 		else
2380f48ad614SDennis Dalessandro 			cca_timer->ccti = ccti_limit;
2381f48ad614SDennis Dalessandro 		set_link_ipg(ppd);
2382f48ad614SDennis Dalessandro 	}
2383f48ad614SDennis Dalessandro 
2384f48ad614SDennis Dalessandro 	ccti = cca_timer->ccti;
2385f48ad614SDennis Dalessandro 
2386f48ad614SDennis Dalessandro 	if (!hrtimer_active(&cca_timer->hrtimer)) {
2387f48ad614SDennis Dalessandro 		/* ccti_timer is in units of 1.024 usec */
2388f48ad614SDennis Dalessandro 		unsigned long nsec = 1024 * ccti_timer;
2389f48ad614SDennis Dalessandro 
2390f48ad614SDennis Dalessandro 		hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
23913ce459cdSMike Marciniszyn 			      HRTIMER_MODE_REL_PINNED);
2392f48ad614SDennis Dalessandro 	}
2393f48ad614SDennis Dalessandro 
2394f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
2395f48ad614SDennis Dalessandro 
2396f48ad614SDennis Dalessandro 	if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
2397f48ad614SDennis Dalessandro 		log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
2398f48ad614SDennis Dalessandro }
2399f48ad614SDennis Dalessandro 
2400f48ad614SDennis Dalessandro /**
2401f48ad614SDennis Dalessandro  * hfi1_rc_rcv - process an incoming RC packet
24025b6cabb0SDon Hiatt  * @packet: data packet information
2403f48ad614SDennis Dalessandro  *
2404f48ad614SDennis Dalessandro  * This is called from qp_rcv() to process an incoming RC packet
2405f48ad614SDennis Dalessandro  * for the given QP.
2406f48ad614SDennis Dalessandro  * May be called at interrupt level.
2407f48ad614SDennis Dalessandro  */
2408f48ad614SDennis Dalessandro void hfi1_rc_rcv(struct hfi1_packet *packet)
2409f48ad614SDennis Dalessandro {
2410f48ad614SDennis Dalessandro 	struct hfi1_ctxtdata *rcd = packet->rcd;
241172c07e2bSDon Hiatt 	void *data = packet->payload;
2412f48ad614SDennis Dalessandro 	u32 tlen = packet->tlen;
2413f48ad614SDennis Dalessandro 	struct rvt_qp *qp = packet->qp;
2414f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
2415261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr = packet->ohdr;
24169039746cSDon Hiatt 	u32 opcode = packet->opcode;
2417f48ad614SDennis Dalessandro 	u32 hdrsize = packet->hlen;
24185b6cabb0SDon Hiatt 	u32 psn = ib_bth_get_psn(packet->ohdr);
24199039746cSDon Hiatt 	u32 pad = packet->pad;
2420f48ad614SDennis Dalessandro 	struct ib_wc wc;
2421f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
2422f48ad614SDennis Dalessandro 	int diff;
2423f48ad614SDennis Dalessandro 	struct ib_reth *reth;
2424f48ad614SDennis Dalessandro 	unsigned long flags;
24254608e4c8SDennis Dalessandro 	int ret;
2426fe4dd423SMitko Haralanov 	bool copy_last = false, fecn;
2427a2df0c83SJianxin Xiong 	u32 rkey;
24285b6cabb0SDon Hiatt 	u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
2429f48ad614SDennis Dalessandro 
243068e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->r_lock);
24319039746cSDon Hiatt 
24329039746cSDon Hiatt 	if (hfi1_ruc_check_hdr(ibp, packet))
2433f48ad614SDennis Dalessandro 		return;
2434f48ad614SDennis Dalessandro 
2435fe4dd423SMitko Haralanov 	fecn = process_ecn(qp, packet);
243648a615dcSKaike Wan 	opfn_trigger_conn_request(qp, be32_to_cpu(ohdr->bth[1]));
2437f48ad614SDennis Dalessandro 
2438f48ad614SDennis Dalessandro 	/*
2439f48ad614SDennis Dalessandro 	 * Process responses (ACKs) before anything else.  Note that the
2440f48ad614SDennis Dalessandro 	 * packet sequence number will be for something in the send work
2441f48ad614SDennis Dalessandro 	 * queue rather than the expected receive packet sequence number.
2442f48ad614SDennis Dalessandro 	 * In other words, this QP is the requester.
2443f48ad614SDennis Dalessandro 	 */
2444f48ad614SDennis Dalessandro 	if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
2445f48ad614SDennis Dalessandro 	    opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
24465b6cabb0SDon Hiatt 		rc_rcv_resp(packet);
2447f48ad614SDennis Dalessandro 		return;
2448f48ad614SDennis Dalessandro 	}
2449f48ad614SDennis Dalessandro 
2450f48ad614SDennis Dalessandro 	/* Compute 24 bits worth of difference. */
2451f48ad614SDennis Dalessandro 	diff = delta_psn(psn, qp->r_psn);
2452f48ad614SDennis Dalessandro 	if (unlikely(diff)) {
2453f48ad614SDennis Dalessandro 		if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
2454f48ad614SDennis Dalessandro 			return;
2455f48ad614SDennis Dalessandro 		goto send_ack;
2456f48ad614SDennis Dalessandro 	}
2457f48ad614SDennis Dalessandro 
2458f48ad614SDennis Dalessandro 	/* Check for opcode sequence errors. */
2459f48ad614SDennis Dalessandro 	switch (qp->r_state) {
2460f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
2461f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
2462f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_MIDDLE) ||
2463f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST) ||
2464a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
2465a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_INVALIDATE))
2466f48ad614SDennis Dalessandro 			break;
2467f48ad614SDennis Dalessandro 		goto nack_inv;
2468f48ad614SDennis Dalessandro 
2469f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
2470f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
2471f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_MIDDLE) ||
2472f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST) ||
2473f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2474f48ad614SDennis Dalessandro 			break;
2475f48ad614SDennis Dalessandro 		goto nack_inv;
2476f48ad614SDennis Dalessandro 
2477f48ad614SDennis Dalessandro 	default:
2478f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_MIDDLE) ||
2479f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST) ||
2480f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
2481a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
2482f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_MIDDLE) ||
2483f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST) ||
2484f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2485f48ad614SDennis Dalessandro 			goto nack_inv;
2486f48ad614SDennis Dalessandro 		/*
2487f48ad614SDennis Dalessandro 		 * Note that it is up to the requester to not send a new
2488f48ad614SDennis Dalessandro 		 * RDMA read or atomic operation before receiving an ACK
2489f48ad614SDennis Dalessandro 		 * for the previous operation.
2490f48ad614SDennis Dalessandro 		 */
2491f48ad614SDennis Dalessandro 		break;
2492f48ad614SDennis Dalessandro 	}
2493f48ad614SDennis Dalessandro 
2494f48ad614SDennis Dalessandro 	if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
2495beb5a042SBrian Welty 		rvt_comm_est(qp);
2496f48ad614SDennis Dalessandro 
2497f48ad614SDennis Dalessandro 	/* OK, process the packet. */
2498f48ad614SDennis Dalessandro 	switch (opcode) {
2499f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
2500832369faSBrian Welty 		ret = rvt_get_rwqe(qp, false);
2501f48ad614SDennis Dalessandro 		if (ret < 0)
2502f48ad614SDennis Dalessandro 			goto nack_op_err;
2503f48ad614SDennis Dalessandro 		if (!ret)
2504f48ad614SDennis Dalessandro 			goto rnr_nak;
2505f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2506f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
2507f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
2508f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
2509f48ad614SDennis Dalessandro send_middle:
2510f48ad614SDennis Dalessandro 		/* Check for invalid length PMTU or posted rwqe len. */
25115b6cabb0SDon Hiatt 		/*
25125b6cabb0SDon Hiatt 		 * There will be no padding for 9B packet but 16B packets
25135b6cabb0SDon Hiatt 		 * will come in with some padding since we always add
25145b6cabb0SDon Hiatt 		 * CRC and LT bytes which will need to be flit aligned
25155b6cabb0SDon Hiatt 		 */
25165b6cabb0SDon Hiatt 		if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
2517f48ad614SDennis Dalessandro 			goto nack_inv;
2518f48ad614SDennis Dalessandro 		qp->r_rcv_len += pmtu;
2519f48ad614SDennis Dalessandro 		if (unlikely(qp->r_rcv_len > qp->r_len))
2520f48ad614SDennis Dalessandro 			goto nack_inv;
2521019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->r_sge, data, pmtu, true, false);
2522f48ad614SDennis Dalessandro 		break;
2523f48ad614SDennis Dalessandro 
2524f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
2525f48ad614SDennis Dalessandro 		/* consume RWQE */
2526832369faSBrian Welty 		ret = rvt_get_rwqe(qp, true);
2527f48ad614SDennis Dalessandro 		if (ret < 0)
2528f48ad614SDennis Dalessandro 			goto nack_op_err;
2529f48ad614SDennis Dalessandro 		if (!ret)
2530f48ad614SDennis Dalessandro 			goto rnr_nak;
2531f48ad614SDennis Dalessandro 		goto send_last_imm;
2532f48ad614SDennis Dalessandro 
2533f48ad614SDennis Dalessandro 	case OP(SEND_ONLY):
2534f48ad614SDennis Dalessandro 	case OP(SEND_ONLY_WITH_IMMEDIATE):
2535a2df0c83SJianxin Xiong 	case OP(SEND_ONLY_WITH_INVALIDATE):
2536832369faSBrian Welty 		ret = rvt_get_rwqe(qp, false);
2537f48ad614SDennis Dalessandro 		if (ret < 0)
2538f48ad614SDennis Dalessandro 			goto nack_op_err;
2539f48ad614SDennis Dalessandro 		if (!ret)
2540f48ad614SDennis Dalessandro 			goto rnr_nak;
2541f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2542f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_ONLY))
2543f48ad614SDennis Dalessandro 			goto no_immediate_data;
2544a2df0c83SJianxin Xiong 		if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
2545a2df0c83SJianxin Xiong 			goto send_last_inv;
25466ffeb21fSBart Van Assche 		/* FALLTHROUGH -- for SEND_ONLY_WITH_IMMEDIATE */
2547f48ad614SDennis Dalessandro 	case OP(SEND_LAST_WITH_IMMEDIATE):
2548f48ad614SDennis Dalessandro send_last_imm:
2549f48ad614SDennis Dalessandro 		wc.ex.imm_data = ohdr->u.imm_data;
2550f48ad614SDennis Dalessandro 		wc.wc_flags = IB_WC_WITH_IMM;
2551f48ad614SDennis Dalessandro 		goto send_last;
2552a2df0c83SJianxin Xiong 	case OP(SEND_LAST_WITH_INVALIDATE):
2553a2df0c83SJianxin Xiong send_last_inv:
2554a2df0c83SJianxin Xiong 		rkey = be32_to_cpu(ohdr->u.ieth);
2555a2df0c83SJianxin Xiong 		if (rvt_invalidate_rkey(qp, rkey))
2556a2df0c83SJianxin Xiong 			goto no_immediate_data;
2557a2df0c83SJianxin Xiong 		wc.ex.invalidate_rkey = rkey;
2558a2df0c83SJianxin Xiong 		wc.wc_flags = IB_WC_WITH_INVALIDATE;
2559a2df0c83SJianxin Xiong 		goto send_last;
2560f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_LAST):
25610128fceaSBrian Welty 		copy_last = rvt_is_user_qp(qp);
2562f48ad614SDennis Dalessandro 		/* fall through */
2563f48ad614SDennis Dalessandro 	case OP(SEND_LAST):
2564f48ad614SDennis Dalessandro no_immediate_data:
2565f48ad614SDennis Dalessandro 		wc.wc_flags = 0;
2566f48ad614SDennis Dalessandro 		wc.ex.imm_data = 0;
2567f48ad614SDennis Dalessandro send_last:
2568f48ad614SDennis Dalessandro 		/* Check for invalid length. */
2569f48ad614SDennis Dalessandro 		/* LAST len should be >= 1 */
25705b6cabb0SDon Hiatt 		if (unlikely(tlen < (hdrsize + extra_bytes)))
2571f48ad614SDennis Dalessandro 			goto nack_inv;
25725b6cabb0SDon Hiatt 		/* Don't count the CRC(and padding and LT byte for 16B). */
25735b6cabb0SDon Hiatt 		tlen -= (hdrsize + extra_bytes);
2574f48ad614SDennis Dalessandro 		wc.byte_len = tlen + qp->r_rcv_len;
2575f48ad614SDennis Dalessandro 		if (unlikely(wc.byte_len > qp->r_len))
2576f48ad614SDennis Dalessandro 			goto nack_inv;
2577019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->r_sge, data, tlen, true, copy_last);
2578f48ad614SDennis Dalessandro 		rvt_put_ss(&qp->r_sge);
2579f48ad614SDennis Dalessandro 		qp->r_msn++;
258053e91d26SSebastian Sanchez 		if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
2581f48ad614SDennis Dalessandro 			break;
2582f48ad614SDennis Dalessandro 		wc.wr_id = qp->r_wr_id;
2583f48ad614SDennis Dalessandro 		wc.status = IB_WC_SUCCESS;
2584f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2585f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2586f48ad614SDennis Dalessandro 			wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2587f48ad614SDennis Dalessandro 		else
2588f48ad614SDennis Dalessandro 			wc.opcode = IB_WC_RECV;
2589f48ad614SDennis Dalessandro 		wc.qp = &qp->ibqp;
2590f48ad614SDennis Dalessandro 		wc.src_qp = qp->remote_qpn;
2591b64581adSDon Hiatt 		wc.slid = rdma_ah_get_dlid(&qp->remote_ah_attr) & U16_MAX;
2592f48ad614SDennis Dalessandro 		/*
2593f48ad614SDennis Dalessandro 		 * It seems that IB mandates the presence of an SL in a
2594f48ad614SDennis Dalessandro 		 * work completion only for the UD transport (see section
2595f48ad614SDennis Dalessandro 		 * 11.4.2 of IBTA Vol. 1).
2596f48ad614SDennis Dalessandro 		 *
2597f48ad614SDennis Dalessandro 		 * However, the way the SL is chosen below is consistent
2598f48ad614SDennis Dalessandro 		 * with the way that IB/qib works and is trying avoid
2599f48ad614SDennis Dalessandro 		 * introducing incompatibilities.
2600f48ad614SDennis Dalessandro 		 *
2601f48ad614SDennis Dalessandro 		 * See also OPA Vol. 1, section 9.7.6, and table 9-17.
2602f48ad614SDennis Dalessandro 		 */
2603d8966fcdSDasaratharaman Chandramouli 		wc.sl = rdma_ah_get_sl(&qp->remote_ah_attr);
2604f48ad614SDennis Dalessandro 		/* zero fields that are N/A */
2605f48ad614SDennis Dalessandro 		wc.vendor_err = 0;
2606f48ad614SDennis Dalessandro 		wc.pkey_index = 0;
2607f48ad614SDennis Dalessandro 		wc.dlid_path_bits = 0;
2608f48ad614SDennis Dalessandro 		wc.port_num = 0;
2609f48ad614SDennis Dalessandro 		/* Signal completion event if the solicited bit is set. */
2610f48ad614SDennis Dalessandro 		rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
2611f150e273SSebastian Sanchez 			     ib_bth_is_solicited(ohdr));
2612f48ad614SDennis Dalessandro 		break;
2613f48ad614SDennis Dalessandro 
2614f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_ONLY):
26150128fceaSBrian Welty 		copy_last = rvt_is_user_qp(qp);
2616f48ad614SDennis Dalessandro 		/* fall through */
2617f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
2618f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2619f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2620f48ad614SDennis Dalessandro 			goto nack_inv;
2621f48ad614SDennis Dalessandro 		/* consume RWQE */
2622f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2623f48ad614SDennis Dalessandro 		qp->r_len = be32_to_cpu(reth->length);
2624f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2625f48ad614SDennis Dalessandro 		qp->r_sge.sg_list = NULL;
2626f48ad614SDennis Dalessandro 		if (qp->r_len != 0) {
2627f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2628261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2629f48ad614SDennis Dalessandro 			int ok;
2630f48ad614SDennis Dalessandro 
2631f48ad614SDennis Dalessandro 			/* Check rkey & NAK */
2632f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2633f48ad614SDennis Dalessandro 					 rkey, IB_ACCESS_REMOTE_WRITE);
2634f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2635f48ad614SDennis Dalessandro 				goto nack_acc;
2636f48ad614SDennis Dalessandro 			qp->r_sge.num_sge = 1;
2637f48ad614SDennis Dalessandro 		} else {
2638f48ad614SDennis Dalessandro 			qp->r_sge.num_sge = 0;
2639f48ad614SDennis Dalessandro 			qp->r_sge.sge.mr = NULL;
2640f48ad614SDennis Dalessandro 			qp->r_sge.sge.vaddr = NULL;
2641f48ad614SDennis Dalessandro 			qp->r_sge.sge.length = 0;
2642f48ad614SDennis Dalessandro 			qp->r_sge.sge.sge_length = 0;
2643f48ad614SDennis Dalessandro 		}
2644f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_FIRST))
2645f48ad614SDennis Dalessandro 			goto send_middle;
2646f48ad614SDennis Dalessandro 		else if (opcode == OP(RDMA_WRITE_ONLY))
2647f48ad614SDennis Dalessandro 			goto no_immediate_data;
2648832369faSBrian Welty 		ret = rvt_get_rwqe(qp, true);
2649f48ad614SDennis Dalessandro 		if (ret < 0)
2650f48ad614SDennis Dalessandro 			goto nack_op_err;
26511feb4006SMike Marciniszyn 		if (!ret) {
26521feb4006SMike Marciniszyn 			/* peer will send again */
26531feb4006SMike Marciniszyn 			rvt_put_ss(&qp->r_sge);
2654f48ad614SDennis Dalessandro 			goto rnr_nak;
26551feb4006SMike Marciniszyn 		}
2656f48ad614SDennis Dalessandro 		wc.ex.imm_data = ohdr->u.rc.imm_data;
2657f48ad614SDennis Dalessandro 		wc.wc_flags = IB_WC_WITH_IMM;
2658f48ad614SDennis Dalessandro 		goto send_last;
2659f48ad614SDennis Dalessandro 
2660f48ad614SDennis Dalessandro 	case OP(RDMA_READ_REQUEST): {
2661f48ad614SDennis Dalessandro 		struct rvt_ack_entry *e;
2662f48ad614SDennis Dalessandro 		u32 len;
2663f48ad614SDennis Dalessandro 		u8 next;
2664f48ad614SDennis Dalessandro 
2665f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
2666f48ad614SDennis Dalessandro 			goto nack_inv;
2667f48ad614SDennis Dalessandro 		next = qp->r_head_ack_queue + 1;
2668ddf922c3SKaike Wan 		/* s_ack_queue is size rvt_size_atomic()+1 so use > not >= */
2669ddf922c3SKaike Wan 		if (next > rvt_size_atomic(ib_to_rvt(qp->ibqp.device)))
2670f48ad614SDennis Dalessandro 			next = 0;
2671f48ad614SDennis Dalessandro 		spin_lock_irqsave(&qp->s_lock, flags);
26724f9264d1SKaike Wan 		if (unlikely(next == qp->s_acked_ack_queue)) {
2673f48ad614SDennis Dalessandro 			if (!qp->s_ack_queue[next].sent)
2674f48ad614SDennis Dalessandro 				goto nack_inv_unlck;
2675f48ad614SDennis Dalessandro 			update_ack_queue(qp, next);
2676f48ad614SDennis Dalessandro 		}
2677f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->r_head_ack_queue];
2678f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2679f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
2680f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2681f48ad614SDennis Dalessandro 		}
2682f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2683f48ad614SDennis Dalessandro 		len = be32_to_cpu(reth->length);
2684f48ad614SDennis Dalessandro 		if (len) {
2685f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2686261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2687f48ad614SDennis Dalessandro 			int ok;
2688f48ad614SDennis Dalessandro 
2689f48ad614SDennis Dalessandro 			/* Check rkey & NAK */
2690f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
2691f48ad614SDennis Dalessandro 					 rkey, IB_ACCESS_REMOTE_READ);
2692f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2693f48ad614SDennis Dalessandro 				goto nack_acc_unlck;
2694f48ad614SDennis Dalessandro 			/*
2695f48ad614SDennis Dalessandro 			 * Update the next expected PSN.  We add 1 later
2696f48ad614SDennis Dalessandro 			 * below, so only add the remainder here.
2697f48ad614SDennis Dalessandro 			 */
26985dc80605SMike Marciniszyn 			qp->r_psn += rvt_div_mtu(qp, len - 1);
2699f48ad614SDennis Dalessandro 		} else {
2700f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2701f48ad614SDennis Dalessandro 			e->rdma_sge.vaddr = NULL;
2702f48ad614SDennis Dalessandro 			e->rdma_sge.length = 0;
2703f48ad614SDennis Dalessandro 			e->rdma_sge.sge_length = 0;
2704f48ad614SDennis Dalessandro 		}
2705f48ad614SDennis Dalessandro 		e->opcode = opcode;
2706f48ad614SDennis Dalessandro 		e->sent = 0;
2707f48ad614SDennis Dalessandro 		e->psn = psn;
2708f48ad614SDennis Dalessandro 		e->lpsn = qp->r_psn;
2709f48ad614SDennis Dalessandro 		/*
2710f48ad614SDennis Dalessandro 		 * We need to increment the MSN here instead of when we
2711f48ad614SDennis Dalessandro 		 * finish sending the result since a duplicate request would
2712f48ad614SDennis Dalessandro 		 * increment it more than once.
2713f48ad614SDennis Dalessandro 		 */
2714f48ad614SDennis Dalessandro 		qp->r_msn++;
2715f48ad614SDennis Dalessandro 		qp->r_psn++;
2716f48ad614SDennis Dalessandro 		qp->r_state = opcode;
2717f48ad614SDennis Dalessandro 		qp->r_nak_state = 0;
2718f48ad614SDennis Dalessandro 		qp->r_head_ack_queue = next;
2719f48ad614SDennis Dalessandro 
2720ca00c62bSDennis Dalessandro 		/* Schedule the send engine. */
2721f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_RESP_PENDING;
2722fe4dd423SMitko Haralanov 		if (fecn)
2723fe4dd423SMitko Haralanov 			qp->s_flags |= RVT_S_ECN;
2724f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
2725f48ad614SDennis Dalessandro 
2726f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
2727f48ad614SDennis Dalessandro 		return;
2728f48ad614SDennis Dalessandro 	}
2729f48ad614SDennis Dalessandro 
2730f48ad614SDennis Dalessandro 	case OP(COMPARE_SWAP):
2731f48ad614SDennis Dalessandro 	case OP(FETCH_ADD): {
273248a615dcSKaike Wan 		struct ib_atomic_eth *ateth = &ohdr->u.atomic_eth;
273348a615dcSKaike Wan 		u64 vaddr = get_ib_ateth_vaddr(ateth);
273448a615dcSKaike Wan 		bool opfn = opcode == OP(COMPARE_SWAP) &&
273548a615dcSKaike Wan 			vaddr == HFI1_VERBS_E_ATOMIC_VADDR;
2736f48ad614SDennis Dalessandro 		struct rvt_ack_entry *e;
2737f48ad614SDennis Dalessandro 		atomic64_t *maddr;
2738f48ad614SDennis Dalessandro 		u64 sdata;
2739f48ad614SDennis Dalessandro 		u32 rkey;
2740f48ad614SDennis Dalessandro 		u8 next;
2741f48ad614SDennis Dalessandro 
274248a615dcSKaike Wan 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
274348a615dcSKaike Wan 			     !opfn))
2744f48ad614SDennis Dalessandro 			goto nack_inv;
2745f48ad614SDennis Dalessandro 		next = qp->r_head_ack_queue + 1;
2746ddf922c3SKaike Wan 		if (next > rvt_size_atomic(ib_to_rvt(qp->ibqp.device)))
2747f48ad614SDennis Dalessandro 			next = 0;
2748f48ad614SDennis Dalessandro 		spin_lock_irqsave(&qp->s_lock, flags);
27494f9264d1SKaike Wan 		if (unlikely(next == qp->s_acked_ack_queue)) {
2750f48ad614SDennis Dalessandro 			if (!qp->s_ack_queue[next].sent)
2751f48ad614SDennis Dalessandro 				goto nack_inv_unlck;
2752f48ad614SDennis Dalessandro 			update_ack_queue(qp, next);
2753f48ad614SDennis Dalessandro 		}
2754f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->r_head_ack_queue];
2755f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2756f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
2757f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2758f48ad614SDennis Dalessandro 		}
275948a615dcSKaike Wan 		/* Process OPFN special virtual address */
276048a615dcSKaike Wan 		if (opfn) {
276148a615dcSKaike Wan 			opfn_conn_response(qp, e, ateth);
276248a615dcSKaike Wan 			goto ack;
276348a615dcSKaike Wan 		}
2764f48ad614SDennis Dalessandro 		if (unlikely(vaddr & (sizeof(u64) - 1)))
2765f48ad614SDennis Dalessandro 			goto nack_inv_unlck;
2766f48ad614SDennis Dalessandro 		rkey = be32_to_cpu(ateth->rkey);
2767f48ad614SDennis Dalessandro 		/* Check rkey & NAK */
2768f48ad614SDennis Dalessandro 		if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
2769f48ad614SDennis Dalessandro 					  vaddr, rkey,
2770f48ad614SDennis Dalessandro 					  IB_ACCESS_REMOTE_ATOMIC)))
2771f48ad614SDennis Dalessandro 			goto nack_acc_unlck;
2772f48ad614SDennis Dalessandro 		/* Perform atomic OP and save result. */
2773f48ad614SDennis Dalessandro 		maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
2774261a4351SMike Marciniszyn 		sdata = get_ib_ateth_swap(ateth);
2775f48ad614SDennis Dalessandro 		e->atomic_data = (opcode == OP(FETCH_ADD)) ?
2776f48ad614SDennis Dalessandro 			(u64)atomic64_add_return(sdata, maddr) - sdata :
2777f48ad614SDennis Dalessandro 			(u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
2778261a4351SMike Marciniszyn 				      get_ib_ateth_compare(ateth),
2779f48ad614SDennis Dalessandro 				      sdata);
2780f48ad614SDennis Dalessandro 		rvt_put_mr(qp->r_sge.sge.mr);
2781f48ad614SDennis Dalessandro 		qp->r_sge.num_sge = 0;
278248a615dcSKaike Wan ack:
2783f48ad614SDennis Dalessandro 		e->opcode = opcode;
2784f48ad614SDennis Dalessandro 		e->sent = 0;
2785f48ad614SDennis Dalessandro 		e->psn = psn;
2786f48ad614SDennis Dalessandro 		e->lpsn = psn;
2787f48ad614SDennis Dalessandro 		qp->r_msn++;
2788f48ad614SDennis Dalessandro 		qp->r_psn++;
2789f48ad614SDennis Dalessandro 		qp->r_state = opcode;
2790f48ad614SDennis Dalessandro 		qp->r_nak_state = 0;
2791f48ad614SDennis Dalessandro 		qp->r_head_ack_queue = next;
2792f48ad614SDennis Dalessandro 
2793ca00c62bSDennis Dalessandro 		/* Schedule the send engine. */
2794f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_RESP_PENDING;
2795fe4dd423SMitko Haralanov 		if (fecn)
2796fe4dd423SMitko Haralanov 			qp->s_flags |= RVT_S_ECN;
2797f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
2798f48ad614SDennis Dalessandro 
2799f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
2800f48ad614SDennis Dalessandro 		return;
2801f48ad614SDennis Dalessandro 	}
2802f48ad614SDennis Dalessandro 
2803f48ad614SDennis Dalessandro 	default:
2804f48ad614SDennis Dalessandro 		/* NAK unknown opcodes. */
2805f48ad614SDennis Dalessandro 		goto nack_inv;
2806f48ad614SDennis Dalessandro 	}
2807f48ad614SDennis Dalessandro 	qp->r_psn++;
2808f48ad614SDennis Dalessandro 	qp->r_state = opcode;
2809f48ad614SDennis Dalessandro 	qp->r_ack_psn = psn;
2810f48ad614SDennis Dalessandro 	qp->r_nak_state = 0;
2811f48ad614SDennis Dalessandro 	/* Send an ACK if requested or required. */
2812fe4dd423SMitko Haralanov 	if (psn & IB_BTH_REQ_ACK || fecn) {
2813fe4dd423SMitko Haralanov 		if (packet->numpkt == 0 || fecn ||
2814fe4dd423SMitko Haralanov 		    qp->r_adefered >= HFI1_PSN_CREDIT) {
2815f48ad614SDennis Dalessandro 			rc_cancel_ack(qp);
2816f48ad614SDennis Dalessandro 			goto send_ack;
2817f48ad614SDennis Dalessandro 		}
2818688f21c0SMike Marciniszyn 		qp->r_adefered++;
2819f48ad614SDennis Dalessandro 		rc_defered_ack(rcd, qp);
2820f48ad614SDennis Dalessandro 	}
2821f48ad614SDennis Dalessandro 	return;
2822f48ad614SDennis Dalessandro 
2823f48ad614SDennis Dalessandro rnr_nak:
2824f48ad614SDennis Dalessandro 	qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
2825f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2826f48ad614SDennis Dalessandro 	/* Queue RNR NAK for later */
2827f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
2828f48ad614SDennis Dalessandro 	return;
2829f48ad614SDennis Dalessandro 
2830f48ad614SDennis Dalessandro nack_op_err:
2831beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2832f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
2833f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2834f48ad614SDennis Dalessandro 	/* Queue NAK for later */
2835f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
2836f48ad614SDennis Dalessandro 	return;
2837f48ad614SDennis Dalessandro 
2838f48ad614SDennis Dalessandro nack_inv_unlck:
2839f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2840f48ad614SDennis Dalessandro nack_inv:
2841beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2842f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_INVALID_REQUEST;
2843f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2844f48ad614SDennis Dalessandro 	/* Queue NAK for later */
2845f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
2846f48ad614SDennis Dalessandro 	return;
2847f48ad614SDennis Dalessandro 
2848f48ad614SDennis Dalessandro nack_acc_unlck:
2849f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2850f48ad614SDennis Dalessandro nack_acc:
2851beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
2852f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
2853f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2854f48ad614SDennis Dalessandro send_ack:
2855fe4dd423SMitko Haralanov 	hfi1_send_rc_ack(packet, fecn);
2856f48ad614SDennis Dalessandro }
2857f48ad614SDennis Dalessandro 
2858f48ad614SDennis Dalessandro void hfi1_rc_hdrerr(
2859f48ad614SDennis Dalessandro 	struct hfi1_ctxtdata *rcd,
28609039746cSDon Hiatt 	struct hfi1_packet *packet,
2861f48ad614SDennis Dalessandro 	struct rvt_qp *qp)
2862f48ad614SDennis Dalessandro {
2863f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
2864f48ad614SDennis Dalessandro 	int diff;
2865f48ad614SDennis Dalessandro 	u32 opcode;
28669039746cSDon Hiatt 	u32 psn;
2867f48ad614SDennis Dalessandro 
28689039746cSDon Hiatt 	if (hfi1_ruc_check_hdr(ibp, packet))
2869f48ad614SDennis Dalessandro 		return;
2870f48ad614SDennis Dalessandro 
28719039746cSDon Hiatt 	psn = ib_bth_get_psn(packet->ohdr);
28729039746cSDon Hiatt 	opcode = ib_bth_get_opcode(packet->ohdr);
2873f48ad614SDennis Dalessandro 
2874f48ad614SDennis Dalessandro 	/* Only deal with RDMA Writes for now */
2875f48ad614SDennis Dalessandro 	if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
2876f48ad614SDennis Dalessandro 		diff = delta_psn(psn, qp->r_psn);
2877f48ad614SDennis Dalessandro 		if (!qp->r_nak_state && diff >= 0) {
2878f48ad614SDennis Dalessandro 			ibp->rvp.n_rc_seqnak++;
2879f48ad614SDennis Dalessandro 			qp->r_nak_state = IB_NAK_PSN_ERROR;
2880f48ad614SDennis Dalessandro 			/* Use the expected PSN. */
2881f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn;
2882f48ad614SDennis Dalessandro 			/*
2883f48ad614SDennis Dalessandro 			 * Wait to send the sequence
2884f48ad614SDennis Dalessandro 			 * NAK until all packets
2885f48ad614SDennis Dalessandro 			 * in the receive queue have
2886f48ad614SDennis Dalessandro 			 * been processed.
2887f48ad614SDennis Dalessandro 			 * Otherwise, we end up
2888f48ad614SDennis Dalessandro 			 * propagating congestion.
2889f48ad614SDennis Dalessandro 			 */
2890f48ad614SDennis Dalessandro 			rc_defered_ack(rcd, qp);
2891f48ad614SDennis Dalessandro 		} /* Out of sequence NAK */
2892f48ad614SDennis Dalessandro 	} /* QP Request NAKs */
2893f48ad614SDennis Dalessandro }
2894