xref: /openbmc/linux/drivers/infiniband/hw/hfi1/rc.c (revision 43a474aa)
1f48ad614SDennis Dalessandro /*
2f48ad614SDennis Dalessandro  * Copyright(c) 2015, 2016 Intel Corporation.
3f48ad614SDennis Dalessandro  *
4f48ad614SDennis Dalessandro  * This file is provided under a dual BSD/GPLv2 license.  When using or
5f48ad614SDennis Dalessandro  * redistributing this file, you may do so under either license.
6f48ad614SDennis Dalessandro  *
7f48ad614SDennis Dalessandro  * GPL LICENSE SUMMARY
8f48ad614SDennis Dalessandro  *
9f48ad614SDennis Dalessandro  * This program is free software; you can redistribute it and/or modify
10f48ad614SDennis Dalessandro  * it under the terms of version 2 of the GNU General Public License as
11f48ad614SDennis Dalessandro  * published by the Free Software Foundation.
12f48ad614SDennis Dalessandro  *
13f48ad614SDennis Dalessandro  * This program is distributed in the hope that it will be useful, but
14f48ad614SDennis Dalessandro  * WITHOUT ANY WARRANTY; without even the implied warranty of
15f48ad614SDennis Dalessandro  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16f48ad614SDennis Dalessandro  * General Public License for more details.
17f48ad614SDennis Dalessandro  *
18f48ad614SDennis Dalessandro  * BSD LICENSE
19f48ad614SDennis Dalessandro  *
20f48ad614SDennis Dalessandro  * Redistribution and use in source and binary forms, with or without
21f48ad614SDennis Dalessandro  * modification, are permitted provided that the following conditions
22f48ad614SDennis Dalessandro  * are met:
23f48ad614SDennis Dalessandro  *
24f48ad614SDennis Dalessandro  *  - Redistributions of source code must retain the above copyright
25f48ad614SDennis Dalessandro  *    notice, this list of conditions and the following disclaimer.
26f48ad614SDennis Dalessandro  *  - Redistributions in binary form must reproduce the above copyright
27f48ad614SDennis Dalessandro  *    notice, this list of conditions and the following disclaimer in
28f48ad614SDennis Dalessandro  *    the documentation and/or other materials provided with the
29f48ad614SDennis Dalessandro  *    distribution.
30f48ad614SDennis Dalessandro  *  - Neither the name of Intel Corporation nor the names of its
31f48ad614SDennis Dalessandro  *    contributors may be used to endorse or promote products derived
32f48ad614SDennis Dalessandro  *    from this software without specific prior written permission.
33f48ad614SDennis Dalessandro  *
34f48ad614SDennis Dalessandro  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35f48ad614SDennis Dalessandro  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36f48ad614SDennis Dalessandro  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37f48ad614SDennis Dalessandro  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38f48ad614SDennis Dalessandro  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39f48ad614SDennis Dalessandro  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40f48ad614SDennis Dalessandro  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41f48ad614SDennis Dalessandro  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42f48ad614SDennis Dalessandro  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43f48ad614SDennis Dalessandro  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44f48ad614SDennis Dalessandro  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45f48ad614SDennis Dalessandro  *
46f48ad614SDennis Dalessandro  */
47f48ad614SDennis Dalessandro 
48f48ad614SDennis Dalessandro #include <linux/io.h>
49f48ad614SDennis Dalessandro #include <rdma/rdma_vt.h>
50f48ad614SDennis Dalessandro #include <rdma/rdmavt_qp.h>
51f48ad614SDennis Dalessandro 
52f48ad614SDennis Dalessandro #include "hfi.h"
53f48ad614SDennis Dalessandro #include "qp.h"
54f48ad614SDennis Dalessandro #include "verbs_txreq.h"
55f48ad614SDennis Dalessandro #include "trace.h"
56f48ad614SDennis Dalessandro 
57f48ad614SDennis Dalessandro /* cut down ridiculously long IB macro names */
58b374e060SMike Marciniszyn #define OP(x) RC_OP(x)
59f48ad614SDennis Dalessandro 
60f48ad614SDennis Dalessandro static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
61f48ad614SDennis Dalessandro 		       u32 psn, u32 pmtu)
62f48ad614SDennis Dalessandro {
63f48ad614SDennis Dalessandro 	u32 len;
64f48ad614SDennis Dalessandro 
65f48ad614SDennis Dalessandro 	len = delta_psn(psn, wqe->psn) * pmtu;
66f48ad614SDennis Dalessandro 	ss->sge = wqe->sg_list[0];
67f48ad614SDennis Dalessandro 	ss->sg_list = wqe->sg_list + 1;
68f48ad614SDennis Dalessandro 	ss->num_sge = wqe->wr.num_sge;
69f48ad614SDennis Dalessandro 	ss->total_len = wqe->length;
701198fceaSBrian Welty 	rvt_skip_sge(ss, len, false);
71f48ad614SDennis Dalessandro 	return wqe->length - len;
72f48ad614SDennis Dalessandro }
73f48ad614SDennis Dalessandro 
74f48ad614SDennis Dalessandro /**
75f48ad614SDennis Dalessandro  * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
76f48ad614SDennis Dalessandro  * @dev: the device for this QP
77f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
78f48ad614SDennis Dalessandro  * @ohdr: a pointer to the IB header being constructed
79f48ad614SDennis Dalessandro  * @ps: the xmit packet state
80f48ad614SDennis Dalessandro  *
81f48ad614SDennis Dalessandro  * Return 1 if constructed; otherwise, return 0.
82f48ad614SDennis Dalessandro  * Note that we are in the responder's side of the QP context.
83f48ad614SDennis Dalessandro  * Note the QP s_lock must be held.
84f48ad614SDennis Dalessandro  */
85f48ad614SDennis Dalessandro static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
86261a4351SMike Marciniszyn 		       struct ib_other_headers *ohdr,
87f48ad614SDennis Dalessandro 		       struct hfi1_pkt_state *ps)
88f48ad614SDennis Dalessandro {
89f48ad614SDennis Dalessandro 	struct rvt_ack_entry *e;
90f48ad614SDennis Dalessandro 	u32 hwords;
91f48ad614SDennis Dalessandro 	u32 len;
92f48ad614SDennis Dalessandro 	u32 bth0;
93f48ad614SDennis Dalessandro 	u32 bth2;
94f48ad614SDennis Dalessandro 	int middle = 0;
95f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
96f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
97f48ad614SDennis Dalessandro 
9868e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
99f48ad614SDennis Dalessandro 	/* Don't send an ACK if we aren't supposed to. */
100f48ad614SDennis Dalessandro 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
101f48ad614SDennis Dalessandro 		goto bail;
102f48ad614SDennis Dalessandro 
103f48ad614SDennis Dalessandro 	/* header size in 32-bit words LRH+BTH = (8+12)/4. */
104f48ad614SDennis Dalessandro 	hwords = 5;
105f48ad614SDennis Dalessandro 
106f48ad614SDennis Dalessandro 	switch (qp->s_ack_state) {
107f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
108f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_ONLY):
109f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
110f48ad614SDennis Dalessandro 		if (e->rdma_sge.mr) {
111f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
112f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
113f48ad614SDennis Dalessandro 		}
114f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
115f48ad614SDennis Dalessandro 	case OP(ATOMIC_ACKNOWLEDGE):
116f48ad614SDennis Dalessandro 		/*
117f48ad614SDennis Dalessandro 		 * We can increment the tail pointer now that the last
118f48ad614SDennis Dalessandro 		 * response has been sent instead of only being
119f48ad614SDennis Dalessandro 		 * constructed.
120f48ad614SDennis Dalessandro 		 */
121f48ad614SDennis Dalessandro 		if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
122f48ad614SDennis Dalessandro 			qp->s_tail_ack_queue = 0;
123f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
124f48ad614SDennis Dalessandro 	case OP(SEND_ONLY):
125f48ad614SDennis Dalessandro 	case OP(ACKNOWLEDGE):
126f48ad614SDennis Dalessandro 		/* Check for no next entry in the queue. */
127f48ad614SDennis Dalessandro 		if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
128f48ad614SDennis Dalessandro 			if (qp->s_flags & RVT_S_ACK_PENDING)
129f48ad614SDennis Dalessandro 				goto normal;
130f48ad614SDennis Dalessandro 			goto bail;
131f48ad614SDennis Dalessandro 		}
132f48ad614SDennis Dalessandro 
133f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
134f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST)) {
135f48ad614SDennis Dalessandro 			/*
136f48ad614SDennis Dalessandro 			 * If a RDMA read response is being resent and
137f48ad614SDennis Dalessandro 			 * we haven't seen the duplicate request yet,
138f48ad614SDennis Dalessandro 			 * then stop sending the remaining responses the
139f48ad614SDennis Dalessandro 			 * responder has seen until the requester re-sends it.
140f48ad614SDennis Dalessandro 			 */
141f48ad614SDennis Dalessandro 			len = e->rdma_sge.sge_length;
142f48ad614SDennis Dalessandro 			if (len && !e->rdma_sge.mr) {
143f48ad614SDennis Dalessandro 				qp->s_tail_ack_queue = qp->r_head_ack_queue;
144f48ad614SDennis Dalessandro 				goto bail;
145f48ad614SDennis Dalessandro 			}
146f48ad614SDennis Dalessandro 			/* Copy SGE state in case we need to resend */
147f48ad614SDennis Dalessandro 			ps->s_txreq->mr = e->rdma_sge.mr;
148f48ad614SDennis Dalessandro 			if (ps->s_txreq->mr)
149f48ad614SDennis Dalessandro 				rvt_get_mr(ps->s_txreq->mr);
150f48ad614SDennis Dalessandro 			qp->s_ack_rdma_sge.sge = e->rdma_sge;
151f48ad614SDennis Dalessandro 			qp->s_ack_rdma_sge.num_sge = 1;
152b777f154SMitko Haralanov 			ps->s_txreq->ss = &qp->s_ack_rdma_sge;
153f48ad614SDennis Dalessandro 			if (len > pmtu) {
154f48ad614SDennis Dalessandro 				len = pmtu;
155f48ad614SDennis Dalessandro 				qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
156f48ad614SDennis Dalessandro 			} else {
157f48ad614SDennis Dalessandro 				qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
158f48ad614SDennis Dalessandro 				e->sent = 1;
159f48ad614SDennis Dalessandro 			}
160696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
161f48ad614SDennis Dalessandro 			hwords++;
162f48ad614SDennis Dalessandro 			qp->s_ack_rdma_psn = e->psn;
163f48ad614SDennis Dalessandro 			bth2 = mask_psn(qp->s_ack_rdma_psn++);
164f48ad614SDennis Dalessandro 		} else {
165f48ad614SDennis Dalessandro 			/* COMPARE_SWAP or FETCH_ADD */
166b777f154SMitko Haralanov 			ps->s_txreq->ss = NULL;
167f48ad614SDennis Dalessandro 			len = 0;
168f48ad614SDennis Dalessandro 			qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
169696513e8SBrian Welty 			ohdr->u.at.aeth = rvt_compute_aeth(qp);
170261a4351SMike Marciniszyn 			ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
171f48ad614SDennis Dalessandro 			hwords += sizeof(ohdr->u.at) / sizeof(u32);
172f48ad614SDennis Dalessandro 			bth2 = mask_psn(e->psn);
173f48ad614SDennis Dalessandro 			e->sent = 1;
174f48ad614SDennis Dalessandro 		}
175f48ad614SDennis Dalessandro 		bth0 = qp->s_ack_state << 24;
176f48ad614SDennis Dalessandro 		break;
177f48ad614SDennis Dalessandro 
178f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
179f48ad614SDennis Dalessandro 		qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
180f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
181f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
182b777f154SMitko Haralanov 		ps->s_txreq->ss = &qp->s_ack_rdma_sge;
183f48ad614SDennis Dalessandro 		ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
184f48ad614SDennis Dalessandro 		if (ps->s_txreq->mr)
185f48ad614SDennis Dalessandro 			rvt_get_mr(ps->s_txreq->mr);
186f48ad614SDennis Dalessandro 		len = qp->s_ack_rdma_sge.sge.sge_length;
187f48ad614SDennis Dalessandro 		if (len > pmtu) {
188f48ad614SDennis Dalessandro 			len = pmtu;
189f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
190f48ad614SDennis Dalessandro 		} else {
191696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
192f48ad614SDennis Dalessandro 			hwords++;
193f48ad614SDennis Dalessandro 			qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
194f48ad614SDennis Dalessandro 			e = &qp->s_ack_queue[qp->s_tail_ack_queue];
195f48ad614SDennis Dalessandro 			e->sent = 1;
196f48ad614SDennis Dalessandro 		}
197f48ad614SDennis Dalessandro 		bth0 = qp->s_ack_state << 24;
198f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_ack_rdma_psn++);
199f48ad614SDennis Dalessandro 		break;
200f48ad614SDennis Dalessandro 
201f48ad614SDennis Dalessandro 	default:
202f48ad614SDennis Dalessandro normal:
203f48ad614SDennis Dalessandro 		/*
204f48ad614SDennis Dalessandro 		 * Send a regular ACK.
205f48ad614SDennis Dalessandro 		 * Set the s_ack_state so we wait until after sending
206f48ad614SDennis Dalessandro 		 * the ACK before setting s_ack_state to ACKNOWLEDGE
207f48ad614SDennis Dalessandro 		 * (see above).
208f48ad614SDennis Dalessandro 		 */
209f48ad614SDennis Dalessandro 		qp->s_ack_state = OP(SEND_ONLY);
210f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_ACK_PENDING;
211b777f154SMitko Haralanov 		ps->s_txreq->ss = NULL;
212f48ad614SDennis Dalessandro 		if (qp->s_nak_state)
213f48ad614SDennis Dalessandro 			ohdr->u.aeth =
214832666c1SDon Hiatt 				cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
215f48ad614SDennis Dalessandro 					    (qp->s_nak_state <<
216832666c1SDon Hiatt 					     IB_AETH_CREDIT_SHIFT));
217f48ad614SDennis Dalessandro 		else
218696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
219f48ad614SDennis Dalessandro 		hwords++;
220f48ad614SDennis Dalessandro 		len = 0;
221f48ad614SDennis Dalessandro 		bth0 = OP(ACKNOWLEDGE) << 24;
222f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_ack_psn);
223f48ad614SDennis Dalessandro 	}
224f48ad614SDennis Dalessandro 	qp->s_rdma_ack_cnt++;
225f48ad614SDennis Dalessandro 	qp->s_hdrwords = hwords;
226f48ad614SDennis Dalessandro 	ps->s_txreq->sde = priv->s_sde;
227e922ae06SDon Hiatt 	ps->s_txreq->s_cur_size = len;
228f48ad614SDennis Dalessandro 	hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps);
229f48ad614SDennis Dalessandro 	/* pbc */
230f48ad614SDennis Dalessandro 	ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
231f48ad614SDennis Dalessandro 	return 1;
232f48ad614SDennis Dalessandro 
233f48ad614SDennis Dalessandro bail:
234f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
235f48ad614SDennis Dalessandro 	/*
236f48ad614SDennis Dalessandro 	 * Ensure s_rdma_ack_cnt changes are committed prior to resetting
237f48ad614SDennis Dalessandro 	 * RVT_S_RESP_PENDING
238f48ad614SDennis Dalessandro 	 */
239f48ad614SDennis Dalessandro 	smp_wmb();
240f48ad614SDennis Dalessandro 	qp->s_flags &= ~(RVT_S_RESP_PENDING
241f48ad614SDennis Dalessandro 				| RVT_S_ACK_PENDING
242f48ad614SDennis Dalessandro 				| RVT_S_AHG_VALID);
243f48ad614SDennis Dalessandro 	return 0;
244f48ad614SDennis Dalessandro }
245f48ad614SDennis Dalessandro 
246f48ad614SDennis Dalessandro /**
247f48ad614SDennis Dalessandro  * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
248f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
249f48ad614SDennis Dalessandro  *
250f48ad614SDennis Dalessandro  * Assumes s_lock is held.
251f48ad614SDennis Dalessandro  *
252f48ad614SDennis Dalessandro  * Return 1 if constructed; otherwise, return 0.
253f48ad614SDennis Dalessandro  */
254f48ad614SDennis Dalessandro int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
255f48ad614SDennis Dalessandro {
256f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
257f48ad614SDennis Dalessandro 	struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
258261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
259f48ad614SDennis Dalessandro 	struct rvt_sge_state *ss;
260f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
261f48ad614SDennis Dalessandro 	/* header size in 32-bit words LRH+BTH = (8+12)/4. */
262f48ad614SDennis Dalessandro 	u32 hwords = 5;
263f48ad614SDennis Dalessandro 	u32 len;
264f48ad614SDennis Dalessandro 	u32 bth0 = 0;
265f48ad614SDennis Dalessandro 	u32 bth2;
266f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
267f48ad614SDennis Dalessandro 	char newreq;
268f48ad614SDennis Dalessandro 	int middle = 0;
269f48ad614SDennis Dalessandro 	int delta;
270f48ad614SDennis Dalessandro 
27168e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
272f48ad614SDennis Dalessandro 	ps->s_txreq = get_txreq(ps->dev, qp);
273f48ad614SDennis Dalessandro 	if (IS_ERR(ps->s_txreq))
274f48ad614SDennis Dalessandro 		goto bail_no_tx;
275f48ad614SDennis Dalessandro 
276f48ad614SDennis Dalessandro 	ohdr = &ps->s_txreq->phdr.hdr.u.oth;
277f48ad614SDennis Dalessandro 	if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
278f48ad614SDennis Dalessandro 		ohdr = &ps->s_txreq->phdr.hdr.u.l.oth;
279f48ad614SDennis Dalessandro 
280f48ad614SDennis Dalessandro 	/* Sending responses has higher priority over sending requests. */
281f48ad614SDennis Dalessandro 	if ((qp->s_flags & RVT_S_RESP_PENDING) &&
282f48ad614SDennis Dalessandro 	    make_rc_ack(dev, qp, ohdr, ps))
283f48ad614SDennis Dalessandro 		return 1;
284f48ad614SDennis Dalessandro 
285f48ad614SDennis Dalessandro 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
286f48ad614SDennis Dalessandro 		if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
287f48ad614SDennis Dalessandro 			goto bail;
288f48ad614SDennis Dalessandro 		/* We are in the error state, flush the work request. */
289f48ad614SDennis Dalessandro 		smp_read_barrier_depends(); /* see post_one_send() */
290eb04ff09SMike Marciniszyn 		if (qp->s_last == READ_ONCE(qp->s_head))
291f48ad614SDennis Dalessandro 			goto bail;
292f48ad614SDennis Dalessandro 		/* If DMAs are in progress, we can't flush immediately. */
293f48ad614SDennis Dalessandro 		if (iowait_sdma_pending(&priv->s_iowait)) {
294f48ad614SDennis Dalessandro 			qp->s_flags |= RVT_S_WAIT_DMA;
295f48ad614SDennis Dalessandro 			goto bail;
296f48ad614SDennis Dalessandro 		}
297f48ad614SDennis Dalessandro 		clear_ahg(qp);
298f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_last);
299f48ad614SDennis Dalessandro 		hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
300f48ad614SDennis Dalessandro 			IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
301f48ad614SDennis Dalessandro 		/* will get called again */
302f48ad614SDennis Dalessandro 		goto done_free_tx;
303f48ad614SDennis Dalessandro 	}
304f48ad614SDennis Dalessandro 
305f48ad614SDennis Dalessandro 	if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
306f48ad614SDennis Dalessandro 		goto bail;
307f48ad614SDennis Dalessandro 
308f48ad614SDennis Dalessandro 	if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
309f48ad614SDennis Dalessandro 		if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
310f48ad614SDennis Dalessandro 			qp->s_flags |= RVT_S_WAIT_PSN;
311f48ad614SDennis Dalessandro 			goto bail;
312f48ad614SDennis Dalessandro 		}
313f48ad614SDennis Dalessandro 		qp->s_sending_psn = qp->s_psn;
314f48ad614SDennis Dalessandro 		qp->s_sending_hpsn = qp->s_psn - 1;
315f48ad614SDennis Dalessandro 	}
316f48ad614SDennis Dalessandro 
317f48ad614SDennis Dalessandro 	/* Send a request. */
318f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
319f48ad614SDennis Dalessandro 	switch (qp->s_state) {
320f48ad614SDennis Dalessandro 	default:
321f48ad614SDennis Dalessandro 		if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
322f48ad614SDennis Dalessandro 			goto bail;
323f48ad614SDennis Dalessandro 		/*
324f48ad614SDennis Dalessandro 		 * Resend an old request or start a new one.
325f48ad614SDennis Dalessandro 		 *
326f48ad614SDennis Dalessandro 		 * We keep track of the current SWQE so that
327f48ad614SDennis Dalessandro 		 * we don't reset the "furthest progress" state
328f48ad614SDennis Dalessandro 		 * if we need to back up.
329f48ad614SDennis Dalessandro 		 */
330f48ad614SDennis Dalessandro 		newreq = 0;
331f48ad614SDennis Dalessandro 		if (qp->s_cur == qp->s_tail) {
332f48ad614SDennis Dalessandro 			/* Check if send work queue is empty. */
333eb04ff09SMike Marciniszyn 			smp_read_barrier_depends(); /* see post_one_send() */
334eb04ff09SMike Marciniszyn 			if (qp->s_tail == READ_ONCE(qp->s_head)) {
335f48ad614SDennis Dalessandro 				clear_ahg(qp);
336f48ad614SDennis Dalessandro 				goto bail;
337f48ad614SDennis Dalessandro 			}
338f48ad614SDennis Dalessandro 			/*
339f48ad614SDennis Dalessandro 			 * If a fence is requested, wait for previous
340f48ad614SDennis Dalessandro 			 * RDMA read and atomic operations to finish.
341f48ad614SDennis Dalessandro 			 */
342f48ad614SDennis Dalessandro 			if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
343f48ad614SDennis Dalessandro 			    qp->s_num_rd_atomic) {
344f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_FENCE;
345f48ad614SDennis Dalessandro 				goto bail;
346f48ad614SDennis Dalessandro 			}
3470db3dfa0SJianxin Xiong 			/*
3480db3dfa0SJianxin Xiong 			 * Local operations are processed immediately
3490db3dfa0SJianxin Xiong 			 * after all prior requests have completed
3500db3dfa0SJianxin Xiong 			 */
3510db3dfa0SJianxin Xiong 			if (wqe->wr.opcode == IB_WR_REG_MR ||
3520db3dfa0SJianxin Xiong 			    wqe->wr.opcode == IB_WR_LOCAL_INV) {
353d9b13c20SJianxin Xiong 				int local_ops = 0;
354d9b13c20SJianxin Xiong 				int err = 0;
355d9b13c20SJianxin Xiong 
3560db3dfa0SJianxin Xiong 				if (qp->s_last != qp->s_cur)
3570db3dfa0SJianxin Xiong 					goto bail;
3580db3dfa0SJianxin Xiong 				if (++qp->s_cur == qp->s_size)
3590db3dfa0SJianxin Xiong 					qp->s_cur = 0;
3600db3dfa0SJianxin Xiong 				if (++qp->s_tail == qp->s_size)
3610db3dfa0SJianxin Xiong 					qp->s_tail = 0;
362d9b13c20SJianxin Xiong 				if (!(wqe->wr.send_flags &
363d9b13c20SJianxin Xiong 				      RVT_SEND_COMPLETION_ONLY)) {
3640db3dfa0SJianxin Xiong 					err = rvt_invalidate_rkey(
3650db3dfa0SJianxin Xiong 						qp,
3660db3dfa0SJianxin Xiong 						wqe->wr.ex.invalidate_rkey);
367d9b13c20SJianxin Xiong 					local_ops = 1;
368d9b13c20SJianxin Xiong 				}
3690db3dfa0SJianxin Xiong 				hfi1_send_complete(qp, wqe,
3700db3dfa0SJianxin Xiong 						   err ? IB_WC_LOC_PROT_ERR
3710db3dfa0SJianxin Xiong 						       : IB_WC_SUCCESS);
372d9b13c20SJianxin Xiong 				if (local_ops)
3730db3dfa0SJianxin Xiong 					atomic_dec(&qp->local_ops_pending);
3740db3dfa0SJianxin Xiong 				qp->s_hdrwords = 0;
3750db3dfa0SJianxin Xiong 				goto done_free_tx;
3760db3dfa0SJianxin Xiong 			}
3770db3dfa0SJianxin Xiong 
378f48ad614SDennis Dalessandro 			newreq = 1;
379f48ad614SDennis Dalessandro 			qp->s_psn = wqe->psn;
380f48ad614SDennis Dalessandro 		}
381f48ad614SDennis Dalessandro 		/*
382f48ad614SDennis Dalessandro 		 * Note that we have to be careful not to modify the
383f48ad614SDennis Dalessandro 		 * original work request since we may need to resend
384f48ad614SDennis Dalessandro 		 * it.
385f48ad614SDennis Dalessandro 		 */
386f48ad614SDennis Dalessandro 		len = wqe->length;
387f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
388f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn);
389f48ad614SDennis Dalessandro 		switch (wqe->wr.opcode) {
390f48ad614SDennis Dalessandro 		case IB_WR_SEND:
391f48ad614SDennis Dalessandro 		case IB_WR_SEND_WITH_IMM:
3920db3dfa0SJianxin Xiong 		case IB_WR_SEND_WITH_INV:
393f48ad614SDennis Dalessandro 			/* If no credit, return. */
394f48ad614SDennis Dalessandro 			if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
395696513e8SBrian Welty 			    rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
396f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
397f48ad614SDennis Dalessandro 				goto bail;
398f48ad614SDennis Dalessandro 			}
399f48ad614SDennis Dalessandro 			if (len > pmtu) {
400f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_FIRST);
401f48ad614SDennis Dalessandro 				len = pmtu;
402f48ad614SDennis Dalessandro 				break;
403f48ad614SDennis Dalessandro 			}
404f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_SEND) {
405f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_ONLY);
4060db3dfa0SJianxin Xiong 			} else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
407f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
408f48ad614SDennis Dalessandro 				/* Immediate data comes after the BTH */
409f48ad614SDennis Dalessandro 				ohdr->u.imm_data = wqe->wr.ex.imm_data;
410f48ad614SDennis Dalessandro 				hwords += 1;
4110db3dfa0SJianxin Xiong 			} else {
4120db3dfa0SJianxin Xiong 				qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
4130db3dfa0SJianxin Xiong 				/* Invalidate rkey comes after the BTH */
4140db3dfa0SJianxin Xiong 				ohdr->u.ieth = cpu_to_be32(
4150db3dfa0SJianxin Xiong 						wqe->wr.ex.invalidate_rkey);
4160db3dfa0SJianxin Xiong 				hwords += 1;
417f48ad614SDennis Dalessandro 			}
418f48ad614SDennis Dalessandro 			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
419f48ad614SDennis Dalessandro 				bth0 |= IB_BTH_SOLICITED;
420f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
421f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
422f48ad614SDennis Dalessandro 				qp->s_cur = 0;
423f48ad614SDennis Dalessandro 			break;
424f48ad614SDennis Dalessandro 
425f48ad614SDennis Dalessandro 		case IB_WR_RDMA_WRITE:
426f48ad614SDennis Dalessandro 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
427f48ad614SDennis Dalessandro 				qp->s_lsn++;
428f48ad614SDennis Dalessandro 			/* FALLTHROUGH */
429f48ad614SDennis Dalessandro 		case IB_WR_RDMA_WRITE_WITH_IMM:
430f48ad614SDennis Dalessandro 			/* If no credit, return. */
431f48ad614SDennis Dalessandro 			if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
432696513e8SBrian Welty 			    rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
433f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
434f48ad614SDennis Dalessandro 				goto bail;
435f48ad614SDennis Dalessandro 			}
436261a4351SMike Marciniszyn 			put_ib_reth_vaddr(
437261a4351SMike Marciniszyn 				wqe->rdma_wr.remote_addr,
438261a4351SMike Marciniszyn 				&ohdr->u.rc.reth);
439f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.rkey =
440f48ad614SDennis Dalessandro 				cpu_to_be32(wqe->rdma_wr.rkey);
441f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.length = cpu_to_be32(len);
442f48ad614SDennis Dalessandro 			hwords += sizeof(struct ib_reth) / sizeof(u32);
443f48ad614SDennis Dalessandro 			if (len > pmtu) {
444f48ad614SDennis Dalessandro 				qp->s_state = OP(RDMA_WRITE_FIRST);
445f48ad614SDennis Dalessandro 				len = pmtu;
446f48ad614SDennis Dalessandro 				break;
447f48ad614SDennis Dalessandro 			}
448f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
449f48ad614SDennis Dalessandro 				qp->s_state = OP(RDMA_WRITE_ONLY);
450f48ad614SDennis Dalessandro 			} else {
451f48ad614SDennis Dalessandro 				qp->s_state =
452f48ad614SDennis Dalessandro 					OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
453f48ad614SDennis Dalessandro 				/* Immediate data comes after RETH */
454f48ad614SDennis Dalessandro 				ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
455f48ad614SDennis Dalessandro 				hwords += 1;
456f48ad614SDennis Dalessandro 				if (wqe->wr.send_flags & IB_SEND_SOLICITED)
457f48ad614SDennis Dalessandro 					bth0 |= IB_BTH_SOLICITED;
458f48ad614SDennis Dalessandro 			}
459f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
460f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
461f48ad614SDennis Dalessandro 				qp->s_cur = 0;
462f48ad614SDennis Dalessandro 			break;
463f48ad614SDennis Dalessandro 
464f48ad614SDennis Dalessandro 		case IB_WR_RDMA_READ:
465f48ad614SDennis Dalessandro 			/*
466f48ad614SDennis Dalessandro 			 * Don't allow more operations to be started
467f48ad614SDennis Dalessandro 			 * than the QP limits allow.
468f48ad614SDennis Dalessandro 			 */
469f48ad614SDennis Dalessandro 			if (newreq) {
470f48ad614SDennis Dalessandro 				if (qp->s_num_rd_atomic >=
471f48ad614SDennis Dalessandro 				    qp->s_max_rd_atomic) {
472f48ad614SDennis Dalessandro 					qp->s_flags |= RVT_S_WAIT_RDMAR;
473f48ad614SDennis Dalessandro 					goto bail;
474f48ad614SDennis Dalessandro 				}
475f48ad614SDennis Dalessandro 				qp->s_num_rd_atomic++;
476f48ad614SDennis Dalessandro 				if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
477f48ad614SDennis Dalessandro 					qp->s_lsn++;
478f48ad614SDennis Dalessandro 			}
479261a4351SMike Marciniszyn 			put_ib_reth_vaddr(
480261a4351SMike Marciniszyn 				wqe->rdma_wr.remote_addr,
481261a4351SMike Marciniszyn 				&ohdr->u.rc.reth);
482f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.rkey =
483f48ad614SDennis Dalessandro 				cpu_to_be32(wqe->rdma_wr.rkey);
484f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.length = cpu_to_be32(len);
485f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_READ_REQUEST);
486f48ad614SDennis Dalessandro 			hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
487f48ad614SDennis Dalessandro 			ss = NULL;
488f48ad614SDennis Dalessandro 			len = 0;
489f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
490f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
491f48ad614SDennis Dalessandro 				qp->s_cur = 0;
492f48ad614SDennis Dalessandro 			break;
493f48ad614SDennis Dalessandro 
494f48ad614SDennis Dalessandro 		case IB_WR_ATOMIC_CMP_AND_SWP:
495f48ad614SDennis Dalessandro 		case IB_WR_ATOMIC_FETCH_AND_ADD:
496f48ad614SDennis Dalessandro 			/*
497f48ad614SDennis Dalessandro 			 * Don't allow more operations to be started
498f48ad614SDennis Dalessandro 			 * than the QP limits allow.
499f48ad614SDennis Dalessandro 			 */
500f48ad614SDennis Dalessandro 			if (newreq) {
501f48ad614SDennis Dalessandro 				if (qp->s_num_rd_atomic >=
502f48ad614SDennis Dalessandro 				    qp->s_max_rd_atomic) {
503f48ad614SDennis Dalessandro 					qp->s_flags |= RVT_S_WAIT_RDMAR;
504f48ad614SDennis Dalessandro 					goto bail;
505f48ad614SDennis Dalessandro 				}
506f48ad614SDennis Dalessandro 				qp->s_num_rd_atomic++;
507f48ad614SDennis Dalessandro 				if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
508f48ad614SDennis Dalessandro 					qp->s_lsn++;
509f48ad614SDennis Dalessandro 			}
510f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
511f48ad614SDennis Dalessandro 				qp->s_state = OP(COMPARE_SWAP);
512261a4351SMike Marciniszyn 				put_ib_ateth_swap(wqe->atomic_wr.swap,
513261a4351SMike Marciniszyn 						  &ohdr->u.atomic_eth);
514261a4351SMike Marciniszyn 				put_ib_ateth_compare(wqe->atomic_wr.compare_add,
515261a4351SMike Marciniszyn 						     &ohdr->u.atomic_eth);
516f48ad614SDennis Dalessandro 			} else {
517f48ad614SDennis Dalessandro 				qp->s_state = OP(FETCH_ADD);
518261a4351SMike Marciniszyn 				put_ib_ateth_swap(wqe->atomic_wr.compare_add,
519261a4351SMike Marciniszyn 						  &ohdr->u.atomic_eth);
520261a4351SMike Marciniszyn 				put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
521f48ad614SDennis Dalessandro 			}
522261a4351SMike Marciniszyn 			put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
523261a4351SMike Marciniszyn 					   &ohdr->u.atomic_eth);
524f48ad614SDennis Dalessandro 			ohdr->u.atomic_eth.rkey = cpu_to_be32(
525f48ad614SDennis Dalessandro 				wqe->atomic_wr.rkey);
526f48ad614SDennis Dalessandro 			hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
527f48ad614SDennis Dalessandro 			ss = NULL;
528f48ad614SDennis Dalessandro 			len = 0;
529f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
530f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
531f48ad614SDennis Dalessandro 				qp->s_cur = 0;
532f48ad614SDennis Dalessandro 			break;
533f48ad614SDennis Dalessandro 
534f48ad614SDennis Dalessandro 		default:
535f48ad614SDennis Dalessandro 			goto bail;
536f48ad614SDennis Dalessandro 		}
537f48ad614SDennis Dalessandro 		qp->s_sge.sge = wqe->sg_list[0];
538f48ad614SDennis Dalessandro 		qp->s_sge.sg_list = wqe->sg_list + 1;
539f48ad614SDennis Dalessandro 		qp->s_sge.num_sge = wqe->wr.num_sge;
540f48ad614SDennis Dalessandro 		qp->s_sge.total_len = wqe->length;
541f48ad614SDennis Dalessandro 		qp->s_len = wqe->length;
542f48ad614SDennis Dalessandro 		if (newreq) {
543f48ad614SDennis Dalessandro 			qp->s_tail++;
544f48ad614SDennis Dalessandro 			if (qp->s_tail >= qp->s_size)
545f48ad614SDennis Dalessandro 				qp->s_tail = 0;
546f48ad614SDennis Dalessandro 		}
547f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ)
548f48ad614SDennis Dalessandro 			qp->s_psn = wqe->lpsn + 1;
549f48ad614SDennis Dalessandro 		else
550f48ad614SDennis Dalessandro 			qp->s_psn++;
551f48ad614SDennis Dalessandro 		break;
552f48ad614SDennis Dalessandro 
553f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
554f48ad614SDennis Dalessandro 		/*
555f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
556f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
557f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
558f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
559f48ad614SDennis Dalessandro 		 * thread to indicate a SEND needs to be restarted from an
560f48ad614SDennis Dalessandro 		 * earlier PSN without interfering with the sending thread.
561f48ad614SDennis Dalessandro 		 * See restart_rc().
562f48ad614SDennis Dalessandro 		 */
563f48ad614SDennis Dalessandro 		qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
564f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
565f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
566f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_MIDDLE);
567f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
568f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
569f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn++);
570f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
571f48ad614SDennis Dalessandro 		len = qp->s_len;
572f48ad614SDennis Dalessandro 		if (len > pmtu) {
573f48ad614SDennis Dalessandro 			len = pmtu;
574f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
575f48ad614SDennis Dalessandro 			break;
576f48ad614SDennis Dalessandro 		}
577f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_SEND) {
578f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
5790db3dfa0SJianxin Xiong 		} else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
580f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
581f48ad614SDennis Dalessandro 			/* Immediate data comes after the BTH */
582f48ad614SDennis Dalessandro 			ohdr->u.imm_data = wqe->wr.ex.imm_data;
583f48ad614SDennis Dalessandro 			hwords += 1;
5840db3dfa0SJianxin Xiong 		} else {
5850db3dfa0SJianxin Xiong 			qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
5860db3dfa0SJianxin Xiong 			/* invalidate data comes after the BTH */
5870db3dfa0SJianxin Xiong 			ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
5880db3dfa0SJianxin Xiong 			hwords += 1;
589f48ad614SDennis Dalessandro 		}
590f48ad614SDennis Dalessandro 		if (wqe->wr.send_flags & IB_SEND_SOLICITED)
591f48ad614SDennis Dalessandro 			bth0 |= IB_BTH_SOLICITED;
592f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
593f48ad614SDennis Dalessandro 		qp->s_cur++;
594f48ad614SDennis Dalessandro 		if (qp->s_cur >= qp->s_size)
595f48ad614SDennis Dalessandro 			qp->s_cur = 0;
596f48ad614SDennis Dalessandro 		break;
597f48ad614SDennis Dalessandro 
598f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
599f48ad614SDennis Dalessandro 		/*
600f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
601f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
602f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
603f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_LAST is used by the ACK processing
604f48ad614SDennis Dalessandro 		 * thread to indicate a RDMA write needs to be restarted from
605f48ad614SDennis Dalessandro 		 * an earlier PSN without interfering with the sending thread.
606f48ad614SDennis Dalessandro 		 * See restart_rc().
607f48ad614SDennis Dalessandro 		 */
608f48ad614SDennis Dalessandro 		qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
609f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
610f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
611f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_WRITE_MIDDLE);
612f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
613f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
614f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn++);
615f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
616f48ad614SDennis Dalessandro 		len = qp->s_len;
617f48ad614SDennis Dalessandro 		if (len > pmtu) {
618f48ad614SDennis Dalessandro 			len = pmtu;
619f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
620f48ad614SDennis Dalessandro 			break;
621f48ad614SDennis Dalessandro 		}
622f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
623f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_WRITE_LAST);
624f48ad614SDennis Dalessandro 		} else {
625f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
626f48ad614SDennis Dalessandro 			/* Immediate data comes after the BTH */
627f48ad614SDennis Dalessandro 			ohdr->u.imm_data = wqe->wr.ex.imm_data;
628f48ad614SDennis Dalessandro 			hwords += 1;
629f48ad614SDennis Dalessandro 			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
630f48ad614SDennis Dalessandro 				bth0 |= IB_BTH_SOLICITED;
631f48ad614SDennis Dalessandro 		}
632f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
633f48ad614SDennis Dalessandro 		qp->s_cur++;
634f48ad614SDennis Dalessandro 		if (qp->s_cur >= qp->s_size)
635f48ad614SDennis Dalessandro 			qp->s_cur = 0;
636f48ad614SDennis Dalessandro 		break;
637f48ad614SDennis Dalessandro 
638f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
639f48ad614SDennis Dalessandro 		/*
640f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
641f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
642f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
643f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
644f48ad614SDennis Dalessandro 		 * thread to indicate a RDMA read needs to be restarted from
645f48ad614SDennis Dalessandro 		 * an earlier PSN without interfering with the sending thread.
646f48ad614SDennis Dalessandro 		 * See restart_rc().
647f48ad614SDennis Dalessandro 		 */
648f48ad614SDennis Dalessandro 		len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
649261a4351SMike Marciniszyn 		put_ib_reth_vaddr(
650261a4351SMike Marciniszyn 			wqe->rdma_wr.remote_addr + len,
651261a4351SMike Marciniszyn 			&ohdr->u.rc.reth);
652f48ad614SDennis Dalessandro 		ohdr->u.rc.reth.rkey =
653f48ad614SDennis Dalessandro 			cpu_to_be32(wqe->rdma_wr.rkey);
654f48ad614SDennis Dalessandro 		ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
655f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_REQUEST);
656f48ad614SDennis Dalessandro 		hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
657f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
658f48ad614SDennis Dalessandro 		qp->s_psn = wqe->lpsn + 1;
659f48ad614SDennis Dalessandro 		ss = NULL;
660f48ad614SDennis Dalessandro 		len = 0;
661f48ad614SDennis Dalessandro 		qp->s_cur++;
662f48ad614SDennis Dalessandro 		if (qp->s_cur == qp->s_size)
663f48ad614SDennis Dalessandro 			qp->s_cur = 0;
664f48ad614SDennis Dalessandro 		break;
665f48ad614SDennis Dalessandro 	}
666f48ad614SDennis Dalessandro 	qp->s_sending_hpsn = bth2;
667f48ad614SDennis Dalessandro 	delta = delta_psn(bth2, wqe->psn);
668f48ad614SDennis Dalessandro 	if (delta && delta % HFI1_PSN_CREDIT == 0)
669f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
670f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_SEND_ONE) {
671f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_SEND_ONE;
672f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_WAIT_ACK;
673f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
674f48ad614SDennis Dalessandro 	}
675f48ad614SDennis Dalessandro 	qp->s_len -= len;
676f48ad614SDennis Dalessandro 	qp->s_hdrwords = hwords;
677f48ad614SDennis Dalessandro 	ps->s_txreq->sde = priv->s_sde;
678b777f154SMitko Haralanov 	ps->s_txreq->ss = ss;
679e922ae06SDon Hiatt 	ps->s_txreq->s_cur_size = len;
680f48ad614SDennis Dalessandro 	hfi1_make_ruc_header(
681f48ad614SDennis Dalessandro 		qp,
682f48ad614SDennis Dalessandro 		ohdr,
683f48ad614SDennis Dalessandro 		bth0 | (qp->s_state << 24),
684f48ad614SDennis Dalessandro 		bth2,
685f48ad614SDennis Dalessandro 		middle,
686f48ad614SDennis Dalessandro 		ps);
687f48ad614SDennis Dalessandro 	/* pbc */
688f48ad614SDennis Dalessandro 	ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
689f48ad614SDennis Dalessandro 	return 1;
690f48ad614SDennis Dalessandro 
691f48ad614SDennis Dalessandro done_free_tx:
692f48ad614SDennis Dalessandro 	hfi1_put_txreq(ps->s_txreq);
693f48ad614SDennis Dalessandro 	ps->s_txreq = NULL;
694f48ad614SDennis Dalessandro 	return 1;
695f48ad614SDennis Dalessandro 
696f48ad614SDennis Dalessandro bail:
697f48ad614SDennis Dalessandro 	hfi1_put_txreq(ps->s_txreq);
698f48ad614SDennis Dalessandro 
699f48ad614SDennis Dalessandro bail_no_tx:
700f48ad614SDennis Dalessandro 	ps->s_txreq = NULL;
701f48ad614SDennis Dalessandro 	qp->s_flags &= ~RVT_S_BUSY;
702f48ad614SDennis Dalessandro 	qp->s_hdrwords = 0;
703f48ad614SDennis Dalessandro 	return 0;
704f48ad614SDennis Dalessandro }
705f48ad614SDennis Dalessandro 
706f48ad614SDennis Dalessandro /**
707f48ad614SDennis Dalessandro  * hfi1_send_rc_ack - Construct an ACK packet and send it
708f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
709f48ad614SDennis Dalessandro  *
710f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
711f48ad614SDennis Dalessandro  * Note that RDMA reads and atomics are handled in the
712ca00c62bSDennis Dalessandro  * send side QP state and send engine.
713f48ad614SDennis Dalessandro  */
714f48ad614SDennis Dalessandro void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp,
715f48ad614SDennis Dalessandro 		      int is_fecn)
716f48ad614SDennis Dalessandro {
717f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
718f48ad614SDennis Dalessandro 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
719f48ad614SDennis Dalessandro 	u64 pbc, pbc_flags = 0;
720f48ad614SDennis Dalessandro 	u16 lrh0;
721f48ad614SDennis Dalessandro 	u16 sc5;
722f48ad614SDennis Dalessandro 	u32 bth0;
723f48ad614SDennis Dalessandro 	u32 hwords;
724f48ad614SDennis Dalessandro 	u32 vl, plen;
725f48ad614SDennis Dalessandro 	struct send_context *sc;
726f48ad614SDennis Dalessandro 	struct pio_buf *pbuf;
727261a4351SMike Marciniszyn 	struct ib_header hdr;
728261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
729f48ad614SDennis Dalessandro 	unsigned long flags;
7304fcf1de5SMike Marciniszyn 	struct hfi1_qp_priv *priv = qp->priv;
7314fcf1de5SMike Marciniszyn 
7324fcf1de5SMike Marciniszyn 	/* clear the defer count */
7334fcf1de5SMike Marciniszyn 	priv->r_adefered = 0;
734f48ad614SDennis Dalessandro 
735f48ad614SDennis Dalessandro 	/* Don't send ACK or NAK if a RDMA read or atomic is pending. */
736f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_RESP_PENDING)
737f48ad614SDennis Dalessandro 		goto queue_ack;
738f48ad614SDennis Dalessandro 
739f48ad614SDennis Dalessandro 	/* Ensure s_rdma_ack_cnt changes are committed */
740f48ad614SDennis Dalessandro 	smp_read_barrier_depends();
741f48ad614SDennis Dalessandro 	if (qp->s_rdma_ack_cnt)
742f48ad614SDennis Dalessandro 		goto queue_ack;
743f48ad614SDennis Dalessandro 
744f48ad614SDennis Dalessandro 	/* Construct the header */
745f48ad614SDennis Dalessandro 	/* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
746f48ad614SDennis Dalessandro 	hwords = 6;
747f48ad614SDennis Dalessandro 	if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
748f48ad614SDennis Dalessandro 		hwords += hfi1_make_grh(ibp, &hdr.u.l.grh,
749f48ad614SDennis Dalessandro 				       &qp->remote_ah_attr.grh, hwords, 0);
750f48ad614SDennis Dalessandro 		ohdr = &hdr.u.l.oth;
751f48ad614SDennis Dalessandro 		lrh0 = HFI1_LRH_GRH;
752f48ad614SDennis Dalessandro 	} else {
753f48ad614SDennis Dalessandro 		ohdr = &hdr.u.oth;
754f48ad614SDennis Dalessandro 		lrh0 = HFI1_LRH_BTH;
755f48ad614SDennis Dalessandro 	}
756f48ad614SDennis Dalessandro 	/* read pkey_index w/o lock (its atomic) */
757f48ad614SDennis Dalessandro 	bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
758f48ad614SDennis Dalessandro 	if (qp->s_mig_state == IB_MIG_MIGRATED)
759f48ad614SDennis Dalessandro 		bth0 |= IB_BTH_MIG_REQ;
760f48ad614SDennis Dalessandro 	if (qp->r_nak_state)
761832666c1SDon Hiatt 		ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
762f48ad614SDennis Dalessandro 					    (qp->r_nak_state <<
763832666c1SDon Hiatt 					     IB_AETH_CREDIT_SHIFT));
764f48ad614SDennis Dalessandro 	else
765696513e8SBrian Welty 		ohdr->u.aeth = rvt_compute_aeth(qp);
766f48ad614SDennis Dalessandro 	sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
767f48ad614SDennis Dalessandro 	/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
768f48ad614SDennis Dalessandro 	pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
769f48ad614SDennis Dalessandro 	lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4;
770f48ad614SDennis Dalessandro 	hdr.lrh[0] = cpu_to_be16(lrh0);
771f48ad614SDennis Dalessandro 	hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
772f48ad614SDennis Dalessandro 	hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
773f48ad614SDennis Dalessandro 	hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
774f48ad614SDennis Dalessandro 	ohdr->bth[0] = cpu_to_be32(bth0);
775f48ad614SDennis Dalessandro 	ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
776f48ad614SDennis Dalessandro 	ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT);
777f48ad614SDennis Dalessandro 	ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
778f48ad614SDennis Dalessandro 
779f48ad614SDennis Dalessandro 	/* Don't try to send ACKs if the link isn't ACTIVE */
780f48ad614SDennis Dalessandro 	if (driver_lstate(ppd) != IB_PORT_ACTIVE)
781f48ad614SDennis Dalessandro 		return;
782f48ad614SDennis Dalessandro 
783f48ad614SDennis Dalessandro 	sc = rcd->sc;
784f48ad614SDennis Dalessandro 	plen = 2 /* PBC */ + hwords;
785f48ad614SDennis Dalessandro 	vl = sc_to_vlt(ppd->dd, sc5);
786f48ad614SDennis Dalessandro 	pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen);
787f48ad614SDennis Dalessandro 
788f48ad614SDennis Dalessandro 	pbuf = sc_buffer_alloc(sc, plen, NULL, NULL);
789f48ad614SDennis Dalessandro 	if (!pbuf) {
790f48ad614SDennis Dalessandro 		/*
791f48ad614SDennis Dalessandro 		 * We have no room to send at the moment.  Pass
792ca00c62bSDennis Dalessandro 		 * responsibility for sending the ACK to the send engine
793f48ad614SDennis Dalessandro 		 * so that when enough buffer space becomes available,
794f48ad614SDennis Dalessandro 		 * the ACK is sent ahead of other outgoing packets.
795f48ad614SDennis Dalessandro 		 */
796f48ad614SDennis Dalessandro 		goto queue_ack;
797f48ad614SDennis Dalessandro 	}
798f48ad614SDennis Dalessandro 
799f48ad614SDennis Dalessandro 	trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr);
800f48ad614SDennis Dalessandro 
801f48ad614SDennis Dalessandro 	/* write the pbc and data */
802f48ad614SDennis Dalessandro 	ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords);
803f48ad614SDennis Dalessandro 
804f48ad614SDennis Dalessandro 	return;
805f48ad614SDennis Dalessandro 
806f48ad614SDennis Dalessandro queue_ack:
807f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
80872f53af2SMike Marciniszyn 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
80972f53af2SMike Marciniszyn 		goto unlock;
81072f53af2SMike Marciniszyn 	this_cpu_inc(*ibp->rvp.rc_qacks);
811f48ad614SDennis Dalessandro 	qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
812f48ad614SDennis Dalessandro 	qp->s_nak_state = qp->r_nak_state;
813f48ad614SDennis Dalessandro 	qp->s_ack_psn = qp->r_ack_psn;
814f48ad614SDennis Dalessandro 	if (is_fecn)
815f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_ECN;
816f48ad614SDennis Dalessandro 
817ca00c62bSDennis Dalessandro 	/* Schedule the send engine. */
818f48ad614SDennis Dalessandro 	hfi1_schedule_send(qp);
81972f53af2SMike Marciniszyn unlock:
820f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
821f48ad614SDennis Dalessandro }
822f48ad614SDennis Dalessandro 
823f48ad614SDennis Dalessandro /**
824f48ad614SDennis Dalessandro  * reset_psn - reset the QP state to send starting from PSN
825f48ad614SDennis Dalessandro  * @qp: the QP
826f48ad614SDennis Dalessandro  * @psn: the packet sequence number to restart at
827f48ad614SDennis Dalessandro  *
828f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an incoming RC ACK
829f48ad614SDennis Dalessandro  * for the given QP.
830f48ad614SDennis Dalessandro  * Called at interrupt level with the QP s_lock held.
831f48ad614SDennis Dalessandro  */
832f48ad614SDennis Dalessandro static void reset_psn(struct rvt_qp *qp, u32 psn)
833f48ad614SDennis Dalessandro {
834f48ad614SDennis Dalessandro 	u32 n = qp->s_acked;
835f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
836f48ad614SDennis Dalessandro 	u32 opcode;
837f48ad614SDennis Dalessandro 
83868e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
839f48ad614SDennis Dalessandro 	qp->s_cur = n;
840f48ad614SDennis Dalessandro 
841f48ad614SDennis Dalessandro 	/*
842f48ad614SDennis Dalessandro 	 * If we are starting the request from the beginning,
843f48ad614SDennis Dalessandro 	 * let the normal send code handle initialization.
844f48ad614SDennis Dalessandro 	 */
845f48ad614SDennis Dalessandro 	if (cmp_psn(psn, wqe->psn) <= 0) {
846f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_LAST);
847f48ad614SDennis Dalessandro 		goto done;
848f48ad614SDennis Dalessandro 	}
849f48ad614SDennis Dalessandro 
850f48ad614SDennis Dalessandro 	/* Find the work request opcode corresponding to the given PSN. */
851f48ad614SDennis Dalessandro 	opcode = wqe->wr.opcode;
852f48ad614SDennis Dalessandro 	for (;;) {
853f48ad614SDennis Dalessandro 		int diff;
854f48ad614SDennis Dalessandro 
855f48ad614SDennis Dalessandro 		if (++n == qp->s_size)
856f48ad614SDennis Dalessandro 			n = 0;
857f48ad614SDennis Dalessandro 		if (n == qp->s_tail)
858f48ad614SDennis Dalessandro 			break;
859f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, n);
860f48ad614SDennis Dalessandro 		diff = cmp_psn(psn, wqe->psn);
861f48ad614SDennis Dalessandro 		if (diff < 0)
862f48ad614SDennis Dalessandro 			break;
863f48ad614SDennis Dalessandro 		qp->s_cur = n;
864f48ad614SDennis Dalessandro 		/*
865f48ad614SDennis Dalessandro 		 * If we are starting the request from the beginning,
866f48ad614SDennis Dalessandro 		 * let the normal send code handle initialization.
867f48ad614SDennis Dalessandro 		 */
868f48ad614SDennis Dalessandro 		if (diff == 0) {
869f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
870f48ad614SDennis Dalessandro 			goto done;
871f48ad614SDennis Dalessandro 		}
872f48ad614SDennis Dalessandro 		opcode = wqe->wr.opcode;
873f48ad614SDennis Dalessandro 	}
874f48ad614SDennis Dalessandro 
875f48ad614SDennis Dalessandro 	/*
876f48ad614SDennis Dalessandro 	 * Set the state to restart in the middle of a request.
877f48ad614SDennis Dalessandro 	 * Don't change the s_sge, s_cur_sge, or s_cur_size.
878f48ad614SDennis Dalessandro 	 * See hfi1_make_rc_req().
879f48ad614SDennis Dalessandro 	 */
880f48ad614SDennis Dalessandro 	switch (opcode) {
881f48ad614SDennis Dalessandro 	case IB_WR_SEND:
882f48ad614SDennis Dalessandro 	case IB_WR_SEND_WITH_IMM:
883f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
884f48ad614SDennis Dalessandro 		break;
885f48ad614SDennis Dalessandro 
886f48ad614SDennis Dalessandro 	case IB_WR_RDMA_WRITE:
887f48ad614SDennis Dalessandro 	case IB_WR_RDMA_WRITE_WITH_IMM:
888f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
889f48ad614SDennis Dalessandro 		break;
890f48ad614SDennis Dalessandro 
891f48ad614SDennis Dalessandro 	case IB_WR_RDMA_READ:
892f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
893f48ad614SDennis Dalessandro 		break;
894f48ad614SDennis Dalessandro 
895f48ad614SDennis Dalessandro 	default:
896f48ad614SDennis Dalessandro 		/*
897f48ad614SDennis Dalessandro 		 * This case shouldn't happen since its only
898f48ad614SDennis Dalessandro 		 * one PSN per req.
899f48ad614SDennis Dalessandro 		 */
900f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_LAST);
901f48ad614SDennis Dalessandro 	}
902f48ad614SDennis Dalessandro done:
903f48ad614SDennis Dalessandro 	qp->s_psn = psn;
904f48ad614SDennis Dalessandro 	/*
905f48ad614SDennis Dalessandro 	 * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
906ca00c62bSDennis Dalessandro 	 * asynchronously before the send engine can get scheduled.
907f48ad614SDennis Dalessandro 	 * Doing it in hfi1_make_rc_req() is too late.
908f48ad614SDennis Dalessandro 	 */
909f48ad614SDennis Dalessandro 	if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
910f48ad614SDennis Dalessandro 	    (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
911f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_WAIT_PSN;
912f48ad614SDennis Dalessandro 	qp->s_flags &= ~RVT_S_AHG_VALID;
913f48ad614SDennis Dalessandro }
914f48ad614SDennis Dalessandro 
915f48ad614SDennis Dalessandro /*
916f48ad614SDennis Dalessandro  * Back up requester to resend the last un-ACKed request.
917f48ad614SDennis Dalessandro  * The QP r_lock and s_lock should be held and interrupts disabled.
918f48ad614SDennis Dalessandro  */
91956acbbfbSVenkata Sandeep Dhanalakota void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
920f48ad614SDennis Dalessandro {
921f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
922f48ad614SDennis Dalessandro 	struct hfi1_ibport *ibp;
923f48ad614SDennis Dalessandro 
92468e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->r_lock);
92568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
926f48ad614SDennis Dalessandro 	if (qp->s_retry == 0) {
927f48ad614SDennis Dalessandro 		if (qp->s_mig_state == IB_MIG_ARMED) {
928f48ad614SDennis Dalessandro 			hfi1_migrate_qp(qp);
929f48ad614SDennis Dalessandro 			qp->s_retry = qp->s_retry_cnt;
930f48ad614SDennis Dalessandro 		} else if (qp->s_last == qp->s_acked) {
931f48ad614SDennis Dalessandro 			hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
932f48ad614SDennis Dalessandro 			rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
933f48ad614SDennis Dalessandro 			return;
934f48ad614SDennis Dalessandro 		} else { /* need to handle delayed completion */
935f48ad614SDennis Dalessandro 			return;
936f48ad614SDennis Dalessandro 		}
937f48ad614SDennis Dalessandro 	} else {
938f48ad614SDennis Dalessandro 		qp->s_retry--;
939f48ad614SDennis Dalessandro 	}
940f48ad614SDennis Dalessandro 
941f48ad614SDennis Dalessandro 	ibp = to_iport(qp->ibqp.device, qp->port_num);
942f48ad614SDennis Dalessandro 	if (wqe->wr.opcode == IB_WR_RDMA_READ)
943f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends++;
944f48ad614SDennis Dalessandro 	else
945f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
946f48ad614SDennis Dalessandro 
947f48ad614SDennis Dalessandro 	qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
948f48ad614SDennis Dalessandro 			 RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
949f48ad614SDennis Dalessandro 			 RVT_S_WAIT_ACK);
950f48ad614SDennis Dalessandro 	if (wait)
951f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_SEND_ONE;
952f48ad614SDennis Dalessandro 	reset_psn(qp, psn);
953f48ad614SDennis Dalessandro }
954f48ad614SDennis Dalessandro 
955f48ad614SDennis Dalessandro /*
956f48ad614SDennis Dalessandro  * Set qp->s_sending_psn to the next PSN after the given one.
957f48ad614SDennis Dalessandro  * This would be psn+1 except when RDMA reads are present.
958f48ad614SDennis Dalessandro  */
959f48ad614SDennis Dalessandro static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
960f48ad614SDennis Dalessandro {
961f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
962f48ad614SDennis Dalessandro 	u32 n = qp->s_last;
963f48ad614SDennis Dalessandro 
96468e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
965f48ad614SDennis Dalessandro 	/* Find the work request corresponding to the given PSN. */
966f48ad614SDennis Dalessandro 	for (;;) {
967f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, n);
968f48ad614SDennis Dalessandro 		if (cmp_psn(psn, wqe->lpsn) <= 0) {
969f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_RDMA_READ)
970f48ad614SDennis Dalessandro 				qp->s_sending_psn = wqe->lpsn + 1;
971f48ad614SDennis Dalessandro 			else
972f48ad614SDennis Dalessandro 				qp->s_sending_psn = psn + 1;
973f48ad614SDennis Dalessandro 			break;
974f48ad614SDennis Dalessandro 		}
975f48ad614SDennis Dalessandro 		if (++n == qp->s_size)
976f48ad614SDennis Dalessandro 			n = 0;
977f48ad614SDennis Dalessandro 		if (n == qp->s_tail)
978f48ad614SDennis Dalessandro 			break;
979f48ad614SDennis Dalessandro 	}
980f48ad614SDennis Dalessandro }
981f48ad614SDennis Dalessandro 
982f48ad614SDennis Dalessandro /*
983f48ad614SDennis Dalessandro  * This should be called with the QP s_lock held and interrupts disabled.
984f48ad614SDennis Dalessandro  */
985261a4351SMike Marciniszyn void hfi1_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr)
986f48ad614SDennis Dalessandro {
987261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
988f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
989f48ad614SDennis Dalessandro 	u32 opcode;
990f48ad614SDennis Dalessandro 	u32 psn;
991f48ad614SDennis Dalessandro 
99268e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
993f9215b5eSMike Marciniszyn 	if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
994f48ad614SDennis Dalessandro 		return;
995f48ad614SDennis Dalessandro 
996f48ad614SDennis Dalessandro 	/* Find out where the BTH is */
997f48ad614SDennis Dalessandro 	if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH)
998f48ad614SDennis Dalessandro 		ohdr = &hdr->u.oth;
999f48ad614SDennis Dalessandro 	else
1000f48ad614SDennis Dalessandro 		ohdr = &hdr->u.l.oth;
1001f48ad614SDennis Dalessandro 
1002f48ad614SDennis Dalessandro 	opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
1003f48ad614SDennis Dalessandro 	if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1004f48ad614SDennis Dalessandro 	    opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1005f48ad614SDennis Dalessandro 		WARN_ON(!qp->s_rdma_ack_cnt);
1006f48ad614SDennis Dalessandro 		qp->s_rdma_ack_cnt--;
1007f48ad614SDennis Dalessandro 		return;
1008f48ad614SDennis Dalessandro 	}
1009f48ad614SDennis Dalessandro 
1010f48ad614SDennis Dalessandro 	psn = be32_to_cpu(ohdr->bth[2]);
1011f48ad614SDennis Dalessandro 	reset_sending_psn(qp, psn);
1012f48ad614SDennis Dalessandro 
1013f48ad614SDennis Dalessandro 	/*
1014f48ad614SDennis Dalessandro 	 * Start timer after a packet requesting an ACK has been sent and
1015f48ad614SDennis Dalessandro 	 * there are still requests that haven't been acked.
1016f48ad614SDennis Dalessandro 	 */
1017f48ad614SDennis Dalessandro 	if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
1018f48ad614SDennis Dalessandro 	    !(qp->s_flags &
1019f48ad614SDennis Dalessandro 		(RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
1020f48ad614SDennis Dalessandro 		(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
102156acbbfbSVenkata Sandeep Dhanalakota 		rvt_add_retry_timer(qp);
1022f48ad614SDennis Dalessandro 
1023f48ad614SDennis Dalessandro 	while (qp->s_last != qp->s_acked) {
1024f48ad614SDennis Dalessandro 		u32 s_last;
1025f48ad614SDennis Dalessandro 
1026f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_last);
1027f48ad614SDennis Dalessandro 		if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1028f48ad614SDennis Dalessandro 		    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1029f48ad614SDennis Dalessandro 			break;
1030f48ad614SDennis Dalessandro 		s_last = qp->s_last;
1031f48ad614SDennis Dalessandro 		if (++s_last >= qp->s_size)
1032f48ad614SDennis Dalessandro 			s_last = 0;
1033f48ad614SDennis Dalessandro 		qp->s_last = s_last;
1034f48ad614SDennis Dalessandro 		/* see post_send() */
1035f48ad614SDennis Dalessandro 		barrier();
1036c64607aaSMike Marciniszyn 		rvt_put_swqe(wqe);
103743a474aaSMike Marciniszyn 		rvt_qp_swqe_complete(qp,
103843a474aaSMike Marciniszyn 				     wqe,
103943a474aaSMike Marciniszyn 				     ib_hfi1_wc_opcode[wqe->wr.opcode],
104043a474aaSMike Marciniszyn 				     IB_WC_SUCCESS);
1041f48ad614SDennis Dalessandro 	}
1042f48ad614SDennis Dalessandro 	/*
1043f48ad614SDennis Dalessandro 	 * If we were waiting for sends to complete before re-sending,
1044f48ad614SDennis Dalessandro 	 * and they are now complete, restart sending.
1045f48ad614SDennis Dalessandro 	 */
1046462b6b21SSebastian Sanchez 	trace_hfi1_sendcomplete(qp, psn);
1047f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_WAIT_PSN &&
1048f48ad614SDennis Dalessandro 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1049f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_WAIT_PSN;
1050f48ad614SDennis Dalessandro 		qp->s_sending_psn = qp->s_psn;
1051f48ad614SDennis Dalessandro 		qp->s_sending_hpsn = qp->s_psn - 1;
1052f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
1053f48ad614SDennis Dalessandro 	}
1054f48ad614SDennis Dalessandro }
1055f48ad614SDennis Dalessandro 
1056f48ad614SDennis Dalessandro static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
1057f48ad614SDennis Dalessandro {
1058f48ad614SDennis Dalessandro 	qp->s_last_psn = psn;
1059f48ad614SDennis Dalessandro }
1060f48ad614SDennis Dalessandro 
1061f48ad614SDennis Dalessandro /*
1062f48ad614SDennis Dalessandro  * Generate a SWQE completion.
1063f48ad614SDennis Dalessandro  * This is similar to hfi1_send_complete but has to check to be sure
1064f48ad614SDennis Dalessandro  * that the SGEs are not being referenced if the SWQE is being resent.
1065f48ad614SDennis Dalessandro  */
1066f48ad614SDennis Dalessandro static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
1067f48ad614SDennis Dalessandro 					 struct rvt_swqe *wqe,
1068f48ad614SDennis Dalessandro 					 struct hfi1_ibport *ibp)
1069f48ad614SDennis Dalessandro {
107068e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1071f48ad614SDennis Dalessandro 	/*
1072f48ad614SDennis Dalessandro 	 * Don't decrement refcount and don't generate a
1073f48ad614SDennis Dalessandro 	 * completion if the SWQE is being resent until the send
1074f48ad614SDennis Dalessandro 	 * is finished.
1075f48ad614SDennis Dalessandro 	 */
1076f48ad614SDennis Dalessandro 	if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
1077f48ad614SDennis Dalessandro 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1078f48ad614SDennis Dalessandro 		u32 s_last;
1079f48ad614SDennis Dalessandro 
1080c64607aaSMike Marciniszyn 		rvt_put_swqe(wqe);
1081f48ad614SDennis Dalessandro 		s_last = qp->s_last;
1082f48ad614SDennis Dalessandro 		if (++s_last >= qp->s_size)
1083f48ad614SDennis Dalessandro 			s_last = 0;
1084f48ad614SDennis Dalessandro 		qp->s_last = s_last;
1085f48ad614SDennis Dalessandro 		/* see post_send() */
1086f48ad614SDennis Dalessandro 		barrier();
108743a474aaSMike Marciniszyn 		rvt_qp_swqe_complete(qp,
108843a474aaSMike Marciniszyn 				     wqe,
108943a474aaSMike Marciniszyn 				     ib_hfi1_wc_opcode[wqe->wr.opcode],
109043a474aaSMike Marciniszyn 				     IB_WC_SUCCESS);
1091f48ad614SDennis Dalessandro 	} else {
1092f48ad614SDennis Dalessandro 		struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1093f48ad614SDennis Dalessandro 
1094f48ad614SDennis Dalessandro 		this_cpu_inc(*ibp->rvp.rc_delayed_comp);
1095f48ad614SDennis Dalessandro 		/*
1096f48ad614SDennis Dalessandro 		 * If send progress not running attempt to progress
1097f48ad614SDennis Dalessandro 		 * SDMA queue.
1098f48ad614SDennis Dalessandro 		 */
1099f48ad614SDennis Dalessandro 		if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
1100f48ad614SDennis Dalessandro 			struct sdma_engine *engine;
1101f48ad614SDennis Dalessandro 			u8 sc5;
1102f48ad614SDennis Dalessandro 
1103f48ad614SDennis Dalessandro 			/* For now use sc to find engine */
1104f48ad614SDennis Dalessandro 			sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
1105f48ad614SDennis Dalessandro 			engine = qp_to_sdma_engine(qp, sc5);
1106f48ad614SDennis Dalessandro 			sdma_engine_progress_schedule(engine);
1107f48ad614SDennis Dalessandro 		}
1108f48ad614SDennis Dalessandro 	}
1109f48ad614SDennis Dalessandro 
1110f48ad614SDennis Dalessandro 	qp->s_retry = qp->s_retry_cnt;
1111f48ad614SDennis Dalessandro 	update_last_psn(qp, wqe->lpsn);
1112f48ad614SDennis Dalessandro 
1113f48ad614SDennis Dalessandro 	/*
1114f48ad614SDennis Dalessandro 	 * If we are completing a request which is in the process of
1115f48ad614SDennis Dalessandro 	 * being resent, we can stop re-sending it since we know the
1116f48ad614SDennis Dalessandro 	 * responder has already seen it.
1117f48ad614SDennis Dalessandro 	 */
1118f48ad614SDennis Dalessandro 	if (qp->s_acked == qp->s_cur) {
1119f48ad614SDennis Dalessandro 		if (++qp->s_cur >= qp->s_size)
1120f48ad614SDennis Dalessandro 			qp->s_cur = 0;
1121f48ad614SDennis Dalessandro 		qp->s_acked = qp->s_cur;
1122f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
1123f48ad614SDennis Dalessandro 		if (qp->s_acked != qp->s_tail) {
1124f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
1125f48ad614SDennis Dalessandro 			qp->s_psn = wqe->psn;
1126f48ad614SDennis Dalessandro 		}
1127f48ad614SDennis Dalessandro 	} else {
1128f48ad614SDennis Dalessandro 		if (++qp->s_acked >= qp->s_size)
1129f48ad614SDennis Dalessandro 			qp->s_acked = 0;
1130f48ad614SDennis Dalessandro 		if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1131f48ad614SDennis Dalessandro 			qp->s_draining = 0;
1132f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1133f48ad614SDennis Dalessandro 	}
1134f48ad614SDennis Dalessandro 	return wqe;
1135f48ad614SDennis Dalessandro }
1136f48ad614SDennis Dalessandro 
1137f48ad614SDennis Dalessandro /**
1138f48ad614SDennis Dalessandro  * do_rc_ack - process an incoming RC ACK
1139f48ad614SDennis Dalessandro  * @qp: the QP the ACK came in on
1140f48ad614SDennis Dalessandro  * @psn: the packet sequence number of the ACK
1141f48ad614SDennis Dalessandro  * @opcode: the opcode of the request that resulted in the ACK
1142f48ad614SDennis Dalessandro  *
1143f48ad614SDennis Dalessandro  * This is called from rc_rcv_resp() to process an incoming RC ACK
1144f48ad614SDennis Dalessandro  * for the given QP.
1145f48ad614SDennis Dalessandro  * May be called at interrupt level, with the QP s_lock held.
1146f48ad614SDennis Dalessandro  * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1147f48ad614SDennis Dalessandro  */
1148f48ad614SDennis Dalessandro static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
1149f48ad614SDennis Dalessandro 		     u64 val, struct hfi1_ctxtdata *rcd)
1150f48ad614SDennis Dalessandro {
1151f48ad614SDennis Dalessandro 	struct hfi1_ibport *ibp;
1152f48ad614SDennis Dalessandro 	enum ib_wc_status status;
1153f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1154f48ad614SDennis Dalessandro 	int ret = 0;
1155f48ad614SDennis Dalessandro 	u32 ack_psn;
1156f48ad614SDennis Dalessandro 	int diff;
1157f48ad614SDennis Dalessandro 
115868e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1159f48ad614SDennis Dalessandro 	/*
1160f48ad614SDennis Dalessandro 	 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1161f48ad614SDennis Dalessandro 	 * requests and implicitly NAK RDMA read and atomic requests issued
1162f48ad614SDennis Dalessandro 	 * before the NAK'ed request.  The MSN won't include the NAK'ed
1163f48ad614SDennis Dalessandro 	 * request but will include an ACK'ed request(s).
1164f48ad614SDennis Dalessandro 	 */
1165f48ad614SDennis Dalessandro 	ack_psn = psn;
1166832666c1SDon Hiatt 	if (aeth >> IB_AETH_NAK_SHIFT)
1167f48ad614SDennis Dalessandro 		ack_psn--;
1168f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1169f3e862cbSSebastian Sanchez 	ibp = rcd_to_iport(rcd);
1170f48ad614SDennis Dalessandro 
1171f48ad614SDennis Dalessandro 	/*
1172f48ad614SDennis Dalessandro 	 * The MSN might be for a later WQE than the PSN indicates so
1173f48ad614SDennis Dalessandro 	 * only complete WQEs that the PSN finishes.
1174f48ad614SDennis Dalessandro 	 */
1175f48ad614SDennis Dalessandro 	while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
1176f48ad614SDennis Dalessandro 		/*
1177f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_ONLY is a special case since
1178f48ad614SDennis Dalessandro 		 * we want to generate completion events for everything
1179f48ad614SDennis Dalessandro 		 * before the RDMA read, copy the data, then generate
1180f48ad614SDennis Dalessandro 		 * the completion for the read.
1181f48ad614SDennis Dalessandro 		 */
1182f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ &&
1183f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
1184f48ad614SDennis Dalessandro 		    diff == 0) {
1185f48ad614SDennis Dalessandro 			ret = 1;
1186f48ad614SDennis Dalessandro 			goto bail_stop;
1187f48ad614SDennis Dalessandro 		}
1188f48ad614SDennis Dalessandro 		/*
1189f48ad614SDennis Dalessandro 		 * If this request is a RDMA read or atomic, and the ACK is
1190f48ad614SDennis Dalessandro 		 * for a later operation, this ACK NAKs the RDMA read or
1191f48ad614SDennis Dalessandro 		 * atomic.  In other words, only a RDMA_READ_LAST or ONLY
1192f48ad614SDennis Dalessandro 		 * can ACK a RDMA read and likewise for atomic ops.  Note
1193f48ad614SDennis Dalessandro 		 * that the NAK case can only happen if relaxed ordering is
1194f48ad614SDennis Dalessandro 		 * used and requests are sent after an RDMA read or atomic
1195f48ad614SDennis Dalessandro 		 * is sent but before the response is received.
1196f48ad614SDennis Dalessandro 		 */
1197f48ad614SDennis Dalessandro 		if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
1198f48ad614SDennis Dalessandro 		     (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
1199f48ad614SDennis Dalessandro 		    ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1200f48ad614SDennis Dalessandro 		      wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
1201f48ad614SDennis Dalessandro 		     (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
1202f48ad614SDennis Dalessandro 			/* Retry this request. */
1203f48ad614SDennis Dalessandro 			if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
1204f48ad614SDennis Dalessandro 				qp->r_flags |= RVT_R_RDMAR_SEQ;
120556acbbfbSVenkata Sandeep Dhanalakota 				hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
1206f48ad614SDennis Dalessandro 				if (list_empty(&qp->rspwait)) {
1207f48ad614SDennis Dalessandro 					qp->r_flags |= RVT_R_RSP_SEND;
12084d6f85c3SMike Marciniszyn 					rvt_get_qp(qp);
1209f48ad614SDennis Dalessandro 					list_add_tail(&qp->rspwait,
1210f48ad614SDennis Dalessandro 						      &rcd->qp_wait_list);
1211f48ad614SDennis Dalessandro 				}
1212f48ad614SDennis Dalessandro 			}
1213f48ad614SDennis Dalessandro 			/*
1214f48ad614SDennis Dalessandro 			 * No need to process the ACK/NAK since we are
1215f48ad614SDennis Dalessandro 			 * restarting an earlier request.
1216f48ad614SDennis Dalessandro 			 */
1217f48ad614SDennis Dalessandro 			goto bail_stop;
1218f48ad614SDennis Dalessandro 		}
1219f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1220f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1221f48ad614SDennis Dalessandro 			u64 *vaddr = wqe->sg_list[0].vaddr;
1222f48ad614SDennis Dalessandro 			*vaddr = val;
1223f48ad614SDennis Dalessandro 		}
1224f48ad614SDennis Dalessandro 		if (qp->s_num_rd_atomic &&
1225f48ad614SDennis Dalessandro 		    (wqe->wr.opcode == IB_WR_RDMA_READ ||
1226f48ad614SDennis Dalessandro 		     wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1227f48ad614SDennis Dalessandro 		     wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
1228f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic--;
1229f48ad614SDennis Dalessandro 			/* Restart sending task if fence is complete */
1230f48ad614SDennis Dalessandro 			if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
1231f48ad614SDennis Dalessandro 			    !qp->s_num_rd_atomic) {
1232f48ad614SDennis Dalessandro 				qp->s_flags &= ~(RVT_S_WAIT_FENCE |
1233f48ad614SDennis Dalessandro 						 RVT_S_WAIT_ACK);
1234f48ad614SDennis Dalessandro 				hfi1_schedule_send(qp);
1235f48ad614SDennis Dalessandro 			} else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
1236f48ad614SDennis Dalessandro 				qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
1237f48ad614SDennis Dalessandro 						 RVT_S_WAIT_ACK);
1238f48ad614SDennis Dalessandro 				hfi1_schedule_send(qp);
1239f48ad614SDennis Dalessandro 			}
1240f48ad614SDennis Dalessandro 		}
1241f48ad614SDennis Dalessandro 		wqe = do_rc_completion(qp, wqe, ibp);
1242f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
1243f48ad614SDennis Dalessandro 			break;
1244f48ad614SDennis Dalessandro 	}
1245f48ad614SDennis Dalessandro 
1246832666c1SDon Hiatt 	switch (aeth >> IB_AETH_NAK_SHIFT) {
1247f48ad614SDennis Dalessandro 	case 0:         /* ACK */
1248f48ad614SDennis Dalessandro 		this_cpu_inc(*ibp->rvp.rc_acks);
1249f48ad614SDennis Dalessandro 		if (qp->s_acked != qp->s_tail) {
1250f48ad614SDennis Dalessandro 			/*
1251f48ad614SDennis Dalessandro 			 * We are expecting more ACKs so
1252f48ad614SDennis Dalessandro 			 * mod the retry timer.
1253f48ad614SDennis Dalessandro 			 */
125456acbbfbSVenkata Sandeep Dhanalakota 			rvt_mod_retry_timer(qp);
1255f48ad614SDennis Dalessandro 			/*
1256f48ad614SDennis Dalessandro 			 * We can stop re-sending the earlier packets and
1257f48ad614SDennis Dalessandro 			 * continue with the next packet the receiver wants.
1258f48ad614SDennis Dalessandro 			 */
1259f48ad614SDennis Dalessandro 			if (cmp_psn(qp->s_psn, psn) <= 0)
1260f48ad614SDennis Dalessandro 				reset_psn(qp, psn + 1);
1261f48ad614SDennis Dalessandro 		} else {
1262f48ad614SDennis Dalessandro 			/* No more acks - kill all timers */
126356acbbfbSVenkata Sandeep Dhanalakota 			rvt_stop_rc_timers(qp);
1264f48ad614SDennis Dalessandro 			if (cmp_psn(qp->s_psn, psn) <= 0) {
1265f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_LAST);
1266f48ad614SDennis Dalessandro 				qp->s_psn = psn + 1;
1267f48ad614SDennis Dalessandro 			}
1268f48ad614SDennis Dalessandro 		}
1269f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_ACK) {
1270f48ad614SDennis Dalessandro 			qp->s_flags &= ~RVT_S_WAIT_ACK;
1271f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
1272f48ad614SDennis Dalessandro 		}
1273696513e8SBrian Welty 		rvt_get_credit(qp, aeth);
1274f48ad614SDennis Dalessandro 		qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1275f48ad614SDennis Dalessandro 		qp->s_retry = qp->s_retry_cnt;
1276f48ad614SDennis Dalessandro 		update_last_psn(qp, psn);
1277f48ad614SDennis Dalessandro 		return 1;
1278f48ad614SDennis Dalessandro 
1279f48ad614SDennis Dalessandro 	case 1:         /* RNR NAK */
1280f48ad614SDennis Dalessandro 		ibp->rvp.n_rnr_naks++;
1281f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
1282f48ad614SDennis Dalessandro 			goto bail_stop;
1283f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_RNR)
1284f48ad614SDennis Dalessandro 			goto bail_stop;
1285f48ad614SDennis Dalessandro 		if (qp->s_rnr_retry == 0) {
1286f48ad614SDennis Dalessandro 			status = IB_WC_RNR_RETRY_EXC_ERR;
1287f48ad614SDennis Dalessandro 			goto class_b;
1288f48ad614SDennis Dalessandro 		}
1289f48ad614SDennis Dalessandro 		if (qp->s_rnr_retry_cnt < 7)
1290f48ad614SDennis Dalessandro 			qp->s_rnr_retry--;
1291f48ad614SDennis Dalessandro 
1292f48ad614SDennis Dalessandro 		/* The last valid PSN is the previous PSN. */
1293f48ad614SDennis Dalessandro 		update_last_psn(qp, psn - 1);
1294f48ad614SDennis Dalessandro 
1295f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
1296f48ad614SDennis Dalessandro 
1297f48ad614SDennis Dalessandro 		reset_psn(qp, psn);
1298f48ad614SDennis Dalessandro 
1299f48ad614SDennis Dalessandro 		qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
130056acbbfbSVenkata Sandeep Dhanalakota 		rvt_stop_rc_timers(qp);
130156acbbfbSVenkata Sandeep Dhanalakota 		rvt_add_rnr_timer(qp, aeth);
1302f48ad614SDennis Dalessandro 		return 0;
1303f48ad614SDennis Dalessandro 
1304f48ad614SDennis Dalessandro 	case 3:         /* NAK */
1305f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
1306f48ad614SDennis Dalessandro 			goto bail_stop;
1307f48ad614SDennis Dalessandro 		/* The last valid PSN is the previous PSN. */
1308f48ad614SDennis Dalessandro 		update_last_psn(qp, psn - 1);
1309832666c1SDon Hiatt 		switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
1310832666c1SDon Hiatt 			IB_AETH_CREDIT_MASK) {
1311f48ad614SDennis Dalessandro 		case 0: /* PSN sequence error */
1312f48ad614SDennis Dalessandro 			ibp->rvp.n_seq_naks++;
1313f48ad614SDennis Dalessandro 			/*
1314f48ad614SDennis Dalessandro 			 * Back up to the responder's expected PSN.
1315f48ad614SDennis Dalessandro 			 * Note that we might get a NAK in the middle of an
1316f48ad614SDennis Dalessandro 			 * RDMA READ response which terminates the RDMA
1317f48ad614SDennis Dalessandro 			 * READ.
1318f48ad614SDennis Dalessandro 			 */
131956acbbfbSVenkata Sandeep Dhanalakota 			hfi1_restart_rc(qp, psn, 0);
1320f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
1321f48ad614SDennis Dalessandro 			break;
1322f48ad614SDennis Dalessandro 
1323f48ad614SDennis Dalessandro 		case 1: /* Invalid Request */
1324f48ad614SDennis Dalessandro 			status = IB_WC_REM_INV_REQ_ERR;
1325f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
1326f48ad614SDennis Dalessandro 			goto class_b;
1327f48ad614SDennis Dalessandro 
1328f48ad614SDennis Dalessandro 		case 2: /* Remote Access Error */
1329f48ad614SDennis Dalessandro 			status = IB_WC_REM_ACCESS_ERR;
1330f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
1331f48ad614SDennis Dalessandro 			goto class_b;
1332f48ad614SDennis Dalessandro 
1333f48ad614SDennis Dalessandro 		case 3: /* Remote Operation Error */
1334f48ad614SDennis Dalessandro 			status = IB_WC_REM_OP_ERR;
1335f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
1336f48ad614SDennis Dalessandro class_b:
1337f48ad614SDennis Dalessandro 			if (qp->s_last == qp->s_acked) {
1338f48ad614SDennis Dalessandro 				hfi1_send_complete(qp, wqe, status);
1339f48ad614SDennis Dalessandro 				rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1340f48ad614SDennis Dalessandro 			}
1341f48ad614SDennis Dalessandro 			break;
1342f48ad614SDennis Dalessandro 
1343f48ad614SDennis Dalessandro 		default:
1344f48ad614SDennis Dalessandro 			/* Ignore other reserved NAK error codes */
1345f48ad614SDennis Dalessandro 			goto reserved;
1346f48ad614SDennis Dalessandro 		}
1347f48ad614SDennis Dalessandro 		qp->s_retry = qp->s_retry_cnt;
1348f48ad614SDennis Dalessandro 		qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1349f48ad614SDennis Dalessandro 		goto bail_stop;
1350f48ad614SDennis Dalessandro 
1351f48ad614SDennis Dalessandro 	default:                /* 2: reserved */
1352f48ad614SDennis Dalessandro reserved:
1353f48ad614SDennis Dalessandro 		/* Ignore reserved NAK codes. */
1354f48ad614SDennis Dalessandro 		goto bail_stop;
1355f48ad614SDennis Dalessandro 	}
1356f48ad614SDennis Dalessandro 	/* cannot be reached  */
1357f48ad614SDennis Dalessandro bail_stop:
135856acbbfbSVenkata Sandeep Dhanalakota 	rvt_stop_rc_timers(qp);
1359f48ad614SDennis Dalessandro 	return ret;
1360f48ad614SDennis Dalessandro }
1361f48ad614SDennis Dalessandro 
1362f48ad614SDennis Dalessandro /*
1363f48ad614SDennis Dalessandro  * We have seen an out of sequence RDMA read middle or last packet.
1364f48ad614SDennis Dalessandro  * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
1365f48ad614SDennis Dalessandro  */
1366f48ad614SDennis Dalessandro static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
1367f48ad614SDennis Dalessandro 			 struct hfi1_ctxtdata *rcd)
1368f48ad614SDennis Dalessandro {
1369f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1370f48ad614SDennis Dalessandro 
137168e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1372f48ad614SDennis Dalessandro 	/* Remove QP from retry timer */
137356acbbfbSVenkata Sandeep Dhanalakota 	rvt_stop_rc_timers(qp);
1374f48ad614SDennis Dalessandro 
1375f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1376f48ad614SDennis Dalessandro 
1377f48ad614SDennis Dalessandro 	while (cmp_psn(psn, wqe->lpsn) > 0) {
1378f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1379f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1380f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
1381f48ad614SDennis Dalessandro 			break;
1382f48ad614SDennis Dalessandro 		wqe = do_rc_completion(qp, wqe, ibp);
1383f48ad614SDennis Dalessandro 	}
1384f48ad614SDennis Dalessandro 
1385f48ad614SDennis Dalessandro 	ibp->rvp.n_rdma_seq++;
1386f48ad614SDennis Dalessandro 	qp->r_flags |= RVT_R_RDMAR_SEQ;
138756acbbfbSVenkata Sandeep Dhanalakota 	hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
1388f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait)) {
1389f48ad614SDennis Dalessandro 		qp->r_flags |= RVT_R_RSP_SEND;
13904d6f85c3SMike Marciniszyn 		rvt_get_qp(qp);
1391f48ad614SDennis Dalessandro 		list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1392f48ad614SDennis Dalessandro 	}
1393f48ad614SDennis Dalessandro }
1394f48ad614SDennis Dalessandro 
1395f48ad614SDennis Dalessandro /**
1396f48ad614SDennis Dalessandro  * rc_rcv_resp - process an incoming RC response packet
1397f48ad614SDennis Dalessandro  * @ibp: the port this packet came in on
1398f48ad614SDennis Dalessandro  * @ohdr: the other headers for this packet
1399f48ad614SDennis Dalessandro  * @data: the packet data
1400f48ad614SDennis Dalessandro  * @tlen: the packet length
1401f48ad614SDennis Dalessandro  * @qp: the QP for this packet
1402f48ad614SDennis Dalessandro  * @opcode: the opcode for this packet
1403f48ad614SDennis Dalessandro  * @psn: the packet sequence number for this packet
1404f48ad614SDennis Dalessandro  * @hdrsize: the header length
1405f48ad614SDennis Dalessandro  * @pmtu: the path MTU
1406f48ad614SDennis Dalessandro  *
1407f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an incoming RC response
1408f48ad614SDennis Dalessandro  * packet for the given QP.
1409f48ad614SDennis Dalessandro  * Called at interrupt level.
1410f48ad614SDennis Dalessandro  */
1411f48ad614SDennis Dalessandro static void rc_rcv_resp(struct hfi1_ibport *ibp,
1412261a4351SMike Marciniszyn 			struct ib_other_headers *ohdr,
1413f48ad614SDennis Dalessandro 			void *data, u32 tlen, struct rvt_qp *qp,
1414f48ad614SDennis Dalessandro 			u32 opcode, u32 psn, u32 hdrsize, u32 pmtu,
1415f48ad614SDennis Dalessandro 			struct hfi1_ctxtdata *rcd)
1416f48ad614SDennis Dalessandro {
1417f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1418f48ad614SDennis Dalessandro 	enum ib_wc_status status;
1419f48ad614SDennis Dalessandro 	unsigned long flags;
1420f48ad614SDennis Dalessandro 	int diff;
1421f48ad614SDennis Dalessandro 	u32 pad;
1422f48ad614SDennis Dalessandro 	u32 aeth;
1423f48ad614SDennis Dalessandro 	u64 val;
1424f48ad614SDennis Dalessandro 
1425f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
1426f48ad614SDennis Dalessandro 
1427462b6b21SSebastian Sanchez 	trace_hfi1_ack(qp, psn);
1428f48ad614SDennis Dalessandro 
1429f48ad614SDennis Dalessandro 	/* Ignore invalid responses. */
1430f48ad614SDennis Dalessandro 	smp_read_barrier_depends(); /* see post_one_send */
1431eb04ff09SMike Marciniszyn 	if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
1432f48ad614SDennis Dalessandro 		goto ack_done;
1433f48ad614SDennis Dalessandro 
1434f48ad614SDennis Dalessandro 	/* Ignore duplicate responses. */
1435f48ad614SDennis Dalessandro 	diff = cmp_psn(psn, qp->s_last_psn);
1436f48ad614SDennis Dalessandro 	if (unlikely(diff <= 0)) {
1437f48ad614SDennis Dalessandro 		/* Update credits for "ghost" ACKs */
1438f48ad614SDennis Dalessandro 		if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1439f48ad614SDennis Dalessandro 			aeth = be32_to_cpu(ohdr->u.aeth);
1440832666c1SDon Hiatt 			if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
1441696513e8SBrian Welty 				rvt_get_credit(qp, aeth);
1442f48ad614SDennis Dalessandro 		}
1443f48ad614SDennis Dalessandro 		goto ack_done;
1444f48ad614SDennis Dalessandro 	}
1445f48ad614SDennis Dalessandro 
1446f48ad614SDennis Dalessandro 	/*
1447f48ad614SDennis Dalessandro 	 * Skip everything other than the PSN we expect, if we are waiting
1448f48ad614SDennis Dalessandro 	 * for a reply to a restarted RDMA read or atomic op.
1449f48ad614SDennis Dalessandro 	 */
1450f48ad614SDennis Dalessandro 	if (qp->r_flags & RVT_R_RDMAR_SEQ) {
1451f48ad614SDennis Dalessandro 		if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
1452f48ad614SDennis Dalessandro 			goto ack_done;
1453f48ad614SDennis Dalessandro 		qp->r_flags &= ~RVT_R_RDMAR_SEQ;
1454f48ad614SDennis Dalessandro 	}
1455f48ad614SDennis Dalessandro 
1456f48ad614SDennis Dalessandro 	if (unlikely(qp->s_acked == qp->s_tail))
1457f48ad614SDennis Dalessandro 		goto ack_done;
1458f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1459f48ad614SDennis Dalessandro 	status = IB_WC_SUCCESS;
1460f48ad614SDennis Dalessandro 
1461f48ad614SDennis Dalessandro 	switch (opcode) {
1462f48ad614SDennis Dalessandro 	case OP(ACKNOWLEDGE):
1463f48ad614SDennis Dalessandro 	case OP(ATOMIC_ACKNOWLEDGE):
1464f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
1465f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
1466261a4351SMike Marciniszyn 		if (opcode == OP(ATOMIC_ACKNOWLEDGE))
1467261a4351SMike Marciniszyn 			val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
1468261a4351SMike Marciniszyn 		else
1469f48ad614SDennis Dalessandro 			val = 0;
1470f48ad614SDennis Dalessandro 		if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
1471f48ad614SDennis Dalessandro 		    opcode != OP(RDMA_READ_RESPONSE_FIRST))
1472f48ad614SDennis Dalessandro 			goto ack_done;
1473f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1474f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1475f48ad614SDennis Dalessandro 			goto ack_op_err;
1476f48ad614SDennis Dalessandro 		/*
1477f48ad614SDennis Dalessandro 		 * If this is a response to a resent RDMA read, we
1478f48ad614SDennis Dalessandro 		 * have to be careful to copy the data to the right
1479f48ad614SDennis Dalessandro 		 * location.
1480f48ad614SDennis Dalessandro 		 */
1481f48ad614SDennis Dalessandro 		qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1482f48ad614SDennis Dalessandro 						  wqe, psn, pmtu);
1483f48ad614SDennis Dalessandro 		goto read_middle;
1484f48ad614SDennis Dalessandro 
1485f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
1486f48ad614SDennis Dalessandro 		/* no AETH, no ACK */
1487f48ad614SDennis Dalessandro 		if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
1488f48ad614SDennis Dalessandro 			goto ack_seq_err;
1489f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1490f48ad614SDennis Dalessandro 			goto ack_op_err;
1491f48ad614SDennis Dalessandro read_middle:
1492f48ad614SDennis Dalessandro 		if (unlikely(tlen != (hdrsize + pmtu + 4)))
1493f48ad614SDennis Dalessandro 			goto ack_len_err;
1494f48ad614SDennis Dalessandro 		if (unlikely(pmtu >= qp->s_rdma_read_len))
1495f48ad614SDennis Dalessandro 			goto ack_len_err;
1496f48ad614SDennis Dalessandro 
1497f48ad614SDennis Dalessandro 		/*
1498f48ad614SDennis Dalessandro 		 * We got a response so update the timeout.
1499f48ad614SDennis Dalessandro 		 * 4.096 usec. * (1 << qp->timeout)
1500f48ad614SDennis Dalessandro 		 */
150156acbbfbSVenkata Sandeep Dhanalakota 		rvt_mod_retry_timer(qp);
1502f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_ACK) {
1503f48ad614SDennis Dalessandro 			qp->s_flags &= ~RVT_S_WAIT_ACK;
1504f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
1505f48ad614SDennis Dalessandro 		}
1506f48ad614SDennis Dalessandro 
1507f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1508f48ad614SDennis Dalessandro 			qp->s_retry = qp->s_retry_cnt;
1509f48ad614SDennis Dalessandro 
1510f48ad614SDennis Dalessandro 		/*
1511f48ad614SDennis Dalessandro 		 * Update the RDMA receive state but do the copy w/o
1512f48ad614SDennis Dalessandro 		 * holding the locks and blocking interrupts.
1513f48ad614SDennis Dalessandro 		 */
1514f48ad614SDennis Dalessandro 		qp->s_rdma_read_len -= pmtu;
1515f48ad614SDennis Dalessandro 		update_last_psn(qp, psn);
1516f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
15170128fceaSBrian Welty 		hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, false, false);
1518f48ad614SDennis Dalessandro 		goto bail;
1519f48ad614SDennis Dalessandro 
1520f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_ONLY):
1521f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
1522f48ad614SDennis Dalessandro 		if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
1523f48ad614SDennis Dalessandro 			goto ack_done;
1524f48ad614SDennis Dalessandro 		/* Get the number of bytes the message was padded by. */
1525f48ad614SDennis Dalessandro 		pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1526f48ad614SDennis Dalessandro 		/*
1527f48ad614SDennis Dalessandro 		 * Check that the data size is >= 0 && <= pmtu.
1528f48ad614SDennis Dalessandro 		 * Remember to account for ICRC (4).
1529f48ad614SDennis Dalessandro 		 */
1530f48ad614SDennis Dalessandro 		if (unlikely(tlen < (hdrsize + pad + 4)))
1531f48ad614SDennis Dalessandro 			goto ack_len_err;
1532f48ad614SDennis Dalessandro 		/*
1533f48ad614SDennis Dalessandro 		 * If this is a response to a resent RDMA read, we
1534f48ad614SDennis Dalessandro 		 * have to be careful to copy the data to the right
1535f48ad614SDennis Dalessandro 		 * location.
1536f48ad614SDennis Dalessandro 		 */
1537f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1538f48ad614SDennis Dalessandro 		qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1539f48ad614SDennis Dalessandro 						  wqe, psn, pmtu);
1540f48ad614SDennis Dalessandro 		goto read_last;
1541f48ad614SDennis Dalessandro 
1542f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
1543f48ad614SDennis Dalessandro 		/* ACKs READ req. */
1544f48ad614SDennis Dalessandro 		if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
1545f48ad614SDennis Dalessandro 			goto ack_seq_err;
1546f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1547f48ad614SDennis Dalessandro 			goto ack_op_err;
1548f48ad614SDennis Dalessandro 		/* Get the number of bytes the message was padded by. */
1549f48ad614SDennis Dalessandro 		pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1550f48ad614SDennis Dalessandro 		/*
1551f48ad614SDennis Dalessandro 		 * Check that the data size is >= 1 && <= pmtu.
1552f48ad614SDennis Dalessandro 		 * Remember to account for ICRC (4).
1553f48ad614SDennis Dalessandro 		 */
1554f48ad614SDennis Dalessandro 		if (unlikely(tlen <= (hdrsize + pad + 4)))
1555f48ad614SDennis Dalessandro 			goto ack_len_err;
1556f48ad614SDennis Dalessandro read_last:
1557f48ad614SDennis Dalessandro 		tlen -= hdrsize + pad + 4;
1558f48ad614SDennis Dalessandro 		if (unlikely(tlen != qp->s_rdma_read_len))
1559f48ad614SDennis Dalessandro 			goto ack_len_err;
1560f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
15610128fceaSBrian Welty 		hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, false, false);
1562f48ad614SDennis Dalessandro 		WARN_ON(qp->s_rdma_read_sge.num_sge);
1563f48ad614SDennis Dalessandro 		(void)do_rc_ack(qp, aeth, psn,
1564f48ad614SDennis Dalessandro 				 OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
1565f48ad614SDennis Dalessandro 		goto ack_done;
1566f48ad614SDennis Dalessandro 	}
1567f48ad614SDennis Dalessandro 
1568f48ad614SDennis Dalessandro ack_op_err:
1569f48ad614SDennis Dalessandro 	status = IB_WC_LOC_QP_OP_ERR;
1570f48ad614SDennis Dalessandro 	goto ack_err;
1571f48ad614SDennis Dalessandro 
1572f48ad614SDennis Dalessandro ack_seq_err:
1573f48ad614SDennis Dalessandro 	rdma_seq_err(qp, ibp, psn, rcd);
1574f48ad614SDennis Dalessandro 	goto ack_done;
1575f48ad614SDennis Dalessandro 
1576f48ad614SDennis Dalessandro ack_len_err:
1577f48ad614SDennis Dalessandro 	status = IB_WC_LOC_LEN_ERR;
1578f48ad614SDennis Dalessandro ack_err:
1579f48ad614SDennis Dalessandro 	if (qp->s_last == qp->s_acked) {
1580f48ad614SDennis Dalessandro 		hfi1_send_complete(qp, wqe, status);
1581f48ad614SDennis Dalessandro 		rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1582f48ad614SDennis Dalessandro 	}
1583f48ad614SDennis Dalessandro ack_done:
1584f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
1585f48ad614SDennis Dalessandro bail:
1586f48ad614SDennis Dalessandro 	return;
1587f48ad614SDennis Dalessandro }
1588f48ad614SDennis Dalessandro 
1589f48ad614SDennis Dalessandro static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd,
1590f48ad614SDennis Dalessandro 				  struct rvt_qp *qp)
1591f48ad614SDennis Dalessandro {
1592f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait)) {
1593f48ad614SDennis Dalessandro 		qp->r_flags |= RVT_R_RSP_NAK;
15944d6f85c3SMike Marciniszyn 		rvt_get_qp(qp);
1595f48ad614SDennis Dalessandro 		list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1596f48ad614SDennis Dalessandro 	}
1597f48ad614SDennis Dalessandro }
1598f48ad614SDennis Dalessandro 
1599f48ad614SDennis Dalessandro static inline void rc_cancel_ack(struct rvt_qp *qp)
1600f48ad614SDennis Dalessandro {
1601f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
1602f48ad614SDennis Dalessandro 
1603f48ad614SDennis Dalessandro 	priv->r_adefered = 0;
1604f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait))
1605f48ad614SDennis Dalessandro 		return;
1606f48ad614SDennis Dalessandro 	list_del_init(&qp->rspwait);
1607f48ad614SDennis Dalessandro 	qp->r_flags &= ~RVT_R_RSP_NAK;
16084d6f85c3SMike Marciniszyn 	rvt_put_qp(qp);
1609f48ad614SDennis Dalessandro }
1610f48ad614SDennis Dalessandro 
1611f48ad614SDennis Dalessandro /**
1612f48ad614SDennis Dalessandro  * rc_rcv_error - process an incoming duplicate or error RC packet
1613f48ad614SDennis Dalessandro  * @ohdr: the other headers for this packet
1614f48ad614SDennis Dalessandro  * @data: the packet data
1615f48ad614SDennis Dalessandro  * @qp: the QP for this packet
1616f48ad614SDennis Dalessandro  * @opcode: the opcode for this packet
1617f48ad614SDennis Dalessandro  * @psn: the packet sequence number for this packet
1618f48ad614SDennis Dalessandro  * @diff: the difference between the PSN and the expected PSN
1619f48ad614SDennis Dalessandro  *
1620f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an unexpected
1621f48ad614SDennis Dalessandro  * incoming RC packet for the given QP.
1622f48ad614SDennis Dalessandro  * Called at interrupt level.
1623f48ad614SDennis Dalessandro  * Return 1 if no more processing is needed; otherwise return 0 to
1624f48ad614SDennis Dalessandro  * schedule a response to be sent.
1625f48ad614SDennis Dalessandro  */
1626261a4351SMike Marciniszyn static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
1627f48ad614SDennis Dalessandro 				 struct rvt_qp *qp, u32 opcode, u32 psn,
1628f48ad614SDennis Dalessandro 				 int diff, struct hfi1_ctxtdata *rcd)
1629f48ad614SDennis Dalessandro {
1630f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
1631f48ad614SDennis Dalessandro 	struct rvt_ack_entry *e;
1632f48ad614SDennis Dalessandro 	unsigned long flags;
1633f48ad614SDennis Dalessandro 	u8 i, prev;
1634f48ad614SDennis Dalessandro 	int old_req;
1635f48ad614SDennis Dalessandro 
1636462b6b21SSebastian Sanchez 	trace_hfi1_rcv_error(qp, psn);
1637f48ad614SDennis Dalessandro 	if (diff > 0) {
1638f48ad614SDennis Dalessandro 		/*
1639f48ad614SDennis Dalessandro 		 * Packet sequence error.
1640f48ad614SDennis Dalessandro 		 * A NAK will ACK earlier sends and RDMA writes.
1641f48ad614SDennis Dalessandro 		 * Don't queue the NAK if we already sent one.
1642f48ad614SDennis Dalessandro 		 */
1643f48ad614SDennis Dalessandro 		if (!qp->r_nak_state) {
1644f48ad614SDennis Dalessandro 			ibp->rvp.n_rc_seqnak++;
1645f48ad614SDennis Dalessandro 			qp->r_nak_state = IB_NAK_PSN_ERROR;
1646f48ad614SDennis Dalessandro 			/* Use the expected PSN. */
1647f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn;
1648f48ad614SDennis Dalessandro 			/*
1649f48ad614SDennis Dalessandro 			 * Wait to send the sequence NAK until all packets
1650f48ad614SDennis Dalessandro 			 * in the receive queue have been processed.
1651f48ad614SDennis Dalessandro 			 * Otherwise, we end up propagating congestion.
1652f48ad614SDennis Dalessandro 			 */
1653f48ad614SDennis Dalessandro 			rc_defered_ack(rcd, qp);
1654f48ad614SDennis Dalessandro 		}
1655f48ad614SDennis Dalessandro 		goto done;
1656f48ad614SDennis Dalessandro 	}
1657f48ad614SDennis Dalessandro 
1658f48ad614SDennis Dalessandro 	/*
1659f48ad614SDennis Dalessandro 	 * Handle a duplicate request.  Don't re-execute SEND, RDMA
1660f48ad614SDennis Dalessandro 	 * write or atomic op.  Don't NAK errors, just silently drop
1661f48ad614SDennis Dalessandro 	 * the duplicate request.  Note that r_sge, r_len, and
1662f48ad614SDennis Dalessandro 	 * r_rcv_len may be in use so don't modify them.
1663f48ad614SDennis Dalessandro 	 *
1664f48ad614SDennis Dalessandro 	 * We are supposed to ACK the earliest duplicate PSN but we
1665f48ad614SDennis Dalessandro 	 * can coalesce an outstanding duplicate ACK.  We have to
1666f48ad614SDennis Dalessandro 	 * send the earliest so that RDMA reads can be restarted at
1667f48ad614SDennis Dalessandro 	 * the requester's expected PSN.
1668f48ad614SDennis Dalessandro 	 *
1669f48ad614SDennis Dalessandro 	 * First, find where this duplicate PSN falls within the
1670f48ad614SDennis Dalessandro 	 * ACKs previously sent.
1671f48ad614SDennis Dalessandro 	 * old_req is true if there is an older response that is scheduled
1672f48ad614SDennis Dalessandro 	 * to be sent before sending this one.
1673f48ad614SDennis Dalessandro 	 */
1674f48ad614SDennis Dalessandro 	e = NULL;
1675f48ad614SDennis Dalessandro 	old_req = 1;
1676f48ad614SDennis Dalessandro 	ibp->rvp.n_rc_dupreq++;
1677f48ad614SDennis Dalessandro 
1678f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
1679f48ad614SDennis Dalessandro 
1680f48ad614SDennis Dalessandro 	for (i = qp->r_head_ack_queue; ; i = prev) {
1681f48ad614SDennis Dalessandro 		if (i == qp->s_tail_ack_queue)
1682f48ad614SDennis Dalessandro 			old_req = 0;
1683f48ad614SDennis Dalessandro 		if (i)
1684f48ad614SDennis Dalessandro 			prev = i - 1;
1685f48ad614SDennis Dalessandro 		else
1686f48ad614SDennis Dalessandro 			prev = HFI1_MAX_RDMA_ATOMIC;
1687f48ad614SDennis Dalessandro 		if (prev == qp->r_head_ack_queue) {
1688f48ad614SDennis Dalessandro 			e = NULL;
1689f48ad614SDennis Dalessandro 			break;
1690f48ad614SDennis Dalessandro 		}
1691f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[prev];
1692f48ad614SDennis Dalessandro 		if (!e->opcode) {
1693f48ad614SDennis Dalessandro 			e = NULL;
1694f48ad614SDennis Dalessandro 			break;
1695f48ad614SDennis Dalessandro 		}
1696f48ad614SDennis Dalessandro 		if (cmp_psn(psn, e->psn) >= 0) {
1697f48ad614SDennis Dalessandro 			if (prev == qp->s_tail_ack_queue &&
1698f48ad614SDennis Dalessandro 			    cmp_psn(psn, e->lpsn) <= 0)
1699f48ad614SDennis Dalessandro 				old_req = 0;
1700f48ad614SDennis Dalessandro 			break;
1701f48ad614SDennis Dalessandro 		}
1702f48ad614SDennis Dalessandro 	}
1703f48ad614SDennis Dalessandro 	switch (opcode) {
1704f48ad614SDennis Dalessandro 	case OP(RDMA_READ_REQUEST): {
1705f48ad614SDennis Dalessandro 		struct ib_reth *reth;
1706f48ad614SDennis Dalessandro 		u32 offset;
1707f48ad614SDennis Dalessandro 		u32 len;
1708f48ad614SDennis Dalessandro 
1709f48ad614SDennis Dalessandro 		/*
1710f48ad614SDennis Dalessandro 		 * If we didn't find the RDMA read request in the ack queue,
1711f48ad614SDennis Dalessandro 		 * we can ignore this request.
1712f48ad614SDennis Dalessandro 		 */
1713f48ad614SDennis Dalessandro 		if (!e || e->opcode != OP(RDMA_READ_REQUEST))
1714f48ad614SDennis Dalessandro 			goto unlock_done;
1715f48ad614SDennis Dalessandro 		/* RETH comes after BTH */
1716f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
1717f48ad614SDennis Dalessandro 		/*
1718f48ad614SDennis Dalessandro 		 * Address range must be a subset of the original
1719f48ad614SDennis Dalessandro 		 * request and start on pmtu boundaries.
1720f48ad614SDennis Dalessandro 		 * We reuse the old ack_queue slot since the requester
1721f48ad614SDennis Dalessandro 		 * should not back up and request an earlier PSN for the
1722f48ad614SDennis Dalessandro 		 * same request.
1723f48ad614SDennis Dalessandro 		 */
1724f48ad614SDennis Dalessandro 		offset = delta_psn(psn, e->psn) * qp->pmtu;
1725f48ad614SDennis Dalessandro 		len = be32_to_cpu(reth->length);
1726f48ad614SDennis Dalessandro 		if (unlikely(offset + len != e->rdma_sge.sge_length))
1727f48ad614SDennis Dalessandro 			goto unlock_done;
1728f48ad614SDennis Dalessandro 		if (e->rdma_sge.mr) {
1729f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
1730f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
1731f48ad614SDennis Dalessandro 		}
1732f48ad614SDennis Dalessandro 		if (len != 0) {
1733f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
1734261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
1735f48ad614SDennis Dalessandro 			int ok;
1736f48ad614SDennis Dalessandro 
1737f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
1738f48ad614SDennis Dalessandro 					 IB_ACCESS_REMOTE_READ);
1739f48ad614SDennis Dalessandro 			if (unlikely(!ok))
1740f48ad614SDennis Dalessandro 				goto unlock_done;
1741f48ad614SDennis Dalessandro 		} else {
1742f48ad614SDennis Dalessandro 			e->rdma_sge.vaddr = NULL;
1743f48ad614SDennis Dalessandro 			e->rdma_sge.length = 0;
1744f48ad614SDennis Dalessandro 			e->rdma_sge.sge_length = 0;
1745f48ad614SDennis Dalessandro 		}
1746f48ad614SDennis Dalessandro 		e->psn = psn;
1747f48ad614SDennis Dalessandro 		if (old_req)
1748f48ad614SDennis Dalessandro 			goto unlock_done;
1749f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = prev;
1750f48ad614SDennis Dalessandro 		break;
1751f48ad614SDennis Dalessandro 	}
1752f48ad614SDennis Dalessandro 
1753f48ad614SDennis Dalessandro 	case OP(COMPARE_SWAP):
1754f48ad614SDennis Dalessandro 	case OP(FETCH_ADD): {
1755f48ad614SDennis Dalessandro 		/*
1756f48ad614SDennis Dalessandro 		 * If we didn't find the atomic request in the ack queue
1757ca00c62bSDennis Dalessandro 		 * or the send engine is already backed up to send an
1758f48ad614SDennis Dalessandro 		 * earlier entry, we can ignore this request.
1759f48ad614SDennis Dalessandro 		 */
1760f48ad614SDennis Dalessandro 		if (!e || e->opcode != (u8)opcode || old_req)
1761f48ad614SDennis Dalessandro 			goto unlock_done;
1762f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = prev;
1763f48ad614SDennis Dalessandro 		break;
1764f48ad614SDennis Dalessandro 	}
1765f48ad614SDennis Dalessandro 
1766f48ad614SDennis Dalessandro 	default:
1767f48ad614SDennis Dalessandro 		/*
1768f48ad614SDennis Dalessandro 		 * Ignore this operation if it doesn't request an ACK
1769f48ad614SDennis Dalessandro 		 * or an earlier RDMA read or atomic is going to be resent.
1770f48ad614SDennis Dalessandro 		 */
1771f48ad614SDennis Dalessandro 		if (!(psn & IB_BTH_REQ_ACK) || old_req)
1772f48ad614SDennis Dalessandro 			goto unlock_done;
1773f48ad614SDennis Dalessandro 		/*
1774f48ad614SDennis Dalessandro 		 * Resend the most recent ACK if this request is
1775f48ad614SDennis Dalessandro 		 * after all the previous RDMA reads and atomics.
1776f48ad614SDennis Dalessandro 		 */
1777f48ad614SDennis Dalessandro 		if (i == qp->r_head_ack_queue) {
1778f48ad614SDennis Dalessandro 			spin_unlock_irqrestore(&qp->s_lock, flags);
1779f48ad614SDennis Dalessandro 			qp->r_nak_state = 0;
1780f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn - 1;
1781f48ad614SDennis Dalessandro 			goto send_ack;
1782f48ad614SDennis Dalessandro 		}
1783f48ad614SDennis Dalessandro 
1784f48ad614SDennis Dalessandro 		/*
1785f48ad614SDennis Dalessandro 		 * Resend the RDMA read or atomic op which
1786f48ad614SDennis Dalessandro 		 * ACKs this duplicate request.
1787f48ad614SDennis Dalessandro 		 */
1788f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = i;
1789f48ad614SDennis Dalessandro 		break;
1790f48ad614SDennis Dalessandro 	}
1791f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
1792f48ad614SDennis Dalessandro 	qp->s_flags |= RVT_S_RESP_PENDING;
1793f48ad614SDennis Dalessandro 	qp->r_nak_state = 0;
1794f48ad614SDennis Dalessandro 	hfi1_schedule_send(qp);
1795f48ad614SDennis Dalessandro 
1796f48ad614SDennis Dalessandro unlock_done:
1797f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
1798f48ad614SDennis Dalessandro done:
1799f48ad614SDennis Dalessandro 	return 1;
1800f48ad614SDennis Dalessandro 
1801f48ad614SDennis Dalessandro send_ack:
1802f48ad614SDennis Dalessandro 	return 0;
1803f48ad614SDennis Dalessandro }
1804f48ad614SDennis Dalessandro 
1805f48ad614SDennis Dalessandro static inline void update_ack_queue(struct rvt_qp *qp, unsigned n)
1806f48ad614SDennis Dalessandro {
1807f48ad614SDennis Dalessandro 	unsigned next;
1808f48ad614SDennis Dalessandro 
1809f48ad614SDennis Dalessandro 	next = n + 1;
1810f48ad614SDennis Dalessandro 	if (next > HFI1_MAX_RDMA_ATOMIC)
1811f48ad614SDennis Dalessandro 		next = 0;
1812f48ad614SDennis Dalessandro 	qp->s_tail_ack_queue = next;
1813f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
1814f48ad614SDennis Dalessandro }
1815f48ad614SDennis Dalessandro 
1816f48ad614SDennis Dalessandro static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
1817f48ad614SDennis Dalessandro 			  u32 lqpn, u32 rqpn, u8 svc_type)
1818f48ad614SDennis Dalessandro {
1819f48ad614SDennis Dalessandro 	struct opa_hfi1_cong_log_event_internal *cc_event;
1820f48ad614SDennis Dalessandro 	unsigned long flags;
1821f48ad614SDennis Dalessandro 
1822f48ad614SDennis Dalessandro 	if (sl >= OPA_MAX_SLS)
1823f48ad614SDennis Dalessandro 		return;
1824f48ad614SDennis Dalessandro 
1825f48ad614SDennis Dalessandro 	spin_lock_irqsave(&ppd->cc_log_lock, flags);
1826f48ad614SDennis Dalessandro 
1827f48ad614SDennis Dalessandro 	ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
1828f48ad614SDennis Dalessandro 	ppd->threshold_event_counter++;
1829f48ad614SDennis Dalessandro 
1830f48ad614SDennis Dalessandro 	cc_event = &ppd->cc_events[ppd->cc_log_idx++];
1831f48ad614SDennis Dalessandro 	if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
1832f48ad614SDennis Dalessandro 		ppd->cc_log_idx = 0;
1833f48ad614SDennis Dalessandro 	cc_event->lqpn = lqpn & RVT_QPN_MASK;
1834f48ad614SDennis Dalessandro 	cc_event->rqpn = rqpn & RVT_QPN_MASK;
1835f48ad614SDennis Dalessandro 	cc_event->sl = sl;
1836f48ad614SDennis Dalessandro 	cc_event->svc_type = svc_type;
1837f48ad614SDennis Dalessandro 	cc_event->rlid = rlid;
1838f48ad614SDennis Dalessandro 	/* keep timestamp in units of 1.024 usec */
1839f48ad614SDennis Dalessandro 	cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024;
1840f48ad614SDennis Dalessandro 
1841f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
1842f48ad614SDennis Dalessandro }
1843f48ad614SDennis Dalessandro 
1844f48ad614SDennis Dalessandro void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn,
1845f48ad614SDennis Dalessandro 		  u32 rqpn, u8 svc_type)
1846f48ad614SDennis Dalessandro {
1847f48ad614SDennis Dalessandro 	struct cca_timer *cca_timer;
1848f48ad614SDennis Dalessandro 	u16 ccti, ccti_incr, ccti_timer, ccti_limit;
1849f48ad614SDennis Dalessandro 	u8 trigger_threshold;
1850f48ad614SDennis Dalessandro 	struct cc_state *cc_state;
1851f48ad614SDennis Dalessandro 	unsigned long flags;
1852f48ad614SDennis Dalessandro 
1853f48ad614SDennis Dalessandro 	if (sl >= OPA_MAX_SLS)
1854f48ad614SDennis Dalessandro 		return;
1855f48ad614SDennis Dalessandro 
1856f48ad614SDennis Dalessandro 	cc_state = get_cc_state(ppd);
1857f48ad614SDennis Dalessandro 
1858f48ad614SDennis Dalessandro 	if (!cc_state)
1859f48ad614SDennis Dalessandro 		return;
1860f48ad614SDennis Dalessandro 
1861f48ad614SDennis Dalessandro 	/*
1862f48ad614SDennis Dalessandro 	 * 1) increase CCTI (for this SL)
1863f48ad614SDennis Dalessandro 	 * 2) select IPG (i.e., call set_link_ipg())
1864f48ad614SDennis Dalessandro 	 * 3) start timer
1865f48ad614SDennis Dalessandro 	 */
1866f48ad614SDennis Dalessandro 	ccti_limit = cc_state->cct.ccti_limit;
1867f48ad614SDennis Dalessandro 	ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
1868f48ad614SDennis Dalessandro 	ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
1869f48ad614SDennis Dalessandro 	trigger_threshold =
1870f48ad614SDennis Dalessandro 		cc_state->cong_setting.entries[sl].trigger_threshold;
1871f48ad614SDennis Dalessandro 
1872f48ad614SDennis Dalessandro 	spin_lock_irqsave(&ppd->cca_timer_lock, flags);
1873f48ad614SDennis Dalessandro 
1874f48ad614SDennis Dalessandro 	cca_timer = &ppd->cca_timer[sl];
1875f48ad614SDennis Dalessandro 	if (cca_timer->ccti < ccti_limit) {
1876f48ad614SDennis Dalessandro 		if (cca_timer->ccti + ccti_incr <= ccti_limit)
1877f48ad614SDennis Dalessandro 			cca_timer->ccti += ccti_incr;
1878f48ad614SDennis Dalessandro 		else
1879f48ad614SDennis Dalessandro 			cca_timer->ccti = ccti_limit;
1880f48ad614SDennis Dalessandro 		set_link_ipg(ppd);
1881f48ad614SDennis Dalessandro 	}
1882f48ad614SDennis Dalessandro 
1883f48ad614SDennis Dalessandro 	ccti = cca_timer->ccti;
1884f48ad614SDennis Dalessandro 
1885f48ad614SDennis Dalessandro 	if (!hrtimer_active(&cca_timer->hrtimer)) {
1886f48ad614SDennis Dalessandro 		/* ccti_timer is in units of 1.024 usec */
1887f48ad614SDennis Dalessandro 		unsigned long nsec = 1024 * ccti_timer;
1888f48ad614SDennis Dalessandro 
1889f48ad614SDennis Dalessandro 		hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
1890f48ad614SDennis Dalessandro 			      HRTIMER_MODE_REL);
1891f48ad614SDennis Dalessandro 	}
1892f48ad614SDennis Dalessandro 
1893f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
1894f48ad614SDennis Dalessandro 
1895f48ad614SDennis Dalessandro 	if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
1896f48ad614SDennis Dalessandro 		log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
1897f48ad614SDennis Dalessandro }
1898f48ad614SDennis Dalessandro 
1899f48ad614SDennis Dalessandro /**
1900f48ad614SDennis Dalessandro  * hfi1_rc_rcv - process an incoming RC packet
1901f48ad614SDennis Dalessandro  * @rcd: the context pointer
1902f48ad614SDennis Dalessandro  * @hdr: the header of this packet
1903f48ad614SDennis Dalessandro  * @rcv_flags: flags relevant to rcv processing
1904f48ad614SDennis Dalessandro  * @data: the packet data
1905f48ad614SDennis Dalessandro  * @tlen: the packet length
1906f48ad614SDennis Dalessandro  * @qp: the QP for this packet
1907f48ad614SDennis Dalessandro  *
1908f48ad614SDennis Dalessandro  * This is called from qp_rcv() to process an incoming RC packet
1909f48ad614SDennis Dalessandro  * for the given QP.
1910f48ad614SDennis Dalessandro  * May be called at interrupt level.
1911f48ad614SDennis Dalessandro  */
1912f48ad614SDennis Dalessandro void hfi1_rc_rcv(struct hfi1_packet *packet)
1913f48ad614SDennis Dalessandro {
1914f48ad614SDennis Dalessandro 	struct hfi1_ctxtdata *rcd = packet->rcd;
1915261a4351SMike Marciniszyn 	struct ib_header *hdr = packet->hdr;
1916f48ad614SDennis Dalessandro 	u32 rcv_flags = packet->rcv_flags;
1917f48ad614SDennis Dalessandro 	void *data = packet->ebuf;
1918f48ad614SDennis Dalessandro 	u32 tlen = packet->tlen;
1919f48ad614SDennis Dalessandro 	struct rvt_qp *qp = packet->qp;
1920f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
1921261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr = packet->ohdr;
1922f48ad614SDennis Dalessandro 	u32 bth0, opcode;
1923f48ad614SDennis Dalessandro 	u32 hdrsize = packet->hlen;
1924f48ad614SDennis Dalessandro 	u32 psn;
1925f48ad614SDennis Dalessandro 	u32 pad;
1926f48ad614SDennis Dalessandro 	struct ib_wc wc;
1927f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
1928f48ad614SDennis Dalessandro 	int diff;
1929f48ad614SDennis Dalessandro 	struct ib_reth *reth;
1930f48ad614SDennis Dalessandro 	unsigned long flags;
1931f48ad614SDennis Dalessandro 	int ret, is_fecn = 0;
19320128fceaSBrian Welty 	bool copy_last = false;
1933a2df0c83SJianxin Xiong 	u32 rkey;
1934f48ad614SDennis Dalessandro 
193568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->r_lock);
1936f48ad614SDennis Dalessandro 	bth0 = be32_to_cpu(ohdr->bth[0]);
1937f48ad614SDennis Dalessandro 	if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0))
1938f48ad614SDennis Dalessandro 		return;
1939f48ad614SDennis Dalessandro 
19405fd2b562SMitko Haralanov 	is_fecn = process_ecn(qp, packet, false);
1941f48ad614SDennis Dalessandro 
1942f48ad614SDennis Dalessandro 	psn = be32_to_cpu(ohdr->bth[2]);
1943f48ad614SDennis Dalessandro 	opcode = (bth0 >> 24) & 0xff;
1944f48ad614SDennis Dalessandro 
1945f48ad614SDennis Dalessandro 	/*
1946f48ad614SDennis Dalessandro 	 * Process responses (ACKs) before anything else.  Note that the
1947f48ad614SDennis Dalessandro 	 * packet sequence number will be for something in the send work
1948f48ad614SDennis Dalessandro 	 * queue rather than the expected receive packet sequence number.
1949f48ad614SDennis Dalessandro 	 * In other words, this QP is the requester.
1950f48ad614SDennis Dalessandro 	 */
1951f48ad614SDennis Dalessandro 	if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1952f48ad614SDennis Dalessandro 	    opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1953f48ad614SDennis Dalessandro 		rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
1954f48ad614SDennis Dalessandro 			    hdrsize, pmtu, rcd);
1955f48ad614SDennis Dalessandro 		if (is_fecn)
1956f48ad614SDennis Dalessandro 			goto send_ack;
1957f48ad614SDennis Dalessandro 		return;
1958f48ad614SDennis Dalessandro 	}
1959f48ad614SDennis Dalessandro 
1960f48ad614SDennis Dalessandro 	/* Compute 24 bits worth of difference. */
1961f48ad614SDennis Dalessandro 	diff = delta_psn(psn, qp->r_psn);
1962f48ad614SDennis Dalessandro 	if (unlikely(diff)) {
1963f48ad614SDennis Dalessandro 		if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
1964f48ad614SDennis Dalessandro 			return;
1965f48ad614SDennis Dalessandro 		goto send_ack;
1966f48ad614SDennis Dalessandro 	}
1967f48ad614SDennis Dalessandro 
1968f48ad614SDennis Dalessandro 	/* Check for opcode sequence errors. */
1969f48ad614SDennis Dalessandro 	switch (qp->r_state) {
1970f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
1971f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
1972f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_MIDDLE) ||
1973f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST) ||
1974a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
1975a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_INVALIDATE))
1976f48ad614SDennis Dalessandro 			break;
1977f48ad614SDennis Dalessandro 		goto nack_inv;
1978f48ad614SDennis Dalessandro 
1979f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
1980f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
1981f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_MIDDLE) ||
1982f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST) ||
1983f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1984f48ad614SDennis Dalessandro 			break;
1985f48ad614SDennis Dalessandro 		goto nack_inv;
1986f48ad614SDennis Dalessandro 
1987f48ad614SDennis Dalessandro 	default:
1988f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_MIDDLE) ||
1989f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST) ||
1990f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
1991a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
1992f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_MIDDLE) ||
1993f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST) ||
1994f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1995f48ad614SDennis Dalessandro 			goto nack_inv;
1996f48ad614SDennis Dalessandro 		/*
1997f48ad614SDennis Dalessandro 		 * Note that it is up to the requester to not send a new
1998f48ad614SDennis Dalessandro 		 * RDMA read or atomic operation before receiving an ACK
1999f48ad614SDennis Dalessandro 		 * for the previous operation.
2000f48ad614SDennis Dalessandro 		 */
2001f48ad614SDennis Dalessandro 		break;
2002f48ad614SDennis Dalessandro 	}
2003f48ad614SDennis Dalessandro 
2004f48ad614SDennis Dalessandro 	if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
2005beb5a042SBrian Welty 		rvt_comm_est(qp);
2006f48ad614SDennis Dalessandro 
2007f48ad614SDennis Dalessandro 	/* OK, process the packet. */
2008f48ad614SDennis Dalessandro 	switch (opcode) {
2009f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
2010f48ad614SDennis Dalessandro 		ret = hfi1_rvt_get_rwqe(qp, 0);
2011f48ad614SDennis Dalessandro 		if (ret < 0)
2012f48ad614SDennis Dalessandro 			goto nack_op_err;
2013f48ad614SDennis Dalessandro 		if (!ret)
2014f48ad614SDennis Dalessandro 			goto rnr_nak;
2015f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2016f48ad614SDennis Dalessandro 		/* FALLTHROUGH */
2017f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
2018f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
2019f48ad614SDennis Dalessandro send_middle:
2020f48ad614SDennis Dalessandro 		/* Check for invalid length PMTU or posted rwqe len. */
2021f48ad614SDennis Dalessandro 		if (unlikely(tlen != (hdrsize + pmtu + 4)))
2022f48ad614SDennis Dalessandro 			goto nack_inv;
2023f48ad614SDennis Dalessandro 		qp->r_rcv_len += pmtu;
2024f48ad614SDennis Dalessandro 		if (unlikely(qp->r_rcv_len > qp->r_len))
2025f48ad614SDennis Dalessandro 			goto nack_inv;
20260128fceaSBrian Welty 		hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false);
2027f48ad614SDennis Dalessandro 		break;
2028f48ad614SDennis Dalessandro 
2029f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
2030f48ad614SDennis Dalessandro 		/* consume RWQE */
2031f48ad614SDennis Dalessandro 		ret = hfi1_rvt_get_rwqe(qp, 1);
2032f48ad614SDennis Dalessandro 		if (ret < 0)
2033f48ad614SDennis Dalessandro 			goto nack_op_err;
2034f48ad614SDennis Dalessandro 		if (!ret)
2035f48ad614SDennis Dalessandro 			goto rnr_nak;
2036f48ad614SDennis Dalessandro 		goto send_last_imm;
2037f48ad614SDennis Dalessandro 
2038f48ad614SDennis Dalessandro 	case OP(SEND_ONLY):
2039f48ad614SDennis Dalessandro 	case OP(SEND_ONLY_WITH_IMMEDIATE):
2040a2df0c83SJianxin Xiong 	case OP(SEND_ONLY_WITH_INVALIDATE):
2041f48ad614SDennis Dalessandro 		ret = hfi1_rvt_get_rwqe(qp, 0);
2042f48ad614SDennis Dalessandro 		if (ret < 0)
2043f48ad614SDennis Dalessandro 			goto nack_op_err;
2044f48ad614SDennis Dalessandro 		if (!ret)
2045f48ad614SDennis Dalessandro 			goto rnr_nak;
2046f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2047f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_ONLY))
2048f48ad614SDennis Dalessandro 			goto no_immediate_data;
2049a2df0c83SJianxin Xiong 		if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
2050a2df0c83SJianxin Xiong 			goto send_last_inv;
2051f48ad614SDennis Dalessandro 		/* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
2052f48ad614SDennis Dalessandro 	case OP(SEND_LAST_WITH_IMMEDIATE):
2053f48ad614SDennis Dalessandro send_last_imm:
2054f48ad614SDennis Dalessandro 		wc.ex.imm_data = ohdr->u.imm_data;
2055f48ad614SDennis Dalessandro 		wc.wc_flags = IB_WC_WITH_IMM;
2056f48ad614SDennis Dalessandro 		goto send_last;
2057a2df0c83SJianxin Xiong 	case OP(SEND_LAST_WITH_INVALIDATE):
2058a2df0c83SJianxin Xiong send_last_inv:
2059a2df0c83SJianxin Xiong 		rkey = be32_to_cpu(ohdr->u.ieth);
2060a2df0c83SJianxin Xiong 		if (rvt_invalidate_rkey(qp, rkey))
2061a2df0c83SJianxin Xiong 			goto no_immediate_data;
2062a2df0c83SJianxin Xiong 		wc.ex.invalidate_rkey = rkey;
2063a2df0c83SJianxin Xiong 		wc.wc_flags = IB_WC_WITH_INVALIDATE;
2064a2df0c83SJianxin Xiong 		goto send_last;
2065f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_LAST):
20660128fceaSBrian Welty 		copy_last = rvt_is_user_qp(qp);
2067f48ad614SDennis Dalessandro 		/* fall through */
2068f48ad614SDennis Dalessandro 	case OP(SEND_LAST):
2069f48ad614SDennis Dalessandro no_immediate_data:
2070f48ad614SDennis Dalessandro 		wc.wc_flags = 0;
2071f48ad614SDennis Dalessandro 		wc.ex.imm_data = 0;
2072f48ad614SDennis Dalessandro send_last:
2073f48ad614SDennis Dalessandro 		/* Get the number of bytes the message was padded by. */
2074f48ad614SDennis Dalessandro 		pad = (bth0 >> 20) & 3;
2075f48ad614SDennis Dalessandro 		/* Check for invalid length. */
2076f48ad614SDennis Dalessandro 		/* LAST len should be >= 1 */
2077f48ad614SDennis Dalessandro 		if (unlikely(tlen < (hdrsize + pad + 4)))
2078f48ad614SDennis Dalessandro 			goto nack_inv;
2079f48ad614SDennis Dalessandro 		/* Don't count the CRC. */
2080f48ad614SDennis Dalessandro 		tlen -= (hdrsize + pad + 4);
2081f48ad614SDennis Dalessandro 		wc.byte_len = tlen + qp->r_rcv_len;
2082f48ad614SDennis Dalessandro 		if (unlikely(wc.byte_len > qp->r_len))
2083f48ad614SDennis Dalessandro 			goto nack_inv;
20840128fceaSBrian Welty 		hfi1_copy_sge(&qp->r_sge, data, tlen, true, copy_last);
2085f48ad614SDennis Dalessandro 		rvt_put_ss(&qp->r_sge);
2086f48ad614SDennis Dalessandro 		qp->r_msn++;
208753e91d26SSebastian Sanchez 		if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
2088f48ad614SDennis Dalessandro 			break;
2089f48ad614SDennis Dalessandro 		wc.wr_id = qp->r_wr_id;
2090f48ad614SDennis Dalessandro 		wc.status = IB_WC_SUCCESS;
2091f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2092f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2093f48ad614SDennis Dalessandro 			wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2094f48ad614SDennis Dalessandro 		else
2095f48ad614SDennis Dalessandro 			wc.opcode = IB_WC_RECV;
2096f48ad614SDennis Dalessandro 		wc.qp = &qp->ibqp;
2097f48ad614SDennis Dalessandro 		wc.src_qp = qp->remote_qpn;
2098f48ad614SDennis Dalessandro 		wc.slid = qp->remote_ah_attr.dlid;
2099f48ad614SDennis Dalessandro 		/*
2100f48ad614SDennis Dalessandro 		 * It seems that IB mandates the presence of an SL in a
2101f48ad614SDennis Dalessandro 		 * work completion only for the UD transport (see section
2102f48ad614SDennis Dalessandro 		 * 11.4.2 of IBTA Vol. 1).
2103f48ad614SDennis Dalessandro 		 *
2104f48ad614SDennis Dalessandro 		 * However, the way the SL is chosen below is consistent
2105f48ad614SDennis Dalessandro 		 * with the way that IB/qib works and is trying avoid
2106f48ad614SDennis Dalessandro 		 * introducing incompatibilities.
2107f48ad614SDennis Dalessandro 		 *
2108f48ad614SDennis Dalessandro 		 * See also OPA Vol. 1, section 9.7.6, and table 9-17.
2109f48ad614SDennis Dalessandro 		 */
2110f48ad614SDennis Dalessandro 		wc.sl = qp->remote_ah_attr.sl;
2111f48ad614SDennis Dalessandro 		/* zero fields that are N/A */
2112f48ad614SDennis Dalessandro 		wc.vendor_err = 0;
2113f48ad614SDennis Dalessandro 		wc.pkey_index = 0;
2114f48ad614SDennis Dalessandro 		wc.dlid_path_bits = 0;
2115f48ad614SDennis Dalessandro 		wc.port_num = 0;
2116f48ad614SDennis Dalessandro 		/* Signal completion event if the solicited bit is set. */
2117f48ad614SDennis Dalessandro 		rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
2118f48ad614SDennis Dalessandro 			     (bth0 & IB_BTH_SOLICITED) != 0);
2119f48ad614SDennis Dalessandro 		break;
2120f48ad614SDennis Dalessandro 
2121f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_ONLY):
21220128fceaSBrian Welty 		copy_last = rvt_is_user_qp(qp);
2123f48ad614SDennis Dalessandro 		/* fall through */
2124f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
2125f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2126f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2127f48ad614SDennis Dalessandro 			goto nack_inv;
2128f48ad614SDennis Dalessandro 		/* consume RWQE */
2129f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2130f48ad614SDennis Dalessandro 		qp->r_len = be32_to_cpu(reth->length);
2131f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2132f48ad614SDennis Dalessandro 		qp->r_sge.sg_list = NULL;
2133f48ad614SDennis Dalessandro 		if (qp->r_len != 0) {
2134f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2135261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2136f48ad614SDennis Dalessandro 			int ok;
2137f48ad614SDennis Dalessandro 
2138f48ad614SDennis Dalessandro 			/* Check rkey & NAK */
2139f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2140f48ad614SDennis Dalessandro 					 rkey, IB_ACCESS_REMOTE_WRITE);
2141f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2142f48ad614SDennis Dalessandro 				goto nack_acc;
2143f48ad614SDennis Dalessandro 			qp->r_sge.num_sge = 1;
2144f48ad614SDennis Dalessandro 		} else {
2145f48ad614SDennis Dalessandro 			qp->r_sge.num_sge = 0;
2146f48ad614SDennis Dalessandro 			qp->r_sge.sge.mr = NULL;
2147f48ad614SDennis Dalessandro 			qp->r_sge.sge.vaddr = NULL;
2148f48ad614SDennis Dalessandro 			qp->r_sge.sge.length = 0;
2149f48ad614SDennis Dalessandro 			qp->r_sge.sge.sge_length = 0;
2150f48ad614SDennis Dalessandro 		}
2151f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_FIRST))
2152f48ad614SDennis Dalessandro 			goto send_middle;
2153f48ad614SDennis Dalessandro 		else if (opcode == OP(RDMA_WRITE_ONLY))
2154f48ad614SDennis Dalessandro 			goto no_immediate_data;
2155f48ad614SDennis Dalessandro 		ret = hfi1_rvt_get_rwqe(qp, 1);
2156f48ad614SDennis Dalessandro 		if (ret < 0)
2157f48ad614SDennis Dalessandro 			goto nack_op_err;
2158f48ad614SDennis Dalessandro 		if (!ret)
2159f48ad614SDennis Dalessandro 			goto rnr_nak;
2160f48ad614SDennis Dalessandro 		wc.ex.imm_data = ohdr->u.rc.imm_data;
2161f48ad614SDennis Dalessandro 		wc.wc_flags = IB_WC_WITH_IMM;
2162f48ad614SDennis Dalessandro 		goto send_last;
2163f48ad614SDennis Dalessandro 
2164f48ad614SDennis Dalessandro 	case OP(RDMA_READ_REQUEST): {
2165f48ad614SDennis Dalessandro 		struct rvt_ack_entry *e;
2166f48ad614SDennis Dalessandro 		u32 len;
2167f48ad614SDennis Dalessandro 		u8 next;
2168f48ad614SDennis Dalessandro 
2169f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
2170f48ad614SDennis Dalessandro 			goto nack_inv;
2171f48ad614SDennis Dalessandro 		next = qp->r_head_ack_queue + 1;
2172f48ad614SDennis Dalessandro 		/* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
2173f48ad614SDennis Dalessandro 		if (next > HFI1_MAX_RDMA_ATOMIC)
2174f48ad614SDennis Dalessandro 			next = 0;
2175f48ad614SDennis Dalessandro 		spin_lock_irqsave(&qp->s_lock, flags);
2176f48ad614SDennis Dalessandro 		if (unlikely(next == qp->s_tail_ack_queue)) {
2177f48ad614SDennis Dalessandro 			if (!qp->s_ack_queue[next].sent)
2178f48ad614SDennis Dalessandro 				goto nack_inv_unlck;
2179f48ad614SDennis Dalessandro 			update_ack_queue(qp, next);
2180f48ad614SDennis Dalessandro 		}
2181f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->r_head_ack_queue];
2182f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2183f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
2184f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2185f48ad614SDennis Dalessandro 		}
2186f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2187f48ad614SDennis Dalessandro 		len = be32_to_cpu(reth->length);
2188f48ad614SDennis Dalessandro 		if (len) {
2189f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2190261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2191f48ad614SDennis Dalessandro 			int ok;
2192f48ad614SDennis Dalessandro 
2193f48ad614SDennis Dalessandro 			/* Check rkey & NAK */
2194f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
2195f48ad614SDennis Dalessandro 					 rkey, IB_ACCESS_REMOTE_READ);
2196f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2197f48ad614SDennis Dalessandro 				goto nack_acc_unlck;
2198f48ad614SDennis Dalessandro 			/*
2199f48ad614SDennis Dalessandro 			 * Update the next expected PSN.  We add 1 later
2200f48ad614SDennis Dalessandro 			 * below, so only add the remainder here.
2201f48ad614SDennis Dalessandro 			 */
22025dc80605SMike Marciniszyn 			qp->r_psn += rvt_div_mtu(qp, len - 1);
2203f48ad614SDennis Dalessandro 		} else {
2204f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2205f48ad614SDennis Dalessandro 			e->rdma_sge.vaddr = NULL;
2206f48ad614SDennis Dalessandro 			e->rdma_sge.length = 0;
2207f48ad614SDennis Dalessandro 			e->rdma_sge.sge_length = 0;
2208f48ad614SDennis Dalessandro 		}
2209f48ad614SDennis Dalessandro 		e->opcode = opcode;
2210f48ad614SDennis Dalessandro 		e->sent = 0;
2211f48ad614SDennis Dalessandro 		e->psn = psn;
2212f48ad614SDennis Dalessandro 		e->lpsn = qp->r_psn;
2213f48ad614SDennis Dalessandro 		/*
2214f48ad614SDennis Dalessandro 		 * We need to increment the MSN here instead of when we
2215f48ad614SDennis Dalessandro 		 * finish sending the result since a duplicate request would
2216f48ad614SDennis Dalessandro 		 * increment it more than once.
2217f48ad614SDennis Dalessandro 		 */
2218f48ad614SDennis Dalessandro 		qp->r_msn++;
2219f48ad614SDennis Dalessandro 		qp->r_psn++;
2220f48ad614SDennis Dalessandro 		qp->r_state = opcode;
2221f48ad614SDennis Dalessandro 		qp->r_nak_state = 0;
2222f48ad614SDennis Dalessandro 		qp->r_head_ack_queue = next;
2223f48ad614SDennis Dalessandro 
2224ca00c62bSDennis Dalessandro 		/* Schedule the send engine. */
2225f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_RESP_PENDING;
2226f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
2227f48ad614SDennis Dalessandro 
2228f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
2229f48ad614SDennis Dalessandro 		if (is_fecn)
2230f48ad614SDennis Dalessandro 			goto send_ack;
2231f48ad614SDennis Dalessandro 		return;
2232f48ad614SDennis Dalessandro 	}
2233f48ad614SDennis Dalessandro 
2234f48ad614SDennis Dalessandro 	case OP(COMPARE_SWAP):
2235f48ad614SDennis Dalessandro 	case OP(FETCH_ADD): {
2236f48ad614SDennis Dalessandro 		struct ib_atomic_eth *ateth;
2237f48ad614SDennis Dalessandro 		struct rvt_ack_entry *e;
2238f48ad614SDennis Dalessandro 		u64 vaddr;
2239f48ad614SDennis Dalessandro 		atomic64_t *maddr;
2240f48ad614SDennis Dalessandro 		u64 sdata;
2241f48ad614SDennis Dalessandro 		u32 rkey;
2242f48ad614SDennis Dalessandro 		u8 next;
2243f48ad614SDennis Dalessandro 
2244f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
2245f48ad614SDennis Dalessandro 			goto nack_inv;
2246f48ad614SDennis Dalessandro 		next = qp->r_head_ack_queue + 1;
2247f48ad614SDennis Dalessandro 		if (next > HFI1_MAX_RDMA_ATOMIC)
2248f48ad614SDennis Dalessandro 			next = 0;
2249f48ad614SDennis Dalessandro 		spin_lock_irqsave(&qp->s_lock, flags);
2250f48ad614SDennis Dalessandro 		if (unlikely(next == qp->s_tail_ack_queue)) {
2251f48ad614SDennis Dalessandro 			if (!qp->s_ack_queue[next].sent)
2252f48ad614SDennis Dalessandro 				goto nack_inv_unlck;
2253f48ad614SDennis Dalessandro 			update_ack_queue(qp, next);
2254f48ad614SDennis Dalessandro 		}
2255f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->r_head_ack_queue];
2256f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2257f48ad614SDennis Dalessandro 			rvt_put_mr(e->rdma_sge.mr);
2258f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
2259f48ad614SDennis Dalessandro 		}
2260f48ad614SDennis Dalessandro 		ateth = &ohdr->u.atomic_eth;
2261261a4351SMike Marciniszyn 		vaddr = get_ib_ateth_vaddr(ateth);
2262f48ad614SDennis Dalessandro 		if (unlikely(vaddr & (sizeof(u64) - 1)))
2263f48ad614SDennis Dalessandro 			goto nack_inv_unlck;
2264f48ad614SDennis Dalessandro 		rkey = be32_to_cpu(ateth->rkey);
2265f48ad614SDennis Dalessandro 		/* Check rkey & NAK */
2266f48ad614SDennis Dalessandro 		if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
2267f48ad614SDennis Dalessandro 					  vaddr, rkey,
2268f48ad614SDennis Dalessandro 					  IB_ACCESS_REMOTE_ATOMIC)))
2269f48ad614SDennis Dalessandro 			goto nack_acc_unlck;
2270f48ad614SDennis Dalessandro 		/* Perform atomic OP and save result. */
2271f48ad614SDennis Dalessandro 		maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
2272261a4351SMike Marciniszyn 		sdata = get_ib_ateth_swap(ateth);
2273f48ad614SDennis Dalessandro 		e->atomic_data = (opcode == OP(FETCH_ADD)) ?
2274f48ad614SDennis Dalessandro 			(u64)atomic64_add_return(sdata, maddr) - sdata :
2275f48ad614SDennis Dalessandro 			(u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
2276261a4351SMike Marciniszyn 				      get_ib_ateth_compare(ateth),
2277f48ad614SDennis Dalessandro 				      sdata);
2278f48ad614SDennis Dalessandro 		rvt_put_mr(qp->r_sge.sge.mr);
2279f48ad614SDennis Dalessandro 		qp->r_sge.num_sge = 0;
2280f48ad614SDennis Dalessandro 		e->opcode = opcode;
2281f48ad614SDennis Dalessandro 		e->sent = 0;
2282f48ad614SDennis Dalessandro 		e->psn = psn;
2283f48ad614SDennis Dalessandro 		e->lpsn = psn;
2284f48ad614SDennis Dalessandro 		qp->r_msn++;
2285f48ad614SDennis Dalessandro 		qp->r_psn++;
2286f48ad614SDennis Dalessandro 		qp->r_state = opcode;
2287f48ad614SDennis Dalessandro 		qp->r_nak_state = 0;
2288f48ad614SDennis Dalessandro 		qp->r_head_ack_queue = next;
2289f48ad614SDennis Dalessandro 
2290ca00c62bSDennis Dalessandro 		/* Schedule the send engine. */
2291f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_RESP_PENDING;
2292f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
2293f48ad614SDennis Dalessandro 
2294f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
2295f48ad614SDennis Dalessandro 		if (is_fecn)
2296f48ad614SDennis Dalessandro 			goto send_ack;
2297f48ad614SDennis Dalessandro 		return;
2298f48ad614SDennis Dalessandro 	}
2299f48ad614SDennis Dalessandro 
2300f48ad614SDennis Dalessandro 	default:
2301f48ad614SDennis Dalessandro 		/* NAK unknown opcodes. */
2302f48ad614SDennis Dalessandro 		goto nack_inv;
2303f48ad614SDennis Dalessandro 	}
2304f48ad614SDennis Dalessandro 	qp->r_psn++;
2305f48ad614SDennis Dalessandro 	qp->r_state = opcode;
2306f48ad614SDennis Dalessandro 	qp->r_ack_psn = psn;
2307f48ad614SDennis Dalessandro 	qp->r_nak_state = 0;
2308f48ad614SDennis Dalessandro 	/* Send an ACK if requested or required. */
2309f48ad614SDennis Dalessandro 	if (psn & IB_BTH_REQ_ACK) {
2310f48ad614SDennis Dalessandro 		struct hfi1_qp_priv *priv = qp->priv;
2311f48ad614SDennis Dalessandro 
2312f48ad614SDennis Dalessandro 		if (packet->numpkt == 0) {
2313f48ad614SDennis Dalessandro 			rc_cancel_ack(qp);
2314f48ad614SDennis Dalessandro 			goto send_ack;
2315f48ad614SDennis Dalessandro 		}
2316f48ad614SDennis Dalessandro 		if (priv->r_adefered >= HFI1_PSN_CREDIT) {
2317f48ad614SDennis Dalessandro 			rc_cancel_ack(qp);
2318f48ad614SDennis Dalessandro 			goto send_ack;
2319f48ad614SDennis Dalessandro 		}
2320f48ad614SDennis Dalessandro 		if (unlikely(is_fecn)) {
2321f48ad614SDennis Dalessandro 			rc_cancel_ack(qp);
2322f48ad614SDennis Dalessandro 			goto send_ack;
2323f48ad614SDennis Dalessandro 		}
2324f48ad614SDennis Dalessandro 		priv->r_adefered++;
2325f48ad614SDennis Dalessandro 		rc_defered_ack(rcd, qp);
2326f48ad614SDennis Dalessandro 	}
2327f48ad614SDennis Dalessandro 	return;
2328f48ad614SDennis Dalessandro 
2329f48ad614SDennis Dalessandro rnr_nak:
2330f48ad614SDennis Dalessandro 	qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
2331f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2332f48ad614SDennis Dalessandro 	/* Queue RNR NAK for later */
2333f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
2334f48ad614SDennis Dalessandro 	return;
2335f48ad614SDennis Dalessandro 
2336f48ad614SDennis Dalessandro nack_op_err:
2337beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2338f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
2339f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2340f48ad614SDennis Dalessandro 	/* Queue NAK for later */
2341f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
2342f48ad614SDennis Dalessandro 	return;
2343f48ad614SDennis Dalessandro 
2344f48ad614SDennis Dalessandro nack_inv_unlck:
2345f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2346f48ad614SDennis Dalessandro nack_inv:
2347beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2348f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_INVALID_REQUEST;
2349f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2350f48ad614SDennis Dalessandro 	/* Queue NAK for later */
2351f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
2352f48ad614SDennis Dalessandro 	return;
2353f48ad614SDennis Dalessandro 
2354f48ad614SDennis Dalessandro nack_acc_unlck:
2355f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2356f48ad614SDennis Dalessandro nack_acc:
2357beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
2358f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
2359f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
2360f48ad614SDennis Dalessandro send_ack:
2361f48ad614SDennis Dalessandro 	hfi1_send_rc_ack(rcd, qp, is_fecn);
2362f48ad614SDennis Dalessandro }
2363f48ad614SDennis Dalessandro 
2364f48ad614SDennis Dalessandro void hfi1_rc_hdrerr(
2365f48ad614SDennis Dalessandro 	struct hfi1_ctxtdata *rcd,
2366261a4351SMike Marciniszyn 	struct ib_header *hdr,
2367f48ad614SDennis Dalessandro 	u32 rcv_flags,
2368f48ad614SDennis Dalessandro 	struct rvt_qp *qp)
2369f48ad614SDennis Dalessandro {
2370f48ad614SDennis Dalessandro 	int has_grh = rcv_flags & HFI1_HAS_GRH;
2371261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
2372f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
2373f48ad614SDennis Dalessandro 	int diff;
2374f48ad614SDennis Dalessandro 	u32 opcode;
2375f48ad614SDennis Dalessandro 	u32 psn, bth0;
2376f48ad614SDennis Dalessandro 
2377f48ad614SDennis Dalessandro 	/* Check for GRH */
2378f48ad614SDennis Dalessandro 	ohdr = &hdr->u.oth;
2379f48ad614SDennis Dalessandro 	if (has_grh)
2380f48ad614SDennis Dalessandro 		ohdr = &hdr->u.l.oth;
2381f48ad614SDennis Dalessandro 
2382f48ad614SDennis Dalessandro 	bth0 = be32_to_cpu(ohdr->bth[0]);
2383f48ad614SDennis Dalessandro 	if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
2384f48ad614SDennis Dalessandro 		return;
2385f48ad614SDennis Dalessandro 
2386f48ad614SDennis Dalessandro 	psn = be32_to_cpu(ohdr->bth[2]);
2387f48ad614SDennis Dalessandro 	opcode = (bth0 >> 24) & 0xff;
2388f48ad614SDennis Dalessandro 
2389f48ad614SDennis Dalessandro 	/* Only deal with RDMA Writes for now */
2390f48ad614SDennis Dalessandro 	if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
2391f48ad614SDennis Dalessandro 		diff = delta_psn(psn, qp->r_psn);
2392f48ad614SDennis Dalessandro 		if (!qp->r_nak_state && diff >= 0) {
2393f48ad614SDennis Dalessandro 			ibp->rvp.n_rc_seqnak++;
2394f48ad614SDennis Dalessandro 			qp->r_nak_state = IB_NAK_PSN_ERROR;
2395f48ad614SDennis Dalessandro 			/* Use the expected PSN. */
2396f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn;
2397f48ad614SDennis Dalessandro 			/*
2398f48ad614SDennis Dalessandro 			 * Wait to send the sequence
2399f48ad614SDennis Dalessandro 			 * NAK until all packets
2400f48ad614SDennis Dalessandro 			 * in the receive queue have
2401f48ad614SDennis Dalessandro 			 * been processed.
2402f48ad614SDennis Dalessandro 			 * Otherwise, we end up
2403f48ad614SDennis Dalessandro 			 * propagating congestion.
2404f48ad614SDennis Dalessandro 			 */
2405f48ad614SDennis Dalessandro 			rc_defered_ack(rcd, qp);
2406f48ad614SDennis Dalessandro 		} /* Out of sequence NAK */
2407f48ad614SDennis Dalessandro 	} /* QP Request NAKs */
2408f48ad614SDennis Dalessandro }
2409