xref: /openbmc/linux/drivers/infiniband/hw/hfi1/rc.c (revision 145eba1a)
1*145eba1aSCai Huoqing // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
2f48ad614SDennis Dalessandro /*
32e2ba09eSMike Marciniszyn  * Copyright(c) 2015 - 2018 Intel Corporation.
4f48ad614SDennis Dalessandro  */
5f48ad614SDennis Dalessandro 
6f48ad614SDennis Dalessandro #include <linux/io.h>
7f48ad614SDennis Dalessandro #include <rdma/rdma_vt.h>
8f48ad614SDennis Dalessandro #include <rdma/rdmavt_qp.h>
9f48ad614SDennis Dalessandro 
10f48ad614SDennis Dalessandro #include "hfi.h"
11f48ad614SDennis Dalessandro #include "qp.h"
12385156c5SKaike Wan #include "rc.h"
13f48ad614SDennis Dalessandro #include "verbs_txreq.h"
14f48ad614SDennis Dalessandro #include "trace.h"
15f48ad614SDennis Dalessandro 
find_prev_entry(struct rvt_qp * qp,u32 psn,u8 * prev,u8 * prev_ack,bool * scheduled)16385156c5SKaike Wan struct rvt_ack_entry *find_prev_entry(struct rvt_qp *qp, u32 psn, u8 *prev,
17385156c5SKaike Wan 				      u8 *prev_ack, bool *scheduled)
18385156c5SKaike Wan 	__must_hold(&qp->s_lock)
19f48ad614SDennis Dalessandro {
20385156c5SKaike Wan 	struct rvt_ack_entry *e = NULL;
21385156c5SKaike Wan 	u8 i, p;
22385156c5SKaike Wan 	bool s = true;
23f48ad614SDennis Dalessandro 
24385156c5SKaike Wan 	for (i = qp->r_head_ack_queue; ; i = p) {
25385156c5SKaike Wan 		if (i == qp->s_tail_ack_queue)
26385156c5SKaike Wan 			s = false;
27385156c5SKaike Wan 		if (i)
28385156c5SKaike Wan 			p = i - 1;
29385156c5SKaike Wan 		else
30385156c5SKaike Wan 			p = rvt_size_atomic(ib_to_rvt(qp->ibqp.device));
31385156c5SKaike Wan 		if (p == qp->r_head_ack_queue) {
32385156c5SKaike Wan 			e = NULL;
33385156c5SKaike Wan 			break;
34385156c5SKaike Wan 		}
35385156c5SKaike Wan 		e = &qp->s_ack_queue[p];
36385156c5SKaike Wan 		if (!e->opcode) {
37385156c5SKaike Wan 			e = NULL;
38385156c5SKaike Wan 			break;
39385156c5SKaike Wan 		}
40385156c5SKaike Wan 		if (cmp_psn(psn, e->psn) >= 0) {
41385156c5SKaike Wan 			if (p == qp->s_tail_ack_queue &&
42385156c5SKaike Wan 			    cmp_psn(psn, e->lpsn) <= 0)
43385156c5SKaike Wan 				s = false;
44385156c5SKaike Wan 			break;
45385156c5SKaike Wan 		}
46385156c5SKaike Wan 	}
47385156c5SKaike Wan 	if (prev)
48385156c5SKaike Wan 		*prev = p;
49385156c5SKaike Wan 	if (prev_ack)
50385156c5SKaike Wan 		*prev_ack = i;
51385156c5SKaike Wan 	if (scheduled)
52385156c5SKaike Wan 		*scheduled = s;
53385156c5SKaike Wan 	return e;
54f48ad614SDennis Dalessandro }
55f48ad614SDennis Dalessandro 
56f48ad614SDennis Dalessandro /**
57f48ad614SDennis Dalessandro  * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
58f48ad614SDennis Dalessandro  * @dev: the device for this QP
59f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
60f48ad614SDennis Dalessandro  * @ohdr: a pointer to the IB header being constructed
61f48ad614SDennis Dalessandro  * @ps: the xmit packet state
62f48ad614SDennis Dalessandro  *
63f48ad614SDennis Dalessandro  * Return 1 if constructed; otherwise, return 0.
64f48ad614SDennis Dalessandro  * Note that we are in the responder's side of the QP context.
65f48ad614SDennis Dalessandro  * Note the QP s_lock must be held.
66f48ad614SDennis Dalessandro  */
make_rc_ack(struct hfi1_ibdev * dev,struct rvt_qp * qp,struct ib_other_headers * ohdr,struct hfi1_pkt_state * ps)67f48ad614SDennis Dalessandro static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
68261a4351SMike Marciniszyn 		       struct ib_other_headers *ohdr,
69f48ad614SDennis Dalessandro 		       struct hfi1_pkt_state *ps)
70f48ad614SDennis Dalessandro {
71f48ad614SDennis Dalessandro 	struct rvt_ack_entry *e;
723c6cb20aSKaike Wan 	u32 hwords, hdrlen;
7324b11923SKaike Wan 	u32 len = 0;
7424b11923SKaike Wan 	u32 bth0 = 0, bth2 = 0;
7544e43d91SMitko Haralanov 	u32 bth1 = qp->remote_qpn | (HFI1_CAP_IS_KSET(OPFN) << IB_BTHE_E_SHIFT);
76f48ad614SDennis Dalessandro 	int middle = 0;
77f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
783c6cb20aSKaike Wan 	struct hfi1_qp_priv *qpriv = qp->priv;
7924b11923SKaike Wan 	bool last_pkt;
8024b11923SKaike Wan 	u32 delta;
814f9264d1SKaike Wan 	u8 next = qp->s_tail_ack_queue;
823c6cb20aSKaike Wan 	struct tid_rdma_request *req;
83f48ad614SDennis Dalessandro 
843ce5daa2SKaike Wan 	trace_hfi1_rsp_make_rc_ack(qp, 0);
8568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
86f48ad614SDennis Dalessandro 	/* Don't send an ACK if we aren't supposed to. */
87f48ad614SDennis Dalessandro 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
88f48ad614SDennis Dalessandro 		goto bail;
89f48ad614SDennis Dalessandro 
903c6cb20aSKaike Wan 	if (qpriv->hdr_type == HFI1_PKT_TYPE_9B)
91f48ad614SDennis Dalessandro 		/* header size in 32-bit words LRH+BTH = (8+12)/4. */
92f48ad614SDennis Dalessandro 		hwords = 5;
935b6cabb0SDon Hiatt 	else
945b6cabb0SDon Hiatt 		/* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
955b6cabb0SDon Hiatt 		hwords = 7;
96f48ad614SDennis Dalessandro 
97f48ad614SDennis Dalessandro 	switch (qp->s_ack_state) {
98f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
99f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_ONLY):
100f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
101f6f3f532SKaike Wan 		release_rdma_sge_mr(e);
1026f24b159SGustavo A. R. Silva 		fallthrough;
103f48ad614SDennis Dalessandro 	case OP(ATOMIC_ACKNOWLEDGE):
104f48ad614SDennis Dalessandro 		/*
105f48ad614SDennis Dalessandro 		 * We can increment the tail pointer now that the last
106f48ad614SDennis Dalessandro 		 * response has been sent instead of only being
107f48ad614SDennis Dalessandro 		 * constructed.
108f48ad614SDennis Dalessandro 		 */
1094f9264d1SKaike Wan 		if (++next > rvt_size_atomic(&dev->rdi))
1104f9264d1SKaike Wan 			next = 0;
1114f9264d1SKaike Wan 		/*
1124f9264d1SKaike Wan 		 * Only advance the s_acked_ack_queue pointer if there
1134f9264d1SKaike Wan 		 * have been no TID RDMA requests.
1144f9264d1SKaike Wan 		 */
1154f9264d1SKaike Wan 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
1164f9264d1SKaike Wan 		if (e->opcode != TID_OP(WRITE_REQ) &&
1174f9264d1SKaike Wan 		    qp->s_acked_ack_queue == qp->s_tail_ack_queue)
1184f9264d1SKaike Wan 			qp->s_acked_ack_queue = next;
1194f9264d1SKaike Wan 		qp->s_tail_ack_queue = next;
120a05c9bdcSKaike Wan 		trace_hfi1_rsp_make_rc_ack(qp, e->psn);
1216f24b159SGustavo A. R. Silva 		fallthrough;
122f48ad614SDennis Dalessandro 	case OP(SEND_ONLY):
123f48ad614SDennis Dalessandro 	case OP(ACKNOWLEDGE):
124f48ad614SDennis Dalessandro 		/* Check for no next entry in the queue. */
125f48ad614SDennis Dalessandro 		if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
126f48ad614SDennis Dalessandro 			if (qp->s_flags & RVT_S_ACK_PENDING)
127f48ad614SDennis Dalessandro 				goto normal;
128f48ad614SDennis Dalessandro 			goto bail;
129f48ad614SDennis Dalessandro 		}
130f48ad614SDennis Dalessandro 
131f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
132c6c23117SKaike Wan 		/* Check for tid write fence */
133c6c23117SKaike Wan 		if ((qpriv->s_flags & HFI1_R_TID_WAIT_INTERLCK) ||
134c6c23117SKaike Wan 		    hfi1_tid_rdma_ack_interlock(qp, e)) {
135c6c23117SKaike Wan 			iowait_set_flag(&qpriv->s_iowait, IOWAIT_PENDING_IB);
136c6c23117SKaike Wan 			goto bail;
137c6c23117SKaike Wan 		}
138f48ad614SDennis Dalessandro 		if (e->opcode == OP(RDMA_READ_REQUEST)) {
139f48ad614SDennis Dalessandro 			/*
140f48ad614SDennis Dalessandro 			 * If a RDMA read response is being resent and
141f48ad614SDennis Dalessandro 			 * we haven't seen the duplicate request yet,
142f48ad614SDennis Dalessandro 			 * then stop sending the remaining responses the
143f48ad614SDennis Dalessandro 			 * responder has seen until the requester re-sends it.
144f48ad614SDennis Dalessandro 			 */
145f48ad614SDennis Dalessandro 			len = e->rdma_sge.sge_length;
146f48ad614SDennis Dalessandro 			if (len && !e->rdma_sge.mr) {
1474f9264d1SKaike Wan 				if (qp->s_acked_ack_queue ==
1484f9264d1SKaike Wan 				    qp->s_tail_ack_queue)
1494f9264d1SKaike Wan 					qp->s_acked_ack_queue =
1504f9264d1SKaike Wan 						qp->r_head_ack_queue;
151f48ad614SDennis Dalessandro 				qp->s_tail_ack_queue = qp->r_head_ack_queue;
152f48ad614SDennis Dalessandro 				goto bail;
153f48ad614SDennis Dalessandro 			}
154f48ad614SDennis Dalessandro 			/* Copy SGE state in case we need to resend */
155f48ad614SDennis Dalessandro 			ps->s_txreq->mr = e->rdma_sge.mr;
156f48ad614SDennis Dalessandro 			if (ps->s_txreq->mr)
157f48ad614SDennis Dalessandro 				rvt_get_mr(ps->s_txreq->mr);
158f48ad614SDennis Dalessandro 			qp->s_ack_rdma_sge.sge = e->rdma_sge;
159f48ad614SDennis Dalessandro 			qp->s_ack_rdma_sge.num_sge = 1;
160b777f154SMitko Haralanov 			ps->s_txreq->ss = &qp->s_ack_rdma_sge;
161f48ad614SDennis Dalessandro 			if (len > pmtu) {
162f48ad614SDennis Dalessandro 				len = pmtu;
163f48ad614SDennis Dalessandro 				qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
164f48ad614SDennis Dalessandro 			} else {
165f48ad614SDennis Dalessandro 				qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
166f48ad614SDennis Dalessandro 				e->sent = 1;
167f48ad614SDennis Dalessandro 			}
168696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
169f48ad614SDennis Dalessandro 			hwords++;
170f48ad614SDennis Dalessandro 			qp->s_ack_rdma_psn = e->psn;
171f48ad614SDennis Dalessandro 			bth2 = mask_psn(qp->s_ack_rdma_psn++);
1723c6cb20aSKaike Wan 		} else if (e->opcode == TID_OP(WRITE_REQ)) {
1733c6cb20aSKaike Wan 			/*
1743c6cb20aSKaike Wan 			 * If a TID RDMA WRITE RESP is being resent, we have to
1753c6cb20aSKaike Wan 			 * wait for the actual request. All requests that are to
1763c6cb20aSKaike Wan 			 * be resent will have their state set to
1773c6cb20aSKaike Wan 			 * TID_REQUEST_RESEND. When the new request arrives, the
1783c6cb20aSKaike Wan 			 * state will be changed to TID_REQUEST_RESEND_ACTIVE.
1793c6cb20aSKaike Wan 			 */
1803c6cb20aSKaike Wan 			req = ack_to_tid_req(e);
1813c6cb20aSKaike Wan 			if (req->state == TID_REQUEST_RESEND ||
1823c6cb20aSKaike Wan 			    req->state == TID_REQUEST_INIT_RESEND)
1833c6cb20aSKaike Wan 				goto bail;
1843c6cb20aSKaike Wan 			qp->s_ack_state = TID_OP(WRITE_RESP);
1853c6cb20aSKaike Wan 			qp->s_ack_rdma_psn = mask_psn(e->psn + req->cur_seg);
1863c6cb20aSKaike Wan 			goto write_resp;
18724b11923SKaike Wan 		} else if (e->opcode == TID_OP(READ_REQ)) {
18824b11923SKaike Wan 			/*
18924b11923SKaike Wan 			 * If a TID RDMA read response is being resent and
19024b11923SKaike Wan 			 * we haven't seen the duplicate request yet,
19124b11923SKaike Wan 			 * then stop sending the remaining responses the
19224b11923SKaike Wan 			 * responder has seen until the requester re-sends it.
19324b11923SKaike Wan 			 */
19424b11923SKaike Wan 			len = e->rdma_sge.sge_length;
19524b11923SKaike Wan 			if (len && !e->rdma_sge.mr) {
1964f9264d1SKaike Wan 				if (qp->s_acked_ack_queue ==
1974f9264d1SKaike Wan 				    qp->s_tail_ack_queue)
1984f9264d1SKaike Wan 					qp->s_acked_ack_queue =
1994f9264d1SKaike Wan 						qp->r_head_ack_queue;
20024b11923SKaike Wan 				qp->s_tail_ack_queue = qp->r_head_ack_queue;
20124b11923SKaike Wan 				goto bail;
20224b11923SKaike Wan 			}
20324b11923SKaike Wan 			/* Copy SGE state in case we need to resend */
20424b11923SKaike Wan 			ps->s_txreq->mr = e->rdma_sge.mr;
20524b11923SKaike Wan 			if (ps->s_txreq->mr)
20624b11923SKaike Wan 				rvt_get_mr(ps->s_txreq->mr);
20724b11923SKaike Wan 			qp->s_ack_rdma_sge.sge = e->rdma_sge;
20824b11923SKaike Wan 			qp->s_ack_rdma_sge.num_sge = 1;
20924b11923SKaike Wan 			qp->s_ack_state = TID_OP(READ_RESP);
21024b11923SKaike Wan 			goto read_resp;
211f48ad614SDennis Dalessandro 		} else {
212f48ad614SDennis Dalessandro 			/* COMPARE_SWAP or FETCH_ADD */
213b777f154SMitko Haralanov 			ps->s_txreq->ss = NULL;
214f48ad614SDennis Dalessandro 			len = 0;
215f48ad614SDennis Dalessandro 			qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
216696513e8SBrian Welty 			ohdr->u.at.aeth = rvt_compute_aeth(qp);
217261a4351SMike Marciniszyn 			ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
218f48ad614SDennis Dalessandro 			hwords += sizeof(ohdr->u.at) / sizeof(u32);
219f48ad614SDennis Dalessandro 			bth2 = mask_psn(e->psn);
220f48ad614SDennis Dalessandro 			e->sent = 1;
221f48ad614SDennis Dalessandro 		}
222a05c9bdcSKaike Wan 		trace_hfi1_tid_write_rsp_make_rc_ack(qp);
223f48ad614SDennis Dalessandro 		bth0 = qp->s_ack_state << 24;
224f48ad614SDennis Dalessandro 		break;
225f48ad614SDennis Dalessandro 
226f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
227f48ad614SDennis Dalessandro 		qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
2286f24b159SGustavo A. R. Silva 		fallthrough;
229f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
230b777f154SMitko Haralanov 		ps->s_txreq->ss = &qp->s_ack_rdma_sge;
231f48ad614SDennis Dalessandro 		ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
232f48ad614SDennis Dalessandro 		if (ps->s_txreq->mr)
233f48ad614SDennis Dalessandro 			rvt_get_mr(ps->s_txreq->mr);
234f48ad614SDennis Dalessandro 		len = qp->s_ack_rdma_sge.sge.sge_length;
235f48ad614SDennis Dalessandro 		if (len > pmtu) {
236f48ad614SDennis Dalessandro 			len = pmtu;
237f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
238f48ad614SDennis Dalessandro 		} else {
239696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
240f48ad614SDennis Dalessandro 			hwords++;
241f48ad614SDennis Dalessandro 			qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
242f48ad614SDennis Dalessandro 			e = &qp->s_ack_queue[qp->s_tail_ack_queue];
243f48ad614SDennis Dalessandro 			e->sent = 1;
244f48ad614SDennis Dalessandro 		}
245f48ad614SDennis Dalessandro 		bth0 = qp->s_ack_state << 24;
246f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_ack_rdma_psn++);
247f48ad614SDennis Dalessandro 		break;
248f48ad614SDennis Dalessandro 
2493c6cb20aSKaike Wan 	case TID_OP(WRITE_RESP):
2503c6cb20aSKaike Wan write_resp:
2513c6cb20aSKaike Wan 		/*
2523c6cb20aSKaike Wan 		 * 1. Check if RVT_S_ACK_PENDING is set. If yes,
2533c6cb20aSKaike Wan 		 *    goto normal.
2543c6cb20aSKaike Wan 		 * 2. Attempt to allocate TID resources.
2553c6cb20aSKaike Wan 		 * 3. Remove RVT_S_RESP_PENDING flags from s_flags
2563c6cb20aSKaike Wan 		 * 4. If resources not available:
2573c6cb20aSKaike Wan 		 *    4.1 Set RVT_S_WAIT_TID_SPACE
2583c6cb20aSKaike Wan 		 *    4.2 Queue QP on RCD TID queue
2593c6cb20aSKaike Wan 		 *    4.3 Put QP on iowait list.
2603c6cb20aSKaike Wan 		 *    4.4 Build IB RNR NAK with appropriate timeout value
2613c6cb20aSKaike Wan 		 *    4.5 Return indication progress made.
2623c6cb20aSKaike Wan 		 * 5. If resources are available:
2633c6cb20aSKaike Wan 		 *    5.1 Program HW flow CSRs
2643c6cb20aSKaike Wan 		 *    5.2 Build TID RDMA WRITE RESP packet
2653c6cb20aSKaike Wan 		 *    5.3 If more resources needed, do 2.1 - 2.3.
2663c6cb20aSKaike Wan 		 *    5.4 Wake up next QP on RCD TID queue.
2673c6cb20aSKaike Wan 		 *    5.5 Return indication progress made.
2683c6cb20aSKaike Wan 		 */
2693c6cb20aSKaike Wan 
2703c6cb20aSKaike Wan 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
2713c6cb20aSKaike Wan 		req = ack_to_tid_req(e);
2723c6cb20aSKaike Wan 
2733c6cb20aSKaike Wan 		/*
2743c6cb20aSKaike Wan 		 * Send scheduled RNR NAK's. RNR NAK's need to be sent at
2753c6cb20aSKaike Wan 		 * segment boundaries, not at request boundaries. Don't change
2763c6cb20aSKaike Wan 		 * s_ack_state because we are still in the middle of a request
2773c6cb20aSKaike Wan 		 */
2783c6cb20aSKaike Wan 		if (qpriv->rnr_nak_state == TID_RNR_NAK_SEND &&
2793c6cb20aSKaike Wan 		    qp->s_tail_ack_queue == qpriv->r_tid_alloc &&
2803c6cb20aSKaike Wan 		    req->cur_seg == req->alloc_seg) {
2813c6cb20aSKaike Wan 			qpriv->rnr_nak_state = TID_RNR_NAK_SENT;
2823c6cb20aSKaike Wan 			goto normal_no_state;
2833c6cb20aSKaike Wan 		}
2843c6cb20aSKaike Wan 
2853c6cb20aSKaike Wan 		bth2 = mask_psn(qp->s_ack_rdma_psn);
2863c6cb20aSKaike Wan 		hdrlen = hfi1_build_tid_rdma_write_resp(qp, e, ohdr, &bth1,
2873c6cb20aSKaike Wan 							bth2, &len,
2883c6cb20aSKaike Wan 							&ps->s_txreq->ss);
2893c6cb20aSKaike Wan 		if (!hdrlen)
2903c6cb20aSKaike Wan 			return 0;
2913c6cb20aSKaike Wan 
2923c6cb20aSKaike Wan 		hwords += hdrlen;
2933c6cb20aSKaike Wan 		bth0 = qp->s_ack_state << 24;
2943c6cb20aSKaike Wan 		qp->s_ack_rdma_psn++;
295a05c9bdcSKaike Wan 		trace_hfi1_tid_req_make_rc_ack_write(qp, 0, e->opcode, e->psn,
296a05c9bdcSKaike Wan 						     e->lpsn, req);
2973c6cb20aSKaike Wan 		if (req->cur_seg != req->total_segs)
2983c6cb20aSKaike Wan 			break;
2993c6cb20aSKaike Wan 
3003c6cb20aSKaike Wan 		e->sent = 1;
301f6f3f532SKaike Wan 		/* Do not free e->rdma_sge until all data are received */
302f6f3f532SKaike Wan 		qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
3033c6cb20aSKaike Wan 		break;
3043c6cb20aSKaike Wan 
30524b11923SKaike Wan 	case TID_OP(READ_RESP):
30624b11923SKaike Wan read_resp:
30724b11923SKaike Wan 		e = &qp->s_ack_queue[qp->s_tail_ack_queue];
30824b11923SKaike Wan 		ps->s_txreq->ss = &qp->s_ack_rdma_sge;
30924b11923SKaike Wan 		delta = hfi1_build_tid_rdma_read_resp(qp, e, ohdr, &bth0,
31024b11923SKaike Wan 						      &bth1, &bth2, &len,
31124b11923SKaike Wan 						      &last_pkt);
31224b11923SKaike Wan 		if (delta == 0)
31324b11923SKaike Wan 			goto error_qp;
31424b11923SKaike Wan 		hwords += delta;
31524b11923SKaike Wan 		if (last_pkt) {
31624b11923SKaike Wan 			e->sent = 1;
31724b11923SKaike Wan 			/*
31824b11923SKaike Wan 			 * Increment qp->s_tail_ack_queue through s_ack_state
31924b11923SKaike Wan 			 * transition.
32024b11923SKaike Wan 			 */
32124b11923SKaike Wan 			qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
32224b11923SKaike Wan 		}
32324b11923SKaike Wan 		break;
32424b11923SKaike Wan 	case TID_OP(READ_REQ):
32524b11923SKaike Wan 		goto bail;
32624b11923SKaike Wan 
327f48ad614SDennis Dalessandro 	default:
328f48ad614SDennis Dalessandro normal:
329f48ad614SDennis Dalessandro 		/*
330f48ad614SDennis Dalessandro 		 * Send a regular ACK.
331f48ad614SDennis Dalessandro 		 * Set the s_ack_state so we wait until after sending
332f48ad614SDennis Dalessandro 		 * the ACK before setting s_ack_state to ACKNOWLEDGE
333f48ad614SDennis Dalessandro 		 * (see above).
334f48ad614SDennis Dalessandro 		 */
335f48ad614SDennis Dalessandro 		qp->s_ack_state = OP(SEND_ONLY);
3363c6cb20aSKaike Wan normal_no_state:
337f48ad614SDennis Dalessandro 		if (qp->s_nak_state)
338f48ad614SDennis Dalessandro 			ohdr->u.aeth =
339832666c1SDon Hiatt 				cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
340f48ad614SDennis Dalessandro 					    (qp->s_nak_state <<
341832666c1SDon Hiatt 					     IB_AETH_CREDIT_SHIFT));
342f48ad614SDennis Dalessandro 		else
343696513e8SBrian Welty 			ohdr->u.aeth = rvt_compute_aeth(qp);
344f48ad614SDennis Dalessandro 		hwords++;
345f48ad614SDennis Dalessandro 		len = 0;
346f48ad614SDennis Dalessandro 		bth0 = OP(ACKNOWLEDGE) << 24;
347f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_ack_psn);
3483c6cb20aSKaike Wan 		qp->s_flags &= ~RVT_S_ACK_PENDING;
34934025fb0SKaike Wan 		ps->s_txreq->txreq.flags |= SDMA_TXREQ_F_VIP;
3503c6cb20aSKaike Wan 		ps->s_txreq->ss = NULL;
351f48ad614SDennis Dalessandro 	}
352f48ad614SDennis Dalessandro 	qp->s_rdma_ack_cnt++;
3533c6cb20aSKaike Wan 	ps->s_txreq->sde = qpriv->s_sde;
354e922ae06SDon Hiatt 	ps->s_txreq->s_cur_size = len;
3559636258fSMitko Haralanov 	ps->s_txreq->hdr_dwords = hwords;
35644e43d91SMitko Haralanov 	hfi1_make_ruc_header(qp, ohdr, bth0, bth1, bth2, middle, ps);
357f48ad614SDennis Dalessandro 	return 1;
35824b11923SKaike Wan error_qp:
35924b11923SKaike Wan 	spin_unlock_irqrestore(&qp->s_lock, ps->flags);
36024b11923SKaike Wan 	spin_lock_irqsave(&qp->r_lock, ps->flags);
36124b11923SKaike Wan 	spin_lock(&qp->s_lock);
36224b11923SKaike Wan 	rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
36324b11923SKaike Wan 	spin_unlock(&qp->s_lock);
36424b11923SKaike Wan 	spin_unlock_irqrestore(&qp->r_lock, ps->flags);
36524b11923SKaike Wan 	spin_lock_irqsave(&qp->s_lock, ps->flags);
366f48ad614SDennis Dalessandro bail:
367f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
368f48ad614SDennis Dalessandro 	/*
369f48ad614SDennis Dalessandro 	 * Ensure s_rdma_ack_cnt changes are committed prior to resetting
370f48ad614SDennis Dalessandro 	 * RVT_S_RESP_PENDING
371f48ad614SDennis Dalessandro 	 */
372f48ad614SDennis Dalessandro 	smp_wmb();
373f48ad614SDennis Dalessandro 	qp->s_flags &= ~(RVT_S_RESP_PENDING
374f48ad614SDennis Dalessandro 				| RVT_S_ACK_PENDING
3752e2ba09eSMike Marciniszyn 				| HFI1_S_AHG_VALID);
376f48ad614SDennis Dalessandro 	return 0;
377f48ad614SDennis Dalessandro }
378f48ad614SDennis Dalessandro 
379f48ad614SDennis Dalessandro /**
380f48ad614SDennis Dalessandro  * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
381f48ad614SDennis Dalessandro  * @qp: a pointer to the QP
3826993fce4SLee Jones  * @ps: the current packet state
383f48ad614SDennis Dalessandro  *
384f48ad614SDennis Dalessandro  * Assumes s_lock is held.
385f48ad614SDennis Dalessandro  *
386f48ad614SDennis Dalessandro  * Return 1 if constructed; otherwise, return 0.
387f48ad614SDennis Dalessandro  */
hfi1_make_rc_req(struct rvt_qp * qp,struct hfi1_pkt_state * ps)388f48ad614SDennis Dalessandro int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
389f48ad614SDennis Dalessandro {
390f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
391f48ad614SDennis Dalessandro 	struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
392261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
39324b11923SKaike Wan 	struct rvt_sge_state *ss = NULL;
394f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
39524b11923SKaike Wan 	struct hfi1_swqe_priv *wpriv;
39624b11923SKaike Wan 	struct tid_rdma_request *req = NULL;
39724b11923SKaike Wan 	/* header size in 32-bit words LRH+BTH = (8+12)/4. */
39824b11923SKaike Wan 	u32 hwords = 5;
39924b11923SKaike Wan 	u32 len = 0;
40024b11923SKaike Wan 	u32 bth0 = 0, bth2 = 0;
40144e43d91SMitko Haralanov 	u32 bth1 = qp->remote_qpn | (HFI1_CAP_IS_KSET(OPFN) << IB_BTHE_E_SHIFT);
402f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
403f48ad614SDennis Dalessandro 	char newreq;
404f48ad614SDennis Dalessandro 	int middle = 0;
405f48ad614SDennis Dalessandro 	int delta;
40624b11923SKaike Wan 	struct tid_rdma_flow *flow = NULL;
4073c6cb20aSKaike Wan 	struct tid_rdma_params *remote;
408f48ad614SDennis Dalessandro 
4093ce5daa2SKaike Wan 	trace_hfi1_sender_make_rc_req(qp);
41068e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
411f48ad614SDennis Dalessandro 	ps->s_txreq = get_txreq(ps->dev, qp);
412b697d7d8SMichael J. Ruhl 	if (!ps->s_txreq)
413f48ad614SDennis Dalessandro 		goto bail_no_tx;
414f48ad614SDennis Dalessandro 
4155b6cabb0SDon Hiatt 	if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
4165b6cabb0SDon Hiatt 		/* header size in 32-bit words LRH+BTH = (8+12)/4. */
4175b6cabb0SDon Hiatt 		hwords = 5;
418d8966fcdSDasaratharaman Chandramouli 		if (rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)
41930e07416SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.ibh.u.l.oth;
4205b6cabb0SDon Hiatt 		else
4215b6cabb0SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.ibh.u.oth;
4225b6cabb0SDon Hiatt 	} else {
4235b6cabb0SDon Hiatt 		/* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
4245b6cabb0SDon Hiatt 		hwords = 7;
4255b6cabb0SDon Hiatt 		if ((rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
4265b6cabb0SDon Hiatt 		    (hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))))
4275b6cabb0SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.opah.u.l.oth;
4285b6cabb0SDon Hiatt 		else
4295b6cabb0SDon Hiatt 			ohdr = &ps->s_txreq->phdr.hdr.opah.u.oth;
4305b6cabb0SDon Hiatt 	}
431f48ad614SDennis Dalessandro 
432f48ad614SDennis Dalessandro 	/* Sending responses has higher priority over sending requests. */
433f48ad614SDennis Dalessandro 	if ((qp->s_flags & RVT_S_RESP_PENDING) &&
434f48ad614SDennis Dalessandro 	    make_rc_ack(dev, qp, ohdr, ps))
435f48ad614SDennis Dalessandro 		return 1;
436f48ad614SDennis Dalessandro 
437f48ad614SDennis Dalessandro 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
438f48ad614SDennis Dalessandro 		if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
439f48ad614SDennis Dalessandro 			goto bail;
440f48ad614SDennis Dalessandro 		/* We are in the error state, flush the work request. */
441eb04ff09SMike Marciniszyn 		if (qp->s_last == READ_ONCE(qp->s_head))
442f48ad614SDennis Dalessandro 			goto bail;
443f48ad614SDennis Dalessandro 		/* If DMAs are in progress, we can't flush immediately. */
444f48ad614SDennis Dalessandro 		if (iowait_sdma_pending(&priv->s_iowait)) {
445f48ad614SDennis Dalessandro 			qp->s_flags |= RVT_S_WAIT_DMA;
446f48ad614SDennis Dalessandro 			goto bail;
447f48ad614SDennis Dalessandro 		}
448f48ad614SDennis Dalessandro 		clear_ahg(qp);
449f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_last);
45024b11923SKaike Wan 		hfi1_trdma_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
451f48ad614SDennis Dalessandro 					 IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
452f48ad614SDennis Dalessandro 		/* will get called again */
453f48ad614SDennis Dalessandro 		goto done_free_tx;
454f48ad614SDennis Dalessandro 	}
455f48ad614SDennis Dalessandro 
4563c6cb20aSKaike Wan 	if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK | HFI1_S_WAIT_HALT))
457f48ad614SDennis Dalessandro 		goto bail;
458f48ad614SDennis Dalessandro 
459f48ad614SDennis Dalessandro 	if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
460f48ad614SDennis Dalessandro 		if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
461f48ad614SDennis Dalessandro 			qp->s_flags |= RVT_S_WAIT_PSN;
462f48ad614SDennis Dalessandro 			goto bail;
463f48ad614SDennis Dalessandro 		}
464f48ad614SDennis Dalessandro 		qp->s_sending_psn = qp->s_psn;
465f48ad614SDennis Dalessandro 		qp->s_sending_hpsn = qp->s_psn - 1;
466f48ad614SDennis Dalessandro 	}
467f48ad614SDennis Dalessandro 
468f48ad614SDennis Dalessandro 	/* Send a request. */
469f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
47024b11923SKaike Wan check_s_state:
471f48ad614SDennis Dalessandro 	switch (qp->s_state) {
472f48ad614SDennis Dalessandro 	default:
473f48ad614SDennis Dalessandro 		if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
474f48ad614SDennis Dalessandro 			goto bail;
475f48ad614SDennis Dalessandro 		/*
476f48ad614SDennis Dalessandro 		 * Resend an old request or start a new one.
477f48ad614SDennis Dalessandro 		 *
478f48ad614SDennis Dalessandro 		 * We keep track of the current SWQE so that
479f48ad614SDennis Dalessandro 		 * we don't reset the "furthest progress" state
480f48ad614SDennis Dalessandro 		 * if we need to back up.
481f48ad614SDennis Dalessandro 		 */
482f48ad614SDennis Dalessandro 		newreq = 0;
483f48ad614SDennis Dalessandro 		if (qp->s_cur == qp->s_tail) {
484f48ad614SDennis Dalessandro 			/* Check if send work queue is empty. */
485eb04ff09SMike Marciniszyn 			if (qp->s_tail == READ_ONCE(qp->s_head)) {
486f48ad614SDennis Dalessandro 				clear_ahg(qp);
487f48ad614SDennis Dalessandro 				goto bail;
488f48ad614SDennis Dalessandro 			}
489f48ad614SDennis Dalessandro 			/*
490f48ad614SDennis Dalessandro 			 * If a fence is requested, wait for previous
491f48ad614SDennis Dalessandro 			 * RDMA read and atomic operations to finish.
49224b11923SKaike Wan 			 * However, there is no need to guard against
49324b11923SKaike Wan 			 * TID RDMA READ after TID RDMA READ.
494f48ad614SDennis Dalessandro 			 */
495f48ad614SDennis Dalessandro 			if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
49624b11923SKaike Wan 			    qp->s_num_rd_atomic &&
49724b11923SKaike Wan 			    (wqe->wr.opcode != IB_WR_TID_RDMA_READ ||
49824b11923SKaike Wan 			     priv->pending_tid_r_segs < qp->s_num_rd_atomic)) {
499f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_FENCE;
500f48ad614SDennis Dalessandro 				goto bail;
501f48ad614SDennis Dalessandro 			}
5020db3dfa0SJianxin Xiong 			/*
5030db3dfa0SJianxin Xiong 			 * Local operations are processed immediately
5040db3dfa0SJianxin Xiong 			 * after all prior requests have completed
5050db3dfa0SJianxin Xiong 			 */
5060db3dfa0SJianxin Xiong 			if (wqe->wr.opcode == IB_WR_REG_MR ||
5070db3dfa0SJianxin Xiong 			    wqe->wr.opcode == IB_WR_LOCAL_INV) {
508d9b13c20SJianxin Xiong 				int local_ops = 0;
509d9b13c20SJianxin Xiong 				int err = 0;
510d9b13c20SJianxin Xiong 
5110db3dfa0SJianxin Xiong 				if (qp->s_last != qp->s_cur)
5120db3dfa0SJianxin Xiong 					goto bail;
5130db3dfa0SJianxin Xiong 				if (++qp->s_cur == qp->s_size)
5140db3dfa0SJianxin Xiong 					qp->s_cur = 0;
5150db3dfa0SJianxin Xiong 				if (++qp->s_tail == qp->s_size)
5160db3dfa0SJianxin Xiong 					qp->s_tail = 0;
517d9b13c20SJianxin Xiong 				if (!(wqe->wr.send_flags &
518d9b13c20SJianxin Xiong 				      RVT_SEND_COMPLETION_ONLY)) {
5190db3dfa0SJianxin Xiong 					err = rvt_invalidate_rkey(
5200db3dfa0SJianxin Xiong 						qp,
5210db3dfa0SJianxin Xiong 						wqe->wr.ex.invalidate_rkey);
522d9b13c20SJianxin Xiong 					local_ops = 1;
523d9b13c20SJianxin Xiong 				}
524116aa033SVenkata Sandeep Dhanalakota 				rvt_send_complete(qp, wqe,
5250db3dfa0SJianxin Xiong 						  err ? IB_WC_LOC_PROT_ERR
5260db3dfa0SJianxin Xiong 						      : IB_WC_SUCCESS);
527d9b13c20SJianxin Xiong 				if (local_ops)
5280db3dfa0SJianxin Xiong 					atomic_dec(&qp->local_ops_pending);
5290db3dfa0SJianxin Xiong 				goto done_free_tx;
5300db3dfa0SJianxin Xiong 			}
5310db3dfa0SJianxin Xiong 
532f48ad614SDennis Dalessandro 			newreq = 1;
533f48ad614SDennis Dalessandro 			qp->s_psn = wqe->psn;
534f48ad614SDennis Dalessandro 		}
535f48ad614SDennis Dalessandro 		/*
536f48ad614SDennis Dalessandro 		 * Note that we have to be careful not to modify the
537f48ad614SDennis Dalessandro 		 * original work request since we may need to resend
538f48ad614SDennis Dalessandro 		 * it.
539f48ad614SDennis Dalessandro 		 */
540f48ad614SDennis Dalessandro 		len = wqe->length;
541f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
542f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn);
543a0b34f75SKaike Wan 
544a0b34f75SKaike Wan 		/*
545a0b34f75SKaike Wan 		 * Interlock between various IB requests and TID RDMA
546a0b34f75SKaike Wan 		 * if necessary.
547a0b34f75SKaike Wan 		 */
548a0b34f75SKaike Wan 		if ((priv->s_flags & HFI1_S_TID_WAIT_INTERLCK) ||
549a0b34f75SKaike Wan 		    hfi1_tid_rdma_wqe_interlock(qp, wqe))
550a0b34f75SKaike Wan 			goto bail;
551a0b34f75SKaike Wan 
552f48ad614SDennis Dalessandro 		switch (wqe->wr.opcode) {
553f48ad614SDennis Dalessandro 		case IB_WR_SEND:
554f48ad614SDennis Dalessandro 		case IB_WR_SEND_WITH_IMM:
5550db3dfa0SJianxin Xiong 		case IB_WR_SEND_WITH_INV:
556f48ad614SDennis Dalessandro 			/* If no credit, return. */
55771994354SKaike Wan 			if (!rvt_rc_credit_avail(qp, wqe))
558f48ad614SDennis Dalessandro 				goto bail;
559f48ad614SDennis Dalessandro 			if (len > pmtu) {
560f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_FIRST);
561f48ad614SDennis Dalessandro 				len = pmtu;
562f48ad614SDennis Dalessandro 				break;
563f48ad614SDennis Dalessandro 			}
564f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_SEND) {
565f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_ONLY);
5660db3dfa0SJianxin Xiong 			} else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
567f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
568f48ad614SDennis Dalessandro 				/* Immediate data comes after the BTH */
569f48ad614SDennis Dalessandro 				ohdr->u.imm_data = wqe->wr.ex.imm_data;
570f48ad614SDennis Dalessandro 				hwords += 1;
5710db3dfa0SJianxin Xiong 			} else {
5720db3dfa0SJianxin Xiong 				qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
5730db3dfa0SJianxin Xiong 				/* Invalidate rkey comes after the BTH */
5740db3dfa0SJianxin Xiong 				ohdr->u.ieth = cpu_to_be32(
5750db3dfa0SJianxin Xiong 						wqe->wr.ex.invalidate_rkey);
5760db3dfa0SJianxin Xiong 				hwords += 1;
577f48ad614SDennis Dalessandro 			}
578f48ad614SDennis Dalessandro 			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
579f48ad614SDennis Dalessandro 				bth0 |= IB_BTH_SOLICITED;
580f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
581f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
582f48ad614SDennis Dalessandro 				qp->s_cur = 0;
583f48ad614SDennis Dalessandro 			break;
584f48ad614SDennis Dalessandro 
585f48ad614SDennis Dalessandro 		case IB_WR_RDMA_WRITE:
586f48ad614SDennis Dalessandro 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
587f48ad614SDennis Dalessandro 				qp->s_lsn++;
5885b0ef650SMike Marciniszyn 			goto no_flow_control;
589f48ad614SDennis Dalessandro 		case IB_WR_RDMA_WRITE_WITH_IMM:
590f48ad614SDennis Dalessandro 			/* If no credit, return. */
59171994354SKaike Wan 			if (!rvt_rc_credit_avail(qp, wqe))
592f48ad614SDennis Dalessandro 				goto bail;
5935b0ef650SMike Marciniszyn no_flow_control:
594261a4351SMike Marciniszyn 			put_ib_reth_vaddr(
595261a4351SMike Marciniszyn 				wqe->rdma_wr.remote_addr,
596261a4351SMike Marciniszyn 				&ohdr->u.rc.reth);
597f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.rkey =
598f48ad614SDennis Dalessandro 				cpu_to_be32(wqe->rdma_wr.rkey);
599f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.length = cpu_to_be32(len);
600f48ad614SDennis Dalessandro 			hwords += sizeof(struct ib_reth) / sizeof(u32);
601f48ad614SDennis Dalessandro 			if (len > pmtu) {
602f48ad614SDennis Dalessandro 				qp->s_state = OP(RDMA_WRITE_FIRST);
603f48ad614SDennis Dalessandro 				len = pmtu;
604f48ad614SDennis Dalessandro 				break;
605f48ad614SDennis Dalessandro 			}
606f48ad614SDennis Dalessandro 			if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
607f48ad614SDennis Dalessandro 				qp->s_state = OP(RDMA_WRITE_ONLY);
608f48ad614SDennis Dalessandro 			} else {
609f48ad614SDennis Dalessandro 				qp->s_state =
610f48ad614SDennis Dalessandro 					OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
611f48ad614SDennis Dalessandro 				/* Immediate data comes after RETH */
612f48ad614SDennis Dalessandro 				ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
613f48ad614SDennis Dalessandro 				hwords += 1;
614f48ad614SDennis Dalessandro 				if (wqe->wr.send_flags & IB_SEND_SOLICITED)
615f48ad614SDennis Dalessandro 					bth0 |= IB_BTH_SOLICITED;
616f48ad614SDennis Dalessandro 			}
617f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
618f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
619f48ad614SDennis Dalessandro 				qp->s_cur = 0;
620f48ad614SDennis Dalessandro 			break;
621f48ad614SDennis Dalessandro 
6223c6cb20aSKaike Wan 		case IB_WR_TID_RDMA_WRITE:
6233c6cb20aSKaike Wan 			if (newreq) {
6243c6cb20aSKaike Wan 				/*
6253c6cb20aSKaike Wan 				 * Limit the number of TID RDMA WRITE requests.
6263c6cb20aSKaike Wan 				 */
6273c6cb20aSKaike Wan 				if (atomic_read(&priv->n_tid_requests) >=
6283c6cb20aSKaike Wan 				    HFI1_TID_RDMA_WRITE_CNT)
6293c6cb20aSKaike Wan 					goto bail;
6303c6cb20aSKaike Wan 
6313c6cb20aSKaike Wan 				if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
6323c6cb20aSKaike Wan 					qp->s_lsn++;
6333c6cb20aSKaike Wan 			}
6343c6cb20aSKaike Wan 
6353c6cb20aSKaike Wan 			hwords += hfi1_build_tid_rdma_write_req(qp, wqe, ohdr,
6363c6cb20aSKaike Wan 								&bth1, &bth2,
6373c6cb20aSKaike Wan 								&len);
6383c6cb20aSKaike Wan 			ss = NULL;
6393c6cb20aSKaike Wan 			if (priv->s_tid_cur == HFI1_QP_WQE_INVALID) {
6403c6cb20aSKaike Wan 				priv->s_tid_cur = qp->s_cur;
6413c6cb20aSKaike Wan 				if (priv->s_tid_tail == HFI1_QP_WQE_INVALID) {
6423c6cb20aSKaike Wan 					priv->s_tid_tail = qp->s_cur;
6433c6cb20aSKaike Wan 					priv->s_state = TID_OP(WRITE_RESP);
6443c6cb20aSKaike Wan 				}
6453c6cb20aSKaike Wan 			} else if (priv->s_tid_cur == priv->s_tid_head) {
6463c6cb20aSKaike Wan 				struct rvt_swqe *__w;
6473c6cb20aSKaike Wan 				struct tid_rdma_request *__r;
6483c6cb20aSKaike Wan 
6493c6cb20aSKaike Wan 				__w = rvt_get_swqe_ptr(qp, priv->s_tid_cur);
6503c6cb20aSKaike Wan 				__r = wqe_to_tid_req(__w);
6513c6cb20aSKaike Wan 
6523c6cb20aSKaike Wan 				/*
6533c6cb20aSKaike Wan 				 * The s_tid_cur pointer is advanced to s_cur if
6543c6cb20aSKaike Wan 				 * any of the following conditions about the WQE
6553c6cb20aSKaike Wan 				 * to which s_ti_cur currently points to are
6563c6cb20aSKaike Wan 				 * satisfied:
6573c6cb20aSKaike Wan 				 *   1. The request is not a TID RDMA WRITE
6583c6cb20aSKaike Wan 				 *      request,
6593c6cb20aSKaike Wan 				 *   2. The request is in the INACTIVE or
6603c6cb20aSKaike Wan 				 *      COMPLETE states (TID RDMA READ requests
6613c6cb20aSKaike Wan 				 *      stay at INACTIVE and TID RDMA WRITE
6623c6cb20aSKaike Wan 				 *      transition to COMPLETE when done),
6633c6cb20aSKaike Wan 				 *   3. The request is in the ACTIVE or SYNC
6643c6cb20aSKaike Wan 				 *      state and the number of completed
6653c6cb20aSKaike Wan 				 *      segments is equal to the total segment
6663c6cb20aSKaike Wan 				 *      count.
6673c6cb20aSKaike Wan 				 *      (If ACTIVE, the request is waiting for
6683c6cb20aSKaike Wan 				 *       ACKs. If SYNC, the request has not
6693c6cb20aSKaike Wan 				 *       received any responses because it's
6703c6cb20aSKaike Wan 				 *       waiting on a sync point.)
6713c6cb20aSKaike Wan 				 */
6723c6cb20aSKaike Wan 				if (__w->wr.opcode != IB_WR_TID_RDMA_WRITE ||
6733c6cb20aSKaike Wan 				    __r->state == TID_REQUEST_INACTIVE ||
6743c6cb20aSKaike Wan 				    __r->state == TID_REQUEST_COMPLETE ||
6753c6cb20aSKaike Wan 				    ((__r->state == TID_REQUEST_ACTIVE ||
6763c6cb20aSKaike Wan 				      __r->state == TID_REQUEST_SYNC) &&
6773c6cb20aSKaike Wan 				     __r->comp_seg == __r->total_segs)) {
6783c6cb20aSKaike Wan 					if (priv->s_tid_tail ==
6793c6cb20aSKaike Wan 					    priv->s_tid_cur &&
6803c6cb20aSKaike Wan 					    priv->s_state ==
6813c6cb20aSKaike Wan 					    TID_OP(WRITE_DATA_LAST)) {
6823c6cb20aSKaike Wan 						priv->s_tid_tail = qp->s_cur;
6833c6cb20aSKaike Wan 						priv->s_state =
6843c6cb20aSKaike Wan 							TID_OP(WRITE_RESP);
6853c6cb20aSKaike Wan 					}
6863c6cb20aSKaike Wan 					priv->s_tid_cur = qp->s_cur;
6873c6cb20aSKaike Wan 				}
6883c6cb20aSKaike Wan 				/*
6893c6cb20aSKaike Wan 				 * A corner case: when the last TID RDMA WRITE
6903c6cb20aSKaike Wan 				 * request was completed, s_tid_head,
6913c6cb20aSKaike Wan 				 * s_tid_cur, and s_tid_tail all point to the
6923c6cb20aSKaike Wan 				 * same location. Other requests are posted and
6933c6cb20aSKaike Wan 				 * s_cur wraps around to the same location,
6943c6cb20aSKaike Wan 				 * where a new TID RDMA WRITE is posted. In
6953c6cb20aSKaike Wan 				 * this case, none of the indices need to be
6963c6cb20aSKaike Wan 				 * updated. However, the priv->s_state should.
6973c6cb20aSKaike Wan 				 */
6983c6cb20aSKaike Wan 				if (priv->s_tid_tail == qp->s_cur &&
6993c6cb20aSKaike Wan 				    priv->s_state == TID_OP(WRITE_DATA_LAST))
7003c6cb20aSKaike Wan 					priv->s_state = TID_OP(WRITE_RESP);
7013c6cb20aSKaike Wan 			}
7023c6cb20aSKaike Wan 			req = wqe_to_tid_req(wqe);
7033c6cb20aSKaike Wan 			if (newreq) {
7043c6cb20aSKaike Wan 				priv->s_tid_head = qp->s_cur;
7053c6cb20aSKaike Wan 				priv->pending_tid_w_resp += req->total_segs;
7063c6cb20aSKaike Wan 				atomic_inc(&priv->n_tid_requests);
7073c6cb20aSKaike Wan 				atomic_dec(&priv->n_requests);
7083c6cb20aSKaike Wan 			} else {
7093c6cb20aSKaike Wan 				req->state = TID_REQUEST_RESEND;
7103c6cb20aSKaike Wan 				req->comp_seg = delta_psn(bth2, wqe->psn);
7113c6cb20aSKaike Wan 				/*
7123c6cb20aSKaike Wan 				 * Pull back any segments since we are going
7133c6cb20aSKaike Wan 				 * to re-receive them.
7143c6cb20aSKaike Wan 				 */
7153c6cb20aSKaike Wan 				req->setup_head = req->clear_tail;
7163c6cb20aSKaike Wan 				priv->pending_tid_w_resp +=
7173c6cb20aSKaike Wan 					delta_psn(wqe->lpsn, bth2) + 1;
7183c6cb20aSKaike Wan 			}
7193c6cb20aSKaike Wan 
720a05c9bdcSKaike Wan 			trace_hfi1_tid_write_sender_make_req(qp, newreq);
721a05c9bdcSKaike Wan 			trace_hfi1_tid_req_make_req_write(qp, newreq,
722a05c9bdcSKaike Wan 							  wqe->wr.opcode,
723a05c9bdcSKaike Wan 							  wqe->psn, wqe->lpsn,
724a05c9bdcSKaike Wan 							  req);
7253c6cb20aSKaike Wan 			if (++qp->s_cur == qp->s_size)
7263c6cb20aSKaike Wan 				qp->s_cur = 0;
7273c6cb20aSKaike Wan 			break;
7283c6cb20aSKaike Wan 
729f48ad614SDennis Dalessandro 		case IB_WR_RDMA_READ:
730f48ad614SDennis Dalessandro 			/*
731f48ad614SDennis Dalessandro 			 * Don't allow more operations to be started
732f48ad614SDennis Dalessandro 			 * than the QP limits allow.
733f48ad614SDennis Dalessandro 			 */
734f48ad614SDennis Dalessandro 			if (qp->s_num_rd_atomic >=
735f48ad614SDennis Dalessandro 			    qp->s_max_rd_atomic) {
736f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_RDMAR;
737f48ad614SDennis Dalessandro 				goto bail;
738f48ad614SDennis Dalessandro 			}
739f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic++;
740b126078eSKaike Wan 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
741f48ad614SDennis Dalessandro 				qp->s_lsn++;
742261a4351SMike Marciniszyn 			put_ib_reth_vaddr(
743261a4351SMike Marciniszyn 				wqe->rdma_wr.remote_addr,
744261a4351SMike Marciniszyn 				&ohdr->u.rc.reth);
745f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.rkey =
746f48ad614SDennis Dalessandro 				cpu_to_be32(wqe->rdma_wr.rkey);
747f48ad614SDennis Dalessandro 			ohdr->u.rc.reth.length = cpu_to_be32(len);
748f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_READ_REQUEST);
749f48ad614SDennis Dalessandro 			hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
750f48ad614SDennis Dalessandro 			ss = NULL;
751f48ad614SDennis Dalessandro 			len = 0;
752f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
753f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
754f48ad614SDennis Dalessandro 				qp->s_cur = 0;
755f48ad614SDennis Dalessandro 			break;
756f48ad614SDennis Dalessandro 
75724b11923SKaike Wan 		case IB_WR_TID_RDMA_READ:
7583ce5daa2SKaike Wan 			trace_hfi1_tid_read_sender_make_req(qp, newreq);
75924b11923SKaike Wan 			wpriv = wqe->priv;
76024b11923SKaike Wan 			req = wqe_to_tid_req(wqe);
7613ce5daa2SKaike Wan 			trace_hfi1_tid_req_make_req_read(qp, newreq,
7623ce5daa2SKaike Wan 							 wqe->wr.opcode,
7633ce5daa2SKaike Wan 							 wqe->psn, wqe->lpsn,
7643ce5daa2SKaike Wan 							 req);
76524b11923SKaike Wan 			delta = cmp_psn(qp->s_psn, wqe->psn);
76624b11923SKaike Wan 
76724b11923SKaike Wan 			/*
76824b11923SKaike Wan 			 * Don't allow more operations to be started
76924b11923SKaike Wan 			 * than the QP limits allow. We could get here under
77024b11923SKaike Wan 			 * three conditions; (1) It's a new request; (2) We are
77124b11923SKaike Wan 			 * sending the second or later segment of a request,
77224b11923SKaike Wan 			 * but the qp->s_state is set to OP(RDMA_READ_REQUEST)
77324b11923SKaike Wan 			 * when the last segment of a previous request is
77424b11923SKaike Wan 			 * received just before this; (3) We are re-sending a
77524b11923SKaike Wan 			 * request.
77624b11923SKaike Wan 			 */
77724b11923SKaike Wan 			if (qp->s_num_rd_atomic >= qp->s_max_rd_atomic) {
77824b11923SKaike Wan 				qp->s_flags |= RVT_S_WAIT_RDMAR;
77924b11923SKaike Wan 				goto bail;
78024b11923SKaike Wan 			}
78124b11923SKaike Wan 			if (newreq) {
78224b11923SKaike Wan 				struct tid_rdma_flow *flow =
78324b11923SKaike Wan 					&req->flows[req->setup_head];
78424b11923SKaike Wan 
78524b11923SKaike Wan 				/*
78624b11923SKaike Wan 				 * Set up s_sge as it is needed for TID
78724b11923SKaike Wan 				 * allocation. However, if the pages have been
78824b11923SKaike Wan 				 * walked and mapped, skip it. An earlier try
78924b11923SKaike Wan 				 * has failed to allocate the TID entries.
79024b11923SKaike Wan 				 */
79124b11923SKaike Wan 				if (!flow->npagesets) {
79224b11923SKaike Wan 					qp->s_sge.sge = wqe->sg_list[0];
79324b11923SKaike Wan 					qp->s_sge.sg_list = wqe->sg_list + 1;
79424b11923SKaike Wan 					qp->s_sge.num_sge = wqe->wr.num_sge;
79524b11923SKaike Wan 					qp->s_sge.total_len = wqe->length;
79624b11923SKaike Wan 					qp->s_len = wqe->length;
79724b11923SKaike Wan 					req->isge = 0;
79824b11923SKaike Wan 					req->clear_tail = req->setup_head;
79924b11923SKaike Wan 					req->flow_idx = req->setup_head;
80024b11923SKaike Wan 					req->state = TID_REQUEST_ACTIVE;
80124b11923SKaike Wan 				}
80224b11923SKaike Wan 			} else if (delta == 0) {
80324b11923SKaike Wan 				/* Re-send a request */
80424b11923SKaike Wan 				req->cur_seg = 0;
80524b11923SKaike Wan 				req->comp_seg = 0;
80624b11923SKaike Wan 				req->ack_pending = 0;
80724b11923SKaike Wan 				req->flow_idx = req->clear_tail;
80824b11923SKaike Wan 				req->state = TID_REQUEST_RESEND;
80924b11923SKaike Wan 			}
81024b11923SKaike Wan 			req->s_next_psn = qp->s_psn;
81124b11923SKaike Wan 			/* Read one segment at a time */
81224b11923SKaike Wan 			len = min_t(u32, req->seg_len,
81324b11923SKaike Wan 				    wqe->length - req->seg_len * req->cur_seg);
81424b11923SKaike Wan 			delta = hfi1_build_tid_rdma_read_req(qp, wqe, ohdr,
81524b11923SKaike Wan 							     &bth1, &bth2,
81624b11923SKaike Wan 							     &len);
81724b11923SKaike Wan 			if (delta <= 0) {
81824b11923SKaike Wan 				/* Wait for TID space */
81924b11923SKaike Wan 				goto bail;
82024b11923SKaike Wan 			}
82124b11923SKaike Wan 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
82224b11923SKaike Wan 				qp->s_lsn++;
82324b11923SKaike Wan 			hwords += delta;
82424b11923SKaike Wan 			ss = &wpriv->ss;
82524b11923SKaike Wan 			/* Check if this is the last segment */
82624b11923SKaike Wan 			if (req->cur_seg >= req->total_segs &&
82724b11923SKaike Wan 			    ++qp->s_cur == qp->s_size)
82824b11923SKaike Wan 				qp->s_cur = 0;
82924b11923SKaike Wan 			break;
83024b11923SKaike Wan 
831f48ad614SDennis Dalessandro 		case IB_WR_ATOMIC_CMP_AND_SWP:
832f48ad614SDennis Dalessandro 		case IB_WR_ATOMIC_FETCH_AND_ADD:
833f48ad614SDennis Dalessandro 			/*
834f48ad614SDennis Dalessandro 			 * Don't allow more operations to be started
835f48ad614SDennis Dalessandro 			 * than the QP limits allow.
836f48ad614SDennis Dalessandro 			 */
837f48ad614SDennis Dalessandro 			if (qp->s_num_rd_atomic >=
838f48ad614SDennis Dalessandro 			    qp->s_max_rd_atomic) {
839f48ad614SDennis Dalessandro 				qp->s_flags |= RVT_S_WAIT_RDMAR;
840f48ad614SDennis Dalessandro 				goto bail;
841f48ad614SDennis Dalessandro 			}
842f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic++;
8436f24b159SGustavo A. R. Silva 			fallthrough;
84448a615dcSKaike Wan 		case IB_WR_OPFN:
84548a615dcSKaike Wan 			if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
84648a615dcSKaike Wan 				qp->s_lsn++;
84748a615dcSKaike Wan 			if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
84848a615dcSKaike Wan 			    wqe->wr.opcode == IB_WR_OPFN) {
849f48ad614SDennis Dalessandro 				qp->s_state = OP(COMPARE_SWAP);
850261a4351SMike Marciniszyn 				put_ib_ateth_swap(wqe->atomic_wr.swap,
851261a4351SMike Marciniszyn 						  &ohdr->u.atomic_eth);
852261a4351SMike Marciniszyn 				put_ib_ateth_compare(wqe->atomic_wr.compare_add,
853261a4351SMike Marciniszyn 						     &ohdr->u.atomic_eth);
854f48ad614SDennis Dalessandro 			} else {
855f48ad614SDennis Dalessandro 				qp->s_state = OP(FETCH_ADD);
856261a4351SMike Marciniszyn 				put_ib_ateth_swap(wqe->atomic_wr.compare_add,
857261a4351SMike Marciniszyn 						  &ohdr->u.atomic_eth);
858261a4351SMike Marciniszyn 				put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
859f48ad614SDennis Dalessandro 			}
860261a4351SMike Marciniszyn 			put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
861261a4351SMike Marciniszyn 					   &ohdr->u.atomic_eth);
862f48ad614SDennis Dalessandro 			ohdr->u.atomic_eth.rkey = cpu_to_be32(
863f48ad614SDennis Dalessandro 				wqe->atomic_wr.rkey);
864f48ad614SDennis Dalessandro 			hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
865f48ad614SDennis Dalessandro 			ss = NULL;
866f48ad614SDennis Dalessandro 			len = 0;
867f48ad614SDennis Dalessandro 			bth2 |= IB_BTH_REQ_ACK;
868f48ad614SDennis Dalessandro 			if (++qp->s_cur == qp->s_size)
869f48ad614SDennis Dalessandro 				qp->s_cur = 0;
870f48ad614SDennis Dalessandro 			break;
871f48ad614SDennis Dalessandro 
872f48ad614SDennis Dalessandro 		default:
873f48ad614SDennis Dalessandro 			goto bail;
874f48ad614SDennis Dalessandro 		}
87524b11923SKaike Wan 		if (wqe->wr.opcode != IB_WR_TID_RDMA_READ) {
876f48ad614SDennis Dalessandro 			qp->s_sge.sge = wqe->sg_list[0];
877f48ad614SDennis Dalessandro 			qp->s_sge.sg_list = wqe->sg_list + 1;
878f48ad614SDennis Dalessandro 			qp->s_sge.num_sge = wqe->wr.num_sge;
879f48ad614SDennis Dalessandro 			qp->s_sge.total_len = wqe->length;
880f48ad614SDennis Dalessandro 			qp->s_len = wqe->length;
88124b11923SKaike Wan 		}
882f48ad614SDennis Dalessandro 		if (newreq) {
883f48ad614SDennis Dalessandro 			qp->s_tail++;
884f48ad614SDennis Dalessandro 			if (qp->s_tail >= qp->s_size)
885f48ad614SDennis Dalessandro 				qp->s_tail = 0;
886f48ad614SDennis Dalessandro 		}
8873c6cb20aSKaike Wan 		if (wqe->wr.opcode == IB_WR_RDMA_READ ||
8883c6cb20aSKaike Wan 		    wqe->wr.opcode == IB_WR_TID_RDMA_WRITE)
889f48ad614SDennis Dalessandro 			qp->s_psn = wqe->lpsn + 1;
89024b11923SKaike Wan 		else if (wqe->wr.opcode == IB_WR_TID_RDMA_READ)
89124b11923SKaike Wan 			qp->s_psn = req->s_next_psn;
892f48ad614SDennis Dalessandro 		else
893f48ad614SDennis Dalessandro 			qp->s_psn++;
894f48ad614SDennis Dalessandro 		break;
895f48ad614SDennis Dalessandro 
896f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
897f48ad614SDennis Dalessandro 		/*
898f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
899f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
900f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
901f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
902f48ad614SDennis Dalessandro 		 * thread to indicate a SEND needs to be restarted from an
903f48ad614SDennis Dalessandro 		 * earlier PSN without interfering with the sending thread.
904f48ad614SDennis Dalessandro 		 * See restart_rc().
905f48ad614SDennis Dalessandro 		 */
906f48ad614SDennis Dalessandro 		qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
9076f24b159SGustavo A. R. Silva 		fallthrough;
908f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
909f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_MIDDLE);
9106f24b159SGustavo A. R. Silva 		fallthrough;
911f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
912f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn++);
913f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
914f48ad614SDennis Dalessandro 		len = qp->s_len;
915f48ad614SDennis Dalessandro 		if (len > pmtu) {
916f48ad614SDennis Dalessandro 			len = pmtu;
917f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
918f48ad614SDennis Dalessandro 			break;
919f48ad614SDennis Dalessandro 		}
920f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_SEND) {
921f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
9220db3dfa0SJianxin Xiong 		} else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
923f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
924f48ad614SDennis Dalessandro 			/* Immediate data comes after the BTH */
925f48ad614SDennis Dalessandro 			ohdr->u.imm_data = wqe->wr.ex.imm_data;
926f48ad614SDennis Dalessandro 			hwords += 1;
9270db3dfa0SJianxin Xiong 		} else {
9280db3dfa0SJianxin Xiong 			qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
9290db3dfa0SJianxin Xiong 			/* invalidate data comes after the BTH */
9300db3dfa0SJianxin Xiong 			ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
9310db3dfa0SJianxin Xiong 			hwords += 1;
932f48ad614SDennis Dalessandro 		}
933f48ad614SDennis Dalessandro 		if (wqe->wr.send_flags & IB_SEND_SOLICITED)
934f48ad614SDennis Dalessandro 			bth0 |= IB_BTH_SOLICITED;
935f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
936f48ad614SDennis Dalessandro 		qp->s_cur++;
937f48ad614SDennis Dalessandro 		if (qp->s_cur >= qp->s_size)
938f48ad614SDennis Dalessandro 			qp->s_cur = 0;
939f48ad614SDennis Dalessandro 		break;
940f48ad614SDennis Dalessandro 
941f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
942f48ad614SDennis Dalessandro 		/*
943f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
944f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
945f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
946f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_LAST is used by the ACK processing
947f48ad614SDennis Dalessandro 		 * thread to indicate a RDMA write needs to be restarted from
948f48ad614SDennis Dalessandro 		 * an earlier PSN without interfering with the sending thread.
949f48ad614SDennis Dalessandro 		 * See restart_rc().
950f48ad614SDennis Dalessandro 		 */
951f48ad614SDennis Dalessandro 		qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
9526f24b159SGustavo A. R. Silva 		fallthrough;
953f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
954f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_WRITE_MIDDLE);
9556f24b159SGustavo A. R. Silva 		fallthrough;
956f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
957f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn++);
958f48ad614SDennis Dalessandro 		ss = &qp->s_sge;
959f48ad614SDennis Dalessandro 		len = qp->s_len;
960f48ad614SDennis Dalessandro 		if (len > pmtu) {
961f48ad614SDennis Dalessandro 			len = pmtu;
962f48ad614SDennis Dalessandro 			middle = HFI1_CAP_IS_KSET(SDMA_AHG);
963f48ad614SDennis Dalessandro 			break;
964f48ad614SDennis Dalessandro 		}
965f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
966f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_WRITE_LAST);
967f48ad614SDennis Dalessandro 		} else {
968f48ad614SDennis Dalessandro 			qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
969f48ad614SDennis Dalessandro 			/* Immediate data comes after the BTH */
970f48ad614SDennis Dalessandro 			ohdr->u.imm_data = wqe->wr.ex.imm_data;
971f48ad614SDennis Dalessandro 			hwords += 1;
972f48ad614SDennis Dalessandro 			if (wqe->wr.send_flags & IB_SEND_SOLICITED)
973f48ad614SDennis Dalessandro 				bth0 |= IB_BTH_SOLICITED;
974f48ad614SDennis Dalessandro 		}
975f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
976f48ad614SDennis Dalessandro 		qp->s_cur++;
977f48ad614SDennis Dalessandro 		if (qp->s_cur >= qp->s_size)
978f48ad614SDennis Dalessandro 			qp->s_cur = 0;
979f48ad614SDennis Dalessandro 		break;
980f48ad614SDennis Dalessandro 
981f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
982f48ad614SDennis Dalessandro 		/*
983f48ad614SDennis Dalessandro 		 * qp->s_state is normally set to the opcode of the
984f48ad614SDennis Dalessandro 		 * last packet constructed for new requests and therefore
985f48ad614SDennis Dalessandro 		 * is never set to RDMA read response.
986f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
987f48ad614SDennis Dalessandro 		 * thread to indicate a RDMA read needs to be restarted from
988f48ad614SDennis Dalessandro 		 * an earlier PSN without interfering with the sending thread.
989f48ad614SDennis Dalessandro 		 * See restart_rc().
990f48ad614SDennis Dalessandro 		 */
991f48ad614SDennis Dalessandro 		len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
992261a4351SMike Marciniszyn 		put_ib_reth_vaddr(
993261a4351SMike Marciniszyn 			wqe->rdma_wr.remote_addr + len,
994261a4351SMike Marciniszyn 			&ohdr->u.rc.reth);
995f48ad614SDennis Dalessandro 		ohdr->u.rc.reth.rkey =
996f48ad614SDennis Dalessandro 			cpu_to_be32(wqe->rdma_wr.rkey);
997f48ad614SDennis Dalessandro 		ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
998f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_REQUEST);
999f48ad614SDennis Dalessandro 		hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
1000f48ad614SDennis Dalessandro 		bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
1001f48ad614SDennis Dalessandro 		qp->s_psn = wqe->lpsn + 1;
1002f48ad614SDennis Dalessandro 		ss = NULL;
1003f48ad614SDennis Dalessandro 		len = 0;
1004f48ad614SDennis Dalessandro 		qp->s_cur++;
1005f48ad614SDennis Dalessandro 		if (qp->s_cur == qp->s_size)
1006f48ad614SDennis Dalessandro 			qp->s_cur = 0;
1007f48ad614SDennis Dalessandro 		break;
10083c6cb20aSKaike Wan 
10093c6cb20aSKaike Wan 	case TID_OP(WRITE_RESP):
10103c6cb20aSKaike Wan 		/*
10113c6cb20aSKaike Wan 		 * This value for s_state is used for restarting a TID RDMA
10123c6cb20aSKaike Wan 		 * WRITE request. See comment in OP(RDMA_READ_RESPONSE_MIDDLE
10133c6cb20aSKaike Wan 		 * for more).
10143c6cb20aSKaike Wan 		 */
10153c6cb20aSKaike Wan 		req = wqe_to_tid_req(wqe);
10163c6cb20aSKaike Wan 		req->state = TID_REQUEST_RESEND;
10173c6cb20aSKaike Wan 		rcu_read_lock();
10183c6cb20aSKaike Wan 		remote = rcu_dereference(priv->tid_rdma.remote);
10193c6cb20aSKaike Wan 		req->comp_seg = delta_psn(qp->s_psn, wqe->psn);
10203c6cb20aSKaike Wan 		len = wqe->length - (req->comp_seg * remote->max_len);
10213c6cb20aSKaike Wan 		rcu_read_unlock();
10223c6cb20aSKaike Wan 
10233c6cb20aSKaike Wan 		bth2 = mask_psn(qp->s_psn);
10243c6cb20aSKaike Wan 		hwords += hfi1_build_tid_rdma_write_req(qp, wqe, ohdr, &bth1,
10253c6cb20aSKaike Wan 							&bth2, &len);
10263c6cb20aSKaike Wan 		qp->s_psn = wqe->lpsn + 1;
10273c6cb20aSKaike Wan 		ss = NULL;
10283c6cb20aSKaike Wan 		qp->s_state = TID_OP(WRITE_REQ);
10293c6cb20aSKaike Wan 		priv->pending_tid_w_resp += delta_psn(wqe->lpsn, bth2) + 1;
10303c6cb20aSKaike Wan 		priv->s_tid_cur = qp->s_cur;
10313c6cb20aSKaike Wan 		if (++qp->s_cur == qp->s_size)
10323c6cb20aSKaike Wan 			qp->s_cur = 0;
1033a05c9bdcSKaike Wan 		trace_hfi1_tid_req_make_req_write(qp, 0, wqe->wr.opcode,
1034a05c9bdcSKaike Wan 						  wqe->psn, wqe->lpsn, req);
10353c6cb20aSKaike Wan 		break;
10363c6cb20aSKaike Wan 
103724b11923SKaike Wan 	case TID_OP(READ_RESP):
103824b11923SKaike Wan 		if (wqe->wr.opcode != IB_WR_TID_RDMA_READ)
103924b11923SKaike Wan 			goto bail;
104024b11923SKaike Wan 		/* This is used to restart a TID read request */
104124b11923SKaike Wan 		req = wqe_to_tid_req(wqe);
104224b11923SKaike Wan 		wpriv = wqe->priv;
104324b11923SKaike Wan 		/*
104424b11923SKaike Wan 		 * Back down. The field qp->s_psn has been set to the psn with
104524b11923SKaike Wan 		 * which the request should be restart. It's OK to use division
104624b11923SKaike Wan 		 * as this is on the retry path.
104724b11923SKaike Wan 		 */
104824b11923SKaike Wan 		req->cur_seg = delta_psn(qp->s_psn, wqe->psn) / priv->pkts_ps;
104924b11923SKaike Wan 
105024b11923SKaike Wan 		/*
105124b11923SKaike Wan 		 * The following function need to be redefined to return the
105224b11923SKaike Wan 		 * status to make sure that we find the flow. At the same
105324b11923SKaike Wan 		 * time, we can use the req->state change to check if the
105424b11923SKaike Wan 		 * call succeeds or not.
105524b11923SKaike Wan 		 */
105624b11923SKaike Wan 		req->state = TID_REQUEST_RESEND;
105724b11923SKaike Wan 		hfi1_tid_rdma_restart_req(qp, wqe, &bth2);
105824b11923SKaike Wan 		if (req->state != TID_REQUEST_ACTIVE) {
105924b11923SKaike Wan 			/*
106024b11923SKaike Wan 			 * Failed to find the flow. Release all allocated tid
106124b11923SKaike Wan 			 * resources.
106224b11923SKaike Wan 			 */
106324b11923SKaike Wan 			hfi1_kern_exp_rcv_clear_all(req);
106424b11923SKaike Wan 			hfi1_kern_clear_hw_flow(priv->rcd, qp);
106524b11923SKaike Wan 
106624b11923SKaike Wan 			hfi1_trdma_send_complete(qp, wqe, IB_WC_LOC_QP_OP_ERR);
106724b11923SKaike Wan 			goto bail;
106824b11923SKaike Wan 		}
106924b11923SKaike Wan 		req->state = TID_REQUEST_RESEND;
107024b11923SKaike Wan 		len = min_t(u32, req->seg_len,
107124b11923SKaike Wan 			    wqe->length - req->seg_len * req->cur_seg);
107224b11923SKaike Wan 		flow = &req->flows[req->flow_idx];
107324b11923SKaike Wan 		len -= flow->sent;
107424b11923SKaike Wan 		req->s_next_psn = flow->flow_state.ib_lpsn + 1;
107524b11923SKaike Wan 		delta = hfi1_build_tid_rdma_read_packet(wqe, ohdr, &bth1,
107624b11923SKaike Wan 							&bth2, &len);
107724b11923SKaike Wan 		if (delta <= 0) {
107824b11923SKaike Wan 			/* Wait for TID space */
107924b11923SKaike Wan 			goto bail;
108024b11923SKaike Wan 		}
108124b11923SKaike Wan 		hwords += delta;
108224b11923SKaike Wan 		ss = &wpriv->ss;
108324b11923SKaike Wan 		/* Check if this is the last segment */
108424b11923SKaike Wan 		if (req->cur_seg >= req->total_segs &&
108524b11923SKaike Wan 		    ++qp->s_cur == qp->s_size)
108624b11923SKaike Wan 			qp->s_cur = 0;
108724b11923SKaike Wan 		qp->s_psn = req->s_next_psn;
10883ce5daa2SKaike Wan 		trace_hfi1_tid_req_make_req_read(qp, 0, wqe->wr.opcode,
10893ce5daa2SKaike Wan 						 wqe->psn, wqe->lpsn, req);
109024b11923SKaike Wan 		break;
109124b11923SKaike Wan 	case TID_OP(READ_REQ):
109224b11923SKaike Wan 		req = wqe_to_tid_req(wqe);
109324b11923SKaike Wan 		delta = cmp_psn(qp->s_psn, wqe->psn);
109424b11923SKaike Wan 		/*
109524b11923SKaike Wan 		 * If the current WR is not TID RDMA READ, or this is the start
109624b11923SKaike Wan 		 * of a new request, we need to change the qp->s_state so that
109724b11923SKaike Wan 		 * the request can be set up properly.
109824b11923SKaike Wan 		 */
109924b11923SKaike Wan 		if (wqe->wr.opcode != IB_WR_TID_RDMA_READ || delta == 0 ||
110024b11923SKaike Wan 		    qp->s_cur == qp->s_tail) {
110124b11923SKaike Wan 			qp->s_state = OP(RDMA_READ_REQUEST);
110224b11923SKaike Wan 			if (delta == 0 || qp->s_cur == qp->s_tail)
110324b11923SKaike Wan 				goto check_s_state;
110424b11923SKaike Wan 			else
110524b11923SKaike Wan 				goto bail;
110624b11923SKaike Wan 		}
110724b11923SKaike Wan 
110824b11923SKaike Wan 		/* Rate limiting */
110924b11923SKaike Wan 		if (qp->s_num_rd_atomic >= qp->s_max_rd_atomic) {
111024b11923SKaike Wan 			qp->s_flags |= RVT_S_WAIT_RDMAR;
111124b11923SKaike Wan 			goto bail;
111224b11923SKaike Wan 		}
111324b11923SKaike Wan 
111424b11923SKaike Wan 		wpriv = wqe->priv;
111524b11923SKaike Wan 		/* Read one segment at a time */
111624b11923SKaike Wan 		len = min_t(u32, req->seg_len,
111724b11923SKaike Wan 			    wqe->length - req->seg_len * req->cur_seg);
111824b11923SKaike Wan 		delta = hfi1_build_tid_rdma_read_req(qp, wqe, ohdr, &bth1,
111924b11923SKaike Wan 						     &bth2, &len);
112024b11923SKaike Wan 		if (delta <= 0) {
112124b11923SKaike Wan 			/* Wait for TID space */
112224b11923SKaike Wan 			goto bail;
112324b11923SKaike Wan 		}
112424b11923SKaike Wan 		hwords += delta;
112524b11923SKaike Wan 		ss = &wpriv->ss;
112624b11923SKaike Wan 		/* Check if this is the last segment */
112724b11923SKaike Wan 		if (req->cur_seg >= req->total_segs &&
112824b11923SKaike Wan 		    ++qp->s_cur == qp->s_size)
112924b11923SKaike Wan 			qp->s_cur = 0;
113024b11923SKaike Wan 		qp->s_psn = req->s_next_psn;
11313ce5daa2SKaike Wan 		trace_hfi1_tid_req_make_req_read(qp, 0, wqe->wr.opcode,
11323ce5daa2SKaike Wan 						 wqe->psn, wqe->lpsn, req);
113324b11923SKaike Wan 		break;
1134f48ad614SDennis Dalessandro 	}
1135f48ad614SDennis Dalessandro 	qp->s_sending_hpsn = bth2;
1136f48ad614SDennis Dalessandro 	delta = delta_psn(bth2, wqe->psn);
11373c6cb20aSKaike Wan 	if (delta && delta % HFI1_PSN_CREDIT == 0 &&
11383c6cb20aSKaike Wan 	    wqe->wr.opcode != IB_WR_TID_RDMA_WRITE)
1139f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
1140f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_SEND_ONE) {
1141f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_SEND_ONE;
1142f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_WAIT_ACK;
1143f48ad614SDennis Dalessandro 		bth2 |= IB_BTH_REQ_ACK;
1144f48ad614SDennis Dalessandro 	}
1145f48ad614SDennis Dalessandro 	qp->s_len -= len;
11469636258fSMitko Haralanov 	ps->s_txreq->hdr_dwords = hwords;
1147f48ad614SDennis Dalessandro 	ps->s_txreq->sde = priv->s_sde;
1148b777f154SMitko Haralanov 	ps->s_txreq->ss = ss;
1149e922ae06SDon Hiatt 	ps->s_txreq->s_cur_size = len;
1150f48ad614SDennis Dalessandro 	hfi1_make_ruc_header(
1151f48ad614SDennis Dalessandro 		qp,
1152f48ad614SDennis Dalessandro 		ohdr,
1153f48ad614SDennis Dalessandro 		bth0 | (qp->s_state << 24),
115444e43d91SMitko Haralanov 		bth1,
1155f48ad614SDennis Dalessandro 		bth2,
1156f48ad614SDennis Dalessandro 		middle,
1157f48ad614SDennis Dalessandro 		ps);
1158f48ad614SDennis Dalessandro 	return 1;
1159f48ad614SDennis Dalessandro 
1160f48ad614SDennis Dalessandro done_free_tx:
1161f48ad614SDennis Dalessandro 	hfi1_put_txreq(ps->s_txreq);
1162f48ad614SDennis Dalessandro 	ps->s_txreq = NULL;
1163f48ad614SDennis Dalessandro 	return 1;
1164f48ad614SDennis Dalessandro 
1165f48ad614SDennis Dalessandro bail:
1166f48ad614SDennis Dalessandro 	hfi1_put_txreq(ps->s_txreq);
1167f48ad614SDennis Dalessandro 
1168f48ad614SDennis Dalessandro bail_no_tx:
1169f48ad614SDennis Dalessandro 	ps->s_txreq = NULL;
1170f48ad614SDennis Dalessandro 	qp->s_flags &= ~RVT_S_BUSY;
11713c6cb20aSKaike Wan 	/*
11723c6cb20aSKaike Wan 	 * If we didn't get a txreq, the QP will be woken up later to try
11733c6cb20aSKaike Wan 	 * again. Set the flags to indicate which work item to wake
11743c6cb20aSKaike Wan 	 * up.
11753c6cb20aSKaike Wan 	 */
11763c6cb20aSKaike Wan 	iowait_set_flag(&priv->s_iowait, IOWAIT_PENDING_IB);
1177f48ad614SDennis Dalessandro 	return 0;
1178f48ad614SDennis Dalessandro }
1179f48ad614SDennis Dalessandro 
hfi1_make_bth_aeth(struct rvt_qp * qp,struct ib_other_headers * ohdr,u32 bth0,u32 bth1)11805b6cabb0SDon Hiatt static inline void hfi1_make_bth_aeth(struct rvt_qp *qp,
11815b6cabb0SDon Hiatt 				      struct ib_other_headers *ohdr,
11825b6cabb0SDon Hiatt 				      u32 bth0, u32 bth1)
1183f48ad614SDennis Dalessandro {
1184f48ad614SDennis Dalessandro 	if (qp->r_nak_state)
1185832666c1SDon Hiatt 		ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
1186f48ad614SDennis Dalessandro 					    (qp->r_nak_state <<
1187832666c1SDon Hiatt 					     IB_AETH_CREDIT_SHIFT));
1188f48ad614SDennis Dalessandro 	else
1189696513e8SBrian Welty 		ohdr->u.aeth = rvt_compute_aeth(qp);
11905b6cabb0SDon Hiatt 
1191f48ad614SDennis Dalessandro 	ohdr->bth[0] = cpu_to_be32(bth0);
11925b6cabb0SDon Hiatt 	ohdr->bth[1] = cpu_to_be32(bth1 | qp->remote_qpn);
1193f48ad614SDennis Dalessandro 	ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
1194f48ad614SDennis Dalessandro }
1195f48ad614SDennis Dalessandro 
hfi1_queue_rc_ack(struct hfi1_packet * packet,bool is_fecn)1196bdaf96f6SSebastian Sanchez static inline void hfi1_queue_rc_ack(struct hfi1_packet *packet, bool is_fecn)
11975b6cabb0SDon Hiatt {
1198bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
1199bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp;
12005b6cabb0SDon Hiatt 	unsigned long flags;
1201f48ad614SDennis Dalessandro 
1202f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
120372f53af2SMike Marciniszyn 	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
120472f53af2SMike Marciniszyn 		goto unlock;
1205bdaf96f6SSebastian Sanchez 	ibp = rcd_to_iport(packet->rcd);
120672f53af2SMike Marciniszyn 	this_cpu_inc(*ibp->rvp.rc_qacks);
1207f48ad614SDennis Dalessandro 	qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
1208f48ad614SDennis Dalessandro 	qp->s_nak_state = qp->r_nak_state;
1209f48ad614SDennis Dalessandro 	qp->s_ack_psn = qp->r_ack_psn;
1210f48ad614SDennis Dalessandro 	if (is_fecn)
1211f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_ECN;
1212f48ad614SDennis Dalessandro 
12135b6cabb0SDon Hiatt 	/* Schedule the send tasklet. */
1214f48ad614SDennis Dalessandro 	hfi1_schedule_send(qp);
121572f53af2SMike Marciniszyn unlock:
1216f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
1217f48ad614SDennis Dalessandro }
1218f48ad614SDennis Dalessandro 
hfi1_make_rc_ack_9B(struct hfi1_packet * packet,struct hfi1_opa_header * opa_hdr,u8 sc5,bool is_fecn,u64 * pbc_flags,u32 * hwords,u32 * nwords)1219bdaf96f6SSebastian Sanchez static inline void hfi1_make_rc_ack_9B(struct hfi1_packet *packet,
12205b6cabb0SDon Hiatt 				       struct hfi1_opa_header *opa_hdr,
12215b6cabb0SDon Hiatt 				       u8 sc5, bool is_fecn,
12225b6cabb0SDon Hiatt 				       u64 *pbc_flags, u32 *hwords,
12235b6cabb0SDon Hiatt 				       u32 *nwords)
12245b6cabb0SDon Hiatt {
1225bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
1226bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
12275b6cabb0SDon Hiatt 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
12285b6cabb0SDon Hiatt 	struct ib_header *hdr = &opa_hdr->ibh;
12295b6cabb0SDon Hiatt 	struct ib_other_headers *ohdr;
12305b6cabb0SDon Hiatt 	u16 lrh0 = HFI1_LRH_BTH;
12315b6cabb0SDon Hiatt 	u16 pkey;
12325b6cabb0SDon Hiatt 	u32 bth0, bth1;
12335b6cabb0SDon Hiatt 
12345b6cabb0SDon Hiatt 	opa_hdr->hdr_type = HFI1_PKT_TYPE_9B;
12355b6cabb0SDon Hiatt 	ohdr = &hdr->u.oth;
12365b6cabb0SDon Hiatt 	/* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
12375b6cabb0SDon Hiatt 	*hwords = 6;
12385b6cabb0SDon Hiatt 
12395b6cabb0SDon Hiatt 	if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) {
12405b6cabb0SDon Hiatt 		*hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
12415b6cabb0SDon Hiatt 					 rdma_ah_read_grh(&qp->remote_ah_attr),
12425b6cabb0SDon Hiatt 					 *hwords - 2, SIZE_OF_CRC);
12435b6cabb0SDon Hiatt 		ohdr = &hdr->u.l.oth;
12445b6cabb0SDon Hiatt 		lrh0 = HFI1_LRH_GRH;
12455b6cabb0SDon Hiatt 	}
12465b6cabb0SDon Hiatt 	/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
12475b6cabb0SDon Hiatt 	*pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
12485b6cabb0SDon Hiatt 
12495b6cabb0SDon Hiatt 	/* read pkey_index w/o lock (its atomic) */
12505b6cabb0SDon Hiatt 	pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
12515b6cabb0SDon Hiatt 
12525b6cabb0SDon Hiatt 	lrh0 |= (sc5 & IB_SC_MASK) << IB_SC_SHIFT |
12535b6cabb0SDon Hiatt 		(rdma_ah_get_sl(&qp->remote_ah_attr) & IB_SL_MASK) <<
12545b6cabb0SDon Hiatt 			IB_SL_SHIFT;
12555b6cabb0SDon Hiatt 
12565b6cabb0SDon Hiatt 	hfi1_make_ib_hdr(hdr, lrh0, *hwords + SIZE_OF_CRC,
12575b6cabb0SDon Hiatt 			 opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr), 9B),
12585b6cabb0SDon Hiatt 			 ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr));
12595b6cabb0SDon Hiatt 
12605b6cabb0SDon Hiatt 	bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
12615b6cabb0SDon Hiatt 	if (qp->s_mig_state == IB_MIG_MIGRATED)
12625b6cabb0SDon Hiatt 		bth0 |= IB_BTH_MIG_REQ;
12635b6cabb0SDon Hiatt 	bth1 = (!!is_fecn) << IB_BECN_SHIFT;
126444e43d91SMitko Haralanov 	/*
126544e43d91SMitko Haralanov 	 * Inline ACKs go out without the use of the Verbs send engine, so
126644e43d91SMitko Haralanov 	 * we need to set the STL Verbs Extended bit here
126744e43d91SMitko Haralanov 	 */
126844e43d91SMitko Haralanov 	bth1 |= HFI1_CAP_IS_KSET(OPFN) << IB_BTHE_E_SHIFT;
12695b6cabb0SDon Hiatt 	hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
12705b6cabb0SDon Hiatt }
12715b6cabb0SDon Hiatt 
hfi1_make_rc_ack_16B(struct hfi1_packet * packet,struct hfi1_opa_header * opa_hdr,u8 sc5,bool is_fecn,u64 * pbc_flags,u32 * hwords,u32 * nwords)1272bdaf96f6SSebastian Sanchez static inline void hfi1_make_rc_ack_16B(struct hfi1_packet *packet,
12735b6cabb0SDon Hiatt 					struct hfi1_opa_header *opa_hdr,
12745b6cabb0SDon Hiatt 					u8 sc5, bool is_fecn,
12755b6cabb0SDon Hiatt 					u64 *pbc_flags, u32 *hwords,
12765b6cabb0SDon Hiatt 					u32 *nwords)
12775b6cabb0SDon Hiatt {
1278bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
1279bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
12805b6cabb0SDon Hiatt 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
12815b6cabb0SDon Hiatt 	struct hfi1_16b_header *hdr = &opa_hdr->opah;
12825b6cabb0SDon Hiatt 	struct ib_other_headers *ohdr;
12838935780bSDennis Dalessandro 	u32 bth0, bth1 = 0;
12845b6cabb0SDon Hiatt 	u16 len, pkey;
1285ca85bb1cSSebastian Sanchez 	bool becn = is_fecn;
12865b6cabb0SDon Hiatt 	u8 l4 = OPA_16B_L4_IB_LOCAL;
12875b6cabb0SDon Hiatt 	u8 extra_bytes;
12885b6cabb0SDon Hiatt 
12895b6cabb0SDon Hiatt 	opa_hdr->hdr_type = HFI1_PKT_TYPE_16B;
12905b6cabb0SDon Hiatt 	ohdr = &hdr->u.oth;
12915b6cabb0SDon Hiatt 	/* header size in 32-bit words 16B LRH+BTH+AETH = (16+12+4)/4 */
12925b6cabb0SDon Hiatt 	*hwords = 8;
12935b6cabb0SDon Hiatt 	extra_bytes = hfi1_get_16b_padding(*hwords << 2, 0);
12945b6cabb0SDon Hiatt 	*nwords = SIZE_OF_CRC + ((extra_bytes + SIZE_OF_LT) >> 2);
12955b6cabb0SDon Hiatt 
12965b6cabb0SDon Hiatt 	if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
12975b6cabb0SDon Hiatt 	    hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))) {
12985b6cabb0SDon Hiatt 		*hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
12995b6cabb0SDon Hiatt 					 rdma_ah_read_grh(&qp->remote_ah_attr),
13005b6cabb0SDon Hiatt 					 *hwords - 4, *nwords);
13015b6cabb0SDon Hiatt 		ohdr = &hdr->u.l.oth;
13025b6cabb0SDon Hiatt 		l4 = OPA_16B_L4_IB_GLOBAL;
13035b6cabb0SDon Hiatt 	}
13045b6cabb0SDon Hiatt 	*pbc_flags |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
13055b6cabb0SDon Hiatt 
13065b6cabb0SDon Hiatt 	/* read pkey_index w/o lock (its atomic) */
13075b6cabb0SDon Hiatt 	pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
13085b6cabb0SDon Hiatt 
13095b6cabb0SDon Hiatt 	/* Convert dwords to flits */
13105b6cabb0SDon Hiatt 	len = (*hwords + *nwords) >> 1;
13115b6cabb0SDon Hiatt 
13123cafad43SDon Hiatt 	hfi1_make_16b_hdr(hdr, ppd->lid |
13133cafad43SDon Hiatt 			  (rdma_ah_get_path_bits(&qp->remote_ah_attr) &
13143cafad43SDon Hiatt 			  ((1 << ppd->lmc) - 1)),
13155b6cabb0SDon Hiatt 			  opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr),
13163cafad43SDon Hiatt 				      16B), len, pkey, becn, 0, l4, sc5);
13175b6cabb0SDon Hiatt 
13185b6cabb0SDon Hiatt 	bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
13195b6cabb0SDon Hiatt 	bth0 |= extra_bytes << 20;
13205b6cabb0SDon Hiatt 	if (qp->s_mig_state == IB_MIG_MIGRATED)
13215b6cabb0SDon Hiatt 		bth1 = OPA_BTH_MIG_REQ;
13225b6cabb0SDon Hiatt 	hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
13235b6cabb0SDon Hiatt }
13245b6cabb0SDon Hiatt 
1325bdaf96f6SSebastian Sanchez typedef void (*hfi1_make_rc_ack)(struct hfi1_packet *packet,
13265b6cabb0SDon Hiatt 				 struct hfi1_opa_header *opa_hdr,
13275b6cabb0SDon Hiatt 				 u8 sc5, bool is_fecn,
13285b6cabb0SDon Hiatt 				 u64 *pbc_flags, u32 *hwords,
13295b6cabb0SDon Hiatt 				 u32 *nwords);
13305b6cabb0SDon Hiatt 
13315b6cabb0SDon Hiatt /* We support only two types - 9B and 16B for now */
13325b6cabb0SDon Hiatt static const hfi1_make_rc_ack hfi1_make_rc_ack_tbl[2] = {
13335b6cabb0SDon Hiatt 	[HFI1_PKT_TYPE_9B] = &hfi1_make_rc_ack_9B,
13345b6cabb0SDon Hiatt 	[HFI1_PKT_TYPE_16B] = &hfi1_make_rc_ack_16B
13355b6cabb0SDon Hiatt };
13365b6cabb0SDon Hiatt 
1337c2a54b68SLee Jones /*
13385b6cabb0SDon Hiatt  * hfi1_send_rc_ack - Construct an ACK packet and send it
13395b6cabb0SDon Hiatt  *
13405b6cabb0SDon Hiatt  * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
13415b6cabb0SDon Hiatt  * Note that RDMA reads and atomics are handled in the
13425b6cabb0SDon Hiatt  * send side QP state and send engine.
13435b6cabb0SDon Hiatt  */
hfi1_send_rc_ack(struct hfi1_packet * packet,bool is_fecn)1344bdaf96f6SSebastian Sanchez void hfi1_send_rc_ack(struct hfi1_packet *packet, bool is_fecn)
13455b6cabb0SDon Hiatt {
1346bdaf96f6SSebastian Sanchez 	struct hfi1_ctxtdata *rcd = packet->rcd;
1347bdaf96f6SSebastian Sanchez 	struct rvt_qp *qp = packet->qp;
13485b6cabb0SDon Hiatt 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
13495b6cabb0SDon Hiatt 	struct hfi1_qp_priv *priv = qp->priv;
13505b6cabb0SDon Hiatt 	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
13515b6cabb0SDon Hiatt 	u8 sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
13525b6cabb0SDon Hiatt 	u64 pbc, pbc_flags = 0;
13535b6cabb0SDon Hiatt 	u32 hwords = 0;
13545b6cabb0SDon Hiatt 	u32 nwords = 0;
13555b6cabb0SDon Hiatt 	u32 plen;
13565b6cabb0SDon Hiatt 	struct pio_buf *pbuf;
13575b6cabb0SDon Hiatt 	struct hfi1_opa_header opa_hdr;
13585b6cabb0SDon Hiatt 
13595b6cabb0SDon Hiatt 	/* clear the defer count */
13605b6cabb0SDon Hiatt 	qp->r_adefered = 0;
13615b6cabb0SDon Hiatt 
13625b6cabb0SDon Hiatt 	/* Don't send ACK or NAK if a RDMA read or atomic is pending. */
13635b6cabb0SDon Hiatt 	if (qp->s_flags & RVT_S_RESP_PENDING) {
1364bdaf96f6SSebastian Sanchez 		hfi1_queue_rc_ack(packet, is_fecn);
13655b6cabb0SDon Hiatt 		return;
13665b6cabb0SDon Hiatt 	}
13675b6cabb0SDon Hiatt 
13685b6cabb0SDon Hiatt 	/* Ensure s_rdma_ack_cnt changes are committed */
13695b6cabb0SDon Hiatt 	if (qp->s_rdma_ack_cnt) {
1370bdaf96f6SSebastian Sanchez 		hfi1_queue_rc_ack(packet, is_fecn);
13715b6cabb0SDon Hiatt 		return;
13725b6cabb0SDon Hiatt 	}
13735b6cabb0SDon Hiatt 
13745b6cabb0SDon Hiatt 	/* Don't try to send ACKs if the link isn't ACTIVE */
13755b6cabb0SDon Hiatt 	if (driver_lstate(ppd) != IB_PORT_ACTIVE)
13765b6cabb0SDon Hiatt 		return;
13775b6cabb0SDon Hiatt 
13785b6cabb0SDon Hiatt 	/* Make the appropriate header */
1379bdaf96f6SSebastian Sanchez 	hfi1_make_rc_ack_tbl[priv->hdr_type](packet, &opa_hdr, sc5, is_fecn,
13805b6cabb0SDon Hiatt 					     &pbc_flags, &hwords, &nwords);
13815b6cabb0SDon Hiatt 
13825b6cabb0SDon Hiatt 	plen = 2 /* PBC */ + hwords + nwords;
13835b6cabb0SDon Hiatt 	pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps,
13845b6cabb0SDon Hiatt 			 sc_to_vlt(ppd->dd, sc5), plen);
13855b6cabb0SDon Hiatt 	pbuf = sc_buffer_alloc(rcd->sc, plen, NULL, NULL);
1386942a8993SMike Marciniszyn 	if (IS_ERR_OR_NULL(pbuf)) {
13875b6cabb0SDon Hiatt 		/*
13885b6cabb0SDon Hiatt 		 * We have no room to send at the moment.  Pass
13895b6cabb0SDon Hiatt 		 * responsibility for sending the ACK to the send engine
13905b6cabb0SDon Hiatt 		 * so that when enough buffer space becomes available,
13915b6cabb0SDon Hiatt 		 * the ACK is sent ahead of other outgoing packets.
13925b6cabb0SDon Hiatt 		 */
1393bdaf96f6SSebastian Sanchez 		hfi1_queue_rc_ack(packet, is_fecn);
13945b6cabb0SDon Hiatt 		return;
13955b6cabb0SDon Hiatt 	}
13965b6cabb0SDon Hiatt 	trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
13975b6cabb0SDon Hiatt 			       &opa_hdr, ib_is_sc5(sc5));
13985b6cabb0SDon Hiatt 
13995b6cabb0SDon Hiatt 	/* write the pbc and data */
14005b6cabb0SDon Hiatt 	ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc,
14015b6cabb0SDon Hiatt 				 (priv->hdr_type == HFI1_PKT_TYPE_9B ?
14025b6cabb0SDon Hiatt 				 (void *)&opa_hdr.ibh :
14035b6cabb0SDon Hiatt 				 (void *)&opa_hdr.opah), hwords);
14045b6cabb0SDon Hiatt 	return;
14055b6cabb0SDon Hiatt }
14065b6cabb0SDon Hiatt 
1407f48ad614SDennis Dalessandro /**
1408b126078eSKaike Wan  * update_num_rd_atomic - update the qp->s_num_rd_atomic
1409b126078eSKaike Wan  * @qp: the QP
1410b126078eSKaike Wan  * @psn: the packet sequence number to restart at
1411b126078eSKaike Wan  * @wqe: the wqe
1412b126078eSKaike Wan  *
1413b126078eSKaike Wan  * This is called from reset_psn() to update qp->s_num_rd_atomic
1414b126078eSKaike Wan  * for the current wqe.
1415b126078eSKaike Wan  * Called at interrupt level with the QP s_lock held.
1416b126078eSKaike Wan  */
update_num_rd_atomic(struct rvt_qp * qp,u32 psn,struct rvt_swqe * wqe)1417b126078eSKaike Wan static void update_num_rd_atomic(struct rvt_qp *qp, u32 psn,
1418b126078eSKaike Wan 				 struct rvt_swqe *wqe)
1419b126078eSKaike Wan {
1420b126078eSKaike Wan 	u32 opcode = wqe->wr.opcode;
1421b126078eSKaike Wan 
1422b126078eSKaike Wan 	if (opcode == IB_WR_RDMA_READ ||
1423b126078eSKaike Wan 	    opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1424b126078eSKaike Wan 	    opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1425b126078eSKaike Wan 		qp->s_num_rd_atomic++;
1426b126078eSKaike Wan 	} else if (opcode == IB_WR_TID_RDMA_READ) {
1427b126078eSKaike Wan 		struct tid_rdma_request *req = wqe_to_tid_req(wqe);
1428b126078eSKaike Wan 		struct hfi1_qp_priv *priv = qp->priv;
1429b126078eSKaike Wan 
1430b126078eSKaike Wan 		if (cmp_psn(psn, wqe->lpsn) <= 0) {
1431b126078eSKaike Wan 			u32 cur_seg;
1432b126078eSKaike Wan 
1433b126078eSKaike Wan 			cur_seg = (psn - wqe->psn) / priv->pkts_ps;
1434b126078eSKaike Wan 			req->ack_pending = cur_seg - req->comp_seg;
1435b126078eSKaike Wan 			priv->pending_tid_r_segs += req->ack_pending;
1436b126078eSKaike Wan 			qp->s_num_rd_atomic += req->ack_pending;
1437c05fc156SKaike Wan 			trace_hfi1_tid_req_update_num_rd_atomic(qp, 0,
1438c05fc156SKaike Wan 								wqe->wr.opcode,
1439c05fc156SKaike Wan 								wqe->psn,
1440c05fc156SKaike Wan 								wqe->lpsn,
1441c05fc156SKaike Wan 								req);
1442b126078eSKaike Wan 		} else {
1443b126078eSKaike Wan 			priv->pending_tid_r_segs += req->total_segs;
1444b126078eSKaike Wan 			qp->s_num_rd_atomic += req->total_segs;
1445b126078eSKaike Wan 		}
1446b126078eSKaike Wan 	}
1447b126078eSKaike Wan }
1448b126078eSKaike Wan 
1449b126078eSKaike Wan /**
1450f48ad614SDennis Dalessandro  * reset_psn - reset the QP state to send starting from PSN
1451f48ad614SDennis Dalessandro  * @qp: the QP
1452f48ad614SDennis Dalessandro  * @psn: the packet sequence number to restart at
1453f48ad614SDennis Dalessandro  *
1454f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an incoming RC ACK
1455f48ad614SDennis Dalessandro  * for the given QP.
1456f48ad614SDennis Dalessandro  * Called at interrupt level with the QP s_lock held.
1457f48ad614SDennis Dalessandro  */
reset_psn(struct rvt_qp * qp,u32 psn)1458f48ad614SDennis Dalessandro static void reset_psn(struct rvt_qp *qp, u32 psn)
1459f48ad614SDennis Dalessandro {
1460f48ad614SDennis Dalessandro 	u32 n = qp->s_acked;
1461f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
1462f48ad614SDennis Dalessandro 	u32 opcode;
1463b126078eSKaike Wan 	struct hfi1_qp_priv *priv = qp->priv;
1464f48ad614SDennis Dalessandro 
146568e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1466f48ad614SDennis Dalessandro 	qp->s_cur = n;
1467b126078eSKaike Wan 	priv->pending_tid_r_segs = 0;
14683c6cb20aSKaike Wan 	priv->pending_tid_w_resp = 0;
1469b126078eSKaike Wan 	qp->s_num_rd_atomic = 0;
1470f48ad614SDennis Dalessandro 
1471f48ad614SDennis Dalessandro 	/*
1472f48ad614SDennis Dalessandro 	 * If we are starting the request from the beginning,
1473f48ad614SDennis Dalessandro 	 * let the normal send code handle initialization.
1474f48ad614SDennis Dalessandro 	 */
1475f48ad614SDennis Dalessandro 	if (cmp_psn(psn, wqe->psn) <= 0) {
1476f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_LAST);
1477f48ad614SDennis Dalessandro 		goto done;
1478f48ad614SDennis Dalessandro 	}
1479b126078eSKaike Wan 	update_num_rd_atomic(qp, psn, wqe);
1480f48ad614SDennis Dalessandro 
1481f48ad614SDennis Dalessandro 	/* Find the work request opcode corresponding to the given PSN. */
1482f48ad614SDennis Dalessandro 	for (;;) {
1483f48ad614SDennis Dalessandro 		int diff;
1484f48ad614SDennis Dalessandro 
1485f48ad614SDennis Dalessandro 		if (++n == qp->s_size)
1486f48ad614SDennis Dalessandro 			n = 0;
1487f48ad614SDennis Dalessandro 		if (n == qp->s_tail)
1488f48ad614SDennis Dalessandro 			break;
1489f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, n);
1490f48ad614SDennis Dalessandro 		diff = cmp_psn(psn, wqe->psn);
1491b126078eSKaike Wan 		if (diff < 0) {
1492b126078eSKaike Wan 			/* Point wqe back to the previous one*/
1493b126078eSKaike Wan 			wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
1494f48ad614SDennis Dalessandro 			break;
1495b126078eSKaike Wan 		}
1496f48ad614SDennis Dalessandro 		qp->s_cur = n;
1497f48ad614SDennis Dalessandro 		/*
1498f48ad614SDennis Dalessandro 		 * If we are starting the request from the beginning,
1499f48ad614SDennis Dalessandro 		 * let the normal send code handle initialization.
1500f48ad614SDennis Dalessandro 		 */
1501f48ad614SDennis Dalessandro 		if (diff == 0) {
1502f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
1503f48ad614SDennis Dalessandro 			goto done;
1504f48ad614SDennis Dalessandro 		}
1505b126078eSKaike Wan 
1506b126078eSKaike Wan 		update_num_rd_atomic(qp, psn, wqe);
1507f48ad614SDennis Dalessandro 	}
1508b126078eSKaike Wan 	opcode = wqe->wr.opcode;
1509f48ad614SDennis Dalessandro 
1510f48ad614SDennis Dalessandro 	/*
1511f48ad614SDennis Dalessandro 	 * Set the state to restart in the middle of a request.
1512f48ad614SDennis Dalessandro 	 * Don't change the s_sge, s_cur_sge, or s_cur_size.
1513f48ad614SDennis Dalessandro 	 * See hfi1_make_rc_req().
1514f48ad614SDennis Dalessandro 	 */
1515f48ad614SDennis Dalessandro 	switch (opcode) {
1516f48ad614SDennis Dalessandro 	case IB_WR_SEND:
1517f48ad614SDennis Dalessandro 	case IB_WR_SEND_WITH_IMM:
1518f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
1519f48ad614SDennis Dalessandro 		break;
1520f48ad614SDennis Dalessandro 
1521f48ad614SDennis Dalessandro 	case IB_WR_RDMA_WRITE:
1522f48ad614SDennis Dalessandro 	case IB_WR_RDMA_WRITE_WITH_IMM:
1523f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
1524f48ad614SDennis Dalessandro 		break;
1525f48ad614SDennis Dalessandro 
15263c6cb20aSKaike Wan 	case IB_WR_TID_RDMA_WRITE:
15273c6cb20aSKaike Wan 		qp->s_state = TID_OP(WRITE_RESP);
15283c6cb20aSKaike Wan 		break;
15293c6cb20aSKaike Wan 
1530f48ad614SDennis Dalessandro 	case IB_WR_RDMA_READ:
1531f48ad614SDennis Dalessandro 		qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
1532f48ad614SDennis Dalessandro 		break;
1533f48ad614SDennis Dalessandro 
1534b126078eSKaike Wan 	case IB_WR_TID_RDMA_READ:
1535b126078eSKaike Wan 		qp->s_state = TID_OP(READ_RESP);
1536b126078eSKaike Wan 		break;
1537b126078eSKaike Wan 
1538f48ad614SDennis Dalessandro 	default:
1539f48ad614SDennis Dalessandro 		/*
1540f48ad614SDennis Dalessandro 		 * This case shouldn't happen since its only
1541f48ad614SDennis Dalessandro 		 * one PSN per req.
1542f48ad614SDennis Dalessandro 		 */
1543f48ad614SDennis Dalessandro 		qp->s_state = OP(SEND_LAST);
1544f48ad614SDennis Dalessandro 	}
1545f48ad614SDennis Dalessandro done:
1546a0b34f75SKaike Wan 	priv->s_flags &= ~HFI1_S_TID_WAIT_INTERLCK;
1547f48ad614SDennis Dalessandro 	qp->s_psn = psn;
1548f48ad614SDennis Dalessandro 	/*
1549f48ad614SDennis Dalessandro 	 * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
1550ca00c62bSDennis Dalessandro 	 * asynchronously before the send engine can get scheduled.
1551f48ad614SDennis Dalessandro 	 * Doing it in hfi1_make_rc_req() is too late.
1552f48ad614SDennis Dalessandro 	 */
1553f48ad614SDennis Dalessandro 	if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
1554f48ad614SDennis Dalessandro 	    (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
1555f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_WAIT_PSN;
15562e2ba09eSMike Marciniszyn 	qp->s_flags &= ~HFI1_S_AHG_VALID;
15573ce5daa2SKaike Wan 	trace_hfi1_sender_reset_psn(qp);
1558f48ad614SDennis Dalessandro }
1559f48ad614SDennis Dalessandro 
1560f48ad614SDennis Dalessandro /*
1561f48ad614SDennis Dalessandro  * Back up requester to resend the last un-ACKed request.
1562f48ad614SDennis Dalessandro  * The QP r_lock and s_lock should be held and interrupts disabled.
1563f48ad614SDennis Dalessandro  */
hfi1_restart_rc(struct rvt_qp * qp,u32 psn,int wait)156456acbbfbSVenkata Sandeep Dhanalakota void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
1565f48ad614SDennis Dalessandro {
156648a615dcSKaike Wan 	struct hfi1_qp_priv *priv = qp->priv;
1567f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1568f48ad614SDennis Dalessandro 	struct hfi1_ibport *ibp;
1569f48ad614SDennis Dalessandro 
157068e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->r_lock);
157168e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
15723ce5daa2SKaike Wan 	trace_hfi1_sender_restart_rc(qp);
1573f48ad614SDennis Dalessandro 	if (qp->s_retry == 0) {
1574f48ad614SDennis Dalessandro 		if (qp->s_mig_state == IB_MIG_ARMED) {
1575f48ad614SDennis Dalessandro 			hfi1_migrate_qp(qp);
1576f48ad614SDennis Dalessandro 			qp->s_retry = qp->s_retry_cnt;
1577f48ad614SDennis Dalessandro 		} else if (qp->s_last == qp->s_acked) {
157848a615dcSKaike Wan 			/*
157948a615dcSKaike Wan 			 * We need special handling for the OPFN request WQEs as
158048a615dcSKaike Wan 			 * they are not allowed to generate real user errors
158148a615dcSKaike Wan 			 */
158248a615dcSKaike Wan 			if (wqe->wr.opcode == IB_WR_OPFN) {
158348a615dcSKaike Wan 				struct hfi1_ibport *ibp =
158448a615dcSKaike Wan 					to_iport(qp->ibqp.device, qp->port_num);
158548a615dcSKaike Wan 				/*
158648a615dcSKaike Wan 				 * Call opfn_conn_reply() with capcode and
158748a615dcSKaike Wan 				 * remaining data as 0 to close out the
158848a615dcSKaike Wan 				 * current request
158948a615dcSKaike Wan 				 */
159048a615dcSKaike Wan 				opfn_conn_reply(qp, priv->opfn.curr);
159148a615dcSKaike Wan 				wqe = do_rc_completion(qp, wqe, ibp);
159248a615dcSKaike Wan 				qp->s_flags &= ~RVT_S_WAIT_ACK;
159348a615dcSKaike Wan 			} else {
1594a05c9bdcSKaike Wan 				trace_hfi1_tid_write_sender_restart_rc(qp, 0);
1595b126078eSKaike Wan 				if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) {
1596b126078eSKaike Wan 					struct tid_rdma_request *req;
1597b126078eSKaike Wan 
1598b126078eSKaike Wan 					req = wqe_to_tid_req(wqe);
1599b126078eSKaike Wan 					hfi1_kern_exp_rcv_clear_all(req);
1600b126078eSKaike Wan 					hfi1_kern_clear_hw_flow(priv->rcd, qp);
1601b126078eSKaike Wan 				}
1602b126078eSKaike Wan 
160324b11923SKaike Wan 				hfi1_trdma_send_complete(qp, wqe,
160448a615dcSKaike Wan 							 IB_WC_RETRY_EXC_ERR);
1605f48ad614SDennis Dalessandro 				rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
160648a615dcSKaike Wan 			}
1607f48ad614SDennis Dalessandro 			return;
1608f48ad614SDennis Dalessandro 		} else { /* need to handle delayed completion */
1609f48ad614SDennis Dalessandro 			return;
1610f48ad614SDennis Dalessandro 		}
1611f48ad614SDennis Dalessandro 	} else {
1612f48ad614SDennis Dalessandro 		qp->s_retry--;
1613f48ad614SDennis Dalessandro 	}
1614f48ad614SDennis Dalessandro 
1615f48ad614SDennis Dalessandro 	ibp = to_iport(qp->ibqp.device, qp->port_num);
1616b126078eSKaike Wan 	if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1617b126078eSKaike Wan 	    wqe->wr.opcode == IB_WR_TID_RDMA_READ)
1618f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends++;
1619f48ad614SDennis Dalessandro 	else
1620f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
1621f48ad614SDennis Dalessandro 
1622f48ad614SDennis Dalessandro 	qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
1623f48ad614SDennis Dalessandro 			 RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
16243c6cb20aSKaike Wan 			 RVT_S_WAIT_ACK | HFI1_S_WAIT_TID_RESP);
1625f48ad614SDennis Dalessandro 	if (wait)
1626f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_SEND_ONE;
1627f48ad614SDennis Dalessandro 	reset_psn(qp, psn);
1628f48ad614SDennis Dalessandro }
1629f48ad614SDennis Dalessandro 
1630f48ad614SDennis Dalessandro /*
1631f48ad614SDennis Dalessandro  * Set qp->s_sending_psn to the next PSN after the given one.
16323c6cb20aSKaike Wan  * This would be psn+1 except when RDMA reads or TID RDMA ops
16333c6cb20aSKaike Wan  * are present.
1634f48ad614SDennis Dalessandro  */
reset_sending_psn(struct rvt_qp * qp,u32 psn)1635f48ad614SDennis Dalessandro static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
1636f48ad614SDennis Dalessandro {
1637f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1638f48ad614SDennis Dalessandro 	u32 n = qp->s_last;
1639f48ad614SDennis Dalessandro 
164068e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1641f48ad614SDennis Dalessandro 	/* Find the work request corresponding to the given PSN. */
1642f48ad614SDennis Dalessandro 	for (;;) {
1643f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, n);
1644f48ad614SDennis Dalessandro 		if (cmp_psn(psn, wqe->lpsn) <= 0) {
164524b11923SKaike Wan 			if (wqe->wr.opcode == IB_WR_RDMA_READ ||
16463c6cb20aSKaike Wan 			    wqe->wr.opcode == IB_WR_TID_RDMA_READ ||
16473c6cb20aSKaike Wan 			    wqe->wr.opcode == IB_WR_TID_RDMA_WRITE)
1648f48ad614SDennis Dalessandro 				qp->s_sending_psn = wqe->lpsn + 1;
1649f48ad614SDennis Dalessandro 			else
1650f48ad614SDennis Dalessandro 				qp->s_sending_psn = psn + 1;
1651f48ad614SDennis Dalessandro 			break;
1652f48ad614SDennis Dalessandro 		}
1653f48ad614SDennis Dalessandro 		if (++n == qp->s_size)
1654f48ad614SDennis Dalessandro 			n = 0;
1655f48ad614SDennis Dalessandro 		if (n == qp->s_tail)
1656f48ad614SDennis Dalessandro 			break;
1657f48ad614SDennis Dalessandro 	}
1658f48ad614SDennis Dalessandro }
1659f48ad614SDennis Dalessandro 
16604bb02e95SMike Marciniszyn /**
16614bb02e95SMike Marciniszyn  * hfi1_rc_verbs_aborted - handle abort status
16624bb02e95SMike Marciniszyn  * @qp: the QP
16634bb02e95SMike Marciniszyn  * @opah: the opa header
16644bb02e95SMike Marciniszyn  *
16654bb02e95SMike Marciniszyn  * This code modifies both ACK bit in BTH[2]
16664bb02e95SMike Marciniszyn  * and the s_flags to go into send one mode.
16674bb02e95SMike Marciniszyn  *
16684bb02e95SMike Marciniszyn  * This serves to throttle the send engine to only
16694bb02e95SMike Marciniszyn  * send a single packet in the likely case the
16704bb02e95SMike Marciniszyn  * a link has gone down.
16714bb02e95SMike Marciniszyn  */
hfi1_rc_verbs_aborted(struct rvt_qp * qp,struct hfi1_opa_header * opah)16724bb02e95SMike Marciniszyn void hfi1_rc_verbs_aborted(struct rvt_qp *qp, struct hfi1_opa_header *opah)
16734bb02e95SMike Marciniszyn {
16744bb02e95SMike Marciniszyn 	struct ib_other_headers *ohdr = hfi1_get_rc_ohdr(opah);
16754bb02e95SMike Marciniszyn 	u8 opcode = ib_bth_get_opcode(ohdr);
16764bb02e95SMike Marciniszyn 	u32 psn;
16774bb02e95SMike Marciniszyn 
16784bb02e95SMike Marciniszyn 	/* ignore responses */
16794bb02e95SMike Marciniszyn 	if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
16804bb02e95SMike Marciniszyn 	     opcode <= OP(ATOMIC_ACKNOWLEDGE)) ||
16814bb02e95SMike Marciniszyn 	    opcode == TID_OP(READ_RESP) ||
16824bb02e95SMike Marciniszyn 	    opcode == TID_OP(WRITE_RESP))
16834bb02e95SMike Marciniszyn 		return;
16844bb02e95SMike Marciniszyn 
16854bb02e95SMike Marciniszyn 	psn = ib_bth_get_psn(ohdr) | IB_BTH_REQ_ACK;
16864bb02e95SMike Marciniszyn 	ohdr->bth[2] = cpu_to_be32(psn);
16874bb02e95SMike Marciniszyn 	qp->s_flags |= RVT_S_SEND_ONE;
16884bb02e95SMike Marciniszyn }
16894bb02e95SMike Marciniszyn 
1690f48ad614SDennis Dalessandro /*
1691f48ad614SDennis Dalessandro  * This should be called with the QP s_lock held and interrupts disabled.
1692f48ad614SDennis Dalessandro  */
hfi1_rc_send_complete(struct rvt_qp * qp,struct hfi1_opa_header * opah)169330e07416SDon Hiatt void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah)
1694f48ad614SDennis Dalessandro {
1695261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr;
16965b6cabb0SDon Hiatt 	struct hfi1_qp_priv *priv = qp->priv;
1697f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
16983c6cb20aSKaike Wan 	u32 opcode, head, tail;
1699f48ad614SDennis Dalessandro 	u32 psn;
17003c6cb20aSKaike Wan 	struct tid_rdma_request *req;
1701f48ad614SDennis Dalessandro 
170268e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1703f9215b5eSMike Marciniszyn 	if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
1704f48ad614SDennis Dalessandro 		return;
1705f48ad614SDennis Dalessandro 
17069755f724SMike Marciniszyn 	ohdr = hfi1_get_rc_ohdr(opah);
1707cb427057SDon Hiatt 	opcode = ib_bth_get_opcode(ohdr);
170824b11923SKaike Wan 	if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
170924b11923SKaike Wan 	     opcode <= OP(ATOMIC_ACKNOWLEDGE)) ||
17103c6cb20aSKaike Wan 	    opcode == TID_OP(READ_RESP) ||
17113c6cb20aSKaike Wan 	    opcode == TID_OP(WRITE_RESP)) {
1712f48ad614SDennis Dalessandro 		WARN_ON(!qp->s_rdma_ack_cnt);
1713f48ad614SDennis Dalessandro 		qp->s_rdma_ack_cnt--;
1714f48ad614SDennis Dalessandro 		return;
1715f48ad614SDennis Dalessandro 	}
1716f48ad614SDennis Dalessandro 
17177dafbab3SDon Hiatt 	psn = ib_bth_get_psn(ohdr);
17183c6cb20aSKaike Wan 	/*
17193c6cb20aSKaike Wan 	 * Don't attempt to reset the sending PSN for packets in the
17203c6cb20aSKaike Wan 	 * KDETH PSN space since the PSN does not match anything.
17213c6cb20aSKaike Wan 	 */
17223c6cb20aSKaike Wan 	if (opcode != TID_OP(WRITE_DATA) &&
17233c6cb20aSKaike Wan 	    opcode != TID_OP(WRITE_DATA_LAST) &&
17243c6cb20aSKaike Wan 	    opcode != TID_OP(ACK) && opcode != TID_OP(RESYNC))
1725f48ad614SDennis Dalessandro 		reset_sending_psn(qp, psn);
1726f48ad614SDennis Dalessandro 
17273c6cb20aSKaike Wan 	/* Handle TID RDMA WRITE packets differently */
17283c6cb20aSKaike Wan 	if (opcode >= TID_OP(WRITE_REQ) &&
17293c6cb20aSKaike Wan 	    opcode <= TID_OP(WRITE_DATA_LAST)) {
17303c6cb20aSKaike Wan 		head = priv->s_tid_head;
17313c6cb20aSKaike Wan 		tail = priv->s_tid_cur;
17323c6cb20aSKaike Wan 		/*
17333c6cb20aSKaike Wan 		 * s_tid_cur is set to s_tid_head in the case, where
17343c6cb20aSKaike Wan 		 * a new TID RDMA request is being started and all
17353c6cb20aSKaike Wan 		 * previous ones have been completed.
17363c6cb20aSKaike Wan 		 * Therefore, we need to do a secondary check in order
17373c6cb20aSKaike Wan 		 * to properly determine whether we should start the
17383c6cb20aSKaike Wan 		 * RC timer.
17393c6cb20aSKaike Wan 		 */
17403c6cb20aSKaike Wan 		wqe = rvt_get_swqe_ptr(qp, tail);
17413c6cb20aSKaike Wan 		req = wqe_to_tid_req(wqe);
17423c6cb20aSKaike Wan 		if (head == tail && req->comp_seg < req->total_segs) {
17433c6cb20aSKaike Wan 			if (tail == 0)
17443c6cb20aSKaike Wan 				tail = qp->s_size - 1;
17453c6cb20aSKaike Wan 			else
17463c6cb20aSKaike Wan 				tail -= 1;
17473c6cb20aSKaike Wan 		}
17483c6cb20aSKaike Wan 	} else {
17493c6cb20aSKaike Wan 		head = qp->s_tail;
17503c6cb20aSKaike Wan 		tail = qp->s_acked;
17513c6cb20aSKaike Wan 	}
17523c6cb20aSKaike Wan 
1753f48ad614SDennis Dalessandro 	/*
1754f48ad614SDennis Dalessandro 	 * Start timer after a packet requesting an ACK has been sent and
1755f48ad614SDennis Dalessandro 	 * there are still requests that haven't been acked.
1756f48ad614SDennis Dalessandro 	 */
17573c6cb20aSKaike Wan 	if ((psn & IB_BTH_REQ_ACK) && tail != head &&
17583c6cb20aSKaike Wan 	    opcode != TID_OP(WRITE_DATA) && opcode != TID_OP(WRITE_DATA_LAST) &&
17593c6cb20aSKaike Wan 	    opcode != TID_OP(RESYNC) &&
1760f48ad614SDennis Dalessandro 	    !(qp->s_flags &
1761f48ad614SDennis Dalessandro 	      (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
176224b11923SKaike Wan 	    (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) {
176324b11923SKaike Wan 		if (opcode == TID_OP(READ_REQ))
176424b11923SKaike Wan 			rvt_add_retry_timer_ext(qp, priv->timeout_shift);
176524b11923SKaike Wan 		else
176656acbbfbSVenkata Sandeep Dhanalakota 			rvt_add_retry_timer(qp);
176724b11923SKaike Wan 	}
1768f48ad614SDennis Dalessandro 
17693c6cb20aSKaike Wan 	/* Start TID RDMA ACK timer */
17703c6cb20aSKaike Wan 	if ((opcode == TID_OP(WRITE_DATA) ||
17713c6cb20aSKaike Wan 	     opcode == TID_OP(WRITE_DATA_LAST) ||
17723c6cb20aSKaike Wan 	     opcode == TID_OP(RESYNC)) &&
17733c6cb20aSKaike Wan 	    (psn & IB_BTH_REQ_ACK) &&
17743c6cb20aSKaike Wan 	    !(priv->s_flags & HFI1_S_TID_RETRY_TIMER) &&
17753c6cb20aSKaike Wan 	    (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) {
17763c6cb20aSKaike Wan 		/*
17773c6cb20aSKaike Wan 		 * The TID RDMA ACK packet could be received before this
17783c6cb20aSKaike Wan 		 * function is called. Therefore, add the timer only if TID
17793c6cb20aSKaike Wan 		 * RDMA ACK packets are actually pending.
17803c6cb20aSKaike Wan 		 */
17813c6cb20aSKaike Wan 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
17823c6cb20aSKaike Wan 		req = wqe_to_tid_req(wqe);
17833c6cb20aSKaike Wan 		if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE &&
17843c6cb20aSKaike Wan 		    req->ack_seg < req->cur_seg)
17853c6cb20aSKaike Wan 			hfi1_add_tid_retry_timer(qp);
17863c6cb20aSKaike Wan 	}
17873c6cb20aSKaike Wan 
1788f48ad614SDennis Dalessandro 	while (qp->s_last != qp->s_acked) {
1789f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_last);
1790f48ad614SDennis Dalessandro 		if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1791f48ad614SDennis Dalessandro 		    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1792f48ad614SDennis Dalessandro 			break;
179324b11923SKaike Wan 		trdma_clean_swqe(qp, wqe);
17944a9ceb7dSMike Marciniszyn 		trace_hfi1_qp_send_completion(qp, wqe, qp->s_last);
17954a9ceb7dSMike Marciniszyn 		rvt_qp_complete_swqe(qp,
179643a474aaSMike Marciniszyn 				     wqe,
179743a474aaSMike Marciniszyn 				     ib_hfi1_wc_opcode[wqe->wr.opcode],
179843a474aaSMike Marciniszyn 				     IB_WC_SUCCESS);
1799f48ad614SDennis Dalessandro 	}
1800f48ad614SDennis Dalessandro 	/*
1801f48ad614SDennis Dalessandro 	 * If we were waiting for sends to complete before re-sending,
1802f48ad614SDennis Dalessandro 	 * and they are now complete, restart sending.
1803f48ad614SDennis Dalessandro 	 */
1804462b6b21SSebastian Sanchez 	trace_hfi1_sendcomplete(qp, psn);
1805f48ad614SDennis Dalessandro 	if (qp->s_flags & RVT_S_WAIT_PSN &&
1806f48ad614SDennis Dalessandro 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1807f48ad614SDennis Dalessandro 		qp->s_flags &= ~RVT_S_WAIT_PSN;
1808f48ad614SDennis Dalessandro 		qp->s_sending_psn = qp->s_psn;
1809f48ad614SDennis Dalessandro 		qp->s_sending_hpsn = qp->s_psn - 1;
1810f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
1811f48ad614SDennis Dalessandro 	}
1812f48ad614SDennis Dalessandro }
1813f48ad614SDennis Dalessandro 
update_last_psn(struct rvt_qp * qp,u32 psn)1814f48ad614SDennis Dalessandro static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
1815f48ad614SDennis Dalessandro {
1816f48ad614SDennis Dalessandro 	qp->s_last_psn = psn;
1817f48ad614SDennis Dalessandro }
1818f48ad614SDennis Dalessandro 
1819f48ad614SDennis Dalessandro /*
1820f48ad614SDennis Dalessandro  * Generate a SWQE completion.
1821f48ad614SDennis Dalessandro  * This is similar to hfi1_send_complete but has to check to be sure
1822f48ad614SDennis Dalessandro  * that the SGEs are not being referenced if the SWQE is being resent.
1823f48ad614SDennis Dalessandro  */
do_rc_completion(struct rvt_qp * qp,struct rvt_swqe * wqe,struct hfi1_ibport * ibp)1824385156c5SKaike Wan struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
1825f48ad614SDennis Dalessandro 				  struct rvt_swqe *wqe,
1826f48ad614SDennis Dalessandro 				  struct hfi1_ibport *ibp)
1827f48ad614SDennis Dalessandro {
1828a0b34f75SKaike Wan 	struct hfi1_qp_priv *priv = qp->priv;
1829a0b34f75SKaike Wan 
183068e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1831f48ad614SDennis Dalessandro 	/*
1832f48ad614SDennis Dalessandro 	 * Don't decrement refcount and don't generate a
1833f48ad614SDennis Dalessandro 	 * completion if the SWQE is being resent until the send
1834f48ad614SDennis Dalessandro 	 * is finished.
1835f48ad614SDennis Dalessandro 	 */
18363ce5daa2SKaike Wan 	trace_hfi1_rc_completion(qp, wqe->lpsn);
1837f48ad614SDennis Dalessandro 	if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
1838f48ad614SDennis Dalessandro 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
183924b11923SKaike Wan 		trdma_clean_swqe(qp, wqe);
18404a9ceb7dSMike Marciniszyn 		trace_hfi1_qp_send_completion(qp, wqe, qp->s_last);
18414a9ceb7dSMike Marciniszyn 		rvt_qp_complete_swqe(qp,
184243a474aaSMike Marciniszyn 				     wqe,
184343a474aaSMike Marciniszyn 				     ib_hfi1_wc_opcode[wqe->wr.opcode],
184443a474aaSMike Marciniszyn 				     IB_WC_SUCCESS);
1845f48ad614SDennis Dalessandro 	} else {
1846f48ad614SDennis Dalessandro 		struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1847f48ad614SDennis Dalessandro 
1848f48ad614SDennis Dalessandro 		this_cpu_inc(*ibp->rvp.rc_delayed_comp);
1849f48ad614SDennis Dalessandro 		/*
1850f48ad614SDennis Dalessandro 		 * If send progress not running attempt to progress
1851f48ad614SDennis Dalessandro 		 * SDMA queue.
1852f48ad614SDennis Dalessandro 		 */
1853f48ad614SDennis Dalessandro 		if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
1854f48ad614SDennis Dalessandro 			struct sdma_engine *engine;
1855d8966fcdSDasaratharaman Chandramouli 			u8 sl = rdma_ah_get_sl(&qp->remote_ah_attr);
1856f48ad614SDennis Dalessandro 			u8 sc5;
1857f48ad614SDennis Dalessandro 
1858f48ad614SDennis Dalessandro 			/* For now use sc to find engine */
1859d8966fcdSDasaratharaman Chandramouli 			sc5 = ibp->sl_to_sc[sl];
1860f48ad614SDennis Dalessandro 			engine = qp_to_sdma_engine(qp, sc5);
1861f48ad614SDennis Dalessandro 			sdma_engine_progress_schedule(engine);
1862f48ad614SDennis Dalessandro 		}
1863f48ad614SDennis Dalessandro 	}
1864f48ad614SDennis Dalessandro 
1865f48ad614SDennis Dalessandro 	qp->s_retry = qp->s_retry_cnt;
18663c6cb20aSKaike Wan 	/*
18673c6cb20aSKaike Wan 	 * Don't update the last PSN if the request being completed is
18683c6cb20aSKaike Wan 	 * a TID RDMA WRITE request.
18693c6cb20aSKaike Wan 	 * Completion of the TID RDMA WRITE requests are done by the
18703c6cb20aSKaike Wan 	 * TID RDMA ACKs and as such could be for a request that has
18713c6cb20aSKaike Wan 	 * already been ACKed as far as the IB state machine is
18723c6cb20aSKaike Wan 	 * concerned.
18733c6cb20aSKaike Wan 	 */
18743c6cb20aSKaike Wan 	if (wqe->wr.opcode != IB_WR_TID_RDMA_WRITE)
1875f48ad614SDennis Dalessandro 		update_last_psn(qp, wqe->lpsn);
1876f48ad614SDennis Dalessandro 
1877f48ad614SDennis Dalessandro 	/*
1878f48ad614SDennis Dalessandro 	 * If we are completing a request which is in the process of
1879f48ad614SDennis Dalessandro 	 * being resent, we can stop re-sending it since we know the
1880f48ad614SDennis Dalessandro 	 * responder has already seen it.
1881f48ad614SDennis Dalessandro 	 */
1882f48ad614SDennis Dalessandro 	if (qp->s_acked == qp->s_cur) {
1883f48ad614SDennis Dalessandro 		if (++qp->s_cur >= qp->s_size)
1884f48ad614SDennis Dalessandro 			qp->s_cur = 0;
1885f48ad614SDennis Dalessandro 		qp->s_acked = qp->s_cur;
1886f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
1887f48ad614SDennis Dalessandro 		if (qp->s_acked != qp->s_tail) {
1888f48ad614SDennis Dalessandro 			qp->s_state = OP(SEND_LAST);
1889f48ad614SDennis Dalessandro 			qp->s_psn = wqe->psn;
1890f48ad614SDennis Dalessandro 		}
1891f48ad614SDennis Dalessandro 	} else {
1892f48ad614SDennis Dalessandro 		if (++qp->s_acked >= qp->s_size)
1893f48ad614SDennis Dalessandro 			qp->s_acked = 0;
1894f48ad614SDennis Dalessandro 		if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1895f48ad614SDennis Dalessandro 			qp->s_draining = 0;
1896f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1897f48ad614SDennis Dalessandro 	}
1898a0b34f75SKaike Wan 	if (priv->s_flags & HFI1_S_TID_WAIT_INTERLCK) {
1899a0b34f75SKaike Wan 		priv->s_flags &= ~HFI1_S_TID_WAIT_INTERLCK;
1900a0b34f75SKaike Wan 		hfi1_schedule_send(qp);
1901a0b34f75SKaike Wan 	}
1902f48ad614SDennis Dalessandro 	return wqe;
1903f48ad614SDennis Dalessandro }
1904f48ad614SDennis Dalessandro 
set_restart_qp(struct rvt_qp * qp,struct hfi1_ctxtdata * rcd)19053c6cb20aSKaike Wan static void set_restart_qp(struct rvt_qp *qp, struct hfi1_ctxtdata *rcd)
19063c6cb20aSKaike Wan {
19073c6cb20aSKaike Wan 	/* Retry this request. */
19083c6cb20aSKaike Wan 	if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
19093c6cb20aSKaike Wan 		qp->r_flags |= RVT_R_RDMAR_SEQ;
19103c6cb20aSKaike Wan 		hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
19113c6cb20aSKaike Wan 		if (list_empty(&qp->rspwait)) {
19123c6cb20aSKaike Wan 			qp->r_flags |= RVT_R_RSP_SEND;
19133c6cb20aSKaike Wan 			rvt_get_qp(qp);
19143c6cb20aSKaike Wan 			list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
19153c6cb20aSKaike Wan 		}
19163c6cb20aSKaike Wan 	}
19173c6cb20aSKaike Wan }
19183c6cb20aSKaike Wan 
19193c6cb20aSKaike Wan /**
19203c6cb20aSKaike Wan  * update_qp_retry_state - Update qp retry state.
19213c6cb20aSKaike Wan  * @qp: the QP
19223c6cb20aSKaike Wan  * @psn: the packet sequence number of the TID RDMA WRITE RESP.
19233c6cb20aSKaike Wan  * @spsn:  The start psn for the given TID RDMA WRITE swqe.
19243c6cb20aSKaike Wan  * @lpsn:  The last psn for the given TID RDMA WRITE swqe.
19253c6cb20aSKaike Wan  *
19263c6cb20aSKaike Wan  * This function is called to update the qp retry state upon
19273c6cb20aSKaike Wan  * receiving a TID WRITE RESP after the qp is scheduled to retry
19283c6cb20aSKaike Wan  * a request.
19293c6cb20aSKaike Wan  */
update_qp_retry_state(struct rvt_qp * qp,u32 psn,u32 spsn,u32 lpsn)19303c6cb20aSKaike Wan static void update_qp_retry_state(struct rvt_qp *qp, u32 psn, u32 spsn,
19313c6cb20aSKaike Wan 				  u32 lpsn)
19323c6cb20aSKaike Wan {
19333c6cb20aSKaike Wan 	struct hfi1_qp_priv *qpriv = qp->priv;
19343c6cb20aSKaike Wan 
19353c6cb20aSKaike Wan 	qp->s_psn = psn + 1;
19363c6cb20aSKaike Wan 	/*
19373c6cb20aSKaike Wan 	 * If this is the first TID RDMA WRITE RESP packet for the current
19383c6cb20aSKaike Wan 	 * request, change the s_state so that the retry will be processed
19393c6cb20aSKaike Wan 	 * correctly. Similarly, if this is the last TID RDMA WRITE RESP
19403c6cb20aSKaike Wan 	 * packet, change the s_state and advance the s_cur.
19413c6cb20aSKaike Wan 	 */
19423c6cb20aSKaike Wan 	if (cmp_psn(psn, lpsn) >= 0) {
19433c6cb20aSKaike Wan 		qp->s_cur = qpriv->s_tid_cur + 1;
19443c6cb20aSKaike Wan 		if (qp->s_cur >= qp->s_size)
19453c6cb20aSKaike Wan 			qp->s_cur = 0;
19463c6cb20aSKaike Wan 		qp->s_state = TID_OP(WRITE_REQ);
19473c6cb20aSKaike Wan 	} else  if (!cmp_psn(psn, spsn)) {
19483c6cb20aSKaike Wan 		qp->s_cur = qpriv->s_tid_cur;
19493c6cb20aSKaike Wan 		qp->s_state = TID_OP(WRITE_RESP);
19503c6cb20aSKaike Wan 	}
19513c6cb20aSKaike Wan }
19523c6cb20aSKaike Wan 
19536993fce4SLee Jones /*
1954f48ad614SDennis Dalessandro  * do_rc_ack - process an incoming RC ACK
1955f48ad614SDennis Dalessandro  * @qp: the QP the ACK came in on
1956f48ad614SDennis Dalessandro  * @psn: the packet sequence number of the ACK
1957f48ad614SDennis Dalessandro  * @opcode: the opcode of the request that resulted in the ACK
1958f48ad614SDennis Dalessandro  *
1959f48ad614SDennis Dalessandro  * This is called from rc_rcv_resp() to process an incoming RC ACK
1960f48ad614SDennis Dalessandro  * for the given QP.
1961f48ad614SDennis Dalessandro  * May be called at interrupt level, with the QP s_lock held.
1962f48ad614SDennis Dalessandro  * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1963f48ad614SDennis Dalessandro  */
do_rc_ack(struct rvt_qp * qp,u32 aeth,u32 psn,int opcode,u64 val,struct hfi1_ctxtdata * rcd)1964385156c5SKaike Wan int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
1965f48ad614SDennis Dalessandro 	      u64 val, struct hfi1_ctxtdata *rcd)
1966f48ad614SDennis Dalessandro {
1967f48ad614SDennis Dalessandro 	struct hfi1_ibport *ibp;
1968f48ad614SDennis Dalessandro 	enum ib_wc_status status;
196924b11923SKaike Wan 	struct hfi1_qp_priv *qpriv = qp->priv;
1970f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
1971f48ad614SDennis Dalessandro 	int ret = 0;
1972f48ad614SDennis Dalessandro 	u32 ack_psn;
1973f48ad614SDennis Dalessandro 	int diff;
19743c6cb20aSKaike Wan 	struct rvt_dev_info *rdi;
1975f48ad614SDennis Dalessandro 
197668e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
1977f48ad614SDennis Dalessandro 	/*
1978f48ad614SDennis Dalessandro 	 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1979f48ad614SDennis Dalessandro 	 * requests and implicitly NAK RDMA read and atomic requests issued
1980f48ad614SDennis Dalessandro 	 * before the NAK'ed request.  The MSN won't include the NAK'ed
1981f48ad614SDennis Dalessandro 	 * request but will include an ACK'ed request(s).
1982f48ad614SDennis Dalessandro 	 */
1983f48ad614SDennis Dalessandro 	ack_psn = psn;
1984832666c1SDon Hiatt 	if (aeth >> IB_AETH_NAK_SHIFT)
1985f48ad614SDennis Dalessandro 		ack_psn--;
1986f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
1987f3e862cbSSebastian Sanchez 	ibp = rcd_to_iport(rcd);
1988f48ad614SDennis Dalessandro 
1989f48ad614SDennis Dalessandro 	/*
1990f48ad614SDennis Dalessandro 	 * The MSN might be for a later WQE than the PSN indicates so
1991f48ad614SDennis Dalessandro 	 * only complete WQEs that the PSN finishes.
1992f48ad614SDennis Dalessandro 	 */
1993f48ad614SDennis Dalessandro 	while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
1994f48ad614SDennis Dalessandro 		/*
1995f48ad614SDennis Dalessandro 		 * RDMA_READ_RESPONSE_ONLY is a special case since
1996f48ad614SDennis Dalessandro 		 * we want to generate completion events for everything
1997f48ad614SDennis Dalessandro 		 * before the RDMA read, copy the data, then generate
1998f48ad614SDennis Dalessandro 		 * the completion for the read.
1999f48ad614SDennis Dalessandro 		 */
2000f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ &&
2001f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
2002f48ad614SDennis Dalessandro 		    diff == 0) {
2003f48ad614SDennis Dalessandro 			ret = 1;
2004f48ad614SDennis Dalessandro 			goto bail_stop;
2005f48ad614SDennis Dalessandro 		}
2006f48ad614SDennis Dalessandro 		/*
2007f48ad614SDennis Dalessandro 		 * If this request is a RDMA read or atomic, and the ACK is
2008f48ad614SDennis Dalessandro 		 * for a later operation, this ACK NAKs the RDMA read or
2009f48ad614SDennis Dalessandro 		 * atomic.  In other words, only a RDMA_READ_LAST or ONLY
2010f48ad614SDennis Dalessandro 		 * can ACK a RDMA read and likewise for atomic ops.  Note
2011f48ad614SDennis Dalessandro 		 * that the NAK case can only happen if relaxed ordering is
2012f48ad614SDennis Dalessandro 		 * used and requests are sent after an RDMA read or atomic
2013f48ad614SDennis Dalessandro 		 * is sent but before the response is received.
2014f48ad614SDennis Dalessandro 		 */
2015f48ad614SDennis Dalessandro 		if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
2016f48ad614SDennis Dalessandro 		     (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
201724b11923SKaike Wan 		    (wqe->wr.opcode == IB_WR_TID_RDMA_READ &&
201824b11923SKaike Wan 		     (opcode != TID_OP(READ_RESP) || diff != 0)) ||
2019f48ad614SDennis Dalessandro 		    ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
2020f48ad614SDennis Dalessandro 		      wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
20213c6cb20aSKaike Wan 		     (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0)) ||
20223c6cb20aSKaike Wan 		    (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE &&
20233c6cb20aSKaike Wan 		     (delta_psn(psn, qp->s_last_psn) != 1))) {
20243c6cb20aSKaike Wan 			set_restart_qp(qp, rcd);
2025f48ad614SDennis Dalessandro 			/*
2026f48ad614SDennis Dalessandro 			 * No need to process the ACK/NAK since we are
2027f48ad614SDennis Dalessandro 			 * restarting an earlier request.
2028f48ad614SDennis Dalessandro 			 */
2029f48ad614SDennis Dalessandro 			goto bail_stop;
2030f48ad614SDennis Dalessandro 		}
2031f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
2032f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
2033f48ad614SDennis Dalessandro 			u64 *vaddr = wqe->sg_list[0].vaddr;
2034f48ad614SDennis Dalessandro 			*vaddr = val;
2035f48ad614SDennis Dalessandro 		}
203648a615dcSKaike Wan 		if (wqe->wr.opcode == IB_WR_OPFN)
203748a615dcSKaike Wan 			opfn_conn_reply(qp, val);
203848a615dcSKaike Wan 
2039f48ad614SDennis Dalessandro 		if (qp->s_num_rd_atomic &&
2040f48ad614SDennis Dalessandro 		    (wqe->wr.opcode == IB_WR_RDMA_READ ||
2041f48ad614SDennis Dalessandro 		     wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
2042f48ad614SDennis Dalessandro 		     wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
2043f48ad614SDennis Dalessandro 			qp->s_num_rd_atomic--;
2044f48ad614SDennis Dalessandro 			/* Restart sending task if fence is complete */
2045f48ad614SDennis Dalessandro 			if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
2046f48ad614SDennis Dalessandro 			    !qp->s_num_rd_atomic) {
2047f48ad614SDennis Dalessandro 				qp->s_flags &= ~(RVT_S_WAIT_FENCE |
2048f48ad614SDennis Dalessandro 						 RVT_S_WAIT_ACK);
2049f48ad614SDennis Dalessandro 				hfi1_schedule_send(qp);
2050f48ad614SDennis Dalessandro 			} else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
2051f48ad614SDennis Dalessandro 				qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
2052f48ad614SDennis Dalessandro 						 RVT_S_WAIT_ACK);
2053f48ad614SDennis Dalessandro 				hfi1_schedule_send(qp);
2054f48ad614SDennis Dalessandro 			}
2055f48ad614SDennis Dalessandro 		}
20563c6cb20aSKaike Wan 
20573c6cb20aSKaike Wan 		/*
20583c6cb20aSKaike Wan 		 * TID RDMA WRITE requests will be completed by the TID RDMA
20593c6cb20aSKaike Wan 		 * ACK packet handler (see tid_rdma.c).
20603c6cb20aSKaike Wan 		 */
20613c6cb20aSKaike Wan 		if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE)
20623c6cb20aSKaike Wan 			break;
20633c6cb20aSKaike Wan 
2064f48ad614SDennis Dalessandro 		wqe = do_rc_completion(qp, wqe, ibp);
2065f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
2066f48ad614SDennis Dalessandro 			break;
2067f48ad614SDennis Dalessandro 	}
2068f48ad614SDennis Dalessandro 
20693ce5daa2SKaike Wan 	trace_hfi1_rc_ack_do(qp, aeth, psn, wqe);
20703ce5daa2SKaike Wan 	trace_hfi1_sender_do_rc_ack(qp);
2071832666c1SDon Hiatt 	switch (aeth >> IB_AETH_NAK_SHIFT) {
2072f48ad614SDennis Dalessandro 	case 0:         /* ACK */
2073f48ad614SDennis Dalessandro 		this_cpu_inc(*ibp->rvp.rc_acks);
207424b11923SKaike Wan 		if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) {
207524b11923SKaike Wan 			if (wqe_to_tid_req(wqe)->ack_pending)
207624b11923SKaike Wan 				rvt_mod_retry_timer_ext(qp,
207724b11923SKaike Wan 							qpriv->timeout_shift);
207824b11923SKaike Wan 			else
207924b11923SKaike Wan 				rvt_stop_rc_timers(qp);
208024b11923SKaike Wan 		} else if (qp->s_acked != qp->s_tail) {
20813c6cb20aSKaike Wan 			struct rvt_swqe *__w = NULL;
20823c6cb20aSKaike Wan 
20833c6cb20aSKaike Wan 			if (qpriv->s_tid_cur != HFI1_QP_WQE_INVALID)
20843c6cb20aSKaike Wan 				__w = rvt_get_swqe_ptr(qp, qpriv->s_tid_cur);
20853c6cb20aSKaike Wan 
20863c6cb20aSKaike Wan 			/*
20873c6cb20aSKaike Wan 			 * Stop timers if we've received all of the TID RDMA
20883c6cb20aSKaike Wan 			 * WRITE * responses.
20893c6cb20aSKaike Wan 			 */
20903c6cb20aSKaike Wan 			if (__w && __w->wr.opcode == IB_WR_TID_RDMA_WRITE &&
20913c6cb20aSKaike Wan 			    opcode == TID_OP(WRITE_RESP)) {
20923c6cb20aSKaike Wan 				/*
20933c6cb20aSKaike Wan 				 * Normally, the loop above would correctly
20943c6cb20aSKaike Wan 				 * process all WQEs from s_acked onward and
20953c6cb20aSKaike Wan 				 * either complete them or check for correct
20963c6cb20aSKaike Wan 				 * PSN sequencing.
20973c6cb20aSKaike Wan 				 * However, for TID RDMA, due to pipelining,
20983c6cb20aSKaike Wan 				 * the response may not be for the request at
20993c6cb20aSKaike Wan 				 * s_acked so the above look would just be
21003c6cb20aSKaike Wan 				 * skipped. This does not allow for checking
21013c6cb20aSKaike Wan 				 * the PSN sequencing. It has to be done
21023c6cb20aSKaike Wan 				 * separately.
21033c6cb20aSKaike Wan 				 */
21043c6cb20aSKaike Wan 				if (cmp_psn(psn, qp->s_last_psn + 1)) {
21053c6cb20aSKaike Wan 					set_restart_qp(qp, rcd);
21063c6cb20aSKaike Wan 					goto bail_stop;
21073c6cb20aSKaike Wan 				}
21083c6cb20aSKaike Wan 				/*
21093c6cb20aSKaike Wan 				 * If the psn is being resent, stop the
21103c6cb20aSKaike Wan 				 * resending.
21113c6cb20aSKaike Wan 				 */
21123c6cb20aSKaike Wan 				if (qp->s_cur != qp->s_tail &&
21133c6cb20aSKaike Wan 				    cmp_psn(qp->s_psn, psn) <= 0)
21143c6cb20aSKaike Wan 					update_qp_retry_state(qp, psn,
21153c6cb20aSKaike Wan 							      __w->psn,
21163c6cb20aSKaike Wan 							      __w->lpsn);
21173c6cb20aSKaike Wan 				else if (--qpriv->pending_tid_w_resp)
21183c6cb20aSKaike Wan 					rvt_mod_retry_timer(qp);
21193c6cb20aSKaike Wan 				else
21203c6cb20aSKaike Wan 					rvt_stop_rc_timers(qp);
21213c6cb20aSKaike Wan 			} else {
2122f48ad614SDennis Dalessandro 				/*
2123f48ad614SDennis Dalessandro 				 * We are expecting more ACKs so
2124f48ad614SDennis Dalessandro 				 * mod the retry timer.
2125f48ad614SDennis Dalessandro 				 */
212656acbbfbSVenkata Sandeep Dhanalakota 				rvt_mod_retry_timer(qp);
2127f48ad614SDennis Dalessandro 				/*
21283c6cb20aSKaike Wan 				 * We can stop re-sending the earlier packets
21293c6cb20aSKaike Wan 				 * and continue with the next packet the
21303c6cb20aSKaike Wan 				 * receiver wants.
2131f48ad614SDennis Dalessandro 				 */
2132f48ad614SDennis Dalessandro 				if (cmp_psn(qp->s_psn, psn) <= 0)
2133f48ad614SDennis Dalessandro 					reset_psn(qp, psn + 1);
21343c6cb20aSKaike Wan 			}
2135f48ad614SDennis Dalessandro 		} else {
2136f48ad614SDennis Dalessandro 			/* No more acks - kill all timers */
213756acbbfbSVenkata Sandeep Dhanalakota 			rvt_stop_rc_timers(qp);
2138f48ad614SDennis Dalessandro 			if (cmp_psn(qp->s_psn, psn) <= 0) {
2139f48ad614SDennis Dalessandro 				qp->s_state = OP(SEND_LAST);
2140f48ad614SDennis Dalessandro 				qp->s_psn = psn + 1;
2141f48ad614SDennis Dalessandro 			}
2142f48ad614SDennis Dalessandro 		}
2143f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_ACK) {
2144f48ad614SDennis Dalessandro 			qp->s_flags &= ~RVT_S_WAIT_ACK;
2145f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
2146f48ad614SDennis Dalessandro 		}
2147696513e8SBrian Welty 		rvt_get_credit(qp, aeth);
2148f48ad614SDennis Dalessandro 		qp->s_rnr_retry = qp->s_rnr_retry_cnt;
2149f48ad614SDennis Dalessandro 		qp->s_retry = qp->s_retry_cnt;
21503c6cb20aSKaike Wan 		/*
21513c6cb20aSKaike Wan 		 * If the current request is a TID RDMA WRITE request and the
21523c6cb20aSKaike Wan 		 * response is not a TID RDMA WRITE RESP packet, s_last_psn
21533c6cb20aSKaike Wan 		 * can't be advanced.
21543c6cb20aSKaike Wan 		 */
21553c6cb20aSKaike Wan 		if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE &&
21563c6cb20aSKaike Wan 		    opcode != TID_OP(WRITE_RESP) &&
21573c6cb20aSKaike Wan 		    cmp_psn(psn, wqe->psn) >= 0)
21583c6cb20aSKaike Wan 			return 1;
2159f48ad614SDennis Dalessandro 		update_last_psn(qp, psn);
2160f48ad614SDennis Dalessandro 		return 1;
2161f48ad614SDennis Dalessandro 
2162f48ad614SDennis Dalessandro 	case 1:         /* RNR NAK */
2163f48ad614SDennis Dalessandro 		ibp->rvp.n_rnr_naks++;
2164f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
2165f48ad614SDennis Dalessandro 			goto bail_stop;
2166f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_RNR)
2167f48ad614SDennis Dalessandro 			goto bail_stop;
21683c6cb20aSKaike Wan 		rdi = ib_to_rvt(qp->ibqp.device);
2169ce8e8087SKaike Wan 		if (!(rdi->post_parms[wqe->wr.opcode].flags &
2170ce8e8087SKaike Wan 		       RVT_OPERATION_IGN_RNR_CNT)) {
2171ce8e8087SKaike Wan 			if (qp->s_rnr_retry == 0) {
2172f48ad614SDennis Dalessandro 				status = IB_WC_RNR_RETRY_EXC_ERR;
2173f48ad614SDennis Dalessandro 				goto class_b;
2174f48ad614SDennis Dalessandro 			}
21753c6cb20aSKaike Wan 			if (qp->s_rnr_retry_cnt < 7 && qp->s_rnr_retry_cnt > 0)
2176f48ad614SDennis Dalessandro 				qp->s_rnr_retry--;
2177ce8e8087SKaike Wan 		}
2178f48ad614SDennis Dalessandro 
21793c6cb20aSKaike Wan 		/*
21803c6cb20aSKaike Wan 		 * The last valid PSN is the previous PSN. For TID RDMA WRITE
21813c6cb20aSKaike Wan 		 * request, s_last_psn should be incremented only when a TID
21823c6cb20aSKaike Wan 		 * RDMA WRITE RESP is received to avoid skipping lost TID RDMA
21833c6cb20aSKaike Wan 		 * WRITE RESP packets.
21843c6cb20aSKaike Wan 		 */
21853c6cb20aSKaike Wan 		if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE) {
21863c6cb20aSKaike Wan 			reset_psn(qp, qp->s_last_psn + 1);
21873c6cb20aSKaike Wan 		} else {
2188f48ad614SDennis Dalessandro 			update_last_psn(qp, psn - 1);
21893c6cb20aSKaike Wan 			reset_psn(qp, psn);
21903c6cb20aSKaike Wan 		}
2191f48ad614SDennis Dalessandro 
2192f48ad614SDennis Dalessandro 		ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
2193f48ad614SDennis Dalessandro 		qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
219456acbbfbSVenkata Sandeep Dhanalakota 		rvt_stop_rc_timers(qp);
219556acbbfbSVenkata Sandeep Dhanalakota 		rvt_add_rnr_timer(qp, aeth);
2196f48ad614SDennis Dalessandro 		return 0;
2197f48ad614SDennis Dalessandro 
2198f48ad614SDennis Dalessandro 	case 3:         /* NAK */
2199f48ad614SDennis Dalessandro 		if (qp->s_acked == qp->s_tail)
2200f48ad614SDennis Dalessandro 			goto bail_stop;
2201f48ad614SDennis Dalessandro 		/* The last valid PSN is the previous PSN. */
2202f48ad614SDennis Dalessandro 		update_last_psn(qp, psn - 1);
2203832666c1SDon Hiatt 		switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
2204832666c1SDon Hiatt 			IB_AETH_CREDIT_MASK) {
2205f48ad614SDennis Dalessandro 		case 0: /* PSN sequence error */
2206f48ad614SDennis Dalessandro 			ibp->rvp.n_seq_naks++;
2207f48ad614SDennis Dalessandro 			/*
2208f48ad614SDennis Dalessandro 			 * Back up to the responder's expected PSN.
2209f48ad614SDennis Dalessandro 			 * Note that we might get a NAK in the middle of an
2210f48ad614SDennis Dalessandro 			 * RDMA READ response which terminates the RDMA
2211f48ad614SDennis Dalessandro 			 * READ.
2212f48ad614SDennis Dalessandro 			 */
221356acbbfbSVenkata Sandeep Dhanalakota 			hfi1_restart_rc(qp, psn, 0);
2214f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
2215f48ad614SDennis Dalessandro 			break;
2216f48ad614SDennis Dalessandro 
2217f48ad614SDennis Dalessandro 		case 1: /* Invalid Request */
2218f48ad614SDennis Dalessandro 			status = IB_WC_REM_INV_REQ_ERR;
2219f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
2220f48ad614SDennis Dalessandro 			goto class_b;
2221f48ad614SDennis Dalessandro 
2222f48ad614SDennis Dalessandro 		case 2: /* Remote Access Error */
2223f48ad614SDennis Dalessandro 			status = IB_WC_REM_ACCESS_ERR;
2224f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
2225f48ad614SDennis Dalessandro 			goto class_b;
2226f48ad614SDennis Dalessandro 
2227f48ad614SDennis Dalessandro 		case 3: /* Remote Operation Error */
2228f48ad614SDennis Dalessandro 			status = IB_WC_REM_OP_ERR;
2229f48ad614SDennis Dalessandro 			ibp->rvp.n_other_naks++;
2230f48ad614SDennis Dalessandro class_b:
2231f48ad614SDennis Dalessandro 			if (qp->s_last == qp->s_acked) {
223224b11923SKaike Wan 				if (wqe->wr.opcode == IB_WR_TID_RDMA_READ)
223324b11923SKaike Wan 					hfi1_kern_read_tid_flow_free(qp);
223424b11923SKaike Wan 
223524b11923SKaike Wan 				hfi1_trdma_send_complete(qp, wqe, status);
2236f48ad614SDennis Dalessandro 				rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
2237f48ad614SDennis Dalessandro 			}
2238f48ad614SDennis Dalessandro 			break;
2239f48ad614SDennis Dalessandro 
2240f48ad614SDennis Dalessandro 		default:
2241f48ad614SDennis Dalessandro 			/* Ignore other reserved NAK error codes */
2242f48ad614SDennis Dalessandro 			goto reserved;
2243f48ad614SDennis Dalessandro 		}
2244f48ad614SDennis Dalessandro 		qp->s_retry = qp->s_retry_cnt;
2245f48ad614SDennis Dalessandro 		qp->s_rnr_retry = qp->s_rnr_retry_cnt;
2246f48ad614SDennis Dalessandro 		goto bail_stop;
2247f48ad614SDennis Dalessandro 
2248f48ad614SDennis Dalessandro 	default:                /* 2: reserved */
2249f48ad614SDennis Dalessandro reserved:
2250f48ad614SDennis Dalessandro 		/* Ignore reserved NAK codes. */
2251f48ad614SDennis Dalessandro 		goto bail_stop;
2252f48ad614SDennis Dalessandro 	}
2253f48ad614SDennis Dalessandro 	/* cannot be reached  */
2254f48ad614SDennis Dalessandro bail_stop:
225556acbbfbSVenkata Sandeep Dhanalakota 	rvt_stop_rc_timers(qp);
2256f48ad614SDennis Dalessandro 	return ret;
2257f48ad614SDennis Dalessandro }
2258f48ad614SDennis Dalessandro 
2259f48ad614SDennis Dalessandro /*
2260f48ad614SDennis Dalessandro  * We have seen an out of sequence RDMA read middle or last packet.
2261f48ad614SDennis Dalessandro  * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
2262f48ad614SDennis Dalessandro  */
rdma_seq_err(struct rvt_qp * qp,struct hfi1_ibport * ibp,u32 psn,struct hfi1_ctxtdata * rcd)2263f48ad614SDennis Dalessandro static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
2264f48ad614SDennis Dalessandro 			 struct hfi1_ctxtdata *rcd)
2265f48ad614SDennis Dalessandro {
2266f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
2267f48ad614SDennis Dalessandro 
226868e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->s_lock);
2269f48ad614SDennis Dalessandro 	/* Remove QP from retry timer */
227056acbbfbSVenkata Sandeep Dhanalakota 	rvt_stop_rc_timers(qp);
2271f48ad614SDennis Dalessandro 
2272f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
2273f48ad614SDennis Dalessandro 
2274f48ad614SDennis Dalessandro 	while (cmp_psn(psn, wqe->lpsn) > 0) {
2275f48ad614SDennis Dalessandro 		if (wqe->wr.opcode == IB_WR_RDMA_READ ||
227624b11923SKaike Wan 		    wqe->wr.opcode == IB_WR_TID_RDMA_READ ||
22773c6cb20aSKaike Wan 		    wqe->wr.opcode == IB_WR_TID_RDMA_WRITE ||
2278f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
2279f48ad614SDennis Dalessandro 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
2280f48ad614SDennis Dalessandro 			break;
2281f48ad614SDennis Dalessandro 		wqe = do_rc_completion(qp, wqe, ibp);
2282f48ad614SDennis Dalessandro 	}
2283f48ad614SDennis Dalessandro 
2284f48ad614SDennis Dalessandro 	ibp->rvp.n_rdma_seq++;
2285f48ad614SDennis Dalessandro 	qp->r_flags |= RVT_R_RDMAR_SEQ;
228656acbbfbSVenkata Sandeep Dhanalakota 	hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
2287f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait)) {
2288f48ad614SDennis Dalessandro 		qp->r_flags |= RVT_R_RSP_SEND;
22894d6f85c3SMike Marciniszyn 		rvt_get_qp(qp);
2290f48ad614SDennis Dalessandro 		list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2291f48ad614SDennis Dalessandro 	}
2292f48ad614SDennis Dalessandro }
2293f48ad614SDennis Dalessandro 
2294f48ad614SDennis Dalessandro /**
2295f48ad614SDennis Dalessandro  * rc_rcv_resp - process an incoming RC response packet
22965b6cabb0SDon Hiatt  * @packet: data packet information
2297f48ad614SDennis Dalessandro  *
2298f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an incoming RC response
2299f48ad614SDennis Dalessandro  * packet for the given QP.
2300f48ad614SDennis Dalessandro  * Called at interrupt level.
2301f48ad614SDennis Dalessandro  */
rc_rcv_resp(struct hfi1_packet * packet)23025b6cabb0SDon Hiatt static void rc_rcv_resp(struct hfi1_packet *packet)
2303f48ad614SDennis Dalessandro {
23045b6cabb0SDon Hiatt 	struct hfi1_ctxtdata *rcd = packet->rcd;
23055b6cabb0SDon Hiatt 	void *data = packet->payload;
23065b6cabb0SDon Hiatt 	u32 tlen = packet->tlen;
23075b6cabb0SDon Hiatt 	struct rvt_qp *qp = packet->qp;
2308bdaf96f6SSebastian Sanchez 	struct hfi1_ibport *ibp;
23095b6cabb0SDon Hiatt 	struct ib_other_headers *ohdr = packet->ohdr;
2310f48ad614SDennis Dalessandro 	struct rvt_swqe *wqe;
2311f48ad614SDennis Dalessandro 	enum ib_wc_status status;
2312f48ad614SDennis Dalessandro 	unsigned long flags;
2313f48ad614SDennis Dalessandro 	int diff;
2314f48ad614SDennis Dalessandro 	u64 val;
23155b6cabb0SDon Hiatt 	u32 aeth;
23165b6cabb0SDon Hiatt 	u32 psn = ib_bth_get_psn(packet->ohdr);
23175b6cabb0SDon Hiatt 	u32 pmtu = qp->pmtu;
23185b6cabb0SDon Hiatt 	u16 hdrsize = packet->hlen;
23195b6cabb0SDon Hiatt 	u8 opcode = packet->opcode;
23205b6cabb0SDon Hiatt 	u8 pad = packet->pad;
23215b6cabb0SDon Hiatt 	u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
2322f48ad614SDennis Dalessandro 
2323f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
2324462b6b21SSebastian Sanchez 	trace_hfi1_ack(qp, psn);
2325f48ad614SDennis Dalessandro 
2326f48ad614SDennis Dalessandro 	/* Ignore invalid responses. */
2327eb04ff09SMike Marciniszyn 	if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
2328f48ad614SDennis Dalessandro 		goto ack_done;
2329f48ad614SDennis Dalessandro 
2330f48ad614SDennis Dalessandro 	/* Ignore duplicate responses. */
2331f48ad614SDennis Dalessandro 	diff = cmp_psn(psn, qp->s_last_psn);
2332f48ad614SDennis Dalessandro 	if (unlikely(diff <= 0)) {
2333f48ad614SDennis Dalessandro 		/* Update credits for "ghost" ACKs */
2334f48ad614SDennis Dalessandro 		if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
2335f48ad614SDennis Dalessandro 			aeth = be32_to_cpu(ohdr->u.aeth);
2336832666c1SDon Hiatt 			if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
2337696513e8SBrian Welty 				rvt_get_credit(qp, aeth);
2338f48ad614SDennis Dalessandro 		}
2339f48ad614SDennis Dalessandro 		goto ack_done;
2340f48ad614SDennis Dalessandro 	}
2341f48ad614SDennis Dalessandro 
2342f48ad614SDennis Dalessandro 	/*
2343f48ad614SDennis Dalessandro 	 * Skip everything other than the PSN we expect, if we are waiting
2344f48ad614SDennis Dalessandro 	 * for a reply to a restarted RDMA read or atomic op.
2345f48ad614SDennis Dalessandro 	 */
2346f48ad614SDennis Dalessandro 	if (qp->r_flags & RVT_R_RDMAR_SEQ) {
2347f48ad614SDennis Dalessandro 		if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
2348f48ad614SDennis Dalessandro 			goto ack_done;
2349f48ad614SDennis Dalessandro 		qp->r_flags &= ~RVT_R_RDMAR_SEQ;
2350f48ad614SDennis Dalessandro 	}
2351f48ad614SDennis Dalessandro 
2352f48ad614SDennis Dalessandro 	if (unlikely(qp->s_acked == qp->s_tail))
2353f48ad614SDennis Dalessandro 		goto ack_done;
2354f48ad614SDennis Dalessandro 	wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
2355f48ad614SDennis Dalessandro 	status = IB_WC_SUCCESS;
2356f48ad614SDennis Dalessandro 
2357f48ad614SDennis Dalessandro 	switch (opcode) {
2358f48ad614SDennis Dalessandro 	case OP(ACKNOWLEDGE):
2359f48ad614SDennis Dalessandro 	case OP(ATOMIC_ACKNOWLEDGE):
2360f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_FIRST):
2361f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
2362261a4351SMike Marciniszyn 		if (opcode == OP(ATOMIC_ACKNOWLEDGE))
2363261a4351SMike Marciniszyn 			val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
2364261a4351SMike Marciniszyn 		else
2365f48ad614SDennis Dalessandro 			val = 0;
2366f48ad614SDennis Dalessandro 		if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
2367f48ad614SDennis Dalessandro 		    opcode != OP(RDMA_READ_RESPONSE_FIRST))
2368f48ad614SDennis Dalessandro 			goto ack_done;
2369f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
2370f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
2371f48ad614SDennis Dalessandro 			goto ack_op_err;
2372f48ad614SDennis Dalessandro 		/*
2373f48ad614SDennis Dalessandro 		 * If this is a response to a resent RDMA read, we
2374f48ad614SDennis Dalessandro 		 * have to be careful to copy the data to the right
2375f48ad614SDennis Dalessandro 		 * location.
2376f48ad614SDennis Dalessandro 		 */
2377f48ad614SDennis Dalessandro 		qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
2378f48ad614SDennis Dalessandro 						  wqe, psn, pmtu);
2379f48ad614SDennis Dalessandro 		goto read_middle;
2380f48ad614SDennis Dalessandro 
2381f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_MIDDLE):
2382f48ad614SDennis Dalessandro 		/* no AETH, no ACK */
2383f48ad614SDennis Dalessandro 		if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
2384f48ad614SDennis Dalessandro 			goto ack_seq_err;
2385f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
2386f48ad614SDennis Dalessandro 			goto ack_op_err;
2387f48ad614SDennis Dalessandro read_middle:
23885b6cabb0SDon Hiatt 		if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
2389f48ad614SDennis Dalessandro 			goto ack_len_err;
2390f48ad614SDennis Dalessandro 		if (unlikely(pmtu >= qp->s_rdma_read_len))
2391f48ad614SDennis Dalessandro 			goto ack_len_err;
2392f48ad614SDennis Dalessandro 
2393f48ad614SDennis Dalessandro 		/*
2394f48ad614SDennis Dalessandro 		 * We got a response so update the timeout.
2395f48ad614SDennis Dalessandro 		 * 4.096 usec. * (1 << qp->timeout)
2396f48ad614SDennis Dalessandro 		 */
239756acbbfbSVenkata Sandeep Dhanalakota 		rvt_mod_retry_timer(qp);
2398f48ad614SDennis Dalessandro 		if (qp->s_flags & RVT_S_WAIT_ACK) {
2399f48ad614SDennis Dalessandro 			qp->s_flags &= ~RVT_S_WAIT_ACK;
2400f48ad614SDennis Dalessandro 			hfi1_schedule_send(qp);
2401f48ad614SDennis Dalessandro 		}
2402f48ad614SDennis Dalessandro 
2403f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
2404f48ad614SDennis Dalessandro 			qp->s_retry = qp->s_retry_cnt;
2405f48ad614SDennis Dalessandro 
2406f48ad614SDennis Dalessandro 		/*
2407f48ad614SDennis Dalessandro 		 * Update the RDMA receive state but do the copy w/o
2408f48ad614SDennis Dalessandro 		 * holding the locks and blocking interrupts.
2409f48ad614SDennis Dalessandro 		 */
2410f48ad614SDennis Dalessandro 		qp->s_rdma_read_len -= pmtu;
2411f48ad614SDennis Dalessandro 		update_last_psn(qp, psn);
2412f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
2413019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->s_rdma_read_sge,
2414019f118bSBrian Welty 			     data, pmtu, false, false);
2415f48ad614SDennis Dalessandro 		goto bail;
2416f48ad614SDennis Dalessandro 
2417f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_ONLY):
2418f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
2419f48ad614SDennis Dalessandro 		if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
2420f48ad614SDennis Dalessandro 			goto ack_done;
2421f48ad614SDennis Dalessandro 		/*
2422f48ad614SDennis Dalessandro 		 * Check that the data size is >= 0 && <= pmtu.
2423f48ad614SDennis Dalessandro 		 * Remember to account for ICRC (4).
2424f48ad614SDennis Dalessandro 		 */
24255b6cabb0SDon Hiatt 		if (unlikely(tlen < (hdrsize + extra_bytes)))
2426f48ad614SDennis Dalessandro 			goto ack_len_err;
2427f48ad614SDennis Dalessandro 		/*
2428f48ad614SDennis Dalessandro 		 * If this is a response to a resent RDMA read, we
2429f48ad614SDennis Dalessandro 		 * have to be careful to copy the data to the right
2430f48ad614SDennis Dalessandro 		 * location.
2431f48ad614SDennis Dalessandro 		 */
2432f48ad614SDennis Dalessandro 		wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
2433f48ad614SDennis Dalessandro 		qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
2434f48ad614SDennis Dalessandro 						  wqe, psn, pmtu);
2435f48ad614SDennis Dalessandro 		goto read_last;
2436f48ad614SDennis Dalessandro 
2437f48ad614SDennis Dalessandro 	case OP(RDMA_READ_RESPONSE_LAST):
2438f48ad614SDennis Dalessandro 		/* ACKs READ req. */
2439f48ad614SDennis Dalessandro 		if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
2440f48ad614SDennis Dalessandro 			goto ack_seq_err;
2441f48ad614SDennis Dalessandro 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
2442f48ad614SDennis Dalessandro 			goto ack_op_err;
2443f48ad614SDennis Dalessandro 		/*
2444f48ad614SDennis Dalessandro 		 * Check that the data size is >= 1 && <= pmtu.
2445f48ad614SDennis Dalessandro 		 * Remember to account for ICRC (4).
2446f48ad614SDennis Dalessandro 		 */
24475b6cabb0SDon Hiatt 		if (unlikely(tlen <= (hdrsize + extra_bytes)))
2448f48ad614SDennis Dalessandro 			goto ack_len_err;
2449f48ad614SDennis Dalessandro read_last:
24505b6cabb0SDon Hiatt 		tlen -= hdrsize + extra_bytes;
2451f48ad614SDennis Dalessandro 		if (unlikely(tlen != qp->s_rdma_read_len))
2452f48ad614SDennis Dalessandro 			goto ack_len_err;
2453f48ad614SDennis Dalessandro 		aeth = be32_to_cpu(ohdr->u.aeth);
2454019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->s_rdma_read_sge,
2455019f118bSBrian Welty 			     data, tlen, false, false);
2456f48ad614SDennis Dalessandro 		WARN_ON(qp->s_rdma_read_sge.num_sge);
2457f48ad614SDennis Dalessandro 		(void)do_rc_ack(qp, aeth, psn,
2458f48ad614SDennis Dalessandro 				 OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
2459f48ad614SDennis Dalessandro 		goto ack_done;
2460f48ad614SDennis Dalessandro 	}
2461f48ad614SDennis Dalessandro 
2462f48ad614SDennis Dalessandro ack_op_err:
2463f48ad614SDennis Dalessandro 	status = IB_WC_LOC_QP_OP_ERR;
2464f48ad614SDennis Dalessandro 	goto ack_err;
2465f48ad614SDennis Dalessandro 
2466f48ad614SDennis Dalessandro ack_seq_err:
2467bdaf96f6SSebastian Sanchez 	ibp = rcd_to_iport(rcd);
2468f48ad614SDennis Dalessandro 	rdma_seq_err(qp, ibp, psn, rcd);
2469f48ad614SDennis Dalessandro 	goto ack_done;
2470f48ad614SDennis Dalessandro 
2471f48ad614SDennis Dalessandro ack_len_err:
2472f48ad614SDennis Dalessandro 	status = IB_WC_LOC_LEN_ERR;
2473f48ad614SDennis Dalessandro ack_err:
2474f48ad614SDennis Dalessandro 	if (qp->s_last == qp->s_acked) {
2475116aa033SVenkata Sandeep Dhanalakota 		rvt_send_complete(qp, wqe, status);
2476f48ad614SDennis Dalessandro 		rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
2477f48ad614SDennis Dalessandro 	}
2478f48ad614SDennis Dalessandro ack_done:
2479f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2480f48ad614SDennis Dalessandro bail:
2481f48ad614SDennis Dalessandro 	return;
2482f48ad614SDennis Dalessandro }
2483f48ad614SDennis Dalessandro 
rc_cancel_ack(struct rvt_qp * qp)2484f48ad614SDennis Dalessandro static inline void rc_cancel_ack(struct rvt_qp *qp)
2485f48ad614SDennis Dalessandro {
2486688f21c0SMike Marciniszyn 	qp->r_adefered = 0;
2487f48ad614SDennis Dalessandro 	if (list_empty(&qp->rspwait))
2488f48ad614SDennis Dalessandro 		return;
2489f48ad614SDennis Dalessandro 	list_del_init(&qp->rspwait);
2490f48ad614SDennis Dalessandro 	qp->r_flags &= ~RVT_R_RSP_NAK;
24914d6f85c3SMike Marciniszyn 	rvt_put_qp(qp);
2492f48ad614SDennis Dalessandro }
2493f48ad614SDennis Dalessandro 
2494f48ad614SDennis Dalessandro /**
2495f48ad614SDennis Dalessandro  * rc_rcv_error - process an incoming duplicate or error RC packet
2496f48ad614SDennis Dalessandro  * @ohdr: the other headers for this packet
2497f48ad614SDennis Dalessandro  * @data: the packet data
2498f48ad614SDennis Dalessandro  * @qp: the QP for this packet
2499f48ad614SDennis Dalessandro  * @opcode: the opcode for this packet
2500f48ad614SDennis Dalessandro  * @psn: the packet sequence number for this packet
2501f48ad614SDennis Dalessandro  * @diff: the difference between the PSN and the expected PSN
25026993fce4SLee Jones  * @rcd: the receive context
2503f48ad614SDennis Dalessandro  *
2504f48ad614SDennis Dalessandro  * This is called from hfi1_rc_rcv() to process an unexpected
2505f48ad614SDennis Dalessandro  * incoming RC packet for the given QP.
2506f48ad614SDennis Dalessandro  * Called at interrupt level.
2507f48ad614SDennis Dalessandro  * Return 1 if no more processing is needed; otherwise return 0 to
2508f48ad614SDennis Dalessandro  * schedule a response to be sent.
2509f48ad614SDennis Dalessandro  */
rc_rcv_error(struct ib_other_headers * ohdr,void * data,struct rvt_qp * qp,u32 opcode,u32 psn,int diff,struct hfi1_ctxtdata * rcd)2510261a4351SMike Marciniszyn static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
2511f48ad614SDennis Dalessandro 				 struct rvt_qp *qp, u32 opcode, u32 psn,
2512f48ad614SDennis Dalessandro 				 int diff, struct hfi1_ctxtdata *rcd)
2513f48ad614SDennis Dalessandro {
2514f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
2515f48ad614SDennis Dalessandro 	struct rvt_ack_entry *e;
2516f48ad614SDennis Dalessandro 	unsigned long flags;
2517385156c5SKaike Wan 	u8 prev;
2518385156c5SKaike Wan 	u8 mra; /* most recent ACK */
2519385156c5SKaike Wan 	bool old_req;
2520f48ad614SDennis Dalessandro 
2521462b6b21SSebastian Sanchez 	trace_hfi1_rcv_error(qp, psn);
2522f48ad614SDennis Dalessandro 	if (diff > 0) {
2523f48ad614SDennis Dalessandro 		/*
2524f48ad614SDennis Dalessandro 		 * Packet sequence error.
2525f48ad614SDennis Dalessandro 		 * A NAK will ACK earlier sends and RDMA writes.
2526f48ad614SDennis Dalessandro 		 * Don't queue the NAK if we already sent one.
2527f48ad614SDennis Dalessandro 		 */
2528f48ad614SDennis Dalessandro 		if (!qp->r_nak_state) {
2529f48ad614SDennis Dalessandro 			ibp->rvp.n_rc_seqnak++;
2530f48ad614SDennis Dalessandro 			qp->r_nak_state = IB_NAK_PSN_ERROR;
2531f48ad614SDennis Dalessandro 			/* Use the expected PSN. */
2532f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn;
2533f48ad614SDennis Dalessandro 			/*
2534f48ad614SDennis Dalessandro 			 * Wait to send the sequence NAK until all packets
2535f48ad614SDennis Dalessandro 			 * in the receive queue have been processed.
2536f48ad614SDennis Dalessandro 			 * Otherwise, we end up propagating congestion.
2537f48ad614SDennis Dalessandro 			 */
2538f48ad614SDennis Dalessandro 			rc_defered_ack(rcd, qp);
2539f48ad614SDennis Dalessandro 		}
2540f48ad614SDennis Dalessandro 		goto done;
2541f48ad614SDennis Dalessandro 	}
2542f48ad614SDennis Dalessandro 
2543f48ad614SDennis Dalessandro 	/*
2544f48ad614SDennis Dalessandro 	 * Handle a duplicate request.  Don't re-execute SEND, RDMA
2545f48ad614SDennis Dalessandro 	 * write or atomic op.  Don't NAK errors, just silently drop
2546f48ad614SDennis Dalessandro 	 * the duplicate request.  Note that r_sge, r_len, and
2547f48ad614SDennis Dalessandro 	 * r_rcv_len may be in use so don't modify them.
2548f48ad614SDennis Dalessandro 	 *
2549f48ad614SDennis Dalessandro 	 * We are supposed to ACK the earliest duplicate PSN but we
2550f48ad614SDennis Dalessandro 	 * can coalesce an outstanding duplicate ACK.  We have to
2551f48ad614SDennis Dalessandro 	 * send the earliest so that RDMA reads can be restarted at
2552f48ad614SDennis Dalessandro 	 * the requester's expected PSN.
2553f48ad614SDennis Dalessandro 	 *
2554f48ad614SDennis Dalessandro 	 * First, find where this duplicate PSN falls within the
2555f48ad614SDennis Dalessandro 	 * ACKs previously sent.
2556f48ad614SDennis Dalessandro 	 * old_req is true if there is an older response that is scheduled
2557f48ad614SDennis Dalessandro 	 * to be sent before sending this one.
2558f48ad614SDennis Dalessandro 	 */
2559f48ad614SDennis Dalessandro 	e = NULL;
2560d09dbe74Szhengbin 	old_req = true;
2561f48ad614SDennis Dalessandro 	ibp->rvp.n_rc_dupreq++;
2562f48ad614SDennis Dalessandro 
2563f48ad614SDennis Dalessandro 	spin_lock_irqsave(&qp->s_lock, flags);
2564f48ad614SDennis Dalessandro 
2565385156c5SKaike Wan 	e = find_prev_entry(qp, psn, &prev, &mra, &old_req);
2566385156c5SKaike Wan 
2567f48ad614SDennis Dalessandro 	switch (opcode) {
2568f48ad614SDennis Dalessandro 	case OP(RDMA_READ_REQUEST): {
2569f48ad614SDennis Dalessandro 		struct ib_reth *reth;
2570f48ad614SDennis Dalessandro 		u32 offset;
2571f48ad614SDennis Dalessandro 		u32 len;
2572f48ad614SDennis Dalessandro 
2573f48ad614SDennis Dalessandro 		/*
2574f48ad614SDennis Dalessandro 		 * If we didn't find the RDMA read request in the ack queue,
2575f48ad614SDennis Dalessandro 		 * we can ignore this request.
2576f48ad614SDennis Dalessandro 		 */
2577f48ad614SDennis Dalessandro 		if (!e || e->opcode != OP(RDMA_READ_REQUEST))
2578f48ad614SDennis Dalessandro 			goto unlock_done;
2579f48ad614SDennis Dalessandro 		/* RETH comes after BTH */
2580f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2581f48ad614SDennis Dalessandro 		/*
2582f48ad614SDennis Dalessandro 		 * Address range must be a subset of the original
2583f48ad614SDennis Dalessandro 		 * request and start on pmtu boundaries.
2584f48ad614SDennis Dalessandro 		 * We reuse the old ack_queue slot since the requester
2585f48ad614SDennis Dalessandro 		 * should not back up and request an earlier PSN for the
2586f48ad614SDennis Dalessandro 		 * same request.
2587f48ad614SDennis Dalessandro 		 */
2588f48ad614SDennis Dalessandro 		offset = delta_psn(psn, e->psn) * qp->pmtu;
2589f48ad614SDennis Dalessandro 		len = be32_to_cpu(reth->length);
2590f48ad614SDennis Dalessandro 		if (unlikely(offset + len != e->rdma_sge.sge_length))
2591f48ad614SDennis Dalessandro 			goto unlock_done;
2592f6f3f532SKaike Wan 		release_rdma_sge_mr(e);
2593f48ad614SDennis Dalessandro 		if (len != 0) {
2594f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2595261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2596f48ad614SDennis Dalessandro 			int ok;
2597f48ad614SDennis Dalessandro 
2598f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
2599f48ad614SDennis Dalessandro 					 IB_ACCESS_REMOTE_READ);
2600f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2601f48ad614SDennis Dalessandro 				goto unlock_done;
2602f48ad614SDennis Dalessandro 		} else {
2603f48ad614SDennis Dalessandro 			e->rdma_sge.vaddr = NULL;
2604f48ad614SDennis Dalessandro 			e->rdma_sge.length = 0;
2605f48ad614SDennis Dalessandro 			e->rdma_sge.sge_length = 0;
2606f48ad614SDennis Dalessandro 		}
2607f48ad614SDennis Dalessandro 		e->psn = psn;
2608f48ad614SDennis Dalessandro 		if (old_req)
2609f48ad614SDennis Dalessandro 			goto unlock_done;
26104f9264d1SKaike Wan 		if (qp->s_acked_ack_queue == qp->s_tail_ack_queue)
26114f9264d1SKaike Wan 			qp->s_acked_ack_queue = prev;
2612f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = prev;
2613f48ad614SDennis Dalessandro 		break;
2614f48ad614SDennis Dalessandro 	}
2615f48ad614SDennis Dalessandro 
2616f48ad614SDennis Dalessandro 	case OP(COMPARE_SWAP):
2617f48ad614SDennis Dalessandro 	case OP(FETCH_ADD): {
2618f48ad614SDennis Dalessandro 		/*
2619f48ad614SDennis Dalessandro 		 * If we didn't find the atomic request in the ack queue
2620ca00c62bSDennis Dalessandro 		 * or the send engine is already backed up to send an
2621f48ad614SDennis Dalessandro 		 * earlier entry, we can ignore this request.
2622f48ad614SDennis Dalessandro 		 */
2623f48ad614SDennis Dalessandro 		if (!e || e->opcode != (u8)opcode || old_req)
2624f48ad614SDennis Dalessandro 			goto unlock_done;
26254f9264d1SKaike Wan 		if (qp->s_tail_ack_queue == qp->s_acked_ack_queue)
26264f9264d1SKaike Wan 			qp->s_acked_ack_queue = prev;
2627f48ad614SDennis Dalessandro 		qp->s_tail_ack_queue = prev;
2628f48ad614SDennis Dalessandro 		break;
2629f48ad614SDennis Dalessandro 	}
2630f48ad614SDennis Dalessandro 
2631f48ad614SDennis Dalessandro 	default:
2632f48ad614SDennis Dalessandro 		/*
2633f48ad614SDennis Dalessandro 		 * Ignore this operation if it doesn't request an ACK
2634f48ad614SDennis Dalessandro 		 * or an earlier RDMA read or atomic is going to be resent.
2635f48ad614SDennis Dalessandro 		 */
2636f48ad614SDennis Dalessandro 		if (!(psn & IB_BTH_REQ_ACK) || old_req)
2637f48ad614SDennis Dalessandro 			goto unlock_done;
2638f48ad614SDennis Dalessandro 		/*
2639f48ad614SDennis Dalessandro 		 * Resend the most recent ACK if this request is
2640f48ad614SDennis Dalessandro 		 * after all the previous RDMA reads and atomics.
2641f48ad614SDennis Dalessandro 		 */
2642385156c5SKaike Wan 		if (mra == qp->r_head_ack_queue) {
2643f48ad614SDennis Dalessandro 			spin_unlock_irqrestore(&qp->s_lock, flags);
2644f48ad614SDennis Dalessandro 			qp->r_nak_state = 0;
2645f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn - 1;
2646f48ad614SDennis Dalessandro 			goto send_ack;
2647f48ad614SDennis Dalessandro 		}
2648f48ad614SDennis Dalessandro 
2649f48ad614SDennis Dalessandro 		/*
2650f48ad614SDennis Dalessandro 		 * Resend the RDMA read or atomic op which
2651f48ad614SDennis Dalessandro 		 * ACKs this duplicate request.
2652f48ad614SDennis Dalessandro 		 */
26534f9264d1SKaike Wan 		if (qp->s_tail_ack_queue == qp->s_acked_ack_queue)
26544f9264d1SKaike Wan 			qp->s_acked_ack_queue = mra;
2655385156c5SKaike Wan 		qp->s_tail_ack_queue = mra;
2656f48ad614SDennis Dalessandro 		break;
2657f48ad614SDennis Dalessandro 	}
2658f48ad614SDennis Dalessandro 	qp->s_ack_state = OP(ACKNOWLEDGE);
2659f48ad614SDennis Dalessandro 	qp->s_flags |= RVT_S_RESP_PENDING;
2660f48ad614SDennis Dalessandro 	qp->r_nak_state = 0;
2661f48ad614SDennis Dalessandro 	hfi1_schedule_send(qp);
2662f48ad614SDennis Dalessandro 
2663f48ad614SDennis Dalessandro unlock_done:
2664f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
2665f48ad614SDennis Dalessandro done:
2666f48ad614SDennis Dalessandro 	return 1;
2667f48ad614SDennis Dalessandro 
2668f48ad614SDennis Dalessandro send_ack:
2669f48ad614SDennis Dalessandro 	return 0;
2670f48ad614SDennis Dalessandro }
2671f48ad614SDennis Dalessandro 
log_cca_event(struct hfi1_pportdata * ppd,u8 sl,u32 rlid,u32 lqpn,u32 rqpn,u8 svc_type)2672f48ad614SDennis Dalessandro static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
2673f48ad614SDennis Dalessandro 			  u32 lqpn, u32 rqpn, u8 svc_type)
2674f48ad614SDennis Dalessandro {
2675f48ad614SDennis Dalessandro 	struct opa_hfi1_cong_log_event_internal *cc_event;
2676f48ad614SDennis Dalessandro 	unsigned long flags;
2677f48ad614SDennis Dalessandro 
2678f48ad614SDennis Dalessandro 	if (sl >= OPA_MAX_SLS)
2679f48ad614SDennis Dalessandro 		return;
2680f48ad614SDennis Dalessandro 
2681f48ad614SDennis Dalessandro 	spin_lock_irqsave(&ppd->cc_log_lock, flags);
2682f48ad614SDennis Dalessandro 
2683f48ad614SDennis Dalessandro 	ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
2684f48ad614SDennis Dalessandro 	ppd->threshold_event_counter++;
2685f48ad614SDennis Dalessandro 
2686f48ad614SDennis Dalessandro 	cc_event = &ppd->cc_events[ppd->cc_log_idx++];
2687f48ad614SDennis Dalessandro 	if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
2688f48ad614SDennis Dalessandro 		ppd->cc_log_idx = 0;
2689f48ad614SDennis Dalessandro 	cc_event->lqpn = lqpn & RVT_QPN_MASK;
2690f48ad614SDennis Dalessandro 	cc_event->rqpn = rqpn & RVT_QPN_MASK;
2691f48ad614SDennis Dalessandro 	cc_event->sl = sl;
2692f48ad614SDennis Dalessandro 	cc_event->svc_type = svc_type;
2693f48ad614SDennis Dalessandro 	cc_event->rlid = rlid;
2694f48ad614SDennis Dalessandro 	/* keep timestamp in units of 1.024 usec */
2695d61ea075SMike Marciniszyn 	cc_event->timestamp = ktime_get_ns() / 1024;
2696f48ad614SDennis Dalessandro 
2697f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
2698f48ad614SDennis Dalessandro }
2699f48ad614SDennis Dalessandro 
process_becn(struct hfi1_pportdata * ppd,u8 sl,u32 rlid,u32 lqpn,u32 rqpn,u8 svc_type)27005b6cabb0SDon Hiatt void process_becn(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, u32 lqpn,
2701f48ad614SDennis Dalessandro 		  u32 rqpn, u8 svc_type)
2702f48ad614SDennis Dalessandro {
2703f48ad614SDennis Dalessandro 	struct cca_timer *cca_timer;
2704f48ad614SDennis Dalessandro 	u16 ccti, ccti_incr, ccti_timer, ccti_limit;
2705f48ad614SDennis Dalessandro 	u8 trigger_threshold;
2706f48ad614SDennis Dalessandro 	struct cc_state *cc_state;
2707f48ad614SDennis Dalessandro 	unsigned long flags;
2708f48ad614SDennis Dalessandro 
2709f48ad614SDennis Dalessandro 	if (sl >= OPA_MAX_SLS)
2710f48ad614SDennis Dalessandro 		return;
2711f48ad614SDennis Dalessandro 
2712f48ad614SDennis Dalessandro 	cc_state = get_cc_state(ppd);
2713f48ad614SDennis Dalessandro 
2714f48ad614SDennis Dalessandro 	if (!cc_state)
2715f48ad614SDennis Dalessandro 		return;
2716f48ad614SDennis Dalessandro 
2717f48ad614SDennis Dalessandro 	/*
2718f48ad614SDennis Dalessandro 	 * 1) increase CCTI (for this SL)
2719f48ad614SDennis Dalessandro 	 * 2) select IPG (i.e., call set_link_ipg())
2720f48ad614SDennis Dalessandro 	 * 3) start timer
2721f48ad614SDennis Dalessandro 	 */
2722f48ad614SDennis Dalessandro 	ccti_limit = cc_state->cct.ccti_limit;
2723f48ad614SDennis Dalessandro 	ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
2724f48ad614SDennis Dalessandro 	ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
2725f48ad614SDennis Dalessandro 	trigger_threshold =
2726f48ad614SDennis Dalessandro 		cc_state->cong_setting.entries[sl].trigger_threshold;
2727f48ad614SDennis Dalessandro 
2728f48ad614SDennis Dalessandro 	spin_lock_irqsave(&ppd->cca_timer_lock, flags);
2729f48ad614SDennis Dalessandro 
2730f48ad614SDennis Dalessandro 	cca_timer = &ppd->cca_timer[sl];
2731f48ad614SDennis Dalessandro 	if (cca_timer->ccti < ccti_limit) {
2732f48ad614SDennis Dalessandro 		if (cca_timer->ccti + ccti_incr <= ccti_limit)
2733f48ad614SDennis Dalessandro 			cca_timer->ccti += ccti_incr;
2734f48ad614SDennis Dalessandro 		else
2735f48ad614SDennis Dalessandro 			cca_timer->ccti = ccti_limit;
2736f48ad614SDennis Dalessandro 		set_link_ipg(ppd);
2737f48ad614SDennis Dalessandro 	}
2738f48ad614SDennis Dalessandro 
2739f48ad614SDennis Dalessandro 	ccti = cca_timer->ccti;
2740f48ad614SDennis Dalessandro 
2741f48ad614SDennis Dalessandro 	if (!hrtimer_active(&cca_timer->hrtimer)) {
2742f48ad614SDennis Dalessandro 		/* ccti_timer is in units of 1.024 usec */
2743f48ad614SDennis Dalessandro 		unsigned long nsec = 1024 * ccti_timer;
2744f48ad614SDennis Dalessandro 
2745f48ad614SDennis Dalessandro 		hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
27463ce459cdSMike Marciniszyn 			      HRTIMER_MODE_REL_PINNED);
2747f48ad614SDennis Dalessandro 	}
2748f48ad614SDennis Dalessandro 
2749f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
2750f48ad614SDennis Dalessandro 
2751f48ad614SDennis Dalessandro 	if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
2752f48ad614SDennis Dalessandro 		log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
2753f48ad614SDennis Dalessandro }
2754f48ad614SDennis Dalessandro 
2755f48ad614SDennis Dalessandro /**
2756f48ad614SDennis Dalessandro  * hfi1_rc_rcv - process an incoming RC packet
27575b6cabb0SDon Hiatt  * @packet: data packet information
2758f48ad614SDennis Dalessandro  *
2759f48ad614SDennis Dalessandro  * This is called from qp_rcv() to process an incoming RC packet
2760f48ad614SDennis Dalessandro  * for the given QP.
2761f48ad614SDennis Dalessandro  * May be called at interrupt level.
2762f48ad614SDennis Dalessandro  */
hfi1_rc_rcv(struct hfi1_packet * packet)2763f48ad614SDennis Dalessandro void hfi1_rc_rcv(struct hfi1_packet *packet)
2764f48ad614SDennis Dalessandro {
2765f48ad614SDennis Dalessandro 	struct hfi1_ctxtdata *rcd = packet->rcd;
276672c07e2bSDon Hiatt 	void *data = packet->payload;
2767f48ad614SDennis Dalessandro 	u32 tlen = packet->tlen;
2768f48ad614SDennis Dalessandro 	struct rvt_qp *qp = packet->qp;
276907b92370SKaike Wan 	struct hfi1_qp_priv *qpriv = qp->priv;
2770f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
2771261a4351SMike Marciniszyn 	struct ib_other_headers *ohdr = packet->ohdr;
27729039746cSDon Hiatt 	u32 opcode = packet->opcode;
2773f48ad614SDennis Dalessandro 	u32 hdrsize = packet->hlen;
27745b6cabb0SDon Hiatt 	u32 psn = ib_bth_get_psn(packet->ohdr);
27759039746cSDon Hiatt 	u32 pad = packet->pad;
2776f48ad614SDennis Dalessandro 	struct ib_wc wc;
2777f48ad614SDennis Dalessandro 	u32 pmtu = qp->pmtu;
2778f48ad614SDennis Dalessandro 	int diff;
2779f48ad614SDennis Dalessandro 	struct ib_reth *reth;
2780f48ad614SDennis Dalessandro 	unsigned long flags;
27814608e4c8SDennis Dalessandro 	int ret;
2782fe4dd423SMitko Haralanov 	bool copy_last = false, fecn;
2783a2df0c83SJianxin Xiong 	u32 rkey;
27845b6cabb0SDon Hiatt 	u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
2785f48ad614SDennis Dalessandro 
278668e78b3dSMike Marciniszyn 	lockdep_assert_held(&qp->r_lock);
27879039746cSDon Hiatt 
27889039746cSDon Hiatt 	if (hfi1_ruc_check_hdr(ibp, packet))
2789f48ad614SDennis Dalessandro 		return;
2790f48ad614SDennis Dalessandro 
2791fe4dd423SMitko Haralanov 	fecn = process_ecn(qp, packet);
279248a615dcSKaike Wan 	opfn_trigger_conn_request(qp, be32_to_cpu(ohdr->bth[1]));
2793f48ad614SDennis Dalessandro 
2794f48ad614SDennis Dalessandro 	/*
2795f48ad614SDennis Dalessandro 	 * Process responses (ACKs) before anything else.  Note that the
2796f48ad614SDennis Dalessandro 	 * packet sequence number will be for something in the send work
2797f48ad614SDennis Dalessandro 	 * queue rather than the expected receive packet sequence number.
2798f48ad614SDennis Dalessandro 	 * In other words, this QP is the requester.
2799f48ad614SDennis Dalessandro 	 */
2800f48ad614SDennis Dalessandro 	if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
2801f48ad614SDennis Dalessandro 	    opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
28025b6cabb0SDon Hiatt 		rc_rcv_resp(packet);
2803f48ad614SDennis Dalessandro 		return;
2804f48ad614SDennis Dalessandro 	}
2805f48ad614SDennis Dalessandro 
2806f48ad614SDennis Dalessandro 	/* Compute 24 bits worth of difference. */
2807f48ad614SDennis Dalessandro 	diff = delta_psn(psn, qp->r_psn);
2808f48ad614SDennis Dalessandro 	if (unlikely(diff)) {
2809f48ad614SDennis Dalessandro 		if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
2810f48ad614SDennis Dalessandro 			return;
2811f48ad614SDennis Dalessandro 		goto send_ack;
2812f48ad614SDennis Dalessandro 	}
2813f48ad614SDennis Dalessandro 
2814f48ad614SDennis Dalessandro 	/* Check for opcode sequence errors. */
2815f48ad614SDennis Dalessandro 	switch (qp->r_state) {
2816f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
2817f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
2818f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_MIDDLE) ||
2819f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST) ||
2820a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
2821a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_INVALIDATE))
2822f48ad614SDennis Dalessandro 			break;
2823f48ad614SDennis Dalessandro 		goto nack_inv;
2824f48ad614SDennis Dalessandro 
2825f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
2826f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
2827f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_MIDDLE) ||
2828f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST) ||
2829f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2830f48ad614SDennis Dalessandro 			break;
2831f48ad614SDennis Dalessandro 		goto nack_inv;
2832f48ad614SDennis Dalessandro 
2833f48ad614SDennis Dalessandro 	default:
2834f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_MIDDLE) ||
2835f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST) ||
2836f48ad614SDennis Dalessandro 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
2837a2df0c83SJianxin Xiong 		    opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
2838f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_MIDDLE) ||
2839f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST) ||
2840f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2841f48ad614SDennis Dalessandro 			goto nack_inv;
2842f48ad614SDennis Dalessandro 		/*
2843f48ad614SDennis Dalessandro 		 * Note that it is up to the requester to not send a new
2844f48ad614SDennis Dalessandro 		 * RDMA read or atomic operation before receiving an ACK
2845f48ad614SDennis Dalessandro 		 * for the previous operation.
2846f48ad614SDennis Dalessandro 		 */
2847f48ad614SDennis Dalessandro 		break;
2848f48ad614SDennis Dalessandro 	}
2849f48ad614SDennis Dalessandro 
2850f48ad614SDennis Dalessandro 	if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
2851beb5a042SBrian Welty 		rvt_comm_est(qp);
2852f48ad614SDennis Dalessandro 
2853f48ad614SDennis Dalessandro 	/* OK, process the packet. */
2854f48ad614SDennis Dalessandro 	switch (opcode) {
2855f48ad614SDennis Dalessandro 	case OP(SEND_FIRST):
2856832369faSBrian Welty 		ret = rvt_get_rwqe(qp, false);
2857f48ad614SDennis Dalessandro 		if (ret < 0)
2858f48ad614SDennis Dalessandro 			goto nack_op_err;
2859f48ad614SDennis Dalessandro 		if (!ret)
2860f48ad614SDennis Dalessandro 			goto rnr_nak;
2861f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
28626f24b159SGustavo A. R. Silva 		fallthrough;
2863f48ad614SDennis Dalessandro 	case OP(SEND_MIDDLE):
2864f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_MIDDLE):
2865f48ad614SDennis Dalessandro send_middle:
2866f48ad614SDennis Dalessandro 		/* Check for invalid length PMTU or posted rwqe len. */
28675b6cabb0SDon Hiatt 		/*
28685b6cabb0SDon Hiatt 		 * There will be no padding for 9B packet but 16B packets
28695b6cabb0SDon Hiatt 		 * will come in with some padding since we always add
28705b6cabb0SDon Hiatt 		 * CRC and LT bytes which will need to be flit aligned
28715b6cabb0SDon Hiatt 		 */
28725b6cabb0SDon Hiatt 		if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
2873f48ad614SDennis Dalessandro 			goto nack_inv;
2874f48ad614SDennis Dalessandro 		qp->r_rcv_len += pmtu;
2875f48ad614SDennis Dalessandro 		if (unlikely(qp->r_rcv_len > qp->r_len))
2876f48ad614SDennis Dalessandro 			goto nack_inv;
2877019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->r_sge, data, pmtu, true, false);
2878f48ad614SDennis Dalessandro 		break;
2879f48ad614SDennis Dalessandro 
2880f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
2881f48ad614SDennis Dalessandro 		/* consume RWQE */
2882832369faSBrian Welty 		ret = rvt_get_rwqe(qp, true);
2883f48ad614SDennis Dalessandro 		if (ret < 0)
2884f48ad614SDennis Dalessandro 			goto nack_op_err;
2885f48ad614SDennis Dalessandro 		if (!ret)
2886f48ad614SDennis Dalessandro 			goto rnr_nak;
2887f48ad614SDennis Dalessandro 		goto send_last_imm;
2888f48ad614SDennis Dalessandro 
2889f48ad614SDennis Dalessandro 	case OP(SEND_ONLY):
2890f48ad614SDennis Dalessandro 	case OP(SEND_ONLY_WITH_IMMEDIATE):
2891a2df0c83SJianxin Xiong 	case OP(SEND_ONLY_WITH_INVALIDATE):
2892832369faSBrian Welty 		ret = rvt_get_rwqe(qp, false);
2893f48ad614SDennis Dalessandro 		if (ret < 0)
2894f48ad614SDennis Dalessandro 			goto nack_op_err;
2895f48ad614SDennis Dalessandro 		if (!ret)
2896f48ad614SDennis Dalessandro 			goto rnr_nak;
2897f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2898f48ad614SDennis Dalessandro 		if (opcode == OP(SEND_ONLY))
2899f48ad614SDennis Dalessandro 			goto no_immediate_data;
2900a2df0c83SJianxin Xiong 		if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
2901a2df0c83SJianxin Xiong 			goto send_last_inv;
29026f24b159SGustavo A. R. Silva 		fallthrough;	/* for SEND_ONLY_WITH_IMMEDIATE */
2903f48ad614SDennis Dalessandro 	case OP(SEND_LAST_WITH_IMMEDIATE):
2904f48ad614SDennis Dalessandro send_last_imm:
2905f48ad614SDennis Dalessandro 		wc.ex.imm_data = ohdr->u.imm_data;
2906f48ad614SDennis Dalessandro 		wc.wc_flags = IB_WC_WITH_IMM;
2907f48ad614SDennis Dalessandro 		goto send_last;
2908a2df0c83SJianxin Xiong 	case OP(SEND_LAST_WITH_INVALIDATE):
2909a2df0c83SJianxin Xiong send_last_inv:
2910a2df0c83SJianxin Xiong 		rkey = be32_to_cpu(ohdr->u.ieth);
2911a2df0c83SJianxin Xiong 		if (rvt_invalidate_rkey(qp, rkey))
2912a2df0c83SJianxin Xiong 			goto no_immediate_data;
2913a2df0c83SJianxin Xiong 		wc.ex.invalidate_rkey = rkey;
2914a2df0c83SJianxin Xiong 		wc.wc_flags = IB_WC_WITH_INVALIDATE;
2915a2df0c83SJianxin Xiong 		goto send_last;
2916f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_LAST):
29170128fceaSBrian Welty 		copy_last = rvt_is_user_qp(qp);
29186f24b159SGustavo A. R. Silva 		fallthrough;
2919f48ad614SDennis Dalessandro 	case OP(SEND_LAST):
2920f48ad614SDennis Dalessandro no_immediate_data:
2921f48ad614SDennis Dalessandro 		wc.wc_flags = 0;
2922f48ad614SDennis Dalessandro 		wc.ex.imm_data = 0;
2923f48ad614SDennis Dalessandro send_last:
2924f48ad614SDennis Dalessandro 		/* Check for invalid length. */
2925f48ad614SDennis Dalessandro 		/* LAST len should be >= 1 */
29265b6cabb0SDon Hiatt 		if (unlikely(tlen < (hdrsize + extra_bytes)))
2927f48ad614SDennis Dalessandro 			goto nack_inv;
29285b6cabb0SDon Hiatt 		/* Don't count the CRC(and padding and LT byte for 16B). */
29295b6cabb0SDon Hiatt 		tlen -= (hdrsize + extra_bytes);
2930f48ad614SDennis Dalessandro 		wc.byte_len = tlen + qp->r_rcv_len;
2931f48ad614SDennis Dalessandro 		if (unlikely(wc.byte_len > qp->r_len))
2932f48ad614SDennis Dalessandro 			goto nack_inv;
2933019f118bSBrian Welty 		rvt_copy_sge(qp, &qp->r_sge, data, tlen, true, copy_last);
2934f48ad614SDennis Dalessandro 		rvt_put_ss(&qp->r_sge);
2935f48ad614SDennis Dalessandro 		qp->r_msn++;
293653e91d26SSebastian Sanchez 		if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
2937f48ad614SDennis Dalessandro 			break;
2938f48ad614SDennis Dalessandro 		wc.wr_id = qp->r_wr_id;
2939f48ad614SDennis Dalessandro 		wc.status = IB_WC_SUCCESS;
2940f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2941f48ad614SDennis Dalessandro 		    opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2942f48ad614SDennis Dalessandro 			wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2943f48ad614SDennis Dalessandro 		else
2944f48ad614SDennis Dalessandro 			wc.opcode = IB_WC_RECV;
2945f48ad614SDennis Dalessandro 		wc.qp = &qp->ibqp;
2946f48ad614SDennis Dalessandro 		wc.src_qp = qp->remote_qpn;
2947b64581adSDon Hiatt 		wc.slid = rdma_ah_get_dlid(&qp->remote_ah_attr) & U16_MAX;
2948f48ad614SDennis Dalessandro 		/*
2949f48ad614SDennis Dalessandro 		 * It seems that IB mandates the presence of an SL in a
2950f48ad614SDennis Dalessandro 		 * work completion only for the UD transport (see section
2951f48ad614SDennis Dalessandro 		 * 11.4.2 of IBTA Vol. 1).
2952f48ad614SDennis Dalessandro 		 *
2953f48ad614SDennis Dalessandro 		 * However, the way the SL is chosen below is consistent
2954f48ad614SDennis Dalessandro 		 * with the way that IB/qib works and is trying avoid
2955f48ad614SDennis Dalessandro 		 * introducing incompatibilities.
2956f48ad614SDennis Dalessandro 		 *
2957f48ad614SDennis Dalessandro 		 * See also OPA Vol. 1, section 9.7.6, and table 9-17.
2958f48ad614SDennis Dalessandro 		 */
2959d8966fcdSDasaratharaman Chandramouli 		wc.sl = rdma_ah_get_sl(&qp->remote_ah_attr);
2960f48ad614SDennis Dalessandro 		/* zero fields that are N/A */
2961f48ad614SDennis Dalessandro 		wc.vendor_err = 0;
2962f48ad614SDennis Dalessandro 		wc.pkey_index = 0;
2963f48ad614SDennis Dalessandro 		wc.dlid_path_bits = 0;
2964f48ad614SDennis Dalessandro 		wc.port_num = 0;
2965f48ad614SDennis Dalessandro 		/* Signal completion event if the solicited bit is set. */
29665136bfeaSKamenee Arumugam 		rvt_recv_cq(qp, &wc, ib_bth_is_solicited(ohdr));
2967f48ad614SDennis Dalessandro 		break;
2968f48ad614SDennis Dalessandro 
2969f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_ONLY):
29700128fceaSBrian Welty 		copy_last = rvt_is_user_qp(qp);
29716f24b159SGustavo A. R. Silva 		fallthrough;
2972f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_FIRST):
2973f48ad614SDennis Dalessandro 	case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2974f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2975f48ad614SDennis Dalessandro 			goto nack_inv;
2976f48ad614SDennis Dalessandro 		/* consume RWQE */
2977f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
2978f48ad614SDennis Dalessandro 		qp->r_len = be32_to_cpu(reth->length);
2979f48ad614SDennis Dalessandro 		qp->r_rcv_len = 0;
2980f48ad614SDennis Dalessandro 		qp->r_sge.sg_list = NULL;
2981f48ad614SDennis Dalessandro 		if (qp->r_len != 0) {
2982f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
2983261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
2984f48ad614SDennis Dalessandro 			int ok;
2985f48ad614SDennis Dalessandro 
2986f48ad614SDennis Dalessandro 			/* Check rkey & NAK */
2987f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2988f48ad614SDennis Dalessandro 					 rkey, IB_ACCESS_REMOTE_WRITE);
2989f48ad614SDennis Dalessandro 			if (unlikely(!ok))
2990f48ad614SDennis Dalessandro 				goto nack_acc;
2991f48ad614SDennis Dalessandro 			qp->r_sge.num_sge = 1;
2992f48ad614SDennis Dalessandro 		} else {
2993f48ad614SDennis Dalessandro 			qp->r_sge.num_sge = 0;
2994f48ad614SDennis Dalessandro 			qp->r_sge.sge.mr = NULL;
2995f48ad614SDennis Dalessandro 			qp->r_sge.sge.vaddr = NULL;
2996f48ad614SDennis Dalessandro 			qp->r_sge.sge.length = 0;
2997f48ad614SDennis Dalessandro 			qp->r_sge.sge.sge_length = 0;
2998f48ad614SDennis Dalessandro 		}
2999f48ad614SDennis Dalessandro 		if (opcode == OP(RDMA_WRITE_FIRST))
3000f48ad614SDennis Dalessandro 			goto send_middle;
3001f48ad614SDennis Dalessandro 		else if (opcode == OP(RDMA_WRITE_ONLY))
3002f48ad614SDennis Dalessandro 			goto no_immediate_data;
3003832369faSBrian Welty 		ret = rvt_get_rwqe(qp, true);
3004f48ad614SDennis Dalessandro 		if (ret < 0)
3005f48ad614SDennis Dalessandro 			goto nack_op_err;
30061feb4006SMike Marciniszyn 		if (!ret) {
30071feb4006SMike Marciniszyn 			/* peer will send again */
30081feb4006SMike Marciniszyn 			rvt_put_ss(&qp->r_sge);
3009f48ad614SDennis Dalessandro 			goto rnr_nak;
30101feb4006SMike Marciniszyn 		}
3011f48ad614SDennis Dalessandro 		wc.ex.imm_data = ohdr->u.rc.imm_data;
3012f48ad614SDennis Dalessandro 		wc.wc_flags = IB_WC_WITH_IMM;
3013f48ad614SDennis Dalessandro 		goto send_last;
3014f48ad614SDennis Dalessandro 
3015f48ad614SDennis Dalessandro 	case OP(RDMA_READ_REQUEST): {
3016f48ad614SDennis Dalessandro 		struct rvt_ack_entry *e;
3017f48ad614SDennis Dalessandro 		u32 len;
3018f48ad614SDennis Dalessandro 		u8 next;
3019f48ad614SDennis Dalessandro 
3020f48ad614SDennis Dalessandro 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
3021f48ad614SDennis Dalessandro 			goto nack_inv;
3022f48ad614SDennis Dalessandro 		next = qp->r_head_ack_queue + 1;
3023ddf922c3SKaike Wan 		/* s_ack_queue is size rvt_size_atomic()+1 so use > not >= */
3024ddf922c3SKaike Wan 		if (next > rvt_size_atomic(ib_to_rvt(qp->ibqp.device)))
3025f48ad614SDennis Dalessandro 			next = 0;
3026f48ad614SDennis Dalessandro 		spin_lock_irqsave(&qp->s_lock, flags);
30274f9264d1SKaike Wan 		if (unlikely(next == qp->s_acked_ack_queue)) {
3028f48ad614SDennis Dalessandro 			if (!qp->s_ack_queue[next].sent)
3029f48ad614SDennis Dalessandro 				goto nack_inv_unlck;
3030f48ad614SDennis Dalessandro 			update_ack_queue(qp, next);
3031f48ad614SDennis Dalessandro 		}
3032f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->r_head_ack_queue];
3033f6f3f532SKaike Wan 		release_rdma_sge_mr(e);
3034f48ad614SDennis Dalessandro 		reth = &ohdr->u.rc.reth;
3035f48ad614SDennis Dalessandro 		len = be32_to_cpu(reth->length);
3036f48ad614SDennis Dalessandro 		if (len) {
3037f48ad614SDennis Dalessandro 			u32 rkey = be32_to_cpu(reth->rkey);
3038261a4351SMike Marciniszyn 			u64 vaddr = get_ib_reth_vaddr(reth);
3039f48ad614SDennis Dalessandro 			int ok;
3040f48ad614SDennis Dalessandro 
3041f48ad614SDennis Dalessandro 			/* Check rkey & NAK */
3042f48ad614SDennis Dalessandro 			ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
3043f48ad614SDennis Dalessandro 					 rkey, IB_ACCESS_REMOTE_READ);
3044f48ad614SDennis Dalessandro 			if (unlikely(!ok))
3045f48ad614SDennis Dalessandro 				goto nack_acc_unlck;
3046f48ad614SDennis Dalessandro 			/*
3047f48ad614SDennis Dalessandro 			 * Update the next expected PSN.  We add 1 later
3048f48ad614SDennis Dalessandro 			 * below, so only add the remainder here.
3049f48ad614SDennis Dalessandro 			 */
30505dc80605SMike Marciniszyn 			qp->r_psn += rvt_div_mtu(qp, len - 1);
3051f48ad614SDennis Dalessandro 		} else {
3052f48ad614SDennis Dalessandro 			e->rdma_sge.mr = NULL;
3053f48ad614SDennis Dalessandro 			e->rdma_sge.vaddr = NULL;
3054f48ad614SDennis Dalessandro 			e->rdma_sge.length = 0;
3055f48ad614SDennis Dalessandro 			e->rdma_sge.sge_length = 0;
3056f48ad614SDennis Dalessandro 		}
3057f48ad614SDennis Dalessandro 		e->opcode = opcode;
3058f48ad614SDennis Dalessandro 		e->sent = 0;
3059f48ad614SDennis Dalessandro 		e->psn = psn;
3060f48ad614SDennis Dalessandro 		e->lpsn = qp->r_psn;
3061f48ad614SDennis Dalessandro 		/*
3062f48ad614SDennis Dalessandro 		 * We need to increment the MSN here instead of when we
3063f48ad614SDennis Dalessandro 		 * finish sending the result since a duplicate request would
3064f48ad614SDennis Dalessandro 		 * increment it more than once.
3065f48ad614SDennis Dalessandro 		 */
3066f48ad614SDennis Dalessandro 		qp->r_msn++;
3067f48ad614SDennis Dalessandro 		qp->r_psn++;
3068f48ad614SDennis Dalessandro 		qp->r_state = opcode;
3069f48ad614SDennis Dalessandro 		qp->r_nak_state = 0;
3070f48ad614SDennis Dalessandro 		qp->r_head_ack_queue = next;
307107b92370SKaike Wan 		qpriv->r_tid_alloc = qp->r_head_ack_queue;
3072f48ad614SDennis Dalessandro 
3073ca00c62bSDennis Dalessandro 		/* Schedule the send engine. */
3074f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_RESP_PENDING;
3075fe4dd423SMitko Haralanov 		if (fecn)
3076fe4dd423SMitko Haralanov 			qp->s_flags |= RVT_S_ECN;
3077f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
3078f48ad614SDennis Dalessandro 
3079f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
3080f48ad614SDennis Dalessandro 		return;
3081f48ad614SDennis Dalessandro 	}
3082f48ad614SDennis Dalessandro 
3083f48ad614SDennis Dalessandro 	case OP(COMPARE_SWAP):
3084f48ad614SDennis Dalessandro 	case OP(FETCH_ADD): {
308548a615dcSKaike Wan 		struct ib_atomic_eth *ateth = &ohdr->u.atomic_eth;
308648a615dcSKaike Wan 		u64 vaddr = get_ib_ateth_vaddr(ateth);
308748a615dcSKaike Wan 		bool opfn = opcode == OP(COMPARE_SWAP) &&
308848a615dcSKaike Wan 			vaddr == HFI1_VERBS_E_ATOMIC_VADDR;
3089f48ad614SDennis Dalessandro 		struct rvt_ack_entry *e;
3090f48ad614SDennis Dalessandro 		atomic64_t *maddr;
3091f48ad614SDennis Dalessandro 		u64 sdata;
3092f48ad614SDennis Dalessandro 		u32 rkey;
3093f48ad614SDennis Dalessandro 		u8 next;
3094f48ad614SDennis Dalessandro 
309548a615dcSKaike Wan 		if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
309648a615dcSKaike Wan 			     !opfn))
3097f48ad614SDennis Dalessandro 			goto nack_inv;
3098f48ad614SDennis Dalessandro 		next = qp->r_head_ack_queue + 1;
3099ddf922c3SKaike Wan 		if (next > rvt_size_atomic(ib_to_rvt(qp->ibqp.device)))
3100f48ad614SDennis Dalessandro 			next = 0;
3101f48ad614SDennis Dalessandro 		spin_lock_irqsave(&qp->s_lock, flags);
31024f9264d1SKaike Wan 		if (unlikely(next == qp->s_acked_ack_queue)) {
3103f48ad614SDennis Dalessandro 			if (!qp->s_ack_queue[next].sent)
3104f48ad614SDennis Dalessandro 				goto nack_inv_unlck;
3105f48ad614SDennis Dalessandro 			update_ack_queue(qp, next);
3106f48ad614SDennis Dalessandro 		}
3107f48ad614SDennis Dalessandro 		e = &qp->s_ack_queue[qp->r_head_ack_queue];
3108f6f3f532SKaike Wan 		release_rdma_sge_mr(e);
310948a615dcSKaike Wan 		/* Process OPFN special virtual address */
311048a615dcSKaike Wan 		if (opfn) {
311148a615dcSKaike Wan 			opfn_conn_response(qp, e, ateth);
311248a615dcSKaike Wan 			goto ack;
311348a615dcSKaike Wan 		}
3114f48ad614SDennis Dalessandro 		if (unlikely(vaddr & (sizeof(u64) - 1)))
3115f48ad614SDennis Dalessandro 			goto nack_inv_unlck;
3116f48ad614SDennis Dalessandro 		rkey = be32_to_cpu(ateth->rkey);
3117f48ad614SDennis Dalessandro 		/* Check rkey & NAK */
3118f48ad614SDennis Dalessandro 		if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
3119f48ad614SDennis Dalessandro 					  vaddr, rkey,
3120f48ad614SDennis Dalessandro 					  IB_ACCESS_REMOTE_ATOMIC)))
3121f48ad614SDennis Dalessandro 			goto nack_acc_unlck;
3122f48ad614SDennis Dalessandro 		/* Perform atomic OP and save result. */
3123f48ad614SDennis Dalessandro 		maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
3124261a4351SMike Marciniszyn 		sdata = get_ib_ateth_swap(ateth);
3125f48ad614SDennis Dalessandro 		e->atomic_data = (opcode == OP(FETCH_ADD)) ?
3126f48ad614SDennis Dalessandro 			(u64)atomic64_add_return(sdata, maddr) - sdata :
3127f48ad614SDennis Dalessandro 			(u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
3128261a4351SMike Marciniszyn 				      get_ib_ateth_compare(ateth),
3129f48ad614SDennis Dalessandro 				      sdata);
3130f48ad614SDennis Dalessandro 		rvt_put_mr(qp->r_sge.sge.mr);
3131f48ad614SDennis Dalessandro 		qp->r_sge.num_sge = 0;
313248a615dcSKaike Wan ack:
3133f48ad614SDennis Dalessandro 		e->opcode = opcode;
3134f48ad614SDennis Dalessandro 		e->sent = 0;
3135f48ad614SDennis Dalessandro 		e->psn = psn;
3136f48ad614SDennis Dalessandro 		e->lpsn = psn;
3137f48ad614SDennis Dalessandro 		qp->r_msn++;
3138f48ad614SDennis Dalessandro 		qp->r_psn++;
3139f48ad614SDennis Dalessandro 		qp->r_state = opcode;
3140f48ad614SDennis Dalessandro 		qp->r_nak_state = 0;
3141f48ad614SDennis Dalessandro 		qp->r_head_ack_queue = next;
314207b92370SKaike Wan 		qpriv->r_tid_alloc = qp->r_head_ack_queue;
3143f48ad614SDennis Dalessandro 
3144ca00c62bSDennis Dalessandro 		/* Schedule the send engine. */
3145f48ad614SDennis Dalessandro 		qp->s_flags |= RVT_S_RESP_PENDING;
3146fe4dd423SMitko Haralanov 		if (fecn)
3147fe4dd423SMitko Haralanov 			qp->s_flags |= RVT_S_ECN;
3148f48ad614SDennis Dalessandro 		hfi1_schedule_send(qp);
3149f48ad614SDennis Dalessandro 
3150f48ad614SDennis Dalessandro 		spin_unlock_irqrestore(&qp->s_lock, flags);
3151f48ad614SDennis Dalessandro 		return;
3152f48ad614SDennis Dalessandro 	}
3153f48ad614SDennis Dalessandro 
3154f48ad614SDennis Dalessandro 	default:
3155f48ad614SDennis Dalessandro 		/* NAK unknown opcodes. */
3156f48ad614SDennis Dalessandro 		goto nack_inv;
3157f48ad614SDennis Dalessandro 	}
3158f48ad614SDennis Dalessandro 	qp->r_psn++;
3159f48ad614SDennis Dalessandro 	qp->r_state = opcode;
3160f48ad614SDennis Dalessandro 	qp->r_ack_psn = psn;
3161f48ad614SDennis Dalessandro 	qp->r_nak_state = 0;
3162f48ad614SDennis Dalessandro 	/* Send an ACK if requested or required. */
3163fe4dd423SMitko Haralanov 	if (psn & IB_BTH_REQ_ACK || fecn) {
3164fe4dd423SMitko Haralanov 		if (packet->numpkt == 0 || fecn ||
3165fe4dd423SMitko Haralanov 		    qp->r_adefered >= HFI1_PSN_CREDIT) {
3166f48ad614SDennis Dalessandro 			rc_cancel_ack(qp);
3167f48ad614SDennis Dalessandro 			goto send_ack;
3168f48ad614SDennis Dalessandro 		}
3169688f21c0SMike Marciniszyn 		qp->r_adefered++;
3170f48ad614SDennis Dalessandro 		rc_defered_ack(rcd, qp);
3171f48ad614SDennis Dalessandro 	}
3172f48ad614SDennis Dalessandro 	return;
3173f48ad614SDennis Dalessandro 
3174f48ad614SDennis Dalessandro rnr_nak:
3175f48ad614SDennis Dalessandro 	qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
3176f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
3177f48ad614SDennis Dalessandro 	/* Queue RNR NAK for later */
3178f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
3179f48ad614SDennis Dalessandro 	return;
3180f48ad614SDennis Dalessandro 
3181f48ad614SDennis Dalessandro nack_op_err:
3182beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
3183f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
3184f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
3185f48ad614SDennis Dalessandro 	/* Queue NAK for later */
3186f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
3187f48ad614SDennis Dalessandro 	return;
3188f48ad614SDennis Dalessandro 
3189f48ad614SDennis Dalessandro nack_inv_unlck:
3190f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
3191f48ad614SDennis Dalessandro nack_inv:
3192beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
3193f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_INVALID_REQUEST;
3194f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
3195f48ad614SDennis Dalessandro 	/* Queue NAK for later */
3196f48ad614SDennis Dalessandro 	rc_defered_ack(rcd, qp);
3197f48ad614SDennis Dalessandro 	return;
3198f48ad614SDennis Dalessandro 
3199f48ad614SDennis Dalessandro nack_acc_unlck:
3200f48ad614SDennis Dalessandro 	spin_unlock_irqrestore(&qp->s_lock, flags);
3201f48ad614SDennis Dalessandro nack_acc:
3202beb5a042SBrian Welty 	rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
3203f48ad614SDennis Dalessandro 	qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
3204f48ad614SDennis Dalessandro 	qp->r_ack_psn = qp->r_psn;
3205f48ad614SDennis Dalessandro send_ack:
3206fe4dd423SMitko Haralanov 	hfi1_send_rc_ack(packet, fecn);
3207f48ad614SDennis Dalessandro }
3208f48ad614SDennis Dalessandro 
hfi1_rc_hdrerr(struct hfi1_ctxtdata * rcd,struct hfi1_packet * packet,struct rvt_qp * qp)3209f48ad614SDennis Dalessandro void hfi1_rc_hdrerr(
3210f48ad614SDennis Dalessandro 	struct hfi1_ctxtdata *rcd,
32119039746cSDon Hiatt 	struct hfi1_packet *packet,
3212f48ad614SDennis Dalessandro 	struct rvt_qp *qp)
3213f48ad614SDennis Dalessandro {
3214f3e862cbSSebastian Sanchez 	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
3215f48ad614SDennis Dalessandro 	int diff;
3216f48ad614SDennis Dalessandro 	u32 opcode;
32179039746cSDon Hiatt 	u32 psn;
3218f48ad614SDennis Dalessandro 
32199039746cSDon Hiatt 	if (hfi1_ruc_check_hdr(ibp, packet))
3220f48ad614SDennis Dalessandro 		return;
3221f48ad614SDennis Dalessandro 
32229039746cSDon Hiatt 	psn = ib_bth_get_psn(packet->ohdr);
32239039746cSDon Hiatt 	opcode = ib_bth_get_opcode(packet->ohdr);
3224f48ad614SDennis Dalessandro 
3225f48ad614SDennis Dalessandro 	/* Only deal with RDMA Writes for now */
3226f48ad614SDennis Dalessandro 	if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
3227f48ad614SDennis Dalessandro 		diff = delta_psn(psn, qp->r_psn);
3228f48ad614SDennis Dalessandro 		if (!qp->r_nak_state && diff >= 0) {
3229f48ad614SDennis Dalessandro 			ibp->rvp.n_rc_seqnak++;
3230f48ad614SDennis Dalessandro 			qp->r_nak_state = IB_NAK_PSN_ERROR;
3231f48ad614SDennis Dalessandro 			/* Use the expected PSN. */
3232f48ad614SDennis Dalessandro 			qp->r_ack_psn = qp->r_psn;
3233f48ad614SDennis Dalessandro 			/*
3234f48ad614SDennis Dalessandro 			 * Wait to send the sequence
3235f48ad614SDennis Dalessandro 			 * NAK until all packets
3236f48ad614SDennis Dalessandro 			 * in the receive queue have
3237f48ad614SDennis Dalessandro 			 * been processed.
3238f48ad614SDennis Dalessandro 			 * Otherwise, we end up
3239f48ad614SDennis Dalessandro 			 * propagating congestion.
3240f48ad614SDennis Dalessandro 			 */
3241f48ad614SDennis Dalessandro 			rc_defered_ack(rcd, qp);
3242f48ad614SDennis Dalessandro 		} /* Out of sequence NAK */
3243f48ad614SDennis Dalessandro 	} /* QP Request NAKs */
3244f48ad614SDennis Dalessandro }
3245