xref: /openbmc/linux/drivers/infiniband/hw/hfi1/qp.h (revision 572f0c33)
1f48ad614SDennis Dalessandro #ifndef _QP_H
2f48ad614SDennis Dalessandro #define _QP_H
3f48ad614SDennis Dalessandro /*
42e2ba09eSMike Marciniszyn  * Copyright(c) 2015 - 2018 Intel Corporation.
5f48ad614SDennis Dalessandro  *
6f48ad614SDennis Dalessandro  * This file is provided under a dual BSD/GPLv2 license.  When using or
7f48ad614SDennis Dalessandro  * redistributing this file, you may do so under either license.
8f48ad614SDennis Dalessandro  *
9f48ad614SDennis Dalessandro  * GPL LICENSE SUMMARY
10f48ad614SDennis Dalessandro  *
11f48ad614SDennis Dalessandro  * This program is free software; you can redistribute it and/or modify
12f48ad614SDennis Dalessandro  * it under the terms of version 2 of the GNU General Public License as
13f48ad614SDennis Dalessandro  * published by the Free Software Foundation.
14f48ad614SDennis Dalessandro  *
15f48ad614SDennis Dalessandro  * This program is distributed in the hope that it will be useful, but
16f48ad614SDennis Dalessandro  * WITHOUT ANY WARRANTY; without even the implied warranty of
17f48ad614SDennis Dalessandro  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18f48ad614SDennis Dalessandro  * General Public License for more details.
19f48ad614SDennis Dalessandro  *
20f48ad614SDennis Dalessandro  * BSD LICENSE
21f48ad614SDennis Dalessandro  *
22f48ad614SDennis Dalessandro  * Redistribution and use in source and binary forms, with or without
23f48ad614SDennis Dalessandro  * modification, are permitted provided that the following conditions
24f48ad614SDennis Dalessandro  * are met:
25f48ad614SDennis Dalessandro  *
26f48ad614SDennis Dalessandro  *  - Redistributions of source code must retain the above copyright
27f48ad614SDennis Dalessandro  *    notice, this list of conditions and the following disclaimer.
28f48ad614SDennis Dalessandro  *  - Redistributions in binary form must reproduce the above copyright
29f48ad614SDennis Dalessandro  *    notice, this list of conditions and the following disclaimer in
30f48ad614SDennis Dalessandro  *    the documentation and/or other materials provided with the
31f48ad614SDennis Dalessandro  *    distribution.
32f48ad614SDennis Dalessandro  *  - Neither the name of Intel Corporation nor the names of its
33f48ad614SDennis Dalessandro  *    contributors may be used to endorse or promote products derived
34f48ad614SDennis Dalessandro  *    from this software without specific prior written permission.
35f48ad614SDennis Dalessandro  *
36f48ad614SDennis Dalessandro  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37f48ad614SDennis Dalessandro  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38f48ad614SDennis Dalessandro  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
39f48ad614SDennis Dalessandro  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
40f48ad614SDennis Dalessandro  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
41f48ad614SDennis Dalessandro  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
42f48ad614SDennis Dalessandro  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
43f48ad614SDennis Dalessandro  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
44f48ad614SDennis Dalessandro  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
45f48ad614SDennis Dalessandro  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
46f48ad614SDennis Dalessandro  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47f48ad614SDennis Dalessandro  *
48f48ad614SDennis Dalessandro  */
49f48ad614SDennis Dalessandro 
50f48ad614SDennis Dalessandro #include <linux/hash.h>
51f48ad614SDennis Dalessandro #include <rdma/rdmavt_qp.h>
52f48ad614SDennis Dalessandro #include "verbs.h"
53f48ad614SDennis Dalessandro #include "sdma.h"
549636258fSMitko Haralanov #include "verbs_txreq.h"
55f48ad614SDennis Dalessandro 
56f48ad614SDennis Dalessandro extern unsigned int hfi1_qp_table_size;
57f48ad614SDennis Dalessandro 
581ac57c50SMike Marciniszyn extern const struct rvt_operation_params hfi1_post_parms[];
591ac57c50SMike Marciniszyn 
60f48ad614SDennis Dalessandro /*
612e2ba09eSMike Marciniszyn  * Driver specific s_flags starting at bit 31 down to HFI1_S_MIN_BIT_MASK
622e2ba09eSMike Marciniszyn  *
632e2ba09eSMike Marciniszyn  * HFI1_S_AHG_VALID - ahg header valid on chip
642e2ba09eSMike Marciniszyn  * HFI1_S_AHG_CLEAR - have send engine clear ahg state
652e2ba09eSMike Marciniszyn  * HFI1_S_WAIT_PIO_DRAIN - qp waiting for PIOs to drain
6637356e78SKaike Wan  * HFI1_S_WAIT_TID_SPACE - a QP is waiting for TID resource
67c098bbb0SKaike Wan  * HFI1_S_WAIT_TID_RESP - waiting for a TID RDMA WRITE response
689e93e967SKaike Wan  * HFI1_S_WAIT_HALT - halt the first leg send engine
692e2ba09eSMike Marciniszyn  * HFI1_S_MIN_BIT_MASK - the lowest bit that can be used by hfi1
702e2ba09eSMike Marciniszyn  */
712e2ba09eSMike Marciniszyn #define HFI1_S_AHG_VALID         0x80000000
722e2ba09eSMike Marciniszyn #define HFI1_S_AHG_CLEAR         0x40000000
732e2ba09eSMike Marciniszyn #define HFI1_S_WAIT_PIO_DRAIN    0x20000000
7437356e78SKaike Wan #define HFI1_S_WAIT_TID_SPACE    0x10000000
75c098bbb0SKaike Wan #define HFI1_S_WAIT_TID_RESP     0x08000000
769e93e967SKaike Wan #define HFI1_S_WAIT_HALT         0x04000000
772e2ba09eSMike Marciniszyn #define HFI1_S_MIN_BIT_MASK      0x01000000
782e2ba09eSMike Marciniszyn 
792e2ba09eSMike Marciniszyn /*
802e2ba09eSMike Marciniszyn  * overload wait defines
812e2ba09eSMike Marciniszyn  */
822e2ba09eSMike Marciniszyn 
832e2ba09eSMike Marciniszyn #define HFI1_S_ANY_WAIT_IO (RVT_S_ANY_WAIT_IO | HFI1_S_WAIT_PIO_DRAIN)
842e2ba09eSMike Marciniszyn #define HFI1_S_ANY_WAIT (HFI1_S_ANY_WAIT_IO | RVT_S_ANY_WAIT_SEND)
85572f0c33SKaike Wan #define HFI1_S_ANY_TID_WAIT_SEND (RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_DMA)
862e2ba09eSMike Marciniszyn 
872e2ba09eSMike Marciniszyn /*
885da0fc9dSDennis Dalessandro  * Send if not busy or waiting for I/O and either
895da0fc9dSDennis Dalessandro  * a RC response is pending or we can process send work requests.
905da0fc9dSDennis Dalessandro  */
915da0fc9dSDennis Dalessandro static inline int hfi1_send_ok(struct rvt_qp *qp)
925da0fc9dSDennis Dalessandro {
935da0fc9dSDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
945da0fc9dSDennis Dalessandro 
955da0fc9dSDennis Dalessandro 	return !(qp->s_flags & (RVT_S_BUSY | HFI1_S_ANY_WAIT_IO)) &&
965da0fc9dSDennis Dalessandro 		(verbs_txreq_queued(iowait_get_ib_work(&priv->s_iowait)) ||
975da0fc9dSDennis Dalessandro 		(qp->s_flags & RVT_S_RESP_PENDING) ||
985da0fc9dSDennis Dalessandro 		 !(qp->s_flags & RVT_S_ANY_WAIT_SEND));
995da0fc9dSDennis Dalessandro }
1005da0fc9dSDennis Dalessandro 
1015da0fc9dSDennis Dalessandro /*
102f48ad614SDennis Dalessandro  * free_ahg - clear ahg from QP
103f48ad614SDennis Dalessandro  */
104f48ad614SDennis Dalessandro static inline void clear_ahg(struct rvt_qp *qp)
105f48ad614SDennis Dalessandro {
106f48ad614SDennis Dalessandro 	struct hfi1_qp_priv *priv = qp->priv;
107f48ad614SDennis Dalessandro 
108a9b6b3bcSDasaratharaman Chandramouli 	priv->s_ahg->ahgcount = 0;
1092e2ba09eSMike Marciniszyn 	qp->s_flags &= ~(HFI1_S_AHG_VALID | HFI1_S_AHG_CLEAR);
110f48ad614SDennis Dalessandro 	if (priv->s_sde && qp->s_ahgidx >= 0)
111f48ad614SDennis Dalessandro 		sdma_ahg_free(priv->s_sde, qp->s_ahgidx);
112f48ad614SDennis Dalessandro 	qp->s_ahgidx = -1;
113f48ad614SDennis Dalessandro }
114f48ad614SDennis Dalessandro 
115f48ad614SDennis Dalessandro /**
116f48ad614SDennis Dalessandro  * hfi1_create_qp - create a queue pair for a device
117f48ad614SDennis Dalessandro  * @ibpd: the protection domain who's device we create the queue pair for
118f48ad614SDennis Dalessandro  * @init_attr: the attributes of the queue pair
119f48ad614SDennis Dalessandro  * @udata: user data for libibverbs.so
120f48ad614SDennis Dalessandro  *
121f48ad614SDennis Dalessandro  * Returns the queue pair on success, otherwise returns an errno.
122f48ad614SDennis Dalessandro  *
123f48ad614SDennis Dalessandro  * Called by the ib_create_qp() core verbs function.
124f48ad614SDennis Dalessandro  */
125f48ad614SDennis Dalessandro struct ib_qp *hfi1_create_qp(struct ib_pd *ibpd,
126f48ad614SDennis Dalessandro 			     struct ib_qp_init_attr *init_attr,
127f48ad614SDennis Dalessandro 			     struct ib_udata *udata);
128f48ad614SDennis Dalessandro 
129f48ad614SDennis Dalessandro /**
130f48ad614SDennis Dalessandro  * hfi1_qp_wakeup - wake up on the indicated event
131f48ad614SDennis Dalessandro  * @qp: the QP
132f48ad614SDennis Dalessandro  * @flag: flag the qp on which the qp is stalled
133f48ad614SDennis Dalessandro  */
134f48ad614SDennis Dalessandro void hfi1_qp_wakeup(struct rvt_qp *qp, u32 flag);
135f48ad614SDennis Dalessandro 
136f48ad614SDennis Dalessandro struct sdma_engine *qp_to_sdma_engine(struct rvt_qp *qp, u8 sc5);
137f48ad614SDennis Dalessandro struct send_context *qp_to_send_context(struct rvt_qp *qp, u8 sc5);
138f48ad614SDennis Dalessandro 
139e5c197acSMike Marciniszyn void qp_iter_print(struct seq_file *s, struct rvt_qp_iter *iter);
140f48ad614SDennis Dalessandro 
1415da0fc9dSDennis Dalessandro bool _hfi1_schedule_send(struct rvt_qp *qp);
1425da0fc9dSDennis Dalessandro bool hfi1_schedule_send(struct rvt_qp *qp);
143f48ad614SDennis Dalessandro 
144f48ad614SDennis Dalessandro void hfi1_migrate_qp(struct rvt_qp *qp);
145f48ad614SDennis Dalessandro 
146f48ad614SDennis Dalessandro /*
147f48ad614SDennis Dalessandro  * Functions provided by hfi1 driver for rdmavt to use
148f48ad614SDennis Dalessandro  */
1490f4d027cSLeon Romanovsky void *qp_priv_alloc(struct rvt_dev_info *rdi, struct rvt_qp *qp);
150f48ad614SDennis Dalessandro void qp_priv_free(struct rvt_dev_info *rdi, struct rvt_qp *qp);
151f48ad614SDennis Dalessandro unsigned free_all_qps(struct rvt_dev_info *rdi);
152f48ad614SDennis Dalessandro void notify_qp_reset(struct rvt_qp *qp);
153f48ad614SDennis Dalessandro int get_pmtu_from_attr(struct rvt_dev_info *rdi, struct rvt_qp *qp,
154f48ad614SDennis Dalessandro 		       struct ib_qp_attr *attr);
155f48ad614SDennis Dalessandro void flush_qp_waiters(struct rvt_qp *qp);
156f48ad614SDennis Dalessandro void notify_error_qp(struct rvt_qp *qp);
157f48ad614SDennis Dalessandro void stop_send_queue(struct rvt_qp *qp);
158f48ad614SDennis Dalessandro void quiesce_qp(struct rvt_qp *qp);
159f48ad614SDennis Dalessandro u32 mtu_from_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, u32 pmtu);
160f48ad614SDennis Dalessandro int mtu_to_path_mtu(u32 mtu);
161f48ad614SDennis Dalessandro void hfi1_error_port_qps(struct hfi1_ibport *ibp, u8 sl);
1625da0fc9dSDennis Dalessandro void hfi1_qp_unbusy(struct rvt_qp *qp, struct iowait_work *wait);
163f48ad614SDennis Dalessandro #endif /* _QP_H */
164