1 /* 2 * Copyright(c) 2015 - 2020 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48 #include <linux/err.h> 49 #include <linux/vmalloc.h> 50 #include <linux/hash.h> 51 #include <linux/module.h> 52 #include <linux/seq_file.h> 53 #include <rdma/rdma_vt.h> 54 #include <rdma/rdmavt_qp.h> 55 #include <rdma/ib_verbs.h> 56 57 #include "hfi.h" 58 #include "qp.h" 59 #include "trace.h" 60 #include "verbs_txreq.h" 61 62 unsigned int hfi1_qp_table_size = 256; 63 module_param_named(qp_table_size, hfi1_qp_table_size, uint, S_IRUGO); 64 MODULE_PARM_DESC(qp_table_size, "QP table size"); 65 66 static void flush_tx_list(struct rvt_qp *qp); 67 static int iowait_sleep( 68 struct sdma_engine *sde, 69 struct iowait_work *wait, 70 struct sdma_txreq *stx, 71 unsigned int seq, 72 bool pkts_sent); 73 static void iowait_wakeup(struct iowait *wait, int reason); 74 static void iowait_sdma_drained(struct iowait *wait); 75 static void qp_pio_drain(struct rvt_qp *qp); 76 77 const struct rvt_operation_params hfi1_post_parms[RVT_OPERATION_MAX] = { 78 [IB_WR_RDMA_WRITE] = { 79 .length = sizeof(struct ib_rdma_wr), 80 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 81 }, 82 83 [IB_WR_RDMA_READ] = { 84 .length = sizeof(struct ib_rdma_wr), 85 .qpt_support = BIT(IB_QPT_RC), 86 .flags = RVT_OPERATION_ATOMIC, 87 }, 88 89 [IB_WR_ATOMIC_CMP_AND_SWP] = { 90 .length = sizeof(struct ib_atomic_wr), 91 .qpt_support = BIT(IB_QPT_RC), 92 .flags = RVT_OPERATION_ATOMIC | RVT_OPERATION_ATOMIC_SGE, 93 }, 94 95 [IB_WR_ATOMIC_FETCH_AND_ADD] = { 96 .length = sizeof(struct ib_atomic_wr), 97 .qpt_support = BIT(IB_QPT_RC), 98 .flags = RVT_OPERATION_ATOMIC | RVT_OPERATION_ATOMIC_SGE, 99 }, 100 101 [IB_WR_RDMA_WRITE_WITH_IMM] = { 102 .length = sizeof(struct ib_rdma_wr), 103 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 104 }, 105 106 [IB_WR_SEND] = { 107 .length = sizeof(struct ib_send_wr), 108 .qpt_support = BIT(IB_QPT_UD) | BIT(IB_QPT_SMI) | BIT(IB_QPT_GSI) | 109 BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 110 }, 111 112 [IB_WR_SEND_WITH_IMM] = { 113 .length = sizeof(struct ib_send_wr), 114 .qpt_support = BIT(IB_QPT_UD) | BIT(IB_QPT_SMI) | BIT(IB_QPT_GSI) | 115 BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 116 }, 117 118 [IB_WR_REG_MR] = { 119 .length = sizeof(struct ib_reg_wr), 120 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 121 .flags = RVT_OPERATION_LOCAL, 122 }, 123 124 [IB_WR_LOCAL_INV] = { 125 .length = sizeof(struct ib_send_wr), 126 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 127 .flags = RVT_OPERATION_LOCAL, 128 }, 129 130 [IB_WR_SEND_WITH_INV] = { 131 .length = sizeof(struct ib_send_wr), 132 .qpt_support = BIT(IB_QPT_RC), 133 }, 134 135 [IB_WR_OPFN] = { 136 .length = sizeof(struct ib_atomic_wr), 137 .qpt_support = BIT(IB_QPT_RC), 138 .flags = RVT_OPERATION_USE_RESERVE, 139 }, 140 141 [IB_WR_TID_RDMA_WRITE] = { 142 .length = sizeof(struct ib_rdma_wr), 143 .qpt_support = BIT(IB_QPT_RC), 144 .flags = RVT_OPERATION_IGN_RNR_CNT, 145 }, 146 147 }; 148 149 static void flush_list_head(struct list_head *l) 150 { 151 while (!list_empty(l)) { 152 struct sdma_txreq *tx; 153 154 tx = list_first_entry( 155 l, 156 struct sdma_txreq, 157 list); 158 list_del_init(&tx->list); 159 hfi1_put_txreq( 160 container_of(tx, struct verbs_txreq, txreq)); 161 } 162 } 163 164 static void flush_tx_list(struct rvt_qp *qp) 165 { 166 struct hfi1_qp_priv *priv = qp->priv; 167 168 flush_list_head(&iowait_get_ib_work(&priv->s_iowait)->tx_head); 169 flush_list_head(&iowait_get_tid_work(&priv->s_iowait)->tx_head); 170 } 171 172 static void flush_iowait(struct rvt_qp *qp) 173 { 174 struct hfi1_qp_priv *priv = qp->priv; 175 unsigned long flags; 176 seqlock_t *lock = priv->s_iowait.lock; 177 178 if (!lock) 179 return; 180 write_seqlock_irqsave(lock, flags); 181 if (!list_empty(&priv->s_iowait.list)) { 182 list_del_init(&priv->s_iowait.list); 183 priv->s_iowait.lock = NULL; 184 rvt_put_qp(qp); 185 } 186 write_sequnlock_irqrestore(lock, flags); 187 } 188 189 /** 190 * This function is what we would push to the core layer if we wanted to be a 191 * "first class citizen". Instead we hide this here and rely on Verbs ULPs 192 * to blindly pass the MTU enum value from the PathRecord to us. 193 */ 194 static inline int verbs_mtu_enum_to_int(struct ib_device *dev, enum ib_mtu mtu) 195 { 196 /* Constraining 10KB packets to 8KB packets */ 197 if (mtu == (enum ib_mtu)OPA_MTU_10240) 198 mtu = (enum ib_mtu)OPA_MTU_8192; 199 return opa_mtu_enum_to_int((enum opa_mtu)mtu); 200 } 201 202 int hfi1_check_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr, 203 int attr_mask, struct ib_udata *udata) 204 { 205 struct ib_qp *ibqp = &qp->ibqp; 206 struct hfi1_ibdev *dev = to_idev(ibqp->device); 207 struct hfi1_devdata *dd = dd_from_dev(dev); 208 u8 sc; 209 210 if (attr_mask & IB_QP_AV) { 211 sc = ah_to_sc(ibqp->device, &attr->ah_attr); 212 if (sc == 0xf) 213 return -EINVAL; 214 215 if (!qp_to_sdma_engine(qp, sc) && 216 dd->flags & HFI1_HAS_SEND_DMA) 217 return -EINVAL; 218 219 if (!qp_to_send_context(qp, sc)) 220 return -EINVAL; 221 } 222 223 if (attr_mask & IB_QP_ALT_PATH) { 224 sc = ah_to_sc(ibqp->device, &attr->alt_ah_attr); 225 if (sc == 0xf) 226 return -EINVAL; 227 228 if (!qp_to_sdma_engine(qp, sc) && 229 dd->flags & HFI1_HAS_SEND_DMA) 230 return -EINVAL; 231 232 if (!qp_to_send_context(qp, sc)) 233 return -EINVAL; 234 } 235 236 return 0; 237 } 238 239 /* 240 * qp_set_16b - Set the hdr_type based on whether the slid or the 241 * dlid in the connection is extended. Only applicable for RC and UC 242 * QPs. UD QPs determine this on the fly from the ah in the wqe 243 */ 244 static inline void qp_set_16b(struct rvt_qp *qp) 245 { 246 struct hfi1_pportdata *ppd; 247 struct hfi1_ibport *ibp; 248 struct hfi1_qp_priv *priv = qp->priv; 249 250 /* Update ah_attr to account for extended LIDs */ 251 hfi1_update_ah_attr(qp->ibqp.device, &qp->remote_ah_attr); 252 253 /* Create 32 bit LIDs */ 254 hfi1_make_opa_lid(&qp->remote_ah_attr); 255 256 if (!(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) 257 return; 258 259 ibp = to_iport(qp->ibqp.device, qp->port_num); 260 ppd = ppd_from_ibp(ibp); 261 priv->hdr_type = hfi1_get_hdr_type(ppd->lid, &qp->remote_ah_attr); 262 } 263 264 void hfi1_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr, 265 int attr_mask, struct ib_udata *udata) 266 { 267 struct ib_qp *ibqp = &qp->ibqp; 268 struct hfi1_qp_priv *priv = qp->priv; 269 270 if (attr_mask & IB_QP_AV) { 271 priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr); 272 priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 273 priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc); 274 qp_set_16b(qp); 275 } 276 277 if (attr_mask & IB_QP_PATH_MIG_STATE && 278 attr->path_mig_state == IB_MIG_MIGRATED && 279 qp->s_mig_state == IB_MIG_ARMED) { 280 qp->s_flags |= HFI1_S_AHG_CLEAR; 281 priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr); 282 priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 283 priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc); 284 qp_set_16b(qp); 285 } 286 287 opfn_qp_init(qp, attr, attr_mask); 288 } 289 290 /** 291 * hfi1_setup_wqe - set up the wqe 292 * @qp - The qp 293 * @wqe - The built wqe 294 * @call_send - Determine if the send should be posted or scheduled. 295 * 296 * Perform setup of the wqe. This is called 297 * prior to inserting the wqe into the ring but after 298 * the wqe has been setup by RDMAVT. This function 299 * allows the driver the opportunity to perform 300 * validation and additional setup of the wqe. 301 * 302 * Returns 0 on success, -EINVAL on failure 303 * 304 */ 305 int hfi1_setup_wqe(struct rvt_qp *qp, struct rvt_swqe *wqe, bool *call_send) 306 { 307 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 308 struct rvt_ah *ah; 309 struct hfi1_pportdata *ppd; 310 struct hfi1_devdata *dd; 311 312 switch (qp->ibqp.qp_type) { 313 case IB_QPT_RC: 314 hfi1_setup_tid_rdma_wqe(qp, wqe); 315 fallthrough; 316 case IB_QPT_UC: 317 if (wqe->length > 0x80000000U) 318 return -EINVAL; 319 if (wqe->length > qp->pmtu) 320 *call_send = false; 321 break; 322 case IB_QPT_SMI: 323 /* 324 * SM packets should exclusively use VL15 and their SL is 325 * ignored (IBTA v1.3, Section 3.5.8.2). Therefore, when ah 326 * is created, SL is 0 in most cases and as a result some 327 * fields (vl and pmtu) in ah may not be set correctly, 328 * depending on the SL2SC and SC2VL tables at the time. 329 */ 330 ppd = ppd_from_ibp(ibp); 331 dd = dd_from_ppd(ppd); 332 if (wqe->length > dd->vld[15].mtu) 333 return -EINVAL; 334 break; 335 case IB_QPT_GSI: 336 case IB_QPT_UD: 337 ah = rvt_get_swqe_ah(wqe); 338 if (wqe->length > (1 << ah->log_pmtu)) 339 return -EINVAL; 340 if (ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)] == 0xf) 341 return -EINVAL; 342 default: 343 break; 344 } 345 346 /* 347 * System latency between send and schedule is large enough that 348 * forcing call_send to true for piothreshold packets is necessary. 349 */ 350 if (wqe->length <= piothreshold) 351 *call_send = true; 352 return 0; 353 } 354 355 /** 356 * _hfi1_schedule_send - schedule progress 357 * @qp: the QP 358 * 359 * This schedules qp progress w/o regard to the s_flags. 360 * 361 * It is only used in the post send, which doesn't hold 362 * the s_lock. 363 */ 364 bool _hfi1_schedule_send(struct rvt_qp *qp) 365 { 366 struct hfi1_qp_priv *priv = qp->priv; 367 struct hfi1_ibport *ibp = 368 to_iport(qp->ibqp.device, qp->port_num); 369 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 370 struct hfi1_devdata *dd = ppd->dd; 371 372 if (dd->flags & HFI1_SHUTDOWN) 373 return true; 374 375 return iowait_schedule(&priv->s_iowait, ppd->hfi1_wq, 376 priv->s_sde ? 377 priv->s_sde->cpu : 378 cpumask_first(cpumask_of_node(dd->node))); 379 } 380 381 static void qp_pio_drain(struct rvt_qp *qp) 382 { 383 struct hfi1_qp_priv *priv = qp->priv; 384 385 if (!priv->s_sendcontext) 386 return; 387 while (iowait_pio_pending(&priv->s_iowait)) { 388 write_seqlock_irq(&priv->s_sendcontext->waitlock); 389 hfi1_sc_wantpiobuf_intr(priv->s_sendcontext, 1); 390 write_sequnlock_irq(&priv->s_sendcontext->waitlock); 391 iowait_pio_drain(&priv->s_iowait); 392 write_seqlock_irq(&priv->s_sendcontext->waitlock); 393 hfi1_sc_wantpiobuf_intr(priv->s_sendcontext, 0); 394 write_sequnlock_irq(&priv->s_sendcontext->waitlock); 395 } 396 } 397 398 /** 399 * hfi1_schedule_send - schedule progress 400 * @qp: the QP 401 * 402 * This schedules qp progress and caller should hold 403 * the s_lock. 404 * @return true if the first leg is scheduled; 405 * false if the first leg is not scheduled. 406 */ 407 bool hfi1_schedule_send(struct rvt_qp *qp) 408 { 409 lockdep_assert_held(&qp->s_lock); 410 if (hfi1_send_ok(qp)) { 411 _hfi1_schedule_send(qp); 412 return true; 413 } 414 if (qp->s_flags & HFI1_S_ANY_WAIT_IO) 415 iowait_set_flag(&((struct hfi1_qp_priv *)qp->priv)->s_iowait, 416 IOWAIT_PENDING_IB); 417 return false; 418 } 419 420 static void hfi1_qp_schedule(struct rvt_qp *qp) 421 { 422 struct hfi1_qp_priv *priv = qp->priv; 423 bool ret; 424 425 if (iowait_flag_set(&priv->s_iowait, IOWAIT_PENDING_IB)) { 426 ret = hfi1_schedule_send(qp); 427 if (ret) 428 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_IB); 429 } 430 if (iowait_flag_set(&priv->s_iowait, IOWAIT_PENDING_TID)) { 431 ret = hfi1_schedule_tid_send(qp); 432 if (ret) 433 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_TID); 434 } 435 } 436 437 void hfi1_qp_wakeup(struct rvt_qp *qp, u32 flag) 438 { 439 unsigned long flags; 440 441 spin_lock_irqsave(&qp->s_lock, flags); 442 if (qp->s_flags & flag) { 443 qp->s_flags &= ~flag; 444 trace_hfi1_qpwakeup(qp, flag); 445 hfi1_qp_schedule(qp); 446 } 447 spin_unlock_irqrestore(&qp->s_lock, flags); 448 /* Notify hfi1_destroy_qp() if it is waiting. */ 449 rvt_put_qp(qp); 450 } 451 452 void hfi1_qp_unbusy(struct rvt_qp *qp, struct iowait_work *wait) 453 { 454 struct hfi1_qp_priv *priv = qp->priv; 455 456 if (iowait_set_work_flag(wait) == IOWAIT_IB_SE) { 457 qp->s_flags &= ~RVT_S_BUSY; 458 /* 459 * If we are sending a first-leg packet from the second leg, 460 * we need to clear the busy flag from priv->s_flags to 461 * avoid a race condition when the qp wakes up before 462 * the call to hfi1_verbs_send() returns to the second 463 * leg. In that case, the second leg will terminate without 464 * being re-scheduled, resulting in failure to send TID RDMA 465 * WRITE DATA and TID RDMA ACK packets. 466 */ 467 if (priv->s_flags & HFI1_S_TID_BUSY_SET) { 468 priv->s_flags &= ~(HFI1_S_TID_BUSY_SET | 469 RVT_S_BUSY); 470 iowait_set_flag(&priv->s_iowait, IOWAIT_PENDING_TID); 471 } 472 } else { 473 priv->s_flags &= ~RVT_S_BUSY; 474 } 475 } 476 477 static int iowait_sleep( 478 struct sdma_engine *sde, 479 struct iowait_work *wait, 480 struct sdma_txreq *stx, 481 uint seq, 482 bool pkts_sent) 483 { 484 struct verbs_txreq *tx = container_of(stx, struct verbs_txreq, txreq); 485 struct rvt_qp *qp; 486 struct hfi1_qp_priv *priv; 487 unsigned long flags; 488 int ret = 0; 489 490 qp = tx->qp; 491 priv = qp->priv; 492 493 spin_lock_irqsave(&qp->s_lock, flags); 494 if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) { 495 /* 496 * If we couldn't queue the DMA request, save the info 497 * and try again later rather than destroying the 498 * buffer and undoing the side effects of the copy. 499 */ 500 /* Make a common routine? */ 501 list_add_tail(&stx->list, &wait->tx_head); 502 write_seqlock(&sde->waitlock); 503 if (sdma_progress(sde, seq, stx)) 504 goto eagain; 505 if (list_empty(&priv->s_iowait.list)) { 506 struct hfi1_ibport *ibp = 507 to_iport(qp->ibqp.device, qp->port_num); 508 509 ibp->rvp.n_dmawait++; 510 qp->s_flags |= RVT_S_WAIT_DMA_DESC; 511 iowait_get_priority(&priv->s_iowait); 512 iowait_queue(pkts_sent, &priv->s_iowait, 513 &sde->dmawait); 514 priv->s_iowait.lock = &sde->waitlock; 515 trace_hfi1_qpsleep(qp, RVT_S_WAIT_DMA_DESC); 516 rvt_get_qp(qp); 517 } 518 write_sequnlock(&sde->waitlock); 519 hfi1_qp_unbusy(qp, wait); 520 spin_unlock_irqrestore(&qp->s_lock, flags); 521 ret = -EBUSY; 522 } else { 523 spin_unlock_irqrestore(&qp->s_lock, flags); 524 hfi1_put_txreq(tx); 525 } 526 return ret; 527 eagain: 528 write_sequnlock(&sde->waitlock); 529 spin_unlock_irqrestore(&qp->s_lock, flags); 530 list_del_init(&stx->list); 531 return -EAGAIN; 532 } 533 534 static void iowait_wakeup(struct iowait *wait, int reason) 535 { 536 struct rvt_qp *qp = iowait_to_qp(wait); 537 538 WARN_ON(reason != SDMA_AVAIL_REASON); 539 hfi1_qp_wakeup(qp, RVT_S_WAIT_DMA_DESC); 540 } 541 542 static void iowait_sdma_drained(struct iowait *wait) 543 { 544 struct rvt_qp *qp = iowait_to_qp(wait); 545 unsigned long flags; 546 547 /* 548 * This happens when the send engine notes 549 * a QP in the error state and cannot 550 * do the flush work until that QP's 551 * sdma work has finished. 552 */ 553 spin_lock_irqsave(&qp->s_lock, flags); 554 if (qp->s_flags & RVT_S_WAIT_DMA) { 555 qp->s_flags &= ~RVT_S_WAIT_DMA; 556 hfi1_schedule_send(qp); 557 } 558 spin_unlock_irqrestore(&qp->s_lock, flags); 559 } 560 561 static void hfi1_init_priority(struct iowait *w) 562 { 563 struct rvt_qp *qp = iowait_to_qp(w); 564 struct hfi1_qp_priv *priv = qp->priv; 565 566 if (qp->s_flags & RVT_S_ACK_PENDING) 567 w->priority++; 568 if (priv->s_flags & RVT_S_ACK_PENDING) 569 w->priority++; 570 } 571 572 /** 573 * qp_to_sdma_engine - map a qp to a send engine 574 * @qp: the QP 575 * @sc5: the 5 bit sc 576 * 577 * Return: 578 * A send engine for the qp or NULL for SMI type qp. 579 */ 580 struct sdma_engine *qp_to_sdma_engine(struct rvt_qp *qp, u8 sc5) 581 { 582 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device); 583 struct sdma_engine *sde; 584 585 if (!(dd->flags & HFI1_HAS_SEND_DMA)) 586 return NULL; 587 switch (qp->ibqp.qp_type) { 588 case IB_QPT_SMI: 589 return NULL; 590 default: 591 break; 592 } 593 sde = sdma_select_engine_sc(dd, qp->ibqp.qp_num >> dd->qos_shift, sc5); 594 return sde; 595 } 596 597 /* 598 * qp_to_send_context - map a qp to a send context 599 * @qp: the QP 600 * @sc5: the 5 bit sc 601 * 602 * Return: 603 * A send context for the qp 604 */ 605 struct send_context *qp_to_send_context(struct rvt_qp *qp, u8 sc5) 606 { 607 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device); 608 609 switch (qp->ibqp.qp_type) { 610 case IB_QPT_SMI: 611 /* SMA packets to VL15 */ 612 return dd->vld[15].sc; 613 default: 614 break; 615 } 616 617 return pio_select_send_context_sc(dd, qp->ibqp.qp_num >> dd->qos_shift, 618 sc5); 619 } 620 621 static const char * const qp_type_str[] = { 622 "SMI", "GSI", "RC", "UC", "UD", 623 }; 624 625 static int qp_idle(struct rvt_qp *qp) 626 { 627 return 628 qp->s_last == qp->s_acked && 629 qp->s_acked == qp->s_cur && 630 qp->s_cur == qp->s_tail && 631 qp->s_tail == qp->s_head; 632 } 633 634 /** 635 * qp_iter_print - print the qp information to seq_file 636 * @s: the seq_file to emit the qp information on 637 * @iter: the iterator for the qp hash list 638 */ 639 void qp_iter_print(struct seq_file *s, struct rvt_qp_iter *iter) 640 { 641 struct rvt_swqe *wqe; 642 struct rvt_qp *qp = iter->qp; 643 struct hfi1_qp_priv *priv = qp->priv; 644 struct sdma_engine *sde; 645 struct send_context *send_context; 646 struct rvt_ack_entry *e = NULL; 647 struct rvt_srq *srq = qp->ibqp.srq ? 648 ibsrq_to_rvtsrq(qp->ibqp.srq) : NULL; 649 650 sde = qp_to_sdma_engine(qp, priv->s_sc); 651 wqe = rvt_get_swqe_ptr(qp, qp->s_last); 652 send_context = qp_to_send_context(qp, priv->s_sc); 653 if (qp->s_ack_queue) 654 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 655 seq_printf(s, 656 "N %d %s QP %x R %u %s %u %u f=%x %u %u %u %u %u %u SPSN %x %x %x %x %x RPSN %x S(%u %u %u %u %u %u %u) R(%u %u %u) RQP %x LID %x SL %u MTU %u %u %u %u %u SDE %p,%u SC %p,%u SCQ %u %u PID %d OS %x %x E %x %x %x RNR %d %s %d\n", 657 iter->n, 658 qp_idle(qp) ? "I" : "B", 659 qp->ibqp.qp_num, 660 atomic_read(&qp->refcount), 661 qp_type_str[qp->ibqp.qp_type], 662 qp->state, 663 wqe ? wqe->wr.opcode : 0, 664 qp->s_flags, 665 iowait_sdma_pending(&priv->s_iowait), 666 iowait_pio_pending(&priv->s_iowait), 667 !list_empty(&priv->s_iowait.list), 668 qp->timeout, 669 wqe ? wqe->ssn : 0, 670 qp->s_lsn, 671 qp->s_last_psn, 672 qp->s_psn, qp->s_next_psn, 673 qp->s_sending_psn, qp->s_sending_hpsn, 674 qp->r_psn, 675 qp->s_last, qp->s_acked, qp->s_cur, 676 qp->s_tail, qp->s_head, qp->s_size, 677 qp->s_avail, 678 /* ack_queue ring pointers, size */ 679 qp->s_tail_ack_queue, qp->r_head_ack_queue, 680 rvt_max_atomic(&to_idev(qp->ibqp.device)->rdi), 681 /* remote QP info */ 682 qp->remote_qpn, 683 rdma_ah_get_dlid(&qp->remote_ah_attr), 684 rdma_ah_get_sl(&qp->remote_ah_attr), 685 qp->pmtu, 686 qp->s_retry, 687 qp->s_retry_cnt, 688 qp->s_rnr_retry_cnt, 689 qp->s_rnr_retry, 690 sde, 691 sde ? sde->this_idx : 0, 692 send_context, 693 send_context ? send_context->sw_index : 0, 694 ib_cq_head(qp->ibqp.send_cq), 695 ib_cq_tail(qp->ibqp.send_cq), 696 qp->pid, 697 qp->s_state, 698 qp->s_ack_state, 699 /* ack queue information */ 700 e ? e->opcode : 0, 701 e ? e->psn : 0, 702 e ? e->lpsn : 0, 703 qp->r_min_rnr_timer, 704 srq ? "SRQ" : "RQ", 705 srq ? srq->rq.size : qp->r_rq.size 706 ); 707 } 708 709 void *qp_priv_alloc(struct rvt_dev_info *rdi, struct rvt_qp *qp) 710 { 711 struct hfi1_qp_priv *priv; 712 713 priv = kzalloc_node(sizeof(*priv), GFP_KERNEL, rdi->dparms.node); 714 if (!priv) 715 return ERR_PTR(-ENOMEM); 716 717 priv->owner = qp; 718 719 priv->s_ahg = kzalloc_node(sizeof(*priv->s_ahg), GFP_KERNEL, 720 rdi->dparms.node); 721 if (!priv->s_ahg) { 722 kfree(priv); 723 return ERR_PTR(-ENOMEM); 724 } 725 iowait_init( 726 &priv->s_iowait, 727 1, 728 _hfi1_do_send, 729 _hfi1_do_tid_send, 730 iowait_sleep, 731 iowait_wakeup, 732 iowait_sdma_drained, 733 hfi1_init_priority); 734 /* Init to a value to start the running average correctly */ 735 priv->s_running_pkt_size = piothreshold / 2; 736 return priv; 737 } 738 739 void qp_priv_free(struct rvt_dev_info *rdi, struct rvt_qp *qp) 740 { 741 struct hfi1_qp_priv *priv = qp->priv; 742 743 hfi1_qp_priv_tid_free(rdi, qp); 744 kfree(priv->s_ahg); 745 kfree(priv); 746 } 747 748 unsigned free_all_qps(struct rvt_dev_info *rdi) 749 { 750 struct hfi1_ibdev *verbs_dev = container_of(rdi, 751 struct hfi1_ibdev, 752 rdi); 753 struct hfi1_devdata *dd = container_of(verbs_dev, 754 struct hfi1_devdata, 755 verbs_dev); 756 int n; 757 unsigned qp_inuse = 0; 758 759 for (n = 0; n < dd->num_pports; n++) { 760 struct hfi1_ibport *ibp = &dd->pport[n].ibport_data; 761 762 rcu_read_lock(); 763 if (rcu_dereference(ibp->rvp.qp[0])) 764 qp_inuse++; 765 if (rcu_dereference(ibp->rvp.qp[1])) 766 qp_inuse++; 767 rcu_read_unlock(); 768 } 769 770 return qp_inuse; 771 } 772 773 void flush_qp_waiters(struct rvt_qp *qp) 774 { 775 lockdep_assert_held(&qp->s_lock); 776 flush_iowait(qp); 777 hfi1_tid_rdma_flush_wait(qp); 778 } 779 780 void stop_send_queue(struct rvt_qp *qp) 781 { 782 struct hfi1_qp_priv *priv = qp->priv; 783 784 iowait_cancel_work(&priv->s_iowait); 785 if (cancel_work_sync(&priv->tid_rdma.trigger_work)) 786 rvt_put_qp(qp); 787 } 788 789 void quiesce_qp(struct rvt_qp *qp) 790 { 791 struct hfi1_qp_priv *priv = qp->priv; 792 793 hfi1_del_tid_reap_timer(qp); 794 hfi1_del_tid_retry_timer(qp); 795 iowait_sdma_drain(&priv->s_iowait); 796 qp_pio_drain(qp); 797 flush_tx_list(qp); 798 } 799 800 void notify_qp_reset(struct rvt_qp *qp) 801 { 802 hfi1_qp_kern_exp_rcv_clear_all(qp); 803 qp->r_adefered = 0; 804 clear_ahg(qp); 805 806 /* Clear any OPFN state */ 807 if (qp->ibqp.qp_type == IB_QPT_RC) 808 opfn_conn_error(qp); 809 } 810 811 /* 812 * Switch to alternate path. 813 * The QP s_lock should be held and interrupts disabled. 814 */ 815 void hfi1_migrate_qp(struct rvt_qp *qp) 816 { 817 struct hfi1_qp_priv *priv = qp->priv; 818 struct ib_event ev; 819 820 qp->s_mig_state = IB_MIG_MIGRATED; 821 qp->remote_ah_attr = qp->alt_ah_attr; 822 qp->port_num = rdma_ah_get_port_num(&qp->alt_ah_attr); 823 qp->s_pkey_index = qp->s_alt_pkey_index; 824 qp->s_flags |= HFI1_S_AHG_CLEAR; 825 priv->s_sc = ah_to_sc(qp->ibqp.device, &qp->remote_ah_attr); 826 priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 827 qp_set_16b(qp); 828 829 ev.device = qp->ibqp.device; 830 ev.element.qp = &qp->ibqp; 831 ev.event = IB_EVENT_PATH_MIG; 832 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 833 } 834 835 int mtu_to_path_mtu(u32 mtu) 836 { 837 return mtu_to_enum(mtu, OPA_MTU_8192); 838 } 839 840 u32 mtu_from_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, u32 pmtu) 841 { 842 u32 mtu; 843 struct hfi1_ibdev *verbs_dev = container_of(rdi, 844 struct hfi1_ibdev, 845 rdi); 846 struct hfi1_devdata *dd = container_of(verbs_dev, 847 struct hfi1_devdata, 848 verbs_dev); 849 struct hfi1_ibport *ibp; 850 u8 sc, vl; 851 852 ibp = &dd->pport[qp->port_num - 1].ibport_data; 853 sc = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)]; 854 vl = sc_to_vlt(dd, sc); 855 856 mtu = verbs_mtu_enum_to_int(qp->ibqp.device, pmtu); 857 if (vl < PER_VL_SEND_CONTEXTS) 858 mtu = min_t(u32, mtu, dd->vld[vl].mtu); 859 return mtu; 860 } 861 862 int get_pmtu_from_attr(struct rvt_dev_info *rdi, struct rvt_qp *qp, 863 struct ib_qp_attr *attr) 864 { 865 int mtu, pidx = qp->port_num - 1; 866 struct hfi1_ibdev *verbs_dev = container_of(rdi, 867 struct hfi1_ibdev, 868 rdi); 869 struct hfi1_devdata *dd = container_of(verbs_dev, 870 struct hfi1_devdata, 871 verbs_dev); 872 mtu = verbs_mtu_enum_to_int(qp->ibqp.device, attr->path_mtu); 873 if (mtu == -1) 874 return -1; /* values less than 0 are error */ 875 876 if (mtu > dd->pport[pidx].ibmtu) 877 return mtu_to_enum(dd->pport[pidx].ibmtu, IB_MTU_2048); 878 else 879 return attr->path_mtu; 880 } 881 882 void notify_error_qp(struct rvt_qp *qp) 883 { 884 struct hfi1_qp_priv *priv = qp->priv; 885 seqlock_t *lock = priv->s_iowait.lock; 886 887 if (lock) { 888 write_seqlock(lock); 889 if (!list_empty(&priv->s_iowait.list) && 890 !(qp->s_flags & RVT_S_BUSY) && 891 !(priv->s_flags & RVT_S_BUSY)) { 892 qp->s_flags &= ~HFI1_S_ANY_WAIT_IO; 893 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_IB); 894 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_TID); 895 list_del_init(&priv->s_iowait.list); 896 priv->s_iowait.lock = NULL; 897 rvt_put_qp(qp); 898 } 899 write_sequnlock(lock); 900 } 901 902 if (!(qp->s_flags & RVT_S_BUSY) && !(priv->s_flags & RVT_S_BUSY)) { 903 qp->s_hdrwords = 0; 904 if (qp->s_rdma_mr) { 905 rvt_put_mr(qp->s_rdma_mr); 906 qp->s_rdma_mr = NULL; 907 } 908 flush_tx_list(qp); 909 } 910 } 911 912 /** 913 * hfi1_qp_iter_cb - callback for iterator 914 * @qp - the qp 915 * @v - the sl in low bits of v 916 * 917 * This is called from the iterator callback to work 918 * on an individual qp. 919 */ 920 static void hfi1_qp_iter_cb(struct rvt_qp *qp, u64 v) 921 { 922 int lastwqe; 923 struct ib_event ev; 924 struct hfi1_ibport *ibp = 925 to_iport(qp->ibqp.device, qp->port_num); 926 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 927 u8 sl = (u8)v; 928 929 if (qp->port_num != ppd->port || 930 (qp->ibqp.qp_type != IB_QPT_UC && 931 qp->ibqp.qp_type != IB_QPT_RC) || 932 rdma_ah_get_sl(&qp->remote_ah_attr) != sl || 933 !(ib_rvt_state_ops[qp->state] & RVT_POST_SEND_OK)) 934 return; 935 936 spin_lock_irq(&qp->r_lock); 937 spin_lock(&qp->s_hlock); 938 spin_lock(&qp->s_lock); 939 lastwqe = rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 940 spin_unlock(&qp->s_lock); 941 spin_unlock(&qp->s_hlock); 942 spin_unlock_irq(&qp->r_lock); 943 if (lastwqe) { 944 ev.device = qp->ibqp.device; 945 ev.element.qp = &qp->ibqp; 946 ev.event = IB_EVENT_QP_LAST_WQE_REACHED; 947 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 948 } 949 } 950 951 /** 952 * hfi1_error_port_qps - put a port's RC/UC qps into error state 953 * @ibp: the ibport. 954 * @sl: the service level. 955 * 956 * This function places all RC/UC qps with a given service level into error 957 * state. It is generally called to force upper lay apps to abandon stale qps 958 * after an sl->sc mapping change. 959 */ 960 void hfi1_error_port_qps(struct hfi1_ibport *ibp, u8 sl) 961 { 962 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 963 struct hfi1_ibdev *dev = &ppd->dd->verbs_dev; 964 965 rvt_qp_iter(&dev->rdi, sl, hfi1_qp_iter_cb); 966 } 967