1 /* 2 * Copyright(c) 2015 - 2020 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48 #include <linux/err.h> 49 #include <linux/vmalloc.h> 50 #include <linux/hash.h> 51 #include <linux/module.h> 52 #include <linux/seq_file.h> 53 #include <rdma/rdma_vt.h> 54 #include <rdma/rdmavt_qp.h> 55 #include <rdma/ib_verbs.h> 56 57 #include "hfi.h" 58 #include "qp.h" 59 #include "trace.h" 60 #include "verbs_txreq.h" 61 62 unsigned int hfi1_qp_table_size = 256; 63 module_param_named(qp_table_size, hfi1_qp_table_size, uint, S_IRUGO); 64 MODULE_PARM_DESC(qp_table_size, "QP table size"); 65 66 static void flush_tx_list(struct rvt_qp *qp); 67 static int iowait_sleep( 68 struct sdma_engine *sde, 69 struct iowait_work *wait, 70 struct sdma_txreq *stx, 71 unsigned int seq, 72 bool pkts_sent); 73 static void iowait_wakeup(struct iowait *wait, int reason); 74 static void iowait_sdma_drained(struct iowait *wait); 75 static void qp_pio_drain(struct rvt_qp *qp); 76 77 const struct rvt_operation_params hfi1_post_parms[RVT_OPERATION_MAX] = { 78 [IB_WR_RDMA_WRITE] = { 79 .length = sizeof(struct ib_rdma_wr), 80 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 81 }, 82 83 [IB_WR_RDMA_READ] = { 84 .length = sizeof(struct ib_rdma_wr), 85 .qpt_support = BIT(IB_QPT_RC), 86 .flags = RVT_OPERATION_ATOMIC, 87 }, 88 89 [IB_WR_ATOMIC_CMP_AND_SWP] = { 90 .length = sizeof(struct ib_atomic_wr), 91 .qpt_support = BIT(IB_QPT_RC), 92 .flags = RVT_OPERATION_ATOMIC | RVT_OPERATION_ATOMIC_SGE, 93 }, 94 95 [IB_WR_ATOMIC_FETCH_AND_ADD] = { 96 .length = sizeof(struct ib_atomic_wr), 97 .qpt_support = BIT(IB_QPT_RC), 98 .flags = RVT_OPERATION_ATOMIC | RVT_OPERATION_ATOMIC_SGE, 99 }, 100 101 [IB_WR_RDMA_WRITE_WITH_IMM] = { 102 .length = sizeof(struct ib_rdma_wr), 103 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 104 }, 105 106 [IB_WR_SEND] = { 107 .length = sizeof(struct ib_send_wr), 108 .qpt_support = BIT(IB_QPT_UD) | BIT(IB_QPT_SMI) | BIT(IB_QPT_GSI) | 109 BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 110 }, 111 112 [IB_WR_SEND_WITH_IMM] = { 113 .length = sizeof(struct ib_send_wr), 114 .qpt_support = BIT(IB_QPT_UD) | BIT(IB_QPT_SMI) | BIT(IB_QPT_GSI) | 115 BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 116 }, 117 118 [IB_WR_REG_MR] = { 119 .length = sizeof(struct ib_reg_wr), 120 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 121 .flags = RVT_OPERATION_LOCAL, 122 }, 123 124 [IB_WR_LOCAL_INV] = { 125 .length = sizeof(struct ib_send_wr), 126 .qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC), 127 .flags = RVT_OPERATION_LOCAL, 128 }, 129 130 [IB_WR_SEND_WITH_INV] = { 131 .length = sizeof(struct ib_send_wr), 132 .qpt_support = BIT(IB_QPT_RC), 133 }, 134 135 [IB_WR_OPFN] = { 136 .length = sizeof(struct ib_atomic_wr), 137 .qpt_support = BIT(IB_QPT_RC), 138 .flags = RVT_OPERATION_USE_RESERVE, 139 }, 140 141 [IB_WR_TID_RDMA_WRITE] = { 142 .length = sizeof(struct ib_rdma_wr), 143 .qpt_support = BIT(IB_QPT_RC), 144 .flags = RVT_OPERATION_IGN_RNR_CNT, 145 }, 146 147 }; 148 149 static void flush_list_head(struct list_head *l) 150 { 151 while (!list_empty(l)) { 152 struct sdma_txreq *tx; 153 154 tx = list_first_entry( 155 l, 156 struct sdma_txreq, 157 list); 158 list_del_init(&tx->list); 159 hfi1_put_txreq( 160 container_of(tx, struct verbs_txreq, txreq)); 161 } 162 } 163 164 static void flush_tx_list(struct rvt_qp *qp) 165 { 166 struct hfi1_qp_priv *priv = qp->priv; 167 168 flush_list_head(&iowait_get_ib_work(&priv->s_iowait)->tx_head); 169 flush_list_head(&iowait_get_tid_work(&priv->s_iowait)->tx_head); 170 } 171 172 static void flush_iowait(struct rvt_qp *qp) 173 { 174 struct hfi1_qp_priv *priv = qp->priv; 175 unsigned long flags; 176 seqlock_t *lock = priv->s_iowait.lock; 177 178 if (!lock) 179 return; 180 write_seqlock_irqsave(lock, flags); 181 if (!list_empty(&priv->s_iowait.list)) { 182 list_del_init(&priv->s_iowait.list); 183 priv->s_iowait.lock = NULL; 184 rvt_put_qp(qp); 185 } 186 write_sequnlock_irqrestore(lock, flags); 187 } 188 189 /* 190 * This function is what we would push to the core layer if we wanted to be a 191 * "first class citizen". Instead we hide this here and rely on Verbs ULPs 192 * to blindly pass the MTU enum value from the PathRecord to us. 193 */ 194 static inline int verbs_mtu_enum_to_int(struct ib_device *dev, enum ib_mtu mtu) 195 { 196 /* Constraining 10KB packets to 8KB packets */ 197 if (mtu == (enum ib_mtu)OPA_MTU_10240) 198 mtu = (enum ib_mtu)OPA_MTU_8192; 199 return opa_mtu_enum_to_int((enum opa_mtu)mtu); 200 } 201 202 int hfi1_check_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr, 203 int attr_mask, struct ib_udata *udata) 204 { 205 struct ib_qp *ibqp = &qp->ibqp; 206 struct hfi1_ibdev *dev = to_idev(ibqp->device); 207 struct hfi1_devdata *dd = dd_from_dev(dev); 208 u8 sc; 209 210 if (attr_mask & IB_QP_AV) { 211 sc = ah_to_sc(ibqp->device, &attr->ah_attr); 212 if (sc == 0xf) 213 return -EINVAL; 214 215 if (!qp_to_sdma_engine(qp, sc) && 216 dd->flags & HFI1_HAS_SEND_DMA) 217 return -EINVAL; 218 219 if (!qp_to_send_context(qp, sc)) 220 return -EINVAL; 221 } 222 223 if (attr_mask & IB_QP_ALT_PATH) { 224 sc = ah_to_sc(ibqp->device, &attr->alt_ah_attr); 225 if (sc == 0xf) 226 return -EINVAL; 227 228 if (!qp_to_sdma_engine(qp, sc) && 229 dd->flags & HFI1_HAS_SEND_DMA) 230 return -EINVAL; 231 232 if (!qp_to_send_context(qp, sc)) 233 return -EINVAL; 234 } 235 236 return 0; 237 } 238 239 /* 240 * qp_set_16b - Set the hdr_type based on whether the slid or the 241 * dlid in the connection is extended. Only applicable for RC and UC 242 * QPs. UD QPs determine this on the fly from the ah in the wqe 243 */ 244 static inline void qp_set_16b(struct rvt_qp *qp) 245 { 246 struct hfi1_pportdata *ppd; 247 struct hfi1_ibport *ibp; 248 struct hfi1_qp_priv *priv = qp->priv; 249 250 /* Update ah_attr to account for extended LIDs */ 251 hfi1_update_ah_attr(qp->ibqp.device, &qp->remote_ah_attr); 252 253 /* Create 32 bit LIDs */ 254 hfi1_make_opa_lid(&qp->remote_ah_attr); 255 256 if (!(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) 257 return; 258 259 ibp = to_iport(qp->ibqp.device, qp->port_num); 260 ppd = ppd_from_ibp(ibp); 261 priv->hdr_type = hfi1_get_hdr_type(ppd->lid, &qp->remote_ah_attr); 262 } 263 264 void hfi1_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr, 265 int attr_mask, struct ib_udata *udata) 266 { 267 struct ib_qp *ibqp = &qp->ibqp; 268 struct hfi1_qp_priv *priv = qp->priv; 269 270 if (attr_mask & IB_QP_AV) { 271 priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr); 272 priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 273 priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc); 274 qp_set_16b(qp); 275 } 276 277 if (attr_mask & IB_QP_PATH_MIG_STATE && 278 attr->path_mig_state == IB_MIG_MIGRATED && 279 qp->s_mig_state == IB_MIG_ARMED) { 280 qp->s_flags |= HFI1_S_AHG_CLEAR; 281 priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr); 282 priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 283 priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc); 284 qp_set_16b(qp); 285 } 286 287 opfn_qp_init(qp, attr, attr_mask); 288 } 289 290 /** 291 * hfi1_setup_wqe - set up the wqe 292 * @qp: The qp 293 * @wqe: The built wqe 294 * @call_send: Determine if the send should be posted or scheduled. 295 * 296 * Perform setup of the wqe. This is called 297 * prior to inserting the wqe into the ring but after 298 * the wqe has been setup by RDMAVT. This function 299 * allows the driver the opportunity to perform 300 * validation and additional setup of the wqe. 301 * 302 * Returns 0 on success, -EINVAL on failure 303 * 304 */ 305 int hfi1_setup_wqe(struct rvt_qp *qp, struct rvt_swqe *wqe, bool *call_send) 306 { 307 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 308 struct rvt_ah *ah; 309 struct hfi1_pportdata *ppd; 310 struct hfi1_devdata *dd; 311 312 switch (qp->ibqp.qp_type) { 313 case IB_QPT_RC: 314 hfi1_setup_tid_rdma_wqe(qp, wqe); 315 fallthrough; 316 case IB_QPT_UC: 317 if (wqe->length > 0x80000000U) 318 return -EINVAL; 319 if (wqe->length > qp->pmtu) 320 *call_send = false; 321 break; 322 case IB_QPT_SMI: 323 /* 324 * SM packets should exclusively use VL15 and their SL is 325 * ignored (IBTA v1.3, Section 3.5.8.2). Therefore, when ah 326 * is created, SL is 0 in most cases and as a result some 327 * fields (vl and pmtu) in ah may not be set correctly, 328 * depending on the SL2SC and SC2VL tables at the time. 329 */ 330 ppd = ppd_from_ibp(ibp); 331 dd = dd_from_ppd(ppd); 332 if (wqe->length > dd->vld[15].mtu) 333 return -EINVAL; 334 break; 335 case IB_QPT_GSI: 336 case IB_QPT_UD: 337 ah = rvt_get_swqe_ah(wqe); 338 if (wqe->length > (1 << ah->log_pmtu)) 339 return -EINVAL; 340 if (ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)] == 0xf) 341 return -EINVAL; 342 break; 343 default: 344 break; 345 } 346 347 /* 348 * System latency between send and schedule is large enough that 349 * forcing call_send to true for piothreshold packets is necessary. 350 */ 351 if (wqe->length <= piothreshold) 352 *call_send = true; 353 return 0; 354 } 355 356 /** 357 * _hfi1_schedule_send - schedule progress 358 * @qp: the QP 359 * 360 * This schedules qp progress w/o regard to the s_flags. 361 * 362 * It is only used in the post send, which doesn't hold 363 * the s_lock. 364 */ 365 bool _hfi1_schedule_send(struct rvt_qp *qp) 366 { 367 struct hfi1_qp_priv *priv = qp->priv; 368 struct hfi1_ibport *ibp = 369 to_iport(qp->ibqp.device, qp->port_num); 370 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 371 struct hfi1_devdata *dd = ppd->dd; 372 373 if (dd->flags & HFI1_SHUTDOWN) 374 return true; 375 376 return iowait_schedule(&priv->s_iowait, ppd->hfi1_wq, 377 priv->s_sde ? 378 priv->s_sde->cpu : 379 cpumask_first(cpumask_of_node(dd->node))); 380 } 381 382 static void qp_pio_drain(struct rvt_qp *qp) 383 { 384 struct hfi1_qp_priv *priv = qp->priv; 385 386 if (!priv->s_sendcontext) 387 return; 388 while (iowait_pio_pending(&priv->s_iowait)) { 389 write_seqlock_irq(&priv->s_sendcontext->waitlock); 390 hfi1_sc_wantpiobuf_intr(priv->s_sendcontext, 1); 391 write_sequnlock_irq(&priv->s_sendcontext->waitlock); 392 iowait_pio_drain(&priv->s_iowait); 393 write_seqlock_irq(&priv->s_sendcontext->waitlock); 394 hfi1_sc_wantpiobuf_intr(priv->s_sendcontext, 0); 395 write_sequnlock_irq(&priv->s_sendcontext->waitlock); 396 } 397 } 398 399 /** 400 * hfi1_schedule_send - schedule progress 401 * @qp: the QP 402 * 403 * This schedules qp progress and caller should hold 404 * the s_lock. 405 * @return true if the first leg is scheduled; 406 * false if the first leg is not scheduled. 407 */ 408 bool hfi1_schedule_send(struct rvt_qp *qp) 409 { 410 lockdep_assert_held(&qp->s_lock); 411 if (hfi1_send_ok(qp)) { 412 _hfi1_schedule_send(qp); 413 return true; 414 } 415 if (qp->s_flags & HFI1_S_ANY_WAIT_IO) 416 iowait_set_flag(&((struct hfi1_qp_priv *)qp->priv)->s_iowait, 417 IOWAIT_PENDING_IB); 418 return false; 419 } 420 421 static void hfi1_qp_schedule(struct rvt_qp *qp) 422 { 423 struct hfi1_qp_priv *priv = qp->priv; 424 bool ret; 425 426 if (iowait_flag_set(&priv->s_iowait, IOWAIT_PENDING_IB)) { 427 ret = hfi1_schedule_send(qp); 428 if (ret) 429 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_IB); 430 } 431 if (iowait_flag_set(&priv->s_iowait, IOWAIT_PENDING_TID)) { 432 ret = hfi1_schedule_tid_send(qp); 433 if (ret) 434 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_TID); 435 } 436 } 437 438 void hfi1_qp_wakeup(struct rvt_qp *qp, u32 flag) 439 { 440 unsigned long flags; 441 442 spin_lock_irqsave(&qp->s_lock, flags); 443 if (qp->s_flags & flag) { 444 qp->s_flags &= ~flag; 445 trace_hfi1_qpwakeup(qp, flag); 446 hfi1_qp_schedule(qp); 447 } 448 spin_unlock_irqrestore(&qp->s_lock, flags); 449 /* Notify hfi1_destroy_qp() if it is waiting. */ 450 rvt_put_qp(qp); 451 } 452 453 void hfi1_qp_unbusy(struct rvt_qp *qp, struct iowait_work *wait) 454 { 455 struct hfi1_qp_priv *priv = qp->priv; 456 457 if (iowait_set_work_flag(wait) == IOWAIT_IB_SE) { 458 qp->s_flags &= ~RVT_S_BUSY; 459 /* 460 * If we are sending a first-leg packet from the second leg, 461 * we need to clear the busy flag from priv->s_flags to 462 * avoid a race condition when the qp wakes up before 463 * the call to hfi1_verbs_send() returns to the second 464 * leg. In that case, the second leg will terminate without 465 * being re-scheduled, resulting in failure to send TID RDMA 466 * WRITE DATA and TID RDMA ACK packets. 467 */ 468 if (priv->s_flags & HFI1_S_TID_BUSY_SET) { 469 priv->s_flags &= ~(HFI1_S_TID_BUSY_SET | 470 RVT_S_BUSY); 471 iowait_set_flag(&priv->s_iowait, IOWAIT_PENDING_TID); 472 } 473 } else { 474 priv->s_flags &= ~RVT_S_BUSY; 475 } 476 } 477 478 static int iowait_sleep( 479 struct sdma_engine *sde, 480 struct iowait_work *wait, 481 struct sdma_txreq *stx, 482 uint seq, 483 bool pkts_sent) 484 { 485 struct verbs_txreq *tx = container_of(stx, struct verbs_txreq, txreq); 486 struct rvt_qp *qp; 487 struct hfi1_qp_priv *priv; 488 unsigned long flags; 489 int ret = 0; 490 491 qp = tx->qp; 492 priv = qp->priv; 493 494 spin_lock_irqsave(&qp->s_lock, flags); 495 if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) { 496 /* 497 * If we couldn't queue the DMA request, save the info 498 * and try again later rather than destroying the 499 * buffer and undoing the side effects of the copy. 500 */ 501 /* Make a common routine? */ 502 list_add_tail(&stx->list, &wait->tx_head); 503 write_seqlock(&sde->waitlock); 504 if (sdma_progress(sde, seq, stx)) 505 goto eagain; 506 if (list_empty(&priv->s_iowait.list)) { 507 struct hfi1_ibport *ibp = 508 to_iport(qp->ibqp.device, qp->port_num); 509 510 ibp->rvp.n_dmawait++; 511 qp->s_flags |= RVT_S_WAIT_DMA_DESC; 512 iowait_get_priority(&priv->s_iowait); 513 iowait_queue(pkts_sent, &priv->s_iowait, 514 &sde->dmawait); 515 priv->s_iowait.lock = &sde->waitlock; 516 trace_hfi1_qpsleep(qp, RVT_S_WAIT_DMA_DESC); 517 rvt_get_qp(qp); 518 } 519 write_sequnlock(&sde->waitlock); 520 hfi1_qp_unbusy(qp, wait); 521 spin_unlock_irqrestore(&qp->s_lock, flags); 522 ret = -EBUSY; 523 } else { 524 spin_unlock_irqrestore(&qp->s_lock, flags); 525 hfi1_put_txreq(tx); 526 } 527 return ret; 528 eagain: 529 write_sequnlock(&sde->waitlock); 530 spin_unlock_irqrestore(&qp->s_lock, flags); 531 list_del_init(&stx->list); 532 return -EAGAIN; 533 } 534 535 static void iowait_wakeup(struct iowait *wait, int reason) 536 { 537 struct rvt_qp *qp = iowait_to_qp(wait); 538 539 WARN_ON(reason != SDMA_AVAIL_REASON); 540 hfi1_qp_wakeup(qp, RVT_S_WAIT_DMA_DESC); 541 } 542 543 static void iowait_sdma_drained(struct iowait *wait) 544 { 545 struct rvt_qp *qp = iowait_to_qp(wait); 546 unsigned long flags; 547 548 /* 549 * This happens when the send engine notes 550 * a QP in the error state and cannot 551 * do the flush work until that QP's 552 * sdma work has finished. 553 */ 554 spin_lock_irqsave(&qp->s_lock, flags); 555 if (qp->s_flags & RVT_S_WAIT_DMA) { 556 qp->s_flags &= ~RVT_S_WAIT_DMA; 557 hfi1_schedule_send(qp); 558 } 559 spin_unlock_irqrestore(&qp->s_lock, flags); 560 } 561 562 static void hfi1_init_priority(struct iowait *w) 563 { 564 struct rvt_qp *qp = iowait_to_qp(w); 565 struct hfi1_qp_priv *priv = qp->priv; 566 567 if (qp->s_flags & RVT_S_ACK_PENDING) 568 w->priority++; 569 if (priv->s_flags & RVT_S_ACK_PENDING) 570 w->priority++; 571 } 572 573 /** 574 * qp_to_sdma_engine - map a qp to a send engine 575 * @qp: the QP 576 * @sc5: the 5 bit sc 577 * 578 * Return: 579 * A send engine for the qp or NULL for SMI type qp. 580 */ 581 struct sdma_engine *qp_to_sdma_engine(struct rvt_qp *qp, u8 sc5) 582 { 583 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device); 584 struct sdma_engine *sde; 585 586 if (!(dd->flags & HFI1_HAS_SEND_DMA)) 587 return NULL; 588 switch (qp->ibqp.qp_type) { 589 case IB_QPT_SMI: 590 return NULL; 591 default: 592 break; 593 } 594 sde = sdma_select_engine_sc(dd, qp->ibqp.qp_num >> dd->qos_shift, sc5); 595 return sde; 596 } 597 598 /** 599 * qp_to_send_context - map a qp to a send context 600 * @qp: the QP 601 * @sc5: the 5 bit sc 602 * 603 * Return: 604 * A send context for the qp 605 */ 606 struct send_context *qp_to_send_context(struct rvt_qp *qp, u8 sc5) 607 { 608 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device); 609 610 switch (qp->ibqp.qp_type) { 611 case IB_QPT_SMI: 612 /* SMA packets to VL15 */ 613 return dd->vld[15].sc; 614 default: 615 break; 616 } 617 618 return pio_select_send_context_sc(dd, qp->ibqp.qp_num >> dd->qos_shift, 619 sc5); 620 } 621 622 static const char * const qp_type_str[] = { 623 "SMI", "GSI", "RC", "UC", "UD", 624 }; 625 626 static int qp_idle(struct rvt_qp *qp) 627 { 628 return 629 qp->s_last == qp->s_acked && 630 qp->s_acked == qp->s_cur && 631 qp->s_cur == qp->s_tail && 632 qp->s_tail == qp->s_head; 633 } 634 635 /** 636 * qp_iter_print - print the qp information to seq_file 637 * @s: the seq_file to emit the qp information on 638 * @iter: the iterator for the qp hash list 639 */ 640 void qp_iter_print(struct seq_file *s, struct rvt_qp_iter *iter) 641 { 642 struct rvt_swqe *wqe; 643 struct rvt_qp *qp = iter->qp; 644 struct hfi1_qp_priv *priv = qp->priv; 645 struct sdma_engine *sde; 646 struct send_context *send_context; 647 struct rvt_ack_entry *e = NULL; 648 struct rvt_srq *srq = qp->ibqp.srq ? 649 ibsrq_to_rvtsrq(qp->ibqp.srq) : NULL; 650 651 sde = qp_to_sdma_engine(qp, priv->s_sc); 652 wqe = rvt_get_swqe_ptr(qp, qp->s_last); 653 send_context = qp_to_send_context(qp, priv->s_sc); 654 if (qp->s_ack_queue) 655 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 656 seq_printf(s, 657 "N %d %s QP %x R %u %s %u %u f=%x %u %u %u %u %u %u SPSN %x %x %x %x %x RPSN %x S(%u %u %u %u %u %u %u) R(%u %u %u) RQP %x LID %x SL %u MTU %u %u %u %u %u SDE %p,%u SC %p,%u SCQ %u %u PID %d OS %x %x E %x %x %x RNR %d %s %d\n", 658 iter->n, 659 qp_idle(qp) ? "I" : "B", 660 qp->ibqp.qp_num, 661 atomic_read(&qp->refcount), 662 qp_type_str[qp->ibqp.qp_type], 663 qp->state, 664 wqe ? wqe->wr.opcode : 0, 665 qp->s_flags, 666 iowait_sdma_pending(&priv->s_iowait), 667 iowait_pio_pending(&priv->s_iowait), 668 !list_empty(&priv->s_iowait.list), 669 qp->timeout, 670 wqe ? wqe->ssn : 0, 671 qp->s_lsn, 672 qp->s_last_psn, 673 qp->s_psn, qp->s_next_psn, 674 qp->s_sending_psn, qp->s_sending_hpsn, 675 qp->r_psn, 676 qp->s_last, qp->s_acked, qp->s_cur, 677 qp->s_tail, qp->s_head, qp->s_size, 678 qp->s_avail, 679 /* ack_queue ring pointers, size */ 680 qp->s_tail_ack_queue, qp->r_head_ack_queue, 681 rvt_max_atomic(&to_idev(qp->ibqp.device)->rdi), 682 /* remote QP info */ 683 qp->remote_qpn, 684 rdma_ah_get_dlid(&qp->remote_ah_attr), 685 rdma_ah_get_sl(&qp->remote_ah_attr), 686 qp->pmtu, 687 qp->s_retry, 688 qp->s_retry_cnt, 689 qp->s_rnr_retry_cnt, 690 qp->s_rnr_retry, 691 sde, 692 sde ? sde->this_idx : 0, 693 send_context, 694 send_context ? send_context->sw_index : 0, 695 ib_cq_head(qp->ibqp.send_cq), 696 ib_cq_tail(qp->ibqp.send_cq), 697 qp->pid, 698 qp->s_state, 699 qp->s_ack_state, 700 /* ack queue information */ 701 e ? e->opcode : 0, 702 e ? e->psn : 0, 703 e ? e->lpsn : 0, 704 qp->r_min_rnr_timer, 705 srq ? "SRQ" : "RQ", 706 srq ? srq->rq.size : qp->r_rq.size 707 ); 708 } 709 710 void *qp_priv_alloc(struct rvt_dev_info *rdi, struct rvt_qp *qp) 711 { 712 struct hfi1_qp_priv *priv; 713 714 priv = kzalloc_node(sizeof(*priv), GFP_KERNEL, rdi->dparms.node); 715 if (!priv) 716 return ERR_PTR(-ENOMEM); 717 718 priv->owner = qp; 719 720 priv->s_ahg = kzalloc_node(sizeof(*priv->s_ahg), GFP_KERNEL, 721 rdi->dparms.node); 722 if (!priv->s_ahg) { 723 kfree(priv); 724 return ERR_PTR(-ENOMEM); 725 } 726 iowait_init( 727 &priv->s_iowait, 728 1, 729 _hfi1_do_send, 730 _hfi1_do_tid_send, 731 iowait_sleep, 732 iowait_wakeup, 733 iowait_sdma_drained, 734 hfi1_init_priority); 735 /* Init to a value to start the running average correctly */ 736 priv->s_running_pkt_size = piothreshold / 2; 737 return priv; 738 } 739 740 void qp_priv_free(struct rvt_dev_info *rdi, struct rvt_qp *qp) 741 { 742 struct hfi1_qp_priv *priv = qp->priv; 743 744 hfi1_qp_priv_tid_free(rdi, qp); 745 kfree(priv->s_ahg); 746 kfree(priv); 747 } 748 749 unsigned free_all_qps(struct rvt_dev_info *rdi) 750 { 751 struct hfi1_ibdev *verbs_dev = container_of(rdi, 752 struct hfi1_ibdev, 753 rdi); 754 struct hfi1_devdata *dd = container_of(verbs_dev, 755 struct hfi1_devdata, 756 verbs_dev); 757 int n; 758 unsigned qp_inuse = 0; 759 760 for (n = 0; n < dd->num_pports; n++) { 761 struct hfi1_ibport *ibp = &dd->pport[n].ibport_data; 762 763 rcu_read_lock(); 764 if (rcu_dereference(ibp->rvp.qp[0])) 765 qp_inuse++; 766 if (rcu_dereference(ibp->rvp.qp[1])) 767 qp_inuse++; 768 rcu_read_unlock(); 769 } 770 771 return qp_inuse; 772 } 773 774 void flush_qp_waiters(struct rvt_qp *qp) 775 { 776 lockdep_assert_held(&qp->s_lock); 777 flush_iowait(qp); 778 hfi1_tid_rdma_flush_wait(qp); 779 } 780 781 void stop_send_queue(struct rvt_qp *qp) 782 { 783 struct hfi1_qp_priv *priv = qp->priv; 784 785 iowait_cancel_work(&priv->s_iowait); 786 if (cancel_work_sync(&priv->tid_rdma.trigger_work)) 787 rvt_put_qp(qp); 788 } 789 790 void quiesce_qp(struct rvt_qp *qp) 791 { 792 struct hfi1_qp_priv *priv = qp->priv; 793 794 hfi1_del_tid_reap_timer(qp); 795 hfi1_del_tid_retry_timer(qp); 796 iowait_sdma_drain(&priv->s_iowait); 797 qp_pio_drain(qp); 798 flush_tx_list(qp); 799 } 800 801 void notify_qp_reset(struct rvt_qp *qp) 802 { 803 hfi1_qp_kern_exp_rcv_clear_all(qp); 804 qp->r_adefered = 0; 805 clear_ahg(qp); 806 807 /* Clear any OPFN state */ 808 if (qp->ibqp.qp_type == IB_QPT_RC) 809 opfn_conn_error(qp); 810 } 811 812 /* 813 * Switch to alternate path. 814 * The QP s_lock should be held and interrupts disabled. 815 */ 816 void hfi1_migrate_qp(struct rvt_qp *qp) 817 { 818 struct hfi1_qp_priv *priv = qp->priv; 819 struct ib_event ev; 820 821 qp->s_mig_state = IB_MIG_MIGRATED; 822 qp->remote_ah_attr = qp->alt_ah_attr; 823 qp->port_num = rdma_ah_get_port_num(&qp->alt_ah_attr); 824 qp->s_pkey_index = qp->s_alt_pkey_index; 825 qp->s_flags |= HFI1_S_AHG_CLEAR; 826 priv->s_sc = ah_to_sc(qp->ibqp.device, &qp->remote_ah_attr); 827 priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 828 qp_set_16b(qp); 829 830 ev.device = qp->ibqp.device; 831 ev.element.qp = &qp->ibqp; 832 ev.event = IB_EVENT_PATH_MIG; 833 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 834 } 835 836 int mtu_to_path_mtu(u32 mtu) 837 { 838 return mtu_to_enum(mtu, OPA_MTU_8192); 839 } 840 841 u32 mtu_from_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, u32 pmtu) 842 { 843 u32 mtu; 844 struct hfi1_ibdev *verbs_dev = container_of(rdi, 845 struct hfi1_ibdev, 846 rdi); 847 struct hfi1_devdata *dd = container_of(verbs_dev, 848 struct hfi1_devdata, 849 verbs_dev); 850 struct hfi1_ibport *ibp; 851 u8 sc, vl; 852 853 ibp = &dd->pport[qp->port_num - 1].ibport_data; 854 sc = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)]; 855 vl = sc_to_vlt(dd, sc); 856 857 mtu = verbs_mtu_enum_to_int(qp->ibqp.device, pmtu); 858 if (vl < PER_VL_SEND_CONTEXTS) 859 mtu = min_t(u32, mtu, dd->vld[vl].mtu); 860 return mtu; 861 } 862 863 int get_pmtu_from_attr(struct rvt_dev_info *rdi, struct rvt_qp *qp, 864 struct ib_qp_attr *attr) 865 { 866 int mtu, pidx = qp->port_num - 1; 867 struct hfi1_ibdev *verbs_dev = container_of(rdi, 868 struct hfi1_ibdev, 869 rdi); 870 struct hfi1_devdata *dd = container_of(verbs_dev, 871 struct hfi1_devdata, 872 verbs_dev); 873 mtu = verbs_mtu_enum_to_int(qp->ibqp.device, attr->path_mtu); 874 if (mtu == -1) 875 return -1; /* values less than 0 are error */ 876 877 if (mtu > dd->pport[pidx].ibmtu) 878 return mtu_to_enum(dd->pport[pidx].ibmtu, IB_MTU_2048); 879 else 880 return attr->path_mtu; 881 } 882 883 void notify_error_qp(struct rvt_qp *qp) 884 { 885 struct hfi1_qp_priv *priv = qp->priv; 886 seqlock_t *lock = priv->s_iowait.lock; 887 888 if (lock) { 889 write_seqlock(lock); 890 if (!list_empty(&priv->s_iowait.list) && 891 !(qp->s_flags & RVT_S_BUSY) && 892 !(priv->s_flags & RVT_S_BUSY)) { 893 qp->s_flags &= ~HFI1_S_ANY_WAIT_IO; 894 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_IB); 895 iowait_clear_flag(&priv->s_iowait, IOWAIT_PENDING_TID); 896 list_del_init(&priv->s_iowait.list); 897 priv->s_iowait.lock = NULL; 898 rvt_put_qp(qp); 899 } 900 write_sequnlock(lock); 901 } 902 903 if (!(qp->s_flags & RVT_S_BUSY) && !(priv->s_flags & RVT_S_BUSY)) { 904 qp->s_hdrwords = 0; 905 if (qp->s_rdma_mr) { 906 rvt_put_mr(qp->s_rdma_mr); 907 qp->s_rdma_mr = NULL; 908 } 909 flush_tx_list(qp); 910 } 911 } 912 913 /** 914 * hfi1_qp_iter_cb - callback for iterator 915 * @qp: the qp 916 * @v: the sl in low bits of v 917 * 918 * This is called from the iterator callback to work 919 * on an individual qp. 920 */ 921 static void hfi1_qp_iter_cb(struct rvt_qp *qp, u64 v) 922 { 923 int lastwqe; 924 struct ib_event ev; 925 struct hfi1_ibport *ibp = 926 to_iport(qp->ibqp.device, qp->port_num); 927 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 928 u8 sl = (u8)v; 929 930 if (qp->port_num != ppd->port || 931 (qp->ibqp.qp_type != IB_QPT_UC && 932 qp->ibqp.qp_type != IB_QPT_RC) || 933 rdma_ah_get_sl(&qp->remote_ah_attr) != sl || 934 !(ib_rvt_state_ops[qp->state] & RVT_POST_SEND_OK)) 935 return; 936 937 spin_lock_irq(&qp->r_lock); 938 spin_lock(&qp->s_hlock); 939 spin_lock(&qp->s_lock); 940 lastwqe = rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR); 941 spin_unlock(&qp->s_lock); 942 spin_unlock(&qp->s_hlock); 943 spin_unlock_irq(&qp->r_lock); 944 if (lastwqe) { 945 ev.device = qp->ibqp.device; 946 ev.element.qp = &qp->ibqp; 947 ev.event = IB_EVENT_QP_LAST_WQE_REACHED; 948 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 949 } 950 } 951 952 /** 953 * hfi1_error_port_qps - put a port's RC/UC qps into error state 954 * @ibp: the ibport. 955 * @sl: the service level. 956 * 957 * This function places all RC/UC qps with a given service level into error 958 * state. It is generally called to force upper lay apps to abandon stale qps 959 * after an sl->sc mapping change. 960 */ 961 void hfi1_error_port_qps(struct hfi1_ibport *ibp, u8 sl) 962 { 963 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 964 struct hfi1_ibdev *dev = &ppd->dd->verbs_dev; 965 966 rvt_qp_iter(&dev->rdi, sl, hfi1_qp_iter_cb); 967 } 968