101edac3aSGal Pressman /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 201edac3aSGal Pressman /* 3*2a152512SGal Pressman * Copyright 2018-2021 Amazon.com, Inc. or its affiliates. All rights reserved. 401edac3aSGal Pressman */ 501edac3aSGal Pressman 601edac3aSGal Pressman #ifndef _EFA_REGS_H_ 701edac3aSGal Pressman #define _EFA_REGS_H_ 801edac3aSGal Pressman 901edac3aSGal Pressman enum efa_regs_reset_reason_types { 1001edac3aSGal Pressman EFA_REGS_RESET_NORMAL = 0, 1101edac3aSGal Pressman /* Keep alive timeout */ 1201edac3aSGal Pressman EFA_REGS_RESET_KEEP_ALIVE_TO = 1, 1301edac3aSGal Pressman EFA_REGS_RESET_ADMIN_TO = 2, 1401edac3aSGal Pressman EFA_REGS_RESET_INIT_ERR = 3, 1501edac3aSGal Pressman EFA_REGS_RESET_DRIVER_INVALID_STATE = 4, 1601edac3aSGal Pressman EFA_REGS_RESET_OS_TRIGGER = 5, 1701edac3aSGal Pressman EFA_REGS_RESET_SHUTDOWN = 6, 1801edac3aSGal Pressman EFA_REGS_RESET_USER_TRIGGER = 7, 1901edac3aSGal Pressman EFA_REGS_RESET_GENERIC = 8, 2001edac3aSGal Pressman }; 2101edac3aSGal Pressman 2201edac3aSGal Pressman /* efa_registers offsets */ 2301edac3aSGal Pressman 2401edac3aSGal Pressman /* 0 base */ 2501edac3aSGal Pressman #define EFA_REGS_VERSION_OFF 0x0 2601edac3aSGal Pressman #define EFA_REGS_CONTROLLER_VERSION_OFF 0x4 2701edac3aSGal Pressman #define EFA_REGS_CAPS_OFF 0x8 2801edac3aSGal Pressman #define EFA_REGS_AQ_BASE_LO_OFF 0x10 2901edac3aSGal Pressman #define EFA_REGS_AQ_BASE_HI_OFF 0x14 3001edac3aSGal Pressman #define EFA_REGS_AQ_CAPS_OFF 0x18 3101edac3aSGal Pressman #define EFA_REGS_ACQ_BASE_LO_OFF 0x20 3201edac3aSGal Pressman #define EFA_REGS_ACQ_BASE_HI_OFF 0x24 3301edac3aSGal Pressman #define EFA_REGS_ACQ_CAPS_OFF 0x28 3401edac3aSGal Pressman #define EFA_REGS_AQ_PROD_DB_OFF 0x2c 3501edac3aSGal Pressman #define EFA_REGS_AENQ_CAPS_OFF 0x34 3601edac3aSGal Pressman #define EFA_REGS_AENQ_BASE_LO_OFF 0x38 3701edac3aSGal Pressman #define EFA_REGS_AENQ_BASE_HI_OFF 0x3c 3801edac3aSGal Pressman #define EFA_REGS_AENQ_CONS_DB_OFF 0x40 3901edac3aSGal Pressman #define EFA_REGS_INTR_MASK_OFF 0x4c 4001edac3aSGal Pressman #define EFA_REGS_DEV_CTL_OFF 0x54 4101edac3aSGal Pressman #define EFA_REGS_DEV_STS_OFF 0x58 4201edac3aSGal Pressman #define EFA_REGS_MMIO_REG_READ_OFF 0x5c 4301edac3aSGal Pressman #define EFA_REGS_MMIO_RESP_LO_OFF 0x60 4401edac3aSGal Pressman #define EFA_REGS_MMIO_RESP_HI_OFF 0x64 45*2a152512SGal Pressman #define EFA_REGS_EQ_DB_OFF 0x68 4601edac3aSGal Pressman 4701edac3aSGal Pressman /* version register */ 4801edac3aSGal Pressman #define EFA_REGS_VERSION_MINOR_VERSION_MASK 0xff 4901edac3aSGal Pressman #define EFA_REGS_VERSION_MAJOR_VERSION_MASK 0xff00 5001edac3aSGal Pressman 5101edac3aSGal Pressman /* controller_version register */ 5201edac3aSGal Pressman #define EFA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK 0xff 5301edac3aSGal Pressman #define EFA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK 0xff00 5401edac3aSGal Pressman #define EFA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK 0xff0000 5501edac3aSGal Pressman #define EFA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK 0xff000000 5601edac3aSGal Pressman 5701edac3aSGal Pressman /* caps register */ 5801edac3aSGal Pressman #define EFA_REGS_CAPS_CONTIGUOUS_QUEUE_REQUIRED_MASK 0x1 5901edac3aSGal Pressman #define EFA_REGS_CAPS_RESET_TIMEOUT_MASK 0x3e 6001edac3aSGal Pressman #define EFA_REGS_CAPS_DMA_ADDR_WIDTH_MASK 0xff00 6101edac3aSGal Pressman #define EFA_REGS_CAPS_ADMIN_CMD_TO_MASK 0xf0000 6201edac3aSGal Pressman 6301edac3aSGal Pressman /* aq_caps register */ 6401edac3aSGal Pressman #define EFA_REGS_AQ_CAPS_AQ_DEPTH_MASK 0xffff 6501edac3aSGal Pressman #define EFA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK 0xffff0000 6601edac3aSGal Pressman 6701edac3aSGal Pressman /* acq_caps register */ 6801edac3aSGal Pressman #define EFA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK 0xffff 6901edac3aSGal Pressman #define EFA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK 0xff0000 7001edac3aSGal Pressman #define EFA_REGS_ACQ_CAPS_ACQ_MSIX_VECTOR_MASK 0xff000000 7101edac3aSGal Pressman 7201edac3aSGal Pressman /* aenq_caps register */ 7301edac3aSGal Pressman #define EFA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK 0xffff 7401edac3aSGal Pressman #define EFA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK 0xff0000 7501edac3aSGal Pressman #define EFA_REGS_AENQ_CAPS_AENQ_MSIX_VECTOR_MASK 0xff000000 7601edac3aSGal Pressman 7756a7a721SGal Pressman /* intr_mask register */ 7856a7a721SGal Pressman #define EFA_REGS_INTR_MASK_EN_MASK 0x1 7956a7a721SGal Pressman 8001edac3aSGal Pressman /* dev_ctl register */ 8101edac3aSGal Pressman #define EFA_REGS_DEV_CTL_DEV_RESET_MASK 0x1 8201edac3aSGal Pressman #define EFA_REGS_DEV_CTL_AQ_RESTART_MASK 0x2 8301edac3aSGal Pressman #define EFA_REGS_DEV_CTL_RESET_REASON_MASK 0xf0000000 8401edac3aSGal Pressman 8501edac3aSGal Pressman /* dev_sts register */ 8601edac3aSGal Pressman #define EFA_REGS_DEV_STS_READY_MASK 0x1 8701edac3aSGal Pressman #define EFA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_MASK 0x2 8801edac3aSGal Pressman #define EFA_REGS_DEV_STS_AQ_RESTART_FINISHED_MASK 0x4 8901edac3aSGal Pressman #define EFA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK 0x8 9001edac3aSGal Pressman #define EFA_REGS_DEV_STS_RESET_FINISHED_MASK 0x10 9101edac3aSGal Pressman #define EFA_REGS_DEV_STS_FATAL_ERROR_MASK 0x20 9201edac3aSGal Pressman 9301edac3aSGal Pressman /* mmio_reg_read register */ 9401edac3aSGal Pressman #define EFA_REGS_MMIO_REG_READ_REQ_ID_MASK 0xffff 9501edac3aSGal Pressman #define EFA_REGS_MMIO_REG_READ_REG_OFF_MASK 0xffff0000 9601edac3aSGal Pressman 97*2a152512SGal Pressman /* eq_db register */ 98*2a152512SGal Pressman #define EFA_REGS_EQ_DB_EQN_MASK 0xffff 99*2a152512SGal Pressman #define EFA_REGS_EQ_DB_ARM_MASK 0x80000000 100*2a152512SGal Pressman 10101edac3aSGal Pressman #endif /* _EFA_REGS_H_ */ 102