1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 2 /* 3 * Copyright 2018-2019 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #ifndef _EFA_COM_H_ 7 #define _EFA_COM_H_ 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/semaphore.h> 13 #include <linux/sched.h> 14 15 #include <rdma/ib_verbs.h> 16 17 #include "efa_common_defs.h" 18 #include "efa_admin_defs.h" 19 #include "efa_admin_cmds_defs.h" 20 #include "efa_regs_defs.h" 21 22 #define EFA_MAX_HANDLERS 256 23 24 struct efa_com_admin_cq { 25 struct efa_admin_acq_entry *entries; 26 dma_addr_t dma_addr; 27 spinlock_t lock; /* Protects ACQ */ 28 29 u16 cc; /* consumer counter */ 30 u8 phase; 31 }; 32 33 struct efa_com_admin_sq { 34 struct efa_admin_aq_entry *entries; 35 dma_addr_t dma_addr; 36 spinlock_t lock; /* Protects ASQ */ 37 38 u32 __iomem *db_addr; 39 40 u16 cc; /* consumer counter */ 41 u16 pc; /* producer counter */ 42 u8 phase; 43 44 }; 45 46 /* Don't use anything other than atomic64 */ 47 struct efa_com_stats_admin { 48 atomic64_t submitted_cmd; 49 atomic64_t completed_cmd; 50 atomic64_t no_completion; 51 }; 52 53 enum { 54 EFA_AQ_STATE_RUNNING_BIT = 0, 55 EFA_AQ_STATE_POLLING_BIT = 1, 56 }; 57 58 struct efa_com_admin_queue { 59 void *dmadev; 60 void *efa_dev; 61 struct efa_comp_ctx *comp_ctx; 62 u32 completion_timeout; /* usecs */ 63 u16 poll_interval; /* msecs */ 64 u16 depth; 65 struct efa_com_admin_cq cq; 66 struct efa_com_admin_sq sq; 67 u16 msix_vector_idx; 68 69 unsigned long state; 70 71 /* Count the number of available admin commands */ 72 struct semaphore avail_cmds; 73 74 struct efa_com_stats_admin stats; 75 76 spinlock_t comp_ctx_lock; /* Protects completion context pool */ 77 u32 *comp_ctx_pool; 78 u16 comp_ctx_pool_next; 79 }; 80 81 struct efa_aenq_handlers; 82 83 struct efa_com_aenq { 84 struct efa_admin_aenq_entry *entries; 85 struct efa_aenq_handlers *aenq_handlers; 86 dma_addr_t dma_addr; 87 u32 cc; /* consumer counter */ 88 u16 msix_vector_idx; 89 u16 depth; 90 u8 phase; 91 }; 92 93 struct efa_com_mmio_read { 94 struct efa_admin_mmio_req_read_less_resp *read_resp; 95 dma_addr_t read_resp_dma_addr; 96 u16 seq_num; 97 u16 mmio_read_timeout; /* usecs */ 98 /* serializes mmio reads */ 99 spinlock_t lock; 100 }; 101 102 struct efa_com_dev { 103 struct efa_com_admin_queue aq; 104 struct efa_com_aenq aenq; 105 u8 __iomem *reg_bar; 106 void *dmadev; 107 void *efa_dev; 108 u32 supported_features; 109 u32 dma_addr_bits; 110 111 struct efa_com_mmio_read mmio_read; 112 }; 113 114 typedef void (*efa_aenq_handler)(void *data, 115 struct efa_admin_aenq_entry *aenq_e); 116 117 /* Holds aenq handlers. Indexed by AENQ event group */ 118 struct efa_aenq_handlers { 119 efa_aenq_handler handlers[EFA_MAX_HANDLERS]; 120 efa_aenq_handler unimplemented_handler; 121 }; 122 123 int efa_com_admin_init(struct efa_com_dev *edev, 124 struct efa_aenq_handlers *aenq_handlers); 125 void efa_com_admin_destroy(struct efa_com_dev *edev); 126 int efa_com_dev_reset(struct efa_com_dev *edev, 127 enum efa_regs_reset_reason_types reset_reason); 128 void efa_com_set_admin_polling_mode(struct efa_com_dev *edev, bool polling); 129 void efa_com_admin_q_comp_intr_handler(struct efa_com_dev *edev); 130 int efa_com_mmio_reg_read_init(struct efa_com_dev *edev); 131 void efa_com_mmio_reg_read_destroy(struct efa_com_dev *edev); 132 133 int efa_com_validate_version(struct efa_com_dev *edev); 134 int efa_com_get_dma_width(struct efa_com_dev *edev); 135 136 int efa_com_cmd_exec(struct efa_com_admin_queue *aq, 137 struct efa_admin_aq_entry *cmd, 138 size_t cmd_size, 139 struct efa_admin_acq_entry *comp, 140 size_t comp_size); 141 void efa_com_aenq_intr_handler(struct efa_com_dev *edev, void *data); 142 143 #endif /* _EFA_COM_H_ */ 144