1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
2 /*
3  * Copyright 2018-2019 Amazon.com, Inc. or its affiliates. All rights reserved.
4  */
5 
6 #ifndef _EFA_ADMIN_H_
7 #define _EFA_ADMIN_H_
8 
9 enum efa_admin_aq_completion_status {
10 	EFA_ADMIN_SUCCESS                           = 0,
11 	EFA_ADMIN_RESOURCE_ALLOCATION_FAILURE       = 1,
12 	EFA_ADMIN_BAD_OPCODE                        = 2,
13 	EFA_ADMIN_UNSUPPORTED_OPCODE                = 3,
14 	EFA_ADMIN_MALFORMED_REQUEST                 = 4,
15 	/* Additional status is provided in ACQ entry extended_status */
16 	EFA_ADMIN_ILLEGAL_PARAMETER                 = 5,
17 	EFA_ADMIN_UNKNOWN_ERROR                     = 6,
18 	EFA_ADMIN_RESOURCE_BUSY                     = 7,
19 };
20 
21 struct efa_admin_aq_common_desc {
22 	/*
23 	 * 11:0 : command_id
24 	 * 15:12 : reserved12
25 	 */
26 	u16 command_id;
27 
28 	/* as appears in efa_admin_aq_opcode */
29 	u8 opcode;
30 
31 	/*
32 	 * 0 : phase
33 	 * 1 : ctrl_data - control buffer address valid
34 	 * 2 : ctrl_data_indirect - control buffer address
35 	 *    points to list of pages with addresses of control
36 	 *    buffers
37 	 * 7:3 : reserved3
38 	 */
39 	u8 flags;
40 };
41 
42 /*
43  * used in efa_admin_aq_entry. Can point directly to control data, or to a
44  * page list chunk. Used also at the end of indirect mode page list chunks,
45  * for chaining.
46  */
47 struct efa_admin_ctrl_buff_info {
48 	u32 length;
49 
50 	struct efa_common_mem_addr address;
51 };
52 
53 struct efa_admin_aq_entry {
54 	struct efa_admin_aq_common_desc aq_common_descriptor;
55 
56 	union {
57 		u32 inline_data_w1[3];
58 
59 		struct efa_admin_ctrl_buff_info control_buffer;
60 	} u;
61 
62 	u32 inline_data_w4[12];
63 };
64 
65 struct efa_admin_acq_common_desc {
66 	/*
67 	 * command identifier to associate it with the aq descriptor
68 	 * 11:0 : command_id
69 	 * 15:12 : reserved12
70 	 */
71 	u16 command;
72 
73 	u8 status;
74 
75 	/*
76 	 * 0 : phase
77 	 * 7:1 : reserved1
78 	 */
79 	u8 flags;
80 
81 	u16 extended_status;
82 
83 	/*
84 	 * indicates to the driver which AQ entry has been consumed by the
85 	 *    device and could be reused
86 	 */
87 	u16 sq_head_indx;
88 };
89 
90 struct efa_admin_acq_entry {
91 	struct efa_admin_acq_common_desc acq_common_descriptor;
92 
93 	u32 response_specific_data[14];
94 };
95 
96 struct efa_admin_aenq_common_desc {
97 	u16 group;
98 
99 	u16 syndrom;
100 
101 	/*
102 	 * 0 : phase
103 	 * 7:1 : reserved - MBZ
104 	 */
105 	u8 flags;
106 
107 	u8 reserved1[3];
108 
109 	u32 timestamp_low;
110 
111 	u32 timestamp_high;
112 };
113 
114 struct efa_admin_aenq_entry {
115 	struct efa_admin_aenq_common_desc aenq_common_desc;
116 
117 	/* command specific inline data */
118 	u32 inline_data_w4[12];
119 };
120 
121 /* aq_common_desc */
122 #define EFA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK            GENMASK(11, 0)
123 #define EFA_ADMIN_AQ_COMMON_DESC_PHASE_MASK                 BIT(0)
124 #define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT            1
125 #define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK             BIT(1)
126 #define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT   2
127 #define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK    BIT(2)
128 
129 /* acq_common_desc */
130 #define EFA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK           GENMASK(11, 0)
131 #define EFA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK                BIT(0)
132 
133 /* aenq_common_desc */
134 #define EFA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK               BIT(0)
135 
136 #endif /* _EFA_ADMIN_H_ */
137