1 /* 2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/module.h> 33 #include <linux/moduleparam.h> 34 #include <linux/debugfs.h> 35 #include <linux/vmalloc.h> 36 37 #include <rdma/ib_verbs.h> 38 39 #include "iw_cxgb4.h" 40 41 #define DRV_VERSION "0.1" 42 43 MODULE_AUTHOR("Steve Wise"); 44 MODULE_DESCRIPTION("Chelsio T4/T5 RDMA Driver"); 45 MODULE_LICENSE("Dual BSD/GPL"); 46 MODULE_VERSION(DRV_VERSION); 47 48 static int allow_db_fc_on_t5; 49 module_param(allow_db_fc_on_t5, int, 0644); 50 MODULE_PARM_DESC(allow_db_fc_on_t5, 51 "Allow DB Flow Control on T5 (default = 0)"); 52 53 static int allow_db_coalescing_on_t5; 54 module_param(allow_db_coalescing_on_t5, int, 0644); 55 MODULE_PARM_DESC(allow_db_coalescing_on_t5, 56 "Allow DB Coalescing on T5 (default = 0)"); 57 58 struct uld_ctx { 59 struct list_head entry; 60 struct cxgb4_lld_info lldi; 61 struct c4iw_dev *dev; 62 }; 63 64 static LIST_HEAD(uld_ctx_list); 65 static DEFINE_MUTEX(dev_mutex); 66 67 #define DB_FC_RESUME_SIZE 64 68 #define DB_FC_RESUME_DELAY 1 69 #define DB_FC_DRAIN_THRESH 0 70 71 static struct dentry *c4iw_debugfs_root; 72 73 struct c4iw_debugfs_data { 74 struct c4iw_dev *devp; 75 char *buf; 76 int bufsize; 77 int pos; 78 }; 79 80 static int count_idrs(int id, void *p, void *data) 81 { 82 int *countp = data; 83 84 *countp = *countp + 1; 85 return 0; 86 } 87 88 static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count, 89 loff_t *ppos) 90 { 91 struct c4iw_debugfs_data *d = file->private_data; 92 93 return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos); 94 } 95 96 static int dump_qp(int id, void *p, void *data) 97 { 98 struct c4iw_qp *qp = p; 99 struct c4iw_debugfs_data *qpd = data; 100 int space; 101 int cc; 102 103 if (id != qp->wq.sq.qid) 104 return 0; 105 106 space = qpd->bufsize - qpd->pos - 1; 107 if (space == 0) 108 return 1; 109 110 if (qp->ep) { 111 if (qp->ep->com.local_addr.ss_family == AF_INET) { 112 struct sockaddr_in *lsin = (struct sockaddr_in *) 113 &qp->ep->com.local_addr; 114 struct sockaddr_in *rsin = (struct sockaddr_in *) 115 &qp->ep->com.remote_addr; 116 117 cc = snprintf(qpd->buf + qpd->pos, space, 118 "rc qp sq id %u rq id %u state %u " 119 "onchip %u ep tid %u state %u " 120 "%pI4:%u->%pI4:%u\n", 121 qp->wq.sq.qid, qp->wq.rq.qid, 122 (int)qp->attr.state, 123 qp->wq.sq.flags & T4_SQ_ONCHIP, 124 qp->ep->hwtid, (int)qp->ep->com.state, 125 &lsin->sin_addr, ntohs(lsin->sin_port), 126 &rsin->sin_addr, ntohs(rsin->sin_port)); 127 } else { 128 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *) 129 &qp->ep->com.local_addr; 130 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *) 131 &qp->ep->com.remote_addr; 132 133 cc = snprintf(qpd->buf + qpd->pos, space, 134 "rc qp sq id %u rq id %u state %u " 135 "onchip %u ep tid %u state %u " 136 "%pI6:%u->%pI6:%u\n", 137 qp->wq.sq.qid, qp->wq.rq.qid, 138 (int)qp->attr.state, 139 qp->wq.sq.flags & T4_SQ_ONCHIP, 140 qp->ep->hwtid, (int)qp->ep->com.state, 141 &lsin6->sin6_addr, 142 ntohs(lsin6->sin6_port), 143 &rsin6->sin6_addr, 144 ntohs(rsin6->sin6_port)); 145 } 146 } else 147 cc = snprintf(qpd->buf + qpd->pos, space, 148 "qp sq id %u rq id %u state %u onchip %u\n", 149 qp->wq.sq.qid, qp->wq.rq.qid, 150 (int)qp->attr.state, 151 qp->wq.sq.flags & T4_SQ_ONCHIP); 152 if (cc < space) 153 qpd->pos += cc; 154 return 0; 155 } 156 157 static int qp_release(struct inode *inode, struct file *file) 158 { 159 struct c4iw_debugfs_data *qpd = file->private_data; 160 if (!qpd) { 161 printk(KERN_INFO "%s null qpd?\n", __func__); 162 return 0; 163 } 164 vfree(qpd->buf); 165 kfree(qpd); 166 return 0; 167 } 168 169 static int qp_open(struct inode *inode, struct file *file) 170 { 171 struct c4iw_debugfs_data *qpd; 172 int ret = 0; 173 int count = 1; 174 175 qpd = kmalloc(sizeof *qpd, GFP_KERNEL); 176 if (!qpd) { 177 ret = -ENOMEM; 178 goto out; 179 } 180 qpd->devp = inode->i_private; 181 qpd->pos = 0; 182 183 spin_lock_irq(&qpd->devp->lock); 184 idr_for_each(&qpd->devp->qpidr, count_idrs, &count); 185 spin_unlock_irq(&qpd->devp->lock); 186 187 qpd->bufsize = count * 128; 188 qpd->buf = vmalloc(qpd->bufsize); 189 if (!qpd->buf) { 190 ret = -ENOMEM; 191 goto err1; 192 } 193 194 spin_lock_irq(&qpd->devp->lock); 195 idr_for_each(&qpd->devp->qpidr, dump_qp, qpd); 196 spin_unlock_irq(&qpd->devp->lock); 197 198 qpd->buf[qpd->pos++] = 0; 199 file->private_data = qpd; 200 goto out; 201 err1: 202 kfree(qpd); 203 out: 204 return ret; 205 } 206 207 static const struct file_operations qp_debugfs_fops = { 208 .owner = THIS_MODULE, 209 .open = qp_open, 210 .release = qp_release, 211 .read = debugfs_read, 212 .llseek = default_llseek, 213 }; 214 215 static int dump_stag(int id, void *p, void *data) 216 { 217 struct c4iw_debugfs_data *stagd = data; 218 int space; 219 int cc; 220 221 space = stagd->bufsize - stagd->pos - 1; 222 if (space == 0) 223 return 1; 224 225 cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8); 226 if (cc < space) 227 stagd->pos += cc; 228 return 0; 229 } 230 231 static int stag_release(struct inode *inode, struct file *file) 232 { 233 struct c4iw_debugfs_data *stagd = file->private_data; 234 if (!stagd) { 235 printk(KERN_INFO "%s null stagd?\n", __func__); 236 return 0; 237 } 238 kfree(stagd->buf); 239 kfree(stagd); 240 return 0; 241 } 242 243 static int stag_open(struct inode *inode, struct file *file) 244 { 245 struct c4iw_debugfs_data *stagd; 246 int ret = 0; 247 int count = 1; 248 249 stagd = kmalloc(sizeof *stagd, GFP_KERNEL); 250 if (!stagd) { 251 ret = -ENOMEM; 252 goto out; 253 } 254 stagd->devp = inode->i_private; 255 stagd->pos = 0; 256 257 spin_lock_irq(&stagd->devp->lock); 258 idr_for_each(&stagd->devp->mmidr, count_idrs, &count); 259 spin_unlock_irq(&stagd->devp->lock); 260 261 stagd->bufsize = count * sizeof("0x12345678\n"); 262 stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL); 263 if (!stagd->buf) { 264 ret = -ENOMEM; 265 goto err1; 266 } 267 268 spin_lock_irq(&stagd->devp->lock); 269 idr_for_each(&stagd->devp->mmidr, dump_stag, stagd); 270 spin_unlock_irq(&stagd->devp->lock); 271 272 stagd->buf[stagd->pos++] = 0; 273 file->private_data = stagd; 274 goto out; 275 err1: 276 kfree(stagd); 277 out: 278 return ret; 279 } 280 281 static const struct file_operations stag_debugfs_fops = { 282 .owner = THIS_MODULE, 283 .open = stag_open, 284 .release = stag_release, 285 .read = debugfs_read, 286 .llseek = default_llseek, 287 }; 288 289 static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY", "STOPPED"}; 290 291 static int stats_show(struct seq_file *seq, void *v) 292 { 293 struct c4iw_dev *dev = seq->private; 294 295 seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current", 296 "Max", "Fail"); 297 seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n", 298 dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur, 299 dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail); 300 seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n", 301 dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur, 302 dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail); 303 seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n", 304 dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur, 305 dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail); 306 seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n", 307 dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur, 308 dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail); 309 seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n", 310 dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur, 311 dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail); 312 seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n", 313 dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur, 314 dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail); 315 seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full); 316 seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty); 317 seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop); 318 seq_printf(seq, " DB State: %s Transitions %llu FC Interruptions %llu\n", 319 db_state_str[dev->db_state], 320 dev->rdev.stats.db_state_transitions, 321 dev->rdev.stats.db_fc_interruptions); 322 seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full); 323 seq_printf(seq, "ACT_OFLD_CONN_FAILS: %10llu\n", 324 dev->rdev.stats.act_ofld_conn_fails); 325 seq_printf(seq, "PAS_OFLD_CONN_FAILS: %10llu\n", 326 dev->rdev.stats.pas_ofld_conn_fails); 327 return 0; 328 } 329 330 static int stats_open(struct inode *inode, struct file *file) 331 { 332 return single_open(file, stats_show, inode->i_private); 333 } 334 335 static ssize_t stats_clear(struct file *file, const char __user *buf, 336 size_t count, loff_t *pos) 337 { 338 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private; 339 340 mutex_lock(&dev->rdev.stats.lock); 341 dev->rdev.stats.pd.max = 0; 342 dev->rdev.stats.pd.fail = 0; 343 dev->rdev.stats.qid.max = 0; 344 dev->rdev.stats.qid.fail = 0; 345 dev->rdev.stats.stag.max = 0; 346 dev->rdev.stats.stag.fail = 0; 347 dev->rdev.stats.pbl.max = 0; 348 dev->rdev.stats.pbl.fail = 0; 349 dev->rdev.stats.rqt.max = 0; 350 dev->rdev.stats.rqt.fail = 0; 351 dev->rdev.stats.ocqp.max = 0; 352 dev->rdev.stats.ocqp.fail = 0; 353 dev->rdev.stats.db_full = 0; 354 dev->rdev.stats.db_empty = 0; 355 dev->rdev.stats.db_drop = 0; 356 dev->rdev.stats.db_state_transitions = 0; 357 dev->rdev.stats.tcam_full = 0; 358 dev->rdev.stats.act_ofld_conn_fails = 0; 359 dev->rdev.stats.pas_ofld_conn_fails = 0; 360 mutex_unlock(&dev->rdev.stats.lock); 361 return count; 362 } 363 364 static const struct file_operations stats_debugfs_fops = { 365 .owner = THIS_MODULE, 366 .open = stats_open, 367 .release = single_release, 368 .read = seq_read, 369 .llseek = seq_lseek, 370 .write = stats_clear, 371 }; 372 373 static int dump_ep(int id, void *p, void *data) 374 { 375 struct c4iw_ep *ep = p; 376 struct c4iw_debugfs_data *epd = data; 377 int space; 378 int cc; 379 380 space = epd->bufsize - epd->pos - 1; 381 if (space == 0) 382 return 1; 383 384 if (ep->com.local_addr.ss_family == AF_INET) { 385 struct sockaddr_in *lsin = (struct sockaddr_in *) 386 &ep->com.local_addr; 387 struct sockaddr_in *rsin = (struct sockaddr_in *) 388 &ep->com.remote_addr; 389 390 cc = snprintf(epd->buf + epd->pos, space, 391 "ep %p cm_id %p qp %p state %d flags 0x%lx " 392 "history 0x%lx hwtid %d atid %d " 393 "%pI4:%d <-> %pI4:%d\n", 394 ep, ep->com.cm_id, ep->com.qp, 395 (int)ep->com.state, ep->com.flags, 396 ep->com.history, ep->hwtid, ep->atid, 397 &lsin->sin_addr, ntohs(lsin->sin_port), 398 &rsin->sin_addr, ntohs(rsin->sin_port)); 399 } else { 400 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *) 401 &ep->com.local_addr; 402 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *) 403 &ep->com.remote_addr; 404 405 cc = snprintf(epd->buf + epd->pos, space, 406 "ep %p cm_id %p qp %p state %d flags 0x%lx " 407 "history 0x%lx hwtid %d atid %d " 408 "%pI6:%d <-> %pI6:%d\n", 409 ep, ep->com.cm_id, ep->com.qp, 410 (int)ep->com.state, ep->com.flags, 411 ep->com.history, ep->hwtid, ep->atid, 412 &lsin6->sin6_addr, ntohs(lsin6->sin6_port), 413 &rsin6->sin6_addr, ntohs(rsin6->sin6_port)); 414 } 415 if (cc < space) 416 epd->pos += cc; 417 return 0; 418 } 419 420 static int dump_listen_ep(int id, void *p, void *data) 421 { 422 struct c4iw_listen_ep *ep = p; 423 struct c4iw_debugfs_data *epd = data; 424 int space; 425 int cc; 426 427 space = epd->bufsize - epd->pos - 1; 428 if (space == 0) 429 return 1; 430 431 if (ep->com.local_addr.ss_family == AF_INET) { 432 struct sockaddr_in *lsin = (struct sockaddr_in *) 433 &ep->com.local_addr; 434 435 cc = snprintf(epd->buf + epd->pos, space, 436 "ep %p cm_id %p state %d flags 0x%lx stid %d " 437 "backlog %d %pI4:%d\n", 438 ep, ep->com.cm_id, (int)ep->com.state, 439 ep->com.flags, ep->stid, ep->backlog, 440 &lsin->sin_addr, ntohs(lsin->sin_port)); 441 } else { 442 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *) 443 &ep->com.local_addr; 444 445 cc = snprintf(epd->buf + epd->pos, space, 446 "ep %p cm_id %p state %d flags 0x%lx stid %d " 447 "backlog %d %pI6:%d\n", 448 ep, ep->com.cm_id, (int)ep->com.state, 449 ep->com.flags, ep->stid, ep->backlog, 450 &lsin6->sin6_addr, ntohs(lsin6->sin6_port)); 451 } 452 if (cc < space) 453 epd->pos += cc; 454 return 0; 455 } 456 457 static int ep_release(struct inode *inode, struct file *file) 458 { 459 struct c4iw_debugfs_data *epd = file->private_data; 460 if (!epd) { 461 pr_info("%s null qpd?\n", __func__); 462 return 0; 463 } 464 vfree(epd->buf); 465 kfree(epd); 466 return 0; 467 } 468 469 static int ep_open(struct inode *inode, struct file *file) 470 { 471 struct c4iw_debugfs_data *epd; 472 int ret = 0; 473 int count = 1; 474 475 epd = kmalloc(sizeof(*epd), GFP_KERNEL); 476 if (!epd) { 477 ret = -ENOMEM; 478 goto out; 479 } 480 epd->devp = inode->i_private; 481 epd->pos = 0; 482 483 spin_lock_irq(&epd->devp->lock); 484 idr_for_each(&epd->devp->hwtid_idr, count_idrs, &count); 485 idr_for_each(&epd->devp->atid_idr, count_idrs, &count); 486 idr_for_each(&epd->devp->stid_idr, count_idrs, &count); 487 spin_unlock_irq(&epd->devp->lock); 488 489 epd->bufsize = count * 160; 490 epd->buf = vmalloc(epd->bufsize); 491 if (!epd->buf) { 492 ret = -ENOMEM; 493 goto err1; 494 } 495 496 spin_lock_irq(&epd->devp->lock); 497 idr_for_each(&epd->devp->hwtid_idr, dump_ep, epd); 498 idr_for_each(&epd->devp->atid_idr, dump_ep, epd); 499 idr_for_each(&epd->devp->stid_idr, dump_listen_ep, epd); 500 spin_unlock_irq(&epd->devp->lock); 501 502 file->private_data = epd; 503 goto out; 504 err1: 505 kfree(epd); 506 out: 507 return ret; 508 } 509 510 static const struct file_operations ep_debugfs_fops = { 511 .owner = THIS_MODULE, 512 .open = ep_open, 513 .release = ep_release, 514 .read = debugfs_read, 515 }; 516 517 static int setup_debugfs(struct c4iw_dev *devp) 518 { 519 struct dentry *de; 520 521 if (!devp->debugfs_root) 522 return -1; 523 524 de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root, 525 (void *)devp, &qp_debugfs_fops); 526 if (de && de->d_inode) 527 de->d_inode->i_size = 4096; 528 529 de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root, 530 (void *)devp, &stag_debugfs_fops); 531 if (de && de->d_inode) 532 de->d_inode->i_size = 4096; 533 534 de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root, 535 (void *)devp, &stats_debugfs_fops); 536 if (de && de->d_inode) 537 de->d_inode->i_size = 4096; 538 539 de = debugfs_create_file("eps", S_IWUSR, devp->debugfs_root, 540 (void *)devp, &ep_debugfs_fops); 541 if (de && de->d_inode) 542 de->d_inode->i_size = 4096; 543 544 return 0; 545 } 546 547 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev, 548 struct c4iw_dev_ucontext *uctx) 549 { 550 struct list_head *pos, *nxt; 551 struct c4iw_qid_list *entry; 552 553 mutex_lock(&uctx->lock); 554 list_for_each_safe(pos, nxt, &uctx->qpids) { 555 entry = list_entry(pos, struct c4iw_qid_list, entry); 556 list_del_init(&entry->entry); 557 if (!(entry->qid & rdev->qpmask)) { 558 c4iw_put_resource(&rdev->resource.qid_table, 559 entry->qid); 560 mutex_lock(&rdev->stats.lock); 561 rdev->stats.qid.cur -= rdev->qpmask + 1; 562 mutex_unlock(&rdev->stats.lock); 563 } 564 kfree(entry); 565 } 566 567 list_for_each_safe(pos, nxt, &uctx->qpids) { 568 entry = list_entry(pos, struct c4iw_qid_list, entry); 569 list_del_init(&entry->entry); 570 kfree(entry); 571 } 572 mutex_unlock(&uctx->lock); 573 } 574 575 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev, 576 struct c4iw_dev_ucontext *uctx) 577 { 578 INIT_LIST_HEAD(&uctx->qpids); 579 INIT_LIST_HEAD(&uctx->cqids); 580 mutex_init(&uctx->lock); 581 } 582 583 /* Caller takes care of locking if needed */ 584 static int c4iw_rdev_open(struct c4iw_rdev *rdev) 585 { 586 int err; 587 588 c4iw_init_dev_ucontext(rdev, &rdev->uctx); 589 590 /* 591 * qpshift is the number of bits to shift the qpid left in order 592 * to get the correct address of the doorbell for that qp. 593 */ 594 rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density); 595 rdev->qpmask = rdev->lldi.udb_density - 1; 596 rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density); 597 rdev->cqmask = rdev->lldi.ucq_density - 1; 598 PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d " 599 "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x " 600 "qp qid start %u size %u cq qid start %u size %u\n", 601 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start, 602 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev), 603 rdev->lldi.vr->pbl.start, 604 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start, 605 rdev->lldi.vr->rq.size, 606 rdev->lldi.vr->qp.start, 607 rdev->lldi.vr->qp.size, 608 rdev->lldi.vr->cq.start, 609 rdev->lldi.vr->cq.size); 610 PDBG("udb len 0x%x udb base %llx db_reg %p gts_reg %p qpshift %lu " 611 "qpmask 0x%x cqshift %lu cqmask 0x%x\n", 612 (unsigned)pci_resource_len(rdev->lldi.pdev, 2), 613 (u64)pci_resource_start(rdev->lldi.pdev, 2), 614 rdev->lldi.db_reg, 615 rdev->lldi.gts_reg, 616 rdev->qpshift, rdev->qpmask, 617 rdev->cqshift, rdev->cqmask); 618 619 if (c4iw_num_stags(rdev) == 0) { 620 err = -EINVAL; 621 goto err1; 622 } 623 624 rdev->stats.pd.total = T4_MAX_NUM_PD; 625 rdev->stats.stag.total = rdev->lldi.vr->stag.size; 626 rdev->stats.pbl.total = rdev->lldi.vr->pbl.size; 627 rdev->stats.rqt.total = rdev->lldi.vr->rq.size; 628 rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size; 629 rdev->stats.qid.total = rdev->lldi.vr->qp.size; 630 631 err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD); 632 if (err) { 633 printk(KERN_ERR MOD "error %d initializing resources\n", err); 634 goto err1; 635 } 636 err = c4iw_pblpool_create(rdev); 637 if (err) { 638 printk(KERN_ERR MOD "error %d initializing pbl pool\n", err); 639 goto err2; 640 } 641 err = c4iw_rqtpool_create(rdev); 642 if (err) { 643 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); 644 goto err3; 645 } 646 err = c4iw_ocqp_pool_create(rdev); 647 if (err) { 648 printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err); 649 goto err4; 650 } 651 rdev->status_page = (struct t4_dev_status_page *) 652 __get_free_page(GFP_KERNEL); 653 if (!rdev->status_page) { 654 pr_err(MOD "error allocating status page\n"); 655 goto err4; 656 } 657 return 0; 658 err4: 659 c4iw_rqtpool_destroy(rdev); 660 err3: 661 c4iw_pblpool_destroy(rdev); 662 err2: 663 c4iw_destroy_resource(&rdev->resource); 664 err1: 665 return err; 666 } 667 668 static void c4iw_rdev_close(struct c4iw_rdev *rdev) 669 { 670 free_page((unsigned long)rdev->status_page); 671 c4iw_pblpool_destroy(rdev); 672 c4iw_rqtpool_destroy(rdev); 673 c4iw_destroy_resource(&rdev->resource); 674 } 675 676 static void c4iw_dealloc(struct uld_ctx *ctx) 677 { 678 c4iw_rdev_close(&ctx->dev->rdev); 679 idr_destroy(&ctx->dev->cqidr); 680 idr_destroy(&ctx->dev->qpidr); 681 idr_destroy(&ctx->dev->mmidr); 682 idr_destroy(&ctx->dev->hwtid_idr); 683 idr_destroy(&ctx->dev->stid_idr); 684 idr_destroy(&ctx->dev->atid_idr); 685 if (ctx->dev->rdev.bar2_kva) 686 iounmap(ctx->dev->rdev.bar2_kva); 687 if (ctx->dev->rdev.oc_mw_kva) 688 iounmap(ctx->dev->rdev.oc_mw_kva); 689 ib_dealloc_device(&ctx->dev->ibdev); 690 ctx->dev = NULL; 691 } 692 693 static void c4iw_remove(struct uld_ctx *ctx) 694 { 695 PDBG("%s c4iw_dev %p\n", __func__, ctx->dev); 696 c4iw_unregister_device(ctx->dev); 697 c4iw_dealloc(ctx); 698 } 699 700 static int rdma_supported(const struct cxgb4_lld_info *infop) 701 { 702 return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 && 703 infop->vr->rq.size > 0 && infop->vr->qp.size > 0 && 704 infop->vr->cq.size > 0; 705 } 706 707 static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) 708 { 709 struct c4iw_dev *devp; 710 int ret; 711 712 if (!rdma_supported(infop)) { 713 printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n", 714 pci_name(infop->pdev)); 715 return ERR_PTR(-ENOSYS); 716 } 717 if (!ocqp_supported(infop)) 718 pr_info("%s: On-Chip Queues not supported on this device.\n", 719 pci_name(infop->pdev)); 720 721 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp)); 722 if (!devp) { 723 printk(KERN_ERR MOD "Cannot allocate ib device\n"); 724 return ERR_PTR(-ENOMEM); 725 } 726 devp->rdev.lldi = *infop; 727 728 /* 729 * For T5 devices, we map all of BAR2 with WC. 730 * For T4 devices with onchip qp mem, we map only that part 731 * of BAR2 with WC. 732 */ 733 devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2); 734 if (is_t5(devp->rdev.lldi.adapter_type)) { 735 devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa, 736 pci_resource_len(devp->rdev.lldi.pdev, 2)); 737 if (!devp->rdev.bar2_kva) { 738 pr_err(MOD "Unable to ioremap BAR2\n"); 739 return ERR_PTR(-EINVAL); 740 } 741 } else if (ocqp_supported(infop)) { 742 devp->rdev.oc_mw_pa = 743 pci_resource_start(devp->rdev.lldi.pdev, 2) + 744 pci_resource_len(devp->rdev.lldi.pdev, 2) - 745 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size); 746 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, 747 devp->rdev.lldi.vr->ocq.size); 748 if (!devp->rdev.oc_mw_kva) { 749 pr_err(MOD "Unable to ioremap onchip mem\n"); 750 return ERR_PTR(-EINVAL); 751 } 752 } 753 754 PDBG(KERN_INFO MOD "ocq memory: " 755 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n", 756 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size, 757 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva); 758 759 ret = c4iw_rdev_open(&devp->rdev); 760 if (ret) { 761 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret); 762 ib_dealloc_device(&devp->ibdev); 763 return ERR_PTR(ret); 764 } 765 766 idr_init(&devp->cqidr); 767 idr_init(&devp->qpidr); 768 idr_init(&devp->mmidr); 769 idr_init(&devp->hwtid_idr); 770 idr_init(&devp->stid_idr); 771 idr_init(&devp->atid_idr); 772 spin_lock_init(&devp->lock); 773 mutex_init(&devp->rdev.stats.lock); 774 mutex_init(&devp->db_mutex); 775 INIT_LIST_HEAD(&devp->db_fc_list); 776 777 if (c4iw_debugfs_root) { 778 devp->debugfs_root = debugfs_create_dir( 779 pci_name(devp->rdev.lldi.pdev), 780 c4iw_debugfs_root); 781 setup_debugfs(devp); 782 } 783 return devp; 784 } 785 786 static void *c4iw_uld_add(const struct cxgb4_lld_info *infop) 787 { 788 struct uld_ctx *ctx; 789 static int vers_printed; 790 int i; 791 792 if (!vers_printed++) 793 pr_info("Chelsio T4/T5 RDMA Driver - version %s\n", 794 DRV_VERSION); 795 796 ctx = kzalloc(sizeof *ctx, GFP_KERNEL); 797 if (!ctx) { 798 ctx = ERR_PTR(-ENOMEM); 799 goto out; 800 } 801 ctx->lldi = *infop; 802 803 PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n", 804 __func__, pci_name(ctx->lldi.pdev), 805 ctx->lldi.nchan, ctx->lldi.nrxq, 806 ctx->lldi.ntxq, ctx->lldi.nports); 807 808 mutex_lock(&dev_mutex); 809 list_add_tail(&ctx->entry, &uld_ctx_list); 810 mutex_unlock(&dev_mutex); 811 812 for (i = 0; i < ctx->lldi.nrxq; i++) 813 PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]); 814 out: 815 return ctx; 816 } 817 818 static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl, 819 const __be64 *rsp, 820 u32 pktshift) 821 { 822 struct sk_buff *skb; 823 824 /* 825 * Allocate space for cpl_pass_accept_req which will be synthesized by 826 * driver. Once the driver synthesizes the request the skb will go 827 * through the regular cpl_pass_accept_req processing. 828 * The math here assumes sizeof cpl_pass_accept_req >= sizeof 829 * cpl_rx_pkt. 830 */ 831 skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) + 832 sizeof(struct rss_header) - pktshift, GFP_ATOMIC); 833 if (unlikely(!skb)) 834 return NULL; 835 836 __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) + 837 sizeof(struct rss_header) - pktshift); 838 839 /* 840 * This skb will contain: 841 * rss_header from the rspq descriptor (1 flit) 842 * cpl_rx_pkt struct from the rspq descriptor (2 flits) 843 * space for the difference between the size of an 844 * rx_pkt and pass_accept_req cpl (1 flit) 845 * the packet data from the gl 846 */ 847 skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) + 848 sizeof(struct rss_header)); 849 skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) + 850 sizeof(struct cpl_pass_accept_req), 851 gl->va + pktshift, 852 gl->tot_len - pktshift); 853 return skb; 854 } 855 856 static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl, 857 const __be64 *rsp) 858 { 859 unsigned int opcode = *(u8 *)rsp; 860 struct sk_buff *skb; 861 862 if (opcode != CPL_RX_PKT) 863 goto out; 864 865 skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift); 866 if (skb == NULL) 867 goto out; 868 869 if (c4iw_handlers[opcode] == NULL) { 870 pr_info("%s no handler opcode 0x%x...\n", __func__, 871 opcode); 872 kfree_skb(skb); 873 goto out; 874 } 875 c4iw_handlers[opcode](dev, skb); 876 return 1; 877 out: 878 return 0; 879 } 880 881 static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, 882 const struct pkt_gl *gl) 883 { 884 struct uld_ctx *ctx = handle; 885 struct c4iw_dev *dev = ctx->dev; 886 struct sk_buff *skb; 887 u8 opcode; 888 889 if (gl == NULL) { 890 /* omit RSS and rsp_ctrl at end of descriptor */ 891 unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8; 892 893 skb = alloc_skb(256, GFP_ATOMIC); 894 if (!skb) 895 goto nomem; 896 __skb_put(skb, len); 897 skb_copy_to_linear_data(skb, &rsp[1], len); 898 } else if (gl == CXGB4_MSG_AN) { 899 const struct rsp_ctrl *rc = (void *)rsp; 900 901 u32 qid = be32_to_cpu(rc->pldbuflen_qid); 902 c4iw_ev_handler(dev, qid); 903 return 0; 904 } else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) { 905 if (recv_rx_pkt(dev, gl, rsp)) 906 return 0; 907 908 pr_info("%s: unexpected FL contents at %p, " \ 909 "RSS %#llx, FL %#llx, len %u\n", 910 pci_name(ctx->lldi.pdev), gl->va, 911 (unsigned long long)be64_to_cpu(*rsp), 912 (unsigned long long)be64_to_cpu( 913 *(__force __be64 *)gl->va), 914 gl->tot_len); 915 916 return 0; 917 } else { 918 skb = cxgb4_pktgl_to_skb(gl, 128, 128); 919 if (unlikely(!skb)) 920 goto nomem; 921 } 922 923 opcode = *(u8 *)rsp; 924 if (c4iw_handlers[opcode]) { 925 c4iw_handlers[opcode](dev, skb); 926 } else { 927 pr_info("%s no handler opcode 0x%x...\n", __func__, 928 opcode); 929 kfree_skb(skb); 930 } 931 932 return 0; 933 nomem: 934 return -1; 935 } 936 937 static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state) 938 { 939 struct uld_ctx *ctx = handle; 940 941 PDBG("%s new_state %u\n", __func__, new_state); 942 switch (new_state) { 943 case CXGB4_STATE_UP: 944 printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev)); 945 if (!ctx->dev) { 946 int ret; 947 948 ctx->dev = c4iw_alloc(&ctx->lldi); 949 if (IS_ERR(ctx->dev)) { 950 printk(KERN_ERR MOD 951 "%s: initialization failed: %ld\n", 952 pci_name(ctx->lldi.pdev), 953 PTR_ERR(ctx->dev)); 954 ctx->dev = NULL; 955 break; 956 } 957 ret = c4iw_register_device(ctx->dev); 958 if (ret) { 959 printk(KERN_ERR MOD 960 "%s: RDMA registration failed: %d\n", 961 pci_name(ctx->lldi.pdev), ret); 962 c4iw_dealloc(ctx); 963 } 964 } 965 break; 966 case CXGB4_STATE_DOWN: 967 printk(KERN_INFO MOD "%s: Down\n", 968 pci_name(ctx->lldi.pdev)); 969 if (ctx->dev) 970 c4iw_remove(ctx); 971 break; 972 case CXGB4_STATE_START_RECOVERY: 973 printk(KERN_INFO MOD "%s: Fatal Error\n", 974 pci_name(ctx->lldi.pdev)); 975 if (ctx->dev) { 976 struct ib_event event; 977 978 ctx->dev->rdev.flags |= T4_FATAL_ERROR; 979 memset(&event, 0, sizeof event); 980 event.event = IB_EVENT_DEVICE_FATAL; 981 event.device = &ctx->dev->ibdev; 982 ib_dispatch_event(&event); 983 c4iw_remove(ctx); 984 } 985 break; 986 case CXGB4_STATE_DETACH: 987 printk(KERN_INFO MOD "%s: Detach\n", 988 pci_name(ctx->lldi.pdev)); 989 if (ctx->dev) 990 c4iw_remove(ctx); 991 break; 992 } 993 return 0; 994 } 995 996 static int disable_qp_db(int id, void *p, void *data) 997 { 998 struct c4iw_qp *qp = p; 999 1000 t4_disable_wq_db(&qp->wq); 1001 return 0; 1002 } 1003 1004 static void stop_queues(struct uld_ctx *ctx) 1005 { 1006 unsigned long flags; 1007 1008 spin_lock_irqsave(&ctx->dev->lock, flags); 1009 ctx->dev->rdev.stats.db_state_transitions++; 1010 ctx->dev->db_state = STOPPED; 1011 if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) 1012 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL); 1013 else 1014 ctx->dev->rdev.status_page->db_off = 1; 1015 spin_unlock_irqrestore(&ctx->dev->lock, flags); 1016 } 1017 1018 static int enable_qp_db(int id, void *p, void *data) 1019 { 1020 struct c4iw_qp *qp = p; 1021 1022 t4_enable_wq_db(&qp->wq); 1023 return 0; 1024 } 1025 1026 static void resume_rc_qp(struct c4iw_qp *qp) 1027 { 1028 spin_lock(&qp->lock); 1029 t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc, 1030 is_t5(qp->rhp->rdev.lldi.adapter_type), NULL); 1031 qp->wq.sq.wq_pidx_inc = 0; 1032 t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc, 1033 is_t5(qp->rhp->rdev.lldi.adapter_type), NULL); 1034 qp->wq.rq.wq_pidx_inc = 0; 1035 spin_unlock(&qp->lock); 1036 } 1037 1038 static void resume_a_chunk(struct uld_ctx *ctx) 1039 { 1040 int i; 1041 struct c4iw_qp *qp; 1042 1043 for (i = 0; i < DB_FC_RESUME_SIZE; i++) { 1044 qp = list_first_entry(&ctx->dev->db_fc_list, struct c4iw_qp, 1045 db_fc_entry); 1046 list_del_init(&qp->db_fc_entry); 1047 resume_rc_qp(qp); 1048 if (list_empty(&ctx->dev->db_fc_list)) 1049 break; 1050 } 1051 } 1052 1053 static void resume_queues(struct uld_ctx *ctx) 1054 { 1055 spin_lock_irq(&ctx->dev->lock); 1056 if (ctx->dev->db_state != STOPPED) 1057 goto out; 1058 ctx->dev->db_state = FLOW_CONTROL; 1059 while (1) { 1060 if (list_empty(&ctx->dev->db_fc_list)) { 1061 WARN_ON(ctx->dev->db_state != FLOW_CONTROL); 1062 ctx->dev->db_state = NORMAL; 1063 ctx->dev->rdev.stats.db_state_transitions++; 1064 if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) { 1065 idr_for_each(&ctx->dev->qpidr, enable_qp_db, 1066 NULL); 1067 } else { 1068 ctx->dev->rdev.status_page->db_off = 0; 1069 } 1070 break; 1071 } else { 1072 if (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) 1073 < (ctx->dev->rdev.lldi.dbfifo_int_thresh << 1074 DB_FC_DRAIN_THRESH)) { 1075 resume_a_chunk(ctx); 1076 } 1077 if (!list_empty(&ctx->dev->db_fc_list)) { 1078 spin_unlock_irq(&ctx->dev->lock); 1079 if (DB_FC_RESUME_DELAY) { 1080 set_current_state(TASK_UNINTERRUPTIBLE); 1081 schedule_timeout(DB_FC_RESUME_DELAY); 1082 } 1083 spin_lock_irq(&ctx->dev->lock); 1084 if (ctx->dev->db_state != FLOW_CONTROL) 1085 break; 1086 } 1087 } 1088 } 1089 out: 1090 if (ctx->dev->db_state != NORMAL) 1091 ctx->dev->rdev.stats.db_fc_interruptions++; 1092 spin_unlock_irq(&ctx->dev->lock); 1093 } 1094 1095 struct qp_list { 1096 unsigned idx; 1097 struct c4iw_qp **qps; 1098 }; 1099 1100 static int add_and_ref_qp(int id, void *p, void *data) 1101 { 1102 struct qp_list *qp_listp = data; 1103 struct c4iw_qp *qp = p; 1104 1105 c4iw_qp_add_ref(&qp->ibqp); 1106 qp_listp->qps[qp_listp->idx++] = qp; 1107 return 0; 1108 } 1109 1110 static int count_qps(int id, void *p, void *data) 1111 { 1112 unsigned *countp = data; 1113 (*countp)++; 1114 return 0; 1115 } 1116 1117 static void deref_qps(struct qp_list *qp_list) 1118 { 1119 int idx; 1120 1121 for (idx = 0; idx < qp_list->idx; idx++) 1122 c4iw_qp_rem_ref(&qp_list->qps[idx]->ibqp); 1123 } 1124 1125 static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list) 1126 { 1127 int idx; 1128 int ret; 1129 1130 for (idx = 0; idx < qp_list->idx; idx++) { 1131 struct c4iw_qp *qp = qp_list->qps[idx]; 1132 1133 spin_lock_irq(&qp->rhp->lock); 1134 spin_lock(&qp->lock); 1135 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0], 1136 qp->wq.sq.qid, 1137 t4_sq_host_wq_pidx(&qp->wq), 1138 t4_sq_wq_size(&qp->wq)); 1139 if (ret) { 1140 pr_err(KERN_ERR MOD "%s: Fatal error - " 1141 "DB overflow recovery failed - " 1142 "error syncing SQ qid %u\n", 1143 pci_name(ctx->lldi.pdev), qp->wq.sq.qid); 1144 spin_unlock(&qp->lock); 1145 spin_unlock_irq(&qp->rhp->lock); 1146 return; 1147 } 1148 qp->wq.sq.wq_pidx_inc = 0; 1149 1150 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0], 1151 qp->wq.rq.qid, 1152 t4_rq_host_wq_pidx(&qp->wq), 1153 t4_rq_wq_size(&qp->wq)); 1154 1155 if (ret) { 1156 pr_err(KERN_ERR MOD "%s: Fatal error - " 1157 "DB overflow recovery failed - " 1158 "error syncing RQ qid %u\n", 1159 pci_name(ctx->lldi.pdev), qp->wq.rq.qid); 1160 spin_unlock(&qp->lock); 1161 spin_unlock_irq(&qp->rhp->lock); 1162 return; 1163 } 1164 qp->wq.rq.wq_pidx_inc = 0; 1165 spin_unlock(&qp->lock); 1166 spin_unlock_irq(&qp->rhp->lock); 1167 1168 /* Wait for the dbfifo to drain */ 1169 while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) { 1170 set_current_state(TASK_UNINTERRUPTIBLE); 1171 schedule_timeout(usecs_to_jiffies(10)); 1172 } 1173 } 1174 } 1175 1176 static void recover_queues(struct uld_ctx *ctx) 1177 { 1178 int count = 0; 1179 struct qp_list qp_list; 1180 int ret; 1181 1182 /* slow everybody down */ 1183 set_current_state(TASK_UNINTERRUPTIBLE); 1184 schedule_timeout(usecs_to_jiffies(1000)); 1185 1186 /* flush the SGE contexts */ 1187 ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]); 1188 if (ret) { 1189 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n", 1190 pci_name(ctx->lldi.pdev)); 1191 return; 1192 } 1193 1194 /* Count active queues so we can build a list of queues to recover */ 1195 spin_lock_irq(&ctx->dev->lock); 1196 WARN_ON(ctx->dev->db_state != STOPPED); 1197 ctx->dev->db_state = RECOVERY; 1198 idr_for_each(&ctx->dev->qpidr, count_qps, &count); 1199 1200 qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC); 1201 if (!qp_list.qps) { 1202 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n", 1203 pci_name(ctx->lldi.pdev)); 1204 spin_unlock_irq(&ctx->dev->lock); 1205 return; 1206 } 1207 qp_list.idx = 0; 1208 1209 /* add and ref each qp so it doesn't get freed */ 1210 idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list); 1211 1212 spin_unlock_irq(&ctx->dev->lock); 1213 1214 /* now traverse the list in a safe context to recover the db state*/ 1215 recover_lost_dbs(ctx, &qp_list); 1216 1217 /* we're almost done! deref the qps and clean up */ 1218 deref_qps(&qp_list); 1219 kfree(qp_list.qps); 1220 1221 spin_lock_irq(&ctx->dev->lock); 1222 WARN_ON(ctx->dev->db_state != RECOVERY); 1223 ctx->dev->db_state = STOPPED; 1224 spin_unlock_irq(&ctx->dev->lock); 1225 } 1226 1227 static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...) 1228 { 1229 struct uld_ctx *ctx = handle; 1230 1231 switch (control) { 1232 case CXGB4_CONTROL_DB_FULL: 1233 stop_queues(ctx); 1234 ctx->dev->rdev.stats.db_full++; 1235 break; 1236 case CXGB4_CONTROL_DB_EMPTY: 1237 resume_queues(ctx); 1238 mutex_lock(&ctx->dev->rdev.stats.lock); 1239 ctx->dev->rdev.stats.db_empty++; 1240 mutex_unlock(&ctx->dev->rdev.stats.lock); 1241 break; 1242 case CXGB4_CONTROL_DB_DROP: 1243 recover_queues(ctx); 1244 mutex_lock(&ctx->dev->rdev.stats.lock); 1245 ctx->dev->rdev.stats.db_drop++; 1246 mutex_unlock(&ctx->dev->rdev.stats.lock); 1247 break; 1248 default: 1249 printk(KERN_WARNING MOD "%s: unknown control cmd %u\n", 1250 pci_name(ctx->lldi.pdev), control); 1251 break; 1252 } 1253 return 0; 1254 } 1255 1256 static struct cxgb4_uld_info c4iw_uld_info = { 1257 .name = DRV_NAME, 1258 .add = c4iw_uld_add, 1259 .rx_handler = c4iw_uld_rx_handler, 1260 .state_change = c4iw_uld_state_change, 1261 .control = c4iw_uld_control, 1262 }; 1263 1264 static int __init c4iw_init_module(void) 1265 { 1266 int err; 1267 1268 err = c4iw_cm_init(); 1269 if (err) 1270 return err; 1271 1272 c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL); 1273 if (!c4iw_debugfs_root) 1274 printk(KERN_WARNING MOD 1275 "could not create debugfs entry, continuing\n"); 1276 1277 cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info); 1278 1279 return 0; 1280 } 1281 1282 static void __exit c4iw_exit_module(void) 1283 { 1284 struct uld_ctx *ctx, *tmp; 1285 1286 mutex_lock(&dev_mutex); 1287 list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) { 1288 if (ctx->dev) 1289 c4iw_remove(ctx); 1290 kfree(ctx); 1291 } 1292 mutex_unlock(&dev_mutex); 1293 cxgb4_unregister_uld(CXGB4_ULD_RDMA); 1294 c4iw_cm_term(); 1295 debugfs_remove_recursive(c4iw_debugfs_root); 1296 } 1297 1298 module_init(c4iw_init_module); 1299 module_exit(c4iw_exit_module); 1300